xref: /linux/arch/xtensa/kernel/smp.c (revision 306b38305c0f86de7f17c5b091a95451dcc93d7d)
1 /*
2  * Xtensa SMP support functions.
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (C) 2008 - 2013 Tensilica Inc.
9  *
10  * Chris Zankel <chris@zankel.net>
11  * Joe Taylor <joe@tensilica.com>
12  * Pete Delaney <piet@tensilica.com
13  */
14 
15 #include <linux/cpu.h>
16 #include <linux/cpumask.h>
17 #include <linux/delay.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/irqdomain.h>
21 #include <linux/irq.h>
22 #include <linux/kdebug.h>
23 #include <linux/module.h>
24 #include <linux/sched/mm.h>
25 #include <linux/sched/hotplug.h>
26 #include <linux/sched/task_stack.h>
27 #include <linux/reboot.h>
28 #include <linux/seq_file.h>
29 #include <linux/smp.h>
30 #include <linux/thread_info.h>
31 
32 #include <asm/cacheflush.h>
33 #include <asm/kdebug.h>
34 #include <asm/mmu_context.h>
35 #include <asm/mxregs.h>
36 #include <asm/platform.h>
37 #include <asm/tlbflush.h>
38 #include <asm/traps.h>
39 
40 #ifdef CONFIG_SMP
41 # if XCHAL_HAVE_S32C1I == 0
42 #  error "The S32C1I option is required for SMP."
43 # endif
44 #endif
45 
46 static void system_invalidate_dcache_range(unsigned long start,
47 		unsigned long size);
48 static void system_flush_invalidate_dcache_range(unsigned long start,
49 		unsigned long size);
50 
51 /* IPI (Inter Process Interrupt) */
52 
53 #define IPI_IRQ	0
54 
55 static irqreturn_t ipi_interrupt(int irq, void *dev_id);
56 static struct irqaction ipi_irqaction = {
57 	.handler =	ipi_interrupt,
58 	.flags =	IRQF_PERCPU,
59 	.name =		"ipi",
60 };
61 
62 void ipi_init(void)
63 {
64 	unsigned irq = irq_create_mapping(NULL, IPI_IRQ);
65 	setup_irq(irq, &ipi_irqaction);
66 }
67 
68 static inline unsigned int get_core_count(void)
69 {
70 	/* Bits 18..21 of SYSCFGID contain the core count minus 1. */
71 	unsigned int syscfgid = get_er(SYSCFGID);
72 	return ((syscfgid >> 18) & 0xf) + 1;
73 }
74 
75 static inline int get_core_id(void)
76 {
77 	/* Bits 0...18 of SYSCFGID contain the core id  */
78 	unsigned int core_id = get_er(SYSCFGID);
79 	return core_id & 0x3fff;
80 }
81 
82 void __init smp_prepare_cpus(unsigned int max_cpus)
83 {
84 	unsigned i;
85 
86 	for (i = 0; i < max_cpus; ++i)
87 		set_cpu_present(i, true);
88 }
89 
90 void __init smp_init_cpus(void)
91 {
92 	unsigned i;
93 	unsigned int ncpus = get_core_count();
94 	unsigned int core_id = get_core_id();
95 
96 	pr_info("%s: Core Count = %d\n", __func__, ncpus);
97 	pr_info("%s: Core Id = %d\n", __func__, core_id);
98 
99 	for (i = 0; i < ncpus; ++i)
100 		set_cpu_possible(i, true);
101 }
102 
103 void __init smp_prepare_boot_cpu(void)
104 {
105 	unsigned int cpu = smp_processor_id();
106 	BUG_ON(cpu != 0);
107 	cpu_asid_cache(cpu) = ASID_USER_FIRST;
108 }
109 
110 void __init smp_cpus_done(unsigned int max_cpus)
111 {
112 }
113 
114 static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */
115 static DECLARE_COMPLETION(cpu_running);
116 
117 void secondary_start_kernel(void)
118 {
119 	struct mm_struct *mm = &init_mm;
120 	unsigned int cpu = smp_processor_id();
121 
122 	init_mmu();
123 
124 #ifdef CONFIG_DEBUG_KERNEL
125 	if (boot_secondary_processors == 0) {
126 		pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n",
127 			__func__, boot_secondary_processors, cpu);
128 		for (;;)
129 			__asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL));
130 	}
131 
132 	pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n",
133 		__func__, boot_secondary_processors, cpu);
134 #endif
135 	/* Init EXCSAVE1 */
136 
137 	secondary_trap_init();
138 
139 	/* All kernel threads share the same mm context. */
140 
141 	mmget(mm);
142 	mmgrab(mm);
143 	current->active_mm = mm;
144 	cpumask_set_cpu(cpu, mm_cpumask(mm));
145 	enter_lazy_tlb(mm, current);
146 
147 	preempt_disable();
148 	trace_hardirqs_off();
149 
150 	calibrate_delay();
151 
152 	notify_cpu_starting(cpu);
153 
154 	secondary_init_irq();
155 	local_timer_setup(cpu);
156 
157 	set_cpu_online(cpu, true);
158 
159 	local_irq_enable();
160 
161 	complete(&cpu_running);
162 
163 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
164 }
165 
166 static void mx_cpu_start(void *p)
167 {
168 	unsigned cpu = (unsigned)p;
169 	unsigned long run_stall_mask = get_er(MPSCORE);
170 
171 	set_er(run_stall_mask & ~(1u << cpu), MPSCORE);
172 	pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
173 			__func__, cpu, run_stall_mask, get_er(MPSCORE));
174 }
175 
176 static void mx_cpu_stop(void *p)
177 {
178 	unsigned cpu = (unsigned)p;
179 	unsigned long run_stall_mask = get_er(MPSCORE);
180 
181 	set_er(run_stall_mask | (1u << cpu), MPSCORE);
182 	pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
183 			__func__, cpu, run_stall_mask, get_er(MPSCORE));
184 }
185 
186 #ifdef CONFIG_HOTPLUG_CPU
187 unsigned long cpu_start_id __cacheline_aligned;
188 #endif
189 unsigned long cpu_start_ccount;
190 
191 static int boot_secondary(unsigned int cpu, struct task_struct *ts)
192 {
193 	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
194 	unsigned long ccount;
195 	int i;
196 
197 #ifdef CONFIG_HOTPLUG_CPU
198 	WRITE_ONCE(cpu_start_id, cpu);
199 	/* Pairs with the third memw in the cpu_restart */
200 	mb();
201 	system_flush_invalidate_dcache_range((unsigned long)&cpu_start_id,
202 					     sizeof(cpu_start_id));
203 #endif
204 	smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1);
205 
206 	for (i = 0; i < 2; ++i) {
207 		do
208 			ccount = get_ccount();
209 		while (!ccount);
210 
211 		WRITE_ONCE(cpu_start_ccount, ccount);
212 
213 		do {
214 			/*
215 			 * Pairs with the first two memws in the
216 			 * .Lboot_secondary.
217 			 */
218 			mb();
219 			ccount = READ_ONCE(cpu_start_ccount);
220 		} while (ccount && time_before(jiffies, timeout));
221 
222 		if (ccount) {
223 			smp_call_function_single(0, mx_cpu_stop,
224 						 (void *)cpu, 1);
225 			WRITE_ONCE(cpu_start_ccount, 0);
226 			return -EIO;
227 		}
228 	}
229 	return 0;
230 }
231 
232 int __cpu_up(unsigned int cpu, struct task_struct *idle)
233 {
234 	int ret = 0;
235 
236 	if (cpu_asid_cache(cpu) == 0)
237 		cpu_asid_cache(cpu) = ASID_USER_FIRST;
238 
239 	start_info.stack = (unsigned long)task_pt_regs(idle);
240 	wmb();
241 
242 	pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n",
243 			__func__, cpu, idle, start_info.stack);
244 
245 	init_completion(&cpu_running);
246 	ret = boot_secondary(cpu, idle);
247 	if (ret == 0) {
248 		wait_for_completion_timeout(&cpu_running,
249 				msecs_to_jiffies(1000));
250 		if (!cpu_online(cpu))
251 			ret = -EIO;
252 	}
253 
254 	if (ret)
255 		pr_err("CPU %u failed to boot\n", cpu);
256 
257 	return ret;
258 }
259 
260 #ifdef CONFIG_HOTPLUG_CPU
261 
262 /*
263  * __cpu_disable runs on the processor to be shutdown.
264  */
265 int __cpu_disable(void)
266 {
267 	unsigned int cpu = smp_processor_id();
268 
269 	/*
270 	 * Take this CPU offline.  Once we clear this, we can't return,
271 	 * and we must not schedule until we're ready to give up the cpu.
272 	 */
273 	set_cpu_online(cpu, false);
274 
275 	/*
276 	 * OK - migrate IRQs away from this CPU
277 	 */
278 	migrate_irqs();
279 
280 	/*
281 	 * Flush user cache and TLB mappings, and then remove this CPU
282 	 * from the vm mask set of all processes.
283 	 */
284 	local_flush_cache_all();
285 	local_flush_tlb_all();
286 	invalidate_page_directory();
287 
288 	clear_tasks_mm_cpumask(cpu);
289 
290 	return 0;
291 }
292 
293 static void platform_cpu_kill(unsigned int cpu)
294 {
295 	smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true);
296 }
297 
298 /*
299  * called on the thread which is asking for a CPU to be shutdown -
300  * waits until shutdown has completed, or it is timed out.
301  */
302 void __cpu_die(unsigned int cpu)
303 {
304 	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
305 	while (time_before(jiffies, timeout)) {
306 		system_invalidate_dcache_range((unsigned long)&cpu_start_id,
307 					       sizeof(cpu_start_id));
308 		/* Pairs with the second memw in the cpu_restart */
309 		mb();
310 		if (READ_ONCE(cpu_start_id) == -cpu) {
311 			platform_cpu_kill(cpu);
312 			return;
313 		}
314 	}
315 	pr_err("CPU%u: unable to kill\n", cpu);
316 }
317 
318 void arch_cpu_idle_dead(void)
319 {
320 	cpu_die();
321 }
322 /*
323  * Called from the idle thread for the CPU which has been shutdown.
324  *
325  * Note that we disable IRQs here, but do not re-enable them
326  * before returning to the caller. This is also the behaviour
327  * of the other hotplug-cpu capable cores, so presumably coming
328  * out of idle fixes this.
329  */
330 void __ref cpu_die(void)
331 {
332 	idle_task_exit();
333 	local_irq_disable();
334 	__asm__ __volatile__(
335 			"	movi	a2, cpu_restart\n"
336 			"	jx	a2\n");
337 }
338 
339 #endif /* CONFIG_HOTPLUG_CPU */
340 
341 enum ipi_msg_type {
342 	IPI_RESCHEDULE = 0,
343 	IPI_CALL_FUNC,
344 	IPI_CPU_STOP,
345 	IPI_MAX
346 };
347 
348 static const struct {
349 	const char *short_text;
350 	const char *long_text;
351 } ipi_text[] = {
352 	{ .short_text = "RES", .long_text = "Rescheduling interrupts" },
353 	{ .short_text = "CAL", .long_text = "Function call interrupts" },
354 	{ .short_text = "DIE", .long_text = "CPU shutdown interrupts" },
355 };
356 
357 struct ipi_data {
358 	unsigned long ipi_count[IPI_MAX];
359 };
360 
361 static DEFINE_PER_CPU(struct ipi_data, ipi_data);
362 
363 static void send_ipi_message(const struct cpumask *callmask,
364 		enum ipi_msg_type msg_id)
365 {
366 	int index;
367 	unsigned long mask = 0;
368 
369 	for_each_cpu(index, callmask)
370 		if (index != smp_processor_id())
371 			mask |= 1 << index;
372 
373 	set_er(mask, MIPISET(msg_id));
374 }
375 
376 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
377 {
378 	send_ipi_message(mask, IPI_CALL_FUNC);
379 }
380 
381 void arch_send_call_function_single_ipi(int cpu)
382 {
383 	send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
384 }
385 
386 void smp_send_reschedule(int cpu)
387 {
388 	send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
389 }
390 
391 void smp_send_stop(void)
392 {
393 	struct cpumask targets;
394 
395 	cpumask_copy(&targets, cpu_online_mask);
396 	cpumask_clear_cpu(smp_processor_id(), &targets);
397 	send_ipi_message(&targets, IPI_CPU_STOP);
398 }
399 
400 static void ipi_cpu_stop(unsigned int cpu)
401 {
402 	set_cpu_online(cpu, false);
403 	machine_halt();
404 }
405 
406 irqreturn_t ipi_interrupt(int irq, void *dev_id)
407 {
408 	unsigned int cpu = smp_processor_id();
409 	struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
410 	unsigned int msg;
411 	unsigned i;
412 
413 	msg = get_er(MIPICAUSE(cpu));
414 	for (i = 0; i < IPI_MAX; i++)
415 		if (msg & (1 << i)) {
416 			set_er(1 << i, MIPICAUSE(cpu));
417 			++ipi->ipi_count[i];
418 		}
419 
420 	if (msg & (1 << IPI_RESCHEDULE))
421 		scheduler_ipi();
422 	if (msg & (1 << IPI_CALL_FUNC))
423 		generic_smp_call_function_interrupt();
424 	if (msg & (1 << IPI_CPU_STOP))
425 		ipi_cpu_stop(cpu);
426 
427 	return IRQ_HANDLED;
428 }
429 
430 void show_ipi_list(struct seq_file *p, int prec)
431 {
432 	unsigned int cpu;
433 	unsigned i;
434 
435 	for (i = 0; i < IPI_MAX; ++i) {
436 		seq_printf(p, "%*s:", prec, ipi_text[i].short_text);
437 		for_each_online_cpu(cpu)
438 			seq_printf(p, " %10lu",
439 					per_cpu(ipi_data, cpu).ipi_count[i]);
440 		seq_printf(p, "   %s\n", ipi_text[i].long_text);
441 	}
442 }
443 
444 int setup_profiling_timer(unsigned int multiplier)
445 {
446 	pr_debug("setup_profiling_timer %d\n", multiplier);
447 	return 0;
448 }
449 
450 /* TLB flush functions */
451 
452 struct flush_data {
453 	struct vm_area_struct *vma;
454 	unsigned long addr1;
455 	unsigned long addr2;
456 };
457 
458 static void ipi_flush_tlb_all(void *arg)
459 {
460 	local_flush_tlb_all();
461 }
462 
463 void flush_tlb_all(void)
464 {
465 	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
466 }
467 
468 static void ipi_flush_tlb_mm(void *arg)
469 {
470 	local_flush_tlb_mm(arg);
471 }
472 
473 void flush_tlb_mm(struct mm_struct *mm)
474 {
475 	on_each_cpu(ipi_flush_tlb_mm, mm, 1);
476 }
477 
478 static void ipi_flush_tlb_page(void *arg)
479 {
480 	struct flush_data *fd = arg;
481 	local_flush_tlb_page(fd->vma, fd->addr1);
482 }
483 
484 void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
485 {
486 	struct flush_data fd = {
487 		.vma = vma,
488 		.addr1 = addr,
489 	};
490 	on_each_cpu(ipi_flush_tlb_page, &fd, 1);
491 }
492 
493 static void ipi_flush_tlb_range(void *arg)
494 {
495 	struct flush_data *fd = arg;
496 	local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
497 }
498 
499 void flush_tlb_range(struct vm_area_struct *vma,
500 		     unsigned long start, unsigned long end)
501 {
502 	struct flush_data fd = {
503 		.vma = vma,
504 		.addr1 = start,
505 		.addr2 = end,
506 	};
507 	on_each_cpu(ipi_flush_tlb_range, &fd, 1);
508 }
509 
510 static void ipi_flush_tlb_kernel_range(void *arg)
511 {
512 	struct flush_data *fd = arg;
513 	local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
514 }
515 
516 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
517 {
518 	struct flush_data fd = {
519 		.addr1 = start,
520 		.addr2 = end,
521 	};
522 	on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
523 }
524 
525 /* Cache flush functions */
526 
527 static void ipi_flush_cache_all(void *arg)
528 {
529 	local_flush_cache_all();
530 }
531 
532 void flush_cache_all(void)
533 {
534 	on_each_cpu(ipi_flush_cache_all, NULL, 1);
535 }
536 
537 static void ipi_flush_cache_page(void *arg)
538 {
539 	struct flush_data *fd = arg;
540 	local_flush_cache_page(fd->vma, fd->addr1, fd->addr2);
541 }
542 
543 void flush_cache_page(struct vm_area_struct *vma,
544 		     unsigned long address, unsigned long pfn)
545 {
546 	struct flush_data fd = {
547 		.vma = vma,
548 		.addr1 = address,
549 		.addr2 = pfn,
550 	};
551 	on_each_cpu(ipi_flush_cache_page, &fd, 1);
552 }
553 
554 static void ipi_flush_cache_range(void *arg)
555 {
556 	struct flush_data *fd = arg;
557 	local_flush_cache_range(fd->vma, fd->addr1, fd->addr2);
558 }
559 
560 void flush_cache_range(struct vm_area_struct *vma,
561 		     unsigned long start, unsigned long end)
562 {
563 	struct flush_data fd = {
564 		.vma = vma,
565 		.addr1 = start,
566 		.addr2 = end,
567 	};
568 	on_each_cpu(ipi_flush_cache_range, &fd, 1);
569 }
570 
571 static void ipi_flush_icache_range(void *arg)
572 {
573 	struct flush_data *fd = arg;
574 	local_flush_icache_range(fd->addr1, fd->addr2);
575 }
576 
577 void flush_icache_range(unsigned long start, unsigned long end)
578 {
579 	struct flush_data fd = {
580 		.addr1 = start,
581 		.addr2 = end,
582 	};
583 	on_each_cpu(ipi_flush_icache_range, &fd, 1);
584 }
585 EXPORT_SYMBOL(flush_icache_range);
586 
587 /* ------------------------------------------------------------------------- */
588 
589 static void ipi_invalidate_dcache_range(void *arg)
590 {
591 	struct flush_data *fd = arg;
592 	__invalidate_dcache_range(fd->addr1, fd->addr2);
593 }
594 
595 static void system_invalidate_dcache_range(unsigned long start,
596 		unsigned long size)
597 {
598 	struct flush_data fd = {
599 		.addr1 = start,
600 		.addr2 = size,
601 	};
602 	on_each_cpu(ipi_invalidate_dcache_range, &fd, 1);
603 }
604 
605 static void ipi_flush_invalidate_dcache_range(void *arg)
606 {
607 	struct flush_data *fd = arg;
608 	__flush_invalidate_dcache_range(fd->addr1, fd->addr2);
609 }
610 
611 static void system_flush_invalidate_dcache_range(unsigned long start,
612 		unsigned long size)
613 {
614 	struct flush_data fd = {
615 		.addr1 = start,
616 		.addr2 = size,
617 	};
618 	on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1);
619 }
620