xref: /linux/arch/xtensa/kernel/setup.c (revision 367b8112fe2ea5c39a7bb4d263dcdd9b612fae18) 
1 /*
2  * arch/xtensa/kernel/setup.c
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (C) 1995  Linus Torvalds
9  * Copyright (C) 2001 - 2005  Tensilica Inc.
10  *
11  * Chris Zankel	<chris@zankel.net>
12  * Joe Taylor	<joe@tensilica.com, joetylr@yahoo.com>
13  * Kevin Chea
14  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
15  */
16 
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/mm.h>
20 #include <linux/proc_fs.h>
21 #include <linux/screen_info.h>
22 #include <linux/bootmem.h>
23 #include <linux/kernel.h>
24 
25 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
26 # include <linux/console.h>
27 #endif
28 
29 #ifdef CONFIG_RTC
30 # include <linux/timex.h>
31 #endif
32 
33 #ifdef CONFIG_PROC_FS
34 # include <linux/seq_file.h>
35 #endif
36 
37 #include <asm/system.h>
38 #include <asm/bootparam.h>
39 #include <asm/pgtable.h>
40 #include <asm/processor.h>
41 #include <asm/timex.h>
42 #include <asm/platform.h>
43 #include <asm/page.h>
44 #include <asm/setup.h>
45 #include <asm/param.h>
46 
47 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
48 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
49 #endif
50 
51 #ifdef CONFIG_BLK_DEV_FD
52 extern struct fd_ops no_fd_ops;
53 struct fd_ops *fd_ops;
54 #endif
55 
56 extern struct rtc_ops no_rtc_ops;
57 struct rtc_ops *rtc_ops;
58 
59 #ifdef CONFIG_BLK_DEV_INITRD
60 extern void *initrd_start;
61 extern void *initrd_end;
62 extern void *__initrd_start;
63 extern void *__initrd_end;
64 int initrd_is_mapped = 0;
65 extern int initrd_below_start_ok;
66 #endif
67 
68 unsigned char aux_device_present;
69 extern unsigned long loops_per_jiffy;
70 
71 /* Command line specified as configuration option. */
72 
73 static char __initdata command_line[COMMAND_LINE_SIZE];
74 
75 #ifdef CONFIG_CMDLINE_BOOL
76 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
77 #endif
78 
79 sysmem_info_t __initdata sysmem;
80 
81 #ifdef CONFIG_BLK_DEV_INITRD
82 int initrd_is_mapped;
83 #endif
84 
85 extern void init_mmu(void);
86 
87 /*
88  * Boot parameter parsing.
89  *
90  * The Xtensa port uses a list of variable-sized tags to pass data to
91  * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
92  * to be recognised. The list is terminated with a zero-sized
93  * BP_TAG_LAST tag.
94  */
95 
96 typedef struct tagtable {
97 	u32 tag;
98 	int (*parse)(const bp_tag_t*);
99 } tagtable_t;
100 
101 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn 		\
102 	__attribute__((unused, __section__(".taglist"))) = { tag, fn }
103 
104 /* parse current tag */
105 
106 static int __init parse_tag_mem(const bp_tag_t *tag)
107 {
108 	meminfo_t *mi = (meminfo_t*)(tag->data);
109 
110 	if (mi->type != MEMORY_TYPE_CONVENTIONAL)
111 		return -1;
112 
113 	if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
114 		printk(KERN_WARNING
115 		       "Ignoring memory bank 0x%08lx size %ldKB\n",
116 		       (unsigned long)mi->start,
117 		       (unsigned long)mi->end - (unsigned long)mi->start);
118 		return -EINVAL;
119 	}
120 	sysmem.bank[sysmem.nr_banks].type  = mi->type;
121 	sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
122 	sysmem.bank[sysmem.nr_banks].end   = mi->end & PAGE_SIZE;
123 	sysmem.nr_banks++;
124 
125 	return 0;
126 }
127 
128 __tagtable(BP_TAG_MEMORY, parse_tag_mem);
129 
130 #ifdef CONFIG_BLK_DEV_INITRD
131 
132 static int __init parse_tag_initrd(const bp_tag_t* tag)
133 {
134 	meminfo_t* mi;
135 	mi = (meminfo_t*)(tag->data);
136 	initrd_start = (void*)(mi->start);
137 	initrd_end = (void*)(mi->end);
138 
139 	return 0;
140 }
141 
142 __tagtable(BP_TAG_INITRD, parse_tag_initrd);
143 
144 #endif /* CONFIG_BLK_DEV_INITRD */
145 
146 static int __init parse_tag_cmdline(const bp_tag_t* tag)
147 {
148 	strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
149 	command_line[COMMAND_LINE_SIZE - 1] = '\0';
150 	return 0;
151 }
152 
153 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
154 
155 static int __init parse_bootparam(const bp_tag_t* tag)
156 {
157 	extern tagtable_t __tagtable_begin, __tagtable_end;
158 	tagtable_t *t;
159 
160 	/* Boot parameters must start with a BP_TAG_FIRST tag. */
161 
162 	if (tag->id != BP_TAG_FIRST) {
163 		printk(KERN_WARNING "Invalid boot parameters!\n");
164 		return 0;
165 	}
166 
167 	tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
168 
169 	/* Parse all tags. */
170 
171 	while (tag != NULL && tag->id != BP_TAG_LAST) {
172 	 	for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
173 			if (tag->id == t->tag) {
174 				t->parse(tag);
175 				break;
176 			}
177 		}
178 		if (t == &__tagtable_end)
179 			printk(KERN_WARNING "Ignoring tag "
180 			       "0x%08x\n", tag->id);
181 		tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
182 	}
183 
184 	return 0;
185 }
186 
187 /*
188  * Initialize architecture. (Early stage)
189  */
190 
191 void __init init_arch(bp_tag_t *bp_start)
192 {
193 
194 #ifdef CONFIG_BLK_DEV_INITRD
195 	initrd_start = &__initrd_start;
196 	initrd_end = &__initrd_end;
197 #endif
198 
199 	sysmem.nr_banks = 0;
200 
201 #ifdef CONFIG_CMDLINE_BOOL
202 	strcpy(command_line, default_command_line);
203 #endif
204 
205 	/* Parse boot parameters */
206 
207         if (bp_start)
208 	  parse_bootparam(bp_start);
209 
210 	if (sysmem.nr_banks == 0) {
211 		sysmem.nr_banks = 1;
212 		sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
213 		sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
214 				     + PLATFORM_DEFAULT_MEM_SIZE;
215 	}
216 
217 	/* Early hook for platforms */
218 
219 	platform_init(bp_start);
220 
221 	/* Initialize MMU. */
222 
223 	init_mmu();
224 }
225 
226 /*
227  * Initialize system. Setup memory and reserve regions.
228  */
229 
230 extern char _end;
231 extern char _stext;
232 extern char _WindowVectors_text_start;
233 extern char _WindowVectors_text_end;
234 extern char _DebugInterruptVector_literal_start;
235 extern char _DebugInterruptVector_text_end;
236 extern char _KernelExceptionVector_literal_start;
237 extern char _KernelExceptionVector_text_end;
238 extern char _UserExceptionVector_literal_start;
239 extern char _UserExceptionVector_text_end;
240 extern char _DoubleExceptionVector_literal_start;
241 extern char _DoubleExceptionVector_text_end;
242 
243 void __init setup_arch(char **cmdline_p)
244 {
245 	extern int mem_reserve(unsigned long, unsigned long, int);
246 	extern void bootmem_init(void);
247 
248 	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
249 	boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
250 	*cmdline_p = command_line;
251 
252 	/* Reserve some memory regions */
253 
254 #ifdef CONFIG_BLK_DEV_INITRD
255 	if (initrd_start < initrd_end) {
256 		initrd_is_mapped = mem_reserve(__pa(initrd_start),
257 					       __pa(initrd_end), 0);
258 		initrd_below_start_ok = 1;
259  	} else {
260 		initrd_start = 0;
261 	}
262 #endif
263 
264 	mem_reserve(__pa(&_stext),__pa(&_end), 1);
265 
266 	mem_reserve(__pa(&_WindowVectors_text_start),
267 		    __pa(&_WindowVectors_text_end), 0);
268 
269 	mem_reserve(__pa(&_DebugInterruptVector_literal_start),
270 		    __pa(&_DebugInterruptVector_text_end), 0);
271 
272 	mem_reserve(__pa(&_KernelExceptionVector_literal_start),
273 		    __pa(&_KernelExceptionVector_text_end), 0);
274 
275 	mem_reserve(__pa(&_UserExceptionVector_literal_start),
276 		    __pa(&_UserExceptionVector_text_end), 0);
277 
278 	mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
279 		    __pa(&_DoubleExceptionVector_text_end), 0);
280 
281 	bootmem_init();
282 
283 	platform_setup(cmdline_p);
284 
285 
286 	paging_init();
287 
288 #ifdef CONFIG_VT
289 # if defined(CONFIG_VGA_CONSOLE)
290 	conswitchp = &vga_con;
291 # elif defined(CONFIG_DUMMY_CONSOLE)
292 	conswitchp = &dummy_con;
293 # endif
294 #endif
295 
296 #ifdef CONFIG_PCI
297 	platform_pcibios_init();
298 #endif
299 }
300 
301 void machine_restart(char * cmd)
302 {
303 	platform_restart();
304 }
305 
306 void machine_halt(void)
307 {
308 	platform_halt();
309 	while (1);
310 }
311 
312 void machine_power_off(void)
313 {
314 	platform_power_off();
315 	while (1);
316 }
317 #ifdef CONFIG_PROC_FS
318 
319 /*
320  * Display some core information through /proc/cpuinfo.
321  */
322 
323 static int
324 c_show(struct seq_file *f, void *slot)
325 {
326 	/* high-level stuff */
327 	seq_printf(f,"processor\t: 0\n"
328 		     "vendor_id\t: Tensilica\n"
329 		     "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
330 		     "core ID\t\t: " XCHAL_CORE_ID "\n"
331 		     "build ID\t: 0x%x\n"
332 		     "byte order\t: %s\n"
333  		     "cpu MHz\t\t: %lu.%02lu\n"
334 		     "bogomips\t: %lu.%02lu\n",
335 		     XCHAL_BUILD_UNIQUE_ID,
336 		     XCHAL_HAVE_BE ?  "big" : "little",
337 		     CCOUNT_PER_JIFFY/(1000000/HZ),
338 		     (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
339 		     loops_per_jiffy/(500000/HZ),
340 		     (loops_per_jiffy/(5000/HZ)) % 100);
341 
342 	seq_printf(f,"flags\t\t: "
343 #if XCHAL_HAVE_NMI
344 		     "nmi "
345 #endif
346 #if XCHAL_HAVE_DEBUG
347 		     "debug "
348 # if XCHAL_HAVE_OCD
349 		     "ocd "
350 # endif
351 #endif
352 #if XCHAL_HAVE_DENSITY
353 	    	     "density "
354 #endif
355 #if XCHAL_HAVE_BOOLEANS
356 		     "boolean "
357 #endif
358 #if XCHAL_HAVE_LOOPS
359 		     "loop "
360 #endif
361 #if XCHAL_HAVE_NSA
362 		     "nsa "
363 #endif
364 #if XCHAL_HAVE_MINMAX
365 		     "minmax "
366 #endif
367 #if XCHAL_HAVE_SEXT
368 		     "sext "
369 #endif
370 #if XCHAL_HAVE_CLAMPS
371 		     "clamps "
372 #endif
373 #if XCHAL_HAVE_MAC16
374 		     "mac16 "
375 #endif
376 #if XCHAL_HAVE_MUL16
377 		     "mul16 "
378 #endif
379 #if XCHAL_HAVE_MUL32
380 		     "mul32 "
381 #endif
382 #if XCHAL_HAVE_MUL32_HIGH
383 		     "mul32h "
384 #endif
385 #if XCHAL_HAVE_FP
386 		     "fpu "
387 #endif
388 		     "\n");
389 
390 	/* Registers. */
391 	seq_printf(f,"physical aregs\t: %d\n"
392 		     "misc regs\t: %d\n"
393 		     "ibreak\t\t: %d\n"
394 		     "dbreak\t\t: %d\n",
395 		     XCHAL_NUM_AREGS,
396 		     XCHAL_NUM_MISC_REGS,
397 		     XCHAL_NUM_IBREAK,
398 		     XCHAL_NUM_DBREAK);
399 
400 
401 	/* Interrupt. */
402 	seq_printf(f,"num ints\t: %d\n"
403 		     "ext ints\t: %d\n"
404 		     "int levels\t: %d\n"
405 		     "timers\t\t: %d\n"
406 		     "debug level\t: %d\n",
407 		     XCHAL_NUM_INTERRUPTS,
408 		     XCHAL_NUM_EXTINTERRUPTS,
409 		     XCHAL_NUM_INTLEVELS,
410 		     XCHAL_NUM_TIMERS,
411 		     XCHAL_DEBUGLEVEL);
412 
413 	/* Cache */
414 	seq_printf(f,"icache line size: %d\n"
415 		     "icache ways\t: %d\n"
416 		     "icache size\t: %d\n"
417 		     "icache flags\t: "
418 #if XCHAL_ICACHE_LINE_LOCKABLE
419 		     "lock"
420 #endif
421 		     "\n"
422 		     "dcache line size: %d\n"
423 		     "dcache ways\t: %d\n"
424 		     "dcache size\t: %d\n"
425 		     "dcache flags\t: "
426 #if XCHAL_DCACHE_IS_WRITEBACK
427 		     "writeback"
428 #endif
429 #if XCHAL_DCACHE_LINE_LOCKABLE
430 		     "lock"
431 #endif
432 		     "\n",
433 		     XCHAL_ICACHE_LINESIZE,
434 		     XCHAL_ICACHE_WAYS,
435 		     XCHAL_ICACHE_SIZE,
436 		     XCHAL_DCACHE_LINESIZE,
437 		     XCHAL_DCACHE_WAYS,
438 		     XCHAL_DCACHE_SIZE);
439 
440 	return 0;
441 }
442 
443 /*
444  * We show only CPU #0 info.
445  */
446 static void *
447 c_start(struct seq_file *f, loff_t *pos)
448 {
449 	return (void *) ((*pos == 0) ? (void *)1 : NULL);
450 }
451 
452 static void *
453 c_next(struct seq_file *f, void *v, loff_t *pos)
454 {
455 	return NULL;
456 }
457 
458 static void
459 c_stop(struct seq_file *f, void *v)
460 {
461 }
462 
463 const struct seq_operations cpuinfo_op =
464 {
465 	start:  c_start,
466 	next:   c_next,
467 	stop:   c_stop,
468 	show:   c_show
469 };
470 
471 #endif /* CONFIG_PROC_FS */
472 
473