1 /* 2 * arch/xtensa/pcibios.c 3 * 4 * PCI bios-type initialisation for PCI machines 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * Copyright (C) 2001-2005 Tensilica Inc. 12 * 13 * Based largely on work from Cort (ppc/kernel/pci.c) 14 * IO functions copied from sparc. 15 * 16 * Chris Zankel <chris@zankel.net> 17 * 18 */ 19 20 #include <linux/config.h> 21 #include <linux/kernel.h> 22 #include <linux/pci.h> 23 #include <linux/delay.h> 24 #include <linux/string.h> 25 #include <linux/init.h> 26 #include <linux/sched.h> 27 #include <linux/errno.h> 28 #include <linux/bootmem.h> 29 30 #include <asm/pci-bridge.h> 31 #include <asm/platform.h> 32 33 #undef DEBUG 34 35 #ifdef DEBUG 36 #define DBG(x...) printk(x) 37 #else 38 #define DBG(x...) 39 #endif 40 41 /* PCI Controller */ 42 43 44 /* 45 * pcibios_alloc_controller 46 * pcibios_enable_device 47 * pcibios_fixups 48 * pcibios_align_resource 49 * pcibios_fixup_bus 50 * pcibios_setup 51 * pci_bus_add_device 52 * pci_mmap_page_range 53 */ 54 55 struct pci_controller* pci_ctrl_head; 56 struct pci_controller** pci_ctrl_tail = &pci_ctrl_head; 57 58 static int pci_bus_count; 59 60 /* 61 * We need to avoid collisions with `mirrored' VGA ports 62 * and other strange ISA hardware, so we always want the 63 * addresses to be allocated in the 0x000-0x0ff region 64 * modulo 0x400. 65 * 66 * Why? Because some silly external IO cards only decode 67 * the low 10 bits of the IO address. The 0x00-0xff region 68 * is reserved for motherboard devices that decode all 16 69 * bits, so it's ok to allocate at, say, 0x2800-0x28ff, 70 * but we want to try to avoid allocating at 0x2900-0x2bff 71 * which might have be mirrored at 0x0100-0x03ff.. 72 */ 73 void 74 pcibios_align_resource(void *data, struct resource *res, unsigned long size, 75 unsigned long align) 76 { 77 struct pci_dev *dev = data; 78 79 if (res->flags & IORESOURCE_IO) { 80 unsigned long start = res->start; 81 82 if (size > 0x100) { 83 printk(KERN_ERR "PCI: I/O Region %s/%d too large" 84 " (%ld bytes)\n", pci_name(dev), 85 dev->resource - res, size); 86 } 87 88 if (start & 0x300) { 89 start = (start + 0x3ff) & ~0x3ff; 90 res->start = start; 91 } 92 } 93 } 94 95 int 96 pcibios_enable_resources(struct pci_dev *dev, int mask) 97 { 98 u16 cmd, old_cmd; 99 int idx; 100 struct resource *r; 101 102 pci_read_config_word(dev, PCI_COMMAND, &cmd); 103 old_cmd = cmd; 104 for(idx=0; idx<6; idx++) { 105 r = &dev->resource[idx]; 106 if (!r->start && r->end) { 107 printk (KERN_ERR "PCI: Device %s not available because " 108 "of resource collisions\n", pci_name(dev)); 109 return -EINVAL; 110 } 111 if (r->flags & IORESOURCE_IO) 112 cmd |= PCI_COMMAND_IO; 113 if (r->flags & IORESOURCE_MEM) 114 cmd |= PCI_COMMAND_MEMORY; 115 } 116 if (dev->resource[PCI_ROM_RESOURCE].start) 117 cmd |= PCI_COMMAND_MEMORY; 118 if (cmd != old_cmd) { 119 printk("PCI: Enabling device %s (%04x -> %04x)\n", 120 pci_name(dev), old_cmd, cmd); 121 pci_write_config_word(dev, PCI_COMMAND, cmd); 122 } 123 return 0; 124 } 125 126 struct pci_controller * __init pcibios_alloc_controller(void) 127 { 128 struct pci_controller *pci_ctrl; 129 130 pci_ctrl = (struct pci_controller *)alloc_bootmem(sizeof(*pci_ctrl)); 131 memset(pci_ctrl, 0, sizeof(struct pci_controller)); 132 133 *pci_ctrl_tail = pci_ctrl; 134 pci_ctrl_tail = &pci_ctrl->next; 135 136 return pci_ctrl; 137 } 138 139 static int __init pcibios_init(void) 140 { 141 struct pci_controller *pci_ctrl; 142 struct pci_bus *bus; 143 int next_busno = 0, i; 144 145 printk("PCI: Probing PCI hardware\n"); 146 147 /* Scan all of the recorded PCI controllers. */ 148 for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) { 149 pci_ctrl->last_busno = 0xff; 150 bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops, 151 pci_ctrl); 152 if (pci_ctrl->io_resource.flags) { 153 unsigned long offs; 154 155 offs = (unsigned long)pci_ctrl->io_space.base; 156 pci_ctrl->io_resource.start += offs; 157 pci_ctrl->io_resource.end += offs; 158 bus->resource[0] = &pci_ctrl->io_resource; 159 } 160 for (i = 0; i < 3; ++i) 161 if (pci_ctrl->mem_resources[i].flags) 162 bus->resource[i+1] =&pci_ctrl->mem_resources[i]; 163 pci_ctrl->bus = bus; 164 pci_ctrl->last_busno = bus->subordinate; 165 if (next_busno <= pci_ctrl->last_busno) 166 next_busno = pci_ctrl->last_busno+1; 167 } 168 pci_bus_count = next_busno; 169 170 return platform_pcibios_fixup(); 171 } 172 173 subsys_initcall(pcibios_init); 174 175 void __init pcibios_fixup_bus(struct pci_bus *bus) 176 { 177 struct pci_controller *pci_ctrl = bus->sysdata; 178 struct resource *res; 179 unsigned long io_offset; 180 int i; 181 182 io_offset = (unsigned long)pci_ctrl->io_space.base; 183 if (bus->parent == NULL) { 184 /* this is a host bridge - fill in its resources */ 185 pci_ctrl->bus = bus; 186 187 bus->resource[0] = res = &pci_ctrl->io_resource; 188 if (!res->flags) { 189 if (io_offset) 190 printk (KERN_ERR "I/O resource not set for host" 191 " bridge %d\n", pci_ctrl->index); 192 res->start = 0; 193 res->end = IO_SPACE_LIMIT; 194 res->flags = IORESOURCE_IO; 195 } 196 res->start += io_offset; 197 res->end += io_offset; 198 199 for (i = 0; i < 3; i++) { 200 res = &pci_ctrl->mem_resources[i]; 201 if (!res->flags) { 202 if (i > 0) 203 continue; 204 printk(KERN_ERR "Memory resource not set for " 205 "host bridge %d\n", pci_ctrl->index); 206 res->start = 0; 207 res->end = ~0U; 208 res->flags = IORESOURCE_MEM; 209 } 210 bus->resource[i+1] = res; 211 } 212 } else { 213 /* This is a subordinate bridge */ 214 pci_read_bridge_bases(bus); 215 216 for (i = 0; i < 4; i++) { 217 if ((res = bus->resource[i]) == NULL || !res->flags) 218 continue; 219 if (io_offset && (res->flags & IORESOURCE_IO)) { 220 res->start += io_offset; 221 res->end += io_offset; 222 } 223 } 224 } 225 } 226 227 char __init *pcibios_setup(char *str) 228 { 229 return str; 230 } 231 232 /* the next one is stolen from the alpha port... */ 233 234 void __init 235 pcibios_update_irq(struct pci_dev *dev, int irq) 236 { 237 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 238 } 239 240 int pcibios_enable_device(struct pci_dev *dev, int mask) 241 { 242 u16 cmd, old_cmd; 243 int idx; 244 struct resource *r; 245 246 pci_read_config_word(dev, PCI_COMMAND, &cmd); 247 old_cmd = cmd; 248 for (idx=0; idx<6; idx++) { 249 r = &dev->resource[idx]; 250 if (!r->start && r->end) { 251 printk(KERN_ERR "PCI: Device %s not available because " 252 "of resource collisions\n", pci_name(dev)); 253 return -EINVAL; 254 } 255 if (r->flags & IORESOURCE_IO) 256 cmd |= PCI_COMMAND_IO; 257 if (r->flags & IORESOURCE_MEM) 258 cmd |= PCI_COMMAND_MEMORY; 259 } 260 if (cmd != old_cmd) { 261 printk("PCI: Enabling device %s (%04x -> %04x)\n", 262 pci_name(dev), old_cmd, cmd); 263 pci_write_config_word(dev, PCI_COMMAND, cmd); 264 } 265 266 return 0; 267 } 268 269 #ifdef CONFIG_PROC_FS 270 271 /* 272 * Return the index of the PCI controller for device pdev. 273 */ 274 275 int 276 pci_controller_num(struct pci_dev *dev) 277 { 278 struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata; 279 return pci_ctrl->index; 280 } 281 282 #endif /* CONFIG_PROC_FS */ 283 284 /* 285 * Platform support for /proc/bus/pci/X/Y mmap()s, 286 * modelled on the sparc64 implementation by Dave Miller. 287 * -- paulus. 288 */ 289 290 /* 291 * Adjust vm_pgoff of VMA such that it is the physical page offset 292 * corresponding to the 32-bit pci bus offset for DEV requested by the user. 293 * 294 * Basically, the user finds the base address for his device which he wishes 295 * to mmap. They read the 32-bit value from the config space base register, 296 * add whatever PAGE_SIZE multiple offset they wish, and feed this into the 297 * offset parameter of mmap on /proc/bus/pci/XXX for that device. 298 * 299 * Returns negative error code on failure, zero on success. 300 */ 301 static __inline__ int 302 __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma, 303 enum pci_mmap_state mmap_state) 304 { 305 struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata; 306 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; 307 unsigned long io_offset = 0; 308 int i, res_bit; 309 310 if (pci_ctrl == 0) 311 return -EINVAL; /* should never happen */ 312 313 /* If memory, add on the PCI bridge address offset */ 314 if (mmap_state == pci_mmap_mem) { 315 res_bit = IORESOURCE_MEM; 316 } else { 317 io_offset = (unsigned long)pci_ctrl->io_space.base; 318 offset += io_offset; 319 res_bit = IORESOURCE_IO; 320 } 321 322 /* 323 * Check that the offset requested corresponds to one of the 324 * resources of the device. 325 */ 326 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 327 struct resource *rp = &dev->resource[i]; 328 int flags = rp->flags; 329 330 /* treat ROM as memory (should be already) */ 331 if (i == PCI_ROM_RESOURCE) 332 flags |= IORESOURCE_MEM; 333 334 /* Active and same type? */ 335 if ((flags & res_bit) == 0) 336 continue; 337 338 /* In the range of this resource? */ 339 if (offset < (rp->start & PAGE_MASK) || offset > rp->end) 340 continue; 341 342 /* found it! construct the final physical address */ 343 if (mmap_state == pci_mmap_io) 344 offset += pci_ctrl->io_space.start - io_offset; 345 vma->vm_pgoff = offset >> PAGE_SHIFT; 346 return 0; 347 } 348 349 return -EINVAL; 350 } 351 352 /* 353 * Set vm_flags of VMA, as appropriate for this architecture, for a pci device 354 * mapping. 355 */ 356 static __inline__ void 357 __pci_mmap_set_flags(struct pci_dev *dev, struct vm_area_struct *vma, 358 enum pci_mmap_state mmap_state) 359 { 360 vma->vm_flags |= VM_SHM | VM_LOCKED | VM_IO; 361 } 362 363 /* 364 * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci 365 * device mapping. 366 */ 367 static __inline__ void 368 __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma, 369 enum pci_mmap_state mmap_state, int write_combine) 370 { 371 int prot = pgprot_val(vma->vm_page_prot); 372 373 /* Set to write-through */ 374 prot &= ~_PAGE_NO_CACHE; 375 #if 0 376 if (!write_combine) 377 prot |= _PAGE_WRITETHRU; 378 #endif 379 vma->vm_page_prot = __pgprot(prot); 380 } 381 382 /* 383 * Perform the actual remap of the pages for a PCI device mapping, as 384 * appropriate for this architecture. The region in the process to map 385 * is described by vm_start and vm_end members of VMA, the base physical 386 * address is found in vm_pgoff. 387 * The pci device structure is provided so that architectures may make mapping 388 * decisions on a per-device or per-bus basis. 389 * 390 * Returns a negative error code on failure, zero on success. 391 */ 392 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 393 enum pci_mmap_state mmap_state, 394 int write_combine) 395 { 396 int ret; 397 398 ret = __pci_mmap_make_offset(dev, vma, mmap_state); 399 if (ret < 0) 400 return ret; 401 402 __pci_mmap_set_flags(dev, vma, mmap_state); 403 __pci_mmap_set_pgprot(dev, vma, mmap_state, write_combine); 404 405 ret = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 406 vma->vm_end - vma->vm_start,vma->vm_page_prot); 407 408 return ret; 409 } 410 411 /* 412 * This probably belongs here rather than ioport.c because 413 * we do not want this crud linked into SBus kernels. 414 * Also, think for a moment about likes of floppy.c that 415 * include architecture specific parts. They may want to redefine ins/outs. 416 * 417 * We do not use horroble macroses here because we want to 418 * advance pointer by sizeof(size). 419 */ 420 void outsb(unsigned long addr, const void *src, unsigned long count) { 421 while (count) { 422 count -= 1; 423 writeb(*(const char *)src, addr); 424 src += 1; 425 addr += 1; 426 } 427 } 428 429 void outsw(unsigned long addr, const void *src, unsigned long count) { 430 while (count) { 431 count -= 2; 432 writew(*(const short *)src, addr); 433 src += 2; 434 addr += 2; 435 } 436 } 437 438 void outsl(unsigned long addr, const void *src, unsigned long count) { 439 while (count) { 440 count -= 4; 441 writel(*(const long *)src, addr); 442 src += 4; 443 addr += 4; 444 } 445 } 446 447 void insb(unsigned long addr, void *dst, unsigned long count) { 448 while (count) { 449 count -= 1; 450 *(unsigned char *)dst = readb(addr); 451 dst += 1; 452 addr += 1; 453 } 454 } 455 456 void insw(unsigned long addr, void *dst, unsigned long count) { 457 while (count) { 458 count -= 2; 459 *(unsigned short *)dst = readw(addr); 460 dst += 2; 461 addr += 2; 462 } 463 } 464 465 void insl(unsigned long addr, void *dst, unsigned long count) { 466 while (count) { 467 count -= 4; 468 /* 469 * XXX I am sure we are in for an unaligned trap here. 470 */ 471 *(unsigned long *)dst = readl(addr); 472 dst += 4; 473 addr += 4; 474 } 475 } 476 477 478 479