1/* 2 * arch/xtensa/kernel/head.S 3 * 4 * Xtensa Processor startup code. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 * 10 * Copyright (C) 2001 - 2005 Tensilica Inc. 11 * 12 * Chris Zankel <chris@zankel.net> 13 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca> 14 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> 15 * Kevin Chea 16 */ 17 18#include <asm/processor.h> 19#include <asm/page.h> 20#include <asm/cacheasm.h> 21 22/* 23 * This module contains the entry code for kernel images. It performs the 24 * minimal setup needed to call the generic C routines. 25 * 26 * Prerequisites: 27 * 28 * - The kernel image has been loaded to the actual address where it was 29 * compiled to. 30 * - a2 contains either 0 or a pointer to a list of boot parameters. 31 * (see setup.c for more details) 32 * 33 */ 34 35/* 36 * _start 37 * 38 * The bootloader passes a pointer to a list of boot parameters in a2. 39 */ 40 41 /* The first bytes of the kernel image must be an instruction, so we 42 * manually allocate and define the literal constant we need for a jx 43 * instruction. 44 */ 45 46 .section .head.text, "ax" 47 .globl _start 48_start: _j 2f 49 .align 4 501: .word _startup 512: l32r a0, 1b 52 jx a0 53 54 .text 55 .align 4 56_startup: 57 58 /* Disable interrupts and exceptions. */ 59 60 movi a0, LOCKLEVEL 61 wsr a0, PS 62 63 /* Preserve the pointer to the boot parameter list in EXCSAVE_1 */ 64 65 wsr a2, EXCSAVE_1 66 67 /* Start with a fresh windowbase and windowstart. */ 68 69 movi a1, 1 70 movi a0, 0 71 wsr a1, WINDOWSTART 72 wsr a0, WINDOWBASE 73 rsync 74 75 /* Set a0 to 0 for the remaining initialization. */ 76 77 movi a0, 0 78 79 /* Clear debugging registers. */ 80 81#if XCHAL_HAVE_DEBUG 82 wsr a0, IBREAKENABLE 83 wsr a0, ICOUNT 84 movi a1, 15 85 wsr a0, ICOUNTLEVEL 86 87 .set _index, 0 88 .rept XCHAL_NUM_DBREAK - 1 89 wsr a0, DBREAKC + _index 90 .set _index, _index + 1 91 .endr 92#endif 93 94 /* Clear CCOUNT (not really necessary, but nice) */ 95 96 wsr a0, CCOUNT # not really necessary, but nice 97 98 /* Disable zero-loops. */ 99 100#if XCHAL_HAVE_LOOPS 101 wsr a0, LCOUNT 102#endif 103 104 /* Disable all timers. */ 105 106 .set _index, 0 107 .rept XCHAL_NUM_TIMERS - 1 108 wsr a0, CCOMPARE + _index 109 .set _index, _index + 1 110 .endr 111 112 /* Interrupt initialization. */ 113 114 movi a2, XCHAL_INTTYPE_MASK_SOFTWARE | XCHAL_INTTYPE_MASK_EXTERN_EDGE 115 wsr a0, INTENABLE 116 wsr a2, INTCLEAR 117 118 /* Disable coprocessors. */ 119 120#if XCHAL_CP_NUM > 0 121 wsr a0, CPENABLE 122#endif 123 124 /* Set PS.INTLEVEL=1, PS.WOE=0, kernel stack, PS.EXCM=0 125 * 126 * Note: PS.EXCM must be cleared before using any loop 127 * instructions; otherwise, they are silently disabled, and 128 * at most one iteration of the loop is executed. 129 */ 130 131 movi a1, 1 132 wsr a1, PS 133 rsync 134 135 /* Initialize the caches. 136 * a2, a3 are just working registers (clobbered). 137 */ 138 139#if XCHAL_DCACHE_LINE_LOCKABLE 140 ___unlock_dcache_all a2 a3 141#endif 142 143#if XCHAL_ICACHE_LINE_LOCKABLE 144 ___unlock_icache_all a2 a3 145#endif 146 147 ___invalidate_dcache_all a2 a3 148 ___invalidate_icache_all a2 a3 149 150 isync 151 152 /* Unpack data sections 153 * 154 * The linker script used to build the Linux kernel image 155 * creates a table located at __boot_reloc_table_start 156 * that contans the information what data needs to be unpacked. 157 * 158 * Uses a2-a7. 159 */ 160 161 movi a2, __boot_reloc_table_start 162 movi a3, __boot_reloc_table_end 163 1641: beq a2, a3, 3f # no more entries? 165 l32i a4, a2, 0 # start destination (in RAM) 166 l32i a5, a2, 4 # end desination (in RAM) 167 l32i a6, a2, 8 # start source (in ROM) 168 addi a2, a2, 12 # next entry 169 beq a4, a5, 1b # skip, empty entry 170 beq a4, a6, 1b # skip, source and dest. are the same 171 1722: l32i a7, a6, 0 # load word 173 addi a6, a6, 4 174 s32i a7, a4, 0 # store word 175 addi a4, a4, 4 176 bltu a4, a5, 2b 177 j 1b 178 1793: 180 /* All code and initialized data segments have been copied. 181 * Now clear the BSS segment. 182 */ 183 184 movi a2, _bss_start # start of BSS 185 movi a3, _bss_end # end of BSS 186 187 __loopt a2, a3, a4, 2 188 s32i a0, a2, 0 189 __endla a2, a4, 4 190 191#if XCHAL_DCACHE_IS_WRITEBACK 192 193 /* After unpacking, flush the writeback cache to memory so the 194 * instructions/data are available. 195 */ 196 197 ___flush_dcache_all a2 a3 198#endif 199 200 /* Setup stack and enable window exceptions (keep irqs disabled) */ 201 202 movi a1, init_thread_union 203 addi a1, a1, KERNEL_STACK_SIZE 204 205 movi a2, 0x00040001 # WOE=1, INTLEVEL=1, UM=0 206 wsr a2, PS # (enable reg-windows; progmode stack) 207 rsync 208 209 /* Set up EXCSAVE[DEBUGLEVEL] to point to the Debug Exception Handler.*/ 210 211 movi a2, debug_exception 212 wsr a2, EXCSAVE + XCHAL_DEBUGLEVEL 213 214 /* Set up EXCSAVE[1] to point to the exc_table. */ 215 216 movi a6, exc_table 217 xsr a6, EXCSAVE_1 218 219 /* init_arch kick-starts the linux kernel */ 220 221 movi a4, init_arch 222 callx4 a4 223 224 movi a4, start_kernel 225 callx4 a4 226 227should_never_return: 228 j should_never_return 229 230 /* Define some common data structures here. We define them 231 * here in this assembly file due to their unusual alignment 232 * requirements. 233 */ 234 235 .comm swapper_pg_dir,PAGE_SIZE,PAGE_SIZE 236 .comm empty_bad_page_table,PAGE_SIZE,PAGE_SIZE 237 .comm empty_bad_page,PAGE_SIZE,PAGE_SIZE 238 .comm empty_zero_page,PAGE_SIZE,PAGE_SIZE 239 240