1 /* 2 * include/asm-xtensa/atomic.h 3 * 4 * Atomic operations that C can't guarantee us. Useful for resource counting.. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 * 10 * Copyright (C) 2001 - 2008 Tensilica Inc. 11 */ 12 13 #ifndef _XTENSA_ATOMIC_H 14 #define _XTENSA_ATOMIC_H 15 16 #include <linux/stringify.h> 17 #include <linux/types.h> 18 19 #ifdef __KERNEL__ 20 #include <asm/processor.h> 21 #include <asm/cmpxchg.h> 22 #include <asm/barrier.h> 23 24 #define ATOMIC_INIT(i) { (i) } 25 26 /* 27 * This Xtensa implementation assumes that the right mechanism 28 * for exclusion is for locking interrupts to level EXCM_LEVEL. 29 * 30 * Locking interrupts looks like this: 31 * 32 * rsil a15, LOCKLEVEL 33 * <code> 34 * wsr a15, PS 35 * rsync 36 * 37 * Note that a15 is used here because the register allocation 38 * done by the compiler is not guaranteed and a window overflow 39 * may not occur between the rsil and wsr instructions. By using 40 * a15 in the rsil, the machine is guaranteed to be in a state 41 * where no register reference will cause an overflow. 42 */ 43 44 /** 45 * atomic_read - read atomic variable 46 * @v: pointer of type atomic_t 47 * 48 * Atomically reads the value of @v. 49 */ 50 #define atomic_read(v) ACCESS_ONCE((v)->counter) 51 52 /** 53 * atomic_set - set atomic variable 54 * @v: pointer of type atomic_t 55 * @i: required value 56 * 57 * Atomically sets the value of @v to @i. 58 */ 59 #define atomic_set(v,i) ((v)->counter = (i)) 60 61 #if XCHAL_HAVE_S32C1I 62 #define ATOMIC_OP(op) \ 63 static inline void atomic_##op(int i, atomic_t * v) \ 64 { \ 65 unsigned long tmp; \ 66 int result; \ 67 \ 68 __asm__ __volatile__( \ 69 "1: l32i %1, %3, 0\n" \ 70 " wsr %1, scompare1\n" \ 71 " " #op " %0, %1, %2\n" \ 72 " s32c1i %0, %3, 0\n" \ 73 " bne %0, %1, 1b\n" \ 74 : "=&a" (result), "=&a" (tmp) \ 75 : "a" (i), "a" (v) \ 76 : "memory" \ 77 ); \ 78 } \ 79 80 #define ATOMIC_OP_RETURN(op) \ 81 static inline int atomic_##op##_return(int i, atomic_t * v) \ 82 { \ 83 unsigned long tmp; \ 84 int result; \ 85 \ 86 __asm__ __volatile__( \ 87 "1: l32i %1, %3, 0\n" \ 88 " wsr %1, scompare1\n" \ 89 " " #op " %0, %1, %2\n" \ 90 " s32c1i %0, %3, 0\n" \ 91 " bne %0, %1, 1b\n" \ 92 " " #op " %0, %0, %2\n" \ 93 : "=&a" (result), "=&a" (tmp) \ 94 : "a" (i), "a" (v) \ 95 : "memory" \ 96 ); \ 97 \ 98 return result; \ 99 } 100 101 #else /* XCHAL_HAVE_S32C1I */ 102 103 #define ATOMIC_OP(op) \ 104 static inline void atomic_##op(int i, atomic_t * v) \ 105 { \ 106 unsigned int vval; \ 107 \ 108 __asm__ __volatile__( \ 109 " rsil a15, "__stringify(LOCKLEVEL)"\n"\ 110 " l32i %0, %2, 0\n" \ 111 " " #op " %0, %0, %1\n" \ 112 " s32i %0, %2, 0\n" \ 113 " wsr a15, ps\n" \ 114 " rsync\n" \ 115 : "=&a" (vval) \ 116 : "a" (i), "a" (v) \ 117 : "a15", "memory" \ 118 ); \ 119 } \ 120 121 #define ATOMIC_OP_RETURN(op) \ 122 static inline int atomic_##op##_return(int i, atomic_t * v) \ 123 { \ 124 unsigned int vval; \ 125 \ 126 __asm__ __volatile__( \ 127 " rsil a15,"__stringify(LOCKLEVEL)"\n" \ 128 " l32i %0, %2, 0\n" \ 129 " " #op " %0, %0, %1\n" \ 130 " s32i %0, %2, 0\n" \ 131 " wsr a15, ps\n" \ 132 " rsync\n" \ 133 : "=&a" (vval) \ 134 : "a" (i), "a" (v) \ 135 : "a15", "memory" \ 136 ); \ 137 \ 138 return vval; \ 139 } 140 141 #endif /* XCHAL_HAVE_S32C1I */ 142 143 #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) 144 145 ATOMIC_OPS(add) 146 ATOMIC_OPS(sub) 147 148 #undef ATOMIC_OPS 149 #undef ATOMIC_OP_RETURN 150 #undef ATOMIC_OP 151 152 /** 153 * atomic_sub_and_test - subtract value from variable and test result 154 * @i: integer value to subtract 155 * @v: pointer of type atomic_t 156 * 157 * Atomically subtracts @i from @v and returns 158 * true if the result is zero, or false for all 159 * other cases. 160 */ 161 #define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0) 162 163 /** 164 * atomic_inc - increment atomic variable 165 * @v: pointer of type atomic_t 166 * 167 * Atomically increments @v by 1. 168 */ 169 #define atomic_inc(v) atomic_add(1,(v)) 170 171 /** 172 * atomic_inc - increment atomic variable 173 * @v: pointer of type atomic_t 174 * 175 * Atomically increments @v by 1. 176 */ 177 #define atomic_inc_return(v) atomic_add_return(1,(v)) 178 179 /** 180 * atomic_dec - decrement atomic variable 181 * @v: pointer of type atomic_t 182 * 183 * Atomically decrements @v by 1. 184 */ 185 #define atomic_dec(v) atomic_sub(1,(v)) 186 187 /** 188 * atomic_dec_return - decrement atomic variable 189 * @v: pointer of type atomic_t 190 * 191 * Atomically decrements @v by 1. 192 */ 193 #define atomic_dec_return(v) atomic_sub_return(1,(v)) 194 195 /** 196 * atomic_dec_and_test - decrement and test 197 * @v: pointer of type atomic_t 198 * 199 * Atomically decrements @v by 1 and 200 * returns true if the result is 0, or false for all other 201 * cases. 202 */ 203 #define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0) 204 205 /** 206 * atomic_inc_and_test - increment and test 207 * @v: pointer of type atomic_t 208 * 209 * Atomically increments @v by 1 210 * and returns true if the result is zero, or false for all 211 * other cases. 212 */ 213 #define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0) 214 215 /** 216 * atomic_add_negative - add and test if negative 217 * @v: pointer of type atomic_t 218 * @i: integer value to add 219 * 220 * Atomically adds @i to @v and returns true 221 * if the result is negative, or false when 222 * result is greater than or equal to zero. 223 */ 224 #define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) 225 226 #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) 227 #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) 228 229 /** 230 * __atomic_add_unless - add unless the number is a given value 231 * @v: pointer of type atomic_t 232 * @a: the amount to add to v... 233 * @u: ...unless v is equal to u. 234 * 235 * Atomically adds @a to @v, so long as it was not @u. 236 * Returns the old value of @v. 237 */ 238 static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) 239 { 240 int c, old; 241 c = atomic_read(v); 242 for (;;) { 243 if (unlikely(c == (u))) 244 break; 245 old = atomic_cmpxchg((v), c, c + (a)); 246 if (likely(old == c)) 247 break; 248 c = old; 249 } 250 return c; 251 } 252 253 254 static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) 255 { 256 #if XCHAL_HAVE_S32C1I 257 unsigned long tmp; 258 int result; 259 260 __asm__ __volatile__( 261 "1: l32i %1, %3, 0\n" 262 " wsr %1, scompare1\n" 263 " and %0, %1, %2\n" 264 " s32c1i %0, %3, 0\n" 265 " bne %0, %1, 1b\n" 266 : "=&a" (result), "=&a" (tmp) 267 : "a" (~mask), "a" (v) 268 : "memory" 269 ); 270 #else 271 unsigned int all_f = -1; 272 unsigned int vval; 273 274 __asm__ __volatile__( 275 " rsil a15,"__stringify(LOCKLEVEL)"\n" 276 " l32i %0, %2, 0\n" 277 " xor %1, %4, %3\n" 278 " and %0, %0, %4\n" 279 " s32i %0, %2, 0\n" 280 " wsr a15, ps\n" 281 " rsync\n" 282 : "=&a" (vval), "=a" (mask) 283 : "a" (v), "a" (all_f), "1" (mask) 284 : "a15", "memory" 285 ); 286 #endif 287 } 288 289 static inline void atomic_set_mask(unsigned int mask, atomic_t *v) 290 { 291 #if XCHAL_HAVE_S32C1I 292 unsigned long tmp; 293 int result; 294 295 __asm__ __volatile__( 296 "1: l32i %1, %3, 0\n" 297 " wsr %1, scompare1\n" 298 " or %0, %1, %2\n" 299 " s32c1i %0, %3, 0\n" 300 " bne %0, %1, 1b\n" 301 : "=&a" (result), "=&a" (tmp) 302 : "a" (mask), "a" (v) 303 : "memory" 304 ); 305 #else 306 unsigned int vval; 307 308 __asm__ __volatile__( 309 " rsil a15,"__stringify(LOCKLEVEL)"\n" 310 " l32i %0, %2, 0\n" 311 " or %0, %0, %1\n" 312 " s32i %0, %2, 0\n" 313 " wsr a15, ps\n" 314 " rsync\n" 315 : "=&a" (vval) 316 : "a" (mask), "a" (v) 317 : "a15", "memory" 318 ); 319 #endif 320 } 321 322 #endif /* __KERNEL__ */ 323 324 #endif /* _XTENSA_ATOMIC_H */ 325