1# SPDX-License-Identifier: GPL-2.0 2config XTENSA 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_BINFMT_FLAT if !MMU 6 select ARCH_HAS_DMA_PREP_COHERENT if MMU 7 select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU 8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU 9 select ARCH_HAS_DMA_SET_UNCACHED if MMU 10 select ARCH_USE_QUEUED_RWLOCKS 11 select ARCH_USE_QUEUED_SPINLOCKS 12 select ARCH_WANT_FRAME_POINTERS 13 select ARCH_WANT_IPC_PARSE_VERSION 14 select BUILDTIME_TABLE_SORT 15 select CLONE_BACKWARDS 16 select COMMON_CLK 17 select DMA_REMAP if MMU 18 select GENERIC_ATOMIC64 19 select GENERIC_IRQ_SHOW 20 select GENERIC_PCI_IOMAP 21 select GENERIC_SCHED_CLOCK 22 select GENERIC_STRNCPY_FROM_USER if KASAN 23 select HAVE_ARCH_AUDITSYSCALL 24 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 25 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL 26 select HAVE_ARCH_SECCOMP_FILTER 27 select HAVE_ARCH_TRACEHOOK 28 select HAVE_DEBUG_KMEMLEAK 29 select HAVE_DMA_CONTIGUOUS 30 select HAVE_EXIT_THREAD 31 select HAVE_FUNCTION_TRACER 32 select HAVE_FUTEX_CMPXCHG if !MMU 33 select HAVE_HW_BREAKPOINT if PERF_EVENTS 34 select HAVE_IRQ_TIME_ACCOUNTING 35 select HAVE_OPROFILE 36 select HAVE_PCI 37 select HAVE_PERF_EVENTS 38 select HAVE_STACKPROTECTOR 39 select HAVE_SYSCALL_TRACEPOINTS 40 select IRQ_DOMAIN 41 select MODULES_USE_ELF_RELA 42 select PERF_USE_VMALLOC 43 select SET_FS 44 select VIRT_TO_BUS 45 help 46 Xtensa processors are 32-bit RISC machines designed by Tensilica 47 primarily for embedded systems. These processors are both 48 configurable and extensible. The Linux port to the Xtensa 49 architecture supports all processor configurations and extensions, 50 with reasonable minimum requirements. The Xtensa Linux project has 51 a home page at <http://www.linux-xtensa.org/>. 52 53config GENERIC_HWEIGHT 54 def_bool y 55 56config ARCH_HAS_ILOG2_U32 57 def_bool n 58 59config ARCH_HAS_ILOG2_U64 60 def_bool n 61 62config NO_IOPORT_MAP 63 def_bool n 64 65config HZ 66 int 67 default 100 68 69config LOCKDEP_SUPPORT 70 def_bool y 71 72config STACKTRACE_SUPPORT 73 def_bool y 74 75config TRACE_IRQFLAGS_SUPPORT 76 def_bool y 77 78config MMU 79 def_bool n 80 81config HAVE_XTENSA_GPIO32 82 def_bool n 83 84config KASAN_SHADOW_OFFSET 85 hex 86 default 0x6e400000 87 88menu "Processor type and features" 89 90choice 91 prompt "Xtensa Processor Configuration" 92 default XTENSA_VARIANT_FSF 93 94config XTENSA_VARIANT_FSF 95 bool "fsf - default (not generic) configuration" 96 select MMU 97 98config XTENSA_VARIANT_DC232B 99 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" 100 select MMU 101 select HAVE_XTENSA_GPIO32 102 help 103 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). 104 105config XTENSA_VARIANT_DC233C 106 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)" 107 select MMU 108 select HAVE_XTENSA_GPIO32 109 help 110 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE). 111 112config XTENSA_VARIANT_CUSTOM 113 bool "Custom Xtensa processor configuration" 114 select HAVE_XTENSA_GPIO32 115 help 116 Select this variant to use a custom Xtensa processor configuration. 117 You will be prompted for a processor variant CORENAME. 118endchoice 119 120config XTENSA_VARIANT_CUSTOM_NAME 121 string "Xtensa Processor Custom Core Variant Name" 122 depends on XTENSA_VARIANT_CUSTOM 123 help 124 Provide the name of a custom Xtensa processor variant. 125 This CORENAME selects arch/xtensa/variant/CORENAME. 126 Don't forget you have to select MMU if you have one. 127 128config XTENSA_VARIANT_NAME 129 string 130 default "dc232b" if XTENSA_VARIANT_DC232B 131 default "dc233c" if XTENSA_VARIANT_DC233C 132 default "fsf" if XTENSA_VARIANT_FSF 133 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM 134 135config XTENSA_VARIANT_MMU 136 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)" 137 depends on XTENSA_VARIANT_CUSTOM 138 default y 139 select MMU 140 help 141 Build a Conventional Kernel with full MMU support, 142 ie: it supports a TLB with auto-loading, page protection. 143 144config XTENSA_VARIANT_HAVE_PERF_EVENTS 145 bool "Core variant has Performance Monitor Module" 146 depends on XTENSA_VARIANT_CUSTOM 147 default n 148 help 149 Enable if core variant has Performance Monitor Module with 150 External Registers Interface. 151 152 If unsure, say N. 153 154config XTENSA_FAKE_NMI 155 bool "Treat PMM IRQ as NMI" 156 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS 157 default n 158 help 159 If PMM IRQ is the only IRQ at EXCM level it is safe to 160 treat it as NMI, which improves accuracy of profiling. 161 162 If there are other interrupts at or above PMM IRQ priority level 163 but not above the EXCM level, PMM IRQ still may be treated as NMI, 164 but only if these IRQs are not used. There will be a build warning 165 saying that this is not safe, and a bugcheck if one of these IRQs 166 actually fire. 167 168 If unsure, say N. 169 170config XTENSA_UNALIGNED_USER 171 bool "Unaligned memory access in user space" 172 help 173 The Xtensa architecture currently does not handle unaligned 174 memory accesses in hardware but through an exception handler. 175 Per default, unaligned memory accesses are disabled in user space. 176 177 Say Y here to enable unaligned memory access in user space. 178 179config HAVE_SMP 180 bool "System Supports SMP (MX)" 181 depends on XTENSA_VARIANT_CUSTOM 182 select XTENSA_MX 183 help 184 This option is used to indicate that the system-on-a-chip (SOC) 185 supports Multiprocessing. Multiprocessor support implemented above 186 the CPU core definition and currently needs to be selected manually. 187 188 Multiprocessor support is implemented with external cache and 189 interrupt controllers. 190 191 The MX interrupt distributer adds Interprocessor Interrupts 192 and causes the IRQ numbers to be increased by 4 for devices 193 like the open cores ethernet driver and the serial interface. 194 195 You still have to select "Enable SMP" to enable SMP on this SOC. 196 197config SMP 198 bool "Enable Symmetric multi-processing support" 199 depends on HAVE_SMP 200 select GENERIC_SMP_IDLE_THREAD 201 help 202 Enabled SMP Software; allows more than one CPU/CORE 203 to be activated during startup. 204 205config NR_CPUS 206 depends on SMP 207 int "Maximum number of CPUs (2-32)" 208 range 2 32 209 default "4" 210 211config HOTPLUG_CPU 212 bool "Enable CPU hotplug support" 213 depends on SMP 214 help 215 Say Y here to allow turning CPUs off and on. CPUs can be 216 controlled through /sys/devices/system/cpu. 217 218 Say N if you want to disable CPU hotplug. 219 220config FAST_SYSCALL_XTENSA 221 bool "Enable fast atomic syscalls" 222 default n 223 help 224 fast_syscall_xtensa is a syscall that can make atomic operations 225 on UP kernel when processor has no s32c1i support. 226 227 This syscall is deprecated. It may have issues when called with 228 invalid arguments. It is provided only for backwards compatibility. 229 Only enable it if your userspace software requires it. 230 231 If unsure, say N. 232 233config FAST_SYSCALL_SPILL_REGISTERS 234 bool "Enable spill registers syscall" 235 default n 236 help 237 fast_syscall_spill_registers is a syscall that spills all active 238 register windows of a calling userspace task onto its stack. 239 240 This syscall is deprecated. It may have issues when called with 241 invalid arguments. It is provided only for backwards compatibility. 242 Only enable it if your userspace software requires it. 243 244 If unsure, say N. 245 246config USER_ABI_CALL0 247 bool 248 249choice 250 prompt "Userspace ABI" 251 default USER_ABI_DEFAULT 252 help 253 Select supported userspace ABI. 254 255 If unsure, choose the default ABI. 256 257config USER_ABI_DEFAULT 258 bool "Default ABI only" 259 help 260 Assume default userspace ABI. For XEA2 cores it is windowed ABI. 261 call0 ABI binaries may be run on such kernel, but signal delivery 262 will not work correctly for them. 263 264config USER_ABI_CALL0_ONLY 265 bool "Call0 ABI only" 266 select USER_ABI_CALL0 267 help 268 Select this option to support only call0 ABI in userspace. 269 Windowed ABI binaries will crash with a segfault caused by 270 an illegal instruction exception on the first 'entry' opcode. 271 272 Choose this option if you're planning to run only user code 273 built with call0 ABI. 274 275config USER_ABI_CALL0_PROBE 276 bool "Support both windowed and call0 ABI by probing" 277 select USER_ABI_CALL0 278 help 279 Select this option to support both windowed and call0 userspace 280 ABIs. When enabled all processes are started with PS.WOE disabled 281 and a fast user exception handler for an illegal instruction is 282 used to turn on PS.WOE bit on the first 'entry' opcode executed by 283 the userspace. 284 285 This option should be enabled for the kernel that must support 286 both call0 and windowed ABIs in userspace at the same time. 287 288 Note that Xtensa ISA does not guarantee that entry opcode will 289 raise an illegal instruction exception on cores with XEA2 when 290 PS.WOE is disabled, check whether the target core supports it. 291 292endchoice 293 294endmenu 295 296config XTENSA_CALIBRATE_CCOUNT 297 def_bool n 298 help 299 On some platforms (XT2000, for example), the CPU clock rate can 300 vary. The frequency can be determined, however, by measuring 301 against a well known, fixed frequency, such as an UART oscillator. 302 303config SERIAL_CONSOLE 304 def_bool n 305 306config PLATFORM_HAVE_XIP 307 def_bool n 308 309menu "Platform options" 310 311choice 312 prompt "Xtensa System Type" 313 default XTENSA_PLATFORM_ISS 314 315config XTENSA_PLATFORM_ISS 316 bool "ISS" 317 select XTENSA_CALIBRATE_CCOUNT 318 select SERIAL_CONSOLE 319 help 320 ISS is an acronym for Tensilica's Instruction Set Simulator. 321 322config XTENSA_PLATFORM_XT2000 323 bool "XT2000" 324 select HAVE_IDE 325 help 326 XT2000 is the name of Tensilica's feature-rich emulation platform. 327 This hardware is capable of running a full Linux distribution. 328 329config XTENSA_PLATFORM_XTFPGA 330 bool "XTFPGA" 331 select ETHOC if ETHERNET 332 select PLATFORM_WANT_DEFAULT_MEM if !MMU 333 select SERIAL_CONSOLE 334 select XTENSA_CALIBRATE_CCOUNT 335 select PLATFORM_HAVE_XIP 336 help 337 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605). 338 This hardware is capable of running a full Linux distribution. 339 340endchoice 341 342config PLATFORM_NR_IRQS 343 int 344 default 3 if XTENSA_PLATFORM_XT2000 345 default 0 346 347config XTENSA_CPU_CLOCK 348 int "CPU clock rate [MHz]" 349 depends on !XTENSA_CALIBRATE_CCOUNT 350 default 16 351 352config GENERIC_CALIBRATE_DELAY 353 bool "Auto calibration of the BogoMIPS value" 354 help 355 The BogoMIPS value can easily be derived from the CPU frequency. 356 357config CMDLINE_BOOL 358 bool "Default bootloader kernel arguments" 359 360config CMDLINE 361 string "Initial kernel command string" 362 depends on CMDLINE_BOOL 363 default "console=ttyS0,38400 root=/dev/ram" 364 help 365 On some architectures (EBSA110 and CATS), there is currently no way 366 for the boot loader to pass arguments to the kernel. For these 367 architectures, you should supply some command-line options at build 368 time by entering them here. As a minimum, you should specify the 369 memory size and the root device (e.g., mem=64M root=/dev/nfs). 370 371config USE_OF 372 bool "Flattened Device Tree support" 373 select OF 374 select OF_EARLY_FLATTREE 375 help 376 Include support for flattened device tree machine descriptions. 377 378config BUILTIN_DTB_SOURCE 379 string "DTB to build into the kernel image" 380 depends on OF 381 382config PARSE_BOOTPARAM 383 bool "Parse bootparam block" 384 default y 385 help 386 Parse parameters passed to the kernel from the bootloader. It may 387 be disabled if the kernel is known to run without the bootloader. 388 389 If unsure, say Y. 390 391config BLK_DEV_SIMDISK 392 tristate "Host file-based simulated block device support" 393 default n 394 depends on XTENSA_PLATFORM_ISS && BLOCK 395 help 396 Create block devices that map to files in the host file system. 397 Device binding to host file may be changed at runtime via proc 398 interface provided the device is not in use. 399 400config BLK_DEV_SIMDISK_COUNT 401 int "Number of host file-based simulated block devices" 402 range 1 10 403 depends on BLK_DEV_SIMDISK 404 default 2 405 help 406 This is the default minimal number of created block devices. 407 Kernel/module parameter 'simdisk_count' may be used to change this 408 value at runtime. More file names (but no more than 10) may be 409 specified as parameters, simdisk_count grows accordingly. 410 411config SIMDISK0_FILENAME 412 string "Host filename for the first simulated device" 413 depends on BLK_DEV_SIMDISK = y 414 default "" 415 help 416 Attach a first simdisk to a host file. Conventionally, this file 417 contains a root file system. 418 419config SIMDISK1_FILENAME 420 string "Host filename for the second simulated device" 421 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1 422 default "" 423 help 424 Another simulated disk in a host file for a buildroot-independent 425 storage. 426 427config XTFPGA_LCD 428 bool "Enable XTFPGA LCD driver" 429 depends on XTENSA_PLATFORM_XTFPGA 430 default n 431 help 432 There's a 2x16 LCD on most of XTFPGA boards, kernel may output 433 progress messages there during bootup/shutdown. It may be useful 434 during board bringup. 435 436 If unsure, say N. 437 438config XTFPGA_LCD_BASE_ADDR 439 hex "XTFPGA LCD base address" 440 depends on XTFPGA_LCD 441 default "0x0d0c0000" 442 help 443 Base address of the LCD controller inside KIO region. 444 Different boards from XTFPGA family have LCD controller at different 445 addresses. Please consult prototyping user guide for your board for 446 the correct address. Wrong address here may lead to hardware lockup. 447 448config XTFPGA_LCD_8BIT_ACCESS 449 bool "Use 8-bit access to XTFPGA LCD" 450 depends on XTFPGA_LCD 451 default n 452 help 453 LCD may be connected with 4- or 8-bit interface, 8-bit access may 454 only be used with 8-bit interface. Please consult prototyping user 455 guide for your board for the correct interface width. 456 457comment "Kernel memory layout" 458 459config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 460 bool "Initialize Xtensa MMU inside the Linux kernel code" 461 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B 462 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM 463 help 464 Earlier version initialized the MMU in the exception vector 465 before jumping to _startup in head.S and had an advantage that 466 it was possible to place a software breakpoint at 'reset' and 467 then enter your normal kernel breakpoints once the MMU was mapped 468 to the kernel mappings (0XC0000000). 469 470 This unfortunately won't work for U-Boot and likely also wont 471 work for using KEXEC to have a hot kernel ready for doing a 472 KDUMP. 473 474 So now the MMU is initialized in head.S but it's necessary to 475 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup. 476 xt-gdb can't place a Software Breakpoint in the 0XD region prior 477 to mapping the MMU and after mapping even if the area of low memory 478 was mapped gdb wouldn't remove the breakpoint on hitting it as the 479 PC wouldn't match. Since Hardware Breakpoints are recommended for 480 Linux configurations it seems reasonable to just assume they exist 481 and leave this older mechanism for unfortunate souls that choose 482 not to follow Tensilica's recommendation. 483 484 Selecting this will cause U-Boot to set the KERNEL Load and Entry 485 address at 0x00003000 instead of the mapped std of 0xD0003000. 486 487 If in doubt, say Y. 488 489config XIP_KERNEL 490 bool "Kernel Execute-In-Place from ROM" 491 depends on PLATFORM_HAVE_XIP 492 help 493 Execute-In-Place allows the kernel to run from non-volatile storage 494 directly addressable by the CPU, such as NOR flash. This saves RAM 495 space since the text section of the kernel is not loaded from flash 496 to RAM. Read-write sections, such as the data section and stack, 497 are still copied to RAM. The XIP kernel is not compressed since 498 it has to run directly from flash, so it will take more space to 499 store it. The flash address used to link the kernel object files, 500 and for storing it, is configuration dependent. Therefore, if you 501 say Y here, you must know the proper physical address where to 502 store the kernel image depending on your own flash memory usage. 503 504 Also note that the make target becomes "make xipImage" rather than 505 "make Image" or "make uImage". The final kernel binary to put in 506 ROM memory will be arch/xtensa/boot/xipImage. 507 508 If unsure, say N. 509 510config MEMMAP_CACHEATTR 511 hex "Cache attributes for the memory address space" 512 depends on !MMU 513 default 0x22222222 514 help 515 These cache attributes are set up for noMMU systems. Each hex digit 516 specifies cache attributes for the corresponding 512MB memory 517 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, 518 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on. 519 520 Cache attribute values are specific for the MMU type. 521 For region protection MMUs: 522 1: WT cached, 523 2: cache bypass, 524 4: WB cached, 525 f: illegal. 526 For full MMU: 527 bit 0: executable, 528 bit 1: writable, 529 bits 2..3: 530 0: cache bypass, 531 1: WB cache, 532 2: WT cache, 533 3: special (c and e are illegal, f is reserved). 534 For MPU: 535 0: illegal, 536 1: WB cache, 537 2: WB, no-write-allocate cache, 538 3: WT cache, 539 4: cache bypass. 540 541config KSEG_PADDR 542 hex "Physical address of the KSEG mapping" 543 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU 544 default 0x00000000 545 help 546 This is the physical address where KSEG is mapped. Please refer to 547 the chosen KSEG layout help for the required address alignment. 548 Unpacked kernel image (including vectors) must be located completely 549 within KSEG. 550 Physical memory below this address is not available to linux. 551 552 If unsure, leave the default value here. 553 554config KERNEL_VIRTUAL_ADDRESS 555 hex "Kernel virtual address" 556 depends on MMU && XIP_KERNEL 557 default 0xd0003000 558 help 559 This is the virtual address where the XIP kernel is mapped. 560 XIP kernel may be mapped into KSEG or KIO region, virtual address 561 provided here must match kernel load address provided in 562 KERNEL_LOAD_ADDRESS. 563 564config KERNEL_LOAD_ADDRESS 565 hex "Kernel load address" 566 default 0x60003000 if !MMU 567 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 568 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 569 help 570 This is the address where the kernel is loaded. 571 It is virtual address for MMUv2 configurations and physical address 572 for all other configurations. 573 574 If unsure, leave the default value here. 575 576choice 577 prompt "Relocatable vectors location" 578 default XTENSA_VECTORS_IN_TEXT 579 help 580 Choose whether relocatable vectors are merged into the kernel .text 581 or placed separately at runtime. This option does not affect 582 configurations without VECBASE register where vectors are always 583 placed at their hardware-defined locations. 584 585config XTENSA_VECTORS_IN_TEXT 586 bool "Merge relocatable vectors into kernel text" 587 depends on !MTD_XIP 588 help 589 This option puts relocatable vectors into the kernel .text section 590 with proper alignment. 591 This is a safe choice for most configurations. 592 593config XTENSA_VECTORS_SEPARATE 594 bool "Put relocatable vectors at fixed address" 595 help 596 This option puts relocatable vectors at specific virtual address. 597 Vectors are merged with the .init data in the kernel image and 598 are copied into their designated location during kernel startup. 599 Use it to put vectors into IRAM or out of FLASH on kernels with 600 XIP-aware MTD support. 601 602endchoice 603 604config VECTORS_ADDR 605 hex "Kernel vectors virtual address" 606 default 0x00000000 607 depends on XTENSA_VECTORS_SEPARATE 608 help 609 This is the virtual address of the (relocatable) vectors base. 610 It must be within KSEG if MMU is used. 611 612config XIP_DATA_ADDR 613 hex "XIP kernel data virtual address" 614 depends on XIP_KERNEL 615 default 0x00000000 616 help 617 This is the virtual address where XIP kernel data is copied. 618 It must be within KSEG if MMU is used. 619 620config PLATFORM_WANT_DEFAULT_MEM 621 def_bool n 622 623config DEFAULT_MEM_START 624 hex 625 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM 626 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM 627 default 0x00000000 628 help 629 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET 630 in noMMU configurations. 631 632 If unsure, leave the default value here. 633 634choice 635 prompt "KSEG layout" 636 depends on MMU 637 default XTENSA_KSEG_MMU_V2 638 639config XTENSA_KSEG_MMU_V2 640 bool "MMUv2: 128MB cached + 128MB uncached" 641 help 642 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting 643 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000 644 without cache. 645 KSEG_PADDR must be aligned to 128MB. 646 647config XTENSA_KSEG_256M 648 bool "256MB cached + 256MB uncached" 649 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 650 help 651 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 652 with cache and to 0xc0000000 without cache. 653 KSEG_PADDR must be aligned to 256MB. 654 655config XTENSA_KSEG_512M 656 bool "512MB cached + 512MB uncached" 657 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 658 help 659 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 660 with cache and to 0xc0000000 without cache. 661 KSEG_PADDR must be aligned to 256MB. 662 663endchoice 664 665config HIGHMEM 666 bool "High Memory Support" 667 depends on MMU 668 select KMAP_LOCAL 669 help 670 Linux can use the full amount of RAM in the system by 671 default. However, the default MMUv2 setup only maps the 672 lowermost 128 MB of memory linearly to the areas starting 673 at 0xd0000000 (cached) and 0xd8000000 (uncached). 674 When there are more than 128 MB memory in the system not 675 all of it can be "permanently mapped" by the kernel. 676 The physical memory that's not permanently mapped is called 677 "high memory". 678 679 If you are compiling a kernel which will never run on a 680 machine with more than 128 MB total physical RAM, answer 681 N here. 682 683 If unsure, say Y. 684 685config FORCE_MAX_ZONEORDER 686 int "Maximum zone order" 687 default "11" 688 help 689 The kernel memory allocator divides physically contiguous memory 690 blocks into "zones", where each zone is a power of two number of 691 pages. This option selects the largest power of two that the kernel 692 keeps in the memory allocator. If you need to allocate very large 693 blocks of physically contiguous memory, then you may need to 694 increase this value. 695 696 This config option is actually maximum order plus one. For example, 697 a value of 11 means that the largest free memory block is 2^10 pages. 698 699endmenu 700 701menu "Power management options" 702 703source "kernel/power/Kconfig" 704 705endmenu 706