1# SPDX-License-Identifier: GPL-2.0 2config XTENSA 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_BINFMT_FLAT if !MMU 6 select ARCH_HAS_DMA_PREP_COHERENT if MMU 7 select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU 8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU 9 select ARCH_HAS_DMA_SET_UNCACHED if MMU 10 select ARCH_USE_QUEUED_RWLOCKS 11 select ARCH_USE_QUEUED_SPINLOCKS 12 select ARCH_WANT_FRAME_POINTERS 13 select ARCH_WANT_IPC_PARSE_VERSION 14 select BUILDTIME_TABLE_SORT 15 select CLONE_BACKWARDS 16 select COMMON_CLK 17 select DMA_REMAP if MMU 18 select GENERIC_ATOMIC64 19 select GENERIC_IRQ_SHOW 20 select GENERIC_PCI_IOMAP 21 select GENERIC_SCHED_CLOCK 22 select GENERIC_STRNCPY_FROM_USER if KASAN 23 select HAVE_ARCH_AUDITSYSCALL 24 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 25 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL 26 select HAVE_ARCH_SECCOMP_FILTER 27 select HAVE_ARCH_TRACEHOOK 28 select HAVE_DEBUG_KMEMLEAK 29 select HAVE_DMA_CONTIGUOUS 30 select HAVE_EXIT_THREAD 31 select HAVE_FUNCTION_TRACER 32 select HAVE_FUTEX_CMPXCHG if !MMU 33 select HAVE_HW_BREAKPOINT if PERF_EVENTS 34 select HAVE_IRQ_TIME_ACCOUNTING 35 select HAVE_PCI 36 select HAVE_PERF_EVENTS 37 select HAVE_STACKPROTECTOR 38 select HAVE_SYSCALL_TRACEPOINTS 39 select IRQ_DOMAIN 40 select MODULES_USE_ELF_RELA 41 select PERF_USE_VMALLOC 42 select SET_FS 43 select VIRT_TO_BUS 44 help 45 Xtensa processors are 32-bit RISC machines designed by Tensilica 46 primarily for embedded systems. These processors are both 47 configurable and extensible. The Linux port to the Xtensa 48 architecture supports all processor configurations and extensions, 49 with reasonable minimum requirements. The Xtensa Linux project has 50 a home page at <http://www.linux-xtensa.org/>. 51 52config GENERIC_HWEIGHT 53 def_bool y 54 55config ARCH_HAS_ILOG2_U32 56 def_bool n 57 58config ARCH_HAS_ILOG2_U64 59 def_bool n 60 61config NO_IOPORT_MAP 62 def_bool n 63 64config HZ 65 int 66 default 100 67 68config LOCKDEP_SUPPORT 69 def_bool y 70 71config STACKTRACE_SUPPORT 72 def_bool y 73 74config TRACE_IRQFLAGS_SUPPORT 75 def_bool y 76 77config MMU 78 def_bool n 79 80config HAVE_XTENSA_GPIO32 81 def_bool n 82 83config KASAN_SHADOW_OFFSET 84 hex 85 default 0x6e400000 86 87config CPU_BIG_ENDIAN 88 def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1) 89 90config CPU_LITTLE_ENDIAN 91 def_bool !CPU_BIG_ENDIAN 92 93menu "Processor type and features" 94 95choice 96 prompt "Xtensa Processor Configuration" 97 default XTENSA_VARIANT_FSF 98 99config XTENSA_VARIANT_FSF 100 bool "fsf - default (not generic) configuration" 101 select MMU 102 103config XTENSA_VARIANT_DC232B 104 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" 105 select MMU 106 select HAVE_XTENSA_GPIO32 107 help 108 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). 109 110config XTENSA_VARIANT_DC233C 111 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)" 112 select MMU 113 select HAVE_XTENSA_GPIO32 114 help 115 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE). 116 117config XTENSA_VARIANT_CUSTOM 118 bool "Custom Xtensa processor configuration" 119 select HAVE_XTENSA_GPIO32 120 help 121 Select this variant to use a custom Xtensa processor configuration. 122 You will be prompted for a processor variant CORENAME. 123endchoice 124 125config XTENSA_VARIANT_CUSTOM_NAME 126 string "Xtensa Processor Custom Core Variant Name" 127 depends on XTENSA_VARIANT_CUSTOM 128 help 129 Provide the name of a custom Xtensa processor variant. 130 This CORENAME selects arch/xtensa/variant/CORENAME. 131 Don't forget you have to select MMU if you have one. 132 133config XTENSA_VARIANT_NAME 134 string 135 default "dc232b" if XTENSA_VARIANT_DC232B 136 default "dc233c" if XTENSA_VARIANT_DC233C 137 default "fsf" if XTENSA_VARIANT_FSF 138 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM 139 140config XTENSA_VARIANT_MMU 141 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)" 142 depends on XTENSA_VARIANT_CUSTOM 143 default y 144 select MMU 145 help 146 Build a Conventional Kernel with full MMU support, 147 ie: it supports a TLB with auto-loading, page protection. 148 149config XTENSA_VARIANT_HAVE_PERF_EVENTS 150 bool "Core variant has Performance Monitor Module" 151 depends on XTENSA_VARIANT_CUSTOM 152 default n 153 help 154 Enable if core variant has Performance Monitor Module with 155 External Registers Interface. 156 157 If unsure, say N. 158 159config XTENSA_FAKE_NMI 160 bool "Treat PMM IRQ as NMI" 161 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS 162 default n 163 help 164 If PMM IRQ is the only IRQ at EXCM level it is safe to 165 treat it as NMI, which improves accuracy of profiling. 166 167 If there are other interrupts at or above PMM IRQ priority level 168 but not above the EXCM level, PMM IRQ still may be treated as NMI, 169 but only if these IRQs are not used. There will be a build warning 170 saying that this is not safe, and a bugcheck if one of these IRQs 171 actually fire. 172 173 If unsure, say N. 174 175config XTENSA_UNALIGNED_USER 176 bool "Unaligned memory access in user space" 177 help 178 The Xtensa architecture currently does not handle unaligned 179 memory accesses in hardware but through an exception handler. 180 Per default, unaligned memory accesses are disabled in user space. 181 182 Say Y here to enable unaligned memory access in user space. 183 184config HAVE_SMP 185 bool "System Supports SMP (MX)" 186 depends on XTENSA_VARIANT_CUSTOM 187 select XTENSA_MX 188 help 189 This option is used to indicate that the system-on-a-chip (SOC) 190 supports Multiprocessing. Multiprocessor support implemented above 191 the CPU core definition and currently needs to be selected manually. 192 193 Multiprocessor support is implemented with external cache and 194 interrupt controllers. 195 196 The MX interrupt distributer adds Interprocessor Interrupts 197 and causes the IRQ numbers to be increased by 4 for devices 198 like the open cores ethernet driver and the serial interface. 199 200 You still have to select "Enable SMP" to enable SMP on this SOC. 201 202config SMP 203 bool "Enable Symmetric multi-processing support" 204 depends on HAVE_SMP 205 select GENERIC_SMP_IDLE_THREAD 206 help 207 Enabled SMP Software; allows more than one CPU/CORE 208 to be activated during startup. 209 210config NR_CPUS 211 depends on SMP 212 int "Maximum number of CPUs (2-32)" 213 range 2 32 214 default "4" 215 216config HOTPLUG_CPU 217 bool "Enable CPU hotplug support" 218 depends on SMP 219 help 220 Say Y here to allow turning CPUs off and on. CPUs can be 221 controlled through /sys/devices/system/cpu. 222 223 Say N if you want to disable CPU hotplug. 224 225config FAST_SYSCALL_XTENSA 226 bool "Enable fast atomic syscalls" 227 default n 228 help 229 fast_syscall_xtensa is a syscall that can make atomic operations 230 on UP kernel when processor has no s32c1i support. 231 232 This syscall is deprecated. It may have issues when called with 233 invalid arguments. It is provided only for backwards compatibility. 234 Only enable it if your userspace software requires it. 235 236 If unsure, say N. 237 238config FAST_SYSCALL_SPILL_REGISTERS 239 bool "Enable spill registers syscall" 240 default n 241 help 242 fast_syscall_spill_registers is a syscall that spills all active 243 register windows of a calling userspace task onto its stack. 244 245 This syscall is deprecated. It may have issues when called with 246 invalid arguments. It is provided only for backwards compatibility. 247 Only enable it if your userspace software requires it. 248 249 If unsure, say N. 250 251config USER_ABI_CALL0 252 bool 253 254choice 255 prompt "Userspace ABI" 256 default USER_ABI_DEFAULT 257 help 258 Select supported userspace ABI. 259 260 If unsure, choose the default ABI. 261 262config USER_ABI_DEFAULT 263 bool "Default ABI only" 264 help 265 Assume default userspace ABI. For XEA2 cores it is windowed ABI. 266 call0 ABI binaries may be run on such kernel, but signal delivery 267 will not work correctly for them. 268 269config USER_ABI_CALL0_ONLY 270 bool "Call0 ABI only" 271 select USER_ABI_CALL0 272 help 273 Select this option to support only call0 ABI in userspace. 274 Windowed ABI binaries will crash with a segfault caused by 275 an illegal instruction exception on the first 'entry' opcode. 276 277 Choose this option if you're planning to run only user code 278 built with call0 ABI. 279 280config USER_ABI_CALL0_PROBE 281 bool "Support both windowed and call0 ABI by probing" 282 select USER_ABI_CALL0 283 help 284 Select this option to support both windowed and call0 userspace 285 ABIs. When enabled all processes are started with PS.WOE disabled 286 and a fast user exception handler for an illegal instruction is 287 used to turn on PS.WOE bit on the first 'entry' opcode executed by 288 the userspace. 289 290 This option should be enabled for the kernel that must support 291 both call0 and windowed ABIs in userspace at the same time. 292 293 Note that Xtensa ISA does not guarantee that entry opcode will 294 raise an illegal instruction exception on cores with XEA2 when 295 PS.WOE is disabled, check whether the target core supports it. 296 297endchoice 298 299endmenu 300 301config XTENSA_CALIBRATE_CCOUNT 302 def_bool n 303 help 304 On some platforms (XT2000, for example), the CPU clock rate can 305 vary. The frequency can be determined, however, by measuring 306 against a well known, fixed frequency, such as an UART oscillator. 307 308config SERIAL_CONSOLE 309 def_bool n 310 311config PLATFORM_HAVE_XIP 312 def_bool n 313 314menu "Platform options" 315 316choice 317 prompt "Xtensa System Type" 318 default XTENSA_PLATFORM_ISS 319 320config XTENSA_PLATFORM_ISS 321 bool "ISS" 322 select XTENSA_CALIBRATE_CCOUNT 323 select SERIAL_CONSOLE 324 help 325 ISS is an acronym for Tensilica's Instruction Set Simulator. 326 327config XTENSA_PLATFORM_XT2000 328 bool "XT2000" 329 select HAVE_IDE 330 help 331 XT2000 is the name of Tensilica's feature-rich emulation platform. 332 This hardware is capable of running a full Linux distribution. 333 334config XTENSA_PLATFORM_XTFPGA 335 bool "XTFPGA" 336 select ETHOC if ETHERNET 337 select PLATFORM_WANT_DEFAULT_MEM if !MMU 338 select SERIAL_CONSOLE 339 select XTENSA_CALIBRATE_CCOUNT 340 select PLATFORM_HAVE_XIP 341 help 342 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605). 343 This hardware is capable of running a full Linux distribution. 344 345endchoice 346 347config PLATFORM_NR_IRQS 348 int 349 default 3 if XTENSA_PLATFORM_XT2000 350 default 0 351 352config XTENSA_CPU_CLOCK 353 int "CPU clock rate [MHz]" 354 depends on !XTENSA_CALIBRATE_CCOUNT 355 default 16 356 357config GENERIC_CALIBRATE_DELAY 358 bool "Auto calibration of the BogoMIPS value" 359 help 360 The BogoMIPS value can easily be derived from the CPU frequency. 361 362config CMDLINE_BOOL 363 bool "Default bootloader kernel arguments" 364 365config CMDLINE 366 string "Initial kernel command string" 367 depends on CMDLINE_BOOL 368 default "console=ttyS0,38400 root=/dev/ram" 369 help 370 On some architectures (EBSA110 and CATS), there is currently no way 371 for the boot loader to pass arguments to the kernel. For these 372 architectures, you should supply some command-line options at build 373 time by entering them here. As a minimum, you should specify the 374 memory size and the root device (e.g., mem=64M root=/dev/nfs). 375 376config USE_OF 377 bool "Flattened Device Tree support" 378 select OF 379 select OF_EARLY_FLATTREE 380 help 381 Include support for flattened device tree machine descriptions. 382 383config BUILTIN_DTB_SOURCE 384 string "DTB to build into the kernel image" 385 depends on OF 386 387config PARSE_BOOTPARAM 388 bool "Parse bootparam block" 389 default y 390 help 391 Parse parameters passed to the kernel from the bootloader. It may 392 be disabled if the kernel is known to run without the bootloader. 393 394 If unsure, say Y. 395 396config BLK_DEV_SIMDISK 397 tristate "Host file-based simulated block device support" 398 default n 399 depends on XTENSA_PLATFORM_ISS && BLOCK 400 help 401 Create block devices that map to files in the host file system. 402 Device binding to host file may be changed at runtime via proc 403 interface provided the device is not in use. 404 405config BLK_DEV_SIMDISK_COUNT 406 int "Number of host file-based simulated block devices" 407 range 1 10 408 depends on BLK_DEV_SIMDISK 409 default 2 410 help 411 This is the default minimal number of created block devices. 412 Kernel/module parameter 'simdisk_count' may be used to change this 413 value at runtime. More file names (but no more than 10) may be 414 specified as parameters, simdisk_count grows accordingly. 415 416config SIMDISK0_FILENAME 417 string "Host filename for the first simulated device" 418 depends on BLK_DEV_SIMDISK = y 419 default "" 420 help 421 Attach a first simdisk to a host file. Conventionally, this file 422 contains a root file system. 423 424config SIMDISK1_FILENAME 425 string "Host filename for the second simulated device" 426 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1 427 default "" 428 help 429 Another simulated disk in a host file for a buildroot-independent 430 storage. 431 432config XTFPGA_LCD 433 bool "Enable XTFPGA LCD driver" 434 depends on XTENSA_PLATFORM_XTFPGA 435 default n 436 help 437 There's a 2x16 LCD on most of XTFPGA boards, kernel may output 438 progress messages there during bootup/shutdown. It may be useful 439 during board bringup. 440 441 If unsure, say N. 442 443config XTFPGA_LCD_BASE_ADDR 444 hex "XTFPGA LCD base address" 445 depends on XTFPGA_LCD 446 default "0x0d0c0000" 447 help 448 Base address of the LCD controller inside KIO region. 449 Different boards from XTFPGA family have LCD controller at different 450 addresses. Please consult prototyping user guide for your board for 451 the correct address. Wrong address here may lead to hardware lockup. 452 453config XTFPGA_LCD_8BIT_ACCESS 454 bool "Use 8-bit access to XTFPGA LCD" 455 depends on XTFPGA_LCD 456 default n 457 help 458 LCD may be connected with 4- or 8-bit interface, 8-bit access may 459 only be used with 8-bit interface. Please consult prototyping user 460 guide for your board for the correct interface width. 461 462comment "Kernel memory layout" 463 464config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 465 bool "Initialize Xtensa MMU inside the Linux kernel code" 466 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B 467 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM 468 help 469 Earlier version initialized the MMU in the exception vector 470 before jumping to _startup in head.S and had an advantage that 471 it was possible to place a software breakpoint at 'reset' and 472 then enter your normal kernel breakpoints once the MMU was mapped 473 to the kernel mappings (0XC0000000). 474 475 This unfortunately won't work for U-Boot and likely also won't 476 work for using KEXEC to have a hot kernel ready for doing a 477 KDUMP. 478 479 So now the MMU is initialized in head.S but it's necessary to 480 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup. 481 xt-gdb can't place a Software Breakpoint in the 0XD region prior 482 to mapping the MMU and after mapping even if the area of low memory 483 was mapped gdb wouldn't remove the breakpoint on hitting it as the 484 PC wouldn't match. Since Hardware Breakpoints are recommended for 485 Linux configurations it seems reasonable to just assume they exist 486 and leave this older mechanism for unfortunate souls that choose 487 not to follow Tensilica's recommendation. 488 489 Selecting this will cause U-Boot to set the KERNEL Load and Entry 490 address at 0x00003000 instead of the mapped std of 0xD0003000. 491 492 If in doubt, say Y. 493 494config XIP_KERNEL 495 bool "Kernel Execute-In-Place from ROM" 496 depends on PLATFORM_HAVE_XIP 497 help 498 Execute-In-Place allows the kernel to run from non-volatile storage 499 directly addressable by the CPU, such as NOR flash. This saves RAM 500 space since the text section of the kernel is not loaded from flash 501 to RAM. Read-write sections, such as the data section and stack, 502 are still copied to RAM. The XIP kernel is not compressed since 503 it has to run directly from flash, so it will take more space to 504 store it. The flash address used to link the kernel object files, 505 and for storing it, is configuration dependent. Therefore, if you 506 say Y here, you must know the proper physical address where to 507 store the kernel image depending on your own flash memory usage. 508 509 Also note that the make target becomes "make xipImage" rather than 510 "make Image" or "make uImage". The final kernel binary to put in 511 ROM memory will be arch/xtensa/boot/xipImage. 512 513 If unsure, say N. 514 515config MEMMAP_CACHEATTR 516 hex "Cache attributes for the memory address space" 517 depends on !MMU 518 default 0x22222222 519 help 520 These cache attributes are set up for noMMU systems. Each hex digit 521 specifies cache attributes for the corresponding 512MB memory 522 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, 523 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on. 524 525 Cache attribute values are specific for the MMU type. 526 For region protection MMUs: 527 1: WT cached, 528 2: cache bypass, 529 4: WB cached, 530 f: illegal. 531 For full MMU: 532 bit 0: executable, 533 bit 1: writable, 534 bits 2..3: 535 0: cache bypass, 536 1: WB cache, 537 2: WT cache, 538 3: special (c and e are illegal, f is reserved). 539 For MPU: 540 0: illegal, 541 1: WB cache, 542 2: WB, no-write-allocate cache, 543 3: WT cache, 544 4: cache bypass. 545 546config KSEG_PADDR 547 hex "Physical address of the KSEG mapping" 548 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU 549 default 0x00000000 550 help 551 This is the physical address where KSEG is mapped. Please refer to 552 the chosen KSEG layout help for the required address alignment. 553 Unpacked kernel image (including vectors) must be located completely 554 within KSEG. 555 Physical memory below this address is not available to linux. 556 557 If unsure, leave the default value here. 558 559config KERNEL_VIRTUAL_ADDRESS 560 hex "Kernel virtual address" 561 depends on MMU && XIP_KERNEL 562 default 0xd0003000 563 help 564 This is the virtual address where the XIP kernel is mapped. 565 XIP kernel may be mapped into KSEG or KIO region, virtual address 566 provided here must match kernel load address provided in 567 KERNEL_LOAD_ADDRESS. 568 569config KERNEL_LOAD_ADDRESS 570 hex "Kernel load address" 571 default 0x60003000 if !MMU 572 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 573 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 574 help 575 This is the address where the kernel is loaded. 576 It is virtual address for MMUv2 configurations and physical address 577 for all other configurations. 578 579 If unsure, leave the default value here. 580 581choice 582 prompt "Relocatable vectors location" 583 default XTENSA_VECTORS_IN_TEXT 584 help 585 Choose whether relocatable vectors are merged into the kernel .text 586 or placed separately at runtime. This option does not affect 587 configurations without VECBASE register where vectors are always 588 placed at their hardware-defined locations. 589 590config XTENSA_VECTORS_IN_TEXT 591 bool "Merge relocatable vectors into kernel text" 592 depends on !MTD_XIP 593 help 594 This option puts relocatable vectors into the kernel .text section 595 with proper alignment. 596 This is a safe choice for most configurations. 597 598config XTENSA_VECTORS_SEPARATE 599 bool "Put relocatable vectors at fixed address" 600 help 601 This option puts relocatable vectors at specific virtual address. 602 Vectors are merged with the .init data in the kernel image and 603 are copied into their designated location during kernel startup. 604 Use it to put vectors into IRAM or out of FLASH on kernels with 605 XIP-aware MTD support. 606 607endchoice 608 609config VECTORS_ADDR 610 hex "Kernel vectors virtual address" 611 default 0x00000000 612 depends on XTENSA_VECTORS_SEPARATE 613 help 614 This is the virtual address of the (relocatable) vectors base. 615 It must be within KSEG if MMU is used. 616 617config XIP_DATA_ADDR 618 hex "XIP kernel data virtual address" 619 depends on XIP_KERNEL 620 default 0x00000000 621 help 622 This is the virtual address where XIP kernel data is copied. 623 It must be within KSEG if MMU is used. 624 625config PLATFORM_WANT_DEFAULT_MEM 626 def_bool n 627 628config DEFAULT_MEM_START 629 hex 630 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM 631 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM 632 default 0x00000000 633 help 634 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET 635 in noMMU configurations. 636 637 If unsure, leave the default value here. 638 639choice 640 prompt "KSEG layout" 641 depends on MMU 642 default XTENSA_KSEG_MMU_V2 643 644config XTENSA_KSEG_MMU_V2 645 bool "MMUv2: 128MB cached + 128MB uncached" 646 help 647 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting 648 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000 649 without cache. 650 KSEG_PADDR must be aligned to 128MB. 651 652config XTENSA_KSEG_256M 653 bool "256MB cached + 256MB uncached" 654 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 655 help 656 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 657 with cache and to 0xc0000000 without cache. 658 KSEG_PADDR must be aligned to 256MB. 659 660config XTENSA_KSEG_512M 661 bool "512MB cached + 512MB uncached" 662 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 663 help 664 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 665 with cache and to 0xc0000000 without cache. 666 KSEG_PADDR must be aligned to 256MB. 667 668endchoice 669 670config HIGHMEM 671 bool "High Memory Support" 672 depends on MMU 673 select KMAP_LOCAL 674 help 675 Linux can use the full amount of RAM in the system by 676 default. However, the default MMUv2 setup only maps the 677 lowermost 128 MB of memory linearly to the areas starting 678 at 0xd0000000 (cached) and 0xd8000000 (uncached). 679 When there are more than 128 MB memory in the system not 680 all of it can be "permanently mapped" by the kernel. 681 The physical memory that's not permanently mapped is called 682 "high memory". 683 684 If you are compiling a kernel which will never run on a 685 machine with more than 128 MB total physical RAM, answer 686 N here. 687 688 If unsure, say Y. 689 690config FORCE_MAX_ZONEORDER 691 int "Maximum zone order" 692 default "11" 693 help 694 The kernel memory allocator divides physically contiguous memory 695 blocks into "zones", where each zone is a power of two number of 696 pages. This option selects the largest power of two that the kernel 697 keeps in the memory allocator. If you need to allocate very large 698 blocks of physically contiguous memory, then you may need to 699 increase this value. 700 701 This config option is actually maximum order plus one. For example, 702 a value of 11 means that the largest free memory block is 2^10 pages. 703 704endmenu 705 706menu "Power management options" 707 708source "kernel/power/Kconfig" 709 710endmenu 711