1# SPDX-License-Identifier: GPL-2.0 2config ZONE_DMA 3 def_bool y 4 5config XTENSA 6 def_bool y 7 select ARCH_NO_COHERENT_DMA_MMAP if !MMU 8 select ARCH_WANT_FRAME_POINTERS 9 select ARCH_WANT_IPC_PARSE_VERSION 10 select BUILDTIME_EXTABLE_SORT 11 select CLONE_BACKWARDS 12 select COMMON_CLK 13 select GENERIC_ATOMIC64 14 select GENERIC_CLOCKEVENTS 15 select GENERIC_IRQ_SHOW 16 select GENERIC_PCI_IOMAP 17 select GENERIC_SCHED_CLOCK 18 select GENERIC_STRNCPY_FROM_USER if KASAN 19 select HAVE_ARCH_KASAN if MMU 20 select HAVE_DEBUG_KMEMLEAK 21 select HAVE_DMA_CONTIGUOUS 22 select HAVE_EXIT_THREAD 23 select HAVE_FUNCTION_TRACER 24 select HAVE_FUTEX_CMPXCHG if !MMU 25 select HAVE_HW_BREAKPOINT if PERF_EVENTS 26 select HAVE_IRQ_TIME_ACCOUNTING 27 select HAVE_MEMBLOCK 28 select HAVE_OPROFILE 29 select HAVE_PERF_EVENTS 30 select HAVE_STACKPROTECTOR 31 select IRQ_DOMAIN 32 select MODULES_USE_ELF_RELA 33 select NO_BOOTMEM 34 select PERF_USE_VMALLOC 35 select VIRT_TO_BUS 36 help 37 Xtensa processors are 32-bit RISC machines designed by Tensilica 38 primarily for embedded systems. These processors are both 39 configurable and extensible. The Linux port to the Xtensa 40 architecture supports all processor configurations and extensions, 41 with reasonable minimum requirements. The Xtensa Linux project has 42 a home page at <http://www.linux-xtensa.org/>. 43 44config RWSEM_XCHGADD_ALGORITHM 45 def_bool y 46 47config GENERIC_HWEIGHT 48 def_bool y 49 50config ARCH_HAS_ILOG2_U32 51 def_bool n 52 53config ARCH_HAS_ILOG2_U64 54 def_bool n 55 56config NO_IOPORT_MAP 57 def_bool n 58 59config HZ 60 int 61 default 100 62 63source "init/Kconfig" 64source "kernel/Kconfig.freezer" 65 66config LOCKDEP_SUPPORT 67 def_bool y 68 69config STACKTRACE_SUPPORT 70 def_bool y 71 72config TRACE_IRQFLAGS_SUPPORT 73 def_bool y 74 75config MMU 76 def_bool n 77 78config HAVE_XTENSA_GPIO32 79 def_bool n 80 81config KASAN_SHADOW_OFFSET 82 hex 83 default 0x6e400000 84 85menu "Processor type and features" 86 87choice 88 prompt "Xtensa Processor Configuration" 89 default XTENSA_VARIANT_FSF 90 91config XTENSA_VARIANT_FSF 92 bool "fsf - default (not generic) configuration" 93 select MMU 94 95config XTENSA_VARIANT_DC232B 96 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" 97 select MMU 98 select HAVE_XTENSA_GPIO32 99 help 100 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). 101 102config XTENSA_VARIANT_DC233C 103 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)" 104 select MMU 105 select HAVE_XTENSA_GPIO32 106 help 107 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE). 108 109config XTENSA_VARIANT_CUSTOM 110 bool "Custom Xtensa processor configuration" 111 select HAVE_XTENSA_GPIO32 112 help 113 Select this variant to use a custom Xtensa processor configuration. 114 You will be prompted for a processor variant CORENAME. 115endchoice 116 117config XTENSA_VARIANT_CUSTOM_NAME 118 string "Xtensa Processor Custom Core Variant Name" 119 depends on XTENSA_VARIANT_CUSTOM 120 help 121 Provide the name of a custom Xtensa processor variant. 122 This CORENAME selects arch/xtensa/variant/CORENAME. 123 Dont forget you have to select MMU if you have one. 124 125config XTENSA_VARIANT_NAME 126 string 127 default "dc232b" if XTENSA_VARIANT_DC232B 128 default "dc233c" if XTENSA_VARIANT_DC233C 129 default "fsf" if XTENSA_VARIANT_FSF 130 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM 131 132config XTENSA_VARIANT_MMU 133 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)" 134 depends on XTENSA_VARIANT_CUSTOM 135 default y 136 select MMU 137 help 138 Build a Conventional Kernel with full MMU support, 139 ie: it supports a TLB with auto-loading, page protection. 140 141config XTENSA_VARIANT_HAVE_PERF_EVENTS 142 bool "Core variant has Performance Monitor Module" 143 depends on XTENSA_VARIANT_CUSTOM 144 default n 145 help 146 Enable if core variant has Performance Monitor Module with 147 External Registers Interface. 148 149 If unsure, say N. 150 151config XTENSA_FAKE_NMI 152 bool "Treat PMM IRQ as NMI" 153 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS 154 default n 155 help 156 If PMM IRQ is the only IRQ at EXCM level it is safe to 157 treat it as NMI, which improves accuracy of profiling. 158 159 If there are other interrupts at or above PMM IRQ priority level 160 but not above the EXCM level, PMM IRQ still may be treated as NMI, 161 but only if these IRQs are not used. There will be a build warning 162 saying that this is not safe, and a bugcheck if one of these IRQs 163 actually fire. 164 165 If unsure, say N. 166 167config XTENSA_UNALIGNED_USER 168 bool "Unaligned memory access in use space" 169 help 170 The Xtensa architecture currently does not handle unaligned 171 memory accesses in hardware but through an exception handler. 172 Per default, unaligned memory accesses are disabled in user space. 173 174 Say Y here to enable unaligned memory access in user space. 175 176source "kernel/Kconfig.preempt" 177 178config HAVE_SMP 179 bool "System Supports SMP (MX)" 180 depends on XTENSA_VARIANT_CUSTOM 181 select XTENSA_MX 182 help 183 This option is use to indicate that the system-on-a-chip (SOC) 184 supports Multiprocessing. Multiprocessor support implemented above 185 the CPU core definition and currently needs to be selected manually. 186 187 Multiprocessor support in implemented with external cache and 188 interrupt controllers. 189 190 The MX interrupt distributer adds Interprocessor Interrupts 191 and causes the IRQ numbers to be increased by 4 for devices 192 like the open cores ethernet driver and the serial interface. 193 194 You still have to select "Enable SMP" to enable SMP on this SOC. 195 196config SMP 197 bool "Enable Symmetric multi-processing support" 198 depends on HAVE_SMP 199 select GENERIC_SMP_IDLE_THREAD 200 help 201 Enabled SMP Software; allows more than one CPU/CORE 202 to be activated during startup. 203 204config NR_CPUS 205 depends on SMP 206 int "Maximum number of CPUs (2-32)" 207 range 2 32 208 default "4" 209 210config HOTPLUG_CPU 211 bool "Enable CPU hotplug support" 212 depends on SMP 213 help 214 Say Y here to allow turning CPUs off and on. CPUs can be 215 controlled through /sys/devices/system/cpu. 216 217 Say N if you want to disable CPU hotplug. 218 219config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 220 bool "Initialize Xtensa MMU inside the Linux kernel code" 221 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B 222 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM 223 help 224 Earlier version initialized the MMU in the exception vector 225 before jumping to _startup in head.S and had an advantage that 226 it was possible to place a software breakpoint at 'reset' and 227 then enter your normal kernel breakpoints once the MMU was mapped 228 to the kernel mappings (0XC0000000). 229 230 This unfortunately won't work for U-Boot and likely also wont 231 work for using KEXEC to have a hot kernel ready for doing a 232 KDUMP. 233 234 So now the MMU is initialized in head.S but it's necessary to 235 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup. 236 xt-gdb can't place a Software Breakpoint in the 0XD region prior 237 to mapping the MMU and after mapping even if the area of low memory 238 was mapped gdb wouldn't remove the breakpoint on hitting it as the 239 PC wouldn't match. Since Hardware Breakpoints are recommended for 240 Linux configurations it seems reasonable to just assume they exist 241 and leave this older mechanism for unfortunate souls that choose 242 not to follow Tensilica's recommendation. 243 244 Selecting this will cause U-Boot to set the KERNEL Load and Entry 245 address at 0x00003000 instead of the mapped std of 0xD0003000. 246 247 If in doubt, say Y. 248 249config MEMMAP_CACHEATTR 250 hex "Cache attributes for the memory address space" 251 depends on !MMU 252 default 0x22222222 253 help 254 These cache attributes are set up for noMMU systems. Each hex digit 255 specifies cache attributes for the corresponding 512MB memory 256 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, 257 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on. 258 259 Cache attribute values are specific for the MMU type, so e.g. 260 for region protection MMUs: 2 is cache bypass, 4 is WB cached, 261 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable, 262 bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass, 263 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is 264 reserved). 265 266config KSEG_PADDR 267 hex "Physical address of the KSEG mapping" 268 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU 269 default 0x00000000 270 help 271 This is the physical address where KSEG is mapped. Please refer to 272 the chosen KSEG layout help for the required address alignment. 273 Unpacked kernel image (including vectors) must be located completely 274 within KSEG. 275 Physical memory below this address is not available to linux. 276 277 If unsure, leave the default value here. 278 279config KERNEL_LOAD_ADDRESS 280 hex "Kernel load address" 281 default 0x60003000 if !MMU 282 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 283 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 284 help 285 This is the address where the kernel is loaded. 286 It is virtual address for MMUv2 configurations and physical address 287 for all other configurations. 288 289 If unsure, leave the default value here. 290 291config VECTORS_OFFSET 292 hex "Kernel vectors offset" 293 default 0x00003000 294 help 295 This is the offset of the kernel image from the relocatable vectors 296 base. 297 298 If unsure, leave the default value here. 299 300choice 301 prompt "KSEG layout" 302 depends on MMU 303 default XTENSA_KSEG_MMU_V2 304 305config XTENSA_KSEG_MMU_V2 306 bool "MMUv2: 128MB cached + 128MB uncached" 307 help 308 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting 309 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000 310 without cache. 311 KSEG_PADDR must be aligned to 128MB. 312 313config XTENSA_KSEG_256M 314 bool "256MB cached + 256MB uncached" 315 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 316 help 317 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 318 with cache and to 0xc0000000 without cache. 319 KSEG_PADDR must be aligned to 256MB. 320 321config XTENSA_KSEG_512M 322 bool "512MB cached + 512MB uncached" 323 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 324 help 325 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 326 with cache and to 0xc0000000 without cache. 327 KSEG_PADDR must be aligned to 256MB. 328 329endchoice 330 331config HIGHMEM 332 bool "High Memory Support" 333 depends on MMU 334 help 335 Linux can use the full amount of RAM in the system by 336 default. However, the default MMUv2 setup only maps the 337 lowermost 128 MB of memory linearly to the areas starting 338 at 0xd0000000 (cached) and 0xd8000000 (uncached). 339 When there are more than 128 MB memory in the system not 340 all of it can be "permanently mapped" by the kernel. 341 The physical memory that's not permanently mapped is called 342 "high memory". 343 344 If you are compiling a kernel which will never run on a 345 machine with more than 128 MB total physical RAM, answer 346 N here. 347 348 If unsure, say Y. 349 350config FAST_SYSCALL_XTENSA 351 bool "Enable fast atomic syscalls" 352 default n 353 help 354 fast_syscall_xtensa is a syscall that can make atomic operations 355 on UP kernel when processor has no s32c1i support. 356 357 This syscall is deprecated. It may have issues when called with 358 invalid arguments. It is provided only for backwards compatibility. 359 Only enable it if your userspace software requires it. 360 361 If unsure, say N. 362 363config FAST_SYSCALL_SPILL_REGISTERS 364 bool "Enable spill registers syscall" 365 default n 366 help 367 fast_syscall_spill_registers is a syscall that spills all active 368 register windows of a calling userspace task onto its stack. 369 370 This syscall is deprecated. It may have issues when called with 371 invalid arguments. It is provided only for backwards compatibility. 372 Only enable it if your userspace software requires it. 373 374 If unsure, say N. 375 376endmenu 377 378config XTENSA_CALIBRATE_CCOUNT 379 def_bool n 380 help 381 On some platforms (XT2000, for example), the CPU clock rate can 382 vary. The frequency can be determined, however, by measuring 383 against a well known, fixed frequency, such as an UART oscillator. 384 385config SERIAL_CONSOLE 386 def_bool n 387 388menu "Bus options" 389 390config PCI 391 bool "PCI support" 392 default y 393 help 394 Find out whether you have a PCI motherboard. PCI is the name of a 395 bus system, i.e. the way the CPU talks to the other stuff inside 396 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 397 VESA. If you have PCI, say Y, otherwise N. 398 399source "drivers/pci/Kconfig" 400 401endmenu 402 403menu "Platform options" 404 405choice 406 prompt "Xtensa System Type" 407 default XTENSA_PLATFORM_ISS 408 409config XTENSA_PLATFORM_ISS 410 bool "ISS" 411 select XTENSA_CALIBRATE_CCOUNT 412 select SERIAL_CONSOLE 413 help 414 ISS is an acronym for Tensilica's Instruction Set Simulator. 415 416config XTENSA_PLATFORM_XT2000 417 bool "XT2000" 418 select HAVE_IDE 419 help 420 XT2000 is the name of Tensilica's feature-rich emulation platform. 421 This hardware is capable of running a full Linux distribution. 422 423config XTENSA_PLATFORM_XTFPGA 424 bool "XTFPGA" 425 select ETHOC if ETHERNET 426 select PLATFORM_WANT_DEFAULT_MEM if !MMU 427 select SERIAL_CONSOLE 428 select XTENSA_CALIBRATE_CCOUNT 429 help 430 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605). 431 This hardware is capable of running a full Linux distribution. 432 433endchoice 434 435config PLATFORM_NR_IRQS 436 int 437 default 3 if XTENSA_PLATFORM_XT2000 438 default 0 439 440config XTENSA_CPU_CLOCK 441 int "CPU clock rate [MHz]" 442 depends on !XTENSA_CALIBRATE_CCOUNT 443 default 16 444 445config GENERIC_CALIBRATE_DELAY 446 bool "Auto calibration of the BogoMIPS value" 447 help 448 The BogoMIPS value can easily be derived from the CPU frequency. 449 450config CMDLINE_BOOL 451 bool "Default bootloader kernel arguments" 452 453config CMDLINE 454 string "Initial kernel command string" 455 depends on CMDLINE_BOOL 456 default "console=ttyS0,38400 root=/dev/ram" 457 help 458 On some architectures (EBSA110 and CATS), there is currently no way 459 for the boot loader to pass arguments to the kernel. For these 460 architectures, you should supply some command-line options at build 461 time by entering them here. As a minimum, you should specify the 462 memory size and the root device (e.g., mem=64M root=/dev/nfs). 463 464config USE_OF 465 bool "Flattened Device Tree support" 466 select OF 467 select OF_EARLY_FLATTREE 468 select OF_RESERVED_MEM 469 help 470 Include support for flattened device tree machine descriptions. 471 472config BUILTIN_DTB 473 string "DTB to build into the kernel image" 474 depends on OF 475 476config PARSE_BOOTPARAM 477 bool "Parse bootparam block" 478 default y 479 help 480 Parse parameters passed to the kernel from the bootloader. It may 481 be disabled if the kernel is known to run without the bootloader. 482 483 If unsure, say Y. 484 485config BLK_DEV_SIMDISK 486 tristate "Host file-based simulated block device support" 487 default n 488 depends on XTENSA_PLATFORM_ISS && BLOCK 489 help 490 Create block devices that map to files in the host file system. 491 Device binding to host file may be changed at runtime via proc 492 interface provided the device is not in use. 493 494config BLK_DEV_SIMDISK_COUNT 495 int "Number of host file-based simulated block devices" 496 range 1 10 497 depends on BLK_DEV_SIMDISK 498 default 2 499 help 500 This is the default minimal number of created block devices. 501 Kernel/module parameter 'simdisk_count' may be used to change this 502 value at runtime. More file names (but no more than 10) may be 503 specified as parameters, simdisk_count grows accordingly. 504 505config SIMDISK0_FILENAME 506 string "Host filename for the first simulated device" 507 depends on BLK_DEV_SIMDISK = y 508 default "" 509 help 510 Attach a first simdisk to a host file. Conventionally, this file 511 contains a root file system. 512 513config SIMDISK1_FILENAME 514 string "Host filename for the second simulated device" 515 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1 516 default "" 517 help 518 Another simulated disk in a host file for a buildroot-independent 519 storage. 520 521source "mm/Kconfig" 522 523config FORCE_MAX_ZONEORDER 524 int "Maximum zone order" 525 default "11" 526 help 527 The kernel memory allocator divides physically contiguous memory 528 blocks into "zones", where each zone is a power of two number of 529 pages. This option selects the largest power of two that the kernel 530 keeps in the memory allocator. If you need to allocate very large 531 blocks of physically contiguous memory, then you may need to 532 increase this value. 533 534 This config option is actually maximum order plus one. For example, 535 a value of 11 means that the largest free memory block is 2^10 pages. 536 537source "drivers/pcmcia/Kconfig" 538 539config PLATFORM_WANT_DEFAULT_MEM 540 def_bool n 541 542config DEFAULT_MEM_START 543 hex 544 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM 545 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM 546 default 0x00000000 547 help 548 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET 549 in noMMU configurations. 550 551 If unsure, leave the default value here. 552 553config XTFPGA_LCD 554 bool "Enable XTFPGA LCD driver" 555 depends on XTENSA_PLATFORM_XTFPGA 556 default n 557 help 558 There's a 2x16 LCD on most of XTFPGA boards, kernel may output 559 progress messages there during bootup/shutdown. It may be useful 560 during board bringup. 561 562 If unsure, say N. 563 564config XTFPGA_LCD_BASE_ADDR 565 hex "XTFPGA LCD base address" 566 depends on XTFPGA_LCD 567 default "0x0d0c0000" 568 help 569 Base address of the LCD controller inside KIO region. 570 Different boards from XTFPGA family have LCD controller at different 571 addresses. Please consult prototyping user guide for your board for 572 the correct address. Wrong address here may lead to hardware lockup. 573 574config XTFPGA_LCD_8BIT_ACCESS 575 bool "Use 8-bit access to XTFPGA LCD" 576 depends on XTFPGA_LCD 577 default n 578 help 579 LCD may be connected with 4- or 8-bit interface, 8-bit access may 580 only be used with 8-bit interface. Please consult prototyping user 581 guide for your board for the correct interface width. 582 583endmenu 584 585menu "Executable file formats" 586 587source "fs/Kconfig.binfmt" 588 589endmenu 590 591menu "Power management options" 592 593source "kernel/power/Kconfig" 594 595endmenu 596 597source "net/Kconfig" 598 599source "drivers/Kconfig" 600 601source "fs/Kconfig" 602 603source "arch/xtensa/Kconfig.debug" 604 605source "security/Kconfig" 606 607source "crypto/Kconfig" 608 609source "lib/Kconfig" 610 611 612