xref: /linux/arch/xtensa/Kconfig (revision aea731c81f998af5e45654459bac24a1c808fb22)
1# SPDX-License-Identifier: GPL-2.0
2config ZONE_DMA
3	def_bool y
4
5config XTENSA
6	def_bool y
7	select ARCH_NO_COHERENT_DMA_MMAP if !MMU
8	select ARCH_WANT_FRAME_POINTERS
9	select ARCH_WANT_IPC_PARSE_VERSION
10	select BUILDTIME_EXTABLE_SORT
11	select CLONE_BACKWARDS
12	select COMMON_CLK
13	select GENERIC_ATOMIC64
14	select GENERIC_CLOCKEVENTS
15	select GENERIC_IRQ_SHOW
16	select GENERIC_PCI_IOMAP
17	select GENERIC_SCHED_CLOCK
18	select GENERIC_STRNCPY_FROM_USER if KASAN
19	select HAVE_ARCH_KASAN if MMU
20	select HAVE_DEBUG_KMEMLEAK
21	select HAVE_DMA_CONTIGUOUS
22	select HAVE_EXIT_THREAD
23	select HAVE_FUNCTION_TRACER
24	select HAVE_FUTEX_CMPXCHG if !MMU
25	select HAVE_HW_BREAKPOINT if PERF_EVENTS
26	select HAVE_IRQ_TIME_ACCOUNTING
27	select HAVE_MEMBLOCK
28	select HAVE_OPROFILE
29	select HAVE_PERF_EVENTS
30	select HAVE_STACKPROTECTOR
31	select IRQ_DOMAIN
32	select MODULES_USE_ELF_RELA
33	select NO_BOOTMEM
34	select PERF_USE_VMALLOC
35	select VIRT_TO_BUS
36	help
37	  Xtensa processors are 32-bit RISC machines designed by Tensilica
38	  primarily for embedded systems.  These processors are both
39	  configurable and extensible.  The Linux port to the Xtensa
40	  architecture supports all processor configurations and extensions,
41	  with reasonable minimum requirements.  The Xtensa Linux project has
42	  a home page at <http://www.linux-xtensa.org/>.
43
44config RWSEM_XCHGADD_ALGORITHM
45	def_bool y
46
47config GENERIC_HWEIGHT
48	def_bool y
49
50config ARCH_HAS_ILOG2_U32
51	def_bool n
52
53config ARCH_HAS_ILOG2_U64
54	def_bool n
55
56config NO_IOPORT_MAP
57	def_bool n
58
59config HZ
60	int
61	default 100
62
63source "init/Kconfig"
64source "kernel/Kconfig.freezer"
65
66config LOCKDEP_SUPPORT
67	def_bool y
68
69config STACKTRACE_SUPPORT
70	def_bool y
71
72config TRACE_IRQFLAGS_SUPPORT
73	def_bool y
74
75config MMU
76	def_bool n
77
78config VARIANT_IRQ_SWITCH
79	def_bool n
80
81config HAVE_XTENSA_GPIO32
82	def_bool n
83
84config KASAN_SHADOW_OFFSET
85	hex
86	default 0x6e400000
87
88menu "Processor type and features"
89
90choice
91	prompt "Xtensa Processor Configuration"
92	default XTENSA_VARIANT_FSF
93
94config XTENSA_VARIANT_FSF
95	bool "fsf - default (not generic) configuration"
96	select MMU
97
98config XTENSA_VARIANT_DC232B
99	bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
100	select MMU
101	select HAVE_XTENSA_GPIO32
102	help
103	  This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
104
105config XTENSA_VARIANT_DC233C
106	bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
107	select MMU
108	select HAVE_XTENSA_GPIO32
109	help
110	  This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
111
112config XTENSA_VARIANT_CUSTOM
113	bool "Custom Xtensa processor configuration"
114	select HAVE_XTENSA_GPIO32
115	help
116	  Select this variant to use a custom Xtensa processor configuration.
117	  You will be prompted for a processor variant CORENAME.
118endchoice
119
120config XTENSA_VARIANT_CUSTOM_NAME
121	string "Xtensa Processor Custom Core Variant Name"
122	depends on XTENSA_VARIANT_CUSTOM
123	help
124	  Provide the name of a custom Xtensa processor variant.
125	  This CORENAME selects arch/xtensa/variant/CORENAME.
126	  Dont forget you have to select MMU if you have one.
127
128config XTENSA_VARIANT_NAME
129	string
130	default "dc232b"			if XTENSA_VARIANT_DC232B
131	default "dc233c"			if XTENSA_VARIANT_DC233C
132	default "fsf"				if XTENSA_VARIANT_FSF
133	default XTENSA_VARIANT_CUSTOM_NAME	if XTENSA_VARIANT_CUSTOM
134
135config XTENSA_VARIANT_MMU
136	bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
137	depends on XTENSA_VARIANT_CUSTOM
138	default y
139	select MMU
140	help
141	  Build a Conventional Kernel with full MMU support,
142	  ie: it supports a TLB with auto-loading, page protection.
143
144config XTENSA_VARIANT_HAVE_PERF_EVENTS
145	bool "Core variant has Performance Monitor Module"
146	depends on XTENSA_VARIANT_CUSTOM
147	default n
148	help
149	  Enable if core variant has Performance Monitor Module with
150	  External Registers Interface.
151
152	  If unsure, say N.
153
154config XTENSA_FAKE_NMI
155	bool "Treat PMM IRQ as NMI"
156	depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
157	default n
158	help
159	  If PMM IRQ is the only IRQ at EXCM level it is safe to
160	  treat it as NMI, which improves accuracy of profiling.
161
162	  If there are other interrupts at or above PMM IRQ priority level
163	  but not above the EXCM level, PMM IRQ still may be treated as NMI,
164	  but only if these IRQs are not used. There will be a build warning
165	  saying that this is not safe, and a bugcheck if one of these IRQs
166	  actually fire.
167
168	  If unsure, say N.
169
170config XTENSA_UNALIGNED_USER
171	bool "Unaligned memory access in use space"
172	help
173	  The Xtensa architecture currently does not handle unaligned
174	  memory accesses in hardware but through an exception handler.
175	  Per default, unaligned memory accesses are disabled in user space.
176
177	  Say Y here to enable unaligned memory access in user space.
178
179source "kernel/Kconfig.preempt"
180
181config HAVE_SMP
182	bool "System Supports SMP (MX)"
183	depends on XTENSA_VARIANT_CUSTOM
184	select XTENSA_MX
185	help
186	  This option is use to indicate that the system-on-a-chip (SOC)
187	  supports Multiprocessing. Multiprocessor support implemented above
188	  the CPU core definition and currently needs to be selected manually.
189
190	  Multiprocessor support in implemented with external cache and
191	  interrupt controllers.
192
193	  The MX interrupt distributer adds Interprocessor Interrupts
194	  and causes the IRQ numbers to be increased by 4 for devices
195	  like the open cores ethernet driver and the serial interface.
196
197	  You still have to select "Enable SMP" to enable SMP on this SOC.
198
199config SMP
200	bool "Enable Symmetric multi-processing support"
201	depends on HAVE_SMP
202	select GENERIC_SMP_IDLE_THREAD
203	help
204	  Enabled SMP Software; allows more than one CPU/CORE
205	  to be activated during startup.
206
207config NR_CPUS
208	depends on SMP
209	int "Maximum number of CPUs (2-32)"
210	range 2 32
211	default "4"
212
213config HOTPLUG_CPU
214	bool "Enable CPU hotplug support"
215	depends on SMP
216	help
217	  Say Y here to allow turning CPUs off and on. CPUs can be
218	  controlled through /sys/devices/system/cpu.
219
220	  Say N if you want to disable CPU hotplug.
221
222config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
223	bool "Initialize Xtensa MMU inside the Linux kernel code"
224	depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
225	default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
226	help
227	  Earlier version initialized the MMU in the exception vector
228	  before jumping to _startup in head.S and had an advantage that
229	  it was possible to place a software breakpoint at 'reset' and
230	  then enter your normal kernel breakpoints once the MMU was mapped
231	  to the kernel mappings (0XC0000000).
232
233	  This unfortunately won't work for U-Boot and likely also wont
234	  work for using KEXEC to have a hot kernel ready for doing a
235	  KDUMP.
236
237	  So now the MMU is initialized in head.S but it's necessary to
238	  use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
239	  xt-gdb can't place a Software Breakpoint in the  0XD region prior
240	  to mapping the MMU and after mapping even if the area of low memory
241	  was mapped gdb wouldn't remove the breakpoint on hitting it as the
242	  PC wouldn't match. Since Hardware Breakpoints are recommended for
243	  Linux configurations it seems reasonable to just assume they exist
244	  and leave this older mechanism for unfortunate souls that choose
245	  not to follow Tensilica's recommendation.
246
247	  Selecting this will cause U-Boot to set the KERNEL Load and Entry
248	  address at 0x00003000 instead of the mapped std of 0xD0003000.
249
250	  If in doubt, say Y.
251
252config MEMMAP_CACHEATTR
253	hex "Cache attributes for the memory address space"
254	depends on !MMU
255	default 0x22222222
256	help
257	  These cache attributes are set up for noMMU systems. Each hex digit
258	  specifies cache attributes for the corresponding 512MB memory
259	  region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
260	  bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
261
262	  Cache attribute values are specific for the MMU type, so e.g.
263	  for region protection MMUs: 2 is cache bypass, 4 is WB cached,
264	  1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
265	  bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
266	  1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
267	  reserved).
268
269config KSEG_PADDR
270	hex "Physical address of the KSEG mapping"
271	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
272	default 0x00000000
273	help
274	  This is the physical address where KSEG is mapped. Please refer to
275	  the chosen KSEG layout help for the required address alignment.
276	  Unpacked kernel image (including vectors) must be located completely
277	  within KSEG.
278	  Physical memory below this address is not available to linux.
279
280	  If unsure, leave the default value here.
281
282config KERNEL_LOAD_ADDRESS
283	hex "Kernel load address"
284	default 0x60003000 if !MMU
285	default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
286	default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
287	help
288	  This is the address where the kernel is loaded.
289	  It is virtual address for MMUv2 configurations and physical address
290	  for all other configurations.
291
292	  If unsure, leave the default value here.
293
294config VECTORS_OFFSET
295	hex "Kernel vectors offset"
296	default 0x00003000
297	help
298	  This is the offset of the kernel image from the relocatable vectors
299	  base.
300
301	  If unsure, leave the default value here.
302
303choice
304	prompt "KSEG layout"
305	depends on MMU
306	default XTENSA_KSEG_MMU_V2
307
308config XTENSA_KSEG_MMU_V2
309	bool "MMUv2: 128MB cached + 128MB uncached"
310	help
311	  MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
312	  at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
313	  without cache.
314	  KSEG_PADDR must be aligned to 128MB.
315
316config XTENSA_KSEG_256M
317	bool "256MB cached + 256MB uncached"
318	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
319	help
320	  TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
321	  with cache and to 0xc0000000 without cache.
322	  KSEG_PADDR must be aligned to 256MB.
323
324config XTENSA_KSEG_512M
325	bool "512MB cached + 512MB uncached"
326	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
327	help
328	  TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
329	  with cache and to 0xc0000000 without cache.
330	  KSEG_PADDR must be aligned to 256MB.
331
332endchoice
333
334config HIGHMEM
335	bool "High Memory Support"
336	depends on MMU
337	help
338	  Linux can use the full amount of RAM in the system by
339	  default. However, the default MMUv2 setup only maps the
340	  lowermost 128 MB of memory linearly to the areas starting
341	  at 0xd0000000 (cached) and 0xd8000000 (uncached).
342	  When there are more than 128 MB memory in the system not
343	  all of it can be "permanently mapped" by the kernel.
344	  The physical memory that's not permanently mapped is called
345	  "high memory".
346
347	  If you are compiling a kernel which will never run on a
348	  machine with more than 128 MB total physical RAM, answer
349	  N here.
350
351	  If unsure, say Y.
352
353config FAST_SYSCALL_XTENSA
354	bool "Enable fast atomic syscalls"
355	default n
356	help
357	  fast_syscall_xtensa is a syscall that can make atomic operations
358	  on UP kernel when processor has no s32c1i support.
359
360	  This syscall is deprecated. It may have issues when called with
361	  invalid arguments. It is provided only for backwards compatibility.
362	  Only enable it if your userspace software requires it.
363
364	  If unsure, say N.
365
366config FAST_SYSCALL_SPILL_REGISTERS
367	bool "Enable spill registers syscall"
368	default n
369	help
370	  fast_syscall_spill_registers is a syscall that spills all active
371	  register windows of a calling userspace task onto its stack.
372
373	  This syscall is deprecated. It may have issues when called with
374	  invalid arguments. It is provided only for backwards compatibility.
375	  Only enable it if your userspace software requires it.
376
377	  If unsure, say N.
378
379endmenu
380
381config XTENSA_CALIBRATE_CCOUNT
382	def_bool n
383	help
384	  On some platforms (XT2000, for example), the CPU clock rate can
385	  vary.  The frequency can be determined, however, by measuring
386	  against a well known, fixed frequency, such as an UART oscillator.
387
388config SERIAL_CONSOLE
389	def_bool n
390
391menu "Bus options"
392
393config PCI
394	bool "PCI support"
395	default y
396	help
397	  Find out whether you have a PCI motherboard. PCI is the name of a
398	  bus system, i.e. the way the CPU talks to the other stuff inside
399	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
400	  VESA. If you have PCI, say Y, otherwise N.
401
402source "drivers/pci/Kconfig"
403
404endmenu
405
406menu "Platform options"
407
408choice
409	prompt "Xtensa System Type"
410	default XTENSA_PLATFORM_ISS
411
412config XTENSA_PLATFORM_ISS
413	bool "ISS"
414	select XTENSA_CALIBRATE_CCOUNT
415	select SERIAL_CONSOLE
416	help
417	  ISS is an acronym for Tensilica's Instruction Set Simulator.
418
419config XTENSA_PLATFORM_XT2000
420	bool "XT2000"
421	select HAVE_IDE
422	help
423	  XT2000 is the name of Tensilica's feature-rich emulation platform.
424	  This hardware is capable of running a full Linux distribution.
425
426config XTENSA_PLATFORM_XTFPGA
427	bool "XTFPGA"
428	select ETHOC if ETHERNET
429	select PLATFORM_WANT_DEFAULT_MEM if !MMU
430	select SERIAL_CONSOLE
431	select XTENSA_CALIBRATE_CCOUNT
432	help
433	  XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
434	  This hardware is capable of running a full Linux distribution.
435
436endchoice
437
438
439config XTENSA_CPU_CLOCK
440	int "CPU clock rate [MHz]"
441	depends on !XTENSA_CALIBRATE_CCOUNT
442	default 16
443
444config GENERIC_CALIBRATE_DELAY
445	bool "Auto calibration of the BogoMIPS value"
446	help
447	  The BogoMIPS value can easily be derived from the CPU frequency.
448
449config CMDLINE_BOOL
450	bool "Default bootloader kernel arguments"
451
452config CMDLINE
453	string "Initial kernel command string"
454	depends on CMDLINE_BOOL
455	default "console=ttyS0,38400 root=/dev/ram"
456	help
457	  On some architectures (EBSA110 and CATS), there is currently no way
458	  for the boot loader to pass arguments to the kernel. For these
459	  architectures, you should supply some command-line options at build
460	  time by entering them here. As a minimum, you should specify the
461	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
462
463config USE_OF
464	bool "Flattened Device Tree support"
465	select OF
466	select OF_EARLY_FLATTREE
467	select OF_RESERVED_MEM
468	help
469	  Include support for flattened device tree machine descriptions.
470
471config BUILTIN_DTB
472	string "DTB to build into the kernel image"
473	depends on OF
474
475config BLK_DEV_SIMDISK
476	tristate "Host file-based simulated block device support"
477	default n
478	depends on XTENSA_PLATFORM_ISS && BLOCK
479	help
480	  Create block devices that map to files in the host file system.
481	  Device binding to host file may be changed at runtime via proc
482	  interface provided the device is not in use.
483
484config BLK_DEV_SIMDISK_COUNT
485	int "Number of host file-based simulated block devices"
486	range 1 10
487	depends on BLK_DEV_SIMDISK
488	default 2
489	help
490	  This is the default minimal number of created block devices.
491	  Kernel/module parameter 'simdisk_count' may be used to change this
492	  value at runtime. More file names (but no more than 10) may be
493	  specified as parameters, simdisk_count grows accordingly.
494
495config SIMDISK0_FILENAME
496	string "Host filename for the first simulated device"
497	depends on BLK_DEV_SIMDISK = y
498	default ""
499	help
500	  Attach a first simdisk to a host file. Conventionally, this file
501	  contains a root file system.
502
503config SIMDISK1_FILENAME
504	string "Host filename for the second simulated device"
505	depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
506	default ""
507	help
508	  Another simulated disk in a host file for a buildroot-independent
509	  storage.
510
511source "mm/Kconfig"
512
513config FORCE_MAX_ZONEORDER
514	int "Maximum zone order"
515	default "11"
516	help
517	  The kernel memory allocator divides physically contiguous memory
518	  blocks into "zones", where each zone is a power of two number of
519	  pages.  This option selects the largest power of two that the kernel
520	  keeps in the memory allocator.  If you need to allocate very large
521	  blocks of physically contiguous memory, then you may need to
522	  increase this value.
523
524	  This config option is actually maximum order plus one. For example,
525	  a value of 11 means that the largest free memory block is 2^10 pages.
526
527source "drivers/pcmcia/Kconfig"
528
529config PLATFORM_WANT_DEFAULT_MEM
530	def_bool n
531
532config DEFAULT_MEM_START
533	hex
534	prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
535	default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
536	default 0x00000000
537	help
538	  This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
539	  in noMMU configurations.
540
541	  If unsure, leave the default value here.
542
543config XTFPGA_LCD
544	bool "Enable XTFPGA LCD driver"
545	depends on XTENSA_PLATFORM_XTFPGA
546	default n
547	help
548	  There's a 2x16 LCD on most of XTFPGA boards, kernel may output
549	  progress messages there during bootup/shutdown. It may be useful
550	  during board bringup.
551
552	  If unsure, say N.
553
554config XTFPGA_LCD_BASE_ADDR
555	hex "XTFPGA LCD base address"
556	depends on XTFPGA_LCD
557	default "0x0d0c0000"
558	help
559	  Base address of the LCD controller inside KIO region.
560	  Different boards from XTFPGA family have LCD controller at different
561	  addresses. Please consult prototyping user guide for your board for
562	  the correct address. Wrong address here may lead to hardware lockup.
563
564config XTFPGA_LCD_8BIT_ACCESS
565	bool "Use 8-bit access to XTFPGA LCD"
566	depends on XTFPGA_LCD
567	default n
568	help
569	  LCD may be connected with 4- or 8-bit interface, 8-bit access may
570	  only be used with 8-bit interface. Please consult prototyping user
571	  guide for your board for the correct interface width.
572
573endmenu
574
575menu "Executable file formats"
576
577source "fs/Kconfig.binfmt"
578
579endmenu
580
581menu "Power management options"
582
583source "kernel/power/Kconfig"
584
585endmenu
586
587source "net/Kconfig"
588
589source "drivers/Kconfig"
590
591source "fs/Kconfig"
592
593source "arch/xtensa/Kconfig.debug"
594
595source "security/Kconfig"
596
597source "crypto/Kconfig"
598
599source "lib/Kconfig"
600
601
602