1 /* 2 * Xen mmu operations 3 * 4 * This file contains the various mmu fetch and update operations. 5 * The most important job they must perform is the mapping between the 6 * domain's pfn and the overall machine mfns. 7 * 8 * Xen allows guests to directly update the pagetable, in a controlled 9 * fashion. In other words, the guest modifies the same pagetable 10 * that the CPU actually uses, which eliminates the overhead of having 11 * a separate shadow pagetable. 12 * 13 * In order to allow this, it falls on the guest domain to map its 14 * notion of a "physical" pfn - which is just a domain-local linear 15 * address - into a real "machine address" which the CPU's MMU can 16 * use. 17 * 18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be 19 * inserted directly into the pagetable. When creating a new 20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, 21 * when reading the content back with __(pgd|pmd|pte)_val, it converts 22 * the mfn back into a pfn. 23 * 24 * The other constraint is that all pages which make up a pagetable 25 * must be mapped read-only in the guest. This prevents uncontrolled 26 * guest updates to the pagetable. Xen strictly enforces this, and 27 * will disallow any pagetable update which will end up mapping a 28 * pagetable page RW, and will disallow using any writable page as a 29 * pagetable. 30 * 31 * Naively, when loading %cr3 with the base of a new pagetable, Xen 32 * would need to validate the whole pagetable before going on. 33 * Naturally, this is quite slow. The solution is to "pin" a 34 * pagetable, which enforces all the constraints on the pagetable even 35 * when it is not actively in use. This menas that Xen can be assured 36 * that it is still valid when you do load it into %cr3, and doesn't 37 * need to revalidate it. 38 * 39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 40 */ 41 #include <linux/sched/mm.h> 42 #include <linux/highmem.h> 43 #include <linux/debugfs.h> 44 #include <linux/bug.h> 45 #include <linux/vmalloc.h> 46 #include <linux/export.h> 47 #include <linux/init.h> 48 #include <linux/gfp.h> 49 #include <linux/memblock.h> 50 #include <linux/seq_file.h> 51 #include <linux/crash_dump.h> 52 #ifdef CONFIG_KEXEC_CORE 53 #include <linux/kexec.h> 54 #endif 55 56 #include <trace/events/xen.h> 57 58 #include <asm/pgtable.h> 59 #include <asm/tlbflush.h> 60 #include <asm/fixmap.h> 61 #include <asm/mmu_context.h> 62 #include <asm/setup.h> 63 #include <asm/paravirt.h> 64 #include <asm/e820/api.h> 65 #include <asm/linkage.h> 66 #include <asm/page.h> 67 #include <asm/init.h> 68 #include <asm/pat.h> 69 #include <asm/smp.h> 70 71 #include <asm/xen/hypercall.h> 72 #include <asm/xen/hypervisor.h> 73 74 #include <xen/xen.h> 75 #include <xen/page.h> 76 #include <xen/interface/xen.h> 77 #include <xen/interface/hvm/hvm_op.h> 78 #include <xen/interface/version.h> 79 #include <xen/interface/memory.h> 80 #include <xen/hvc-console.h> 81 82 #include "multicalls.h" 83 #include "mmu.h" 84 #include "debugfs.h" 85 86 #ifdef CONFIG_X86_32 87 /* 88 * Identity map, in addition to plain kernel map. This needs to be 89 * large enough to allocate page table pages to allocate the rest. 90 * Each page can map 2MB. 91 */ 92 #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4) 93 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES); 94 #endif 95 #ifdef CONFIG_X86_64 96 /* l3 pud for userspace vsyscall mapping */ 97 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; 98 #endif /* CONFIG_X86_64 */ 99 100 /* 101 * Note about cr3 (pagetable base) values: 102 * 103 * xen_cr3 contains the current logical cr3 value; it contains the 104 * last set cr3. This may not be the current effective cr3, because 105 * its update may be being lazily deferred. However, a vcpu looking 106 * at its own cr3 can use this value knowing that it everything will 107 * be self-consistent. 108 * 109 * xen_current_cr3 contains the actual vcpu cr3; it is set once the 110 * hypercall to set the vcpu cr3 is complete (so it may be a little 111 * out of date, but it will never be set early). If one vcpu is 112 * looking at another vcpu's cr3 value, it should use this variable. 113 */ 114 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ 115 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ 116 117 static phys_addr_t xen_pt_base, xen_pt_size __initdata; 118 119 /* 120 * Just beyond the highest usermode address. STACK_TOP_MAX has a 121 * redzone above it, so round it up to a PGD boundary. 122 */ 123 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) 124 125 void make_lowmem_page_readonly(void *vaddr) 126 { 127 pte_t *pte, ptev; 128 unsigned long address = (unsigned long)vaddr; 129 unsigned int level; 130 131 pte = lookup_address(address, &level); 132 if (pte == NULL) 133 return; /* vaddr missing */ 134 135 ptev = pte_wrprotect(*pte); 136 137 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 138 BUG(); 139 } 140 141 void make_lowmem_page_readwrite(void *vaddr) 142 { 143 pte_t *pte, ptev; 144 unsigned long address = (unsigned long)vaddr; 145 unsigned int level; 146 147 pte = lookup_address(address, &level); 148 if (pte == NULL) 149 return; /* vaddr missing */ 150 151 ptev = pte_mkwrite(*pte); 152 153 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 154 BUG(); 155 } 156 157 158 static bool xen_page_pinned(void *ptr) 159 { 160 struct page *page = virt_to_page(ptr); 161 162 return PagePinned(page); 163 } 164 165 static void xen_extend_mmu_update(const struct mmu_update *update) 166 { 167 struct multicall_space mcs; 168 struct mmu_update *u; 169 170 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); 171 172 if (mcs.mc != NULL) { 173 mcs.mc->args[1]++; 174 } else { 175 mcs = __xen_mc_entry(sizeof(*u)); 176 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 177 } 178 179 u = mcs.args; 180 *u = *update; 181 } 182 183 static void xen_extend_mmuext_op(const struct mmuext_op *op) 184 { 185 struct multicall_space mcs; 186 struct mmuext_op *u; 187 188 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u)); 189 190 if (mcs.mc != NULL) { 191 mcs.mc->args[1]++; 192 } else { 193 mcs = __xen_mc_entry(sizeof(*u)); 194 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 195 } 196 197 u = mcs.args; 198 *u = *op; 199 } 200 201 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) 202 { 203 struct mmu_update u; 204 205 preempt_disable(); 206 207 xen_mc_batch(); 208 209 /* ptr may be ioremapped for 64-bit pagetable setup */ 210 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 211 u.val = pmd_val_ma(val); 212 xen_extend_mmu_update(&u); 213 214 xen_mc_issue(PARAVIRT_LAZY_MMU); 215 216 preempt_enable(); 217 } 218 219 static void xen_set_pmd(pmd_t *ptr, pmd_t val) 220 { 221 trace_xen_mmu_set_pmd(ptr, val); 222 223 /* If page is not pinned, we can just update the entry 224 directly */ 225 if (!xen_page_pinned(ptr)) { 226 *ptr = val; 227 return; 228 } 229 230 xen_set_pmd_hyper(ptr, val); 231 } 232 233 /* 234 * Associate a virtual page frame with a given physical page frame 235 * and protection flags for that frame. 236 */ 237 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) 238 { 239 set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); 240 } 241 242 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) 243 { 244 struct mmu_update u; 245 246 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) 247 return false; 248 249 xen_mc_batch(); 250 251 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 252 u.val = pte_val_ma(pteval); 253 xen_extend_mmu_update(&u); 254 255 xen_mc_issue(PARAVIRT_LAZY_MMU); 256 257 return true; 258 } 259 260 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval) 261 { 262 if (!xen_batched_set_pte(ptep, pteval)) { 263 /* 264 * Could call native_set_pte() here and trap and 265 * emulate the PTE write but with 32-bit guests this 266 * needs two traps (one for each of the two 32-bit 267 * words in the PTE) so do one hypercall directly 268 * instead. 269 */ 270 struct mmu_update u; 271 272 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 273 u.val = pte_val_ma(pteval); 274 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF); 275 } 276 } 277 278 static void xen_set_pte(pte_t *ptep, pte_t pteval) 279 { 280 trace_xen_mmu_set_pte(ptep, pteval); 281 __xen_set_pte(ptep, pteval); 282 } 283 284 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, 285 pte_t *ptep, pte_t pteval) 286 { 287 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval); 288 __xen_set_pte(ptep, pteval); 289 } 290 291 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, 292 unsigned long addr, pte_t *ptep) 293 { 294 /* Just return the pte as-is. We preserve the bits on commit */ 295 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep); 296 return *ptep; 297 } 298 299 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, 300 pte_t *ptep, pte_t pte) 301 { 302 struct mmu_update u; 303 304 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte); 305 xen_mc_batch(); 306 307 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; 308 u.val = pte_val_ma(pte); 309 xen_extend_mmu_update(&u); 310 311 xen_mc_issue(PARAVIRT_LAZY_MMU); 312 } 313 314 /* Assume pteval_t is equivalent to all the other *val_t types. */ 315 static pteval_t pte_mfn_to_pfn(pteval_t val) 316 { 317 if (val & _PAGE_PRESENT) { 318 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT; 319 unsigned long pfn = mfn_to_pfn(mfn); 320 321 pteval_t flags = val & PTE_FLAGS_MASK; 322 if (unlikely(pfn == ~0)) 323 val = flags & ~_PAGE_PRESENT; 324 else 325 val = ((pteval_t)pfn << PAGE_SHIFT) | flags; 326 } 327 328 return val; 329 } 330 331 static pteval_t pte_pfn_to_mfn(pteval_t val) 332 { 333 if (val & _PAGE_PRESENT) { 334 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 335 pteval_t flags = val & PTE_FLAGS_MASK; 336 unsigned long mfn; 337 338 mfn = __pfn_to_mfn(pfn); 339 340 /* 341 * If there's no mfn for the pfn, then just create an 342 * empty non-present pte. Unfortunately this loses 343 * information about the original pfn, so 344 * pte_mfn_to_pfn is asymmetric. 345 */ 346 if (unlikely(mfn == INVALID_P2M_ENTRY)) { 347 mfn = 0; 348 flags = 0; 349 } else 350 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT); 351 val = ((pteval_t)mfn << PAGE_SHIFT) | flags; 352 } 353 354 return val; 355 } 356 357 __visible pteval_t xen_pte_val(pte_t pte) 358 { 359 pteval_t pteval = pte.pte; 360 361 return pte_mfn_to_pfn(pteval); 362 } 363 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); 364 365 __visible pgdval_t xen_pgd_val(pgd_t pgd) 366 { 367 return pte_mfn_to_pfn(pgd.pgd); 368 } 369 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); 370 371 __visible pte_t xen_make_pte(pteval_t pte) 372 { 373 pte = pte_pfn_to_mfn(pte); 374 375 return native_make_pte(pte); 376 } 377 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); 378 379 __visible pgd_t xen_make_pgd(pgdval_t pgd) 380 { 381 pgd = pte_pfn_to_mfn(pgd); 382 return native_make_pgd(pgd); 383 } 384 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); 385 386 __visible pmdval_t xen_pmd_val(pmd_t pmd) 387 { 388 return pte_mfn_to_pfn(pmd.pmd); 389 } 390 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); 391 392 static void xen_set_pud_hyper(pud_t *ptr, pud_t val) 393 { 394 struct mmu_update u; 395 396 preempt_disable(); 397 398 xen_mc_batch(); 399 400 /* ptr may be ioremapped for 64-bit pagetable setup */ 401 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 402 u.val = pud_val_ma(val); 403 xen_extend_mmu_update(&u); 404 405 xen_mc_issue(PARAVIRT_LAZY_MMU); 406 407 preempt_enable(); 408 } 409 410 static void xen_set_pud(pud_t *ptr, pud_t val) 411 { 412 trace_xen_mmu_set_pud(ptr, val); 413 414 /* If page is not pinned, we can just update the entry 415 directly */ 416 if (!xen_page_pinned(ptr)) { 417 *ptr = val; 418 return; 419 } 420 421 xen_set_pud_hyper(ptr, val); 422 } 423 424 #ifdef CONFIG_X86_PAE 425 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte) 426 { 427 trace_xen_mmu_set_pte_atomic(ptep, pte); 428 set_64bit((u64 *)ptep, native_pte_val(pte)); 429 } 430 431 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 432 { 433 trace_xen_mmu_pte_clear(mm, addr, ptep); 434 if (!xen_batched_set_pte(ptep, native_make_pte(0))) 435 native_pte_clear(mm, addr, ptep); 436 } 437 438 static void xen_pmd_clear(pmd_t *pmdp) 439 { 440 trace_xen_mmu_pmd_clear(pmdp); 441 set_pmd(pmdp, __pmd(0)); 442 } 443 #endif /* CONFIG_X86_PAE */ 444 445 __visible pmd_t xen_make_pmd(pmdval_t pmd) 446 { 447 pmd = pte_pfn_to_mfn(pmd); 448 return native_make_pmd(pmd); 449 } 450 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); 451 452 #ifdef CONFIG_X86_64 453 __visible pudval_t xen_pud_val(pud_t pud) 454 { 455 return pte_mfn_to_pfn(pud.pud); 456 } 457 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); 458 459 __visible pud_t xen_make_pud(pudval_t pud) 460 { 461 pud = pte_pfn_to_mfn(pud); 462 463 return native_make_pud(pud); 464 } 465 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); 466 467 static pgd_t *xen_get_user_pgd(pgd_t *pgd) 468 { 469 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); 470 unsigned offset = pgd - pgd_page; 471 pgd_t *user_ptr = NULL; 472 473 if (offset < pgd_index(USER_LIMIT)) { 474 struct page *page = virt_to_page(pgd_page); 475 user_ptr = (pgd_t *)page->private; 476 if (user_ptr) 477 user_ptr += offset; 478 } 479 480 return user_ptr; 481 } 482 483 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 484 { 485 struct mmu_update u; 486 487 u.ptr = virt_to_machine(ptr).maddr; 488 u.val = p4d_val_ma(val); 489 xen_extend_mmu_update(&u); 490 } 491 492 /* 493 * Raw hypercall-based set_p4d, intended for in early boot before 494 * there's a page structure. This implies: 495 * 1. The only existing pagetable is the kernel's 496 * 2. It is always pinned 497 * 3. It has no user pagetable attached to it 498 */ 499 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 500 { 501 preempt_disable(); 502 503 xen_mc_batch(); 504 505 __xen_set_p4d_hyper(ptr, val); 506 507 xen_mc_issue(PARAVIRT_LAZY_MMU); 508 509 preempt_enable(); 510 } 511 512 static void xen_set_p4d(p4d_t *ptr, p4d_t val) 513 { 514 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr); 515 pgd_t pgd_val; 516 517 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val); 518 519 /* If page is not pinned, we can just update the entry 520 directly */ 521 if (!xen_page_pinned(ptr)) { 522 *ptr = val; 523 if (user_ptr) { 524 WARN_ON(xen_page_pinned(user_ptr)); 525 pgd_val.pgd = p4d_val_ma(val); 526 *user_ptr = pgd_val; 527 } 528 return; 529 } 530 531 /* If it's pinned, then we can at least batch the kernel and 532 user updates together. */ 533 xen_mc_batch(); 534 535 __xen_set_p4d_hyper(ptr, val); 536 if (user_ptr) 537 __xen_set_p4d_hyper((p4d_t *)user_ptr, val); 538 539 xen_mc_issue(PARAVIRT_LAZY_MMU); 540 } 541 #endif /* CONFIG_X86_64 */ 542 543 static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd, 544 int (*func)(struct mm_struct *mm, struct page *, enum pt_level), 545 bool last, unsigned long limit) 546 { 547 int i, nr, flush = 0; 548 549 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD; 550 for (i = 0; i < nr; i++) { 551 if (!pmd_none(pmd[i])) 552 flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE); 553 } 554 return flush; 555 } 556 557 static int xen_pud_walk(struct mm_struct *mm, pud_t *pud, 558 int (*func)(struct mm_struct *mm, struct page *, enum pt_level), 559 bool last, unsigned long limit) 560 { 561 int i, nr, flush = 0; 562 563 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD; 564 for (i = 0; i < nr; i++) { 565 pmd_t *pmd; 566 567 if (pud_none(pud[i])) 568 continue; 569 570 pmd = pmd_offset(&pud[i], 0); 571 if (PTRS_PER_PMD > 1) 572 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); 573 flush |= xen_pmd_walk(mm, pmd, func, 574 last && i == nr - 1, limit); 575 } 576 return flush; 577 } 578 579 static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d, 580 int (*func)(struct mm_struct *mm, struct page *, enum pt_level), 581 bool last, unsigned long limit) 582 { 583 int flush = 0; 584 pud_t *pud; 585 586 587 if (p4d_none(*p4d)) 588 return flush; 589 590 pud = pud_offset(p4d, 0); 591 if (PTRS_PER_PUD > 1) 592 flush |= (*func)(mm, virt_to_page(pud), PT_PUD); 593 flush |= xen_pud_walk(mm, pud, func, last, limit); 594 return flush; 595 } 596 597 /* 598 * (Yet another) pagetable walker. This one is intended for pinning a 599 * pagetable. This means that it walks a pagetable and calls the 600 * callback function on each page it finds making up the page table, 601 * at every level. It walks the entire pagetable, but it only bothers 602 * pinning pte pages which are below limit. In the normal case this 603 * will be STACK_TOP_MAX, but at boot we need to pin up to 604 * FIXADDR_TOP. 605 * 606 * For 32-bit the important bit is that we don't pin beyond there, 607 * because then we start getting into Xen's ptes. 608 * 609 * For 64-bit, we must skip the Xen hole in the middle of the address 610 * space, just after the big x86-64 virtual hole. 611 */ 612 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, 613 int (*func)(struct mm_struct *mm, struct page *, 614 enum pt_level), 615 unsigned long limit) 616 { 617 int i, nr, flush = 0; 618 unsigned hole_low, hole_high; 619 620 /* The limit is the last byte to be touched */ 621 limit--; 622 BUG_ON(limit >= FIXADDR_TOP); 623 624 /* 625 * 64-bit has a great big hole in the middle of the address 626 * space, which contains the Xen mappings. On 32-bit these 627 * will end up making a zero-sized hole and so is a no-op. 628 */ 629 hole_low = pgd_index(USER_LIMIT); 630 hole_high = pgd_index(PAGE_OFFSET); 631 632 nr = pgd_index(limit) + 1; 633 for (i = 0; i < nr; i++) { 634 p4d_t *p4d; 635 636 if (i >= hole_low && i < hole_high) 637 continue; 638 639 if (pgd_none(pgd[i])) 640 continue; 641 642 p4d = p4d_offset(&pgd[i], 0); 643 flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit); 644 } 645 646 /* Do the top level last, so that the callbacks can use it as 647 a cue to do final things like tlb flushes. */ 648 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); 649 650 return flush; 651 } 652 653 static int xen_pgd_walk(struct mm_struct *mm, 654 int (*func)(struct mm_struct *mm, struct page *, 655 enum pt_level), 656 unsigned long limit) 657 { 658 return __xen_pgd_walk(mm, mm->pgd, func, limit); 659 } 660 661 /* If we're using split pte locks, then take the page's lock and 662 return a pointer to it. Otherwise return NULL. */ 663 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) 664 { 665 spinlock_t *ptl = NULL; 666 667 #if USE_SPLIT_PTE_PTLOCKS 668 ptl = ptlock_ptr(page); 669 spin_lock_nest_lock(ptl, &mm->page_table_lock); 670 #endif 671 672 return ptl; 673 } 674 675 static void xen_pte_unlock(void *v) 676 { 677 spinlock_t *ptl = v; 678 spin_unlock(ptl); 679 } 680 681 static void xen_do_pin(unsigned level, unsigned long pfn) 682 { 683 struct mmuext_op op; 684 685 op.cmd = level; 686 op.arg1.mfn = pfn_to_mfn(pfn); 687 688 xen_extend_mmuext_op(&op); 689 } 690 691 static int xen_pin_page(struct mm_struct *mm, struct page *page, 692 enum pt_level level) 693 { 694 unsigned pgfl = TestSetPagePinned(page); 695 int flush; 696 697 if (pgfl) 698 flush = 0; /* already pinned */ 699 else if (PageHighMem(page)) 700 /* kmaps need flushing if we found an unpinned 701 highpage */ 702 flush = 1; 703 else { 704 void *pt = lowmem_page_address(page); 705 unsigned long pfn = page_to_pfn(page); 706 struct multicall_space mcs = __xen_mc_entry(0); 707 spinlock_t *ptl; 708 709 flush = 0; 710 711 /* 712 * We need to hold the pagetable lock between the time 713 * we make the pagetable RO and when we actually pin 714 * it. If we don't, then other users may come in and 715 * attempt to update the pagetable by writing it, 716 * which will fail because the memory is RO but not 717 * pinned, so Xen won't do the trap'n'emulate. 718 * 719 * If we're using split pte locks, we can't hold the 720 * entire pagetable's worth of locks during the 721 * traverse, because we may wrap the preempt count (8 722 * bits). The solution is to mark RO and pin each PTE 723 * page while holding the lock. This means the number 724 * of locks we end up holding is never more than a 725 * batch size (~32 entries, at present). 726 * 727 * If we're not using split pte locks, we needn't pin 728 * the PTE pages independently, because we're 729 * protected by the overall pagetable lock. 730 */ 731 ptl = NULL; 732 if (level == PT_PTE) 733 ptl = xen_pte_lock(page, mm); 734 735 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 736 pfn_pte(pfn, PAGE_KERNEL_RO), 737 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 738 739 if (ptl) { 740 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); 741 742 /* Queue a deferred unlock for when this batch 743 is completed. */ 744 xen_mc_callback(xen_pte_unlock, ptl); 745 } 746 } 747 748 return flush; 749 } 750 751 /* This is called just after a mm has been created, but it has not 752 been used yet. We need to make sure that its pagetable is all 753 read-only, and can be pinned. */ 754 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) 755 { 756 trace_xen_mmu_pgd_pin(mm, pgd); 757 758 xen_mc_batch(); 759 760 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) { 761 /* re-enable interrupts for flushing */ 762 xen_mc_issue(0); 763 764 kmap_flush_unused(); 765 766 xen_mc_batch(); 767 } 768 769 #ifdef CONFIG_X86_64 770 { 771 pgd_t *user_pgd = xen_get_user_pgd(pgd); 772 773 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); 774 775 if (user_pgd) { 776 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); 777 xen_do_pin(MMUEXT_PIN_L4_TABLE, 778 PFN_DOWN(__pa(user_pgd))); 779 } 780 } 781 #else /* CONFIG_X86_32 */ 782 #ifdef CONFIG_X86_PAE 783 /* Need to make sure unshared kernel PMD is pinnable */ 784 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), 785 PT_PMD); 786 #endif 787 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); 788 #endif /* CONFIG_X86_64 */ 789 xen_mc_issue(0); 790 } 791 792 static void xen_pgd_pin(struct mm_struct *mm) 793 { 794 __xen_pgd_pin(mm, mm->pgd); 795 } 796 797 /* 798 * On save, we need to pin all pagetables to make sure they get their 799 * mfns turned into pfns. Search the list for any unpinned pgds and pin 800 * them (unpinned pgds are not currently in use, probably because the 801 * process is under construction or destruction). 802 * 803 * Expected to be called in stop_machine() ("equivalent to taking 804 * every spinlock in the system"), so the locking doesn't really 805 * matter all that much. 806 */ 807 void xen_mm_pin_all(void) 808 { 809 struct page *page; 810 811 spin_lock(&pgd_lock); 812 813 list_for_each_entry(page, &pgd_list, lru) { 814 if (!PagePinned(page)) { 815 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); 816 SetPageSavePinned(page); 817 } 818 } 819 820 spin_unlock(&pgd_lock); 821 } 822 823 /* 824 * The init_mm pagetable is really pinned as soon as its created, but 825 * that's before we have page structures to store the bits. So do all 826 * the book-keeping now. 827 */ 828 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page, 829 enum pt_level level) 830 { 831 SetPagePinned(page); 832 return 0; 833 } 834 835 static void __init xen_mark_init_mm_pinned(void) 836 { 837 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); 838 } 839 840 static int xen_unpin_page(struct mm_struct *mm, struct page *page, 841 enum pt_level level) 842 { 843 unsigned pgfl = TestClearPagePinned(page); 844 845 if (pgfl && !PageHighMem(page)) { 846 void *pt = lowmem_page_address(page); 847 unsigned long pfn = page_to_pfn(page); 848 spinlock_t *ptl = NULL; 849 struct multicall_space mcs; 850 851 /* 852 * Do the converse to pin_page. If we're using split 853 * pte locks, we must be holding the lock for while 854 * the pte page is unpinned but still RO to prevent 855 * concurrent updates from seeing it in this 856 * partially-pinned state. 857 */ 858 if (level == PT_PTE) { 859 ptl = xen_pte_lock(page, mm); 860 861 if (ptl) 862 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); 863 } 864 865 mcs = __xen_mc_entry(0); 866 867 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 868 pfn_pte(pfn, PAGE_KERNEL), 869 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 870 871 if (ptl) { 872 /* unlock when batch completed */ 873 xen_mc_callback(xen_pte_unlock, ptl); 874 } 875 } 876 877 return 0; /* never need to flush on unpin */ 878 } 879 880 /* Release a pagetables pages back as normal RW */ 881 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) 882 { 883 trace_xen_mmu_pgd_unpin(mm, pgd); 884 885 xen_mc_batch(); 886 887 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 888 889 #ifdef CONFIG_X86_64 890 { 891 pgd_t *user_pgd = xen_get_user_pgd(pgd); 892 893 if (user_pgd) { 894 xen_do_pin(MMUEXT_UNPIN_TABLE, 895 PFN_DOWN(__pa(user_pgd))); 896 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); 897 } 898 } 899 #endif 900 901 #ifdef CONFIG_X86_PAE 902 /* Need to make sure unshared kernel PMD is unpinned */ 903 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), 904 PT_PMD); 905 #endif 906 907 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); 908 909 xen_mc_issue(0); 910 } 911 912 static void xen_pgd_unpin(struct mm_struct *mm) 913 { 914 __xen_pgd_unpin(mm, mm->pgd); 915 } 916 917 /* 918 * On resume, undo any pinning done at save, so that the rest of the 919 * kernel doesn't see any unexpected pinned pagetables. 920 */ 921 void xen_mm_unpin_all(void) 922 { 923 struct page *page; 924 925 spin_lock(&pgd_lock); 926 927 list_for_each_entry(page, &pgd_list, lru) { 928 if (PageSavePinned(page)) { 929 BUG_ON(!PagePinned(page)); 930 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); 931 ClearPageSavePinned(page); 932 } 933 } 934 935 spin_unlock(&pgd_lock); 936 } 937 938 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) 939 { 940 spin_lock(&next->page_table_lock); 941 xen_pgd_pin(next); 942 spin_unlock(&next->page_table_lock); 943 } 944 945 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) 946 { 947 spin_lock(&mm->page_table_lock); 948 xen_pgd_pin(mm); 949 spin_unlock(&mm->page_table_lock); 950 } 951 952 static void drop_mm_ref_this_cpu(void *info) 953 { 954 struct mm_struct *mm = info; 955 956 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm) 957 leave_mm(smp_processor_id()); 958 959 /* 960 * If this cpu still has a stale cr3 reference, then make sure 961 * it has been flushed. 962 */ 963 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd)) 964 xen_mc_flush(); 965 } 966 967 #ifdef CONFIG_SMP 968 /* 969 * Another cpu may still have their %cr3 pointing at the pagetable, so 970 * we need to repoint it somewhere else before we can unpin it. 971 */ 972 static void xen_drop_mm_ref(struct mm_struct *mm) 973 { 974 cpumask_var_t mask; 975 unsigned cpu; 976 977 drop_mm_ref_this_cpu(mm); 978 979 /* Get the "official" set of cpus referring to our pagetable. */ 980 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { 981 for_each_online_cpu(cpu) { 982 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) 983 continue; 984 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1); 985 } 986 return; 987 } 988 989 /* 990 * It's possible that a vcpu may have a stale reference to our 991 * cr3, because its in lazy mode, and it hasn't yet flushed 992 * its set of pending hypercalls yet. In this case, we can 993 * look at its actual current cr3 value, and force it to flush 994 * if needed. 995 */ 996 cpumask_clear(mask); 997 for_each_online_cpu(cpu) { 998 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 999 cpumask_set_cpu(cpu, mask); 1000 } 1001 1002 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1); 1003 free_cpumask_var(mask); 1004 } 1005 #else 1006 static void xen_drop_mm_ref(struct mm_struct *mm) 1007 { 1008 drop_mm_ref_this_cpu(mm); 1009 } 1010 #endif 1011 1012 /* 1013 * While a process runs, Xen pins its pagetables, which means that the 1014 * hypervisor forces it to be read-only, and it controls all updates 1015 * to it. This means that all pagetable updates have to go via the 1016 * hypervisor, which is moderately expensive. 1017 * 1018 * Since we're pulling the pagetable down, we switch to use init_mm, 1019 * unpin old process pagetable and mark it all read-write, which 1020 * allows further operations on it to be simple memory accesses. 1021 * 1022 * The only subtle point is that another CPU may be still using the 1023 * pagetable because of lazy tlb flushing. This means we need need to 1024 * switch all CPUs off this pagetable before we can unpin it. 1025 */ 1026 static void xen_exit_mmap(struct mm_struct *mm) 1027 { 1028 get_cpu(); /* make sure we don't move around */ 1029 xen_drop_mm_ref(mm); 1030 put_cpu(); 1031 1032 spin_lock(&mm->page_table_lock); 1033 1034 /* pgd may not be pinned in the error exit path of execve */ 1035 if (xen_page_pinned(mm->pgd)) 1036 xen_pgd_unpin(mm); 1037 1038 spin_unlock(&mm->page_table_lock); 1039 } 1040 1041 static void xen_post_allocator_init(void); 1042 1043 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1044 { 1045 struct mmuext_op op; 1046 1047 op.cmd = cmd; 1048 op.arg1.mfn = pfn_to_mfn(pfn); 1049 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) 1050 BUG(); 1051 } 1052 1053 #ifdef CONFIG_X86_64 1054 static void __init xen_cleanhighmap(unsigned long vaddr, 1055 unsigned long vaddr_end) 1056 { 1057 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 1058 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr); 1059 1060 /* NOTE: The loop is more greedy than the cleanup_highmap variant. 1061 * We include the PMD passed in on _both_ boundaries. */ 1062 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD)); 1063 pmd++, vaddr += PMD_SIZE) { 1064 if (pmd_none(*pmd)) 1065 continue; 1066 if (vaddr < (unsigned long) _text || vaddr > kernel_end) 1067 set_pmd(pmd, __pmd(0)); 1068 } 1069 /* In case we did something silly, we should crash in this function 1070 * instead of somewhere later and be confusing. */ 1071 xen_mc_flush(); 1072 } 1073 1074 /* 1075 * Make a page range writeable and free it. 1076 */ 1077 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size) 1078 { 1079 void *vaddr = __va(paddr); 1080 void *vaddr_end = vaddr + size; 1081 1082 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE) 1083 make_lowmem_page_readwrite(vaddr); 1084 1085 memblock_free(paddr, size); 1086 } 1087 1088 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin) 1089 { 1090 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK; 1091 1092 if (unpin) 1093 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa)); 1094 ClearPagePinned(virt_to_page(__va(pa))); 1095 xen_free_ro_pages(pa, PAGE_SIZE); 1096 } 1097 1098 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin) 1099 { 1100 unsigned long pa; 1101 pte_t *pte_tbl; 1102 int i; 1103 1104 if (pmd_large(*pmd)) { 1105 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK; 1106 xen_free_ro_pages(pa, PMD_SIZE); 1107 return; 1108 } 1109 1110 pte_tbl = pte_offset_kernel(pmd, 0); 1111 for (i = 0; i < PTRS_PER_PTE; i++) { 1112 if (pte_none(pte_tbl[i])) 1113 continue; 1114 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT; 1115 xen_free_ro_pages(pa, PAGE_SIZE); 1116 } 1117 set_pmd(pmd, __pmd(0)); 1118 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin); 1119 } 1120 1121 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin) 1122 { 1123 unsigned long pa; 1124 pmd_t *pmd_tbl; 1125 int i; 1126 1127 if (pud_large(*pud)) { 1128 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK; 1129 xen_free_ro_pages(pa, PUD_SIZE); 1130 return; 1131 } 1132 1133 pmd_tbl = pmd_offset(pud, 0); 1134 for (i = 0; i < PTRS_PER_PMD; i++) { 1135 if (pmd_none(pmd_tbl[i])) 1136 continue; 1137 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin); 1138 } 1139 set_pud(pud, __pud(0)); 1140 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin); 1141 } 1142 1143 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin) 1144 { 1145 unsigned long pa; 1146 pud_t *pud_tbl; 1147 int i; 1148 1149 if (p4d_large(*p4d)) { 1150 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK; 1151 xen_free_ro_pages(pa, P4D_SIZE); 1152 return; 1153 } 1154 1155 pud_tbl = pud_offset(p4d, 0); 1156 for (i = 0; i < PTRS_PER_PUD; i++) { 1157 if (pud_none(pud_tbl[i])) 1158 continue; 1159 xen_cleanmfnmap_pud(pud_tbl + i, unpin); 1160 } 1161 set_p4d(p4d, __p4d(0)); 1162 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin); 1163 } 1164 1165 /* 1166 * Since it is well isolated we can (and since it is perhaps large we should) 1167 * also free the page tables mapping the initial P->M table. 1168 */ 1169 static void __init xen_cleanmfnmap(unsigned long vaddr) 1170 { 1171 pgd_t *pgd; 1172 p4d_t *p4d; 1173 bool unpin; 1174 1175 unpin = (vaddr == 2 * PGDIR_SIZE); 1176 vaddr &= PMD_MASK; 1177 pgd = pgd_offset_k(vaddr); 1178 p4d = p4d_offset(pgd, 0); 1179 if (!p4d_none(*p4d)) 1180 xen_cleanmfnmap_p4d(p4d, unpin); 1181 } 1182 1183 static void __init xen_pagetable_p2m_free(void) 1184 { 1185 unsigned long size; 1186 unsigned long addr; 1187 1188 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 1189 1190 /* No memory or already called. */ 1191 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list) 1192 return; 1193 1194 /* using __ka address and sticking INVALID_P2M_ENTRY! */ 1195 memset((void *)xen_start_info->mfn_list, 0xff, size); 1196 1197 addr = xen_start_info->mfn_list; 1198 /* 1199 * We could be in __ka space. 1200 * We roundup to the PMD, which means that if anybody at this stage is 1201 * using the __ka address of xen_start_info or 1202 * xen_start_info->shared_info they are in going to crash. Fortunatly 1203 * we have already revectored in xen_setup_kernel_pagetable and in 1204 * xen_setup_shared_info. 1205 */ 1206 size = roundup(size, PMD_SIZE); 1207 1208 if (addr >= __START_KERNEL_map) { 1209 xen_cleanhighmap(addr, addr + size); 1210 size = PAGE_ALIGN(xen_start_info->nr_pages * 1211 sizeof(unsigned long)); 1212 memblock_free(__pa(addr), size); 1213 } else { 1214 xen_cleanmfnmap(addr); 1215 } 1216 } 1217 1218 static void __init xen_pagetable_cleanhighmap(void) 1219 { 1220 unsigned long size; 1221 unsigned long addr; 1222 1223 /* At this stage, cleanup_highmap has already cleaned __ka space 1224 * from _brk_limit way up to the max_pfn_mapped (which is the end of 1225 * the ramdisk). We continue on, erasing PMD entries that point to page 1226 * tables - do note that they are accessible at this stage via __va. 1227 * As Xen is aligning the memory end to a 4MB boundary, for good 1228 * measure we also round up to PMD_SIZE * 2 - which means that if 1229 * anybody is using __ka address to the initial boot-stack - and try 1230 * to use it - they are going to crash. The xen_start_info has been 1231 * taken care of already in xen_setup_kernel_pagetable. */ 1232 addr = xen_start_info->pt_base; 1233 size = xen_start_info->nr_pt_frames * PAGE_SIZE; 1234 1235 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2)); 1236 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base)); 1237 } 1238 #endif 1239 1240 static void __init xen_pagetable_p2m_setup(void) 1241 { 1242 xen_vmalloc_p2m_tree(); 1243 1244 #ifdef CONFIG_X86_64 1245 xen_pagetable_p2m_free(); 1246 1247 xen_pagetable_cleanhighmap(); 1248 #endif 1249 /* And revector! Bye bye old array */ 1250 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 1251 } 1252 1253 static void __init xen_pagetable_init(void) 1254 { 1255 paging_init(); 1256 xen_post_allocator_init(); 1257 1258 xen_pagetable_p2m_setup(); 1259 1260 /* Allocate and initialize top and mid mfn levels for p2m structure */ 1261 xen_build_mfn_list_list(); 1262 1263 /* Remap memory freed due to conflicts with E820 map */ 1264 xen_remap_memory(); 1265 1266 xen_setup_shared_info(); 1267 } 1268 static void xen_write_cr2(unsigned long cr2) 1269 { 1270 this_cpu_read(xen_vcpu)->arch.cr2 = cr2; 1271 } 1272 1273 static unsigned long xen_read_cr2(void) 1274 { 1275 return this_cpu_read(xen_vcpu)->arch.cr2; 1276 } 1277 1278 unsigned long xen_read_cr2_direct(void) 1279 { 1280 return this_cpu_read(xen_vcpu_info.arch.cr2); 1281 } 1282 1283 static void xen_flush_tlb(void) 1284 { 1285 struct mmuext_op *op; 1286 struct multicall_space mcs; 1287 1288 trace_xen_mmu_flush_tlb(0); 1289 1290 preempt_disable(); 1291 1292 mcs = xen_mc_entry(sizeof(*op)); 1293 1294 op = mcs.args; 1295 op->cmd = MMUEXT_TLB_FLUSH_LOCAL; 1296 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1297 1298 xen_mc_issue(PARAVIRT_LAZY_MMU); 1299 1300 preempt_enable(); 1301 } 1302 1303 static void xen_flush_tlb_single(unsigned long addr) 1304 { 1305 struct mmuext_op *op; 1306 struct multicall_space mcs; 1307 1308 trace_xen_mmu_flush_tlb_single(addr); 1309 1310 preempt_disable(); 1311 1312 mcs = xen_mc_entry(sizeof(*op)); 1313 op = mcs.args; 1314 op->cmd = MMUEXT_INVLPG_LOCAL; 1315 op->arg1.linear_addr = addr & PAGE_MASK; 1316 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1317 1318 xen_mc_issue(PARAVIRT_LAZY_MMU); 1319 1320 preempt_enable(); 1321 } 1322 1323 static void xen_flush_tlb_others(const struct cpumask *cpus, 1324 const struct flush_tlb_info *info) 1325 { 1326 struct { 1327 struct mmuext_op op; 1328 #ifdef CONFIG_SMP 1329 DECLARE_BITMAP(mask, num_processors); 1330 #else 1331 DECLARE_BITMAP(mask, NR_CPUS); 1332 #endif 1333 } *args; 1334 struct multicall_space mcs; 1335 1336 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end); 1337 1338 if (cpumask_empty(cpus)) 1339 return; /* nothing to do */ 1340 1341 mcs = xen_mc_entry(sizeof(*args)); 1342 args = mcs.args; 1343 args->op.arg2.vcpumask = to_cpumask(args->mask); 1344 1345 /* Remove us, and any offline CPUS. */ 1346 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); 1347 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); 1348 1349 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; 1350 if (info->end != TLB_FLUSH_ALL && 1351 (info->end - info->start) <= PAGE_SIZE) { 1352 args->op.cmd = MMUEXT_INVLPG_MULTI; 1353 args->op.arg1.linear_addr = info->start; 1354 } 1355 1356 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); 1357 1358 xen_mc_issue(PARAVIRT_LAZY_MMU); 1359 } 1360 1361 static unsigned long xen_read_cr3(void) 1362 { 1363 return this_cpu_read(xen_cr3); 1364 } 1365 1366 static void set_current_cr3(void *v) 1367 { 1368 this_cpu_write(xen_current_cr3, (unsigned long)v); 1369 } 1370 1371 static void __xen_write_cr3(bool kernel, unsigned long cr3) 1372 { 1373 struct mmuext_op op; 1374 unsigned long mfn; 1375 1376 trace_xen_mmu_write_cr3(kernel, cr3); 1377 1378 if (cr3) 1379 mfn = pfn_to_mfn(PFN_DOWN(cr3)); 1380 else 1381 mfn = 0; 1382 1383 WARN_ON(mfn == 0 && kernel); 1384 1385 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; 1386 op.arg1.mfn = mfn; 1387 1388 xen_extend_mmuext_op(&op); 1389 1390 if (kernel) { 1391 this_cpu_write(xen_cr3, cr3); 1392 1393 /* Update xen_current_cr3 once the batch has actually 1394 been submitted. */ 1395 xen_mc_callback(set_current_cr3, (void *)cr3); 1396 } 1397 } 1398 static void xen_write_cr3(unsigned long cr3) 1399 { 1400 BUG_ON(preemptible()); 1401 1402 xen_mc_batch(); /* disables interrupts */ 1403 1404 /* Update while interrupts are disabled, so its atomic with 1405 respect to ipis */ 1406 this_cpu_write(xen_cr3, cr3); 1407 1408 __xen_write_cr3(true, cr3); 1409 1410 #ifdef CONFIG_X86_64 1411 { 1412 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); 1413 if (user_pgd) 1414 __xen_write_cr3(false, __pa(user_pgd)); 1415 else 1416 __xen_write_cr3(false, 0); 1417 } 1418 #endif 1419 1420 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1421 } 1422 1423 #ifdef CONFIG_X86_64 1424 /* 1425 * At the start of the day - when Xen launches a guest, it has already 1426 * built pagetables for the guest. We diligently look over them 1427 * in xen_setup_kernel_pagetable and graft as appropriate them in the 1428 * init_top_pgt and its friends. Then when we are happy we load 1429 * the new init_top_pgt - and continue on. 1430 * 1431 * The generic code starts (start_kernel) and 'init_mem_mapping' sets 1432 * up the rest of the pagetables. When it has completed it loads the cr3. 1433 * N.B. that baremetal would start at 'start_kernel' (and the early 1434 * #PF handler would create bootstrap pagetables) - so we are running 1435 * with the same assumptions as what to do when write_cr3 is executed 1436 * at this point. 1437 * 1438 * Since there are no user-page tables at all, we have two variants 1439 * of xen_write_cr3 - the early bootup (this one), and the late one 1440 * (xen_write_cr3). The reason we have to do that is that in 64-bit 1441 * the Linux kernel and user-space are both in ring 3 while the 1442 * hypervisor is in ring 0. 1443 */ 1444 static void __init xen_write_cr3_init(unsigned long cr3) 1445 { 1446 BUG_ON(preemptible()); 1447 1448 xen_mc_batch(); /* disables interrupts */ 1449 1450 /* Update while interrupts are disabled, so its atomic with 1451 respect to ipis */ 1452 this_cpu_write(xen_cr3, cr3); 1453 1454 __xen_write_cr3(true, cr3); 1455 1456 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1457 } 1458 #endif 1459 1460 static int xen_pgd_alloc(struct mm_struct *mm) 1461 { 1462 pgd_t *pgd = mm->pgd; 1463 int ret = 0; 1464 1465 BUG_ON(PagePinned(virt_to_page(pgd))); 1466 1467 #ifdef CONFIG_X86_64 1468 { 1469 struct page *page = virt_to_page(pgd); 1470 pgd_t *user_pgd; 1471 1472 BUG_ON(page->private != 0); 1473 1474 ret = -ENOMEM; 1475 1476 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); 1477 page->private = (unsigned long)user_pgd; 1478 1479 if (user_pgd != NULL) { 1480 #ifdef CONFIG_X86_VSYSCALL_EMULATION 1481 user_pgd[pgd_index(VSYSCALL_ADDR)] = 1482 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); 1483 #endif 1484 ret = 0; 1485 } 1486 1487 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); 1488 } 1489 #endif 1490 return ret; 1491 } 1492 1493 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) 1494 { 1495 #ifdef CONFIG_X86_64 1496 pgd_t *user_pgd = xen_get_user_pgd(pgd); 1497 1498 if (user_pgd) 1499 free_page((unsigned long)user_pgd); 1500 #endif 1501 } 1502 1503 /* 1504 * Init-time set_pte while constructing initial pagetables, which 1505 * doesn't allow RO page table pages to be remapped RW. 1506 * 1507 * If there is no MFN for this PFN then this page is initially 1508 * ballooned out so clear the PTE (as in decrease_reservation() in 1509 * drivers/xen/balloon.c). 1510 * 1511 * Many of these PTE updates are done on unpinned and writable pages 1512 * and doing a hypercall for these is unnecessary and expensive. At 1513 * this point it is not possible to tell if a page is pinned or not, 1514 * so always write the PTE directly and rely on Xen trapping and 1515 * emulating any updates as necessary. 1516 */ 1517 __visible pte_t xen_make_pte_init(pteval_t pte) 1518 { 1519 #ifdef CONFIG_X86_64 1520 unsigned long pfn; 1521 1522 /* 1523 * Pages belonging to the initial p2m list mapped outside the default 1524 * address range must be mapped read-only. This region contains the 1525 * page tables for mapping the p2m list, too, and page tables MUST be 1526 * mapped read-only. 1527 */ 1528 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT; 1529 if (xen_start_info->mfn_list < __START_KERNEL_map && 1530 pfn >= xen_start_info->first_p2m_pfn && 1531 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames) 1532 pte &= ~_PAGE_RW; 1533 #endif 1534 pte = pte_pfn_to_mfn(pte); 1535 return native_make_pte(pte); 1536 } 1537 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init); 1538 1539 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte) 1540 { 1541 #ifdef CONFIG_X86_32 1542 /* If there's an existing pte, then don't allow _PAGE_RW to be set */ 1543 if (pte_mfn(pte) != INVALID_P2M_ENTRY 1544 && pte_val_ma(*ptep) & _PAGE_PRESENT) 1545 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & 1546 pte_val_ma(pte)); 1547 #endif 1548 native_set_pte(ptep, pte); 1549 } 1550 1551 /* Early in boot, while setting up the initial pagetable, assume 1552 everything is pinned. */ 1553 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) 1554 { 1555 #ifdef CONFIG_FLATMEM 1556 BUG_ON(mem_map); /* should only be used early */ 1557 #endif 1558 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1559 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1560 } 1561 1562 /* Used for pmd and pud */ 1563 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) 1564 { 1565 #ifdef CONFIG_FLATMEM 1566 BUG_ON(mem_map); /* should only be used early */ 1567 #endif 1568 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1569 } 1570 1571 /* Early release_pte assumes that all pts are pinned, since there's 1572 only init_mm and anything attached to that is pinned. */ 1573 static void __init xen_release_pte_init(unsigned long pfn) 1574 { 1575 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1576 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1577 } 1578 1579 static void __init xen_release_pmd_init(unsigned long pfn) 1580 { 1581 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1582 } 1583 1584 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1585 { 1586 struct multicall_space mcs; 1587 struct mmuext_op *op; 1588 1589 mcs = __xen_mc_entry(sizeof(*op)); 1590 op = mcs.args; 1591 op->cmd = cmd; 1592 op->arg1.mfn = pfn_to_mfn(pfn); 1593 1594 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 1595 } 1596 1597 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot) 1598 { 1599 struct multicall_space mcs; 1600 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT); 1601 1602 mcs = __xen_mc_entry(0); 1603 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr, 1604 pfn_pte(pfn, prot), 0); 1605 } 1606 1607 /* This needs to make sure the new pte page is pinned iff its being 1608 attached to a pinned pagetable. */ 1609 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, 1610 unsigned level) 1611 { 1612 bool pinned = PagePinned(virt_to_page(mm->pgd)); 1613 1614 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned); 1615 1616 if (pinned) { 1617 struct page *page = pfn_to_page(pfn); 1618 1619 SetPagePinned(page); 1620 1621 if (!PageHighMem(page)) { 1622 xen_mc_batch(); 1623 1624 __set_pfn_prot(pfn, PAGE_KERNEL_RO); 1625 1626 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1627 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1628 1629 xen_mc_issue(PARAVIRT_LAZY_MMU); 1630 } else { 1631 /* make sure there are no stray mappings of 1632 this page */ 1633 kmap_flush_unused(); 1634 } 1635 } 1636 } 1637 1638 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) 1639 { 1640 xen_alloc_ptpage(mm, pfn, PT_PTE); 1641 } 1642 1643 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) 1644 { 1645 xen_alloc_ptpage(mm, pfn, PT_PMD); 1646 } 1647 1648 /* This should never happen until we're OK to use struct page */ 1649 static inline void xen_release_ptpage(unsigned long pfn, unsigned level) 1650 { 1651 struct page *page = pfn_to_page(pfn); 1652 bool pinned = PagePinned(page); 1653 1654 trace_xen_mmu_release_ptpage(pfn, level, pinned); 1655 1656 if (pinned) { 1657 if (!PageHighMem(page)) { 1658 xen_mc_batch(); 1659 1660 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1661 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1662 1663 __set_pfn_prot(pfn, PAGE_KERNEL); 1664 1665 xen_mc_issue(PARAVIRT_LAZY_MMU); 1666 } 1667 ClearPagePinned(page); 1668 } 1669 } 1670 1671 static void xen_release_pte(unsigned long pfn) 1672 { 1673 xen_release_ptpage(pfn, PT_PTE); 1674 } 1675 1676 static void xen_release_pmd(unsigned long pfn) 1677 { 1678 xen_release_ptpage(pfn, PT_PMD); 1679 } 1680 1681 #ifdef CONFIG_X86_64 1682 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) 1683 { 1684 xen_alloc_ptpage(mm, pfn, PT_PUD); 1685 } 1686 1687 static void xen_release_pud(unsigned long pfn) 1688 { 1689 xen_release_ptpage(pfn, PT_PUD); 1690 } 1691 #endif 1692 1693 void __init xen_reserve_top(void) 1694 { 1695 #ifdef CONFIG_X86_32 1696 unsigned long top = HYPERVISOR_VIRT_START; 1697 struct xen_platform_parameters pp; 1698 1699 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) 1700 top = pp.virt_start; 1701 1702 reserve_top_address(-top); 1703 #endif /* CONFIG_X86_32 */ 1704 } 1705 1706 /* 1707 * Like __va(), but returns address in the kernel mapping (which is 1708 * all we have until the physical memory mapping has been set up. 1709 */ 1710 static void * __init __ka(phys_addr_t paddr) 1711 { 1712 #ifdef CONFIG_X86_64 1713 return (void *)(paddr + __START_KERNEL_map); 1714 #else 1715 return __va(paddr); 1716 #endif 1717 } 1718 1719 /* Convert a machine address to physical address */ 1720 static unsigned long __init m2p(phys_addr_t maddr) 1721 { 1722 phys_addr_t paddr; 1723 1724 maddr &= XEN_PTE_MFN_MASK; 1725 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; 1726 1727 return paddr; 1728 } 1729 1730 /* Convert a machine address to kernel virtual */ 1731 static void * __init m2v(phys_addr_t maddr) 1732 { 1733 return __ka(m2p(maddr)); 1734 } 1735 1736 /* Set the page permissions on an identity-mapped pages */ 1737 static void __init set_page_prot_flags(void *addr, pgprot_t prot, 1738 unsigned long flags) 1739 { 1740 unsigned long pfn = __pa(addr) >> PAGE_SHIFT; 1741 pte_t pte = pfn_pte(pfn, prot); 1742 1743 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags)) 1744 BUG(); 1745 } 1746 static void __init set_page_prot(void *addr, pgprot_t prot) 1747 { 1748 return set_page_prot_flags(addr, prot, UVMF_NONE); 1749 } 1750 #ifdef CONFIG_X86_32 1751 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) 1752 { 1753 unsigned pmdidx, pteidx; 1754 unsigned ident_pte; 1755 unsigned long pfn; 1756 1757 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES, 1758 PAGE_SIZE); 1759 1760 ident_pte = 0; 1761 pfn = 0; 1762 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { 1763 pte_t *pte_page; 1764 1765 /* Reuse or allocate a page of ptes */ 1766 if (pmd_present(pmd[pmdidx])) 1767 pte_page = m2v(pmd[pmdidx].pmd); 1768 else { 1769 /* Check for free pte pages */ 1770 if (ident_pte == LEVEL1_IDENT_ENTRIES) 1771 break; 1772 1773 pte_page = &level1_ident_pgt[ident_pte]; 1774 ident_pte += PTRS_PER_PTE; 1775 1776 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); 1777 } 1778 1779 /* Install mappings */ 1780 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { 1781 pte_t pte; 1782 1783 if (pfn > max_pfn_mapped) 1784 max_pfn_mapped = pfn; 1785 1786 if (!pte_none(pte_page[pteidx])) 1787 continue; 1788 1789 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); 1790 pte_page[pteidx] = pte; 1791 } 1792 } 1793 1794 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) 1795 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); 1796 1797 set_page_prot(pmd, PAGE_KERNEL_RO); 1798 } 1799 #endif 1800 void __init xen_setup_machphys_mapping(void) 1801 { 1802 struct xen_machphys_mapping mapping; 1803 1804 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { 1805 machine_to_phys_mapping = (unsigned long *)mapping.v_start; 1806 machine_to_phys_nr = mapping.max_mfn + 1; 1807 } else { 1808 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES; 1809 } 1810 #ifdef CONFIG_X86_32 1811 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1)) 1812 < machine_to_phys_mapping); 1813 #endif 1814 } 1815 1816 #ifdef CONFIG_X86_64 1817 static void __init convert_pfn_mfn(void *v) 1818 { 1819 pte_t *pte = v; 1820 int i; 1821 1822 /* All levels are converted the same way, so just treat them 1823 as ptes. */ 1824 for (i = 0; i < PTRS_PER_PTE; i++) 1825 pte[i] = xen_make_pte(pte[i].pte); 1826 } 1827 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end, 1828 unsigned long addr) 1829 { 1830 if (*pt_base == PFN_DOWN(__pa(addr))) { 1831 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1832 clear_page((void *)addr); 1833 (*pt_base)++; 1834 } 1835 if (*pt_end == PFN_DOWN(__pa(addr))) { 1836 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1837 clear_page((void *)addr); 1838 (*pt_end)--; 1839 } 1840 } 1841 /* 1842 * Set up the initial kernel pagetable. 1843 * 1844 * We can construct this by grafting the Xen provided pagetable into 1845 * head_64.S's preconstructed pagetables. We copy the Xen L2's into 1846 * level2_ident_pgt, and level2_kernel_pgt. This means that only the 1847 * kernel has a physical mapping to start with - but that's enough to 1848 * get __va working. We need to fill in the rest of the physical 1849 * mapping once some sort of allocator has been set up. 1850 */ 1851 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 1852 { 1853 pud_t *l3; 1854 pmd_t *l2; 1855 unsigned long addr[3]; 1856 unsigned long pt_base, pt_end; 1857 unsigned i; 1858 1859 /* max_pfn_mapped is the last pfn mapped in the initial memory 1860 * mappings. Considering that on Xen after the kernel mappings we 1861 * have the mappings of some pages that don't exist in pfn space, we 1862 * set max_pfn_mapped to the last real pfn mapped. */ 1863 if (xen_start_info->mfn_list < __START_KERNEL_map) 1864 max_pfn_mapped = xen_start_info->first_p2m_pfn; 1865 else 1866 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); 1867 1868 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base)); 1869 pt_end = pt_base + xen_start_info->nr_pt_frames; 1870 1871 /* Zap identity mapping */ 1872 init_top_pgt[0] = __pgd(0); 1873 1874 /* Pre-constructed entries are in pfn, so convert to mfn */ 1875 /* L4[272] -> level3_ident_pgt */ 1876 /* L4[511] -> level3_kernel_pgt */ 1877 convert_pfn_mfn(init_top_pgt); 1878 1879 /* L3_i[0] -> level2_ident_pgt */ 1880 convert_pfn_mfn(level3_ident_pgt); 1881 /* L3_k[510] -> level2_kernel_pgt */ 1882 /* L3_k[511] -> level2_fixmap_pgt */ 1883 convert_pfn_mfn(level3_kernel_pgt); 1884 1885 /* L3_k[511][506] -> level1_fixmap_pgt */ 1886 convert_pfn_mfn(level2_fixmap_pgt); 1887 1888 /* We get [511][511] and have Xen's version of level2_kernel_pgt */ 1889 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); 1890 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); 1891 1892 addr[0] = (unsigned long)pgd; 1893 addr[1] = (unsigned long)l3; 1894 addr[2] = (unsigned long)l2; 1895 /* Graft it onto L4[272][0]. Note that we creating an aliasing problem: 1896 * Both L4[272][0] and L4[511][510] have entries that point to the same 1897 * L2 (PMD) tables. Meaning that if you modify it in __va space 1898 * it will be also modified in the __ka space! (But if you just 1899 * modify the PMD table to point to other PTE's or none, then you 1900 * are OK - which is what cleanup_highmap does) */ 1901 copy_page(level2_ident_pgt, l2); 1902 /* Graft it onto L4[511][510] */ 1903 copy_page(level2_kernel_pgt, l2); 1904 1905 /* Copy the initial P->M table mappings if necessary. */ 1906 i = pgd_index(xen_start_info->mfn_list); 1907 if (i && i < pgd_index(__START_KERNEL_map)) 1908 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i]; 1909 1910 /* Make pagetable pieces RO */ 1911 set_page_prot(init_top_pgt, PAGE_KERNEL_RO); 1912 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); 1913 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); 1914 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); 1915 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO); 1916 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); 1917 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); 1918 set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO); 1919 1920 /* Pin down new L4 */ 1921 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, 1922 PFN_DOWN(__pa_symbol(init_top_pgt))); 1923 1924 /* Unpin Xen-provided one */ 1925 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 1926 1927 /* 1928 * At this stage there can be no user pgd, and no page structure to 1929 * attach it to, so make sure we just set kernel pgd. 1930 */ 1931 xen_mc_batch(); 1932 __xen_write_cr3(true, __pa(init_top_pgt)); 1933 xen_mc_issue(PARAVIRT_LAZY_CPU); 1934 1935 /* We can't that easily rip out L3 and L2, as the Xen pagetables are 1936 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for 1937 * the initial domain. For guests using the toolstack, they are in: 1938 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only 1939 * rip out the [L4] (pgd), but for guests we shave off three pages. 1940 */ 1941 for (i = 0; i < ARRAY_SIZE(addr); i++) 1942 check_pt_base(&pt_base, &pt_end, addr[i]); 1943 1944 /* Our (by three pages) smaller Xen pagetable that we are using */ 1945 xen_pt_base = PFN_PHYS(pt_base); 1946 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE; 1947 memblock_reserve(xen_pt_base, xen_pt_size); 1948 1949 /* Revector the xen_start_info */ 1950 xen_start_info = (struct start_info *)__va(__pa(xen_start_info)); 1951 } 1952 1953 /* 1954 * Read a value from a physical address. 1955 */ 1956 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr) 1957 { 1958 unsigned long *vaddr; 1959 unsigned long val; 1960 1961 vaddr = early_memremap_ro(addr, sizeof(val)); 1962 val = *vaddr; 1963 early_memunmap(vaddr, sizeof(val)); 1964 return val; 1965 } 1966 1967 /* 1968 * Translate a virtual address to a physical one without relying on mapped 1969 * page tables. Don't rely on big pages being aligned in (guest) physical 1970 * space! 1971 */ 1972 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr) 1973 { 1974 phys_addr_t pa; 1975 pgd_t pgd; 1976 pud_t pud; 1977 pmd_t pmd; 1978 pte_t pte; 1979 1980 pa = read_cr3_pa(); 1981 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) * 1982 sizeof(pgd))); 1983 if (!pgd_present(pgd)) 1984 return 0; 1985 1986 pa = pgd_val(pgd) & PTE_PFN_MASK; 1987 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) * 1988 sizeof(pud))); 1989 if (!pud_present(pud)) 1990 return 0; 1991 pa = pud_val(pud) & PTE_PFN_MASK; 1992 if (pud_large(pud)) 1993 return pa + (vaddr & ~PUD_MASK); 1994 1995 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) * 1996 sizeof(pmd))); 1997 if (!pmd_present(pmd)) 1998 return 0; 1999 pa = pmd_val(pmd) & PTE_PFN_MASK; 2000 if (pmd_large(pmd)) 2001 return pa + (vaddr & ~PMD_MASK); 2002 2003 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) * 2004 sizeof(pte))); 2005 if (!pte_present(pte)) 2006 return 0; 2007 pa = pte_pfn(pte) << PAGE_SHIFT; 2008 2009 return pa | (vaddr & ~PAGE_MASK); 2010 } 2011 2012 /* 2013 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to 2014 * this area. 2015 */ 2016 void __init xen_relocate_p2m(void) 2017 { 2018 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys; 2019 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end; 2020 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud; 2021 pte_t *pt; 2022 pmd_t *pmd; 2023 pud_t *pud; 2024 pgd_t *pgd; 2025 unsigned long *new_p2m; 2026 int save_pud; 2027 2028 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 2029 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT; 2030 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT; 2031 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT; 2032 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT; 2033 n_frames = n_pte + n_pt + n_pmd + n_pud; 2034 2035 new_area = xen_find_free_area(PFN_PHYS(n_frames)); 2036 if (!new_area) { 2037 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n"); 2038 BUG(); 2039 } 2040 2041 /* 2042 * Setup the page tables for addressing the new p2m list. 2043 * We have asked the hypervisor to map the p2m list at the user address 2044 * PUD_SIZE. It may have done so, or it may have used a kernel space 2045 * address depending on the Xen version. 2046 * To avoid any possible virtual address collision, just use 2047 * 2 * PUD_SIZE for the new area. 2048 */ 2049 pud_phys = new_area; 2050 pmd_phys = pud_phys + PFN_PHYS(n_pud); 2051 pt_phys = pmd_phys + PFN_PHYS(n_pmd); 2052 p2m_pfn = PFN_DOWN(pt_phys) + n_pt; 2053 2054 pgd = __va(read_cr3_pa()); 2055 new_p2m = (unsigned long *)(2 * PGDIR_SIZE); 2056 save_pud = n_pud; 2057 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) { 2058 pud = early_memremap(pud_phys, PAGE_SIZE); 2059 clear_page(pud); 2060 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD); 2061 idx_pmd++) { 2062 pmd = early_memremap(pmd_phys, PAGE_SIZE); 2063 clear_page(pmd); 2064 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD); 2065 idx_pt++) { 2066 pt = early_memremap(pt_phys, PAGE_SIZE); 2067 clear_page(pt); 2068 for (idx_pte = 0; 2069 idx_pte < min(n_pte, PTRS_PER_PTE); 2070 idx_pte++) { 2071 set_pte(pt + idx_pte, 2072 pfn_pte(p2m_pfn, PAGE_KERNEL)); 2073 p2m_pfn++; 2074 } 2075 n_pte -= PTRS_PER_PTE; 2076 early_memunmap(pt, PAGE_SIZE); 2077 make_lowmem_page_readonly(__va(pt_phys)); 2078 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, 2079 PFN_DOWN(pt_phys)); 2080 set_pmd(pmd + idx_pt, 2081 __pmd(_PAGE_TABLE | pt_phys)); 2082 pt_phys += PAGE_SIZE; 2083 } 2084 n_pt -= PTRS_PER_PMD; 2085 early_memunmap(pmd, PAGE_SIZE); 2086 make_lowmem_page_readonly(__va(pmd_phys)); 2087 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE, 2088 PFN_DOWN(pmd_phys)); 2089 set_pud(pud + idx_pmd, __pud(_PAGE_TABLE | pmd_phys)); 2090 pmd_phys += PAGE_SIZE; 2091 } 2092 n_pmd -= PTRS_PER_PUD; 2093 early_memunmap(pud, PAGE_SIZE); 2094 make_lowmem_page_readonly(__va(pud_phys)); 2095 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys)); 2096 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys)); 2097 pud_phys += PAGE_SIZE; 2098 } 2099 2100 /* Now copy the old p2m info to the new area. */ 2101 memcpy(new_p2m, xen_p2m_addr, size); 2102 xen_p2m_addr = new_p2m; 2103 2104 /* Release the old p2m list and set new list info. */ 2105 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list)); 2106 BUG_ON(!p2m_pfn); 2107 p2m_pfn_end = p2m_pfn + PFN_DOWN(size); 2108 2109 if (xen_start_info->mfn_list < __START_KERNEL_map) { 2110 pfn = xen_start_info->first_p2m_pfn; 2111 pfn_end = xen_start_info->first_p2m_pfn + 2112 xen_start_info->nr_p2m_frames; 2113 set_pgd(pgd + 1, __pgd(0)); 2114 } else { 2115 pfn = p2m_pfn; 2116 pfn_end = p2m_pfn_end; 2117 } 2118 2119 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn)); 2120 while (pfn < pfn_end) { 2121 if (pfn == p2m_pfn) { 2122 pfn = p2m_pfn_end; 2123 continue; 2124 } 2125 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 2126 pfn++; 2127 } 2128 2129 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 2130 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area); 2131 xen_start_info->nr_p2m_frames = n_frames; 2132 } 2133 2134 #else /* !CONFIG_X86_64 */ 2135 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD); 2136 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD); 2137 2138 static void __init xen_write_cr3_init(unsigned long cr3) 2139 { 2140 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir)); 2141 2142 BUG_ON(read_cr3_pa() != __pa(initial_page_table)); 2143 BUG_ON(cr3 != __pa(swapper_pg_dir)); 2144 2145 /* 2146 * We are switching to swapper_pg_dir for the first time (from 2147 * initial_page_table) and therefore need to mark that page 2148 * read-only and then pin it. 2149 * 2150 * Xen disallows sharing of kernel PMDs for PAE 2151 * guests. Therefore we must copy the kernel PMD from 2152 * initial_page_table into a new kernel PMD to be used in 2153 * swapper_pg_dir. 2154 */ 2155 swapper_kernel_pmd = 2156 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); 2157 copy_page(swapper_kernel_pmd, initial_kernel_pmd); 2158 swapper_pg_dir[KERNEL_PGD_BOUNDARY] = 2159 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT); 2160 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO); 2161 2162 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); 2163 xen_write_cr3(cr3); 2164 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn); 2165 2166 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, 2167 PFN_DOWN(__pa(initial_page_table))); 2168 set_page_prot(initial_page_table, PAGE_KERNEL); 2169 set_page_prot(initial_kernel_pmd, PAGE_KERNEL); 2170 2171 pv_mmu_ops.write_cr3 = &xen_write_cr3; 2172 } 2173 2174 /* 2175 * For 32 bit domains xen_start_info->pt_base is the pgd address which might be 2176 * not the first page table in the page table pool. 2177 * Iterate through the initial page tables to find the real page table base. 2178 */ 2179 static phys_addr_t __init xen_find_pt_base(pmd_t *pmd) 2180 { 2181 phys_addr_t pt_base, paddr; 2182 unsigned pmdidx; 2183 2184 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd)); 2185 2186 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) 2187 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) { 2188 paddr = m2p(pmd[pmdidx].pmd); 2189 pt_base = min(pt_base, paddr); 2190 } 2191 2192 return pt_base; 2193 } 2194 2195 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 2196 { 2197 pmd_t *kernel_pmd; 2198 2199 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); 2200 2201 xen_pt_base = xen_find_pt_base(kernel_pmd); 2202 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE; 2203 2204 initial_kernel_pmd = 2205 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); 2206 2207 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024); 2208 2209 copy_page(initial_kernel_pmd, kernel_pmd); 2210 2211 xen_map_identity_early(initial_kernel_pmd, max_pfn); 2212 2213 copy_page(initial_page_table, pgd); 2214 initial_page_table[KERNEL_PGD_BOUNDARY] = 2215 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT); 2216 2217 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO); 2218 set_page_prot(initial_page_table, PAGE_KERNEL_RO); 2219 set_page_prot(empty_zero_page, PAGE_KERNEL_RO); 2220 2221 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 2222 2223 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, 2224 PFN_DOWN(__pa(initial_page_table))); 2225 xen_write_cr3(__pa(initial_page_table)); 2226 2227 memblock_reserve(xen_pt_base, xen_pt_size); 2228 } 2229 #endif /* CONFIG_X86_64 */ 2230 2231 void __init xen_reserve_special_pages(void) 2232 { 2233 phys_addr_t paddr; 2234 2235 memblock_reserve(__pa(xen_start_info), PAGE_SIZE); 2236 if (xen_start_info->store_mfn) { 2237 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn)); 2238 memblock_reserve(paddr, PAGE_SIZE); 2239 } 2240 if (!xen_initial_domain()) { 2241 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn)); 2242 memblock_reserve(paddr, PAGE_SIZE); 2243 } 2244 } 2245 2246 void __init xen_pt_check_e820(void) 2247 { 2248 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) { 2249 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n"); 2250 BUG(); 2251 } 2252 } 2253 2254 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; 2255 2256 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) 2257 { 2258 pte_t pte; 2259 2260 phys >>= PAGE_SHIFT; 2261 2262 switch (idx) { 2263 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: 2264 case FIX_RO_IDT: 2265 #ifdef CONFIG_X86_32 2266 case FIX_WP_TEST: 2267 # ifdef CONFIG_HIGHMEM 2268 case FIX_KMAP_BEGIN ... FIX_KMAP_END: 2269 # endif 2270 #elif defined(CONFIG_X86_VSYSCALL_EMULATION) 2271 case VSYSCALL_PAGE: 2272 #endif 2273 case FIX_TEXT_POKE0: 2274 case FIX_TEXT_POKE1: 2275 case FIX_GDT_REMAP_BEGIN ... FIX_GDT_REMAP_END: 2276 /* All local page mappings */ 2277 pte = pfn_pte(phys, prot); 2278 break; 2279 2280 #ifdef CONFIG_X86_LOCAL_APIC 2281 case FIX_APIC_BASE: /* maps dummy local APIC */ 2282 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2283 break; 2284 #endif 2285 2286 #ifdef CONFIG_X86_IO_APIC 2287 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: 2288 /* 2289 * We just don't map the IO APIC - all access is via 2290 * hypercalls. Keep the address in the pte for reference. 2291 */ 2292 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2293 break; 2294 #endif 2295 2296 case FIX_PARAVIRT_BOOTMAP: 2297 /* This is an MFN, but it isn't an IO mapping from the 2298 IO domain */ 2299 pte = mfn_pte(phys, prot); 2300 break; 2301 2302 default: 2303 /* By default, set_fixmap is used for hardware mappings */ 2304 pte = mfn_pte(phys, prot); 2305 break; 2306 } 2307 2308 __native_set_fixmap(idx, pte); 2309 2310 #ifdef CONFIG_X86_VSYSCALL_EMULATION 2311 /* Replicate changes to map the vsyscall page into the user 2312 pagetable vsyscall mapping. */ 2313 if (idx == VSYSCALL_PAGE) { 2314 unsigned long vaddr = __fix_to_virt(idx); 2315 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); 2316 } 2317 #endif 2318 } 2319 2320 static void __init xen_post_allocator_init(void) 2321 { 2322 pv_mmu_ops.set_pte = xen_set_pte; 2323 pv_mmu_ops.set_pmd = xen_set_pmd; 2324 pv_mmu_ops.set_pud = xen_set_pud; 2325 #ifdef CONFIG_X86_64 2326 pv_mmu_ops.set_p4d = xen_set_p4d; 2327 #endif 2328 2329 /* This will work as long as patching hasn't happened yet 2330 (which it hasn't) */ 2331 pv_mmu_ops.alloc_pte = xen_alloc_pte; 2332 pv_mmu_ops.alloc_pmd = xen_alloc_pmd; 2333 pv_mmu_ops.release_pte = xen_release_pte; 2334 pv_mmu_ops.release_pmd = xen_release_pmd; 2335 #ifdef CONFIG_X86_64 2336 pv_mmu_ops.alloc_pud = xen_alloc_pud; 2337 pv_mmu_ops.release_pud = xen_release_pud; 2338 #endif 2339 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte); 2340 2341 #ifdef CONFIG_X86_64 2342 pv_mmu_ops.write_cr3 = &xen_write_cr3; 2343 SetPagePinned(virt_to_page(level3_user_vsyscall)); 2344 #endif 2345 xen_mark_init_mm_pinned(); 2346 } 2347 2348 static void xen_leave_lazy_mmu(void) 2349 { 2350 preempt_disable(); 2351 xen_mc_flush(); 2352 paravirt_leave_lazy_mmu(); 2353 preempt_enable(); 2354 } 2355 2356 static const struct pv_mmu_ops xen_mmu_ops __initconst = { 2357 .read_cr2 = xen_read_cr2, 2358 .write_cr2 = xen_write_cr2, 2359 2360 .read_cr3 = xen_read_cr3, 2361 .write_cr3 = xen_write_cr3_init, 2362 2363 .flush_tlb_user = xen_flush_tlb, 2364 .flush_tlb_kernel = xen_flush_tlb, 2365 .flush_tlb_single = xen_flush_tlb_single, 2366 .flush_tlb_others = xen_flush_tlb_others, 2367 2368 .pgd_alloc = xen_pgd_alloc, 2369 .pgd_free = xen_pgd_free, 2370 2371 .alloc_pte = xen_alloc_pte_init, 2372 .release_pte = xen_release_pte_init, 2373 .alloc_pmd = xen_alloc_pmd_init, 2374 .release_pmd = xen_release_pmd_init, 2375 2376 .set_pte = xen_set_pte_init, 2377 .set_pte_at = xen_set_pte_at, 2378 .set_pmd = xen_set_pmd_hyper, 2379 2380 .ptep_modify_prot_start = __ptep_modify_prot_start, 2381 .ptep_modify_prot_commit = __ptep_modify_prot_commit, 2382 2383 .pte_val = PV_CALLEE_SAVE(xen_pte_val), 2384 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), 2385 2386 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init), 2387 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), 2388 2389 #ifdef CONFIG_X86_PAE 2390 .set_pte_atomic = xen_set_pte_atomic, 2391 .pte_clear = xen_pte_clear, 2392 .pmd_clear = xen_pmd_clear, 2393 #endif /* CONFIG_X86_PAE */ 2394 .set_pud = xen_set_pud_hyper, 2395 2396 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), 2397 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), 2398 2399 #ifdef CONFIG_X86_64 2400 .pud_val = PV_CALLEE_SAVE(xen_pud_val), 2401 .make_pud = PV_CALLEE_SAVE(xen_make_pud), 2402 .set_p4d = xen_set_p4d_hyper, 2403 2404 .alloc_pud = xen_alloc_pmd_init, 2405 .release_pud = xen_release_pmd_init, 2406 #endif /* CONFIG_X86_64 */ 2407 2408 .activate_mm = xen_activate_mm, 2409 .dup_mmap = xen_dup_mmap, 2410 .exit_mmap = xen_exit_mmap, 2411 2412 .lazy_mode = { 2413 .enter = paravirt_enter_lazy_mmu, 2414 .leave = xen_leave_lazy_mmu, 2415 .flush = paravirt_flush_lazy_mmu, 2416 }, 2417 2418 .set_fixmap = xen_set_fixmap, 2419 }; 2420 2421 void __init xen_init_mmu_ops(void) 2422 { 2423 x86_init.paging.pagetable_init = xen_pagetable_init; 2424 2425 pv_mmu_ops = xen_mmu_ops; 2426 2427 memset(dummy_mapping, 0xff, PAGE_SIZE); 2428 } 2429 2430 /* Protected by xen_reservation_lock. */ 2431 #define MAX_CONTIG_ORDER 9 /* 2MB */ 2432 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; 2433 2434 #define VOID_PTE (mfn_pte(0, __pgprot(0))) 2435 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, 2436 unsigned long *in_frames, 2437 unsigned long *out_frames) 2438 { 2439 int i; 2440 struct multicall_space mcs; 2441 2442 xen_mc_batch(); 2443 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { 2444 mcs = __xen_mc_entry(0); 2445 2446 if (in_frames) 2447 in_frames[i] = virt_to_mfn(vaddr); 2448 2449 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); 2450 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); 2451 2452 if (out_frames) 2453 out_frames[i] = virt_to_pfn(vaddr); 2454 } 2455 xen_mc_issue(0); 2456 } 2457 2458 /* 2459 * Update the pfn-to-mfn mappings for a virtual address range, either to 2460 * point to an array of mfns, or contiguously from a single starting 2461 * mfn. 2462 */ 2463 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, 2464 unsigned long *mfns, 2465 unsigned long first_mfn) 2466 { 2467 unsigned i, limit; 2468 unsigned long mfn; 2469 2470 xen_mc_batch(); 2471 2472 limit = 1u << order; 2473 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { 2474 struct multicall_space mcs; 2475 unsigned flags; 2476 2477 mcs = __xen_mc_entry(0); 2478 if (mfns) 2479 mfn = mfns[i]; 2480 else 2481 mfn = first_mfn + i; 2482 2483 if (i < (limit - 1)) 2484 flags = 0; 2485 else { 2486 if (order == 0) 2487 flags = UVMF_INVLPG | UVMF_ALL; 2488 else 2489 flags = UVMF_TLB_FLUSH | UVMF_ALL; 2490 } 2491 2492 MULTI_update_va_mapping(mcs.mc, vaddr, 2493 mfn_pte(mfn, PAGE_KERNEL), flags); 2494 2495 set_phys_to_machine(virt_to_pfn(vaddr), mfn); 2496 } 2497 2498 xen_mc_issue(0); 2499 } 2500 2501 /* 2502 * Perform the hypercall to exchange a region of our pfns to point to 2503 * memory with the required contiguous alignment. Takes the pfns as 2504 * input, and populates mfns as output. 2505 * 2506 * Returns a success code indicating whether the hypervisor was able to 2507 * satisfy the request or not. 2508 */ 2509 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, 2510 unsigned long *pfns_in, 2511 unsigned long extents_out, 2512 unsigned int order_out, 2513 unsigned long *mfns_out, 2514 unsigned int address_bits) 2515 { 2516 long rc; 2517 int success; 2518 2519 struct xen_memory_exchange exchange = { 2520 .in = { 2521 .nr_extents = extents_in, 2522 .extent_order = order_in, 2523 .extent_start = pfns_in, 2524 .domid = DOMID_SELF 2525 }, 2526 .out = { 2527 .nr_extents = extents_out, 2528 .extent_order = order_out, 2529 .extent_start = mfns_out, 2530 .address_bits = address_bits, 2531 .domid = DOMID_SELF 2532 } 2533 }; 2534 2535 BUG_ON(extents_in << order_in != extents_out << order_out); 2536 2537 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); 2538 success = (exchange.nr_exchanged == extents_in); 2539 2540 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); 2541 BUG_ON(success && (rc != 0)); 2542 2543 return success; 2544 } 2545 2546 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order, 2547 unsigned int address_bits, 2548 dma_addr_t *dma_handle) 2549 { 2550 unsigned long *in_frames = discontig_frames, out_frame; 2551 unsigned long flags; 2552 int success; 2553 unsigned long vstart = (unsigned long)phys_to_virt(pstart); 2554 2555 /* 2556 * Currently an auto-translated guest will not perform I/O, nor will 2557 * it require PAE page directories below 4GB. Therefore any calls to 2558 * this function are redundant and can be ignored. 2559 */ 2560 2561 if (unlikely(order > MAX_CONTIG_ORDER)) 2562 return -ENOMEM; 2563 2564 memset((void *) vstart, 0, PAGE_SIZE << order); 2565 2566 spin_lock_irqsave(&xen_reservation_lock, flags); 2567 2568 /* 1. Zap current PTEs, remembering MFNs. */ 2569 xen_zap_pfn_range(vstart, order, in_frames, NULL); 2570 2571 /* 2. Get a new contiguous memory extent. */ 2572 out_frame = virt_to_pfn(vstart); 2573 success = xen_exchange_memory(1UL << order, 0, in_frames, 2574 1, order, &out_frame, 2575 address_bits); 2576 2577 /* 3. Map the new extent in place of old pages. */ 2578 if (success) 2579 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); 2580 else 2581 xen_remap_exchanged_ptes(vstart, order, in_frames, 0); 2582 2583 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2584 2585 *dma_handle = virt_to_machine(vstart).maddr; 2586 return success ? 0 : -ENOMEM; 2587 } 2588 EXPORT_SYMBOL_GPL(xen_create_contiguous_region); 2589 2590 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order) 2591 { 2592 unsigned long *out_frames = discontig_frames, in_frame; 2593 unsigned long flags; 2594 int success; 2595 unsigned long vstart; 2596 2597 if (unlikely(order > MAX_CONTIG_ORDER)) 2598 return; 2599 2600 vstart = (unsigned long)phys_to_virt(pstart); 2601 memset((void *) vstart, 0, PAGE_SIZE << order); 2602 2603 spin_lock_irqsave(&xen_reservation_lock, flags); 2604 2605 /* 1. Find start MFN of contiguous extent. */ 2606 in_frame = virt_to_mfn(vstart); 2607 2608 /* 2. Zap current PTEs. */ 2609 xen_zap_pfn_range(vstart, order, NULL, out_frames); 2610 2611 /* 3. Do the exchange for non-contiguous MFNs. */ 2612 success = xen_exchange_memory(1, order, &in_frame, 1UL << order, 2613 0, out_frames, 0); 2614 2615 /* 4. Map new pages in place of old pages. */ 2616 if (success) 2617 xen_remap_exchanged_ptes(vstart, order, out_frames, 0); 2618 else 2619 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); 2620 2621 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2622 } 2623 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region); 2624 2625 #ifdef CONFIG_KEXEC_CORE 2626 phys_addr_t paddr_vmcoreinfo_note(void) 2627 { 2628 if (xen_pv_domain()) 2629 return virt_to_machine(vmcoreinfo_note).maddr; 2630 else 2631 return __pa(vmcoreinfo_note); 2632 } 2633 #endif /* CONFIG_KEXEC_CORE */ 2634