xref: /linux/arch/x86/xen/mmu_pv.c (revision df2e3152f1cb798ed8ffa7e488c50261e6dc50e3)
1 // SPDX-License-Identifier: GPL-2.0
2 
3 /*
4  * Xen mmu operations
5  *
6  * This file contains the various mmu fetch and update operations.
7  * The most important job they must perform is the mapping between the
8  * domain's pfn and the overall machine mfns.
9  *
10  * Xen allows guests to directly update the pagetable, in a controlled
11  * fashion.  In other words, the guest modifies the same pagetable
12  * that the CPU actually uses, which eliminates the overhead of having
13  * a separate shadow pagetable.
14  *
15  * In order to allow this, it falls on the guest domain to map its
16  * notion of a "physical" pfn - which is just a domain-local linear
17  * address - into a real "machine address" which the CPU's MMU can
18  * use.
19  *
20  * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
21  * inserted directly into the pagetable.  When creating a new
22  * pte/pmd/pgd, it converts the passed pfn into an mfn.  Conversely,
23  * when reading the content back with __(pgd|pmd|pte)_val, it converts
24  * the mfn back into a pfn.
25  *
26  * The other constraint is that all pages which make up a pagetable
27  * must be mapped read-only in the guest.  This prevents uncontrolled
28  * guest updates to the pagetable.  Xen strictly enforces this, and
29  * will disallow any pagetable update which will end up mapping a
30  * pagetable page RW, and will disallow using any writable page as a
31  * pagetable.
32  *
33  * Naively, when loading %cr3 with the base of a new pagetable, Xen
34  * would need to validate the whole pagetable before going on.
35  * Naturally, this is quite slow.  The solution is to "pin" a
36  * pagetable, which enforces all the constraints on the pagetable even
37  * when it is not actively in use.  This means that Xen can be assured
38  * that it is still valid when you do load it into %cr3, and doesn't
39  * need to revalidate it.
40  *
41  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
42  */
43 #include <linux/sched/mm.h>
44 #include <linux/debugfs.h>
45 #include <linux/bug.h>
46 #include <linux/vmalloc.h>
47 #include <linux/export.h>
48 #include <linux/init.h>
49 #include <linux/gfp.h>
50 #include <linux/memblock.h>
51 #include <linux/seq_file.h>
52 #include <linux/crash_dump.h>
53 #include <linux/pgtable.h>
54 #ifdef CONFIG_KEXEC_CORE
55 #include <linux/kexec.h>
56 #endif
57 
58 #include <trace/events/xen.h>
59 
60 #include <asm/tlbflush.h>
61 #include <asm/fixmap.h>
62 #include <asm/mmu_context.h>
63 #include <asm/setup.h>
64 #include <asm/paravirt.h>
65 #include <asm/e820/api.h>
66 #include <asm/linkage.h>
67 #include <asm/page.h>
68 #include <asm/init.h>
69 #include <asm/memtype.h>
70 #include <asm/smp.h>
71 #include <asm/tlb.h>
72 
73 #include <asm/xen/hypercall.h>
74 #include <asm/xen/hypervisor.h>
75 
76 #include <xen/xen.h>
77 #include <xen/page.h>
78 #include <xen/interface/xen.h>
79 #include <xen/interface/hvm/hvm_op.h>
80 #include <xen/interface/version.h>
81 #include <xen/interface/memory.h>
82 #include <xen/hvc-console.h>
83 #include <xen/swiotlb-xen.h>
84 
85 #include "xen-ops.h"
86 
87 /*
88  * Prototypes for functions called via PV_CALLEE_SAVE_REGS_THUNK() in order
89  * to avoid warnings with "-Wmissing-prototypes".
90  */
91 pteval_t xen_pte_val(pte_t pte);
92 pgdval_t xen_pgd_val(pgd_t pgd);
93 pmdval_t xen_pmd_val(pmd_t pmd);
94 pudval_t xen_pud_val(pud_t pud);
95 p4dval_t xen_p4d_val(p4d_t p4d);
96 pte_t xen_make_pte(pteval_t pte);
97 pgd_t xen_make_pgd(pgdval_t pgd);
98 pmd_t xen_make_pmd(pmdval_t pmd);
99 pud_t xen_make_pud(pudval_t pud);
100 p4d_t xen_make_p4d(p4dval_t p4d);
101 pte_t xen_make_pte_init(pteval_t pte);
102 
103 #ifdef CONFIG_X86_VSYSCALL_EMULATION
104 /* l3 pud for userspace vsyscall mapping */
105 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
106 #endif
107 
108 /*
109  * Protects atomic reservation decrease/increase against concurrent increases.
110  * Also protects non-atomic updates of current_pages and balloon lists.
111  */
112 static DEFINE_SPINLOCK(xen_reservation_lock);
113 
114 /*
115  * Note about cr3 (pagetable base) values:
116  *
117  * xen_cr3 contains the current logical cr3 value; it contains the
118  * last set cr3.  This may not be the current effective cr3, because
119  * its update may be being lazily deferred.  However, a vcpu looking
120  * at its own cr3 can use this value knowing that it everything will
121  * be self-consistent.
122  *
123  * xen_current_cr3 contains the actual vcpu cr3; it is set once the
124  * hypercall to set the vcpu cr3 is complete (so it may be a little
125  * out of date, but it will never be set early).  If one vcpu is
126  * looking at another vcpu's cr3 value, it should use this variable.
127  */
128 DEFINE_PER_CPU(unsigned long, xen_cr3);	 /* cr3 stored as physaddr */
129 static DEFINE_PER_CPU(unsigned long, xen_current_cr3);	/* actual vcpu cr3 */
130 
131 static phys_addr_t xen_pt_base, xen_pt_size __initdata;
132 
133 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
134 
135 /*
136  * Just beyond the highest usermode address.  STACK_TOP_MAX has a
137  * redzone above it, so round it up to a PGD boundary.
138  */
139 #define USER_LIMIT	((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
140 
141 void make_lowmem_page_readonly(void *vaddr)
142 {
143 	pte_t *pte, ptev;
144 	unsigned long address = (unsigned long)vaddr;
145 	unsigned int level;
146 
147 	pte = lookup_address(address, &level);
148 	if (pte == NULL)
149 		return;		/* vaddr missing */
150 
151 	ptev = pte_wrprotect(*pte);
152 
153 	if (HYPERVISOR_update_va_mapping(address, ptev, 0))
154 		BUG();
155 }
156 
157 void make_lowmem_page_readwrite(void *vaddr)
158 {
159 	pte_t *pte, ptev;
160 	unsigned long address = (unsigned long)vaddr;
161 	unsigned int level;
162 
163 	pte = lookup_address(address, &level);
164 	if (pte == NULL)
165 		return;		/* vaddr missing */
166 
167 	ptev = pte_mkwrite_novma(*pte);
168 
169 	if (HYPERVISOR_update_va_mapping(address, ptev, 0))
170 		BUG();
171 }
172 
173 
174 /*
175  * During early boot all page table pages are pinned, but we do not have struct
176  * pages, so return true until struct pages are ready.
177  */
178 static bool xen_page_pinned(void *ptr)
179 {
180 	if (static_branch_likely(&xen_struct_pages_ready)) {
181 		struct page *page = virt_to_page(ptr);
182 
183 		return PagePinned(page);
184 	}
185 	return true;
186 }
187 
188 static void xen_extend_mmu_update(const struct mmu_update *update)
189 {
190 	struct multicall_space mcs;
191 	struct mmu_update *u;
192 
193 	mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
194 
195 	if (mcs.mc != NULL) {
196 		mcs.mc->args[1]++;
197 	} else {
198 		mcs = __xen_mc_entry(sizeof(*u));
199 		MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
200 	}
201 
202 	u = mcs.args;
203 	*u = *update;
204 }
205 
206 static void xen_extend_mmuext_op(const struct mmuext_op *op)
207 {
208 	struct multicall_space mcs;
209 	struct mmuext_op *u;
210 
211 	mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
212 
213 	if (mcs.mc != NULL) {
214 		mcs.mc->args[1]++;
215 	} else {
216 		mcs = __xen_mc_entry(sizeof(*u));
217 		MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
218 	}
219 
220 	u = mcs.args;
221 	*u = *op;
222 }
223 
224 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
225 {
226 	struct mmu_update u;
227 
228 	preempt_disable();
229 
230 	xen_mc_batch();
231 
232 	/* ptr may be ioremapped for 64-bit pagetable setup */
233 	u.ptr = arbitrary_virt_to_machine(ptr).maddr;
234 	u.val = pmd_val_ma(val);
235 	xen_extend_mmu_update(&u);
236 
237 	xen_mc_issue(XEN_LAZY_MMU);
238 
239 	preempt_enable();
240 }
241 
242 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
243 {
244 	trace_xen_mmu_set_pmd(ptr, val);
245 
246 	/* If page is not pinned, we can just update the entry
247 	   directly */
248 	if (!xen_page_pinned(ptr)) {
249 		*ptr = val;
250 		return;
251 	}
252 
253 	xen_set_pmd_hyper(ptr, val);
254 }
255 
256 /*
257  * Associate a virtual page frame with a given physical page frame
258  * and protection flags for that frame.
259  */
260 void __init set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
261 {
262 	if (HYPERVISOR_update_va_mapping(vaddr, mfn_pte(mfn, flags),
263 					 UVMF_INVLPG))
264 		BUG();
265 }
266 
267 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
268 {
269 	struct mmu_update u;
270 
271 	if (xen_get_lazy_mode() != XEN_LAZY_MMU)
272 		return false;
273 
274 	xen_mc_batch();
275 
276 	u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
277 	u.val = pte_val_ma(pteval);
278 	xen_extend_mmu_update(&u);
279 
280 	xen_mc_issue(XEN_LAZY_MMU);
281 
282 	return true;
283 }
284 
285 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
286 {
287 	if (!xen_batched_set_pte(ptep, pteval)) {
288 		/*
289 		 * Could call native_set_pte() here and trap and
290 		 * emulate the PTE write, but a hypercall is much cheaper.
291 		 */
292 		struct mmu_update u;
293 
294 		u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
295 		u.val = pte_val_ma(pteval);
296 		HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
297 	}
298 }
299 
300 static void xen_set_pte(pte_t *ptep, pte_t pteval)
301 {
302 	trace_xen_mmu_set_pte(ptep, pteval);
303 	__xen_set_pte(ptep, pteval);
304 }
305 
306 static pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma,
307 					unsigned long addr, pte_t *ptep)
308 {
309 	/* Just return the pte as-is.  We preserve the bits on commit */
310 	trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep);
311 	return *ptep;
312 }
313 
314 static void xen_ptep_modify_prot_commit(struct vm_area_struct *vma,
315 					unsigned long addr,
316 					pte_t *ptep, pte_t pte)
317 {
318 	struct mmu_update u;
319 
320 	trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte);
321 	xen_mc_batch();
322 
323 	u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
324 	u.val = pte_val_ma(pte);
325 	xen_extend_mmu_update(&u);
326 
327 	xen_mc_issue(XEN_LAZY_MMU);
328 }
329 
330 /* Assume pteval_t is equivalent to all the other *val_t types. */
331 static pteval_t pte_mfn_to_pfn(pteval_t val)
332 {
333 	if (val & _PAGE_PRESENT) {
334 		unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
335 		unsigned long pfn = mfn_to_pfn(mfn);
336 
337 		pteval_t flags = val & PTE_FLAGS_MASK;
338 		if (unlikely(pfn == ~0))
339 			val = flags & ~_PAGE_PRESENT;
340 		else
341 			val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
342 	}
343 
344 	return val;
345 }
346 
347 static pteval_t pte_pfn_to_mfn(pteval_t val)
348 {
349 	if (val & _PAGE_PRESENT) {
350 		unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
351 		pteval_t flags = val & PTE_FLAGS_MASK;
352 		unsigned long mfn;
353 
354 		mfn = __pfn_to_mfn(pfn);
355 
356 		/*
357 		 * If there's no mfn for the pfn, then just create an
358 		 * empty non-present pte.  Unfortunately this loses
359 		 * information about the original pfn, so
360 		 * pte_mfn_to_pfn is asymmetric.
361 		 */
362 		if (unlikely(mfn == INVALID_P2M_ENTRY)) {
363 			mfn = 0;
364 			flags = 0;
365 		} else
366 			mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
367 		val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
368 	}
369 
370 	return val;
371 }
372 
373 __visible pteval_t xen_pte_val(pte_t pte)
374 {
375 	pteval_t pteval = pte.pte;
376 
377 	return pte_mfn_to_pfn(pteval);
378 }
379 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
380 
381 __visible pgdval_t xen_pgd_val(pgd_t pgd)
382 {
383 	return pte_mfn_to_pfn(pgd.pgd);
384 }
385 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
386 
387 __visible pte_t xen_make_pte(pteval_t pte)
388 {
389 	pte = pte_pfn_to_mfn(pte);
390 
391 	return native_make_pte(pte);
392 }
393 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
394 
395 __visible pgd_t xen_make_pgd(pgdval_t pgd)
396 {
397 	pgd = pte_pfn_to_mfn(pgd);
398 	return native_make_pgd(pgd);
399 }
400 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
401 
402 __visible pmdval_t xen_pmd_val(pmd_t pmd)
403 {
404 	return pte_mfn_to_pfn(pmd.pmd);
405 }
406 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
407 
408 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
409 {
410 	struct mmu_update u;
411 
412 	preempt_disable();
413 
414 	xen_mc_batch();
415 
416 	/* ptr may be ioremapped for 64-bit pagetable setup */
417 	u.ptr = arbitrary_virt_to_machine(ptr).maddr;
418 	u.val = pud_val_ma(val);
419 	xen_extend_mmu_update(&u);
420 
421 	xen_mc_issue(XEN_LAZY_MMU);
422 
423 	preempt_enable();
424 }
425 
426 static void xen_set_pud(pud_t *ptr, pud_t val)
427 {
428 	trace_xen_mmu_set_pud(ptr, val);
429 
430 	/* If page is not pinned, we can just update the entry
431 	   directly */
432 	if (!xen_page_pinned(ptr)) {
433 		*ptr = val;
434 		return;
435 	}
436 
437 	xen_set_pud_hyper(ptr, val);
438 }
439 
440 __visible pmd_t xen_make_pmd(pmdval_t pmd)
441 {
442 	pmd = pte_pfn_to_mfn(pmd);
443 	return native_make_pmd(pmd);
444 }
445 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
446 
447 __visible pudval_t xen_pud_val(pud_t pud)
448 {
449 	return pte_mfn_to_pfn(pud.pud);
450 }
451 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
452 
453 __visible pud_t xen_make_pud(pudval_t pud)
454 {
455 	pud = pte_pfn_to_mfn(pud);
456 
457 	return native_make_pud(pud);
458 }
459 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
460 
461 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
462 {
463 	pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
464 	unsigned offset = pgd - pgd_page;
465 	pgd_t *user_ptr = NULL;
466 
467 	if (offset < pgd_index(USER_LIMIT)) {
468 		struct page *page = virt_to_page(pgd_page);
469 		user_ptr = (pgd_t *)page->private;
470 		if (user_ptr)
471 			user_ptr += offset;
472 	}
473 
474 	return user_ptr;
475 }
476 
477 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
478 {
479 	struct mmu_update u;
480 
481 	u.ptr = virt_to_machine(ptr).maddr;
482 	u.val = p4d_val_ma(val);
483 	xen_extend_mmu_update(&u);
484 }
485 
486 /*
487  * Raw hypercall-based set_p4d, intended for in early boot before
488  * there's a page structure.  This implies:
489  *  1. The only existing pagetable is the kernel's
490  *  2. It is always pinned
491  *  3. It has no user pagetable attached to it
492  */
493 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
494 {
495 	preempt_disable();
496 
497 	xen_mc_batch();
498 
499 	__xen_set_p4d_hyper(ptr, val);
500 
501 	xen_mc_issue(XEN_LAZY_MMU);
502 
503 	preempt_enable();
504 }
505 
506 static void xen_set_p4d(p4d_t *ptr, p4d_t val)
507 {
508 	pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
509 	pgd_t pgd_val;
510 
511 	trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
512 
513 	/* If page is not pinned, we can just update the entry
514 	   directly */
515 	if (!xen_page_pinned(ptr)) {
516 		*ptr = val;
517 		if (user_ptr) {
518 			WARN_ON(xen_page_pinned(user_ptr));
519 			pgd_val.pgd = p4d_val_ma(val);
520 			*user_ptr = pgd_val;
521 		}
522 		return;
523 	}
524 
525 	/* If it's pinned, then we can at least batch the kernel and
526 	   user updates together. */
527 	xen_mc_batch();
528 
529 	__xen_set_p4d_hyper(ptr, val);
530 	if (user_ptr)
531 		__xen_set_p4d_hyper((p4d_t *)user_ptr, val);
532 
533 	xen_mc_issue(XEN_LAZY_MMU);
534 }
535 
536 #if CONFIG_PGTABLE_LEVELS >= 5
537 __visible p4dval_t xen_p4d_val(p4d_t p4d)
538 {
539 	return pte_mfn_to_pfn(p4d.p4d);
540 }
541 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
542 
543 __visible p4d_t xen_make_p4d(p4dval_t p4d)
544 {
545 	p4d = pte_pfn_to_mfn(p4d);
546 
547 	return native_make_p4d(p4d);
548 }
549 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
550 #endif  /* CONFIG_PGTABLE_LEVELS >= 5 */
551 
552 static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
553 			 void (*func)(struct mm_struct *mm, struct page *,
554 				      enum pt_level),
555 			 bool last, unsigned long limit)
556 {
557 	int i, nr;
558 
559 	nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
560 	for (i = 0; i < nr; i++) {
561 		if (!pmd_none(pmd[i]))
562 			(*func)(mm, pmd_page(pmd[i]), PT_PTE);
563 	}
564 }
565 
566 static void xen_pud_walk(struct mm_struct *mm, pud_t *pud,
567 			 void (*func)(struct mm_struct *mm, struct page *,
568 				      enum pt_level),
569 			 bool last, unsigned long limit)
570 {
571 	int i, nr;
572 
573 	nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
574 	for (i = 0; i < nr; i++) {
575 		pmd_t *pmd;
576 
577 		if (pud_none(pud[i]))
578 			continue;
579 
580 		pmd = pmd_offset(&pud[i], 0);
581 		if (PTRS_PER_PMD > 1)
582 			(*func)(mm, virt_to_page(pmd), PT_PMD);
583 		xen_pmd_walk(mm, pmd, func, last && i == nr - 1, limit);
584 	}
585 }
586 
587 static void xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
588 			 void (*func)(struct mm_struct *mm, struct page *,
589 				      enum pt_level),
590 			 bool last, unsigned long limit)
591 {
592 	pud_t *pud;
593 
594 
595 	if (p4d_none(*p4d))
596 		return;
597 
598 	pud = pud_offset(p4d, 0);
599 	if (PTRS_PER_PUD > 1)
600 		(*func)(mm, virt_to_page(pud), PT_PUD);
601 	xen_pud_walk(mm, pud, func, last, limit);
602 }
603 
604 /*
605  * (Yet another) pagetable walker.  This one is intended for pinning a
606  * pagetable.  This means that it walks a pagetable and calls the
607  * callback function on each page it finds making up the page table,
608  * at every level.  It walks the entire pagetable, but it only bothers
609  * pinning pte pages which are below limit.  In the normal case this
610  * will be STACK_TOP_MAX, but at boot we need to pin up to
611  * FIXADDR_TOP.
612  *
613  * We must skip the Xen hole in the middle of the address space, just after
614  * the big x86-64 virtual hole.
615  */
616 static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
617 			   void (*func)(struct mm_struct *mm, struct page *,
618 					enum pt_level),
619 			   unsigned long limit)
620 {
621 	int i, nr;
622 	unsigned hole_low = 0, hole_high = 0;
623 
624 	/* The limit is the last byte to be touched */
625 	limit--;
626 	BUG_ON(limit >= FIXADDR_TOP);
627 
628 	/*
629 	 * 64-bit has a great big hole in the middle of the address
630 	 * space, which contains the Xen mappings.
631 	 */
632 	hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
633 	hole_high = pgd_index(GUARD_HOLE_END_ADDR);
634 
635 	nr = pgd_index(limit) + 1;
636 	for (i = 0; i < nr; i++) {
637 		p4d_t *p4d;
638 
639 		if (i >= hole_low && i < hole_high)
640 			continue;
641 
642 		if (pgd_none(pgd[i]))
643 			continue;
644 
645 		p4d = p4d_offset(&pgd[i], 0);
646 		xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
647 	}
648 
649 	/* Do the top level last, so that the callbacks can use it as
650 	   a cue to do final things like tlb flushes. */
651 	(*func)(mm, virt_to_page(pgd), PT_PGD);
652 }
653 
654 static void xen_pgd_walk(struct mm_struct *mm,
655 			 void (*func)(struct mm_struct *mm, struct page *,
656 				      enum pt_level),
657 			 unsigned long limit)
658 {
659 	__xen_pgd_walk(mm, mm->pgd, func, limit);
660 }
661 
662 /* If we're using split pte locks, then take the page's lock and
663    return a pointer to it.  Otherwise return NULL. */
664 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
665 {
666 	spinlock_t *ptl = NULL;
667 
668 #if defined(CONFIG_SPLIT_PTE_PTLOCKS)
669 	ptl = ptlock_ptr(page_ptdesc(page));
670 	spin_lock_nest_lock(ptl, &mm->page_table_lock);
671 #endif
672 
673 	return ptl;
674 }
675 
676 static void xen_pte_unlock(void *v)
677 {
678 	spinlock_t *ptl = v;
679 	spin_unlock(ptl);
680 }
681 
682 static void xen_do_pin(unsigned level, unsigned long pfn)
683 {
684 	struct mmuext_op op;
685 
686 	op.cmd = level;
687 	op.arg1.mfn = pfn_to_mfn(pfn);
688 
689 	xen_extend_mmuext_op(&op);
690 }
691 
692 static void xen_pin_page(struct mm_struct *mm, struct page *page,
693 			 enum pt_level level)
694 {
695 	unsigned pgfl = TestSetPagePinned(page);
696 
697 	if (!pgfl) {
698 		void *pt = lowmem_page_address(page);
699 		unsigned long pfn = page_to_pfn(page);
700 		struct multicall_space mcs = __xen_mc_entry(0);
701 		spinlock_t *ptl;
702 
703 		/*
704 		 * We need to hold the pagetable lock between the time
705 		 * we make the pagetable RO and when we actually pin
706 		 * it.  If we don't, then other users may come in and
707 		 * attempt to update the pagetable by writing it,
708 		 * which will fail because the memory is RO but not
709 		 * pinned, so Xen won't do the trap'n'emulate.
710 		 *
711 		 * If we're using split pte locks, we can't hold the
712 		 * entire pagetable's worth of locks during the
713 		 * traverse, because we may wrap the preempt count (8
714 		 * bits).  The solution is to mark RO and pin each PTE
715 		 * page while holding the lock.  This means the number
716 		 * of locks we end up holding is never more than a
717 		 * batch size (~32 entries, at present).
718 		 *
719 		 * If we're not using split pte locks, we needn't pin
720 		 * the PTE pages independently, because we're
721 		 * protected by the overall pagetable lock.
722 		 */
723 		ptl = NULL;
724 		if (level == PT_PTE)
725 			ptl = xen_pte_lock(page, mm);
726 
727 		MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
728 					pfn_pte(pfn, PAGE_KERNEL_RO),
729 					level == PT_PGD ? UVMF_TLB_FLUSH : 0);
730 
731 		if (ptl) {
732 			xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
733 
734 			/* Queue a deferred unlock for when this batch
735 			   is completed. */
736 			xen_mc_callback(xen_pte_unlock, ptl);
737 		}
738 	}
739 }
740 
741 /* This is called just after a mm has been created, but it has not
742    been used yet.  We need to make sure that its pagetable is all
743    read-only, and can be pinned. */
744 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
745 {
746 	pgd_t *user_pgd = xen_get_user_pgd(pgd);
747 
748 	trace_xen_mmu_pgd_pin(mm, pgd);
749 
750 	xen_mc_batch();
751 
752 	__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT);
753 
754 	xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
755 
756 	if (user_pgd) {
757 		xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
758 		xen_do_pin(MMUEXT_PIN_L4_TABLE,
759 			   PFN_DOWN(__pa(user_pgd)));
760 	}
761 
762 	xen_mc_issue(0);
763 }
764 
765 static void xen_pgd_pin(struct mm_struct *mm)
766 {
767 	__xen_pgd_pin(mm, mm->pgd);
768 }
769 
770 /*
771  * On save, we need to pin all pagetables to make sure they get their
772  * mfns turned into pfns.  Search the list for any unpinned pgds and pin
773  * them (unpinned pgds are not currently in use, probably because the
774  * process is under construction or destruction).
775  *
776  * Expected to be called in stop_machine() ("equivalent to taking
777  * every spinlock in the system"), so the locking doesn't really
778  * matter all that much.
779  */
780 void xen_mm_pin_all(void)
781 {
782 	struct page *page;
783 
784 	spin_lock(&init_mm.page_table_lock);
785 	spin_lock(&pgd_lock);
786 
787 	list_for_each_entry(page, &pgd_list, lru) {
788 		if (!PagePinned(page)) {
789 			__xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
790 			SetPageSavePinned(page);
791 		}
792 	}
793 
794 	spin_unlock(&pgd_lock);
795 	spin_unlock(&init_mm.page_table_lock);
796 }
797 
798 static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
799 				   enum pt_level level)
800 {
801 	SetPagePinned(page);
802 }
803 
804 /*
805  * The init_mm pagetable is really pinned as soon as its created, but
806  * that's before we have page structures to store the bits.  So do all
807  * the book-keeping now once struct pages for allocated pages are
808  * initialized. This happens only after memblock_free_all() is called.
809  */
810 static void __init xen_after_bootmem(void)
811 {
812 	static_branch_enable(&xen_struct_pages_ready);
813 #ifdef CONFIG_X86_VSYSCALL_EMULATION
814 	SetPagePinned(virt_to_page(level3_user_vsyscall));
815 #endif
816 	xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
817 }
818 
819 static void xen_unpin_page(struct mm_struct *mm, struct page *page,
820 			   enum pt_level level)
821 {
822 	unsigned pgfl = TestClearPagePinned(page);
823 
824 	if (pgfl) {
825 		void *pt = lowmem_page_address(page);
826 		unsigned long pfn = page_to_pfn(page);
827 		spinlock_t *ptl = NULL;
828 		struct multicall_space mcs;
829 
830 		/*
831 		 * Do the converse to pin_page.  If we're using split
832 		 * pte locks, we must be holding the lock for while
833 		 * the pte page is unpinned but still RO to prevent
834 		 * concurrent updates from seeing it in this
835 		 * partially-pinned state.
836 		 */
837 		if (level == PT_PTE) {
838 			ptl = xen_pte_lock(page, mm);
839 
840 			if (ptl)
841 				xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
842 		}
843 
844 		mcs = __xen_mc_entry(0);
845 
846 		MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
847 					pfn_pte(pfn, PAGE_KERNEL),
848 					level == PT_PGD ? UVMF_TLB_FLUSH : 0);
849 
850 		if (ptl) {
851 			/* unlock when batch completed */
852 			xen_mc_callback(xen_pte_unlock, ptl);
853 		}
854 	}
855 }
856 
857 /* Release a pagetables pages back as normal RW */
858 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
859 {
860 	pgd_t *user_pgd = xen_get_user_pgd(pgd);
861 
862 	trace_xen_mmu_pgd_unpin(mm, pgd);
863 
864 	xen_mc_batch();
865 
866 	xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
867 
868 	if (user_pgd) {
869 		xen_do_pin(MMUEXT_UNPIN_TABLE,
870 			   PFN_DOWN(__pa(user_pgd)));
871 		xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
872 	}
873 
874 	__xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
875 
876 	xen_mc_issue(0);
877 }
878 
879 static void xen_pgd_unpin(struct mm_struct *mm)
880 {
881 	__xen_pgd_unpin(mm, mm->pgd);
882 }
883 
884 /*
885  * On resume, undo any pinning done at save, so that the rest of the
886  * kernel doesn't see any unexpected pinned pagetables.
887  */
888 void xen_mm_unpin_all(void)
889 {
890 	struct page *page;
891 
892 	spin_lock(&init_mm.page_table_lock);
893 	spin_lock(&pgd_lock);
894 
895 	list_for_each_entry(page, &pgd_list, lru) {
896 		if (PageSavePinned(page)) {
897 			BUG_ON(!PagePinned(page));
898 			__xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
899 			ClearPageSavePinned(page);
900 		}
901 	}
902 
903 	spin_unlock(&pgd_lock);
904 	spin_unlock(&init_mm.page_table_lock);
905 }
906 
907 static void xen_enter_mmap(struct mm_struct *mm)
908 {
909 	spin_lock(&mm->page_table_lock);
910 	xen_pgd_pin(mm);
911 	spin_unlock(&mm->page_table_lock);
912 }
913 
914 static void drop_mm_ref_this_cpu(void *info)
915 {
916 	struct mm_struct *mm = info;
917 
918 	if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
919 		leave_mm();
920 
921 	/*
922 	 * If this cpu still has a stale cr3 reference, then make sure
923 	 * it has been flushed.
924 	 */
925 	if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
926 		xen_mc_flush();
927 }
928 
929 #ifdef CONFIG_SMP
930 /*
931  * Another cpu may still have their %cr3 pointing at the pagetable, so
932  * we need to repoint it somewhere else before we can unpin it.
933  */
934 static void xen_drop_mm_ref(struct mm_struct *mm)
935 {
936 	cpumask_var_t mask;
937 	unsigned cpu;
938 
939 	drop_mm_ref_this_cpu(mm);
940 
941 	/* Get the "official" set of cpus referring to our pagetable. */
942 	if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
943 		for_each_online_cpu(cpu) {
944 			if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
945 				continue;
946 			smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
947 		}
948 		return;
949 	}
950 
951 	/*
952 	 * It's possible that a vcpu may have a stale reference to our
953 	 * cr3, because its in lazy mode, and it hasn't yet flushed
954 	 * its set of pending hypercalls yet.  In this case, we can
955 	 * look at its actual current cr3 value, and force it to flush
956 	 * if needed.
957 	 */
958 	cpumask_clear(mask);
959 	for_each_online_cpu(cpu) {
960 		if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
961 			cpumask_set_cpu(cpu, mask);
962 	}
963 
964 	smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
965 	free_cpumask_var(mask);
966 }
967 #else
968 static void xen_drop_mm_ref(struct mm_struct *mm)
969 {
970 	drop_mm_ref_this_cpu(mm);
971 }
972 #endif
973 
974 /*
975  * While a process runs, Xen pins its pagetables, which means that the
976  * hypervisor forces it to be read-only, and it controls all updates
977  * to it.  This means that all pagetable updates have to go via the
978  * hypervisor, which is moderately expensive.
979  *
980  * Since we're pulling the pagetable down, we switch to use init_mm,
981  * unpin old process pagetable and mark it all read-write, which
982  * allows further operations on it to be simple memory accesses.
983  *
984  * The only subtle point is that another CPU may be still using the
985  * pagetable because of lazy tlb flushing.  This means we need need to
986  * switch all CPUs off this pagetable before we can unpin it.
987  */
988 static void xen_exit_mmap(struct mm_struct *mm)
989 {
990 	get_cpu();		/* make sure we don't move around */
991 	xen_drop_mm_ref(mm);
992 	put_cpu();
993 
994 	spin_lock(&mm->page_table_lock);
995 
996 	/* pgd may not be pinned in the error exit path of execve */
997 	if (xen_page_pinned(mm->pgd))
998 		xen_pgd_unpin(mm);
999 
1000 	spin_unlock(&mm->page_table_lock);
1001 }
1002 
1003 static void xen_post_allocator_init(void);
1004 
1005 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1006 {
1007 	struct mmuext_op op;
1008 
1009 	op.cmd = cmd;
1010 	op.arg1.mfn = pfn_to_mfn(pfn);
1011 	if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1012 		BUG();
1013 }
1014 
1015 static void __init xen_cleanhighmap(unsigned long vaddr,
1016 				    unsigned long vaddr_end)
1017 {
1018 	unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1019 	pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1020 
1021 	/* NOTE: The loop is more greedy than the cleanup_highmap variant.
1022 	 * We include the PMD passed in on _both_ boundaries. */
1023 	for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1024 			pmd++, vaddr += PMD_SIZE) {
1025 		if (pmd_none(*pmd))
1026 			continue;
1027 		if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1028 			set_pmd(pmd, __pmd(0));
1029 	}
1030 	/* In case we did something silly, we should crash in this function
1031 	 * instead of somewhere later and be confusing. */
1032 	xen_mc_flush();
1033 }
1034 
1035 /*
1036  * Make a page range writeable and free it.
1037  */
1038 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1039 {
1040 	void *vaddr = __va(paddr);
1041 	void *vaddr_end = vaddr + size;
1042 
1043 	for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1044 		make_lowmem_page_readwrite(vaddr);
1045 
1046 	memblock_phys_free(paddr, size);
1047 }
1048 
1049 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1050 {
1051 	unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1052 
1053 	if (unpin)
1054 		pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1055 	ClearPagePinned(virt_to_page(__va(pa)));
1056 	xen_free_ro_pages(pa, PAGE_SIZE);
1057 }
1058 
1059 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1060 {
1061 	unsigned long pa;
1062 	pte_t *pte_tbl;
1063 	int i;
1064 
1065 	if (pmd_leaf(*pmd)) {
1066 		pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1067 		xen_free_ro_pages(pa, PMD_SIZE);
1068 		return;
1069 	}
1070 
1071 	pte_tbl = pte_offset_kernel(pmd, 0);
1072 	for (i = 0; i < PTRS_PER_PTE; i++) {
1073 		if (pte_none(pte_tbl[i]))
1074 			continue;
1075 		pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1076 		xen_free_ro_pages(pa, PAGE_SIZE);
1077 	}
1078 	set_pmd(pmd, __pmd(0));
1079 	xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1080 }
1081 
1082 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1083 {
1084 	unsigned long pa;
1085 	pmd_t *pmd_tbl;
1086 	int i;
1087 
1088 	if (pud_leaf(*pud)) {
1089 		pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1090 		xen_free_ro_pages(pa, PUD_SIZE);
1091 		return;
1092 	}
1093 
1094 	pmd_tbl = pmd_offset(pud, 0);
1095 	for (i = 0; i < PTRS_PER_PMD; i++) {
1096 		if (pmd_none(pmd_tbl[i]))
1097 			continue;
1098 		xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1099 	}
1100 	set_pud(pud, __pud(0));
1101 	xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1102 }
1103 
1104 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1105 {
1106 	unsigned long pa;
1107 	pud_t *pud_tbl;
1108 	int i;
1109 
1110 	if (p4d_leaf(*p4d)) {
1111 		pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1112 		xen_free_ro_pages(pa, P4D_SIZE);
1113 		return;
1114 	}
1115 
1116 	pud_tbl = pud_offset(p4d, 0);
1117 	for (i = 0; i < PTRS_PER_PUD; i++) {
1118 		if (pud_none(pud_tbl[i]))
1119 			continue;
1120 		xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1121 	}
1122 	set_p4d(p4d, __p4d(0));
1123 	xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1124 }
1125 
1126 /*
1127  * Since it is well isolated we can (and since it is perhaps large we should)
1128  * also free the page tables mapping the initial P->M table.
1129  */
1130 static void __init xen_cleanmfnmap(unsigned long vaddr)
1131 {
1132 	pgd_t *pgd;
1133 	p4d_t *p4d;
1134 	bool unpin;
1135 
1136 	unpin = (vaddr == 2 * PGDIR_SIZE);
1137 	vaddr &= PMD_MASK;
1138 	pgd = pgd_offset_k(vaddr);
1139 	p4d = p4d_offset(pgd, 0);
1140 	if (!p4d_none(*p4d))
1141 		xen_cleanmfnmap_p4d(p4d, unpin);
1142 }
1143 
1144 static void __init xen_pagetable_p2m_free(void)
1145 {
1146 	unsigned long size;
1147 	unsigned long addr;
1148 
1149 	size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1150 
1151 	/* No memory or already called. */
1152 	if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1153 		return;
1154 
1155 	/* using __ka address and sticking INVALID_P2M_ENTRY! */
1156 	memset((void *)xen_start_info->mfn_list, 0xff, size);
1157 
1158 	addr = xen_start_info->mfn_list;
1159 	/*
1160 	 * We could be in __ka space.
1161 	 * We roundup to the PMD, which means that if anybody at this stage is
1162 	 * using the __ka address of xen_start_info or
1163 	 * xen_start_info->shared_info they are in going to crash. Fortunately
1164 	 * we have already revectored in xen_setup_kernel_pagetable.
1165 	 */
1166 	size = roundup(size, PMD_SIZE);
1167 
1168 	if (addr >= __START_KERNEL_map) {
1169 		xen_cleanhighmap(addr, addr + size);
1170 		size = PAGE_ALIGN(xen_start_info->nr_pages *
1171 				  sizeof(unsigned long));
1172 		memblock_free((void *)addr, size);
1173 	} else {
1174 		xen_cleanmfnmap(addr);
1175 	}
1176 }
1177 
1178 static void __init xen_pagetable_cleanhighmap(void)
1179 {
1180 	unsigned long size;
1181 	unsigned long addr;
1182 
1183 	/* At this stage, cleanup_highmap has already cleaned __ka space
1184 	 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1185 	 * the ramdisk). We continue on, erasing PMD entries that point to page
1186 	 * tables - do note that they are accessible at this stage via __va.
1187 	 * As Xen is aligning the memory end to a 4MB boundary, for good
1188 	 * measure we also round up to PMD_SIZE * 2 - which means that if
1189 	 * anybody is using __ka address to the initial boot-stack - and try
1190 	 * to use it - they are going to crash. The xen_start_info has been
1191 	 * taken care of already in xen_setup_kernel_pagetable. */
1192 	addr = xen_start_info->pt_base;
1193 	size = xen_start_info->nr_pt_frames * PAGE_SIZE;
1194 
1195 	xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
1196 	xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1197 }
1198 
1199 static void __init xen_pagetable_p2m_setup(void)
1200 {
1201 	xen_vmalloc_p2m_tree();
1202 
1203 	xen_pagetable_p2m_free();
1204 
1205 	xen_pagetable_cleanhighmap();
1206 
1207 	/* And revector! Bye bye old array */
1208 	xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1209 }
1210 
1211 static void __init xen_pagetable_init(void)
1212 {
1213 	/*
1214 	 * The majority of further PTE writes is to pagetables already
1215 	 * announced as such to Xen. Hence it is more efficient to use
1216 	 * hypercalls for these updates.
1217 	 */
1218 	pv_ops.mmu.set_pte = __xen_set_pte;
1219 
1220 	paging_init();
1221 	xen_post_allocator_init();
1222 
1223 	xen_pagetable_p2m_setup();
1224 
1225 	/* Allocate and initialize top and mid mfn levels for p2m structure */
1226 	xen_build_mfn_list_list();
1227 
1228 	/* Remap memory freed due to conflicts with E820 map */
1229 	xen_remap_memory();
1230 	xen_setup_mfn_list_list();
1231 }
1232 
1233 static noinstr void xen_write_cr2(unsigned long cr2)
1234 {
1235 	this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1236 }
1237 
1238 static noinline void xen_flush_tlb(void)
1239 {
1240 	struct mmuext_op *op;
1241 	struct multicall_space mcs;
1242 
1243 	preempt_disable();
1244 
1245 	mcs = xen_mc_entry(sizeof(*op));
1246 
1247 	op = mcs.args;
1248 	op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1249 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1250 
1251 	xen_mc_issue(XEN_LAZY_MMU);
1252 
1253 	preempt_enable();
1254 }
1255 
1256 static void xen_flush_tlb_one_user(unsigned long addr)
1257 {
1258 	struct mmuext_op *op;
1259 	struct multicall_space mcs;
1260 
1261 	trace_xen_mmu_flush_tlb_one_user(addr);
1262 
1263 	preempt_disable();
1264 
1265 	mcs = xen_mc_entry(sizeof(*op));
1266 	op = mcs.args;
1267 	op->cmd = MMUEXT_INVLPG_LOCAL;
1268 	op->arg1.linear_addr = addr & PAGE_MASK;
1269 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1270 
1271 	xen_mc_issue(XEN_LAZY_MMU);
1272 
1273 	preempt_enable();
1274 }
1275 
1276 static void xen_flush_tlb_multi(const struct cpumask *cpus,
1277 				const struct flush_tlb_info *info)
1278 {
1279 	struct {
1280 		struct mmuext_op op;
1281 		DECLARE_BITMAP(mask, NR_CPUS);
1282 	} *args;
1283 	struct multicall_space mcs;
1284 	const size_t mc_entry_size = sizeof(args->op) +
1285 		sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
1286 
1287 	trace_xen_mmu_flush_tlb_multi(cpus, info->mm, info->start, info->end);
1288 
1289 	if (cpumask_empty(cpus))
1290 		return;		/* nothing to do */
1291 
1292 	mcs = xen_mc_entry(mc_entry_size);
1293 	args = mcs.args;
1294 	args->op.arg2.vcpumask = to_cpumask(args->mask);
1295 
1296 	/* Remove any offline CPUs */
1297 	cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1298 
1299 	args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1300 	if (info->end != TLB_FLUSH_ALL &&
1301 	    (info->end - info->start) <= PAGE_SIZE) {
1302 		args->op.cmd = MMUEXT_INVLPG_MULTI;
1303 		args->op.arg1.linear_addr = info->start;
1304 	}
1305 
1306 	MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1307 
1308 	xen_mc_issue(XEN_LAZY_MMU);
1309 }
1310 
1311 static unsigned long xen_read_cr3(void)
1312 {
1313 	return this_cpu_read(xen_cr3);
1314 }
1315 
1316 static void set_current_cr3(void *v)
1317 {
1318 	this_cpu_write(xen_current_cr3, (unsigned long)v);
1319 }
1320 
1321 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1322 {
1323 	struct mmuext_op op;
1324 	unsigned long mfn;
1325 
1326 	trace_xen_mmu_write_cr3(kernel, cr3);
1327 
1328 	if (cr3)
1329 		mfn = pfn_to_mfn(PFN_DOWN(cr3));
1330 	else
1331 		mfn = 0;
1332 
1333 	WARN_ON(mfn == 0 && kernel);
1334 
1335 	op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1336 	op.arg1.mfn = mfn;
1337 
1338 	xen_extend_mmuext_op(&op);
1339 
1340 	if (kernel) {
1341 		this_cpu_write(xen_cr3, cr3);
1342 
1343 		/* Update xen_current_cr3 once the batch has actually
1344 		   been submitted. */
1345 		xen_mc_callback(set_current_cr3, (void *)cr3);
1346 	}
1347 }
1348 static void xen_write_cr3(unsigned long cr3)
1349 {
1350 	pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1351 
1352 	BUG_ON(preemptible());
1353 
1354 	xen_mc_batch();  /* disables interrupts */
1355 
1356 	/* Update while interrupts are disabled, so its atomic with
1357 	   respect to ipis */
1358 	this_cpu_write(xen_cr3, cr3);
1359 
1360 	__xen_write_cr3(true, cr3);
1361 
1362 	if (user_pgd)
1363 		__xen_write_cr3(false, __pa(user_pgd));
1364 	else
1365 		__xen_write_cr3(false, 0);
1366 
1367 	xen_mc_issue(XEN_LAZY_CPU);  /* interrupts restored */
1368 }
1369 
1370 /*
1371  * At the start of the day - when Xen launches a guest, it has already
1372  * built pagetables for the guest. We diligently look over them
1373  * in xen_setup_kernel_pagetable and graft as appropriate them in the
1374  * init_top_pgt and its friends. Then when we are happy we load
1375  * the new init_top_pgt - and continue on.
1376  *
1377  * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1378  * up the rest of the pagetables. When it has completed it loads the cr3.
1379  * N.B. that baremetal would start at 'start_kernel' (and the early
1380  * #PF handler would create bootstrap pagetables) - so we are running
1381  * with the same assumptions as what to do when write_cr3 is executed
1382  * at this point.
1383  *
1384  * Since there are no user-page tables at all, we have two variants
1385  * of xen_write_cr3 - the early bootup (this one), and the late one
1386  * (xen_write_cr3). The reason we have to do that is that in 64-bit
1387  * the Linux kernel and user-space are both in ring 3 while the
1388  * hypervisor is in ring 0.
1389  */
1390 static void __init xen_write_cr3_init(unsigned long cr3)
1391 {
1392 	BUG_ON(preemptible());
1393 
1394 	xen_mc_batch();  /* disables interrupts */
1395 
1396 	/* Update while interrupts are disabled, so its atomic with
1397 	   respect to ipis */
1398 	this_cpu_write(xen_cr3, cr3);
1399 
1400 	__xen_write_cr3(true, cr3);
1401 
1402 	xen_mc_issue(XEN_LAZY_CPU);  /* interrupts restored */
1403 }
1404 
1405 static int xen_pgd_alloc(struct mm_struct *mm)
1406 {
1407 	pgd_t *pgd = mm->pgd;
1408 	struct page *page = virt_to_page(pgd);
1409 	pgd_t *user_pgd;
1410 	int ret = -ENOMEM;
1411 
1412 	BUG_ON(PagePinned(virt_to_page(pgd)));
1413 	BUG_ON(page->private != 0);
1414 
1415 	user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1416 	page->private = (unsigned long)user_pgd;
1417 
1418 	if (user_pgd != NULL) {
1419 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1420 		user_pgd[pgd_index(VSYSCALL_ADDR)] =
1421 			__pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1422 #endif
1423 		ret = 0;
1424 	}
1425 
1426 	BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1427 
1428 	return ret;
1429 }
1430 
1431 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1432 {
1433 	pgd_t *user_pgd = xen_get_user_pgd(pgd);
1434 
1435 	if (user_pgd)
1436 		free_page((unsigned long)user_pgd);
1437 }
1438 
1439 /*
1440  * Init-time set_pte while constructing initial pagetables, which
1441  * doesn't allow RO page table pages to be remapped RW.
1442  *
1443  * If there is no MFN for this PFN then this page is initially
1444  * ballooned out so clear the PTE (as in decrease_reservation() in
1445  * drivers/xen/balloon.c).
1446  *
1447  * Many of these PTE updates are done on unpinned and writable pages
1448  * and doing a hypercall for these is unnecessary and expensive.  At
1449  * this point it is rarely possible to tell if a page is pinned, so
1450  * mostly write the PTE directly and rely on Xen trapping and
1451  * emulating any updates as necessary.
1452  */
1453 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1454 {
1455 	if (unlikely(is_early_ioremap_ptep(ptep)))
1456 		__xen_set_pte(ptep, pte);
1457 	else
1458 		native_set_pte(ptep, pte);
1459 }
1460 
1461 __visible pte_t xen_make_pte_init(pteval_t pte)
1462 {
1463 	unsigned long pfn;
1464 
1465 	/*
1466 	 * Pages belonging to the initial p2m list mapped outside the default
1467 	 * address range must be mapped read-only. This region contains the
1468 	 * page tables for mapping the p2m list, too, and page tables MUST be
1469 	 * mapped read-only.
1470 	 */
1471 	pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1472 	if (xen_start_info->mfn_list < __START_KERNEL_map &&
1473 	    pfn >= xen_start_info->first_p2m_pfn &&
1474 	    pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1475 		pte &= ~_PAGE_RW;
1476 
1477 	pte = pte_pfn_to_mfn(pte);
1478 	return native_make_pte(pte);
1479 }
1480 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1481 
1482 /* Early in boot, while setting up the initial pagetable, assume
1483    everything is pinned. */
1484 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1485 {
1486 #ifdef CONFIG_FLATMEM
1487 	BUG_ON(mem_map);	/* should only be used early */
1488 #endif
1489 	make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1490 	pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1491 }
1492 
1493 /* Used for pmd and pud */
1494 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1495 {
1496 #ifdef CONFIG_FLATMEM
1497 	BUG_ON(mem_map);	/* should only be used early */
1498 #endif
1499 	make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1500 }
1501 
1502 /* Early release_pte assumes that all pts are pinned, since there's
1503    only init_mm and anything attached to that is pinned. */
1504 static void __init xen_release_pte_init(unsigned long pfn)
1505 {
1506 	pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1507 	make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1508 }
1509 
1510 static void __init xen_release_pmd_init(unsigned long pfn)
1511 {
1512 	make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1513 }
1514 
1515 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1516 {
1517 	struct multicall_space mcs;
1518 	struct mmuext_op *op;
1519 
1520 	mcs = __xen_mc_entry(sizeof(*op));
1521 	op = mcs.args;
1522 	op->cmd = cmd;
1523 	op->arg1.mfn = pfn_to_mfn(pfn);
1524 
1525 	MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1526 }
1527 
1528 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1529 {
1530 	struct multicall_space mcs;
1531 	unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1532 
1533 	mcs = __xen_mc_entry(0);
1534 	MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1535 				pfn_pte(pfn, prot), 0);
1536 }
1537 
1538 /* This needs to make sure the new pte page is pinned iff its being
1539    attached to a pinned pagetable. */
1540 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1541 				    unsigned level)
1542 {
1543 	bool pinned = xen_page_pinned(mm->pgd);
1544 
1545 	trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1546 
1547 	if (pinned) {
1548 		struct page *page = pfn_to_page(pfn);
1549 
1550 		pinned = false;
1551 		if (static_branch_likely(&xen_struct_pages_ready)) {
1552 			pinned = PagePinned(page);
1553 			SetPagePinned(page);
1554 		}
1555 
1556 		xen_mc_batch();
1557 
1558 		__set_pfn_prot(pfn, PAGE_KERNEL_RO);
1559 
1560 		if (level == PT_PTE && IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS) &&
1561 		    !pinned)
1562 			__pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1563 
1564 		xen_mc_issue(XEN_LAZY_MMU);
1565 	}
1566 }
1567 
1568 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1569 {
1570 	xen_alloc_ptpage(mm, pfn, PT_PTE);
1571 }
1572 
1573 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1574 {
1575 	xen_alloc_ptpage(mm, pfn, PT_PMD);
1576 }
1577 
1578 /* This should never happen until we're OK to use struct page */
1579 static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1580 {
1581 	struct page *page = pfn_to_page(pfn);
1582 	bool pinned = PagePinned(page);
1583 
1584 	trace_xen_mmu_release_ptpage(pfn, level, pinned);
1585 
1586 	if (pinned) {
1587 		xen_mc_batch();
1588 
1589 		if (level == PT_PTE && IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS))
1590 			__pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1591 
1592 		__set_pfn_prot(pfn, PAGE_KERNEL);
1593 
1594 		xen_mc_issue(XEN_LAZY_MMU);
1595 
1596 		ClearPagePinned(page);
1597 	}
1598 }
1599 
1600 static void xen_release_pte(unsigned long pfn)
1601 {
1602 	xen_release_ptpage(pfn, PT_PTE);
1603 }
1604 
1605 static void xen_release_pmd(unsigned long pfn)
1606 {
1607 	xen_release_ptpage(pfn, PT_PMD);
1608 }
1609 
1610 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1611 {
1612 	xen_alloc_ptpage(mm, pfn, PT_PUD);
1613 }
1614 
1615 static void xen_release_pud(unsigned long pfn)
1616 {
1617 	xen_release_ptpage(pfn, PT_PUD);
1618 }
1619 
1620 /*
1621  * Like __va(), but returns address in the kernel mapping (which is
1622  * all we have until the physical memory mapping has been set up.
1623  */
1624 static void * __init __ka(phys_addr_t paddr)
1625 {
1626 	return (void *)(paddr + __START_KERNEL_map);
1627 }
1628 
1629 /* Convert a machine address to physical address */
1630 static unsigned long __init m2p(phys_addr_t maddr)
1631 {
1632 	phys_addr_t paddr;
1633 
1634 	maddr &= XEN_PTE_MFN_MASK;
1635 	paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1636 
1637 	return paddr;
1638 }
1639 
1640 /* Convert a machine address to kernel virtual */
1641 static void * __init m2v(phys_addr_t maddr)
1642 {
1643 	return __ka(m2p(maddr));
1644 }
1645 
1646 /* Set the page permissions on an identity-mapped pages */
1647 static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1648 				       unsigned long flags)
1649 {
1650 	unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1651 	pte_t pte = pfn_pte(pfn, prot);
1652 
1653 	if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1654 		BUG();
1655 }
1656 static void __init set_page_prot(void *addr, pgprot_t prot)
1657 {
1658 	return set_page_prot_flags(addr, prot, UVMF_NONE);
1659 }
1660 
1661 void __init xen_setup_machphys_mapping(void)
1662 {
1663 	struct xen_machphys_mapping mapping;
1664 
1665 	if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1666 		machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1667 		machine_to_phys_nr = mapping.max_mfn + 1;
1668 	} else {
1669 		machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1670 	}
1671 }
1672 
1673 static void __init convert_pfn_mfn(void *v)
1674 {
1675 	pte_t *pte = v;
1676 	int i;
1677 
1678 	/* All levels are converted the same way, so just treat them
1679 	   as ptes. */
1680 	for (i = 0; i < PTRS_PER_PTE; i++)
1681 		pte[i] = xen_make_pte(pte[i].pte);
1682 }
1683 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1684 				 unsigned long addr)
1685 {
1686 	if (*pt_base == PFN_DOWN(__pa(addr))) {
1687 		set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1688 		clear_page((void *)addr);
1689 		(*pt_base)++;
1690 	}
1691 	if (*pt_end == PFN_DOWN(__pa(addr))) {
1692 		set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1693 		clear_page((void *)addr);
1694 		(*pt_end)--;
1695 	}
1696 }
1697 /*
1698  * Set up the initial kernel pagetable.
1699  *
1700  * We can construct this by grafting the Xen provided pagetable into
1701  * head_64.S's preconstructed pagetables.  We copy the Xen L2's into
1702  * level2_ident_pgt, and level2_kernel_pgt.  This means that only the
1703  * kernel has a physical mapping to start with - but that's enough to
1704  * get __va working.  We need to fill in the rest of the physical
1705  * mapping once some sort of allocator has been set up.
1706  */
1707 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1708 {
1709 	pud_t *l3;
1710 	pmd_t *l2;
1711 	unsigned long addr[3];
1712 	unsigned long pt_base, pt_end;
1713 	unsigned i;
1714 
1715 	/* max_pfn_mapped is the last pfn mapped in the initial memory
1716 	 * mappings. Considering that on Xen after the kernel mappings we
1717 	 * have the mappings of some pages that don't exist in pfn space, we
1718 	 * set max_pfn_mapped to the last real pfn mapped. */
1719 	if (xen_start_info->mfn_list < __START_KERNEL_map)
1720 		max_pfn_mapped = xen_start_info->first_p2m_pfn;
1721 	else
1722 		max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1723 
1724 	pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1725 	pt_end = pt_base + xen_start_info->nr_pt_frames;
1726 
1727 	/* Zap identity mapping */
1728 	init_top_pgt[0] = __pgd(0);
1729 
1730 	/* Pre-constructed entries are in pfn, so convert to mfn */
1731 	/* L4[273] -> level3_ident_pgt  */
1732 	/* L4[511] -> level3_kernel_pgt */
1733 	convert_pfn_mfn(init_top_pgt);
1734 
1735 	/* L3_i[0] -> level2_ident_pgt */
1736 	convert_pfn_mfn(level3_ident_pgt);
1737 	/* L3_k[510] -> level2_kernel_pgt */
1738 	/* L3_k[511] -> level2_fixmap_pgt */
1739 	convert_pfn_mfn(level3_kernel_pgt);
1740 
1741 	/* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
1742 	convert_pfn_mfn(level2_fixmap_pgt);
1743 
1744 	/* We get [511][511] and have Xen's version of level2_kernel_pgt */
1745 	l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1746 	l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1747 
1748 	addr[0] = (unsigned long)pgd;
1749 	addr[1] = (unsigned long)l3;
1750 	addr[2] = (unsigned long)l2;
1751 	/* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1752 	 * Both L4[273][0] and L4[511][510] have entries that point to the same
1753 	 * L2 (PMD) tables. Meaning that if you modify it in __va space
1754 	 * it will be also modified in the __ka space! (But if you just
1755 	 * modify the PMD table to point to other PTE's or none, then you
1756 	 * are OK - which is what cleanup_highmap does) */
1757 	copy_page(level2_ident_pgt, l2);
1758 	/* Graft it onto L4[511][510] */
1759 	copy_page(level2_kernel_pgt, l2);
1760 
1761 	/*
1762 	 * Zap execute permission from the ident map. Due to the sharing of
1763 	 * L1 entries we need to do this in the L2.
1764 	 */
1765 	if (__supported_pte_mask & _PAGE_NX) {
1766 		for (i = 0; i < PTRS_PER_PMD; ++i) {
1767 			if (pmd_none(level2_ident_pgt[i]))
1768 				continue;
1769 			level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1770 		}
1771 	}
1772 
1773 	/* Copy the initial P->M table mappings if necessary. */
1774 	i = pgd_index(xen_start_info->mfn_list);
1775 	if (i && i < pgd_index(__START_KERNEL_map))
1776 		init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1777 
1778 	/* Make pagetable pieces RO */
1779 	set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
1780 	set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1781 	set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1782 	set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1783 	set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1784 	set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1785 
1786 	for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1787 		set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1788 			      PAGE_KERNEL_RO);
1789 	}
1790 
1791 	/* Pin down new L4 */
1792 	pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1793 			  PFN_DOWN(__pa_symbol(init_top_pgt)));
1794 
1795 	/* Unpin Xen-provided one */
1796 	pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1797 
1798 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1799 	/* Pin user vsyscall L3 */
1800 	set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1801 	pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1802 			  PFN_DOWN(__pa_symbol(level3_user_vsyscall)));
1803 #endif
1804 
1805 	/*
1806 	 * At this stage there can be no user pgd, and no page structure to
1807 	 * attach it to, so make sure we just set kernel pgd.
1808 	 */
1809 	xen_mc_batch();
1810 	__xen_write_cr3(true, __pa(init_top_pgt));
1811 	xen_mc_issue(XEN_LAZY_CPU);
1812 
1813 	/* We can't that easily rip out L3 and L2, as the Xen pagetables are
1814 	 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ...  for
1815 	 * the initial domain. For guests using the toolstack, they are in:
1816 	 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1817 	 * rip out the [L4] (pgd), but for guests we shave off three pages.
1818 	 */
1819 	for (i = 0; i < ARRAY_SIZE(addr); i++)
1820 		check_pt_base(&pt_base, &pt_end, addr[i]);
1821 
1822 	/* Our (by three pages) smaller Xen pagetable that we are using */
1823 	xen_pt_base = PFN_PHYS(pt_base);
1824 	xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1825 	memblock_reserve(xen_pt_base, xen_pt_size);
1826 
1827 	/* Revector the xen_start_info */
1828 	xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
1829 }
1830 
1831 /*
1832  * Read a value from a physical address.
1833  */
1834 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
1835 {
1836 	unsigned long *vaddr;
1837 	unsigned long val;
1838 
1839 	vaddr = early_memremap_ro(addr, sizeof(val));
1840 	val = *vaddr;
1841 	early_memunmap(vaddr, sizeof(val));
1842 	return val;
1843 }
1844 
1845 /*
1846  * Translate a virtual address to a physical one without relying on mapped
1847  * page tables. Don't rely on big pages being aligned in (guest) physical
1848  * space!
1849  */
1850 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
1851 {
1852 	phys_addr_t pa;
1853 	pgd_t pgd;
1854 	pud_t pud;
1855 	pmd_t pmd;
1856 	pte_t pte;
1857 
1858 	pa = read_cr3_pa();
1859 	pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
1860 						       sizeof(pgd)));
1861 	if (!pgd_present(pgd))
1862 		return 0;
1863 
1864 	pa = pgd_val(pgd) & PTE_PFN_MASK;
1865 	pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
1866 						       sizeof(pud)));
1867 	if (!pud_present(pud))
1868 		return 0;
1869 	pa = pud_val(pud) & PTE_PFN_MASK;
1870 	if (pud_leaf(pud))
1871 		return pa + (vaddr & ~PUD_MASK);
1872 
1873 	pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
1874 						       sizeof(pmd)));
1875 	if (!pmd_present(pmd))
1876 		return 0;
1877 	pa = pmd_val(pmd) & PTE_PFN_MASK;
1878 	if (pmd_leaf(pmd))
1879 		return pa + (vaddr & ~PMD_MASK);
1880 
1881 	pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
1882 						       sizeof(pte)));
1883 	if (!pte_present(pte))
1884 		return 0;
1885 	pa = pte_pfn(pte) << PAGE_SHIFT;
1886 
1887 	return pa | (vaddr & ~PAGE_MASK);
1888 }
1889 
1890 /*
1891  * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
1892  * this area.
1893  */
1894 void __init xen_relocate_p2m(void)
1895 {
1896 	phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
1897 	unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
1898 	int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
1899 	pte_t *pt;
1900 	pmd_t *pmd;
1901 	pud_t *pud;
1902 	pgd_t *pgd;
1903 	unsigned long *new_p2m;
1904 
1905 	size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1906 	n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
1907 	n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
1908 	n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
1909 	n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
1910 	n_frames = n_pte + n_pt + n_pmd + n_pud;
1911 
1912 	new_area = xen_find_free_area(PFN_PHYS(n_frames));
1913 	if (!new_area) {
1914 		xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
1915 		BUG();
1916 	}
1917 
1918 	/*
1919 	 * Setup the page tables for addressing the new p2m list.
1920 	 * We have asked the hypervisor to map the p2m list at the user address
1921 	 * PUD_SIZE. It may have done so, or it may have used a kernel space
1922 	 * address depending on the Xen version.
1923 	 * To avoid any possible virtual address collision, just use
1924 	 * 2 * PUD_SIZE for the new area.
1925 	 */
1926 	pud_phys = new_area;
1927 	pmd_phys = pud_phys + PFN_PHYS(n_pud);
1928 	pt_phys = pmd_phys + PFN_PHYS(n_pmd);
1929 	p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
1930 
1931 	pgd = __va(read_cr3_pa());
1932 	new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
1933 	for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
1934 		pud = early_memremap(pud_phys, PAGE_SIZE);
1935 		clear_page(pud);
1936 		for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
1937 				idx_pmd++) {
1938 			pmd = early_memremap(pmd_phys, PAGE_SIZE);
1939 			clear_page(pmd);
1940 			for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
1941 					idx_pt++) {
1942 				pt = early_memremap(pt_phys, PAGE_SIZE);
1943 				clear_page(pt);
1944 				for (idx_pte = 0;
1945 				     idx_pte < min(n_pte, PTRS_PER_PTE);
1946 				     idx_pte++) {
1947 					pt[idx_pte] = pfn_pte(p2m_pfn,
1948 							      PAGE_KERNEL);
1949 					p2m_pfn++;
1950 				}
1951 				n_pte -= PTRS_PER_PTE;
1952 				early_memunmap(pt, PAGE_SIZE);
1953 				make_lowmem_page_readonly(__va(pt_phys));
1954 				pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
1955 						PFN_DOWN(pt_phys));
1956 				pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
1957 				pt_phys += PAGE_SIZE;
1958 			}
1959 			n_pt -= PTRS_PER_PMD;
1960 			early_memunmap(pmd, PAGE_SIZE);
1961 			make_lowmem_page_readonly(__va(pmd_phys));
1962 			pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
1963 					PFN_DOWN(pmd_phys));
1964 			pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
1965 			pmd_phys += PAGE_SIZE;
1966 		}
1967 		n_pmd -= PTRS_PER_PUD;
1968 		early_memunmap(pud, PAGE_SIZE);
1969 		make_lowmem_page_readonly(__va(pud_phys));
1970 		pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
1971 		set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
1972 		pud_phys += PAGE_SIZE;
1973 	}
1974 
1975 	/* Now copy the old p2m info to the new area. */
1976 	memcpy(new_p2m, xen_p2m_addr, size);
1977 	xen_p2m_addr = new_p2m;
1978 
1979 	/* Release the old p2m list and set new list info. */
1980 	p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
1981 	BUG_ON(!p2m_pfn);
1982 	p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
1983 
1984 	if (xen_start_info->mfn_list < __START_KERNEL_map) {
1985 		pfn = xen_start_info->first_p2m_pfn;
1986 		pfn_end = xen_start_info->first_p2m_pfn +
1987 			  xen_start_info->nr_p2m_frames;
1988 		set_pgd(pgd + 1, __pgd(0));
1989 	} else {
1990 		pfn = p2m_pfn;
1991 		pfn_end = p2m_pfn_end;
1992 	}
1993 
1994 	memblock_phys_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
1995 	while (pfn < pfn_end) {
1996 		if (pfn == p2m_pfn) {
1997 			pfn = p2m_pfn_end;
1998 			continue;
1999 		}
2000 		make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2001 		pfn++;
2002 	}
2003 
2004 	xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2005 	xen_start_info->first_p2m_pfn =  PFN_DOWN(new_area);
2006 	xen_start_info->nr_p2m_frames = n_frames;
2007 }
2008 
2009 void __init xen_reserve_special_pages(void)
2010 {
2011 	phys_addr_t paddr;
2012 
2013 	memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2014 	if (xen_start_info->store_mfn) {
2015 		paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2016 		memblock_reserve(paddr, PAGE_SIZE);
2017 	}
2018 	if (!xen_initial_domain()) {
2019 		paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2020 		memblock_reserve(paddr, PAGE_SIZE);
2021 	}
2022 }
2023 
2024 void __init xen_pt_check_e820(void)
2025 {
2026 	xen_chk_is_e820_usable(xen_pt_base, xen_pt_size, "page table");
2027 }
2028 
2029 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2030 
2031 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2032 {
2033 	pte_t pte;
2034 	unsigned long vaddr;
2035 
2036 	phys >>= PAGE_SHIFT;
2037 
2038 	switch (idx) {
2039 	case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
2040 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2041 	case VSYSCALL_PAGE:
2042 #endif
2043 		/* All local page mappings */
2044 		pte = pfn_pte(phys, prot);
2045 		break;
2046 
2047 #ifdef CONFIG_X86_LOCAL_APIC
2048 	case FIX_APIC_BASE:	/* maps dummy local APIC */
2049 		pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2050 		break;
2051 #endif
2052 
2053 #ifdef CONFIG_X86_IO_APIC
2054 	case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2055 		/*
2056 		 * We just don't map the IO APIC - all access is via
2057 		 * hypercalls.  Keep the address in the pte for reference.
2058 		 */
2059 		pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2060 		break;
2061 #endif
2062 
2063 	case FIX_PARAVIRT_BOOTMAP:
2064 		/* This is an MFN, but it isn't an IO mapping from the
2065 		   IO domain */
2066 		pte = mfn_pte(phys, prot);
2067 		break;
2068 
2069 	default:
2070 		/* By default, set_fixmap is used for hardware mappings */
2071 		pte = mfn_pte(phys, prot);
2072 		break;
2073 	}
2074 
2075 	vaddr = __fix_to_virt(idx);
2076 	if (HYPERVISOR_update_va_mapping(vaddr, pte, UVMF_INVLPG))
2077 		BUG();
2078 
2079 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2080 	/* Replicate changes to map the vsyscall page into the user
2081 	   pagetable vsyscall mapping. */
2082 	if (idx == VSYSCALL_PAGE)
2083 		set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2084 #endif
2085 }
2086 
2087 static void xen_enter_lazy_mmu(void)
2088 {
2089 	enter_lazy(XEN_LAZY_MMU);
2090 }
2091 
2092 static void xen_flush_lazy_mmu(void)
2093 {
2094 	preempt_disable();
2095 
2096 	if (xen_get_lazy_mode() == XEN_LAZY_MMU) {
2097 		arch_leave_lazy_mmu_mode();
2098 		arch_enter_lazy_mmu_mode();
2099 	}
2100 
2101 	preempt_enable();
2102 }
2103 
2104 static void __init xen_post_allocator_init(void)
2105 {
2106 	pv_ops.mmu.set_pte = xen_set_pte;
2107 	pv_ops.mmu.set_pmd = xen_set_pmd;
2108 	pv_ops.mmu.set_pud = xen_set_pud;
2109 	pv_ops.mmu.set_p4d = xen_set_p4d;
2110 
2111 	/* This will work as long as patching hasn't happened yet
2112 	   (which it hasn't) */
2113 	pv_ops.mmu.alloc_pte = xen_alloc_pte;
2114 	pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2115 	pv_ops.mmu.release_pte = xen_release_pte;
2116 	pv_ops.mmu.release_pmd = xen_release_pmd;
2117 	pv_ops.mmu.alloc_pud = xen_alloc_pud;
2118 	pv_ops.mmu.release_pud = xen_release_pud;
2119 	pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
2120 
2121 	pv_ops.mmu.write_cr3 = &xen_write_cr3;
2122 }
2123 
2124 static void xen_leave_lazy_mmu(void)
2125 {
2126 	preempt_disable();
2127 	xen_mc_flush();
2128 	leave_lazy(XEN_LAZY_MMU);
2129 	preempt_enable();
2130 }
2131 
2132 static const typeof(pv_ops) xen_mmu_ops __initconst = {
2133 	.mmu = {
2134 		.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2),
2135 		.write_cr2 = xen_write_cr2,
2136 
2137 		.read_cr3 = xen_read_cr3,
2138 		.write_cr3 = xen_write_cr3_init,
2139 
2140 		.flush_tlb_user = xen_flush_tlb,
2141 		.flush_tlb_kernel = xen_flush_tlb,
2142 		.flush_tlb_one_user = xen_flush_tlb_one_user,
2143 		.flush_tlb_multi = xen_flush_tlb_multi,
2144 		.tlb_remove_table = tlb_remove_table,
2145 
2146 		.pgd_alloc = xen_pgd_alloc,
2147 		.pgd_free = xen_pgd_free,
2148 
2149 		.alloc_pte = xen_alloc_pte_init,
2150 		.release_pte = xen_release_pte_init,
2151 		.alloc_pmd = xen_alloc_pmd_init,
2152 		.release_pmd = xen_release_pmd_init,
2153 
2154 		.set_pte = xen_set_pte_init,
2155 		.set_pmd = xen_set_pmd_hyper,
2156 
2157 		.ptep_modify_prot_start = xen_ptep_modify_prot_start,
2158 		.ptep_modify_prot_commit = xen_ptep_modify_prot_commit,
2159 
2160 		.pte_val = PV_CALLEE_SAVE(xen_pte_val),
2161 		.pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2162 
2163 		.make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2164 		.make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2165 
2166 		.set_pud = xen_set_pud_hyper,
2167 
2168 		.make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2169 		.pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2170 
2171 		.pud_val = PV_CALLEE_SAVE(xen_pud_val),
2172 		.make_pud = PV_CALLEE_SAVE(xen_make_pud),
2173 		.set_p4d = xen_set_p4d_hyper,
2174 
2175 		.alloc_pud = xen_alloc_pmd_init,
2176 		.release_pud = xen_release_pmd_init,
2177 
2178 #if CONFIG_PGTABLE_LEVELS >= 5
2179 		.p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2180 		.make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2181 #endif
2182 
2183 		.enter_mmap = xen_enter_mmap,
2184 		.exit_mmap = xen_exit_mmap,
2185 
2186 		.lazy_mode = {
2187 			.enter = xen_enter_lazy_mmu,
2188 			.leave = xen_leave_lazy_mmu,
2189 			.flush = xen_flush_lazy_mmu,
2190 		},
2191 
2192 		.set_fixmap = xen_set_fixmap,
2193 	},
2194 };
2195 
2196 void __init xen_init_mmu_ops(void)
2197 {
2198 	x86_init.paging.pagetable_init = xen_pagetable_init;
2199 	x86_init.hyper.init_after_bootmem = xen_after_bootmem;
2200 
2201 	pv_ops.mmu = xen_mmu_ops.mmu;
2202 
2203 	memset(dummy_mapping, 0xff, PAGE_SIZE);
2204 }
2205 
2206 /* Protected by xen_reservation_lock. */
2207 #define MAX_CONTIG_ORDER 9 /* 2MB */
2208 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2209 
2210 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
2211 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2212 				unsigned long *in_frames,
2213 				unsigned long *out_frames)
2214 {
2215 	int i;
2216 	struct multicall_space mcs;
2217 
2218 	xen_mc_batch();
2219 	for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2220 		mcs = __xen_mc_entry(0);
2221 
2222 		if (in_frames)
2223 			in_frames[i] = virt_to_mfn((void *)vaddr);
2224 
2225 		MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2226 		__set_phys_to_machine(virt_to_pfn((void *)vaddr), INVALID_P2M_ENTRY);
2227 
2228 		if (out_frames)
2229 			out_frames[i] = virt_to_pfn((void *)vaddr);
2230 	}
2231 	xen_mc_issue(0);
2232 }
2233 
2234 /*
2235  * Update the pfn-to-mfn mappings for a virtual address range, either to
2236  * point to an array of mfns, or contiguously from a single starting
2237  * mfn.
2238  */
2239 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2240 				     unsigned long *mfns,
2241 				     unsigned long first_mfn)
2242 {
2243 	unsigned i, limit;
2244 	unsigned long mfn;
2245 
2246 	xen_mc_batch();
2247 
2248 	limit = 1u << order;
2249 	for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2250 		struct multicall_space mcs;
2251 		unsigned flags;
2252 
2253 		mcs = __xen_mc_entry(0);
2254 		if (mfns)
2255 			mfn = mfns[i];
2256 		else
2257 			mfn = first_mfn + i;
2258 
2259 		if (i < (limit - 1))
2260 			flags = 0;
2261 		else {
2262 			if (order == 0)
2263 				flags = UVMF_INVLPG | UVMF_ALL;
2264 			else
2265 				flags = UVMF_TLB_FLUSH | UVMF_ALL;
2266 		}
2267 
2268 		MULTI_update_va_mapping(mcs.mc, vaddr,
2269 				mfn_pte(mfn, PAGE_KERNEL), flags);
2270 
2271 		set_phys_to_machine(virt_to_pfn((void *)vaddr), mfn);
2272 	}
2273 
2274 	xen_mc_issue(0);
2275 }
2276 
2277 /*
2278  * Perform the hypercall to exchange a region of our pfns to point to
2279  * memory with the required contiguous alignment.  Takes the pfns as
2280  * input, and populates mfns as output.
2281  *
2282  * Returns a success code indicating whether the hypervisor was able to
2283  * satisfy the request or not.
2284  */
2285 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2286 			       unsigned long *pfns_in,
2287 			       unsigned long extents_out,
2288 			       unsigned int order_out,
2289 			       unsigned long *mfns_out,
2290 			       unsigned int address_bits)
2291 {
2292 	long rc;
2293 	int success;
2294 
2295 	struct xen_memory_exchange exchange = {
2296 		.in = {
2297 			.nr_extents   = extents_in,
2298 			.extent_order = order_in,
2299 			.extent_start = pfns_in,
2300 			.domid        = DOMID_SELF
2301 		},
2302 		.out = {
2303 			.nr_extents   = extents_out,
2304 			.extent_order = order_out,
2305 			.extent_start = mfns_out,
2306 			.address_bits = address_bits,
2307 			.domid        = DOMID_SELF
2308 		}
2309 	};
2310 
2311 	BUG_ON(extents_in << order_in != extents_out << order_out);
2312 
2313 	rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2314 	success = (exchange.nr_exchanged == extents_in);
2315 
2316 	BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2317 	BUG_ON(success && (rc != 0));
2318 
2319 	return success;
2320 }
2321 
2322 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2323 				 unsigned int address_bits,
2324 				 dma_addr_t *dma_handle)
2325 {
2326 	unsigned long *in_frames = discontig_frames, out_frame;
2327 	unsigned long  flags;
2328 	int            success;
2329 	unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2330 
2331 	if (unlikely(order > MAX_CONTIG_ORDER))
2332 		return -ENOMEM;
2333 
2334 	memset((void *) vstart, 0, PAGE_SIZE << order);
2335 
2336 	spin_lock_irqsave(&xen_reservation_lock, flags);
2337 
2338 	/* 1. Zap current PTEs, remembering MFNs. */
2339 	xen_zap_pfn_range(vstart, order, in_frames, NULL);
2340 
2341 	/* 2. Get a new contiguous memory extent. */
2342 	out_frame = virt_to_pfn((void *)vstart);
2343 	success = xen_exchange_memory(1UL << order, 0, in_frames,
2344 				      1, order, &out_frame,
2345 				      address_bits);
2346 
2347 	/* 3. Map the new extent in place of old pages. */
2348 	if (success)
2349 		xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2350 	else
2351 		xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2352 
2353 	spin_unlock_irqrestore(&xen_reservation_lock, flags);
2354 
2355 	*dma_handle = virt_to_machine(vstart).maddr;
2356 	return success ? 0 : -ENOMEM;
2357 }
2358 
2359 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2360 {
2361 	unsigned long *out_frames = discontig_frames, in_frame;
2362 	unsigned long  flags;
2363 	int success;
2364 	unsigned long vstart;
2365 
2366 	if (unlikely(order > MAX_CONTIG_ORDER))
2367 		return;
2368 
2369 	vstart = (unsigned long)phys_to_virt(pstart);
2370 	memset((void *) vstart, 0, PAGE_SIZE << order);
2371 
2372 	spin_lock_irqsave(&xen_reservation_lock, flags);
2373 
2374 	/* 1. Find start MFN of contiguous extent. */
2375 	in_frame = virt_to_mfn((void *)vstart);
2376 
2377 	/* 2. Zap current PTEs. */
2378 	xen_zap_pfn_range(vstart, order, NULL, out_frames);
2379 
2380 	/* 3. Do the exchange for non-contiguous MFNs. */
2381 	success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2382 					0, out_frames, 0);
2383 
2384 	/* 4. Map new pages in place of old pages. */
2385 	if (success)
2386 		xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2387 	else
2388 		xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2389 
2390 	spin_unlock_irqrestore(&xen_reservation_lock, flags);
2391 }
2392 
2393 static noinline void xen_flush_tlb_all(void)
2394 {
2395 	struct mmuext_op *op;
2396 	struct multicall_space mcs;
2397 
2398 	preempt_disable();
2399 
2400 	mcs = xen_mc_entry(sizeof(*op));
2401 
2402 	op = mcs.args;
2403 	op->cmd = MMUEXT_TLB_FLUSH_ALL;
2404 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2405 
2406 	xen_mc_issue(XEN_LAZY_MMU);
2407 
2408 	preempt_enable();
2409 }
2410 
2411 #define REMAP_BATCH_SIZE 16
2412 
2413 struct remap_data {
2414 	xen_pfn_t *pfn;
2415 	bool contiguous;
2416 	bool no_translate;
2417 	pgprot_t prot;
2418 	struct mmu_update *mmu_update;
2419 };
2420 
2421 static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data)
2422 {
2423 	struct remap_data *rmd = data;
2424 	pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2425 
2426 	/*
2427 	 * If we have a contiguous range, just update the pfn itself,
2428 	 * else update pointer to be "next pfn".
2429 	 */
2430 	if (rmd->contiguous)
2431 		(*rmd->pfn)++;
2432 	else
2433 		rmd->pfn++;
2434 
2435 	rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2436 	rmd->mmu_update->ptr |= rmd->no_translate ?
2437 		MMU_PT_UPDATE_NO_TRANSLATE :
2438 		MMU_NORMAL_PT_UPDATE;
2439 	rmd->mmu_update->val = pte_val_ma(pte);
2440 	rmd->mmu_update++;
2441 
2442 	return 0;
2443 }
2444 
2445 int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2446 		  xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2447 		  unsigned int domid, bool no_translate)
2448 {
2449 	int err = 0;
2450 	struct remap_data rmd;
2451 	struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2452 	unsigned long range;
2453 	int mapped = 0;
2454 
2455 	BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2456 
2457 	rmd.pfn = pfn;
2458 	rmd.prot = prot;
2459 	/*
2460 	 * We use the err_ptr to indicate if there we are doing a contiguous
2461 	 * mapping or a discontiguous mapping.
2462 	 */
2463 	rmd.contiguous = !err_ptr;
2464 	rmd.no_translate = no_translate;
2465 
2466 	while (nr) {
2467 		int index = 0;
2468 		int done = 0;
2469 		int batch = min(REMAP_BATCH_SIZE, nr);
2470 		int batch_left = batch;
2471 
2472 		range = (unsigned long)batch << PAGE_SHIFT;
2473 
2474 		rmd.mmu_update = mmu_update;
2475 		err = apply_to_page_range(vma->vm_mm, addr, range,
2476 					  remap_area_pfn_pte_fn, &rmd);
2477 		if (err)
2478 			goto out;
2479 
2480 		/*
2481 		 * We record the error for each page that gives an error, but
2482 		 * continue mapping until the whole set is done
2483 		 */
2484 		do {
2485 			int i;
2486 
2487 			err = HYPERVISOR_mmu_update(&mmu_update[index],
2488 						    batch_left, &done, domid);
2489 
2490 			/*
2491 			 * @err_ptr may be the same buffer as @gfn, so
2492 			 * only clear it after each chunk of @gfn is
2493 			 * used.
2494 			 */
2495 			if (err_ptr) {
2496 				for (i = index; i < index + done; i++)
2497 					err_ptr[i] = 0;
2498 			}
2499 			if (err < 0) {
2500 				if (!err_ptr)
2501 					goto out;
2502 				err_ptr[i] = err;
2503 				done++; /* Skip failed frame. */
2504 			} else
2505 				mapped += done;
2506 			batch_left -= done;
2507 			index += done;
2508 		} while (batch_left);
2509 
2510 		nr -= batch;
2511 		addr += range;
2512 		if (err_ptr)
2513 			err_ptr += batch;
2514 		cond_resched();
2515 	}
2516 out:
2517 
2518 	xen_flush_tlb_all();
2519 
2520 	return err < 0 ? err : mapped;
2521 }
2522 EXPORT_SYMBOL_GPL(xen_remap_pfn);
2523 
2524 #ifdef CONFIG_VMCORE_INFO
2525 phys_addr_t paddr_vmcoreinfo_note(void)
2526 {
2527 	if (xen_pv_domain())
2528 		return virt_to_machine(vmcoreinfo_note).maddr;
2529 	else
2530 		return __pa(vmcoreinfo_note);
2531 }
2532 #endif /* CONFIG_KEXEC_CORE */
2533