1 // SPDX-License-Identifier: GPL-2.0 2 3 /* 4 * Xen mmu operations 5 * 6 * This file contains the various mmu fetch and update operations. 7 * The most important job they must perform is the mapping between the 8 * domain's pfn and the overall machine mfns. 9 * 10 * Xen allows guests to directly update the pagetable, in a controlled 11 * fashion. In other words, the guest modifies the same pagetable 12 * that the CPU actually uses, which eliminates the overhead of having 13 * a separate shadow pagetable. 14 * 15 * In order to allow this, it falls on the guest domain to map its 16 * notion of a "physical" pfn - which is just a domain-local linear 17 * address - into a real "machine address" which the CPU's MMU can 18 * use. 19 * 20 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be 21 * inserted directly into the pagetable. When creating a new 22 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, 23 * when reading the content back with __(pgd|pmd|pte)_val, it converts 24 * the mfn back into a pfn. 25 * 26 * The other constraint is that all pages which make up a pagetable 27 * must be mapped read-only in the guest. This prevents uncontrolled 28 * guest updates to the pagetable. Xen strictly enforces this, and 29 * will disallow any pagetable update which will end up mapping a 30 * pagetable page RW, and will disallow using any writable page as a 31 * pagetable. 32 * 33 * Naively, when loading %cr3 with the base of a new pagetable, Xen 34 * would need to validate the whole pagetable before going on. 35 * Naturally, this is quite slow. The solution is to "pin" a 36 * pagetable, which enforces all the constraints on the pagetable even 37 * when it is not actively in use. This menas that Xen can be assured 38 * that it is still valid when you do load it into %cr3, and doesn't 39 * need to revalidate it. 40 * 41 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 42 */ 43 #include <linux/sched/mm.h> 44 #include <linux/debugfs.h> 45 #include <linux/bug.h> 46 #include <linux/vmalloc.h> 47 #include <linux/export.h> 48 #include <linux/init.h> 49 #include <linux/gfp.h> 50 #include <linux/memblock.h> 51 #include <linux/seq_file.h> 52 #include <linux/crash_dump.h> 53 #include <linux/pgtable.h> 54 #ifdef CONFIG_KEXEC_CORE 55 #include <linux/kexec.h> 56 #endif 57 58 #include <trace/events/xen.h> 59 60 #include <asm/tlbflush.h> 61 #include <asm/fixmap.h> 62 #include <asm/mmu_context.h> 63 #include <asm/setup.h> 64 #include <asm/paravirt.h> 65 #include <asm/e820/api.h> 66 #include <asm/linkage.h> 67 #include <asm/page.h> 68 #include <asm/init.h> 69 #include <asm/memtype.h> 70 #include <asm/smp.h> 71 #include <asm/tlb.h> 72 73 #include <asm/xen/hypercall.h> 74 #include <asm/xen/hypervisor.h> 75 76 #include <xen/xen.h> 77 #include <xen/page.h> 78 #include <xen/interface/xen.h> 79 #include <xen/interface/hvm/hvm_op.h> 80 #include <xen/interface/version.h> 81 #include <xen/interface/memory.h> 82 #include <xen/hvc-console.h> 83 #include <xen/swiotlb-xen.h> 84 85 #include "multicalls.h" 86 #include "mmu.h" 87 #include "debugfs.h" 88 89 #ifdef CONFIG_X86_VSYSCALL_EMULATION 90 /* l3 pud for userspace vsyscall mapping */ 91 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; 92 #endif 93 94 /* 95 * Protects atomic reservation decrease/increase against concurrent increases. 96 * Also protects non-atomic updates of current_pages and balloon lists. 97 */ 98 static DEFINE_SPINLOCK(xen_reservation_lock); 99 100 /* 101 * Note about cr3 (pagetable base) values: 102 * 103 * xen_cr3 contains the current logical cr3 value; it contains the 104 * last set cr3. This may not be the current effective cr3, because 105 * its update may be being lazily deferred. However, a vcpu looking 106 * at its own cr3 can use this value knowing that it everything will 107 * be self-consistent. 108 * 109 * xen_current_cr3 contains the actual vcpu cr3; it is set once the 110 * hypercall to set the vcpu cr3 is complete (so it may be a little 111 * out of date, but it will never be set early). If one vcpu is 112 * looking at another vcpu's cr3 value, it should use this variable. 113 */ 114 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ 115 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ 116 117 static phys_addr_t xen_pt_base, xen_pt_size __initdata; 118 119 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready); 120 121 /* 122 * Just beyond the highest usermode address. STACK_TOP_MAX has a 123 * redzone above it, so round it up to a PGD boundary. 124 */ 125 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) 126 127 void make_lowmem_page_readonly(void *vaddr) 128 { 129 pte_t *pte, ptev; 130 unsigned long address = (unsigned long)vaddr; 131 unsigned int level; 132 133 pte = lookup_address(address, &level); 134 if (pte == NULL) 135 return; /* vaddr missing */ 136 137 ptev = pte_wrprotect(*pte); 138 139 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 140 BUG(); 141 } 142 143 void make_lowmem_page_readwrite(void *vaddr) 144 { 145 pte_t *pte, ptev; 146 unsigned long address = (unsigned long)vaddr; 147 unsigned int level; 148 149 pte = lookup_address(address, &level); 150 if (pte == NULL) 151 return; /* vaddr missing */ 152 153 ptev = pte_mkwrite(*pte); 154 155 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 156 BUG(); 157 } 158 159 160 /* 161 * During early boot all page table pages are pinned, but we do not have struct 162 * pages, so return true until struct pages are ready. 163 */ 164 static bool xen_page_pinned(void *ptr) 165 { 166 if (static_branch_likely(&xen_struct_pages_ready)) { 167 struct page *page = virt_to_page(ptr); 168 169 return PagePinned(page); 170 } 171 return true; 172 } 173 174 static void xen_extend_mmu_update(const struct mmu_update *update) 175 { 176 struct multicall_space mcs; 177 struct mmu_update *u; 178 179 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); 180 181 if (mcs.mc != NULL) { 182 mcs.mc->args[1]++; 183 } else { 184 mcs = __xen_mc_entry(sizeof(*u)); 185 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 186 } 187 188 u = mcs.args; 189 *u = *update; 190 } 191 192 static void xen_extend_mmuext_op(const struct mmuext_op *op) 193 { 194 struct multicall_space mcs; 195 struct mmuext_op *u; 196 197 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u)); 198 199 if (mcs.mc != NULL) { 200 mcs.mc->args[1]++; 201 } else { 202 mcs = __xen_mc_entry(sizeof(*u)); 203 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 204 } 205 206 u = mcs.args; 207 *u = *op; 208 } 209 210 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) 211 { 212 struct mmu_update u; 213 214 preempt_disable(); 215 216 xen_mc_batch(); 217 218 /* ptr may be ioremapped for 64-bit pagetable setup */ 219 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 220 u.val = pmd_val_ma(val); 221 xen_extend_mmu_update(&u); 222 223 xen_mc_issue(PARAVIRT_LAZY_MMU); 224 225 preempt_enable(); 226 } 227 228 static void xen_set_pmd(pmd_t *ptr, pmd_t val) 229 { 230 trace_xen_mmu_set_pmd(ptr, val); 231 232 /* If page is not pinned, we can just update the entry 233 directly */ 234 if (!xen_page_pinned(ptr)) { 235 *ptr = val; 236 return; 237 } 238 239 xen_set_pmd_hyper(ptr, val); 240 } 241 242 /* 243 * Associate a virtual page frame with a given physical page frame 244 * and protection flags for that frame. 245 */ 246 void __init set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) 247 { 248 if (HYPERVISOR_update_va_mapping(vaddr, mfn_pte(mfn, flags), 249 UVMF_INVLPG)) 250 BUG(); 251 } 252 253 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) 254 { 255 struct mmu_update u; 256 257 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) 258 return false; 259 260 xen_mc_batch(); 261 262 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 263 u.val = pte_val_ma(pteval); 264 xen_extend_mmu_update(&u); 265 266 xen_mc_issue(PARAVIRT_LAZY_MMU); 267 268 return true; 269 } 270 271 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval) 272 { 273 if (!xen_batched_set_pte(ptep, pteval)) { 274 /* 275 * Could call native_set_pte() here and trap and 276 * emulate the PTE write, but a hypercall is much cheaper. 277 */ 278 struct mmu_update u; 279 280 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 281 u.val = pte_val_ma(pteval); 282 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF); 283 } 284 } 285 286 static void xen_set_pte(pte_t *ptep, pte_t pteval) 287 { 288 trace_xen_mmu_set_pte(ptep, pteval); 289 __xen_set_pte(ptep, pteval); 290 } 291 292 pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma, 293 unsigned long addr, pte_t *ptep) 294 { 295 /* Just return the pte as-is. We preserve the bits on commit */ 296 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep); 297 return *ptep; 298 } 299 300 void xen_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, 301 pte_t *ptep, pte_t pte) 302 { 303 struct mmu_update u; 304 305 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte); 306 xen_mc_batch(); 307 308 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; 309 u.val = pte_val_ma(pte); 310 xen_extend_mmu_update(&u); 311 312 xen_mc_issue(PARAVIRT_LAZY_MMU); 313 } 314 315 /* Assume pteval_t is equivalent to all the other *val_t types. */ 316 static pteval_t pte_mfn_to_pfn(pteval_t val) 317 { 318 if (val & _PAGE_PRESENT) { 319 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT; 320 unsigned long pfn = mfn_to_pfn(mfn); 321 322 pteval_t flags = val & PTE_FLAGS_MASK; 323 if (unlikely(pfn == ~0)) 324 val = flags & ~_PAGE_PRESENT; 325 else 326 val = ((pteval_t)pfn << PAGE_SHIFT) | flags; 327 } 328 329 return val; 330 } 331 332 static pteval_t pte_pfn_to_mfn(pteval_t val) 333 { 334 if (val & _PAGE_PRESENT) { 335 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 336 pteval_t flags = val & PTE_FLAGS_MASK; 337 unsigned long mfn; 338 339 mfn = __pfn_to_mfn(pfn); 340 341 /* 342 * If there's no mfn for the pfn, then just create an 343 * empty non-present pte. Unfortunately this loses 344 * information about the original pfn, so 345 * pte_mfn_to_pfn is asymmetric. 346 */ 347 if (unlikely(mfn == INVALID_P2M_ENTRY)) { 348 mfn = 0; 349 flags = 0; 350 } else 351 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT); 352 val = ((pteval_t)mfn << PAGE_SHIFT) | flags; 353 } 354 355 return val; 356 } 357 358 __visible pteval_t xen_pte_val(pte_t pte) 359 { 360 pteval_t pteval = pte.pte; 361 362 return pte_mfn_to_pfn(pteval); 363 } 364 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); 365 366 __visible pgdval_t xen_pgd_val(pgd_t pgd) 367 { 368 return pte_mfn_to_pfn(pgd.pgd); 369 } 370 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); 371 372 __visible pte_t xen_make_pte(pteval_t pte) 373 { 374 pte = pte_pfn_to_mfn(pte); 375 376 return native_make_pte(pte); 377 } 378 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); 379 380 __visible pgd_t xen_make_pgd(pgdval_t pgd) 381 { 382 pgd = pte_pfn_to_mfn(pgd); 383 return native_make_pgd(pgd); 384 } 385 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); 386 387 __visible pmdval_t xen_pmd_val(pmd_t pmd) 388 { 389 return pte_mfn_to_pfn(pmd.pmd); 390 } 391 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); 392 393 static void xen_set_pud_hyper(pud_t *ptr, pud_t val) 394 { 395 struct mmu_update u; 396 397 preempt_disable(); 398 399 xen_mc_batch(); 400 401 /* ptr may be ioremapped for 64-bit pagetable setup */ 402 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 403 u.val = pud_val_ma(val); 404 xen_extend_mmu_update(&u); 405 406 xen_mc_issue(PARAVIRT_LAZY_MMU); 407 408 preempt_enable(); 409 } 410 411 static void xen_set_pud(pud_t *ptr, pud_t val) 412 { 413 trace_xen_mmu_set_pud(ptr, val); 414 415 /* If page is not pinned, we can just update the entry 416 directly */ 417 if (!xen_page_pinned(ptr)) { 418 *ptr = val; 419 return; 420 } 421 422 xen_set_pud_hyper(ptr, val); 423 } 424 425 __visible pmd_t xen_make_pmd(pmdval_t pmd) 426 { 427 pmd = pte_pfn_to_mfn(pmd); 428 return native_make_pmd(pmd); 429 } 430 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); 431 432 __visible pudval_t xen_pud_val(pud_t pud) 433 { 434 return pte_mfn_to_pfn(pud.pud); 435 } 436 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); 437 438 __visible pud_t xen_make_pud(pudval_t pud) 439 { 440 pud = pte_pfn_to_mfn(pud); 441 442 return native_make_pud(pud); 443 } 444 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); 445 446 static pgd_t *xen_get_user_pgd(pgd_t *pgd) 447 { 448 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); 449 unsigned offset = pgd - pgd_page; 450 pgd_t *user_ptr = NULL; 451 452 if (offset < pgd_index(USER_LIMIT)) { 453 struct page *page = virt_to_page(pgd_page); 454 user_ptr = (pgd_t *)page->private; 455 if (user_ptr) 456 user_ptr += offset; 457 } 458 459 return user_ptr; 460 } 461 462 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 463 { 464 struct mmu_update u; 465 466 u.ptr = virt_to_machine(ptr).maddr; 467 u.val = p4d_val_ma(val); 468 xen_extend_mmu_update(&u); 469 } 470 471 /* 472 * Raw hypercall-based set_p4d, intended for in early boot before 473 * there's a page structure. This implies: 474 * 1. The only existing pagetable is the kernel's 475 * 2. It is always pinned 476 * 3. It has no user pagetable attached to it 477 */ 478 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 479 { 480 preempt_disable(); 481 482 xen_mc_batch(); 483 484 __xen_set_p4d_hyper(ptr, val); 485 486 xen_mc_issue(PARAVIRT_LAZY_MMU); 487 488 preempt_enable(); 489 } 490 491 static void xen_set_p4d(p4d_t *ptr, p4d_t val) 492 { 493 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr); 494 pgd_t pgd_val; 495 496 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val); 497 498 /* If page is not pinned, we can just update the entry 499 directly */ 500 if (!xen_page_pinned(ptr)) { 501 *ptr = val; 502 if (user_ptr) { 503 WARN_ON(xen_page_pinned(user_ptr)); 504 pgd_val.pgd = p4d_val_ma(val); 505 *user_ptr = pgd_val; 506 } 507 return; 508 } 509 510 /* If it's pinned, then we can at least batch the kernel and 511 user updates together. */ 512 xen_mc_batch(); 513 514 __xen_set_p4d_hyper(ptr, val); 515 if (user_ptr) 516 __xen_set_p4d_hyper((p4d_t *)user_ptr, val); 517 518 xen_mc_issue(PARAVIRT_LAZY_MMU); 519 } 520 521 #if CONFIG_PGTABLE_LEVELS >= 5 522 __visible p4dval_t xen_p4d_val(p4d_t p4d) 523 { 524 return pte_mfn_to_pfn(p4d.p4d); 525 } 526 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val); 527 528 __visible p4d_t xen_make_p4d(p4dval_t p4d) 529 { 530 p4d = pte_pfn_to_mfn(p4d); 531 532 return native_make_p4d(p4d); 533 } 534 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d); 535 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 536 537 static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd, 538 void (*func)(struct mm_struct *mm, struct page *, 539 enum pt_level), 540 bool last, unsigned long limit) 541 { 542 int i, nr; 543 544 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD; 545 for (i = 0; i < nr; i++) { 546 if (!pmd_none(pmd[i])) 547 (*func)(mm, pmd_page(pmd[i]), PT_PTE); 548 } 549 } 550 551 static void xen_pud_walk(struct mm_struct *mm, pud_t *pud, 552 void (*func)(struct mm_struct *mm, struct page *, 553 enum pt_level), 554 bool last, unsigned long limit) 555 { 556 int i, nr; 557 558 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD; 559 for (i = 0; i < nr; i++) { 560 pmd_t *pmd; 561 562 if (pud_none(pud[i])) 563 continue; 564 565 pmd = pmd_offset(&pud[i], 0); 566 if (PTRS_PER_PMD > 1) 567 (*func)(mm, virt_to_page(pmd), PT_PMD); 568 xen_pmd_walk(mm, pmd, func, last && i == nr - 1, limit); 569 } 570 } 571 572 static void xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d, 573 void (*func)(struct mm_struct *mm, struct page *, 574 enum pt_level), 575 bool last, unsigned long limit) 576 { 577 pud_t *pud; 578 579 580 if (p4d_none(*p4d)) 581 return; 582 583 pud = pud_offset(p4d, 0); 584 if (PTRS_PER_PUD > 1) 585 (*func)(mm, virt_to_page(pud), PT_PUD); 586 xen_pud_walk(mm, pud, func, last, limit); 587 } 588 589 /* 590 * (Yet another) pagetable walker. This one is intended for pinning a 591 * pagetable. This means that it walks a pagetable and calls the 592 * callback function on each page it finds making up the page table, 593 * at every level. It walks the entire pagetable, but it only bothers 594 * pinning pte pages which are below limit. In the normal case this 595 * will be STACK_TOP_MAX, but at boot we need to pin up to 596 * FIXADDR_TOP. 597 * 598 * We must skip the Xen hole in the middle of the address space, just after 599 * the big x86-64 virtual hole. 600 */ 601 static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, 602 void (*func)(struct mm_struct *mm, struct page *, 603 enum pt_level), 604 unsigned long limit) 605 { 606 int i, nr; 607 unsigned hole_low = 0, hole_high = 0; 608 609 /* The limit is the last byte to be touched */ 610 limit--; 611 BUG_ON(limit >= FIXADDR_TOP); 612 613 /* 614 * 64-bit has a great big hole in the middle of the address 615 * space, which contains the Xen mappings. 616 */ 617 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR); 618 hole_high = pgd_index(GUARD_HOLE_END_ADDR); 619 620 nr = pgd_index(limit) + 1; 621 for (i = 0; i < nr; i++) { 622 p4d_t *p4d; 623 624 if (i >= hole_low && i < hole_high) 625 continue; 626 627 if (pgd_none(pgd[i])) 628 continue; 629 630 p4d = p4d_offset(&pgd[i], 0); 631 xen_p4d_walk(mm, p4d, func, i == nr - 1, limit); 632 } 633 634 /* Do the top level last, so that the callbacks can use it as 635 a cue to do final things like tlb flushes. */ 636 (*func)(mm, virt_to_page(pgd), PT_PGD); 637 } 638 639 static void xen_pgd_walk(struct mm_struct *mm, 640 void (*func)(struct mm_struct *mm, struct page *, 641 enum pt_level), 642 unsigned long limit) 643 { 644 __xen_pgd_walk(mm, mm->pgd, func, limit); 645 } 646 647 /* If we're using split pte locks, then take the page's lock and 648 return a pointer to it. Otherwise return NULL. */ 649 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) 650 { 651 spinlock_t *ptl = NULL; 652 653 #if USE_SPLIT_PTE_PTLOCKS 654 ptl = ptlock_ptr(page); 655 spin_lock_nest_lock(ptl, &mm->page_table_lock); 656 #endif 657 658 return ptl; 659 } 660 661 static void xen_pte_unlock(void *v) 662 { 663 spinlock_t *ptl = v; 664 spin_unlock(ptl); 665 } 666 667 static void xen_do_pin(unsigned level, unsigned long pfn) 668 { 669 struct mmuext_op op; 670 671 op.cmd = level; 672 op.arg1.mfn = pfn_to_mfn(pfn); 673 674 xen_extend_mmuext_op(&op); 675 } 676 677 static void xen_pin_page(struct mm_struct *mm, struct page *page, 678 enum pt_level level) 679 { 680 unsigned pgfl = TestSetPagePinned(page); 681 682 if (!pgfl) { 683 void *pt = lowmem_page_address(page); 684 unsigned long pfn = page_to_pfn(page); 685 struct multicall_space mcs = __xen_mc_entry(0); 686 spinlock_t *ptl; 687 688 /* 689 * We need to hold the pagetable lock between the time 690 * we make the pagetable RO and when we actually pin 691 * it. If we don't, then other users may come in and 692 * attempt to update the pagetable by writing it, 693 * which will fail because the memory is RO but not 694 * pinned, so Xen won't do the trap'n'emulate. 695 * 696 * If we're using split pte locks, we can't hold the 697 * entire pagetable's worth of locks during the 698 * traverse, because we may wrap the preempt count (8 699 * bits). The solution is to mark RO and pin each PTE 700 * page while holding the lock. This means the number 701 * of locks we end up holding is never more than a 702 * batch size (~32 entries, at present). 703 * 704 * If we're not using split pte locks, we needn't pin 705 * the PTE pages independently, because we're 706 * protected by the overall pagetable lock. 707 */ 708 ptl = NULL; 709 if (level == PT_PTE) 710 ptl = xen_pte_lock(page, mm); 711 712 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 713 pfn_pte(pfn, PAGE_KERNEL_RO), 714 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 715 716 if (ptl) { 717 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); 718 719 /* Queue a deferred unlock for when this batch 720 is completed. */ 721 xen_mc_callback(xen_pte_unlock, ptl); 722 } 723 } 724 } 725 726 /* This is called just after a mm has been created, but it has not 727 been used yet. We need to make sure that its pagetable is all 728 read-only, and can be pinned. */ 729 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) 730 { 731 pgd_t *user_pgd = xen_get_user_pgd(pgd); 732 733 trace_xen_mmu_pgd_pin(mm, pgd); 734 735 xen_mc_batch(); 736 737 __xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT); 738 739 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); 740 741 if (user_pgd) { 742 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); 743 xen_do_pin(MMUEXT_PIN_L4_TABLE, 744 PFN_DOWN(__pa(user_pgd))); 745 } 746 747 xen_mc_issue(0); 748 } 749 750 static void xen_pgd_pin(struct mm_struct *mm) 751 { 752 __xen_pgd_pin(mm, mm->pgd); 753 } 754 755 /* 756 * On save, we need to pin all pagetables to make sure they get their 757 * mfns turned into pfns. Search the list for any unpinned pgds and pin 758 * them (unpinned pgds are not currently in use, probably because the 759 * process is under construction or destruction). 760 * 761 * Expected to be called in stop_machine() ("equivalent to taking 762 * every spinlock in the system"), so the locking doesn't really 763 * matter all that much. 764 */ 765 void xen_mm_pin_all(void) 766 { 767 struct page *page; 768 769 spin_lock(&pgd_lock); 770 771 list_for_each_entry(page, &pgd_list, lru) { 772 if (!PagePinned(page)) { 773 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); 774 SetPageSavePinned(page); 775 } 776 } 777 778 spin_unlock(&pgd_lock); 779 } 780 781 static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page, 782 enum pt_level level) 783 { 784 SetPagePinned(page); 785 } 786 787 /* 788 * The init_mm pagetable is really pinned as soon as its created, but 789 * that's before we have page structures to store the bits. So do all 790 * the book-keeping now once struct pages for allocated pages are 791 * initialized. This happens only after memblock_free_all() is called. 792 */ 793 static void __init xen_after_bootmem(void) 794 { 795 static_branch_enable(&xen_struct_pages_ready); 796 #ifdef CONFIG_X86_VSYSCALL_EMULATION 797 SetPagePinned(virt_to_page(level3_user_vsyscall)); 798 #endif 799 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); 800 } 801 802 static void xen_unpin_page(struct mm_struct *mm, struct page *page, 803 enum pt_level level) 804 { 805 unsigned pgfl = TestClearPagePinned(page); 806 807 if (pgfl) { 808 void *pt = lowmem_page_address(page); 809 unsigned long pfn = page_to_pfn(page); 810 spinlock_t *ptl = NULL; 811 struct multicall_space mcs; 812 813 /* 814 * Do the converse to pin_page. If we're using split 815 * pte locks, we must be holding the lock for while 816 * the pte page is unpinned but still RO to prevent 817 * concurrent updates from seeing it in this 818 * partially-pinned state. 819 */ 820 if (level == PT_PTE) { 821 ptl = xen_pte_lock(page, mm); 822 823 if (ptl) 824 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); 825 } 826 827 mcs = __xen_mc_entry(0); 828 829 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 830 pfn_pte(pfn, PAGE_KERNEL), 831 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 832 833 if (ptl) { 834 /* unlock when batch completed */ 835 xen_mc_callback(xen_pte_unlock, ptl); 836 } 837 } 838 } 839 840 /* Release a pagetables pages back as normal RW */ 841 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) 842 { 843 pgd_t *user_pgd = xen_get_user_pgd(pgd); 844 845 trace_xen_mmu_pgd_unpin(mm, pgd); 846 847 xen_mc_batch(); 848 849 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 850 851 if (user_pgd) { 852 xen_do_pin(MMUEXT_UNPIN_TABLE, 853 PFN_DOWN(__pa(user_pgd))); 854 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); 855 } 856 857 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); 858 859 xen_mc_issue(0); 860 } 861 862 static void xen_pgd_unpin(struct mm_struct *mm) 863 { 864 __xen_pgd_unpin(mm, mm->pgd); 865 } 866 867 /* 868 * On resume, undo any pinning done at save, so that the rest of the 869 * kernel doesn't see any unexpected pinned pagetables. 870 */ 871 void xen_mm_unpin_all(void) 872 { 873 struct page *page; 874 875 spin_lock(&pgd_lock); 876 877 list_for_each_entry(page, &pgd_list, lru) { 878 if (PageSavePinned(page)) { 879 BUG_ON(!PagePinned(page)); 880 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); 881 ClearPageSavePinned(page); 882 } 883 } 884 885 spin_unlock(&pgd_lock); 886 } 887 888 static void xen_enter_mmap(struct mm_struct *mm) 889 { 890 spin_lock(&mm->page_table_lock); 891 xen_pgd_pin(mm); 892 spin_unlock(&mm->page_table_lock); 893 } 894 895 static void drop_mm_ref_this_cpu(void *info) 896 { 897 struct mm_struct *mm = info; 898 899 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm) 900 leave_mm(smp_processor_id()); 901 902 /* 903 * If this cpu still has a stale cr3 reference, then make sure 904 * it has been flushed. 905 */ 906 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd)) 907 xen_mc_flush(); 908 } 909 910 #ifdef CONFIG_SMP 911 /* 912 * Another cpu may still have their %cr3 pointing at the pagetable, so 913 * we need to repoint it somewhere else before we can unpin it. 914 */ 915 static void xen_drop_mm_ref(struct mm_struct *mm) 916 { 917 cpumask_var_t mask; 918 unsigned cpu; 919 920 drop_mm_ref_this_cpu(mm); 921 922 /* Get the "official" set of cpus referring to our pagetable. */ 923 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { 924 for_each_online_cpu(cpu) { 925 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) 926 continue; 927 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1); 928 } 929 return; 930 } 931 932 /* 933 * It's possible that a vcpu may have a stale reference to our 934 * cr3, because its in lazy mode, and it hasn't yet flushed 935 * its set of pending hypercalls yet. In this case, we can 936 * look at its actual current cr3 value, and force it to flush 937 * if needed. 938 */ 939 cpumask_clear(mask); 940 for_each_online_cpu(cpu) { 941 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 942 cpumask_set_cpu(cpu, mask); 943 } 944 945 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1); 946 free_cpumask_var(mask); 947 } 948 #else 949 static void xen_drop_mm_ref(struct mm_struct *mm) 950 { 951 drop_mm_ref_this_cpu(mm); 952 } 953 #endif 954 955 /* 956 * While a process runs, Xen pins its pagetables, which means that the 957 * hypervisor forces it to be read-only, and it controls all updates 958 * to it. This means that all pagetable updates have to go via the 959 * hypervisor, which is moderately expensive. 960 * 961 * Since we're pulling the pagetable down, we switch to use init_mm, 962 * unpin old process pagetable and mark it all read-write, which 963 * allows further operations on it to be simple memory accesses. 964 * 965 * The only subtle point is that another CPU may be still using the 966 * pagetable because of lazy tlb flushing. This means we need need to 967 * switch all CPUs off this pagetable before we can unpin it. 968 */ 969 static void xen_exit_mmap(struct mm_struct *mm) 970 { 971 get_cpu(); /* make sure we don't move around */ 972 xen_drop_mm_ref(mm); 973 put_cpu(); 974 975 spin_lock(&mm->page_table_lock); 976 977 /* pgd may not be pinned in the error exit path of execve */ 978 if (xen_page_pinned(mm->pgd)) 979 xen_pgd_unpin(mm); 980 981 spin_unlock(&mm->page_table_lock); 982 } 983 984 static void xen_post_allocator_init(void); 985 986 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 987 { 988 struct mmuext_op op; 989 990 op.cmd = cmd; 991 op.arg1.mfn = pfn_to_mfn(pfn); 992 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) 993 BUG(); 994 } 995 996 static void __init xen_cleanhighmap(unsigned long vaddr, 997 unsigned long vaddr_end) 998 { 999 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 1000 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr); 1001 1002 /* NOTE: The loop is more greedy than the cleanup_highmap variant. 1003 * We include the PMD passed in on _both_ boundaries. */ 1004 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD)); 1005 pmd++, vaddr += PMD_SIZE) { 1006 if (pmd_none(*pmd)) 1007 continue; 1008 if (vaddr < (unsigned long) _text || vaddr > kernel_end) 1009 set_pmd(pmd, __pmd(0)); 1010 } 1011 /* In case we did something silly, we should crash in this function 1012 * instead of somewhere later and be confusing. */ 1013 xen_mc_flush(); 1014 } 1015 1016 /* 1017 * Make a page range writeable and free it. 1018 */ 1019 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size) 1020 { 1021 void *vaddr = __va(paddr); 1022 void *vaddr_end = vaddr + size; 1023 1024 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE) 1025 make_lowmem_page_readwrite(vaddr); 1026 1027 memblock_phys_free(paddr, size); 1028 } 1029 1030 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin) 1031 { 1032 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK; 1033 1034 if (unpin) 1035 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa)); 1036 ClearPagePinned(virt_to_page(__va(pa))); 1037 xen_free_ro_pages(pa, PAGE_SIZE); 1038 } 1039 1040 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin) 1041 { 1042 unsigned long pa; 1043 pte_t *pte_tbl; 1044 int i; 1045 1046 if (pmd_large(*pmd)) { 1047 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK; 1048 xen_free_ro_pages(pa, PMD_SIZE); 1049 return; 1050 } 1051 1052 pte_tbl = pte_offset_kernel(pmd, 0); 1053 for (i = 0; i < PTRS_PER_PTE; i++) { 1054 if (pte_none(pte_tbl[i])) 1055 continue; 1056 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT; 1057 xen_free_ro_pages(pa, PAGE_SIZE); 1058 } 1059 set_pmd(pmd, __pmd(0)); 1060 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin); 1061 } 1062 1063 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin) 1064 { 1065 unsigned long pa; 1066 pmd_t *pmd_tbl; 1067 int i; 1068 1069 if (pud_large(*pud)) { 1070 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK; 1071 xen_free_ro_pages(pa, PUD_SIZE); 1072 return; 1073 } 1074 1075 pmd_tbl = pmd_offset(pud, 0); 1076 for (i = 0; i < PTRS_PER_PMD; i++) { 1077 if (pmd_none(pmd_tbl[i])) 1078 continue; 1079 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin); 1080 } 1081 set_pud(pud, __pud(0)); 1082 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin); 1083 } 1084 1085 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin) 1086 { 1087 unsigned long pa; 1088 pud_t *pud_tbl; 1089 int i; 1090 1091 if (p4d_large(*p4d)) { 1092 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK; 1093 xen_free_ro_pages(pa, P4D_SIZE); 1094 return; 1095 } 1096 1097 pud_tbl = pud_offset(p4d, 0); 1098 for (i = 0; i < PTRS_PER_PUD; i++) { 1099 if (pud_none(pud_tbl[i])) 1100 continue; 1101 xen_cleanmfnmap_pud(pud_tbl + i, unpin); 1102 } 1103 set_p4d(p4d, __p4d(0)); 1104 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin); 1105 } 1106 1107 /* 1108 * Since it is well isolated we can (and since it is perhaps large we should) 1109 * also free the page tables mapping the initial P->M table. 1110 */ 1111 static void __init xen_cleanmfnmap(unsigned long vaddr) 1112 { 1113 pgd_t *pgd; 1114 p4d_t *p4d; 1115 bool unpin; 1116 1117 unpin = (vaddr == 2 * PGDIR_SIZE); 1118 vaddr &= PMD_MASK; 1119 pgd = pgd_offset_k(vaddr); 1120 p4d = p4d_offset(pgd, 0); 1121 if (!p4d_none(*p4d)) 1122 xen_cleanmfnmap_p4d(p4d, unpin); 1123 } 1124 1125 static void __init xen_pagetable_p2m_free(void) 1126 { 1127 unsigned long size; 1128 unsigned long addr; 1129 1130 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 1131 1132 /* No memory or already called. */ 1133 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list) 1134 return; 1135 1136 /* using __ka address and sticking INVALID_P2M_ENTRY! */ 1137 memset((void *)xen_start_info->mfn_list, 0xff, size); 1138 1139 addr = xen_start_info->mfn_list; 1140 /* 1141 * We could be in __ka space. 1142 * We roundup to the PMD, which means that if anybody at this stage is 1143 * using the __ka address of xen_start_info or 1144 * xen_start_info->shared_info they are in going to crash. Fortunately 1145 * we have already revectored in xen_setup_kernel_pagetable. 1146 */ 1147 size = roundup(size, PMD_SIZE); 1148 1149 if (addr >= __START_KERNEL_map) { 1150 xen_cleanhighmap(addr, addr + size); 1151 size = PAGE_ALIGN(xen_start_info->nr_pages * 1152 sizeof(unsigned long)); 1153 memblock_free((void *)addr, size); 1154 } else { 1155 xen_cleanmfnmap(addr); 1156 } 1157 } 1158 1159 static void __init xen_pagetable_cleanhighmap(void) 1160 { 1161 unsigned long size; 1162 unsigned long addr; 1163 1164 /* At this stage, cleanup_highmap has already cleaned __ka space 1165 * from _brk_limit way up to the max_pfn_mapped (which is the end of 1166 * the ramdisk). We continue on, erasing PMD entries that point to page 1167 * tables - do note that they are accessible at this stage via __va. 1168 * As Xen is aligning the memory end to a 4MB boundary, for good 1169 * measure we also round up to PMD_SIZE * 2 - which means that if 1170 * anybody is using __ka address to the initial boot-stack - and try 1171 * to use it - they are going to crash. The xen_start_info has been 1172 * taken care of already in xen_setup_kernel_pagetable. */ 1173 addr = xen_start_info->pt_base; 1174 size = xen_start_info->nr_pt_frames * PAGE_SIZE; 1175 1176 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2)); 1177 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base)); 1178 } 1179 1180 static void __init xen_pagetable_p2m_setup(void) 1181 { 1182 xen_vmalloc_p2m_tree(); 1183 1184 xen_pagetable_p2m_free(); 1185 1186 xen_pagetable_cleanhighmap(); 1187 1188 /* And revector! Bye bye old array */ 1189 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 1190 } 1191 1192 static void __init xen_pagetable_init(void) 1193 { 1194 /* 1195 * The majority of further PTE writes is to pagetables already 1196 * announced as such to Xen. Hence it is more efficient to use 1197 * hypercalls for these updates. 1198 */ 1199 pv_ops.mmu.set_pte = __xen_set_pte; 1200 1201 paging_init(); 1202 xen_post_allocator_init(); 1203 1204 xen_pagetable_p2m_setup(); 1205 1206 /* Allocate and initialize top and mid mfn levels for p2m structure */ 1207 xen_build_mfn_list_list(); 1208 1209 /* Remap memory freed due to conflicts with E820 map */ 1210 xen_remap_memory(); 1211 xen_setup_mfn_list_list(); 1212 } 1213 1214 static noinstr void xen_write_cr2(unsigned long cr2) 1215 { 1216 this_cpu_read(xen_vcpu)->arch.cr2 = cr2; 1217 } 1218 1219 static noinline void xen_flush_tlb(void) 1220 { 1221 struct mmuext_op *op; 1222 struct multicall_space mcs; 1223 1224 preempt_disable(); 1225 1226 mcs = xen_mc_entry(sizeof(*op)); 1227 1228 op = mcs.args; 1229 op->cmd = MMUEXT_TLB_FLUSH_LOCAL; 1230 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1231 1232 xen_mc_issue(PARAVIRT_LAZY_MMU); 1233 1234 preempt_enable(); 1235 } 1236 1237 static void xen_flush_tlb_one_user(unsigned long addr) 1238 { 1239 struct mmuext_op *op; 1240 struct multicall_space mcs; 1241 1242 trace_xen_mmu_flush_tlb_one_user(addr); 1243 1244 preempt_disable(); 1245 1246 mcs = xen_mc_entry(sizeof(*op)); 1247 op = mcs.args; 1248 op->cmd = MMUEXT_INVLPG_LOCAL; 1249 op->arg1.linear_addr = addr & PAGE_MASK; 1250 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1251 1252 xen_mc_issue(PARAVIRT_LAZY_MMU); 1253 1254 preempt_enable(); 1255 } 1256 1257 static void xen_flush_tlb_multi(const struct cpumask *cpus, 1258 const struct flush_tlb_info *info) 1259 { 1260 struct { 1261 struct mmuext_op op; 1262 DECLARE_BITMAP(mask, NR_CPUS); 1263 } *args; 1264 struct multicall_space mcs; 1265 const size_t mc_entry_size = sizeof(args->op) + 1266 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus()); 1267 1268 trace_xen_mmu_flush_tlb_multi(cpus, info->mm, info->start, info->end); 1269 1270 if (cpumask_empty(cpus)) 1271 return; /* nothing to do */ 1272 1273 mcs = xen_mc_entry(mc_entry_size); 1274 args = mcs.args; 1275 args->op.arg2.vcpumask = to_cpumask(args->mask); 1276 1277 /* Remove any offline CPUs */ 1278 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); 1279 1280 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; 1281 if (info->end != TLB_FLUSH_ALL && 1282 (info->end - info->start) <= PAGE_SIZE) { 1283 args->op.cmd = MMUEXT_INVLPG_MULTI; 1284 args->op.arg1.linear_addr = info->start; 1285 } 1286 1287 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); 1288 1289 xen_mc_issue(PARAVIRT_LAZY_MMU); 1290 } 1291 1292 static unsigned long xen_read_cr3(void) 1293 { 1294 return this_cpu_read(xen_cr3); 1295 } 1296 1297 static void set_current_cr3(void *v) 1298 { 1299 this_cpu_write(xen_current_cr3, (unsigned long)v); 1300 } 1301 1302 static void __xen_write_cr3(bool kernel, unsigned long cr3) 1303 { 1304 struct mmuext_op op; 1305 unsigned long mfn; 1306 1307 trace_xen_mmu_write_cr3(kernel, cr3); 1308 1309 if (cr3) 1310 mfn = pfn_to_mfn(PFN_DOWN(cr3)); 1311 else 1312 mfn = 0; 1313 1314 WARN_ON(mfn == 0 && kernel); 1315 1316 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; 1317 op.arg1.mfn = mfn; 1318 1319 xen_extend_mmuext_op(&op); 1320 1321 if (kernel) { 1322 this_cpu_write(xen_cr3, cr3); 1323 1324 /* Update xen_current_cr3 once the batch has actually 1325 been submitted. */ 1326 xen_mc_callback(set_current_cr3, (void *)cr3); 1327 } 1328 } 1329 static void xen_write_cr3(unsigned long cr3) 1330 { 1331 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); 1332 1333 BUG_ON(preemptible()); 1334 1335 xen_mc_batch(); /* disables interrupts */ 1336 1337 /* Update while interrupts are disabled, so its atomic with 1338 respect to ipis */ 1339 this_cpu_write(xen_cr3, cr3); 1340 1341 __xen_write_cr3(true, cr3); 1342 1343 if (user_pgd) 1344 __xen_write_cr3(false, __pa(user_pgd)); 1345 else 1346 __xen_write_cr3(false, 0); 1347 1348 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1349 } 1350 1351 /* 1352 * At the start of the day - when Xen launches a guest, it has already 1353 * built pagetables for the guest. We diligently look over them 1354 * in xen_setup_kernel_pagetable and graft as appropriate them in the 1355 * init_top_pgt and its friends. Then when we are happy we load 1356 * the new init_top_pgt - and continue on. 1357 * 1358 * The generic code starts (start_kernel) and 'init_mem_mapping' sets 1359 * up the rest of the pagetables. When it has completed it loads the cr3. 1360 * N.B. that baremetal would start at 'start_kernel' (and the early 1361 * #PF handler would create bootstrap pagetables) - so we are running 1362 * with the same assumptions as what to do when write_cr3 is executed 1363 * at this point. 1364 * 1365 * Since there are no user-page tables at all, we have two variants 1366 * of xen_write_cr3 - the early bootup (this one), and the late one 1367 * (xen_write_cr3). The reason we have to do that is that in 64-bit 1368 * the Linux kernel and user-space are both in ring 3 while the 1369 * hypervisor is in ring 0. 1370 */ 1371 static void __init xen_write_cr3_init(unsigned long cr3) 1372 { 1373 BUG_ON(preemptible()); 1374 1375 xen_mc_batch(); /* disables interrupts */ 1376 1377 /* Update while interrupts are disabled, so its atomic with 1378 respect to ipis */ 1379 this_cpu_write(xen_cr3, cr3); 1380 1381 __xen_write_cr3(true, cr3); 1382 1383 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1384 } 1385 1386 static int xen_pgd_alloc(struct mm_struct *mm) 1387 { 1388 pgd_t *pgd = mm->pgd; 1389 struct page *page = virt_to_page(pgd); 1390 pgd_t *user_pgd; 1391 int ret = -ENOMEM; 1392 1393 BUG_ON(PagePinned(virt_to_page(pgd))); 1394 BUG_ON(page->private != 0); 1395 1396 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); 1397 page->private = (unsigned long)user_pgd; 1398 1399 if (user_pgd != NULL) { 1400 #ifdef CONFIG_X86_VSYSCALL_EMULATION 1401 user_pgd[pgd_index(VSYSCALL_ADDR)] = 1402 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); 1403 #endif 1404 ret = 0; 1405 } 1406 1407 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); 1408 1409 return ret; 1410 } 1411 1412 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) 1413 { 1414 pgd_t *user_pgd = xen_get_user_pgd(pgd); 1415 1416 if (user_pgd) 1417 free_page((unsigned long)user_pgd); 1418 } 1419 1420 /* 1421 * Init-time set_pte while constructing initial pagetables, which 1422 * doesn't allow RO page table pages to be remapped RW. 1423 * 1424 * If there is no MFN for this PFN then this page is initially 1425 * ballooned out so clear the PTE (as in decrease_reservation() in 1426 * drivers/xen/balloon.c). 1427 * 1428 * Many of these PTE updates are done on unpinned and writable pages 1429 * and doing a hypercall for these is unnecessary and expensive. At 1430 * this point it is rarely possible to tell if a page is pinned, so 1431 * mostly write the PTE directly and rely on Xen trapping and 1432 * emulating any updates as necessary. 1433 */ 1434 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte) 1435 { 1436 if (unlikely(is_early_ioremap_ptep(ptep))) 1437 __xen_set_pte(ptep, pte); 1438 else 1439 native_set_pte(ptep, pte); 1440 } 1441 1442 __visible pte_t xen_make_pte_init(pteval_t pte) 1443 { 1444 unsigned long pfn; 1445 1446 /* 1447 * Pages belonging to the initial p2m list mapped outside the default 1448 * address range must be mapped read-only. This region contains the 1449 * page tables for mapping the p2m list, too, and page tables MUST be 1450 * mapped read-only. 1451 */ 1452 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT; 1453 if (xen_start_info->mfn_list < __START_KERNEL_map && 1454 pfn >= xen_start_info->first_p2m_pfn && 1455 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames) 1456 pte &= ~_PAGE_RW; 1457 1458 pte = pte_pfn_to_mfn(pte); 1459 return native_make_pte(pte); 1460 } 1461 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init); 1462 1463 /* Early in boot, while setting up the initial pagetable, assume 1464 everything is pinned. */ 1465 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) 1466 { 1467 #ifdef CONFIG_FLATMEM 1468 BUG_ON(mem_map); /* should only be used early */ 1469 #endif 1470 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1471 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1472 } 1473 1474 /* Used for pmd and pud */ 1475 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) 1476 { 1477 #ifdef CONFIG_FLATMEM 1478 BUG_ON(mem_map); /* should only be used early */ 1479 #endif 1480 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1481 } 1482 1483 /* Early release_pte assumes that all pts are pinned, since there's 1484 only init_mm and anything attached to that is pinned. */ 1485 static void __init xen_release_pte_init(unsigned long pfn) 1486 { 1487 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1488 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1489 } 1490 1491 static void __init xen_release_pmd_init(unsigned long pfn) 1492 { 1493 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1494 } 1495 1496 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1497 { 1498 struct multicall_space mcs; 1499 struct mmuext_op *op; 1500 1501 mcs = __xen_mc_entry(sizeof(*op)); 1502 op = mcs.args; 1503 op->cmd = cmd; 1504 op->arg1.mfn = pfn_to_mfn(pfn); 1505 1506 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 1507 } 1508 1509 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot) 1510 { 1511 struct multicall_space mcs; 1512 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT); 1513 1514 mcs = __xen_mc_entry(0); 1515 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr, 1516 pfn_pte(pfn, prot), 0); 1517 } 1518 1519 /* This needs to make sure the new pte page is pinned iff its being 1520 attached to a pinned pagetable. */ 1521 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, 1522 unsigned level) 1523 { 1524 bool pinned = xen_page_pinned(mm->pgd); 1525 1526 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned); 1527 1528 if (pinned) { 1529 struct page *page = pfn_to_page(pfn); 1530 1531 pinned = false; 1532 if (static_branch_likely(&xen_struct_pages_ready)) { 1533 pinned = PagePinned(page); 1534 SetPagePinned(page); 1535 } 1536 1537 xen_mc_batch(); 1538 1539 __set_pfn_prot(pfn, PAGE_KERNEL_RO); 1540 1541 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS && !pinned) 1542 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1543 1544 xen_mc_issue(PARAVIRT_LAZY_MMU); 1545 } 1546 } 1547 1548 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) 1549 { 1550 xen_alloc_ptpage(mm, pfn, PT_PTE); 1551 } 1552 1553 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) 1554 { 1555 xen_alloc_ptpage(mm, pfn, PT_PMD); 1556 } 1557 1558 /* This should never happen until we're OK to use struct page */ 1559 static inline void xen_release_ptpage(unsigned long pfn, unsigned level) 1560 { 1561 struct page *page = pfn_to_page(pfn); 1562 bool pinned = PagePinned(page); 1563 1564 trace_xen_mmu_release_ptpage(pfn, level, pinned); 1565 1566 if (pinned) { 1567 xen_mc_batch(); 1568 1569 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1570 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1571 1572 __set_pfn_prot(pfn, PAGE_KERNEL); 1573 1574 xen_mc_issue(PARAVIRT_LAZY_MMU); 1575 1576 ClearPagePinned(page); 1577 } 1578 } 1579 1580 static void xen_release_pte(unsigned long pfn) 1581 { 1582 xen_release_ptpage(pfn, PT_PTE); 1583 } 1584 1585 static void xen_release_pmd(unsigned long pfn) 1586 { 1587 xen_release_ptpage(pfn, PT_PMD); 1588 } 1589 1590 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) 1591 { 1592 xen_alloc_ptpage(mm, pfn, PT_PUD); 1593 } 1594 1595 static void xen_release_pud(unsigned long pfn) 1596 { 1597 xen_release_ptpage(pfn, PT_PUD); 1598 } 1599 1600 /* 1601 * Like __va(), but returns address in the kernel mapping (which is 1602 * all we have until the physical memory mapping has been set up. 1603 */ 1604 static void * __init __ka(phys_addr_t paddr) 1605 { 1606 return (void *)(paddr + __START_KERNEL_map); 1607 } 1608 1609 /* Convert a machine address to physical address */ 1610 static unsigned long __init m2p(phys_addr_t maddr) 1611 { 1612 phys_addr_t paddr; 1613 1614 maddr &= XEN_PTE_MFN_MASK; 1615 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; 1616 1617 return paddr; 1618 } 1619 1620 /* Convert a machine address to kernel virtual */ 1621 static void * __init m2v(phys_addr_t maddr) 1622 { 1623 return __ka(m2p(maddr)); 1624 } 1625 1626 /* Set the page permissions on an identity-mapped pages */ 1627 static void __init set_page_prot_flags(void *addr, pgprot_t prot, 1628 unsigned long flags) 1629 { 1630 unsigned long pfn = __pa(addr) >> PAGE_SHIFT; 1631 pte_t pte = pfn_pte(pfn, prot); 1632 1633 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags)) 1634 BUG(); 1635 } 1636 static void __init set_page_prot(void *addr, pgprot_t prot) 1637 { 1638 return set_page_prot_flags(addr, prot, UVMF_NONE); 1639 } 1640 1641 void __init xen_setup_machphys_mapping(void) 1642 { 1643 struct xen_machphys_mapping mapping; 1644 1645 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { 1646 machine_to_phys_mapping = (unsigned long *)mapping.v_start; 1647 machine_to_phys_nr = mapping.max_mfn + 1; 1648 } else { 1649 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES; 1650 } 1651 } 1652 1653 static void __init convert_pfn_mfn(void *v) 1654 { 1655 pte_t *pte = v; 1656 int i; 1657 1658 /* All levels are converted the same way, so just treat them 1659 as ptes. */ 1660 for (i = 0; i < PTRS_PER_PTE; i++) 1661 pte[i] = xen_make_pte(pte[i].pte); 1662 } 1663 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end, 1664 unsigned long addr) 1665 { 1666 if (*pt_base == PFN_DOWN(__pa(addr))) { 1667 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1668 clear_page((void *)addr); 1669 (*pt_base)++; 1670 } 1671 if (*pt_end == PFN_DOWN(__pa(addr))) { 1672 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1673 clear_page((void *)addr); 1674 (*pt_end)--; 1675 } 1676 } 1677 /* 1678 * Set up the initial kernel pagetable. 1679 * 1680 * We can construct this by grafting the Xen provided pagetable into 1681 * head_64.S's preconstructed pagetables. We copy the Xen L2's into 1682 * level2_ident_pgt, and level2_kernel_pgt. This means that only the 1683 * kernel has a physical mapping to start with - but that's enough to 1684 * get __va working. We need to fill in the rest of the physical 1685 * mapping once some sort of allocator has been set up. 1686 */ 1687 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 1688 { 1689 pud_t *l3; 1690 pmd_t *l2; 1691 unsigned long addr[3]; 1692 unsigned long pt_base, pt_end; 1693 unsigned i; 1694 1695 /* max_pfn_mapped is the last pfn mapped in the initial memory 1696 * mappings. Considering that on Xen after the kernel mappings we 1697 * have the mappings of some pages that don't exist in pfn space, we 1698 * set max_pfn_mapped to the last real pfn mapped. */ 1699 if (xen_start_info->mfn_list < __START_KERNEL_map) 1700 max_pfn_mapped = xen_start_info->first_p2m_pfn; 1701 else 1702 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); 1703 1704 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base)); 1705 pt_end = pt_base + xen_start_info->nr_pt_frames; 1706 1707 /* Zap identity mapping */ 1708 init_top_pgt[0] = __pgd(0); 1709 1710 /* Pre-constructed entries are in pfn, so convert to mfn */ 1711 /* L4[273] -> level3_ident_pgt */ 1712 /* L4[511] -> level3_kernel_pgt */ 1713 convert_pfn_mfn(init_top_pgt); 1714 1715 /* L3_i[0] -> level2_ident_pgt */ 1716 convert_pfn_mfn(level3_ident_pgt); 1717 /* L3_k[510] -> level2_kernel_pgt */ 1718 /* L3_k[511] -> level2_fixmap_pgt */ 1719 convert_pfn_mfn(level3_kernel_pgt); 1720 1721 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */ 1722 convert_pfn_mfn(level2_fixmap_pgt); 1723 1724 /* We get [511][511] and have Xen's version of level2_kernel_pgt */ 1725 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); 1726 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); 1727 1728 addr[0] = (unsigned long)pgd; 1729 addr[1] = (unsigned long)l3; 1730 addr[2] = (unsigned long)l2; 1731 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem: 1732 * Both L4[273][0] and L4[511][510] have entries that point to the same 1733 * L2 (PMD) tables. Meaning that if you modify it in __va space 1734 * it will be also modified in the __ka space! (But if you just 1735 * modify the PMD table to point to other PTE's or none, then you 1736 * are OK - which is what cleanup_highmap does) */ 1737 copy_page(level2_ident_pgt, l2); 1738 /* Graft it onto L4[511][510] */ 1739 copy_page(level2_kernel_pgt, l2); 1740 1741 /* 1742 * Zap execute permission from the ident map. Due to the sharing of 1743 * L1 entries we need to do this in the L2. 1744 */ 1745 if (__supported_pte_mask & _PAGE_NX) { 1746 for (i = 0; i < PTRS_PER_PMD; ++i) { 1747 if (pmd_none(level2_ident_pgt[i])) 1748 continue; 1749 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX); 1750 } 1751 } 1752 1753 /* Copy the initial P->M table mappings if necessary. */ 1754 i = pgd_index(xen_start_info->mfn_list); 1755 if (i && i < pgd_index(__START_KERNEL_map)) 1756 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i]; 1757 1758 /* Make pagetable pieces RO */ 1759 set_page_prot(init_top_pgt, PAGE_KERNEL_RO); 1760 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); 1761 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); 1762 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO); 1763 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); 1764 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); 1765 1766 for (i = 0; i < FIXMAP_PMD_NUM; i++) { 1767 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE, 1768 PAGE_KERNEL_RO); 1769 } 1770 1771 /* Pin down new L4 */ 1772 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, 1773 PFN_DOWN(__pa_symbol(init_top_pgt))); 1774 1775 /* Unpin Xen-provided one */ 1776 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 1777 1778 #ifdef CONFIG_X86_VSYSCALL_EMULATION 1779 /* Pin user vsyscall L3 */ 1780 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); 1781 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, 1782 PFN_DOWN(__pa_symbol(level3_user_vsyscall))); 1783 #endif 1784 1785 /* 1786 * At this stage there can be no user pgd, and no page structure to 1787 * attach it to, so make sure we just set kernel pgd. 1788 */ 1789 xen_mc_batch(); 1790 __xen_write_cr3(true, __pa(init_top_pgt)); 1791 xen_mc_issue(PARAVIRT_LAZY_CPU); 1792 1793 /* We can't that easily rip out L3 and L2, as the Xen pagetables are 1794 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for 1795 * the initial domain. For guests using the toolstack, they are in: 1796 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only 1797 * rip out the [L4] (pgd), but for guests we shave off three pages. 1798 */ 1799 for (i = 0; i < ARRAY_SIZE(addr); i++) 1800 check_pt_base(&pt_base, &pt_end, addr[i]); 1801 1802 /* Our (by three pages) smaller Xen pagetable that we are using */ 1803 xen_pt_base = PFN_PHYS(pt_base); 1804 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE; 1805 memblock_reserve(xen_pt_base, xen_pt_size); 1806 1807 /* Revector the xen_start_info */ 1808 xen_start_info = (struct start_info *)__va(__pa(xen_start_info)); 1809 } 1810 1811 /* 1812 * Read a value from a physical address. 1813 */ 1814 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr) 1815 { 1816 unsigned long *vaddr; 1817 unsigned long val; 1818 1819 vaddr = early_memremap_ro(addr, sizeof(val)); 1820 val = *vaddr; 1821 early_memunmap(vaddr, sizeof(val)); 1822 return val; 1823 } 1824 1825 /* 1826 * Translate a virtual address to a physical one without relying on mapped 1827 * page tables. Don't rely on big pages being aligned in (guest) physical 1828 * space! 1829 */ 1830 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr) 1831 { 1832 phys_addr_t pa; 1833 pgd_t pgd; 1834 pud_t pud; 1835 pmd_t pmd; 1836 pte_t pte; 1837 1838 pa = read_cr3_pa(); 1839 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) * 1840 sizeof(pgd))); 1841 if (!pgd_present(pgd)) 1842 return 0; 1843 1844 pa = pgd_val(pgd) & PTE_PFN_MASK; 1845 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) * 1846 sizeof(pud))); 1847 if (!pud_present(pud)) 1848 return 0; 1849 pa = pud_val(pud) & PTE_PFN_MASK; 1850 if (pud_large(pud)) 1851 return pa + (vaddr & ~PUD_MASK); 1852 1853 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) * 1854 sizeof(pmd))); 1855 if (!pmd_present(pmd)) 1856 return 0; 1857 pa = pmd_val(pmd) & PTE_PFN_MASK; 1858 if (pmd_large(pmd)) 1859 return pa + (vaddr & ~PMD_MASK); 1860 1861 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) * 1862 sizeof(pte))); 1863 if (!pte_present(pte)) 1864 return 0; 1865 pa = pte_pfn(pte) << PAGE_SHIFT; 1866 1867 return pa | (vaddr & ~PAGE_MASK); 1868 } 1869 1870 /* 1871 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to 1872 * this area. 1873 */ 1874 void __init xen_relocate_p2m(void) 1875 { 1876 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys; 1877 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end; 1878 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud; 1879 pte_t *pt; 1880 pmd_t *pmd; 1881 pud_t *pud; 1882 pgd_t *pgd; 1883 unsigned long *new_p2m; 1884 1885 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 1886 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT; 1887 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT; 1888 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT; 1889 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT; 1890 n_frames = n_pte + n_pt + n_pmd + n_pud; 1891 1892 new_area = xen_find_free_area(PFN_PHYS(n_frames)); 1893 if (!new_area) { 1894 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n"); 1895 BUG(); 1896 } 1897 1898 /* 1899 * Setup the page tables for addressing the new p2m list. 1900 * We have asked the hypervisor to map the p2m list at the user address 1901 * PUD_SIZE. It may have done so, or it may have used a kernel space 1902 * address depending on the Xen version. 1903 * To avoid any possible virtual address collision, just use 1904 * 2 * PUD_SIZE for the new area. 1905 */ 1906 pud_phys = new_area; 1907 pmd_phys = pud_phys + PFN_PHYS(n_pud); 1908 pt_phys = pmd_phys + PFN_PHYS(n_pmd); 1909 p2m_pfn = PFN_DOWN(pt_phys) + n_pt; 1910 1911 pgd = __va(read_cr3_pa()); 1912 new_p2m = (unsigned long *)(2 * PGDIR_SIZE); 1913 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) { 1914 pud = early_memremap(pud_phys, PAGE_SIZE); 1915 clear_page(pud); 1916 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD); 1917 idx_pmd++) { 1918 pmd = early_memremap(pmd_phys, PAGE_SIZE); 1919 clear_page(pmd); 1920 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD); 1921 idx_pt++) { 1922 pt = early_memremap(pt_phys, PAGE_SIZE); 1923 clear_page(pt); 1924 for (idx_pte = 0; 1925 idx_pte < min(n_pte, PTRS_PER_PTE); 1926 idx_pte++) { 1927 pt[idx_pte] = pfn_pte(p2m_pfn, 1928 PAGE_KERNEL); 1929 p2m_pfn++; 1930 } 1931 n_pte -= PTRS_PER_PTE; 1932 early_memunmap(pt, PAGE_SIZE); 1933 make_lowmem_page_readonly(__va(pt_phys)); 1934 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, 1935 PFN_DOWN(pt_phys)); 1936 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys); 1937 pt_phys += PAGE_SIZE; 1938 } 1939 n_pt -= PTRS_PER_PMD; 1940 early_memunmap(pmd, PAGE_SIZE); 1941 make_lowmem_page_readonly(__va(pmd_phys)); 1942 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE, 1943 PFN_DOWN(pmd_phys)); 1944 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys); 1945 pmd_phys += PAGE_SIZE; 1946 } 1947 n_pmd -= PTRS_PER_PUD; 1948 early_memunmap(pud, PAGE_SIZE); 1949 make_lowmem_page_readonly(__va(pud_phys)); 1950 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys)); 1951 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys)); 1952 pud_phys += PAGE_SIZE; 1953 } 1954 1955 /* Now copy the old p2m info to the new area. */ 1956 memcpy(new_p2m, xen_p2m_addr, size); 1957 xen_p2m_addr = new_p2m; 1958 1959 /* Release the old p2m list and set new list info. */ 1960 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list)); 1961 BUG_ON(!p2m_pfn); 1962 p2m_pfn_end = p2m_pfn + PFN_DOWN(size); 1963 1964 if (xen_start_info->mfn_list < __START_KERNEL_map) { 1965 pfn = xen_start_info->first_p2m_pfn; 1966 pfn_end = xen_start_info->first_p2m_pfn + 1967 xen_start_info->nr_p2m_frames; 1968 set_pgd(pgd + 1, __pgd(0)); 1969 } else { 1970 pfn = p2m_pfn; 1971 pfn_end = p2m_pfn_end; 1972 } 1973 1974 memblock_phys_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn)); 1975 while (pfn < pfn_end) { 1976 if (pfn == p2m_pfn) { 1977 pfn = p2m_pfn_end; 1978 continue; 1979 } 1980 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1981 pfn++; 1982 } 1983 1984 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 1985 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area); 1986 xen_start_info->nr_p2m_frames = n_frames; 1987 } 1988 1989 void __init xen_reserve_special_pages(void) 1990 { 1991 phys_addr_t paddr; 1992 1993 memblock_reserve(__pa(xen_start_info), PAGE_SIZE); 1994 if (xen_start_info->store_mfn) { 1995 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn)); 1996 memblock_reserve(paddr, PAGE_SIZE); 1997 } 1998 if (!xen_initial_domain()) { 1999 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn)); 2000 memblock_reserve(paddr, PAGE_SIZE); 2001 } 2002 } 2003 2004 void __init xen_pt_check_e820(void) 2005 { 2006 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) { 2007 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n"); 2008 BUG(); 2009 } 2010 } 2011 2012 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; 2013 2014 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) 2015 { 2016 pte_t pte; 2017 unsigned long vaddr; 2018 2019 phys >>= PAGE_SHIFT; 2020 2021 switch (idx) { 2022 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: 2023 #ifdef CONFIG_X86_VSYSCALL_EMULATION 2024 case VSYSCALL_PAGE: 2025 #endif 2026 /* All local page mappings */ 2027 pte = pfn_pte(phys, prot); 2028 break; 2029 2030 #ifdef CONFIG_X86_LOCAL_APIC 2031 case FIX_APIC_BASE: /* maps dummy local APIC */ 2032 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2033 break; 2034 #endif 2035 2036 #ifdef CONFIG_X86_IO_APIC 2037 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: 2038 /* 2039 * We just don't map the IO APIC - all access is via 2040 * hypercalls. Keep the address in the pte for reference. 2041 */ 2042 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2043 break; 2044 #endif 2045 2046 case FIX_PARAVIRT_BOOTMAP: 2047 /* This is an MFN, but it isn't an IO mapping from the 2048 IO domain */ 2049 pte = mfn_pte(phys, prot); 2050 break; 2051 2052 default: 2053 /* By default, set_fixmap is used for hardware mappings */ 2054 pte = mfn_pte(phys, prot); 2055 break; 2056 } 2057 2058 vaddr = __fix_to_virt(idx); 2059 if (HYPERVISOR_update_va_mapping(vaddr, pte, UVMF_INVLPG)) 2060 BUG(); 2061 2062 #ifdef CONFIG_X86_VSYSCALL_EMULATION 2063 /* Replicate changes to map the vsyscall page into the user 2064 pagetable vsyscall mapping. */ 2065 if (idx == VSYSCALL_PAGE) 2066 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); 2067 #endif 2068 } 2069 2070 static void __init xen_post_allocator_init(void) 2071 { 2072 pv_ops.mmu.set_pte = xen_set_pte; 2073 pv_ops.mmu.set_pmd = xen_set_pmd; 2074 pv_ops.mmu.set_pud = xen_set_pud; 2075 pv_ops.mmu.set_p4d = xen_set_p4d; 2076 2077 /* This will work as long as patching hasn't happened yet 2078 (which it hasn't) */ 2079 pv_ops.mmu.alloc_pte = xen_alloc_pte; 2080 pv_ops.mmu.alloc_pmd = xen_alloc_pmd; 2081 pv_ops.mmu.release_pte = xen_release_pte; 2082 pv_ops.mmu.release_pmd = xen_release_pmd; 2083 pv_ops.mmu.alloc_pud = xen_alloc_pud; 2084 pv_ops.mmu.release_pud = xen_release_pud; 2085 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte); 2086 2087 pv_ops.mmu.write_cr3 = &xen_write_cr3; 2088 } 2089 2090 static void xen_leave_lazy_mmu(void) 2091 { 2092 preempt_disable(); 2093 xen_mc_flush(); 2094 paravirt_leave_lazy_mmu(); 2095 preempt_enable(); 2096 } 2097 2098 static const typeof(pv_ops) xen_mmu_ops __initconst = { 2099 .mmu = { 2100 .read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2), 2101 .write_cr2 = xen_write_cr2, 2102 2103 .read_cr3 = xen_read_cr3, 2104 .write_cr3 = xen_write_cr3_init, 2105 2106 .flush_tlb_user = xen_flush_tlb, 2107 .flush_tlb_kernel = xen_flush_tlb, 2108 .flush_tlb_one_user = xen_flush_tlb_one_user, 2109 .flush_tlb_multi = xen_flush_tlb_multi, 2110 .tlb_remove_table = tlb_remove_table, 2111 2112 .pgd_alloc = xen_pgd_alloc, 2113 .pgd_free = xen_pgd_free, 2114 2115 .alloc_pte = xen_alloc_pte_init, 2116 .release_pte = xen_release_pte_init, 2117 .alloc_pmd = xen_alloc_pmd_init, 2118 .release_pmd = xen_release_pmd_init, 2119 2120 .set_pte = xen_set_pte_init, 2121 .set_pmd = xen_set_pmd_hyper, 2122 2123 .ptep_modify_prot_start = xen_ptep_modify_prot_start, 2124 .ptep_modify_prot_commit = xen_ptep_modify_prot_commit, 2125 2126 .pte_val = PV_CALLEE_SAVE(xen_pte_val), 2127 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), 2128 2129 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init), 2130 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), 2131 2132 .set_pud = xen_set_pud_hyper, 2133 2134 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), 2135 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), 2136 2137 .pud_val = PV_CALLEE_SAVE(xen_pud_val), 2138 .make_pud = PV_CALLEE_SAVE(xen_make_pud), 2139 .set_p4d = xen_set_p4d_hyper, 2140 2141 .alloc_pud = xen_alloc_pmd_init, 2142 .release_pud = xen_release_pmd_init, 2143 2144 #if CONFIG_PGTABLE_LEVELS >= 5 2145 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val), 2146 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d), 2147 #endif 2148 2149 .enter_mmap = xen_enter_mmap, 2150 .exit_mmap = xen_exit_mmap, 2151 2152 .lazy_mode = { 2153 .enter = paravirt_enter_lazy_mmu, 2154 .leave = xen_leave_lazy_mmu, 2155 .flush = paravirt_flush_lazy_mmu, 2156 }, 2157 2158 .set_fixmap = xen_set_fixmap, 2159 }, 2160 }; 2161 2162 void __init xen_init_mmu_ops(void) 2163 { 2164 x86_init.paging.pagetable_init = xen_pagetable_init; 2165 x86_init.hyper.init_after_bootmem = xen_after_bootmem; 2166 2167 pv_ops.mmu = xen_mmu_ops.mmu; 2168 2169 memset(dummy_mapping, 0xff, PAGE_SIZE); 2170 } 2171 2172 /* Protected by xen_reservation_lock. */ 2173 #define MAX_CONTIG_ORDER 9 /* 2MB */ 2174 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; 2175 2176 #define VOID_PTE (mfn_pte(0, __pgprot(0))) 2177 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, 2178 unsigned long *in_frames, 2179 unsigned long *out_frames) 2180 { 2181 int i; 2182 struct multicall_space mcs; 2183 2184 xen_mc_batch(); 2185 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { 2186 mcs = __xen_mc_entry(0); 2187 2188 if (in_frames) 2189 in_frames[i] = virt_to_mfn(vaddr); 2190 2191 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); 2192 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); 2193 2194 if (out_frames) 2195 out_frames[i] = virt_to_pfn(vaddr); 2196 } 2197 xen_mc_issue(0); 2198 } 2199 2200 /* 2201 * Update the pfn-to-mfn mappings for a virtual address range, either to 2202 * point to an array of mfns, or contiguously from a single starting 2203 * mfn. 2204 */ 2205 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, 2206 unsigned long *mfns, 2207 unsigned long first_mfn) 2208 { 2209 unsigned i, limit; 2210 unsigned long mfn; 2211 2212 xen_mc_batch(); 2213 2214 limit = 1u << order; 2215 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { 2216 struct multicall_space mcs; 2217 unsigned flags; 2218 2219 mcs = __xen_mc_entry(0); 2220 if (mfns) 2221 mfn = mfns[i]; 2222 else 2223 mfn = first_mfn + i; 2224 2225 if (i < (limit - 1)) 2226 flags = 0; 2227 else { 2228 if (order == 0) 2229 flags = UVMF_INVLPG | UVMF_ALL; 2230 else 2231 flags = UVMF_TLB_FLUSH | UVMF_ALL; 2232 } 2233 2234 MULTI_update_va_mapping(mcs.mc, vaddr, 2235 mfn_pte(mfn, PAGE_KERNEL), flags); 2236 2237 set_phys_to_machine(virt_to_pfn(vaddr), mfn); 2238 } 2239 2240 xen_mc_issue(0); 2241 } 2242 2243 /* 2244 * Perform the hypercall to exchange a region of our pfns to point to 2245 * memory with the required contiguous alignment. Takes the pfns as 2246 * input, and populates mfns as output. 2247 * 2248 * Returns a success code indicating whether the hypervisor was able to 2249 * satisfy the request or not. 2250 */ 2251 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, 2252 unsigned long *pfns_in, 2253 unsigned long extents_out, 2254 unsigned int order_out, 2255 unsigned long *mfns_out, 2256 unsigned int address_bits) 2257 { 2258 long rc; 2259 int success; 2260 2261 struct xen_memory_exchange exchange = { 2262 .in = { 2263 .nr_extents = extents_in, 2264 .extent_order = order_in, 2265 .extent_start = pfns_in, 2266 .domid = DOMID_SELF 2267 }, 2268 .out = { 2269 .nr_extents = extents_out, 2270 .extent_order = order_out, 2271 .extent_start = mfns_out, 2272 .address_bits = address_bits, 2273 .domid = DOMID_SELF 2274 } 2275 }; 2276 2277 BUG_ON(extents_in << order_in != extents_out << order_out); 2278 2279 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); 2280 success = (exchange.nr_exchanged == extents_in); 2281 2282 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); 2283 BUG_ON(success && (rc != 0)); 2284 2285 return success; 2286 } 2287 2288 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order, 2289 unsigned int address_bits, 2290 dma_addr_t *dma_handle) 2291 { 2292 unsigned long *in_frames = discontig_frames, out_frame; 2293 unsigned long flags; 2294 int success; 2295 unsigned long vstart = (unsigned long)phys_to_virt(pstart); 2296 2297 /* 2298 * Currently an auto-translated guest will not perform I/O, nor will 2299 * it require PAE page directories below 4GB. Therefore any calls to 2300 * this function are redundant and can be ignored. 2301 */ 2302 2303 if (unlikely(order > MAX_CONTIG_ORDER)) 2304 return -ENOMEM; 2305 2306 memset((void *) vstart, 0, PAGE_SIZE << order); 2307 2308 spin_lock_irqsave(&xen_reservation_lock, flags); 2309 2310 /* 1. Zap current PTEs, remembering MFNs. */ 2311 xen_zap_pfn_range(vstart, order, in_frames, NULL); 2312 2313 /* 2. Get a new contiguous memory extent. */ 2314 out_frame = virt_to_pfn(vstart); 2315 success = xen_exchange_memory(1UL << order, 0, in_frames, 2316 1, order, &out_frame, 2317 address_bits); 2318 2319 /* 3. Map the new extent in place of old pages. */ 2320 if (success) 2321 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); 2322 else 2323 xen_remap_exchanged_ptes(vstart, order, in_frames, 0); 2324 2325 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2326 2327 *dma_handle = virt_to_machine(vstart).maddr; 2328 return success ? 0 : -ENOMEM; 2329 } 2330 2331 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order) 2332 { 2333 unsigned long *out_frames = discontig_frames, in_frame; 2334 unsigned long flags; 2335 int success; 2336 unsigned long vstart; 2337 2338 if (unlikely(order > MAX_CONTIG_ORDER)) 2339 return; 2340 2341 vstart = (unsigned long)phys_to_virt(pstart); 2342 memset((void *) vstart, 0, PAGE_SIZE << order); 2343 2344 spin_lock_irqsave(&xen_reservation_lock, flags); 2345 2346 /* 1. Find start MFN of contiguous extent. */ 2347 in_frame = virt_to_mfn(vstart); 2348 2349 /* 2. Zap current PTEs. */ 2350 xen_zap_pfn_range(vstart, order, NULL, out_frames); 2351 2352 /* 3. Do the exchange for non-contiguous MFNs. */ 2353 success = xen_exchange_memory(1, order, &in_frame, 1UL << order, 2354 0, out_frames, 0); 2355 2356 /* 4. Map new pages in place of old pages. */ 2357 if (success) 2358 xen_remap_exchanged_ptes(vstart, order, out_frames, 0); 2359 else 2360 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); 2361 2362 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2363 } 2364 2365 static noinline void xen_flush_tlb_all(void) 2366 { 2367 struct mmuext_op *op; 2368 struct multicall_space mcs; 2369 2370 preempt_disable(); 2371 2372 mcs = xen_mc_entry(sizeof(*op)); 2373 2374 op = mcs.args; 2375 op->cmd = MMUEXT_TLB_FLUSH_ALL; 2376 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 2377 2378 xen_mc_issue(PARAVIRT_LAZY_MMU); 2379 2380 preempt_enable(); 2381 } 2382 2383 #define REMAP_BATCH_SIZE 16 2384 2385 struct remap_data { 2386 xen_pfn_t *pfn; 2387 bool contiguous; 2388 bool no_translate; 2389 pgprot_t prot; 2390 struct mmu_update *mmu_update; 2391 }; 2392 2393 static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data) 2394 { 2395 struct remap_data *rmd = data; 2396 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot)); 2397 2398 /* 2399 * If we have a contiguous range, just update the pfn itself, 2400 * else update pointer to be "next pfn". 2401 */ 2402 if (rmd->contiguous) 2403 (*rmd->pfn)++; 2404 else 2405 rmd->pfn++; 2406 2407 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr; 2408 rmd->mmu_update->ptr |= rmd->no_translate ? 2409 MMU_PT_UPDATE_NO_TRANSLATE : 2410 MMU_NORMAL_PT_UPDATE; 2411 rmd->mmu_update->val = pte_val_ma(pte); 2412 rmd->mmu_update++; 2413 2414 return 0; 2415 } 2416 2417 int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr, 2418 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot, 2419 unsigned int domid, bool no_translate) 2420 { 2421 int err = 0; 2422 struct remap_data rmd; 2423 struct mmu_update mmu_update[REMAP_BATCH_SIZE]; 2424 unsigned long range; 2425 int mapped = 0; 2426 2427 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO))); 2428 2429 rmd.pfn = pfn; 2430 rmd.prot = prot; 2431 /* 2432 * We use the err_ptr to indicate if there we are doing a contiguous 2433 * mapping or a discontiguous mapping. 2434 */ 2435 rmd.contiguous = !err_ptr; 2436 rmd.no_translate = no_translate; 2437 2438 while (nr) { 2439 int index = 0; 2440 int done = 0; 2441 int batch = min(REMAP_BATCH_SIZE, nr); 2442 int batch_left = batch; 2443 2444 range = (unsigned long)batch << PAGE_SHIFT; 2445 2446 rmd.mmu_update = mmu_update; 2447 err = apply_to_page_range(vma->vm_mm, addr, range, 2448 remap_area_pfn_pte_fn, &rmd); 2449 if (err) 2450 goto out; 2451 2452 /* 2453 * We record the error for each page that gives an error, but 2454 * continue mapping until the whole set is done 2455 */ 2456 do { 2457 int i; 2458 2459 err = HYPERVISOR_mmu_update(&mmu_update[index], 2460 batch_left, &done, domid); 2461 2462 /* 2463 * @err_ptr may be the same buffer as @gfn, so 2464 * only clear it after each chunk of @gfn is 2465 * used. 2466 */ 2467 if (err_ptr) { 2468 for (i = index; i < index + done; i++) 2469 err_ptr[i] = 0; 2470 } 2471 if (err < 0) { 2472 if (!err_ptr) 2473 goto out; 2474 err_ptr[i] = err; 2475 done++; /* Skip failed frame. */ 2476 } else 2477 mapped += done; 2478 batch_left -= done; 2479 index += done; 2480 } while (batch_left); 2481 2482 nr -= batch; 2483 addr += range; 2484 if (err_ptr) 2485 err_ptr += batch; 2486 cond_resched(); 2487 } 2488 out: 2489 2490 xen_flush_tlb_all(); 2491 2492 return err < 0 ? err : mapped; 2493 } 2494 EXPORT_SYMBOL_GPL(xen_remap_pfn); 2495 2496 #ifdef CONFIG_KEXEC_CORE 2497 phys_addr_t paddr_vmcoreinfo_note(void) 2498 { 2499 if (xen_pv_domain()) 2500 return virt_to_machine(vmcoreinfo_note).maddr; 2501 else 2502 return __pa(vmcoreinfo_note); 2503 } 2504 #endif /* CONFIG_KEXEC_CORE */ 2505