1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/bootmem.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/memblock.h> 35 #include <linux/edd.h> 36 #include <linux/frame.h> 37 38 #include <xen/xen.h> 39 #include <xen/events.h> 40 #include <xen/interface/xen.h> 41 #include <xen/interface/version.h> 42 #include <xen/interface/physdev.h> 43 #include <xen/interface/vcpu.h> 44 #include <xen/interface/memory.h> 45 #include <xen/interface/nmi.h> 46 #include <xen/interface/xen-mca.h> 47 #include <xen/features.h> 48 #include <xen/page.h> 49 #include <xen/hvc-console.h> 50 #include <xen/acpi.h> 51 52 #include <asm/paravirt.h> 53 #include <asm/apic.h> 54 #include <asm/page.h> 55 #include <asm/xen/pci.h> 56 #include <asm/xen/hypercall.h> 57 #include <asm/xen/hypervisor.h> 58 #include <asm/xen/cpuid.h> 59 #include <asm/fixmap.h> 60 #include <asm/processor.h> 61 #include <asm/proto.h> 62 #include <asm/msr-index.h> 63 #include <asm/traps.h> 64 #include <asm/setup.h> 65 #include <asm/desc.h> 66 #include <asm/pgalloc.h> 67 #include <asm/pgtable.h> 68 #include <asm/tlbflush.h> 69 #include <asm/reboot.h> 70 #include <asm/stackprotector.h> 71 #include <asm/hypervisor.h> 72 #include <asm/mach_traps.h> 73 #include <asm/mwait.h> 74 #include <asm/pci_x86.h> 75 #include <asm/cpu.h> 76 77 #ifdef CONFIG_ACPI 78 #include <linux/acpi.h> 79 #include <asm/acpi.h> 80 #include <acpi/pdc_intel.h> 81 #include <acpi/processor.h> 82 #include <xen/interface/platform.h> 83 #endif 84 85 #include "xen-ops.h" 86 #include "mmu.h" 87 #include "smp.h" 88 #include "multicalls.h" 89 #include "pmu.h" 90 91 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 92 93 void *xen_initial_gdt; 94 95 static int xen_cpu_up_prepare_pv(unsigned int cpu); 96 static int xen_cpu_dead_pv(unsigned int cpu); 97 98 struct tls_descs { 99 struct desc_struct desc[3]; 100 }; 101 102 /* 103 * Updating the 3 TLS descriptors in the GDT on every task switch is 104 * surprisingly expensive so we avoid updating them if they haven't 105 * changed. Since Xen writes different descriptors than the one 106 * passed in the update_descriptor hypercall we keep shadow copies to 107 * compare against. 108 */ 109 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 110 111 static void __init xen_banner(void) 112 { 113 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 114 struct xen_extraversion extra; 115 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 116 117 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 118 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 119 version >> 16, version & 0xffff, extra.extraversion, 120 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 121 } 122 123 static void __init xen_pv_init_platform(void) 124 { 125 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 126 127 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 128 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 129 130 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 131 xen_vcpu_info_reset(0); 132 133 /* pvclock is in shared info area */ 134 xen_init_time_ops(); 135 } 136 137 static void __init xen_pv_guest_late_init(void) 138 { 139 #ifndef CONFIG_SMP 140 /* Setup shared vcpu info for non-smp configurations */ 141 xen_setup_vcpu_info_placement(); 142 #endif 143 } 144 145 /* Check if running on Xen version (major, minor) or later */ 146 bool 147 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 148 { 149 unsigned int version; 150 151 if (!xen_domain()) 152 return false; 153 154 version = HYPERVISOR_xen_version(XENVER_version, NULL); 155 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 156 ((version >> 16) > major)) 157 return true; 158 return false; 159 } 160 161 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 162 static __read_mostly unsigned int cpuid_leaf5_edx_val; 163 164 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 165 unsigned int *cx, unsigned int *dx) 166 { 167 unsigned maskebx = ~0; 168 169 /* 170 * Mask out inconvenient features, to try and disable as many 171 * unsupported kernel subsystems as possible. 172 */ 173 switch (*ax) { 174 case CPUID_MWAIT_LEAF: 175 /* Synthesize the values.. */ 176 *ax = 0; 177 *bx = 0; 178 *cx = cpuid_leaf5_ecx_val; 179 *dx = cpuid_leaf5_edx_val; 180 return; 181 182 case 0xb: 183 /* Suppress extended topology stuff */ 184 maskebx = 0; 185 break; 186 } 187 188 asm(XEN_EMULATE_PREFIX "cpuid" 189 : "=a" (*ax), 190 "=b" (*bx), 191 "=c" (*cx), 192 "=d" (*dx) 193 : "0" (*ax), "2" (*cx)); 194 195 *bx &= maskebx; 196 } 197 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 198 199 static bool __init xen_check_mwait(void) 200 { 201 #ifdef CONFIG_ACPI 202 struct xen_platform_op op = { 203 .cmd = XENPF_set_processor_pminfo, 204 .u.set_pminfo.id = -1, 205 .u.set_pminfo.type = XEN_PM_PDC, 206 }; 207 uint32_t buf[3]; 208 unsigned int ax, bx, cx, dx; 209 unsigned int mwait_mask; 210 211 /* We need to determine whether it is OK to expose the MWAIT 212 * capability to the kernel to harvest deeper than C3 states from ACPI 213 * _CST using the processor_harvest_xen.c module. For this to work, we 214 * need to gather the MWAIT_LEAF values (which the cstate.c code 215 * checks against). The hypervisor won't expose the MWAIT flag because 216 * it would break backwards compatibility; so we will find out directly 217 * from the hardware and hypercall. 218 */ 219 if (!xen_initial_domain()) 220 return false; 221 222 /* 223 * When running under platform earlier than Xen4.2, do not expose 224 * mwait, to avoid the risk of loading native acpi pad driver 225 */ 226 if (!xen_running_on_version_or_later(4, 2)) 227 return false; 228 229 ax = 1; 230 cx = 0; 231 232 native_cpuid(&ax, &bx, &cx, &dx); 233 234 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 235 (1 << (X86_FEATURE_MWAIT % 32)); 236 237 if ((cx & mwait_mask) != mwait_mask) 238 return false; 239 240 /* We need to emulate the MWAIT_LEAF and for that we need both 241 * ecx and edx. The hypercall provides only partial information. 242 */ 243 244 ax = CPUID_MWAIT_LEAF; 245 bx = 0; 246 cx = 0; 247 dx = 0; 248 249 native_cpuid(&ax, &bx, &cx, &dx); 250 251 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 252 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 253 */ 254 buf[0] = ACPI_PDC_REVISION_ID; 255 buf[1] = 1; 256 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 257 258 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 259 260 if ((HYPERVISOR_platform_op(&op) == 0) && 261 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 262 cpuid_leaf5_ecx_val = cx; 263 cpuid_leaf5_edx_val = dx; 264 } 265 return true; 266 #else 267 return false; 268 #endif 269 } 270 271 static bool __init xen_check_xsave(void) 272 { 273 unsigned int cx, xsave_mask; 274 275 cx = cpuid_ecx(1); 276 277 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 278 (1 << (X86_FEATURE_OSXSAVE % 32)); 279 280 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 281 return (cx & xsave_mask) == xsave_mask; 282 } 283 284 static void __init xen_init_capabilities(void) 285 { 286 setup_force_cpu_cap(X86_FEATURE_XENPV); 287 setup_clear_cpu_cap(X86_FEATURE_DCA); 288 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 289 setup_clear_cpu_cap(X86_FEATURE_MTRR); 290 setup_clear_cpu_cap(X86_FEATURE_ACC); 291 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 292 setup_clear_cpu_cap(X86_FEATURE_SME); 293 294 /* 295 * Xen PV would need some work to support PCID: CR3 handling as well 296 * as xen_flush_tlb_others() would need updating. 297 */ 298 setup_clear_cpu_cap(X86_FEATURE_PCID); 299 300 if (!xen_initial_domain()) 301 setup_clear_cpu_cap(X86_FEATURE_ACPI); 302 303 if (xen_check_mwait()) 304 setup_force_cpu_cap(X86_FEATURE_MWAIT); 305 else 306 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 307 308 if (!xen_check_xsave()) { 309 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 310 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 311 } 312 } 313 314 static void xen_set_debugreg(int reg, unsigned long val) 315 { 316 HYPERVISOR_set_debugreg(reg, val); 317 } 318 319 static unsigned long xen_get_debugreg(int reg) 320 { 321 return HYPERVISOR_get_debugreg(reg); 322 } 323 324 static void xen_end_context_switch(struct task_struct *next) 325 { 326 xen_mc_flush(); 327 paravirt_end_context_switch(next); 328 } 329 330 static unsigned long xen_store_tr(void) 331 { 332 return 0; 333 } 334 335 /* 336 * Set the page permissions for a particular virtual address. If the 337 * address is a vmalloc mapping (or other non-linear mapping), then 338 * find the linear mapping of the page and also set its protections to 339 * match. 340 */ 341 static void set_aliased_prot(void *v, pgprot_t prot) 342 { 343 int level; 344 pte_t *ptep; 345 pte_t pte; 346 unsigned long pfn; 347 struct page *page; 348 unsigned char dummy; 349 350 ptep = lookup_address((unsigned long)v, &level); 351 BUG_ON(ptep == NULL); 352 353 pfn = pte_pfn(*ptep); 354 page = pfn_to_page(pfn); 355 356 pte = pfn_pte(pfn, prot); 357 358 /* 359 * Careful: update_va_mapping() will fail if the virtual address 360 * we're poking isn't populated in the page tables. We don't 361 * need to worry about the direct map (that's always in the page 362 * tables), but we need to be careful about vmap space. In 363 * particular, the top level page table can lazily propagate 364 * entries between processes, so if we've switched mms since we 365 * vmapped the target in the first place, we might not have the 366 * top-level page table entry populated. 367 * 368 * We disable preemption because we want the same mm active when 369 * we probe the target and when we issue the hypercall. We'll 370 * have the same nominal mm, but if we're a kernel thread, lazy 371 * mm dropping could change our pgd. 372 * 373 * Out of an abundance of caution, this uses __get_user() to fault 374 * in the target address just in case there's some obscure case 375 * in which the target address isn't readable. 376 */ 377 378 preempt_disable(); 379 380 probe_kernel_read(&dummy, v, 1); 381 382 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 383 BUG(); 384 385 if (!PageHighMem(page)) { 386 void *av = __va(PFN_PHYS(pfn)); 387 388 if (av != v) 389 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 390 BUG(); 391 } else 392 kmap_flush_unused(); 393 394 preempt_enable(); 395 } 396 397 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 398 { 399 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 400 int i; 401 402 /* 403 * We need to mark the all aliases of the LDT pages RO. We 404 * don't need to call vm_flush_aliases(), though, since that's 405 * only responsible for flushing aliases out the TLBs, not the 406 * page tables, and Xen will flush the TLB for us if needed. 407 * 408 * To avoid confusing future readers: none of this is necessary 409 * to load the LDT. The hypervisor only checks this when the 410 * LDT is faulted in due to subsequent descriptor access. 411 */ 412 413 for (i = 0; i < entries; i += entries_per_page) 414 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 415 } 416 417 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 418 { 419 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 420 int i; 421 422 for (i = 0; i < entries; i += entries_per_page) 423 set_aliased_prot(ldt + i, PAGE_KERNEL); 424 } 425 426 static void xen_set_ldt(const void *addr, unsigned entries) 427 { 428 struct mmuext_op *op; 429 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 430 431 trace_xen_cpu_set_ldt(addr, entries); 432 433 op = mcs.args; 434 op->cmd = MMUEXT_SET_LDT; 435 op->arg1.linear_addr = (unsigned long)addr; 436 op->arg2.nr_ents = entries; 437 438 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 439 440 xen_mc_issue(PARAVIRT_LAZY_CPU); 441 } 442 443 static void xen_load_gdt(const struct desc_ptr *dtr) 444 { 445 unsigned long va = dtr->address; 446 unsigned int size = dtr->size + 1; 447 unsigned long pfn, mfn; 448 int level; 449 pte_t *ptep; 450 void *virt; 451 452 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 453 BUG_ON(size > PAGE_SIZE); 454 BUG_ON(va & ~PAGE_MASK); 455 456 /* 457 * The GDT is per-cpu and is in the percpu data area. 458 * That can be virtually mapped, so we need to do a 459 * page-walk to get the underlying MFN for the 460 * hypercall. The page can also be in the kernel's 461 * linear range, so we need to RO that mapping too. 462 */ 463 ptep = lookup_address(va, &level); 464 BUG_ON(ptep == NULL); 465 466 pfn = pte_pfn(*ptep); 467 mfn = pfn_to_mfn(pfn); 468 virt = __va(PFN_PHYS(pfn)); 469 470 make_lowmem_page_readonly((void *)va); 471 make_lowmem_page_readonly(virt); 472 473 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 474 BUG(); 475 } 476 477 /* 478 * load_gdt for early boot, when the gdt is only mapped once 479 */ 480 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 481 { 482 unsigned long va = dtr->address; 483 unsigned int size = dtr->size + 1; 484 unsigned long pfn, mfn; 485 pte_t pte; 486 487 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 488 BUG_ON(size > PAGE_SIZE); 489 BUG_ON(va & ~PAGE_MASK); 490 491 pfn = virt_to_pfn(va); 492 mfn = pfn_to_mfn(pfn); 493 494 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 495 496 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 497 BUG(); 498 499 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 500 BUG(); 501 } 502 503 static inline bool desc_equal(const struct desc_struct *d1, 504 const struct desc_struct *d2) 505 { 506 return !memcmp(d1, d2, sizeof(*d1)); 507 } 508 509 static void load_TLS_descriptor(struct thread_struct *t, 510 unsigned int cpu, unsigned int i) 511 { 512 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 513 struct desc_struct *gdt; 514 xmaddr_t maddr; 515 struct multicall_space mc; 516 517 if (desc_equal(shadow, &t->tls_array[i])) 518 return; 519 520 *shadow = t->tls_array[i]; 521 522 gdt = get_cpu_gdt_rw(cpu); 523 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 524 mc = __xen_mc_entry(0); 525 526 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 527 } 528 529 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 530 { 531 /* 532 * XXX sleazy hack: If we're being called in a lazy-cpu zone 533 * and lazy gs handling is enabled, it means we're in a 534 * context switch, and %gs has just been saved. This means we 535 * can zero it out to prevent faults on exit from the 536 * hypervisor if the next process has no %gs. Either way, it 537 * has been saved, and the new value will get loaded properly. 538 * This will go away as soon as Xen has been modified to not 539 * save/restore %gs for normal hypercalls. 540 * 541 * On x86_64, this hack is not used for %gs, because gs points 542 * to KERNEL_GS_BASE (and uses it for PDA references), so we 543 * must not zero %gs on x86_64 544 * 545 * For x86_64, we need to zero %fs, otherwise we may get an 546 * exception between the new %fs descriptor being loaded and 547 * %fs being effectively cleared at __switch_to(). 548 */ 549 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 550 #ifdef CONFIG_X86_32 551 lazy_load_gs(0); 552 #else 553 loadsegment(fs, 0); 554 #endif 555 } 556 557 xen_mc_batch(); 558 559 load_TLS_descriptor(t, cpu, 0); 560 load_TLS_descriptor(t, cpu, 1); 561 load_TLS_descriptor(t, cpu, 2); 562 563 xen_mc_issue(PARAVIRT_LAZY_CPU); 564 } 565 566 #ifdef CONFIG_X86_64 567 static void xen_load_gs_index(unsigned int idx) 568 { 569 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 570 BUG(); 571 } 572 #endif 573 574 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 575 const void *ptr) 576 { 577 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 578 u64 entry = *(u64 *)ptr; 579 580 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 581 582 preempt_disable(); 583 584 xen_mc_flush(); 585 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 586 BUG(); 587 588 preempt_enable(); 589 } 590 591 #ifdef CONFIG_X86_64 592 struct trap_array_entry { 593 void (*orig)(void); 594 void (*xen)(void); 595 bool ist_okay; 596 }; 597 598 static struct trap_array_entry trap_array[] = { 599 { debug, xen_xendebug, true }, 600 { int3, xen_xenint3, true }, 601 { double_fault, xen_double_fault, true }, 602 #ifdef CONFIG_X86_MCE 603 { machine_check, xen_machine_check, true }, 604 #endif 605 { nmi, xen_xennmi, true }, 606 { overflow, xen_overflow, false }, 607 #ifdef CONFIG_IA32_EMULATION 608 { entry_INT80_compat, xen_entry_INT80_compat, false }, 609 #endif 610 { page_fault, xen_page_fault, false }, 611 { divide_error, xen_divide_error, false }, 612 { bounds, xen_bounds, false }, 613 { invalid_op, xen_invalid_op, false }, 614 { device_not_available, xen_device_not_available, false }, 615 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false }, 616 { invalid_TSS, xen_invalid_TSS, false }, 617 { segment_not_present, xen_segment_not_present, false }, 618 { stack_segment, xen_stack_segment, false }, 619 { general_protection, xen_general_protection, false }, 620 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false }, 621 { coprocessor_error, xen_coprocessor_error, false }, 622 { alignment_check, xen_alignment_check, false }, 623 { simd_coprocessor_error, xen_simd_coprocessor_error, false }, 624 }; 625 626 static bool __ref get_trap_addr(void **addr, unsigned int ist) 627 { 628 unsigned int nr; 629 bool ist_okay = false; 630 631 /* 632 * Replace trap handler addresses by Xen specific ones. 633 * Check for known traps using IST and whitelist them. 634 * The debugger ones are the only ones we care about. 635 * Xen will handle faults like double_fault, * so we should never see 636 * them. Warn if there's an unexpected IST-using fault handler. 637 */ 638 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 639 struct trap_array_entry *entry = trap_array + nr; 640 641 if (*addr == entry->orig) { 642 *addr = entry->xen; 643 ist_okay = entry->ist_okay; 644 break; 645 } 646 } 647 648 if (nr == ARRAY_SIZE(trap_array) && 649 *addr >= (void *)early_idt_handler_array[0] && 650 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 651 nr = (*addr - (void *)early_idt_handler_array[0]) / 652 EARLY_IDT_HANDLER_SIZE; 653 *addr = (void *)xen_early_idt_handler_array[nr]; 654 } 655 656 if (WARN_ON(ist != 0 && !ist_okay)) 657 return false; 658 659 return true; 660 } 661 #endif 662 663 static int cvt_gate_to_trap(int vector, const gate_desc *val, 664 struct trap_info *info) 665 { 666 unsigned long addr; 667 668 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 669 return 0; 670 671 info->vector = vector; 672 673 addr = gate_offset(val); 674 #ifdef CONFIG_X86_64 675 if (!get_trap_addr((void **)&addr, val->bits.ist)) 676 return 0; 677 #endif /* CONFIG_X86_64 */ 678 info->address = addr; 679 680 info->cs = gate_segment(val); 681 info->flags = val->bits.dpl; 682 /* interrupt gates clear IF */ 683 if (val->bits.type == GATE_INTERRUPT) 684 info->flags |= 1 << 2; 685 686 return 1; 687 } 688 689 /* Locations of each CPU's IDT */ 690 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 691 692 /* Set an IDT entry. If the entry is part of the current IDT, then 693 also update Xen. */ 694 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 695 { 696 unsigned long p = (unsigned long)&dt[entrynum]; 697 unsigned long start, end; 698 699 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 700 701 preempt_disable(); 702 703 start = __this_cpu_read(idt_desc.address); 704 end = start + __this_cpu_read(idt_desc.size) + 1; 705 706 xen_mc_flush(); 707 708 native_write_idt_entry(dt, entrynum, g); 709 710 if (p >= start && (p + 8) <= end) { 711 struct trap_info info[2]; 712 713 info[1].address = 0; 714 715 if (cvt_gate_to_trap(entrynum, g, &info[0])) 716 if (HYPERVISOR_set_trap_table(info)) 717 BUG(); 718 } 719 720 preempt_enable(); 721 } 722 723 static void xen_convert_trap_info(const struct desc_ptr *desc, 724 struct trap_info *traps) 725 { 726 unsigned in, out, count; 727 728 count = (desc->size+1) / sizeof(gate_desc); 729 BUG_ON(count > 256); 730 731 for (in = out = 0; in < count; in++) { 732 gate_desc *entry = (gate_desc *)(desc->address) + in; 733 734 if (cvt_gate_to_trap(in, entry, &traps[out])) 735 out++; 736 } 737 traps[out].address = 0; 738 } 739 740 void xen_copy_trap_info(struct trap_info *traps) 741 { 742 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 743 744 xen_convert_trap_info(desc, traps); 745 } 746 747 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 748 hold a spinlock to protect the static traps[] array (static because 749 it avoids allocation, and saves stack space). */ 750 static void xen_load_idt(const struct desc_ptr *desc) 751 { 752 static DEFINE_SPINLOCK(lock); 753 static struct trap_info traps[257]; 754 755 trace_xen_cpu_load_idt(desc); 756 757 spin_lock(&lock); 758 759 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 760 761 xen_convert_trap_info(desc, traps); 762 763 xen_mc_flush(); 764 if (HYPERVISOR_set_trap_table(traps)) 765 BUG(); 766 767 spin_unlock(&lock); 768 } 769 770 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 771 they're handled differently. */ 772 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 773 const void *desc, int type) 774 { 775 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 776 777 preempt_disable(); 778 779 switch (type) { 780 case DESC_LDT: 781 case DESC_TSS: 782 /* ignore */ 783 break; 784 785 default: { 786 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 787 788 xen_mc_flush(); 789 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 790 BUG(); 791 } 792 793 } 794 795 preempt_enable(); 796 } 797 798 /* 799 * Version of write_gdt_entry for use at early boot-time needed to 800 * update an entry as simply as possible. 801 */ 802 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 803 const void *desc, int type) 804 { 805 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 806 807 switch (type) { 808 case DESC_LDT: 809 case DESC_TSS: 810 /* ignore */ 811 break; 812 813 default: { 814 xmaddr_t maddr = virt_to_machine(&dt[entry]); 815 816 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 817 dt[entry] = *(struct desc_struct *)desc; 818 } 819 820 } 821 } 822 823 static void xen_load_sp0(unsigned long sp0) 824 { 825 struct multicall_space mcs; 826 827 mcs = xen_mc_entry(0); 828 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 829 xen_mc_issue(PARAVIRT_LAZY_CPU); 830 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 831 } 832 833 void xen_set_iopl_mask(unsigned mask) 834 { 835 struct physdev_set_iopl set_iopl; 836 837 /* Force the change at ring 0. */ 838 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 839 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 840 } 841 842 static void xen_io_delay(void) 843 { 844 } 845 846 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 847 848 static unsigned long xen_read_cr0(void) 849 { 850 unsigned long cr0 = this_cpu_read(xen_cr0_value); 851 852 if (unlikely(cr0 == 0)) { 853 cr0 = native_read_cr0(); 854 this_cpu_write(xen_cr0_value, cr0); 855 } 856 857 return cr0; 858 } 859 860 static void xen_write_cr0(unsigned long cr0) 861 { 862 struct multicall_space mcs; 863 864 this_cpu_write(xen_cr0_value, cr0); 865 866 /* Only pay attention to cr0.TS; everything else is 867 ignored. */ 868 mcs = xen_mc_entry(0); 869 870 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 871 872 xen_mc_issue(PARAVIRT_LAZY_CPU); 873 } 874 875 static void xen_write_cr4(unsigned long cr4) 876 { 877 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 878 879 native_write_cr4(cr4); 880 } 881 #ifdef CONFIG_X86_64 882 static inline unsigned long xen_read_cr8(void) 883 { 884 return 0; 885 } 886 static inline void xen_write_cr8(unsigned long val) 887 { 888 BUG_ON(val); 889 } 890 #endif 891 892 static u64 xen_read_msr_safe(unsigned int msr, int *err) 893 { 894 u64 val; 895 896 if (pmu_msr_read(msr, &val, err)) 897 return val; 898 899 val = native_read_msr_safe(msr, err); 900 switch (msr) { 901 case MSR_IA32_APICBASE: 902 #ifdef CONFIG_X86_X2APIC 903 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 904 #endif 905 val &= ~X2APIC_ENABLE; 906 break; 907 } 908 return val; 909 } 910 911 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 912 { 913 int ret; 914 915 ret = 0; 916 917 switch (msr) { 918 #ifdef CONFIG_X86_64 919 unsigned which; 920 u64 base; 921 922 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 923 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 924 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 925 926 set: 927 base = ((u64)high << 32) | low; 928 if (HYPERVISOR_set_segment_base(which, base) != 0) 929 ret = -EIO; 930 break; 931 #endif 932 933 case MSR_STAR: 934 case MSR_CSTAR: 935 case MSR_LSTAR: 936 case MSR_SYSCALL_MASK: 937 case MSR_IA32_SYSENTER_CS: 938 case MSR_IA32_SYSENTER_ESP: 939 case MSR_IA32_SYSENTER_EIP: 940 /* Fast syscall setup is all done in hypercalls, so 941 these are all ignored. Stub them out here to stop 942 Xen console noise. */ 943 break; 944 945 default: 946 if (!pmu_msr_write(msr, low, high, &ret)) 947 ret = native_write_msr_safe(msr, low, high); 948 } 949 950 return ret; 951 } 952 953 static u64 xen_read_msr(unsigned int msr) 954 { 955 /* 956 * This will silently swallow a #GP from RDMSR. It may be worth 957 * changing that. 958 */ 959 int err; 960 961 return xen_read_msr_safe(msr, &err); 962 } 963 964 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 965 { 966 /* 967 * This will silently swallow a #GP from WRMSR. It may be worth 968 * changing that. 969 */ 970 xen_write_msr_safe(msr, low, high); 971 } 972 973 /* This is called once we have the cpu_possible_mask */ 974 void __init xen_setup_vcpu_info_placement(void) 975 { 976 int cpu; 977 978 for_each_possible_cpu(cpu) { 979 /* Set up direct vCPU id mapping for PV guests. */ 980 per_cpu(xen_vcpu_id, cpu) = cpu; 981 982 /* 983 * xen_vcpu_setup(cpu) can fail -- in which case it 984 * falls back to the shared_info version for cpus 985 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 986 * 987 * xen_cpu_up_prepare_pv() handles the rest by failing 988 * them in hotplug. 989 */ 990 (void) xen_vcpu_setup(cpu); 991 } 992 993 /* 994 * xen_vcpu_setup managed to place the vcpu_info within the 995 * percpu area for all cpus, so make use of it. 996 */ 997 if (xen_have_vcpu_info_placement) { 998 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 999 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1000 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1001 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1002 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 1003 } 1004 } 1005 1006 static const struct pv_info xen_info __initconst = { 1007 .shared_kernel_pmd = 0, 1008 1009 #ifdef CONFIG_X86_64 1010 .extra_user_64bit_cs = FLAT_USER_CS64, 1011 #endif 1012 .name = "Xen", 1013 }; 1014 1015 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1016 .cpuid = xen_cpuid, 1017 1018 .set_debugreg = xen_set_debugreg, 1019 .get_debugreg = xen_get_debugreg, 1020 1021 .read_cr0 = xen_read_cr0, 1022 .write_cr0 = xen_write_cr0, 1023 1024 .write_cr4 = xen_write_cr4, 1025 1026 #ifdef CONFIG_X86_64 1027 .read_cr8 = xen_read_cr8, 1028 .write_cr8 = xen_write_cr8, 1029 #endif 1030 1031 .wbinvd = native_wbinvd, 1032 1033 .read_msr = xen_read_msr, 1034 .write_msr = xen_write_msr, 1035 1036 .read_msr_safe = xen_read_msr_safe, 1037 .write_msr_safe = xen_write_msr_safe, 1038 1039 .read_pmc = xen_read_pmc, 1040 1041 .iret = xen_iret, 1042 #ifdef CONFIG_X86_64 1043 .usergs_sysret64 = xen_sysret64, 1044 #endif 1045 1046 .load_tr_desc = paravirt_nop, 1047 .set_ldt = xen_set_ldt, 1048 .load_gdt = xen_load_gdt, 1049 .load_idt = xen_load_idt, 1050 .load_tls = xen_load_tls, 1051 #ifdef CONFIG_X86_64 1052 .load_gs_index = xen_load_gs_index, 1053 #endif 1054 1055 .alloc_ldt = xen_alloc_ldt, 1056 .free_ldt = xen_free_ldt, 1057 1058 .store_tr = xen_store_tr, 1059 1060 .write_ldt_entry = xen_write_ldt_entry, 1061 .write_gdt_entry = xen_write_gdt_entry, 1062 .write_idt_entry = xen_write_idt_entry, 1063 .load_sp0 = xen_load_sp0, 1064 1065 .set_iopl_mask = xen_set_iopl_mask, 1066 .io_delay = xen_io_delay, 1067 1068 /* Xen takes care of %gs when switching to usermode for us */ 1069 .swapgs = paravirt_nop, 1070 1071 .start_context_switch = paravirt_start_context_switch, 1072 .end_context_switch = xen_end_context_switch, 1073 }; 1074 1075 static void xen_restart(char *msg) 1076 { 1077 xen_reboot(SHUTDOWN_reboot); 1078 } 1079 1080 static void xen_machine_halt(void) 1081 { 1082 xen_reboot(SHUTDOWN_poweroff); 1083 } 1084 1085 static void xen_machine_power_off(void) 1086 { 1087 if (pm_power_off) 1088 pm_power_off(); 1089 xen_reboot(SHUTDOWN_poweroff); 1090 } 1091 1092 static void xen_crash_shutdown(struct pt_regs *regs) 1093 { 1094 xen_reboot(SHUTDOWN_crash); 1095 } 1096 1097 static const struct machine_ops xen_machine_ops __initconst = { 1098 .restart = xen_restart, 1099 .halt = xen_machine_halt, 1100 .power_off = xen_machine_power_off, 1101 .shutdown = xen_machine_halt, 1102 .crash_shutdown = xen_crash_shutdown, 1103 .emergency_restart = xen_emergency_restart, 1104 }; 1105 1106 static unsigned char xen_get_nmi_reason(void) 1107 { 1108 unsigned char reason = 0; 1109 1110 /* Construct a value which looks like it came from port 0x61. */ 1111 if (test_bit(_XEN_NMIREASON_io_error, 1112 &HYPERVISOR_shared_info->arch.nmi_reason)) 1113 reason |= NMI_REASON_IOCHK; 1114 if (test_bit(_XEN_NMIREASON_pci_serr, 1115 &HYPERVISOR_shared_info->arch.nmi_reason)) 1116 reason |= NMI_REASON_SERR; 1117 1118 return reason; 1119 } 1120 1121 static void __init xen_boot_params_init_edd(void) 1122 { 1123 #if IS_ENABLED(CONFIG_EDD) 1124 struct xen_platform_op op; 1125 struct edd_info *edd_info; 1126 u32 *mbr_signature; 1127 unsigned nr; 1128 int ret; 1129 1130 edd_info = boot_params.eddbuf; 1131 mbr_signature = boot_params.edd_mbr_sig_buffer; 1132 1133 op.cmd = XENPF_firmware_info; 1134 1135 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1136 for (nr = 0; nr < EDDMAXNR; nr++) { 1137 struct edd_info *info = edd_info + nr; 1138 1139 op.u.firmware_info.index = nr; 1140 info->params.length = sizeof(info->params); 1141 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1142 &info->params); 1143 ret = HYPERVISOR_platform_op(&op); 1144 if (ret) 1145 break; 1146 1147 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1148 C(device); 1149 C(version); 1150 C(interface_support); 1151 C(legacy_max_cylinder); 1152 C(legacy_max_head); 1153 C(legacy_sectors_per_track); 1154 #undef C 1155 } 1156 boot_params.eddbuf_entries = nr; 1157 1158 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1159 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1160 op.u.firmware_info.index = nr; 1161 ret = HYPERVISOR_platform_op(&op); 1162 if (ret) 1163 break; 1164 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1165 } 1166 boot_params.edd_mbr_sig_buf_entries = nr; 1167 #endif 1168 } 1169 1170 /* 1171 * Set up the GDT and segment registers for -fstack-protector. Until 1172 * we do this, we have to be careful not to call any stack-protected 1173 * function, which is most of the kernel. 1174 */ 1175 static void __init xen_setup_gdt(int cpu) 1176 { 1177 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1178 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1179 1180 setup_stack_canary_segment(cpu); 1181 switch_to_new_gdt(cpu); 1182 1183 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1184 pv_cpu_ops.load_gdt = xen_load_gdt; 1185 } 1186 1187 static void __init xen_dom0_set_legacy_features(void) 1188 { 1189 x86_platform.legacy.rtc = 1; 1190 } 1191 1192 /* First C function to be called on Xen boot */ 1193 asmlinkage __visible void __init xen_start_kernel(void) 1194 { 1195 struct physdev_set_iopl set_iopl; 1196 unsigned long initrd_start = 0; 1197 int rc; 1198 1199 if (!xen_start_info) 1200 return; 1201 1202 xen_domain_type = XEN_PV_DOMAIN; 1203 xen_start_flags = xen_start_info->flags; 1204 1205 xen_setup_features(); 1206 1207 /* Install Xen paravirt ops */ 1208 pv_info = xen_info; 1209 pv_init_ops.patch = paravirt_patch_default; 1210 pv_cpu_ops = xen_cpu_ops; 1211 xen_init_irq_ops(); 1212 1213 /* 1214 * Setup xen_vcpu early because it is needed for 1215 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1216 * 1217 * Don't do the full vcpu_info placement stuff until we have 1218 * the cpu_possible_mask and a non-dummy shared_info. 1219 */ 1220 xen_vcpu_info_reset(0); 1221 1222 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1223 1224 x86_init.resources.memory_setup = xen_memory_setup; 1225 x86_init.irqs.intr_mode_init = x86_init_noop; 1226 x86_init.oem.arch_setup = xen_arch_setup; 1227 x86_init.oem.banner = xen_banner; 1228 x86_init.hyper.init_platform = xen_pv_init_platform; 1229 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1230 1231 /* 1232 * Set up some pagetable state before starting to set any ptes. 1233 */ 1234 1235 xen_setup_machphys_mapping(); 1236 xen_init_mmu_ops(); 1237 1238 /* Prevent unwanted bits from being set in PTEs. */ 1239 __supported_pte_mask &= ~_PAGE_GLOBAL; 1240 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1241 1242 /* 1243 * Prevent page tables from being allocated in highmem, even 1244 * if CONFIG_HIGHPTE is enabled. 1245 */ 1246 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1247 1248 /* Get mfn list */ 1249 xen_build_dynamic_phys_to_machine(); 1250 1251 /* 1252 * Set up kernel GDT and segment registers, mainly so that 1253 * -fstack-protector code can be executed. 1254 */ 1255 xen_setup_gdt(0); 1256 1257 /* Work out if we support NX */ 1258 get_cpu_cap(&boot_cpu_data); 1259 x86_configure_nx(); 1260 1261 /* Determine virtual and physical address sizes */ 1262 get_cpu_address_sizes(&boot_cpu_data); 1263 1264 /* Let's presume PV guests always boot on vCPU with id 0. */ 1265 per_cpu(xen_vcpu_id, 0) = 0; 1266 1267 idt_setup_early_handler(); 1268 1269 xen_init_capabilities(); 1270 1271 #ifdef CONFIG_X86_LOCAL_APIC 1272 /* 1273 * set up the basic apic ops. 1274 */ 1275 xen_init_apic(); 1276 #endif 1277 1278 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1279 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1280 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1281 } 1282 1283 machine_ops = xen_machine_ops; 1284 1285 /* 1286 * The only reliable way to retain the initial address of the 1287 * percpu gdt_page is to remember it here, so we can go and 1288 * mark it RW later, when the initial percpu area is freed. 1289 */ 1290 xen_initial_gdt = &per_cpu(gdt_page, 0); 1291 1292 xen_smp_init(); 1293 1294 #ifdef CONFIG_ACPI_NUMA 1295 /* 1296 * The pages we from Xen are not related to machine pages, so 1297 * any NUMA information the kernel tries to get from ACPI will 1298 * be meaningless. Prevent it from trying. 1299 */ 1300 acpi_numa = -1; 1301 #endif 1302 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1303 1304 local_irq_disable(); 1305 early_boot_irqs_disabled = true; 1306 1307 xen_raw_console_write("mapping kernel into physical memory\n"); 1308 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1309 xen_start_info->nr_pages); 1310 xen_reserve_special_pages(); 1311 1312 /* keep using Xen gdt for now; no urgent need to change it */ 1313 1314 #ifdef CONFIG_X86_32 1315 pv_info.kernel_rpl = 1; 1316 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1317 pv_info.kernel_rpl = 0; 1318 #else 1319 pv_info.kernel_rpl = 0; 1320 #endif 1321 /* set the limit of our address space */ 1322 xen_reserve_top(); 1323 1324 /* 1325 * We used to do this in xen_arch_setup, but that is too late 1326 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1327 * early_amd_init which pokes 0xcf8 port. 1328 */ 1329 set_iopl.iopl = 1; 1330 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1331 if (rc != 0) 1332 xen_raw_printk("physdev_op failed %d\n", rc); 1333 1334 #ifdef CONFIG_X86_32 1335 /* set up basic CPUID stuff */ 1336 cpu_detect(&new_cpu_data); 1337 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1338 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1339 #endif 1340 1341 if (xen_start_info->mod_start) { 1342 if (xen_start_info->flags & SIF_MOD_START_PFN) 1343 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1344 else 1345 initrd_start = __pa(xen_start_info->mod_start); 1346 } 1347 1348 /* Poke various useful things into boot_params */ 1349 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1350 boot_params.hdr.ramdisk_image = initrd_start; 1351 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1352 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1353 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1354 1355 if (!xen_initial_domain()) { 1356 add_preferred_console("xenboot", 0, NULL); 1357 if (pci_xen) 1358 x86_init.pci.arch_init = pci_xen_init; 1359 } else { 1360 const struct dom0_vga_console_info *info = 1361 (void *)((char *)xen_start_info + 1362 xen_start_info->console.dom0.info_off); 1363 struct xen_platform_op op = { 1364 .cmd = XENPF_firmware_info, 1365 .interface_version = XENPF_INTERFACE_VERSION, 1366 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1367 }; 1368 1369 x86_platform.set_legacy_features = 1370 xen_dom0_set_legacy_features; 1371 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1372 xen_start_info->console.domU.mfn = 0; 1373 xen_start_info->console.domU.evtchn = 0; 1374 1375 if (HYPERVISOR_platform_op(&op) == 0) 1376 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1377 1378 /* Make sure ACS will be enabled */ 1379 pci_request_acs(); 1380 1381 xen_acpi_sleep_register(); 1382 1383 /* Avoid searching for BIOS MP tables */ 1384 x86_init.mpparse.find_smp_config = x86_init_noop; 1385 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1386 1387 xen_boot_params_init_edd(); 1388 } 1389 1390 if (!boot_params.screen_info.orig_video_isVGA) 1391 add_preferred_console("tty", 0, NULL); 1392 add_preferred_console("hvc", 0, NULL); 1393 if (boot_params.screen_info.orig_video_isVGA) 1394 add_preferred_console("tty", 0, NULL); 1395 1396 #ifdef CONFIG_PCI 1397 /* PCI BIOS service won't work from a PV guest. */ 1398 pci_probe &= ~PCI_PROBE_BIOS; 1399 #endif 1400 xen_raw_console_write("about to get started...\n"); 1401 1402 /* We need this for printk timestamps */ 1403 xen_setup_runstate_info(0); 1404 1405 xen_efi_init(); 1406 1407 /* Start the world */ 1408 #ifdef CONFIG_X86_32 1409 i386_start_kernel(); 1410 #else 1411 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1412 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1413 #endif 1414 } 1415 1416 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1417 { 1418 int rc; 1419 1420 if (per_cpu(xen_vcpu, cpu) == NULL) 1421 return -ENODEV; 1422 1423 xen_setup_timer(cpu); 1424 1425 rc = xen_smp_intr_init(cpu); 1426 if (rc) { 1427 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1428 cpu, rc); 1429 return rc; 1430 } 1431 1432 rc = xen_smp_intr_init_pv(cpu); 1433 if (rc) { 1434 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1435 cpu, rc); 1436 return rc; 1437 } 1438 1439 return 0; 1440 } 1441 1442 static int xen_cpu_dead_pv(unsigned int cpu) 1443 { 1444 xen_smp_intr_free(cpu); 1445 xen_smp_intr_free_pv(cpu); 1446 1447 xen_teardown_timer(cpu); 1448 1449 return 0; 1450 } 1451 1452 static uint32_t __init xen_platform_pv(void) 1453 { 1454 if (xen_pv_domain()) 1455 return xen_cpuid_base(); 1456 1457 return 0; 1458 } 1459 1460 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1461 .name = "Xen PV", 1462 .detect = xen_platform_pv, 1463 .type = X86_HYPER_XEN_PV, 1464 .runtime.pin_vcpu = xen_pin_vcpu, 1465 }; 1466