xref: /linux/arch/x86/xen/enlighten_pv.c (revision a7f7f6248d9740d710fd6bd190293fe5e16410ac)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Core of Xen paravirt_ops implementation.
4  *
5  * This file contains the xen_paravirt_ops structure itself, and the
6  * implementations for:
7  * - privileged instructions
8  * - interrupt flags
9  * - segment operations
10  * - booting and setup
11  *
12  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
13  */
14 
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/memblock.h>
27 #include <linux/export.h>
28 #include <linux/mm.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/edd.h>
35 #include <linux/frame.h>
36 
37 #include <xen/xen.h>
38 #include <xen/events.h>
39 #include <xen/interface/xen.h>
40 #include <xen/interface/version.h>
41 #include <xen/interface/physdev.h>
42 #include <xen/interface/vcpu.h>
43 #include <xen/interface/memory.h>
44 #include <xen/interface/nmi.h>
45 #include <xen/interface/xen-mca.h>
46 #include <xen/features.h>
47 #include <xen/page.h>
48 #include <xen/hvc-console.h>
49 #include <xen/acpi.h>
50 
51 #include <asm/paravirt.h>
52 #include <asm/apic.h>
53 #include <asm/page.h>
54 #include <asm/xen/pci.h>
55 #include <asm/xen/hypercall.h>
56 #include <asm/xen/hypervisor.h>
57 #include <asm/xen/cpuid.h>
58 #include <asm/fixmap.h>
59 #include <asm/processor.h>
60 #include <asm/proto.h>
61 #include <asm/msr-index.h>
62 #include <asm/traps.h>
63 #include <asm/setup.h>
64 #include <asm/desc.h>
65 #include <asm/pgalloc.h>
66 #include <asm/tlbflush.h>
67 #include <asm/reboot.h>
68 #include <asm/stackprotector.h>
69 #include <asm/hypervisor.h>
70 #include <asm/mach_traps.h>
71 #include <asm/mwait.h>
72 #include <asm/pci_x86.h>
73 #include <asm/cpu.h>
74 #ifdef CONFIG_X86_IOPL_IOPERM
75 #include <asm/io_bitmap.h>
76 #endif
77 
78 #ifdef CONFIG_ACPI
79 #include <linux/acpi.h>
80 #include <asm/acpi.h>
81 #include <acpi/pdc_intel.h>
82 #include <acpi/processor.h>
83 #include <xen/interface/platform.h>
84 #endif
85 
86 #include "xen-ops.h"
87 #include "mmu.h"
88 #include "smp.h"
89 #include "multicalls.h"
90 #include "pmu.h"
91 
92 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
93 
94 void *xen_initial_gdt;
95 
96 static int xen_cpu_up_prepare_pv(unsigned int cpu);
97 static int xen_cpu_dead_pv(unsigned int cpu);
98 
99 struct tls_descs {
100 	struct desc_struct desc[3];
101 };
102 
103 /*
104  * Updating the 3 TLS descriptors in the GDT on every task switch is
105  * surprisingly expensive so we avoid updating them if they haven't
106  * changed.  Since Xen writes different descriptors than the one
107  * passed in the update_descriptor hypercall we keep shadow copies to
108  * compare against.
109  */
110 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
111 
112 static void __init xen_banner(void)
113 {
114 	unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
115 	struct xen_extraversion extra;
116 	HYPERVISOR_xen_version(XENVER_extraversion, &extra);
117 
118 	pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
119 	printk(KERN_INFO "Xen version: %d.%d%s%s\n",
120 	       version >> 16, version & 0xffff, extra.extraversion,
121 	       xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
122 
123 #ifdef CONFIG_X86_32
124 	pr_warn("WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n"
125 		"Support for running as 32-bit PV-guest under Xen will soon be removed\n"
126 		"from the Linux kernel!\n"
127 		"Please use either a 64-bit kernel or switch to HVM or PVH mode!\n"
128 		"WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n");
129 #endif
130 }
131 
132 static void __init xen_pv_init_platform(void)
133 {
134 	populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
135 
136 	set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
137 	HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
138 
139 	/* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
140 	xen_vcpu_info_reset(0);
141 
142 	/* pvclock is in shared info area */
143 	xen_init_time_ops();
144 }
145 
146 static void __init xen_pv_guest_late_init(void)
147 {
148 #ifndef CONFIG_SMP
149 	/* Setup shared vcpu info for non-smp configurations */
150 	xen_setup_vcpu_info_placement();
151 #endif
152 }
153 
154 /* Check if running on Xen version (major, minor) or later */
155 bool
156 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
157 {
158 	unsigned int version;
159 
160 	if (!xen_domain())
161 		return false;
162 
163 	version = HYPERVISOR_xen_version(XENVER_version, NULL);
164 	if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
165 		((version >> 16) > major))
166 		return true;
167 	return false;
168 }
169 
170 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
171 static __read_mostly unsigned int cpuid_leaf5_edx_val;
172 
173 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
174 		      unsigned int *cx, unsigned int *dx)
175 {
176 	unsigned maskebx = ~0;
177 
178 	/*
179 	 * Mask out inconvenient features, to try and disable as many
180 	 * unsupported kernel subsystems as possible.
181 	 */
182 	switch (*ax) {
183 	case CPUID_MWAIT_LEAF:
184 		/* Synthesize the values.. */
185 		*ax = 0;
186 		*bx = 0;
187 		*cx = cpuid_leaf5_ecx_val;
188 		*dx = cpuid_leaf5_edx_val;
189 		return;
190 
191 	case 0xb:
192 		/* Suppress extended topology stuff */
193 		maskebx = 0;
194 		break;
195 	}
196 
197 	asm(XEN_EMULATE_PREFIX "cpuid"
198 		: "=a" (*ax),
199 		  "=b" (*bx),
200 		  "=c" (*cx),
201 		  "=d" (*dx)
202 		: "0" (*ax), "2" (*cx));
203 
204 	*bx &= maskebx;
205 }
206 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
207 
208 static bool __init xen_check_mwait(void)
209 {
210 #ifdef CONFIG_ACPI
211 	struct xen_platform_op op = {
212 		.cmd			= XENPF_set_processor_pminfo,
213 		.u.set_pminfo.id	= -1,
214 		.u.set_pminfo.type	= XEN_PM_PDC,
215 	};
216 	uint32_t buf[3];
217 	unsigned int ax, bx, cx, dx;
218 	unsigned int mwait_mask;
219 
220 	/* We need to determine whether it is OK to expose the MWAIT
221 	 * capability to the kernel to harvest deeper than C3 states from ACPI
222 	 * _CST using the processor_harvest_xen.c module. For this to work, we
223 	 * need to gather the MWAIT_LEAF values (which the cstate.c code
224 	 * checks against). The hypervisor won't expose the MWAIT flag because
225 	 * it would break backwards compatibility; so we will find out directly
226 	 * from the hardware and hypercall.
227 	 */
228 	if (!xen_initial_domain())
229 		return false;
230 
231 	/*
232 	 * When running under platform earlier than Xen4.2, do not expose
233 	 * mwait, to avoid the risk of loading native acpi pad driver
234 	 */
235 	if (!xen_running_on_version_or_later(4, 2))
236 		return false;
237 
238 	ax = 1;
239 	cx = 0;
240 
241 	native_cpuid(&ax, &bx, &cx, &dx);
242 
243 	mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
244 		     (1 << (X86_FEATURE_MWAIT % 32));
245 
246 	if ((cx & mwait_mask) != mwait_mask)
247 		return false;
248 
249 	/* We need to emulate the MWAIT_LEAF and for that we need both
250 	 * ecx and edx. The hypercall provides only partial information.
251 	 */
252 
253 	ax = CPUID_MWAIT_LEAF;
254 	bx = 0;
255 	cx = 0;
256 	dx = 0;
257 
258 	native_cpuid(&ax, &bx, &cx, &dx);
259 
260 	/* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
261 	 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
262 	 */
263 	buf[0] = ACPI_PDC_REVISION_ID;
264 	buf[1] = 1;
265 	buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
266 
267 	set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
268 
269 	if ((HYPERVISOR_platform_op(&op) == 0) &&
270 	    (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
271 		cpuid_leaf5_ecx_val = cx;
272 		cpuid_leaf5_edx_val = dx;
273 	}
274 	return true;
275 #else
276 	return false;
277 #endif
278 }
279 
280 static bool __init xen_check_xsave(void)
281 {
282 	unsigned int cx, xsave_mask;
283 
284 	cx = cpuid_ecx(1);
285 
286 	xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
287 		     (1 << (X86_FEATURE_OSXSAVE % 32));
288 
289 	/* Xen will set CR4.OSXSAVE if supported and not disabled by force */
290 	return (cx & xsave_mask) == xsave_mask;
291 }
292 
293 static void __init xen_init_capabilities(void)
294 {
295 	setup_force_cpu_cap(X86_FEATURE_XENPV);
296 	setup_clear_cpu_cap(X86_FEATURE_DCA);
297 	setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
298 	setup_clear_cpu_cap(X86_FEATURE_MTRR);
299 	setup_clear_cpu_cap(X86_FEATURE_ACC);
300 	setup_clear_cpu_cap(X86_FEATURE_X2APIC);
301 	setup_clear_cpu_cap(X86_FEATURE_SME);
302 
303 	/*
304 	 * Xen PV would need some work to support PCID: CR3 handling as well
305 	 * as xen_flush_tlb_others() would need updating.
306 	 */
307 	setup_clear_cpu_cap(X86_FEATURE_PCID);
308 
309 	if (!xen_initial_domain())
310 		setup_clear_cpu_cap(X86_FEATURE_ACPI);
311 
312 	if (xen_check_mwait())
313 		setup_force_cpu_cap(X86_FEATURE_MWAIT);
314 	else
315 		setup_clear_cpu_cap(X86_FEATURE_MWAIT);
316 
317 	if (!xen_check_xsave()) {
318 		setup_clear_cpu_cap(X86_FEATURE_XSAVE);
319 		setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
320 	}
321 }
322 
323 static void xen_set_debugreg(int reg, unsigned long val)
324 {
325 	HYPERVISOR_set_debugreg(reg, val);
326 }
327 
328 static unsigned long xen_get_debugreg(int reg)
329 {
330 	return HYPERVISOR_get_debugreg(reg);
331 }
332 
333 static void xen_end_context_switch(struct task_struct *next)
334 {
335 	xen_mc_flush();
336 	paravirt_end_context_switch(next);
337 }
338 
339 static unsigned long xen_store_tr(void)
340 {
341 	return 0;
342 }
343 
344 /*
345  * Set the page permissions for a particular virtual address.  If the
346  * address is a vmalloc mapping (or other non-linear mapping), then
347  * find the linear mapping of the page and also set its protections to
348  * match.
349  */
350 static void set_aliased_prot(void *v, pgprot_t prot)
351 {
352 	int level;
353 	pte_t *ptep;
354 	pte_t pte;
355 	unsigned long pfn;
356 	struct page *page;
357 	unsigned char dummy;
358 
359 	ptep = lookup_address((unsigned long)v, &level);
360 	BUG_ON(ptep == NULL);
361 
362 	pfn = pte_pfn(*ptep);
363 	page = pfn_to_page(pfn);
364 
365 	pte = pfn_pte(pfn, prot);
366 
367 	/*
368 	 * Careful: update_va_mapping() will fail if the virtual address
369 	 * we're poking isn't populated in the page tables.  We don't
370 	 * need to worry about the direct map (that's always in the page
371 	 * tables), but we need to be careful about vmap space.  In
372 	 * particular, the top level page table can lazily propagate
373 	 * entries between processes, so if we've switched mms since we
374 	 * vmapped the target in the first place, we might not have the
375 	 * top-level page table entry populated.
376 	 *
377 	 * We disable preemption because we want the same mm active when
378 	 * we probe the target and when we issue the hypercall.  We'll
379 	 * have the same nominal mm, but if we're a kernel thread, lazy
380 	 * mm dropping could change our pgd.
381 	 *
382 	 * Out of an abundance of caution, this uses __get_user() to fault
383 	 * in the target address just in case there's some obscure case
384 	 * in which the target address isn't readable.
385 	 */
386 
387 	preempt_disable();
388 
389 	probe_kernel_read(&dummy, v, 1);
390 
391 	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
392 		BUG();
393 
394 	if (!PageHighMem(page)) {
395 		void *av = __va(PFN_PHYS(pfn));
396 
397 		if (av != v)
398 			if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
399 				BUG();
400 	} else
401 		kmap_flush_unused();
402 
403 	preempt_enable();
404 }
405 
406 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
407 {
408 	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
409 	int i;
410 
411 	/*
412 	 * We need to mark the all aliases of the LDT pages RO.  We
413 	 * don't need to call vm_flush_aliases(), though, since that's
414 	 * only responsible for flushing aliases out the TLBs, not the
415 	 * page tables, and Xen will flush the TLB for us if needed.
416 	 *
417 	 * To avoid confusing future readers: none of this is necessary
418 	 * to load the LDT.  The hypervisor only checks this when the
419 	 * LDT is faulted in due to subsequent descriptor access.
420 	 */
421 
422 	for (i = 0; i < entries; i += entries_per_page)
423 		set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
424 }
425 
426 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
427 {
428 	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
429 	int i;
430 
431 	for (i = 0; i < entries; i += entries_per_page)
432 		set_aliased_prot(ldt + i, PAGE_KERNEL);
433 }
434 
435 static void xen_set_ldt(const void *addr, unsigned entries)
436 {
437 	struct mmuext_op *op;
438 	struct multicall_space mcs = xen_mc_entry(sizeof(*op));
439 
440 	trace_xen_cpu_set_ldt(addr, entries);
441 
442 	op = mcs.args;
443 	op->cmd = MMUEXT_SET_LDT;
444 	op->arg1.linear_addr = (unsigned long)addr;
445 	op->arg2.nr_ents = entries;
446 
447 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
448 
449 	xen_mc_issue(PARAVIRT_LAZY_CPU);
450 }
451 
452 static void xen_load_gdt(const struct desc_ptr *dtr)
453 {
454 	unsigned long va = dtr->address;
455 	unsigned int size = dtr->size + 1;
456 	unsigned long pfn, mfn;
457 	int level;
458 	pte_t *ptep;
459 	void *virt;
460 
461 	/* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
462 	BUG_ON(size > PAGE_SIZE);
463 	BUG_ON(va & ~PAGE_MASK);
464 
465 	/*
466 	 * The GDT is per-cpu and is in the percpu data area.
467 	 * That can be virtually mapped, so we need to do a
468 	 * page-walk to get the underlying MFN for the
469 	 * hypercall.  The page can also be in the kernel's
470 	 * linear range, so we need to RO that mapping too.
471 	 */
472 	ptep = lookup_address(va, &level);
473 	BUG_ON(ptep == NULL);
474 
475 	pfn = pte_pfn(*ptep);
476 	mfn = pfn_to_mfn(pfn);
477 	virt = __va(PFN_PHYS(pfn));
478 
479 	make_lowmem_page_readonly((void *)va);
480 	make_lowmem_page_readonly(virt);
481 
482 	if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
483 		BUG();
484 }
485 
486 /*
487  * load_gdt for early boot, when the gdt is only mapped once
488  */
489 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
490 {
491 	unsigned long va = dtr->address;
492 	unsigned int size = dtr->size + 1;
493 	unsigned long pfn, mfn;
494 	pte_t pte;
495 
496 	/* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
497 	BUG_ON(size > PAGE_SIZE);
498 	BUG_ON(va & ~PAGE_MASK);
499 
500 	pfn = virt_to_pfn(va);
501 	mfn = pfn_to_mfn(pfn);
502 
503 	pte = pfn_pte(pfn, PAGE_KERNEL_RO);
504 
505 	if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
506 		BUG();
507 
508 	if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
509 		BUG();
510 }
511 
512 static inline bool desc_equal(const struct desc_struct *d1,
513 			      const struct desc_struct *d2)
514 {
515 	return !memcmp(d1, d2, sizeof(*d1));
516 }
517 
518 static void load_TLS_descriptor(struct thread_struct *t,
519 				unsigned int cpu, unsigned int i)
520 {
521 	struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
522 	struct desc_struct *gdt;
523 	xmaddr_t maddr;
524 	struct multicall_space mc;
525 
526 	if (desc_equal(shadow, &t->tls_array[i]))
527 		return;
528 
529 	*shadow = t->tls_array[i];
530 
531 	gdt = get_cpu_gdt_rw(cpu);
532 	maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
533 	mc = __xen_mc_entry(0);
534 
535 	MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
536 }
537 
538 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
539 {
540 	/*
541 	 * XXX sleazy hack: If we're being called in a lazy-cpu zone
542 	 * and lazy gs handling is enabled, it means we're in a
543 	 * context switch, and %gs has just been saved.  This means we
544 	 * can zero it out to prevent faults on exit from the
545 	 * hypervisor if the next process has no %gs.  Either way, it
546 	 * has been saved, and the new value will get loaded properly.
547 	 * This will go away as soon as Xen has been modified to not
548 	 * save/restore %gs for normal hypercalls.
549 	 *
550 	 * On x86_64, this hack is not used for %gs, because gs points
551 	 * to KERNEL_GS_BASE (and uses it for PDA references), so we
552 	 * must not zero %gs on x86_64
553 	 *
554 	 * For x86_64, we need to zero %fs, otherwise we may get an
555 	 * exception between the new %fs descriptor being loaded and
556 	 * %fs being effectively cleared at __switch_to().
557 	 */
558 	if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
559 #ifdef CONFIG_X86_32
560 		lazy_load_gs(0);
561 #else
562 		loadsegment(fs, 0);
563 #endif
564 	}
565 
566 	xen_mc_batch();
567 
568 	load_TLS_descriptor(t, cpu, 0);
569 	load_TLS_descriptor(t, cpu, 1);
570 	load_TLS_descriptor(t, cpu, 2);
571 
572 	xen_mc_issue(PARAVIRT_LAZY_CPU);
573 }
574 
575 #ifdef CONFIG_X86_64
576 static void xen_load_gs_index(unsigned int idx)
577 {
578 	if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
579 		BUG();
580 }
581 #endif
582 
583 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
584 				const void *ptr)
585 {
586 	xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
587 	u64 entry = *(u64 *)ptr;
588 
589 	trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
590 
591 	preempt_disable();
592 
593 	xen_mc_flush();
594 	if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
595 		BUG();
596 
597 	preempt_enable();
598 }
599 
600 #ifdef CONFIG_X86_64
601 struct trap_array_entry {
602 	void (*orig)(void);
603 	void (*xen)(void);
604 	bool ist_okay;
605 };
606 
607 static struct trap_array_entry trap_array[] = {
608 	{ debug,                       xen_xendebug,                    true },
609 	{ double_fault,                xen_double_fault,                true },
610 #ifdef CONFIG_X86_MCE
611 	{ machine_check,               xen_machine_check,               true },
612 #endif
613 	{ nmi,                         xen_xennmi,                      true },
614 	{ int3,                        xen_int3,                        false },
615 	{ overflow,                    xen_overflow,                    false },
616 #ifdef CONFIG_IA32_EMULATION
617 	{ entry_INT80_compat,          xen_entry_INT80_compat,          false },
618 #endif
619 	{ page_fault,                  xen_page_fault,                  false },
620 	{ divide_error,                xen_divide_error,                false },
621 	{ bounds,                      xen_bounds,                      false },
622 	{ invalid_op,                  xen_invalid_op,                  false },
623 	{ device_not_available,        xen_device_not_available,        false },
624 	{ coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false },
625 	{ invalid_TSS,                 xen_invalid_TSS,                 false },
626 	{ segment_not_present,         xen_segment_not_present,         false },
627 	{ stack_segment,               xen_stack_segment,               false },
628 	{ general_protection,          xen_general_protection,          false },
629 	{ spurious_interrupt_bug,      xen_spurious_interrupt_bug,      false },
630 	{ coprocessor_error,           xen_coprocessor_error,           false },
631 	{ alignment_check,             xen_alignment_check,             false },
632 	{ simd_coprocessor_error,      xen_simd_coprocessor_error,      false },
633 };
634 
635 static bool __ref get_trap_addr(void **addr, unsigned int ist)
636 {
637 	unsigned int nr;
638 	bool ist_okay = false;
639 
640 	/*
641 	 * Replace trap handler addresses by Xen specific ones.
642 	 * Check for known traps using IST and whitelist them.
643 	 * The debugger ones are the only ones we care about.
644 	 * Xen will handle faults like double_fault, * so we should never see
645 	 * them.  Warn if there's an unexpected IST-using fault handler.
646 	 */
647 	for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
648 		struct trap_array_entry *entry = trap_array + nr;
649 
650 		if (*addr == entry->orig) {
651 			*addr = entry->xen;
652 			ist_okay = entry->ist_okay;
653 			break;
654 		}
655 	}
656 
657 	if (nr == ARRAY_SIZE(trap_array) &&
658 	    *addr >= (void *)early_idt_handler_array[0] &&
659 	    *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
660 		nr = (*addr - (void *)early_idt_handler_array[0]) /
661 		     EARLY_IDT_HANDLER_SIZE;
662 		*addr = (void *)xen_early_idt_handler_array[nr];
663 	}
664 
665 	if (WARN_ON(ist != 0 && !ist_okay))
666 		return false;
667 
668 	return true;
669 }
670 #endif
671 
672 static int cvt_gate_to_trap(int vector, const gate_desc *val,
673 			    struct trap_info *info)
674 {
675 	unsigned long addr;
676 
677 	if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
678 		return 0;
679 
680 	info->vector = vector;
681 
682 	addr = gate_offset(val);
683 #ifdef CONFIG_X86_64
684 	if (!get_trap_addr((void **)&addr, val->bits.ist))
685 		return 0;
686 #endif	/* CONFIG_X86_64 */
687 	info->address = addr;
688 
689 	info->cs = gate_segment(val);
690 	info->flags = val->bits.dpl;
691 	/* interrupt gates clear IF */
692 	if (val->bits.type == GATE_INTERRUPT)
693 		info->flags |= 1 << 2;
694 
695 	return 1;
696 }
697 
698 /* Locations of each CPU's IDT */
699 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
700 
701 /* Set an IDT entry.  If the entry is part of the current IDT, then
702    also update Xen. */
703 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
704 {
705 	unsigned long p = (unsigned long)&dt[entrynum];
706 	unsigned long start, end;
707 
708 	trace_xen_cpu_write_idt_entry(dt, entrynum, g);
709 
710 	preempt_disable();
711 
712 	start = __this_cpu_read(idt_desc.address);
713 	end = start + __this_cpu_read(idt_desc.size) + 1;
714 
715 	xen_mc_flush();
716 
717 	native_write_idt_entry(dt, entrynum, g);
718 
719 	if (p >= start && (p + 8) <= end) {
720 		struct trap_info info[2];
721 
722 		info[1].address = 0;
723 
724 		if (cvt_gate_to_trap(entrynum, g, &info[0]))
725 			if (HYPERVISOR_set_trap_table(info))
726 				BUG();
727 	}
728 
729 	preempt_enable();
730 }
731 
732 static void xen_convert_trap_info(const struct desc_ptr *desc,
733 				  struct trap_info *traps)
734 {
735 	unsigned in, out, count;
736 
737 	count = (desc->size+1) / sizeof(gate_desc);
738 	BUG_ON(count > 256);
739 
740 	for (in = out = 0; in < count; in++) {
741 		gate_desc *entry = (gate_desc *)(desc->address) + in;
742 
743 		if (cvt_gate_to_trap(in, entry, &traps[out]))
744 			out++;
745 	}
746 	traps[out].address = 0;
747 }
748 
749 void xen_copy_trap_info(struct trap_info *traps)
750 {
751 	const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
752 
753 	xen_convert_trap_info(desc, traps);
754 }
755 
756 /* Load a new IDT into Xen.  In principle this can be per-CPU, so we
757    hold a spinlock to protect the static traps[] array (static because
758    it avoids allocation, and saves stack space). */
759 static void xen_load_idt(const struct desc_ptr *desc)
760 {
761 	static DEFINE_SPINLOCK(lock);
762 	static struct trap_info traps[257];
763 
764 	trace_xen_cpu_load_idt(desc);
765 
766 	spin_lock(&lock);
767 
768 	memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
769 
770 	xen_convert_trap_info(desc, traps);
771 
772 	xen_mc_flush();
773 	if (HYPERVISOR_set_trap_table(traps))
774 		BUG();
775 
776 	spin_unlock(&lock);
777 }
778 
779 /* Write a GDT descriptor entry.  Ignore LDT descriptors, since
780    they're handled differently. */
781 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
782 				const void *desc, int type)
783 {
784 	trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
785 
786 	preempt_disable();
787 
788 	switch (type) {
789 	case DESC_LDT:
790 	case DESC_TSS:
791 		/* ignore */
792 		break;
793 
794 	default: {
795 		xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
796 
797 		xen_mc_flush();
798 		if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
799 			BUG();
800 	}
801 
802 	}
803 
804 	preempt_enable();
805 }
806 
807 /*
808  * Version of write_gdt_entry for use at early boot-time needed to
809  * update an entry as simply as possible.
810  */
811 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
812 					    const void *desc, int type)
813 {
814 	trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
815 
816 	switch (type) {
817 	case DESC_LDT:
818 	case DESC_TSS:
819 		/* ignore */
820 		break;
821 
822 	default: {
823 		xmaddr_t maddr = virt_to_machine(&dt[entry]);
824 
825 		if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
826 			dt[entry] = *(struct desc_struct *)desc;
827 	}
828 
829 	}
830 }
831 
832 static void xen_load_sp0(unsigned long sp0)
833 {
834 	struct multicall_space mcs;
835 
836 	mcs = xen_mc_entry(0);
837 	MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
838 	xen_mc_issue(PARAVIRT_LAZY_CPU);
839 	this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
840 }
841 
842 #ifdef CONFIG_X86_IOPL_IOPERM
843 static void xen_update_io_bitmap(void)
844 {
845 	struct physdev_set_iobitmap iobitmap;
846 	struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
847 
848 	native_tss_update_io_bitmap();
849 
850 	iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) +
851 			  tss->x86_tss.io_bitmap_base;
852 	if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID)
853 		iobitmap.nr_ports = 0;
854 	else
855 		iobitmap.nr_ports = IO_BITMAP_BITS;
856 
857 	HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
858 }
859 #endif
860 
861 static void xen_io_delay(void)
862 {
863 }
864 
865 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
866 
867 static unsigned long xen_read_cr0(void)
868 {
869 	unsigned long cr0 = this_cpu_read(xen_cr0_value);
870 
871 	if (unlikely(cr0 == 0)) {
872 		cr0 = native_read_cr0();
873 		this_cpu_write(xen_cr0_value, cr0);
874 	}
875 
876 	return cr0;
877 }
878 
879 static void xen_write_cr0(unsigned long cr0)
880 {
881 	struct multicall_space mcs;
882 
883 	this_cpu_write(xen_cr0_value, cr0);
884 
885 	/* Only pay attention to cr0.TS; everything else is
886 	   ignored. */
887 	mcs = xen_mc_entry(0);
888 
889 	MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
890 
891 	xen_mc_issue(PARAVIRT_LAZY_CPU);
892 }
893 
894 static void xen_write_cr4(unsigned long cr4)
895 {
896 	cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
897 
898 	native_write_cr4(cr4);
899 }
900 
901 static u64 xen_read_msr_safe(unsigned int msr, int *err)
902 {
903 	u64 val;
904 
905 	if (pmu_msr_read(msr, &val, err))
906 		return val;
907 
908 	val = native_read_msr_safe(msr, err);
909 	switch (msr) {
910 	case MSR_IA32_APICBASE:
911 		val &= ~X2APIC_ENABLE;
912 		break;
913 	}
914 	return val;
915 }
916 
917 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
918 {
919 	int ret;
920 #ifdef CONFIG_X86_64
921 	unsigned int which;
922 	u64 base;
923 #endif
924 
925 	ret = 0;
926 
927 	switch (msr) {
928 #ifdef CONFIG_X86_64
929 	case MSR_FS_BASE:		which = SEGBASE_FS; goto set;
930 	case MSR_KERNEL_GS_BASE:	which = SEGBASE_GS_USER; goto set;
931 	case MSR_GS_BASE:		which = SEGBASE_GS_KERNEL; goto set;
932 
933 	set:
934 		base = ((u64)high << 32) | low;
935 		if (HYPERVISOR_set_segment_base(which, base) != 0)
936 			ret = -EIO;
937 		break;
938 #endif
939 
940 	case MSR_STAR:
941 	case MSR_CSTAR:
942 	case MSR_LSTAR:
943 	case MSR_SYSCALL_MASK:
944 	case MSR_IA32_SYSENTER_CS:
945 	case MSR_IA32_SYSENTER_ESP:
946 	case MSR_IA32_SYSENTER_EIP:
947 		/* Fast syscall setup is all done in hypercalls, so
948 		   these are all ignored.  Stub them out here to stop
949 		   Xen console noise. */
950 		break;
951 
952 	default:
953 		if (!pmu_msr_write(msr, low, high, &ret))
954 			ret = native_write_msr_safe(msr, low, high);
955 	}
956 
957 	return ret;
958 }
959 
960 static u64 xen_read_msr(unsigned int msr)
961 {
962 	/*
963 	 * This will silently swallow a #GP from RDMSR.  It may be worth
964 	 * changing that.
965 	 */
966 	int err;
967 
968 	return xen_read_msr_safe(msr, &err);
969 }
970 
971 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
972 {
973 	/*
974 	 * This will silently swallow a #GP from WRMSR.  It may be worth
975 	 * changing that.
976 	 */
977 	xen_write_msr_safe(msr, low, high);
978 }
979 
980 /* This is called once we have the cpu_possible_mask */
981 void __init xen_setup_vcpu_info_placement(void)
982 {
983 	int cpu;
984 
985 	for_each_possible_cpu(cpu) {
986 		/* Set up direct vCPU id mapping for PV guests. */
987 		per_cpu(xen_vcpu_id, cpu) = cpu;
988 
989 		/*
990 		 * xen_vcpu_setup(cpu) can fail  -- in which case it
991 		 * falls back to the shared_info version for cpus
992 		 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
993 		 *
994 		 * xen_cpu_up_prepare_pv() handles the rest by failing
995 		 * them in hotplug.
996 		 */
997 		(void) xen_vcpu_setup(cpu);
998 	}
999 
1000 	/*
1001 	 * xen_vcpu_setup managed to place the vcpu_info within the
1002 	 * percpu area for all cpus, so make use of it.
1003 	 */
1004 	if (xen_have_vcpu_info_placement) {
1005 		pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1006 		pv_ops.irq.restore_fl =
1007 			__PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1008 		pv_ops.irq.irq_disable =
1009 			__PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1010 		pv_ops.irq.irq_enable =
1011 			__PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1012 		pv_ops.mmu.read_cr2 =
1013 			__PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
1014 	}
1015 }
1016 
1017 static const struct pv_info xen_info __initconst = {
1018 	.shared_kernel_pmd = 0,
1019 
1020 #ifdef CONFIG_X86_64
1021 	.extra_user_64bit_cs = FLAT_USER_CS64,
1022 #endif
1023 	.name = "Xen",
1024 };
1025 
1026 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1027 	.cpuid = xen_cpuid,
1028 
1029 	.set_debugreg = xen_set_debugreg,
1030 	.get_debugreg = xen_get_debugreg,
1031 
1032 	.read_cr0 = xen_read_cr0,
1033 	.write_cr0 = xen_write_cr0,
1034 
1035 	.write_cr4 = xen_write_cr4,
1036 
1037 	.wbinvd = native_wbinvd,
1038 
1039 	.read_msr = xen_read_msr,
1040 	.write_msr = xen_write_msr,
1041 
1042 	.read_msr_safe = xen_read_msr_safe,
1043 	.write_msr_safe = xen_write_msr_safe,
1044 
1045 	.read_pmc = xen_read_pmc,
1046 
1047 	.iret = xen_iret,
1048 #ifdef CONFIG_X86_64
1049 	.usergs_sysret64 = xen_sysret64,
1050 #endif
1051 
1052 	.load_tr_desc = paravirt_nop,
1053 	.set_ldt = xen_set_ldt,
1054 	.load_gdt = xen_load_gdt,
1055 	.load_idt = xen_load_idt,
1056 	.load_tls = xen_load_tls,
1057 #ifdef CONFIG_X86_64
1058 	.load_gs_index = xen_load_gs_index,
1059 #endif
1060 
1061 	.alloc_ldt = xen_alloc_ldt,
1062 	.free_ldt = xen_free_ldt,
1063 
1064 	.store_tr = xen_store_tr,
1065 
1066 	.write_ldt_entry = xen_write_ldt_entry,
1067 	.write_gdt_entry = xen_write_gdt_entry,
1068 	.write_idt_entry = xen_write_idt_entry,
1069 	.load_sp0 = xen_load_sp0,
1070 
1071 #ifdef CONFIG_X86_IOPL_IOPERM
1072 	.update_io_bitmap = xen_update_io_bitmap,
1073 #endif
1074 	.io_delay = xen_io_delay,
1075 
1076 	/* Xen takes care of %gs when switching to usermode for us */
1077 	.swapgs = paravirt_nop,
1078 
1079 	.start_context_switch = paravirt_start_context_switch,
1080 	.end_context_switch = xen_end_context_switch,
1081 };
1082 
1083 static void xen_restart(char *msg)
1084 {
1085 	xen_reboot(SHUTDOWN_reboot);
1086 }
1087 
1088 static void xen_machine_halt(void)
1089 {
1090 	xen_reboot(SHUTDOWN_poweroff);
1091 }
1092 
1093 static void xen_machine_power_off(void)
1094 {
1095 	if (pm_power_off)
1096 		pm_power_off();
1097 	xen_reboot(SHUTDOWN_poweroff);
1098 }
1099 
1100 static void xen_crash_shutdown(struct pt_regs *regs)
1101 {
1102 	xen_reboot(SHUTDOWN_crash);
1103 }
1104 
1105 static const struct machine_ops xen_machine_ops __initconst = {
1106 	.restart = xen_restart,
1107 	.halt = xen_machine_halt,
1108 	.power_off = xen_machine_power_off,
1109 	.shutdown = xen_machine_halt,
1110 	.crash_shutdown = xen_crash_shutdown,
1111 	.emergency_restart = xen_emergency_restart,
1112 };
1113 
1114 static unsigned char xen_get_nmi_reason(void)
1115 {
1116 	unsigned char reason = 0;
1117 
1118 	/* Construct a value which looks like it came from port 0x61. */
1119 	if (test_bit(_XEN_NMIREASON_io_error,
1120 		     &HYPERVISOR_shared_info->arch.nmi_reason))
1121 		reason |= NMI_REASON_IOCHK;
1122 	if (test_bit(_XEN_NMIREASON_pci_serr,
1123 		     &HYPERVISOR_shared_info->arch.nmi_reason))
1124 		reason |= NMI_REASON_SERR;
1125 
1126 	return reason;
1127 }
1128 
1129 static void __init xen_boot_params_init_edd(void)
1130 {
1131 #if IS_ENABLED(CONFIG_EDD)
1132 	struct xen_platform_op op;
1133 	struct edd_info *edd_info;
1134 	u32 *mbr_signature;
1135 	unsigned nr;
1136 	int ret;
1137 
1138 	edd_info = boot_params.eddbuf;
1139 	mbr_signature = boot_params.edd_mbr_sig_buffer;
1140 
1141 	op.cmd = XENPF_firmware_info;
1142 
1143 	op.u.firmware_info.type = XEN_FW_DISK_INFO;
1144 	for (nr = 0; nr < EDDMAXNR; nr++) {
1145 		struct edd_info *info = edd_info + nr;
1146 
1147 		op.u.firmware_info.index = nr;
1148 		info->params.length = sizeof(info->params);
1149 		set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1150 				     &info->params);
1151 		ret = HYPERVISOR_platform_op(&op);
1152 		if (ret)
1153 			break;
1154 
1155 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1156 		C(device);
1157 		C(version);
1158 		C(interface_support);
1159 		C(legacy_max_cylinder);
1160 		C(legacy_max_head);
1161 		C(legacy_sectors_per_track);
1162 #undef C
1163 	}
1164 	boot_params.eddbuf_entries = nr;
1165 
1166 	op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1167 	for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1168 		op.u.firmware_info.index = nr;
1169 		ret = HYPERVISOR_platform_op(&op);
1170 		if (ret)
1171 			break;
1172 		mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1173 	}
1174 	boot_params.edd_mbr_sig_buf_entries = nr;
1175 #endif
1176 }
1177 
1178 /*
1179  * Set up the GDT and segment registers for -fstack-protector.  Until
1180  * we do this, we have to be careful not to call any stack-protected
1181  * function, which is most of the kernel.
1182  */
1183 static void __init xen_setup_gdt(int cpu)
1184 {
1185 	pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
1186 	pv_ops.cpu.load_gdt = xen_load_gdt_boot;
1187 
1188 	setup_stack_canary_segment(cpu);
1189 	switch_to_new_gdt(cpu);
1190 
1191 	pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
1192 	pv_ops.cpu.load_gdt = xen_load_gdt;
1193 }
1194 
1195 static void __init xen_dom0_set_legacy_features(void)
1196 {
1197 	x86_platform.legacy.rtc = 1;
1198 }
1199 
1200 /* First C function to be called on Xen boot */
1201 asmlinkage __visible void __init xen_start_kernel(void)
1202 {
1203 	struct physdev_set_iopl set_iopl;
1204 	unsigned long initrd_start = 0;
1205 	int rc;
1206 
1207 	if (!xen_start_info)
1208 		return;
1209 
1210 	xen_domain_type = XEN_PV_DOMAIN;
1211 	xen_start_flags = xen_start_info->flags;
1212 
1213 	xen_setup_features();
1214 
1215 	/* Install Xen paravirt ops */
1216 	pv_info = xen_info;
1217 	pv_ops.init.patch = paravirt_patch_default;
1218 	pv_ops.cpu = xen_cpu_ops;
1219 	xen_init_irq_ops();
1220 
1221 	/*
1222 	 * Setup xen_vcpu early because it is needed for
1223 	 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1224 	 *
1225 	 * Don't do the full vcpu_info placement stuff until we have
1226 	 * the cpu_possible_mask and a non-dummy shared_info.
1227 	 */
1228 	xen_vcpu_info_reset(0);
1229 
1230 	x86_platform.get_nmi_reason = xen_get_nmi_reason;
1231 
1232 	x86_init.resources.memory_setup = xen_memory_setup;
1233 	x86_init.irqs.intr_mode_select	= x86_init_noop;
1234 	x86_init.irqs.intr_mode_init	= x86_init_noop;
1235 	x86_init.oem.arch_setup = xen_arch_setup;
1236 	x86_init.oem.banner = xen_banner;
1237 	x86_init.hyper.init_platform = xen_pv_init_platform;
1238 	x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1239 
1240 	/*
1241 	 * Set up some pagetable state before starting to set any ptes.
1242 	 */
1243 
1244 	xen_setup_machphys_mapping();
1245 	xen_init_mmu_ops();
1246 
1247 	/* Prevent unwanted bits from being set in PTEs. */
1248 	__supported_pte_mask &= ~_PAGE_GLOBAL;
1249 	__default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1250 
1251 	/*
1252 	 * Prevent page tables from being allocated in highmem, even
1253 	 * if CONFIG_HIGHPTE is enabled.
1254 	 */
1255 	__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1256 
1257 	/* Get mfn list */
1258 	xen_build_dynamic_phys_to_machine();
1259 
1260 	/*
1261 	 * Set up kernel GDT and segment registers, mainly so that
1262 	 * -fstack-protector code can be executed.
1263 	 */
1264 	xen_setup_gdt(0);
1265 
1266 	/* Work out if we support NX */
1267 	get_cpu_cap(&boot_cpu_data);
1268 	x86_configure_nx();
1269 
1270 	/* Determine virtual and physical address sizes */
1271 	get_cpu_address_sizes(&boot_cpu_data);
1272 
1273 	/* Let's presume PV guests always boot on vCPU with id 0. */
1274 	per_cpu(xen_vcpu_id, 0) = 0;
1275 
1276 	idt_setup_early_handler();
1277 
1278 	xen_init_capabilities();
1279 
1280 #ifdef CONFIG_X86_LOCAL_APIC
1281 	/*
1282 	 * set up the basic apic ops.
1283 	 */
1284 	xen_init_apic();
1285 #endif
1286 
1287 	if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1288 		pv_ops.mmu.ptep_modify_prot_start =
1289 			xen_ptep_modify_prot_start;
1290 		pv_ops.mmu.ptep_modify_prot_commit =
1291 			xen_ptep_modify_prot_commit;
1292 	}
1293 
1294 	machine_ops = xen_machine_ops;
1295 
1296 	/*
1297 	 * The only reliable way to retain the initial address of the
1298 	 * percpu gdt_page is to remember it here, so we can go and
1299 	 * mark it RW later, when the initial percpu area is freed.
1300 	 */
1301 	xen_initial_gdt = &per_cpu(gdt_page, 0);
1302 
1303 	xen_smp_init();
1304 
1305 #ifdef CONFIG_ACPI_NUMA
1306 	/*
1307 	 * The pages we from Xen are not related to machine pages, so
1308 	 * any NUMA information the kernel tries to get from ACPI will
1309 	 * be meaningless.  Prevent it from trying.
1310 	 */
1311 	acpi_numa = -1;
1312 #endif
1313 	WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1314 
1315 	local_irq_disable();
1316 	early_boot_irqs_disabled = true;
1317 
1318 	xen_raw_console_write("mapping kernel into physical memory\n");
1319 	xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1320 				   xen_start_info->nr_pages);
1321 	xen_reserve_special_pages();
1322 
1323 	/* keep using Xen gdt for now; no urgent need to change it */
1324 
1325 #ifdef CONFIG_X86_32
1326 	pv_info.kernel_rpl = 1;
1327 	if (xen_feature(XENFEAT_supervisor_mode_kernel))
1328 		pv_info.kernel_rpl = 0;
1329 #else
1330 	pv_info.kernel_rpl = 0;
1331 #endif
1332 	/* set the limit of our address space */
1333 	xen_reserve_top();
1334 
1335 	/*
1336 	 * We used to do this in xen_arch_setup, but that is too late
1337 	 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1338 	 * early_amd_init which pokes 0xcf8 port.
1339 	 */
1340 	set_iopl.iopl = 1;
1341 	rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1342 	if (rc != 0)
1343 		xen_raw_printk("physdev_op failed %d\n", rc);
1344 
1345 #ifdef CONFIG_X86_32
1346 	/* set up basic CPUID stuff */
1347 	cpu_detect(&new_cpu_data);
1348 	set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1349 	new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
1350 #endif
1351 
1352 	if (xen_start_info->mod_start) {
1353 	    if (xen_start_info->flags & SIF_MOD_START_PFN)
1354 		initrd_start = PFN_PHYS(xen_start_info->mod_start);
1355 	    else
1356 		initrd_start = __pa(xen_start_info->mod_start);
1357 	}
1358 
1359 	/* Poke various useful things into boot_params */
1360 	boot_params.hdr.type_of_loader = (9 << 4) | 0;
1361 	boot_params.hdr.ramdisk_image = initrd_start;
1362 	boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1363 	boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1364 	boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1365 
1366 	if (!xen_initial_domain()) {
1367 		add_preferred_console("xenboot", 0, NULL);
1368 		if (pci_xen)
1369 			x86_init.pci.arch_init = pci_xen_init;
1370 	} else {
1371 		const struct dom0_vga_console_info *info =
1372 			(void *)((char *)xen_start_info +
1373 				 xen_start_info->console.dom0.info_off);
1374 		struct xen_platform_op op = {
1375 			.cmd = XENPF_firmware_info,
1376 			.interface_version = XENPF_INTERFACE_VERSION,
1377 			.u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1378 		};
1379 
1380 		x86_platform.set_legacy_features =
1381 				xen_dom0_set_legacy_features;
1382 		xen_init_vga(info, xen_start_info->console.dom0.info_size);
1383 		xen_start_info->console.domU.mfn = 0;
1384 		xen_start_info->console.domU.evtchn = 0;
1385 
1386 		if (HYPERVISOR_platform_op(&op) == 0)
1387 			boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1388 
1389 		/* Make sure ACS will be enabled */
1390 		pci_request_acs();
1391 
1392 		xen_acpi_sleep_register();
1393 
1394 		/* Avoid searching for BIOS MP tables */
1395 		x86_init.mpparse.find_smp_config = x86_init_noop;
1396 		x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1397 
1398 		xen_boot_params_init_edd();
1399 	}
1400 
1401 	if (!boot_params.screen_info.orig_video_isVGA)
1402 		add_preferred_console("tty", 0, NULL);
1403 	add_preferred_console("hvc", 0, NULL);
1404 	if (boot_params.screen_info.orig_video_isVGA)
1405 		add_preferred_console("tty", 0, NULL);
1406 
1407 #ifdef CONFIG_PCI
1408 	/* PCI BIOS service won't work from a PV guest. */
1409 	pci_probe &= ~PCI_PROBE_BIOS;
1410 #endif
1411 	xen_raw_console_write("about to get started...\n");
1412 
1413 	/* We need this for printk timestamps */
1414 	xen_setup_runstate_info(0);
1415 
1416 	xen_efi_init(&boot_params);
1417 
1418 	/* Start the world */
1419 #ifdef CONFIG_X86_32
1420 	i386_start_kernel();
1421 #else
1422 	cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1423 	x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1424 #endif
1425 }
1426 
1427 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1428 {
1429 	int rc;
1430 
1431 	if (per_cpu(xen_vcpu, cpu) == NULL)
1432 		return -ENODEV;
1433 
1434 	xen_setup_timer(cpu);
1435 
1436 	rc = xen_smp_intr_init(cpu);
1437 	if (rc) {
1438 		WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1439 		     cpu, rc);
1440 		return rc;
1441 	}
1442 
1443 	rc = xen_smp_intr_init_pv(cpu);
1444 	if (rc) {
1445 		WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1446 		     cpu, rc);
1447 		return rc;
1448 	}
1449 
1450 	return 0;
1451 }
1452 
1453 static int xen_cpu_dead_pv(unsigned int cpu)
1454 {
1455 	xen_smp_intr_free(cpu);
1456 	xen_smp_intr_free_pv(cpu);
1457 
1458 	xen_teardown_timer(cpu);
1459 
1460 	return 0;
1461 }
1462 
1463 static uint32_t __init xen_platform_pv(void)
1464 {
1465 	if (xen_pv_domain())
1466 		return xen_cpuid_base();
1467 
1468 	return 0;
1469 }
1470 
1471 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1472 	.name                   = "Xen PV",
1473 	.detect                 = xen_platform_pv,
1474 	.type			= X86_HYPER_XEN_PV,
1475 	.runtime.pin_vcpu       = xen_pin_vcpu,
1476 	.ignore_nopv		= true,
1477 };
1478