1 /* 2 * Core of Xen paravirt_ops implementation. 3 * 4 * This file contains the xen_paravirt_ops structure itself, and the 5 * implementations for: 6 * - privileged instructions 7 * - interrupt flags 8 * - segment operations 9 * - booting and setup 10 * 11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 12 */ 13 14 #include <linux/cpu.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/smp.h> 18 #include <linux/preempt.h> 19 #include <linux/hardirq.h> 20 #include <linux/percpu.h> 21 #include <linux/delay.h> 22 #include <linux/start_kernel.h> 23 #include <linux/sched.h> 24 #include <linux/kprobes.h> 25 #include <linux/bootmem.h> 26 #include <linux/module.h> 27 #include <linux/mm.h> 28 #include <linux/page-flags.h> 29 #include <linux/highmem.h> 30 #include <linux/console.h> 31 #include <linux/pci.h> 32 #include <linux/gfp.h> 33 #include <linux/memblock.h> 34 #include <linux/edd.h> 35 #include <linux/frame.h> 36 37 #ifdef CONFIG_KEXEC_CORE 38 #include <linux/kexec.h> 39 #endif 40 41 #include <xen/xen.h> 42 #include <xen/events.h> 43 #include <xen/interface/xen.h> 44 #include <xen/interface/version.h> 45 #include <xen/interface/physdev.h> 46 #include <xen/interface/vcpu.h> 47 #include <xen/interface/memory.h> 48 #include <xen/interface/nmi.h> 49 #include <xen/interface/xen-mca.h> 50 #include <xen/features.h> 51 #include <xen/page.h> 52 #include <xen/hvm.h> 53 #include <xen/hvc-console.h> 54 #include <xen/acpi.h> 55 56 #include <asm/paravirt.h> 57 #include <asm/apic.h> 58 #include <asm/page.h> 59 #include <asm/xen/pci.h> 60 #include <asm/xen/hypercall.h> 61 #include <asm/xen/hypervisor.h> 62 #include <asm/xen/cpuid.h> 63 #include <asm/fixmap.h> 64 #include <asm/processor.h> 65 #include <asm/proto.h> 66 #include <asm/msr-index.h> 67 #include <asm/traps.h> 68 #include <asm/setup.h> 69 #include <asm/desc.h> 70 #include <asm/pgalloc.h> 71 #include <asm/pgtable.h> 72 #include <asm/tlbflush.h> 73 #include <asm/reboot.h> 74 #include <asm/stackprotector.h> 75 #include <asm/hypervisor.h> 76 #include <asm/mach_traps.h> 77 #include <asm/mwait.h> 78 #include <asm/pci_x86.h> 79 #include <asm/cpu.h> 80 81 #ifdef CONFIG_ACPI 82 #include <linux/acpi.h> 83 #include <asm/acpi.h> 84 #include <acpi/pdc_intel.h> 85 #include <acpi/processor.h> 86 #include <xen/interface/platform.h> 87 #endif 88 89 #include "xen-ops.h" 90 #include "mmu.h" 91 #include "smp.h" 92 #include "multicalls.h" 93 #include "pmu.h" 94 95 EXPORT_SYMBOL_GPL(hypercall_page); 96 97 /* 98 * Pointer to the xen_vcpu_info structure or 99 * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info 100 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info 101 * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point 102 * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to 103 * acknowledge pending events. 104 * Also more subtly it is used by the patched version of irq enable/disable 105 * e.g. xen_irq_enable_direct and xen_iret in PV mode. 106 * 107 * The desire to be able to do those mask/unmask operations as a single 108 * instruction by using the per-cpu offset held in %gs is the real reason 109 * vcpu info is in a per-cpu pointer and the original reason for this 110 * hypercall. 111 * 112 */ 113 DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); 114 115 /* 116 * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info 117 * hypercall. This can be used both in PV and PVHVM mode. The structure 118 * overrides the default per_cpu(xen_vcpu, cpu) value. 119 */ 120 DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); 121 122 /* Linux <-> Xen vCPU id mapping */ 123 DEFINE_PER_CPU(int, xen_vcpu_id) = -1; 124 EXPORT_PER_CPU_SYMBOL(xen_vcpu_id); 125 126 enum xen_domain_type xen_domain_type = XEN_NATIVE; 127 EXPORT_SYMBOL_GPL(xen_domain_type); 128 129 unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; 130 EXPORT_SYMBOL(machine_to_phys_mapping); 131 unsigned long machine_to_phys_nr; 132 EXPORT_SYMBOL(machine_to_phys_nr); 133 134 struct start_info *xen_start_info; 135 EXPORT_SYMBOL_GPL(xen_start_info); 136 137 struct shared_info xen_dummy_shared_info; 138 139 void *xen_initial_gdt; 140 141 RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); 142 __read_mostly int xen_have_vector_callback; 143 EXPORT_SYMBOL_GPL(xen_have_vector_callback); 144 145 /* 146 * Point at some empty memory to start with. We map the real shared_info 147 * page as soon as fixmap is up and running. 148 */ 149 struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; 150 151 /* 152 * Flag to determine whether vcpu info placement is available on all 153 * VCPUs. We assume it is to start with, and then set it to zero on 154 * the first failure. This is because it can succeed on some VCPUs 155 * and not others, since it can involve hypervisor memory allocation, 156 * or because the guest failed to guarantee all the appropriate 157 * constraints on all VCPUs (ie buffer can't cross a page boundary). 158 * 159 * Note that any particular CPU may be using a placed vcpu structure, 160 * but we can only optimise if the all are. 161 * 162 * 0: not available, 1: available 163 */ 164 static int have_vcpu_info_placement = 1; 165 166 struct tls_descs { 167 struct desc_struct desc[3]; 168 }; 169 170 /* 171 * Updating the 3 TLS descriptors in the GDT on every task switch is 172 * surprisingly expensive so we avoid updating them if they haven't 173 * changed. Since Xen writes different descriptors than the one 174 * passed in the update_descriptor hypercall we keep shadow copies to 175 * compare against. 176 */ 177 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 178 179 static void clamp_max_cpus(void) 180 { 181 #ifdef CONFIG_SMP 182 if (setup_max_cpus > MAX_VIRT_CPUS) 183 setup_max_cpus = MAX_VIRT_CPUS; 184 #endif 185 } 186 187 static void xen_vcpu_setup(int cpu) 188 { 189 struct vcpu_register_vcpu_info info; 190 int err; 191 struct vcpu_info *vcpup; 192 193 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); 194 195 /* 196 * This path is called twice on PVHVM - first during bootup via 197 * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being 198 * hotplugged: cpu_up -> xen_hvm_cpu_notify. 199 * As we can only do the VCPUOP_register_vcpu_info once lets 200 * not over-write its result. 201 * 202 * For PV it is called during restore (xen_vcpu_restore) and bootup 203 * (xen_setup_vcpu_info_placement). The hotplug mechanism does not 204 * use this function. 205 */ 206 if (xen_hvm_domain()) { 207 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu)) 208 return; 209 } 210 if (cpu < MAX_VIRT_CPUS) 211 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; 212 213 if (!have_vcpu_info_placement) { 214 if (cpu >= MAX_VIRT_CPUS) 215 clamp_max_cpus(); 216 return; 217 } 218 219 vcpup = &per_cpu(xen_vcpu_info, cpu); 220 info.mfn = arbitrary_virt_to_mfn(vcpup); 221 info.offset = offset_in_page(vcpup); 222 223 /* Check to see if the hypervisor will put the vcpu_info 224 structure where we want it, which allows direct access via 225 a percpu-variable. 226 N.B. This hypercall can _only_ be called once per CPU. Subsequent 227 calls will error out with -EINVAL. This is due to the fact that 228 hypervisor has no unregister variant and this hypercall does not 229 allow to over-write info.mfn and info.offset. 230 */ 231 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); 232 233 if (err) { 234 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); 235 have_vcpu_info_placement = 0; 236 clamp_max_cpus(); 237 } else { 238 /* This cpu is using the registered vcpu info, even if 239 later ones fail to. */ 240 per_cpu(xen_vcpu, cpu) = vcpup; 241 } 242 } 243 244 /* 245 * On restore, set the vcpu placement up again. 246 * If it fails, then we're in a bad state, since 247 * we can't back out from using it... 248 */ 249 void xen_vcpu_restore(void) 250 { 251 int cpu; 252 253 for_each_possible_cpu(cpu) { 254 bool other_cpu = (cpu != smp_processor_id()); 255 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL); 256 257 if (other_cpu && is_up && 258 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) 259 BUG(); 260 261 xen_setup_runstate_info(cpu); 262 263 if (have_vcpu_info_placement) 264 xen_vcpu_setup(cpu); 265 266 if (other_cpu && is_up && 267 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) 268 BUG(); 269 } 270 } 271 272 static void __init xen_banner(void) 273 { 274 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 275 struct xen_extraversion extra; 276 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 277 278 pr_info("Booting paravirtualized kernel %son %s\n", 279 xen_feature(XENFEAT_auto_translated_physmap) ? 280 "with PVH extensions " : "", pv_info.name); 281 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 282 version >> 16, version & 0xffff, extra.extraversion, 283 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 284 } 285 /* Check if running on Xen version (major, minor) or later */ 286 bool 287 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 288 { 289 unsigned int version; 290 291 if (!xen_domain()) 292 return false; 293 294 version = HYPERVISOR_xen_version(XENVER_version, NULL); 295 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 296 ((version >> 16) > major)) 297 return true; 298 return false; 299 } 300 301 #define CPUID_THERM_POWER_LEAF 6 302 #define APERFMPERF_PRESENT 0 303 304 static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; 305 static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; 306 307 static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; 308 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 309 static __read_mostly unsigned int cpuid_leaf5_edx_val; 310 311 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 312 unsigned int *cx, unsigned int *dx) 313 { 314 unsigned maskebx = ~0; 315 unsigned maskecx = ~0; 316 unsigned maskedx = ~0; 317 unsigned setecx = 0; 318 /* 319 * Mask out inconvenient features, to try and disable as many 320 * unsupported kernel subsystems as possible. 321 */ 322 switch (*ax) { 323 case 1: 324 maskecx = cpuid_leaf1_ecx_mask; 325 setecx = cpuid_leaf1_ecx_set_mask; 326 maskedx = cpuid_leaf1_edx_mask; 327 break; 328 329 case CPUID_MWAIT_LEAF: 330 /* Synthesize the values.. */ 331 *ax = 0; 332 *bx = 0; 333 *cx = cpuid_leaf5_ecx_val; 334 *dx = cpuid_leaf5_edx_val; 335 return; 336 337 case CPUID_THERM_POWER_LEAF: 338 /* Disabling APERFMPERF for kernel usage */ 339 maskecx = ~(1 << APERFMPERF_PRESENT); 340 break; 341 342 case 0xb: 343 /* Suppress extended topology stuff */ 344 maskebx = 0; 345 break; 346 } 347 348 asm(XEN_EMULATE_PREFIX "cpuid" 349 : "=a" (*ax), 350 "=b" (*bx), 351 "=c" (*cx), 352 "=d" (*dx) 353 : "0" (*ax), "2" (*cx)); 354 355 *bx &= maskebx; 356 *cx &= maskecx; 357 *cx |= setecx; 358 *dx &= maskedx; 359 } 360 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 361 362 static bool __init xen_check_mwait(void) 363 { 364 #ifdef CONFIG_ACPI 365 struct xen_platform_op op = { 366 .cmd = XENPF_set_processor_pminfo, 367 .u.set_pminfo.id = -1, 368 .u.set_pminfo.type = XEN_PM_PDC, 369 }; 370 uint32_t buf[3]; 371 unsigned int ax, bx, cx, dx; 372 unsigned int mwait_mask; 373 374 /* We need to determine whether it is OK to expose the MWAIT 375 * capability to the kernel to harvest deeper than C3 states from ACPI 376 * _CST using the processor_harvest_xen.c module. For this to work, we 377 * need to gather the MWAIT_LEAF values (which the cstate.c code 378 * checks against). The hypervisor won't expose the MWAIT flag because 379 * it would break backwards compatibility; so we will find out directly 380 * from the hardware and hypercall. 381 */ 382 if (!xen_initial_domain()) 383 return false; 384 385 /* 386 * When running under platform earlier than Xen4.2, do not expose 387 * mwait, to avoid the risk of loading native acpi pad driver 388 */ 389 if (!xen_running_on_version_or_later(4, 2)) 390 return false; 391 392 ax = 1; 393 cx = 0; 394 395 native_cpuid(&ax, &bx, &cx, &dx); 396 397 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 398 (1 << (X86_FEATURE_MWAIT % 32)); 399 400 if ((cx & mwait_mask) != mwait_mask) 401 return false; 402 403 /* We need to emulate the MWAIT_LEAF and for that we need both 404 * ecx and edx. The hypercall provides only partial information. 405 */ 406 407 ax = CPUID_MWAIT_LEAF; 408 bx = 0; 409 cx = 0; 410 dx = 0; 411 412 native_cpuid(&ax, &bx, &cx, &dx); 413 414 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 415 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 416 */ 417 buf[0] = ACPI_PDC_REVISION_ID; 418 buf[1] = 1; 419 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 420 421 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 422 423 if ((HYPERVISOR_platform_op(&op) == 0) && 424 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 425 cpuid_leaf5_ecx_val = cx; 426 cpuid_leaf5_edx_val = dx; 427 } 428 return true; 429 #else 430 return false; 431 #endif 432 } 433 static void __init xen_init_cpuid_mask(void) 434 { 435 unsigned int ax, bx, cx, dx; 436 unsigned int xsave_mask; 437 438 cpuid_leaf1_edx_mask = 439 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ 440 (1 << X86_FEATURE_ACC)); /* thermal monitoring */ 441 442 if (!xen_initial_domain()) 443 cpuid_leaf1_edx_mask &= 444 ~((1 << X86_FEATURE_ACPI)); /* disable ACPI */ 445 446 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32)); 447 448 ax = 1; 449 cx = 0; 450 cpuid(1, &ax, &bx, &cx, &dx); 451 452 xsave_mask = 453 (1 << (X86_FEATURE_XSAVE % 32)) | 454 (1 << (X86_FEATURE_OSXSAVE % 32)); 455 456 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 457 if ((cx & xsave_mask) != xsave_mask) 458 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ 459 if (xen_check_mwait()) 460 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); 461 } 462 463 static void xen_set_debugreg(int reg, unsigned long val) 464 { 465 HYPERVISOR_set_debugreg(reg, val); 466 } 467 468 static unsigned long xen_get_debugreg(int reg) 469 { 470 return HYPERVISOR_get_debugreg(reg); 471 } 472 473 static void xen_end_context_switch(struct task_struct *next) 474 { 475 xen_mc_flush(); 476 paravirt_end_context_switch(next); 477 } 478 479 static unsigned long xen_store_tr(void) 480 { 481 return 0; 482 } 483 484 /* 485 * Set the page permissions for a particular virtual address. If the 486 * address is a vmalloc mapping (or other non-linear mapping), then 487 * find the linear mapping of the page and also set its protections to 488 * match. 489 */ 490 static void set_aliased_prot(void *v, pgprot_t prot) 491 { 492 int level; 493 pte_t *ptep; 494 pte_t pte; 495 unsigned long pfn; 496 struct page *page; 497 unsigned char dummy; 498 499 ptep = lookup_address((unsigned long)v, &level); 500 BUG_ON(ptep == NULL); 501 502 pfn = pte_pfn(*ptep); 503 page = pfn_to_page(pfn); 504 505 pte = pfn_pte(pfn, prot); 506 507 /* 508 * Careful: update_va_mapping() will fail if the virtual address 509 * we're poking isn't populated in the page tables. We don't 510 * need to worry about the direct map (that's always in the page 511 * tables), but we need to be careful about vmap space. In 512 * particular, the top level page table can lazily propagate 513 * entries between processes, so if we've switched mms since we 514 * vmapped the target in the first place, we might not have the 515 * top-level page table entry populated. 516 * 517 * We disable preemption because we want the same mm active when 518 * we probe the target and when we issue the hypercall. We'll 519 * have the same nominal mm, but if we're a kernel thread, lazy 520 * mm dropping could change our pgd. 521 * 522 * Out of an abundance of caution, this uses __get_user() to fault 523 * in the target address just in case there's some obscure case 524 * in which the target address isn't readable. 525 */ 526 527 preempt_disable(); 528 529 pagefault_disable(); /* Avoid warnings due to being atomic. */ 530 __get_user(dummy, (unsigned char __user __force *)v); 531 pagefault_enable(); 532 533 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 534 BUG(); 535 536 if (!PageHighMem(page)) { 537 void *av = __va(PFN_PHYS(pfn)); 538 539 if (av != v) 540 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 541 BUG(); 542 } else 543 kmap_flush_unused(); 544 545 preempt_enable(); 546 } 547 548 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 549 { 550 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 551 int i; 552 553 /* 554 * We need to mark the all aliases of the LDT pages RO. We 555 * don't need to call vm_flush_aliases(), though, since that's 556 * only responsible for flushing aliases out the TLBs, not the 557 * page tables, and Xen will flush the TLB for us if needed. 558 * 559 * To avoid confusing future readers: none of this is necessary 560 * to load the LDT. The hypervisor only checks this when the 561 * LDT is faulted in due to subsequent descriptor access. 562 */ 563 564 for(i = 0; i < entries; i += entries_per_page) 565 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 566 } 567 568 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 569 { 570 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 571 int i; 572 573 for(i = 0; i < entries; i += entries_per_page) 574 set_aliased_prot(ldt + i, PAGE_KERNEL); 575 } 576 577 static void xen_set_ldt(const void *addr, unsigned entries) 578 { 579 struct mmuext_op *op; 580 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 581 582 trace_xen_cpu_set_ldt(addr, entries); 583 584 op = mcs.args; 585 op->cmd = MMUEXT_SET_LDT; 586 op->arg1.linear_addr = (unsigned long)addr; 587 op->arg2.nr_ents = entries; 588 589 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 590 591 xen_mc_issue(PARAVIRT_LAZY_CPU); 592 } 593 594 static void xen_load_gdt(const struct desc_ptr *dtr) 595 { 596 unsigned long va = dtr->address; 597 unsigned int size = dtr->size + 1; 598 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 599 unsigned long frames[pages]; 600 int f; 601 602 /* 603 * A GDT can be up to 64k in size, which corresponds to 8192 604 * 8-byte entries, or 16 4k pages.. 605 */ 606 607 BUG_ON(size > 65536); 608 BUG_ON(va & ~PAGE_MASK); 609 610 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 611 int level; 612 pte_t *ptep; 613 unsigned long pfn, mfn; 614 void *virt; 615 616 /* 617 * The GDT is per-cpu and is in the percpu data area. 618 * That can be virtually mapped, so we need to do a 619 * page-walk to get the underlying MFN for the 620 * hypercall. The page can also be in the kernel's 621 * linear range, so we need to RO that mapping too. 622 */ 623 ptep = lookup_address(va, &level); 624 BUG_ON(ptep == NULL); 625 626 pfn = pte_pfn(*ptep); 627 mfn = pfn_to_mfn(pfn); 628 virt = __va(PFN_PHYS(pfn)); 629 630 frames[f] = mfn; 631 632 make_lowmem_page_readonly((void *)va); 633 make_lowmem_page_readonly(virt); 634 } 635 636 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 637 BUG(); 638 } 639 640 /* 641 * load_gdt for early boot, when the gdt is only mapped once 642 */ 643 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 644 { 645 unsigned long va = dtr->address; 646 unsigned int size = dtr->size + 1; 647 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 648 unsigned long frames[pages]; 649 int f; 650 651 /* 652 * A GDT can be up to 64k in size, which corresponds to 8192 653 * 8-byte entries, or 16 4k pages.. 654 */ 655 656 BUG_ON(size > 65536); 657 BUG_ON(va & ~PAGE_MASK); 658 659 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 660 pte_t pte; 661 unsigned long pfn, mfn; 662 663 pfn = virt_to_pfn(va); 664 mfn = pfn_to_mfn(pfn); 665 666 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 667 668 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 669 BUG(); 670 671 frames[f] = mfn; 672 } 673 674 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 675 BUG(); 676 } 677 678 static inline bool desc_equal(const struct desc_struct *d1, 679 const struct desc_struct *d2) 680 { 681 return d1->a == d2->a && d1->b == d2->b; 682 } 683 684 static void load_TLS_descriptor(struct thread_struct *t, 685 unsigned int cpu, unsigned int i) 686 { 687 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 688 struct desc_struct *gdt; 689 xmaddr_t maddr; 690 struct multicall_space mc; 691 692 if (desc_equal(shadow, &t->tls_array[i])) 693 return; 694 695 *shadow = t->tls_array[i]; 696 697 gdt = get_cpu_gdt_table(cpu); 698 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 699 mc = __xen_mc_entry(0); 700 701 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 702 } 703 704 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 705 { 706 /* 707 * XXX sleazy hack: If we're being called in a lazy-cpu zone 708 * and lazy gs handling is enabled, it means we're in a 709 * context switch, and %gs has just been saved. This means we 710 * can zero it out to prevent faults on exit from the 711 * hypervisor if the next process has no %gs. Either way, it 712 * has been saved, and the new value will get loaded properly. 713 * This will go away as soon as Xen has been modified to not 714 * save/restore %gs for normal hypercalls. 715 * 716 * On x86_64, this hack is not used for %gs, because gs points 717 * to KERNEL_GS_BASE (and uses it for PDA references), so we 718 * must not zero %gs on x86_64 719 * 720 * For x86_64, we need to zero %fs, otherwise we may get an 721 * exception between the new %fs descriptor being loaded and 722 * %fs being effectively cleared at __switch_to(). 723 */ 724 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 725 #ifdef CONFIG_X86_32 726 lazy_load_gs(0); 727 #else 728 loadsegment(fs, 0); 729 #endif 730 } 731 732 xen_mc_batch(); 733 734 load_TLS_descriptor(t, cpu, 0); 735 load_TLS_descriptor(t, cpu, 1); 736 load_TLS_descriptor(t, cpu, 2); 737 738 xen_mc_issue(PARAVIRT_LAZY_CPU); 739 } 740 741 #ifdef CONFIG_X86_64 742 static void xen_load_gs_index(unsigned int idx) 743 { 744 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 745 BUG(); 746 } 747 #endif 748 749 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 750 const void *ptr) 751 { 752 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 753 u64 entry = *(u64 *)ptr; 754 755 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 756 757 preempt_disable(); 758 759 xen_mc_flush(); 760 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 761 BUG(); 762 763 preempt_enable(); 764 } 765 766 static int cvt_gate_to_trap(int vector, const gate_desc *val, 767 struct trap_info *info) 768 { 769 unsigned long addr; 770 771 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) 772 return 0; 773 774 info->vector = vector; 775 776 addr = gate_offset(*val); 777 #ifdef CONFIG_X86_64 778 /* 779 * Look for known traps using IST, and substitute them 780 * appropriately. The debugger ones are the only ones we care 781 * about. Xen will handle faults like double_fault, 782 * so we should never see them. Warn if 783 * there's an unexpected IST-using fault handler. 784 */ 785 if (addr == (unsigned long)debug) 786 addr = (unsigned long)xen_debug; 787 else if (addr == (unsigned long)int3) 788 addr = (unsigned long)xen_int3; 789 else if (addr == (unsigned long)stack_segment) 790 addr = (unsigned long)xen_stack_segment; 791 else if (addr == (unsigned long)double_fault) { 792 /* Don't need to handle these */ 793 return 0; 794 #ifdef CONFIG_X86_MCE 795 } else if (addr == (unsigned long)machine_check) { 796 /* 797 * when xen hypervisor inject vMCE to guest, 798 * use native mce handler to handle it 799 */ 800 ; 801 #endif 802 } else if (addr == (unsigned long)nmi) 803 /* 804 * Use the native version as well. 805 */ 806 ; 807 else { 808 /* Some other trap using IST? */ 809 if (WARN_ON(val->ist != 0)) 810 return 0; 811 } 812 #endif /* CONFIG_X86_64 */ 813 info->address = addr; 814 815 info->cs = gate_segment(*val); 816 info->flags = val->dpl; 817 /* interrupt gates clear IF */ 818 if (val->type == GATE_INTERRUPT) 819 info->flags |= 1 << 2; 820 821 return 1; 822 } 823 824 /* Locations of each CPU's IDT */ 825 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 826 827 /* Set an IDT entry. If the entry is part of the current IDT, then 828 also update Xen. */ 829 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 830 { 831 unsigned long p = (unsigned long)&dt[entrynum]; 832 unsigned long start, end; 833 834 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 835 836 preempt_disable(); 837 838 start = __this_cpu_read(idt_desc.address); 839 end = start + __this_cpu_read(idt_desc.size) + 1; 840 841 xen_mc_flush(); 842 843 native_write_idt_entry(dt, entrynum, g); 844 845 if (p >= start && (p + 8) <= end) { 846 struct trap_info info[2]; 847 848 info[1].address = 0; 849 850 if (cvt_gate_to_trap(entrynum, g, &info[0])) 851 if (HYPERVISOR_set_trap_table(info)) 852 BUG(); 853 } 854 855 preempt_enable(); 856 } 857 858 static void xen_convert_trap_info(const struct desc_ptr *desc, 859 struct trap_info *traps) 860 { 861 unsigned in, out, count; 862 863 count = (desc->size+1) / sizeof(gate_desc); 864 BUG_ON(count > 256); 865 866 for (in = out = 0; in < count; in++) { 867 gate_desc *entry = (gate_desc*)(desc->address) + in; 868 869 if (cvt_gate_to_trap(in, entry, &traps[out])) 870 out++; 871 } 872 traps[out].address = 0; 873 } 874 875 void xen_copy_trap_info(struct trap_info *traps) 876 { 877 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 878 879 xen_convert_trap_info(desc, traps); 880 } 881 882 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 883 hold a spinlock to protect the static traps[] array (static because 884 it avoids allocation, and saves stack space). */ 885 static void xen_load_idt(const struct desc_ptr *desc) 886 { 887 static DEFINE_SPINLOCK(lock); 888 static struct trap_info traps[257]; 889 890 trace_xen_cpu_load_idt(desc); 891 892 spin_lock(&lock); 893 894 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 895 896 xen_convert_trap_info(desc, traps); 897 898 xen_mc_flush(); 899 if (HYPERVISOR_set_trap_table(traps)) 900 BUG(); 901 902 spin_unlock(&lock); 903 } 904 905 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 906 they're handled differently. */ 907 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 908 const void *desc, int type) 909 { 910 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 911 912 preempt_disable(); 913 914 switch (type) { 915 case DESC_LDT: 916 case DESC_TSS: 917 /* ignore */ 918 break; 919 920 default: { 921 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 922 923 xen_mc_flush(); 924 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 925 BUG(); 926 } 927 928 } 929 930 preempt_enable(); 931 } 932 933 /* 934 * Version of write_gdt_entry for use at early boot-time needed to 935 * update an entry as simply as possible. 936 */ 937 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 938 const void *desc, int type) 939 { 940 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 941 942 switch (type) { 943 case DESC_LDT: 944 case DESC_TSS: 945 /* ignore */ 946 break; 947 948 default: { 949 xmaddr_t maddr = virt_to_machine(&dt[entry]); 950 951 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 952 dt[entry] = *(struct desc_struct *)desc; 953 } 954 955 } 956 } 957 958 static void xen_load_sp0(struct tss_struct *tss, 959 struct thread_struct *thread) 960 { 961 struct multicall_space mcs; 962 963 mcs = xen_mc_entry(0); 964 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); 965 xen_mc_issue(PARAVIRT_LAZY_CPU); 966 tss->x86_tss.sp0 = thread->sp0; 967 } 968 969 void xen_set_iopl_mask(unsigned mask) 970 { 971 struct physdev_set_iopl set_iopl; 972 973 /* Force the change at ring 0. */ 974 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 975 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 976 } 977 978 static void xen_io_delay(void) 979 { 980 } 981 982 static void xen_clts(void) 983 { 984 struct multicall_space mcs; 985 986 mcs = xen_mc_entry(0); 987 988 MULTI_fpu_taskswitch(mcs.mc, 0); 989 990 xen_mc_issue(PARAVIRT_LAZY_CPU); 991 } 992 993 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 994 995 static unsigned long xen_read_cr0(void) 996 { 997 unsigned long cr0 = this_cpu_read(xen_cr0_value); 998 999 if (unlikely(cr0 == 0)) { 1000 cr0 = native_read_cr0(); 1001 this_cpu_write(xen_cr0_value, cr0); 1002 } 1003 1004 return cr0; 1005 } 1006 1007 static void xen_write_cr0(unsigned long cr0) 1008 { 1009 struct multicall_space mcs; 1010 1011 this_cpu_write(xen_cr0_value, cr0); 1012 1013 /* Only pay attention to cr0.TS; everything else is 1014 ignored. */ 1015 mcs = xen_mc_entry(0); 1016 1017 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 1018 1019 xen_mc_issue(PARAVIRT_LAZY_CPU); 1020 } 1021 1022 static void xen_write_cr4(unsigned long cr4) 1023 { 1024 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 1025 1026 native_write_cr4(cr4); 1027 } 1028 #ifdef CONFIG_X86_64 1029 static inline unsigned long xen_read_cr8(void) 1030 { 1031 return 0; 1032 } 1033 static inline void xen_write_cr8(unsigned long val) 1034 { 1035 BUG_ON(val); 1036 } 1037 #endif 1038 1039 static u64 xen_read_msr_safe(unsigned int msr, int *err) 1040 { 1041 u64 val; 1042 1043 if (pmu_msr_read(msr, &val, err)) 1044 return val; 1045 1046 val = native_read_msr_safe(msr, err); 1047 switch (msr) { 1048 case MSR_IA32_APICBASE: 1049 #ifdef CONFIG_X86_X2APIC 1050 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 1051 #endif 1052 val &= ~X2APIC_ENABLE; 1053 break; 1054 } 1055 return val; 1056 } 1057 1058 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 1059 { 1060 int ret; 1061 1062 ret = 0; 1063 1064 switch (msr) { 1065 #ifdef CONFIG_X86_64 1066 unsigned which; 1067 u64 base; 1068 1069 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 1070 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 1071 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 1072 1073 set: 1074 base = ((u64)high << 32) | low; 1075 if (HYPERVISOR_set_segment_base(which, base) != 0) 1076 ret = -EIO; 1077 break; 1078 #endif 1079 1080 case MSR_STAR: 1081 case MSR_CSTAR: 1082 case MSR_LSTAR: 1083 case MSR_SYSCALL_MASK: 1084 case MSR_IA32_SYSENTER_CS: 1085 case MSR_IA32_SYSENTER_ESP: 1086 case MSR_IA32_SYSENTER_EIP: 1087 /* Fast syscall setup is all done in hypercalls, so 1088 these are all ignored. Stub them out here to stop 1089 Xen console noise. */ 1090 break; 1091 1092 default: 1093 if (!pmu_msr_write(msr, low, high, &ret)) 1094 ret = native_write_msr_safe(msr, low, high); 1095 } 1096 1097 return ret; 1098 } 1099 1100 static u64 xen_read_msr(unsigned int msr) 1101 { 1102 /* 1103 * This will silently swallow a #GP from RDMSR. It may be worth 1104 * changing that. 1105 */ 1106 int err; 1107 1108 return xen_read_msr_safe(msr, &err); 1109 } 1110 1111 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 1112 { 1113 /* 1114 * This will silently swallow a #GP from WRMSR. It may be worth 1115 * changing that. 1116 */ 1117 xen_write_msr_safe(msr, low, high); 1118 } 1119 1120 void xen_setup_shared_info(void) 1121 { 1122 if (!xen_feature(XENFEAT_auto_translated_physmap)) { 1123 set_fixmap(FIX_PARAVIRT_BOOTMAP, 1124 xen_start_info->shared_info); 1125 1126 HYPERVISOR_shared_info = 1127 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 1128 } else 1129 HYPERVISOR_shared_info = 1130 (struct shared_info *)__va(xen_start_info->shared_info); 1131 1132 #ifndef CONFIG_SMP 1133 /* In UP this is as good a place as any to set up shared info */ 1134 xen_setup_vcpu_info_placement(); 1135 #endif 1136 1137 xen_setup_mfn_list_list(); 1138 } 1139 1140 /* This is called once we have the cpu_possible_mask */ 1141 void xen_setup_vcpu_info_placement(void) 1142 { 1143 int cpu; 1144 1145 for_each_possible_cpu(cpu) { 1146 /* Set up direct vCPU id mapping for PV guests. */ 1147 per_cpu(xen_vcpu_id, cpu) = cpu; 1148 xen_vcpu_setup(cpu); 1149 } 1150 1151 /* xen_vcpu_setup managed to place the vcpu_info within the 1152 * percpu area for all cpus, so make use of it. Note that for 1153 * PVH we want to use native IRQ mechanism. */ 1154 if (have_vcpu_info_placement && !xen_pvh_domain()) { 1155 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1156 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1157 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1158 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1159 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 1160 } 1161 } 1162 1163 static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, 1164 unsigned long addr, unsigned len) 1165 { 1166 char *start, *end, *reloc; 1167 unsigned ret; 1168 1169 start = end = reloc = NULL; 1170 1171 #define SITE(op, x) \ 1172 case PARAVIRT_PATCH(op.x): \ 1173 if (have_vcpu_info_placement) { \ 1174 start = (char *)xen_##x##_direct; \ 1175 end = xen_##x##_direct_end; \ 1176 reloc = xen_##x##_direct_reloc; \ 1177 } \ 1178 goto patch_site 1179 1180 switch (type) { 1181 SITE(pv_irq_ops, irq_enable); 1182 SITE(pv_irq_ops, irq_disable); 1183 SITE(pv_irq_ops, save_fl); 1184 SITE(pv_irq_ops, restore_fl); 1185 #undef SITE 1186 1187 patch_site: 1188 if (start == NULL || (end-start) > len) 1189 goto default_patch; 1190 1191 ret = paravirt_patch_insns(insnbuf, len, start, end); 1192 1193 /* Note: because reloc is assigned from something that 1194 appears to be an array, gcc assumes it's non-null, 1195 but doesn't know its relationship with start and 1196 end. */ 1197 if (reloc > start && reloc < end) { 1198 int reloc_off = reloc - start; 1199 long *relocp = (long *)(insnbuf + reloc_off); 1200 long delta = start - (char *)addr; 1201 1202 *relocp += delta; 1203 } 1204 break; 1205 1206 default_patch: 1207 default: 1208 ret = paravirt_patch_default(type, clobbers, insnbuf, 1209 addr, len); 1210 break; 1211 } 1212 1213 return ret; 1214 } 1215 1216 static const struct pv_info xen_info __initconst = { 1217 .shared_kernel_pmd = 0, 1218 1219 #ifdef CONFIG_X86_64 1220 .extra_user_64bit_cs = FLAT_USER_CS64, 1221 #endif 1222 .name = "Xen", 1223 }; 1224 1225 static const struct pv_init_ops xen_init_ops __initconst = { 1226 .patch = xen_patch, 1227 }; 1228 1229 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1230 .cpuid = xen_cpuid, 1231 1232 .set_debugreg = xen_set_debugreg, 1233 .get_debugreg = xen_get_debugreg, 1234 1235 .clts = xen_clts, 1236 1237 .read_cr0 = xen_read_cr0, 1238 .write_cr0 = xen_write_cr0, 1239 1240 .read_cr4 = native_read_cr4, 1241 .read_cr4_safe = native_read_cr4_safe, 1242 .write_cr4 = xen_write_cr4, 1243 1244 #ifdef CONFIG_X86_64 1245 .read_cr8 = xen_read_cr8, 1246 .write_cr8 = xen_write_cr8, 1247 #endif 1248 1249 .wbinvd = native_wbinvd, 1250 1251 .read_msr = xen_read_msr, 1252 .write_msr = xen_write_msr, 1253 1254 .read_msr_safe = xen_read_msr_safe, 1255 .write_msr_safe = xen_write_msr_safe, 1256 1257 .read_pmc = xen_read_pmc, 1258 1259 .iret = xen_iret, 1260 #ifdef CONFIG_X86_64 1261 .usergs_sysret64 = xen_sysret64, 1262 #endif 1263 1264 .load_tr_desc = paravirt_nop, 1265 .set_ldt = xen_set_ldt, 1266 .load_gdt = xen_load_gdt, 1267 .load_idt = xen_load_idt, 1268 .load_tls = xen_load_tls, 1269 #ifdef CONFIG_X86_64 1270 .load_gs_index = xen_load_gs_index, 1271 #endif 1272 1273 .alloc_ldt = xen_alloc_ldt, 1274 .free_ldt = xen_free_ldt, 1275 1276 .store_idt = native_store_idt, 1277 .store_tr = xen_store_tr, 1278 1279 .write_ldt_entry = xen_write_ldt_entry, 1280 .write_gdt_entry = xen_write_gdt_entry, 1281 .write_idt_entry = xen_write_idt_entry, 1282 .load_sp0 = xen_load_sp0, 1283 1284 .set_iopl_mask = xen_set_iopl_mask, 1285 .io_delay = xen_io_delay, 1286 1287 /* Xen takes care of %gs when switching to usermode for us */ 1288 .swapgs = paravirt_nop, 1289 1290 .start_context_switch = paravirt_start_context_switch, 1291 .end_context_switch = xen_end_context_switch, 1292 }; 1293 1294 static void xen_reboot(int reason) 1295 { 1296 struct sched_shutdown r = { .reason = reason }; 1297 int cpu; 1298 1299 for_each_online_cpu(cpu) 1300 xen_pmu_finish(cpu); 1301 1302 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) 1303 BUG(); 1304 } 1305 1306 static void xen_restart(char *msg) 1307 { 1308 xen_reboot(SHUTDOWN_reboot); 1309 } 1310 1311 static void xen_emergency_restart(void) 1312 { 1313 xen_reboot(SHUTDOWN_reboot); 1314 } 1315 1316 static void xen_machine_halt(void) 1317 { 1318 xen_reboot(SHUTDOWN_poweroff); 1319 } 1320 1321 static void xen_machine_power_off(void) 1322 { 1323 if (pm_power_off) 1324 pm_power_off(); 1325 xen_reboot(SHUTDOWN_poweroff); 1326 } 1327 1328 static void xen_crash_shutdown(struct pt_regs *regs) 1329 { 1330 xen_reboot(SHUTDOWN_crash); 1331 } 1332 1333 static int 1334 xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) 1335 { 1336 xen_reboot(SHUTDOWN_crash); 1337 return NOTIFY_DONE; 1338 } 1339 1340 static struct notifier_block xen_panic_block = { 1341 .notifier_call= xen_panic_event, 1342 .priority = INT_MIN 1343 }; 1344 1345 int xen_panic_handler_init(void) 1346 { 1347 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); 1348 return 0; 1349 } 1350 1351 static const struct machine_ops xen_machine_ops __initconst = { 1352 .restart = xen_restart, 1353 .halt = xen_machine_halt, 1354 .power_off = xen_machine_power_off, 1355 .shutdown = xen_machine_halt, 1356 .crash_shutdown = xen_crash_shutdown, 1357 .emergency_restart = xen_emergency_restart, 1358 }; 1359 1360 static unsigned char xen_get_nmi_reason(void) 1361 { 1362 unsigned char reason = 0; 1363 1364 /* Construct a value which looks like it came from port 0x61. */ 1365 if (test_bit(_XEN_NMIREASON_io_error, 1366 &HYPERVISOR_shared_info->arch.nmi_reason)) 1367 reason |= NMI_REASON_IOCHK; 1368 if (test_bit(_XEN_NMIREASON_pci_serr, 1369 &HYPERVISOR_shared_info->arch.nmi_reason)) 1370 reason |= NMI_REASON_SERR; 1371 1372 return reason; 1373 } 1374 1375 static void __init xen_boot_params_init_edd(void) 1376 { 1377 #if IS_ENABLED(CONFIG_EDD) 1378 struct xen_platform_op op; 1379 struct edd_info *edd_info; 1380 u32 *mbr_signature; 1381 unsigned nr; 1382 int ret; 1383 1384 edd_info = boot_params.eddbuf; 1385 mbr_signature = boot_params.edd_mbr_sig_buffer; 1386 1387 op.cmd = XENPF_firmware_info; 1388 1389 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1390 for (nr = 0; nr < EDDMAXNR; nr++) { 1391 struct edd_info *info = edd_info + nr; 1392 1393 op.u.firmware_info.index = nr; 1394 info->params.length = sizeof(info->params); 1395 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1396 &info->params); 1397 ret = HYPERVISOR_platform_op(&op); 1398 if (ret) 1399 break; 1400 1401 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1402 C(device); 1403 C(version); 1404 C(interface_support); 1405 C(legacy_max_cylinder); 1406 C(legacy_max_head); 1407 C(legacy_sectors_per_track); 1408 #undef C 1409 } 1410 boot_params.eddbuf_entries = nr; 1411 1412 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1413 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1414 op.u.firmware_info.index = nr; 1415 ret = HYPERVISOR_platform_op(&op); 1416 if (ret) 1417 break; 1418 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1419 } 1420 boot_params.edd_mbr_sig_buf_entries = nr; 1421 #endif 1422 } 1423 1424 /* 1425 * Set up the GDT and segment registers for -fstack-protector. Until 1426 * we do this, we have to be careful not to call any stack-protected 1427 * function, which is most of the kernel. 1428 * 1429 * Note, that it is __ref because the only caller of this after init 1430 * is PVH which is not going to use xen_load_gdt_boot or other 1431 * __init functions. 1432 */ 1433 static void __ref xen_setup_gdt(int cpu) 1434 { 1435 if (xen_feature(XENFEAT_auto_translated_physmap)) { 1436 #ifdef CONFIG_X86_64 1437 unsigned long dummy; 1438 1439 load_percpu_segment(cpu); /* We need to access per-cpu area */ 1440 switch_to_new_gdt(cpu); /* GDT and GS set */ 1441 1442 /* We are switching of the Xen provided GDT to our HVM mode 1443 * GDT. The new GDT has __KERNEL_CS with CS.L = 1 1444 * and we are jumping to reload it. 1445 */ 1446 asm volatile ("pushq %0\n" 1447 "leaq 1f(%%rip),%0\n" 1448 "pushq %0\n" 1449 "lretq\n" 1450 "1:\n" 1451 : "=&r" (dummy) : "0" (__KERNEL_CS)); 1452 1453 /* 1454 * While not needed, we also set the %es, %ds, and %fs 1455 * to zero. We don't care about %ss as it is NULL. 1456 * Strictly speaking this is not needed as Xen zeros those 1457 * out (and also MSR_FS_BASE, MSR_GS_BASE, MSR_KERNEL_GS_BASE) 1458 * 1459 * Linux zeros them in cpu_init() and in secondary_startup_64 1460 * (for BSP). 1461 */ 1462 loadsegment(es, 0); 1463 loadsegment(ds, 0); 1464 loadsegment(fs, 0); 1465 #else 1466 /* PVH: TODO Implement. */ 1467 BUG(); 1468 #endif 1469 return; /* PVH does not need any PV GDT ops. */ 1470 } 1471 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1472 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1473 1474 setup_stack_canary_segment(0); 1475 switch_to_new_gdt(0); 1476 1477 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1478 pv_cpu_ops.load_gdt = xen_load_gdt; 1479 } 1480 1481 #ifdef CONFIG_XEN_PVH 1482 /* 1483 * A PV guest starts with default flags that are not set for PVH, set them 1484 * here asap. 1485 */ 1486 static void xen_pvh_set_cr_flags(int cpu) 1487 { 1488 1489 /* Some of these are setup in 'secondary_startup_64'. The others: 1490 * X86_CR0_TS, X86_CR0_PE, X86_CR0_ET are set by Xen for HVM guests 1491 * (which PVH shared codepaths), while X86_CR0_PG is for PVH. */ 1492 write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM); 1493 1494 if (!cpu) 1495 return; 1496 /* 1497 * For BSP, PSE PGE are set in probe_page_size_mask(), for APs 1498 * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu(). 1499 */ 1500 if (boot_cpu_has(X86_FEATURE_PSE)) 1501 cr4_set_bits_and_update_boot(X86_CR4_PSE); 1502 1503 if (boot_cpu_has(X86_FEATURE_PGE)) 1504 cr4_set_bits_and_update_boot(X86_CR4_PGE); 1505 } 1506 1507 /* 1508 * Note, that it is ref - because the only caller of this after init 1509 * is PVH which is not going to use xen_load_gdt_boot or other 1510 * __init functions. 1511 */ 1512 void __ref xen_pvh_secondary_vcpu_init(int cpu) 1513 { 1514 xen_setup_gdt(cpu); 1515 xen_pvh_set_cr_flags(cpu); 1516 } 1517 1518 static void __init xen_pvh_early_guest_init(void) 1519 { 1520 if (!xen_feature(XENFEAT_auto_translated_physmap)) 1521 return; 1522 1523 if (!xen_feature(XENFEAT_hvm_callback_vector)) 1524 return; 1525 1526 xen_have_vector_callback = 1; 1527 1528 xen_pvh_early_cpu_init(0, false); 1529 xen_pvh_set_cr_flags(0); 1530 1531 #ifdef CONFIG_X86_32 1532 BUG(); /* PVH: Implement proper support. */ 1533 #endif 1534 } 1535 #endif /* CONFIG_XEN_PVH */ 1536 1537 static void __init xen_dom0_set_legacy_features(void) 1538 { 1539 x86_platform.legacy.rtc = 1; 1540 } 1541 1542 /* First C function to be called on Xen boot */ 1543 asmlinkage __visible void __init xen_start_kernel(void) 1544 { 1545 struct physdev_set_iopl set_iopl; 1546 unsigned long initrd_start = 0; 1547 int rc; 1548 1549 if (!xen_start_info) 1550 return; 1551 1552 xen_domain_type = XEN_PV_DOMAIN; 1553 1554 xen_setup_features(); 1555 #ifdef CONFIG_XEN_PVH 1556 xen_pvh_early_guest_init(); 1557 #endif 1558 xen_setup_machphys_mapping(); 1559 1560 /* Install Xen paravirt ops */ 1561 pv_info = xen_info; 1562 pv_init_ops = xen_init_ops; 1563 if (!xen_pvh_domain()) { 1564 pv_cpu_ops = xen_cpu_ops; 1565 1566 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1567 } 1568 1569 if (xen_feature(XENFEAT_auto_translated_physmap)) 1570 x86_init.resources.memory_setup = xen_auto_xlated_memory_setup; 1571 else 1572 x86_init.resources.memory_setup = xen_memory_setup; 1573 x86_init.oem.arch_setup = xen_arch_setup; 1574 x86_init.oem.banner = xen_banner; 1575 1576 xen_init_time_ops(); 1577 1578 /* 1579 * Set up some pagetable state before starting to set any ptes. 1580 */ 1581 1582 xen_init_mmu_ops(); 1583 1584 /* Prevent unwanted bits from being set in PTEs. */ 1585 __supported_pte_mask &= ~_PAGE_GLOBAL; 1586 1587 /* 1588 * Prevent page tables from being allocated in highmem, even 1589 * if CONFIG_HIGHPTE is enabled. 1590 */ 1591 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1592 1593 /* Work out if we support NX */ 1594 x86_configure_nx(); 1595 1596 /* Get mfn list */ 1597 xen_build_dynamic_phys_to_machine(); 1598 1599 /* 1600 * Set up kernel GDT and segment registers, mainly so that 1601 * -fstack-protector code can be executed. 1602 */ 1603 xen_setup_gdt(0); 1604 1605 xen_init_irq_ops(); 1606 xen_init_cpuid_mask(); 1607 1608 #ifdef CONFIG_X86_LOCAL_APIC 1609 /* 1610 * set up the basic apic ops. 1611 */ 1612 xen_init_apic(); 1613 #endif 1614 1615 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1616 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1617 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1618 } 1619 1620 machine_ops = xen_machine_ops; 1621 1622 /* 1623 * The only reliable way to retain the initial address of the 1624 * percpu gdt_page is to remember it here, so we can go and 1625 * mark it RW later, when the initial percpu area is freed. 1626 */ 1627 xen_initial_gdt = &per_cpu(gdt_page, 0); 1628 1629 xen_smp_init(); 1630 1631 #ifdef CONFIG_ACPI_NUMA 1632 /* 1633 * The pages we from Xen are not related to machine pages, so 1634 * any NUMA information the kernel tries to get from ACPI will 1635 * be meaningless. Prevent it from trying. 1636 */ 1637 acpi_numa = -1; 1638 #endif 1639 /* Don't do the full vcpu_info placement stuff until we have a 1640 possible map and a non-dummy shared_info. */ 1641 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; 1642 1643 local_irq_disable(); 1644 early_boot_irqs_disabled = true; 1645 1646 xen_raw_console_write("mapping kernel into physical memory\n"); 1647 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1648 xen_start_info->nr_pages); 1649 xen_reserve_special_pages(); 1650 1651 /* keep using Xen gdt for now; no urgent need to change it */ 1652 1653 #ifdef CONFIG_X86_32 1654 pv_info.kernel_rpl = 1; 1655 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1656 pv_info.kernel_rpl = 0; 1657 #else 1658 pv_info.kernel_rpl = 0; 1659 #endif 1660 /* set the limit of our address space */ 1661 xen_reserve_top(); 1662 1663 /* PVH: runs at default kernel iopl of 0 */ 1664 if (!xen_pvh_domain()) { 1665 /* 1666 * We used to do this in xen_arch_setup, but that is too late 1667 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1668 * early_amd_init which pokes 0xcf8 port. 1669 */ 1670 set_iopl.iopl = 1; 1671 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1672 if (rc != 0) 1673 xen_raw_printk("physdev_op failed %d\n", rc); 1674 } 1675 1676 #ifdef CONFIG_X86_32 1677 /* set up basic CPUID stuff */ 1678 cpu_detect(&new_cpu_data); 1679 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1680 new_cpu_data.wp_works_ok = 1; 1681 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1682 #endif 1683 1684 if (xen_start_info->mod_start) { 1685 if (xen_start_info->flags & SIF_MOD_START_PFN) 1686 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1687 else 1688 initrd_start = __pa(xen_start_info->mod_start); 1689 } 1690 1691 /* Poke various useful things into boot_params */ 1692 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1693 boot_params.hdr.ramdisk_image = initrd_start; 1694 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1695 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1696 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1697 1698 if (!xen_initial_domain()) { 1699 add_preferred_console("xenboot", 0, NULL); 1700 add_preferred_console("tty", 0, NULL); 1701 add_preferred_console("hvc", 0, NULL); 1702 if (pci_xen) 1703 x86_init.pci.arch_init = pci_xen_init; 1704 } else { 1705 const struct dom0_vga_console_info *info = 1706 (void *)((char *)xen_start_info + 1707 xen_start_info->console.dom0.info_off); 1708 struct xen_platform_op op = { 1709 .cmd = XENPF_firmware_info, 1710 .interface_version = XENPF_INTERFACE_VERSION, 1711 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1712 }; 1713 1714 x86_platform.set_legacy_features = 1715 xen_dom0_set_legacy_features; 1716 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1717 xen_start_info->console.domU.mfn = 0; 1718 xen_start_info->console.domU.evtchn = 0; 1719 1720 if (HYPERVISOR_platform_op(&op) == 0) 1721 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1722 1723 /* Make sure ACS will be enabled */ 1724 pci_request_acs(); 1725 1726 xen_acpi_sleep_register(); 1727 1728 /* Avoid searching for BIOS MP tables */ 1729 x86_init.mpparse.find_smp_config = x86_init_noop; 1730 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1731 1732 xen_boot_params_init_edd(); 1733 } 1734 #ifdef CONFIG_PCI 1735 /* PCI BIOS service won't work from a PV guest. */ 1736 pci_probe &= ~PCI_PROBE_BIOS; 1737 #endif 1738 xen_raw_console_write("about to get started...\n"); 1739 1740 /* Let's presume PV guests always boot on vCPU with id 0. */ 1741 per_cpu(xen_vcpu_id, 0) = 0; 1742 1743 xen_setup_runstate_info(0); 1744 1745 xen_efi_init(); 1746 1747 /* Start the world */ 1748 #ifdef CONFIG_X86_32 1749 i386_start_kernel(); 1750 #else 1751 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1752 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1753 #endif 1754 } 1755 1756 void __ref xen_hvm_init_shared_info(void) 1757 { 1758 int cpu; 1759 struct xen_add_to_physmap xatp; 1760 static struct shared_info *shared_info_page = 0; 1761 1762 if (!shared_info_page) 1763 shared_info_page = (struct shared_info *) 1764 extend_brk(PAGE_SIZE, PAGE_SIZE); 1765 xatp.domid = DOMID_SELF; 1766 xatp.idx = 0; 1767 xatp.space = XENMAPSPACE_shared_info; 1768 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; 1769 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) 1770 BUG(); 1771 1772 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; 1773 1774 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info 1775 * page, we use it in the event channel upcall and in some pvclock 1776 * related functions. We don't need the vcpu_info placement 1777 * optimizations because we don't use any pv_mmu or pv_irq op on 1778 * HVM. 1779 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is 1780 * online but xen_hvm_init_shared_info is run at resume time too and 1781 * in that case multiple vcpus might be online. */ 1782 for_each_online_cpu(cpu) { 1783 /* Leave it to be NULL. */ 1784 if (cpu >= MAX_VIRT_CPUS) 1785 continue; 1786 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; 1787 } 1788 } 1789 1790 #ifdef CONFIG_XEN_PVHVM 1791 static void __init init_hvm_pv_info(void) 1792 { 1793 int major, minor; 1794 uint32_t eax, ebx, ecx, edx, pages, msr, base; 1795 u64 pfn; 1796 1797 base = xen_cpuid_base(); 1798 cpuid(base + 1, &eax, &ebx, &ecx, &edx); 1799 1800 major = eax >> 16; 1801 minor = eax & 0xffff; 1802 printk(KERN_INFO "Xen version %d.%d.\n", major, minor); 1803 1804 cpuid(base + 2, &pages, &msr, &ecx, &edx); 1805 1806 pfn = __pa(hypercall_page); 1807 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); 1808 1809 xen_setup_features(); 1810 1811 cpuid(base + 4, &eax, &ebx, &ecx, &edx); 1812 if (eax & XEN_HVM_CPUID_VCPU_ID_PRESENT) 1813 this_cpu_write(xen_vcpu_id, ebx); 1814 else 1815 this_cpu_write(xen_vcpu_id, smp_processor_id()); 1816 1817 pv_info.name = "Xen HVM"; 1818 1819 xen_domain_type = XEN_HVM_DOMAIN; 1820 } 1821 1822 static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action, 1823 void *hcpu) 1824 { 1825 int cpu = (long)hcpu; 1826 switch (action) { 1827 case CPU_UP_PREPARE: 1828 if (cpu_acpi_id(cpu) != U32_MAX) 1829 per_cpu(xen_vcpu_id, cpu) = cpu_acpi_id(cpu); 1830 else 1831 per_cpu(xen_vcpu_id, cpu) = cpu; 1832 xen_vcpu_setup(cpu); 1833 if (xen_have_vector_callback) { 1834 if (xen_feature(XENFEAT_hvm_safe_pvclock)) 1835 xen_setup_timer(cpu); 1836 } 1837 break; 1838 default: 1839 break; 1840 } 1841 return NOTIFY_OK; 1842 } 1843 1844 static struct notifier_block xen_hvm_cpu_notifier = { 1845 .notifier_call = xen_hvm_cpu_notify, 1846 }; 1847 1848 #ifdef CONFIG_KEXEC_CORE 1849 static void xen_hvm_shutdown(void) 1850 { 1851 native_machine_shutdown(); 1852 if (kexec_in_progress) 1853 xen_reboot(SHUTDOWN_soft_reset); 1854 } 1855 1856 static void xen_hvm_crash_shutdown(struct pt_regs *regs) 1857 { 1858 native_machine_crash_shutdown(regs); 1859 xen_reboot(SHUTDOWN_soft_reset); 1860 } 1861 #endif 1862 1863 static void __init xen_hvm_guest_init(void) 1864 { 1865 if (xen_pv_domain()) 1866 return; 1867 1868 init_hvm_pv_info(); 1869 1870 xen_hvm_init_shared_info(); 1871 1872 xen_panic_handler_init(); 1873 1874 if (xen_feature(XENFEAT_hvm_callback_vector)) 1875 xen_have_vector_callback = 1; 1876 xen_hvm_smp_init(); 1877 register_cpu_notifier(&xen_hvm_cpu_notifier); 1878 xen_unplug_emulated_devices(); 1879 x86_init.irqs.intr_init = xen_init_IRQ; 1880 xen_hvm_init_time_ops(); 1881 xen_hvm_init_mmu_ops(); 1882 #ifdef CONFIG_KEXEC_CORE 1883 machine_ops.shutdown = xen_hvm_shutdown; 1884 machine_ops.crash_shutdown = xen_hvm_crash_shutdown; 1885 #endif 1886 } 1887 #endif 1888 1889 static bool xen_nopv = false; 1890 static __init int xen_parse_nopv(char *arg) 1891 { 1892 xen_nopv = true; 1893 return 0; 1894 } 1895 early_param("xen_nopv", xen_parse_nopv); 1896 1897 static uint32_t __init xen_platform(void) 1898 { 1899 if (xen_nopv) 1900 return 0; 1901 1902 return xen_cpuid_base(); 1903 } 1904 1905 bool xen_hvm_need_lapic(void) 1906 { 1907 if (xen_nopv) 1908 return false; 1909 if (xen_pv_domain()) 1910 return false; 1911 if (!xen_hvm_domain()) 1912 return false; 1913 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) 1914 return false; 1915 return true; 1916 } 1917 EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); 1918 1919 static void xen_set_cpu_features(struct cpuinfo_x86 *c) 1920 { 1921 if (xen_pv_domain()) { 1922 clear_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS); 1923 set_cpu_cap(c, X86_FEATURE_XENPV); 1924 } 1925 } 1926 1927 const struct hypervisor_x86 x86_hyper_xen = { 1928 .name = "Xen", 1929 .detect = xen_platform, 1930 #ifdef CONFIG_XEN_PVHVM 1931 .init_platform = xen_hvm_guest_init, 1932 #endif 1933 .x2apic_available = xen_x2apic_para_available, 1934 .set_cpu_features = xen_set_cpu_features, 1935 }; 1936 EXPORT_SYMBOL(x86_hyper_xen); 1937 1938 #ifdef CONFIG_HOTPLUG_CPU 1939 void xen_arch_register_cpu(int num) 1940 { 1941 arch_register_cpu(num); 1942 } 1943 EXPORT_SYMBOL(xen_arch_register_cpu); 1944 1945 void xen_arch_unregister_cpu(int num) 1946 { 1947 arch_unregister_cpu(num); 1948 } 1949 EXPORT_SYMBOL(xen_arch_unregister_cpu); 1950 #endif 1951