xref: /linux/arch/x86/um/asm/barrier.h (revision 8e07e0e3964ca4e23ce7b68e2096fe660a888942)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_UM_BARRIER_H_
3 #define _ASM_UM_BARRIER_H_
4 
5 #include <asm/cpufeatures.h>
6 #include <asm/alternative.h>
7 
8 /*
9  * Force strict CPU ordering.
10  * And yes, this is required on UP too when we're talking
11  * to devices.
12  */
13 #ifdef CONFIG_X86_32
14 
15 #define mb()	alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
16 #define rmb()	alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
17 #define wmb()	alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
18 
19 #else /* CONFIG_X86_32 */
20 
21 #define mb()	asm volatile("mfence" : : : "memory")
22 #define rmb()	asm volatile("lfence" : : : "memory")
23 #define wmb()	asm volatile("sfence" : : : "memory")
24 
25 #endif /* CONFIG_X86_32 */
26 
27 #include <asm-generic/barrier.h>
28 
29 #endif
30