1 /* 2 * Intel CE4100 platform specific setup code 3 * 4 * (C) Copyright 2010 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; version 2 9 * of the License. 10 */ 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/irq.h> 14 #include <linux/module.h> 15 #include <linux/serial_reg.h> 16 #include <linux/serial_8250.h> 17 18 #include <asm/ce4100.h> 19 #include <asm/prom.h> 20 #include <asm/setup.h> 21 #include <asm/i8259.h> 22 #include <asm/io.h> 23 #include <asm/io_apic.h> 24 25 static int ce4100_i8042_detect(void) 26 { 27 return 0; 28 } 29 30 /* 31 * The CE4100 platform has an internal 8051 Microcontroller which is 32 * responsible for signaling to the external Power Management Unit the 33 * intention to reset, reboot or power off the system. This 8051 device has 34 * its command register mapped at I/O port 0xcf9 and the value 0x4 is used 35 * to power off the system. 36 */ 37 static void ce4100_power_off(void) 38 { 39 outb(0x4, 0xcf9); 40 } 41 42 #ifdef CONFIG_SERIAL_8250 43 44 static unsigned int mem_serial_in(struct uart_port *p, int offset) 45 { 46 offset = offset << p->regshift; 47 return readl(p->membase + offset); 48 } 49 50 /* 51 * The UART Tx interrupts are not set under some conditions and therefore serial 52 * transmission hangs. This is a silicon issue and has not been root caused. The 53 * workaround for this silicon issue checks UART_LSR_THRE bit and UART_LSR_TEMT 54 * bit of LSR register in interrupt handler to see whether at least one of these 55 * two bits is set, if so then process the transmit request. If this workaround 56 * is not applied, then the serial transmission may hang. This workaround is for 57 * errata number 9 in Errata - B step. 58 */ 59 60 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset) 61 { 62 unsigned int ret, ier, lsr; 63 64 if (offset == UART_IIR) { 65 offset = offset << p->regshift; 66 ret = readl(p->membase + offset); 67 if (ret & UART_IIR_NO_INT) { 68 /* see if the TX interrupt should have really set */ 69 ier = mem_serial_in(p, UART_IER); 70 /* see if the UART's XMIT interrupt is enabled */ 71 if (ier & UART_IER_THRI) { 72 lsr = mem_serial_in(p, UART_LSR); 73 /* now check to see if the UART should be 74 generating an interrupt (but isn't) */ 75 if (lsr & (UART_LSR_THRE | UART_LSR_TEMT)) 76 ret &= ~UART_IIR_NO_INT; 77 } 78 } 79 } else 80 ret = mem_serial_in(p, offset); 81 return ret; 82 } 83 84 static void ce4100_mem_serial_out(struct uart_port *p, int offset, int value) 85 { 86 offset = offset << p->regshift; 87 writel(value, p->membase + offset); 88 } 89 90 static void ce4100_serial_fixup(int port, struct uart_port *up, 91 unsigned short *capabilites) 92 { 93 #ifdef CONFIG_EARLY_PRINTK 94 /* 95 * Over ride the legacy port configuration that comes from 96 * asm/serial.h. Using the ioport driver then switching to the 97 * PCI memmaped driver hangs the IOAPIC 98 */ 99 if (up->iotype != UPIO_MEM32) { 100 up->uartclk = 14745600; 101 up->mapbase = 0xdffe0200; 102 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE, 103 up->mapbase & PAGE_MASK); 104 up->membase = 105 (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE); 106 up->membase += up->mapbase & ~PAGE_MASK; 107 up->iotype = UPIO_MEM32; 108 up->regshift = 2; 109 } 110 #endif 111 up->iobase = 0; 112 up->serial_in = ce4100_mem_serial_in; 113 up->serial_out = ce4100_mem_serial_out; 114 115 *capabilites |= (1 << 12); 116 } 117 118 static __init void sdv_serial_fixup(void) 119 { 120 serial8250_set_isa_configurator(ce4100_serial_fixup); 121 } 122 123 #else 124 static inline void sdv_serial_fixup(void) {}; 125 #endif 126 127 static void __init sdv_arch_setup(void) 128 { 129 sdv_serial_fixup(); 130 } 131 132 #ifdef CONFIG_X86_IO_APIC 133 static void __cpuinit sdv_pci_init(void) 134 { 135 x86_of_pci_init(); 136 /* We can't set this earlier, because we need to calibrate the timer */ 137 legacy_pic = &null_legacy_pic; 138 } 139 #endif 140 141 /* 142 * CE4100 specific x86_init function overrides and early setup 143 * calls. 144 */ 145 void __init x86_ce4100_early_setup(void) 146 { 147 x86_init.oem.arch_setup = sdv_arch_setup; 148 x86_platform.i8042_detect = ce4100_i8042_detect; 149 x86_init.resources.probe_roms = x86_init_noop; 150 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 151 x86_init.mpparse.find_smp_config = x86_init_noop; 152 x86_init.pci.init = ce4100_pci_init; 153 154 #ifdef CONFIG_X86_IO_APIC 155 x86_init.pci.init_irq = sdv_pci_init; 156 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; 157 #endif 158 159 pm_power_off = ce4100_power_off; 160 } 161