1 /* 2 * Intel CE4100 platform specific setup code 3 * 4 * (C) Copyright 2010 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; version 2 9 * of the License. 10 */ 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/irq.h> 14 #include <linux/reboot.h> 15 #include <linux/serial_reg.h> 16 #include <linux/serial_8250.h> 17 18 #include <asm/ce4100.h> 19 #include <asm/prom.h> 20 #include <asm/setup.h> 21 #include <asm/i8259.h> 22 #include <asm/io.h> 23 #include <asm/io_apic.h> 24 #include <asm/emergency-restart.h> 25 26 /* 27 * The CE4100 platform has an internal 8051 Microcontroller which is 28 * responsible for signaling to the external Power Management Unit the 29 * intention to reset, reboot or power off the system. This 8051 device has 30 * its command register mapped at I/O port 0xcf9 and the value 0x4 is used 31 * to power off the system. 32 */ 33 static void ce4100_power_off(void) 34 { 35 outb(0x4, 0xcf9); 36 } 37 38 #ifdef CONFIG_SERIAL_8250 39 40 static unsigned int mem_serial_in(struct uart_port *p, int offset) 41 { 42 offset = offset << p->regshift; 43 return readl(p->membase + offset); 44 } 45 46 /* 47 * The UART Tx interrupts are not set under some conditions and therefore serial 48 * transmission hangs. This is a silicon issue and has not been root caused. The 49 * workaround for this silicon issue checks UART_LSR_THRE bit and UART_LSR_TEMT 50 * bit of LSR register in interrupt handler to see whether at least one of these 51 * two bits is set, if so then process the transmit request. If this workaround 52 * is not applied, then the serial transmission may hang. This workaround is for 53 * errata number 9 in Errata - B step. 54 */ 55 56 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset) 57 { 58 unsigned int ret, ier, lsr; 59 60 if (offset == UART_IIR) { 61 offset = offset << p->regshift; 62 ret = readl(p->membase + offset); 63 if (ret & UART_IIR_NO_INT) { 64 /* see if the TX interrupt should have really set */ 65 ier = mem_serial_in(p, UART_IER); 66 /* see if the UART's XMIT interrupt is enabled */ 67 if (ier & UART_IER_THRI) { 68 lsr = mem_serial_in(p, UART_LSR); 69 /* now check to see if the UART should be 70 generating an interrupt (but isn't) */ 71 if (lsr & (UART_LSR_THRE | UART_LSR_TEMT)) 72 ret &= ~UART_IIR_NO_INT; 73 } 74 } 75 } else 76 ret = mem_serial_in(p, offset); 77 return ret; 78 } 79 80 static void ce4100_mem_serial_out(struct uart_port *p, int offset, int value) 81 { 82 offset = offset << p->regshift; 83 writel(value, p->membase + offset); 84 } 85 86 static void ce4100_serial_fixup(int port, struct uart_port *up, 87 u32 *capabilites) 88 { 89 #ifdef CONFIG_EARLY_PRINTK 90 /* 91 * Over ride the legacy port configuration that comes from 92 * asm/serial.h. Using the ioport driver then switching to the 93 * PCI memmaped driver hangs the IOAPIC 94 */ 95 if (up->iotype != UPIO_MEM32) { 96 up->uartclk = 14745600; 97 up->mapbase = 0xdffe0200; 98 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE, 99 up->mapbase & PAGE_MASK); 100 up->membase = 101 (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE); 102 up->membase += up->mapbase & ~PAGE_MASK; 103 up->mapbase += port * 0x100; 104 up->membase += port * 0x100; 105 up->iotype = UPIO_MEM32; 106 up->regshift = 2; 107 up->irq = 4; 108 } 109 #endif 110 up->iobase = 0; 111 up->serial_in = ce4100_mem_serial_in; 112 up->serial_out = ce4100_mem_serial_out; 113 114 *capabilites |= (1 << 12); 115 } 116 117 static __init void sdv_serial_fixup(void) 118 { 119 serial8250_set_isa_configurator(ce4100_serial_fixup); 120 } 121 122 #else 123 static inline void sdv_serial_fixup(void) {}; 124 #endif 125 126 static void __init sdv_arch_setup(void) 127 { 128 sdv_serial_fixup(); 129 } 130 131 static void sdv_pci_init(void) 132 { 133 x86_of_pci_init(); 134 } 135 136 /* 137 * CE4100 specific x86_init function overrides and early setup 138 * calls. 139 */ 140 void __init x86_ce4100_early_setup(void) 141 { 142 x86_init.oem.arch_setup = sdv_arch_setup; 143 x86_init.resources.probe_roms = x86_init_noop; 144 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 145 x86_init.mpparse.find_smp_config = x86_init_noop; 146 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; 147 x86_init.pci.init = ce4100_pci_init; 148 x86_init.pci.init_irq = sdv_pci_init; 149 150 /* 151 * By default, the reboot method is ACPI which is supported by the 152 * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue 153 * the bootloader will however issue a system power off instead of 154 * reboot. By using BOOT_KBD we ensure proper system reboot as 155 * expected. 156 */ 157 reboot_type = BOOT_KBD; 158 159 pm_power_off = ce4100_power_off; 160 } 161