xref: /linux/arch/x86/platform/atom/punit_atom_debug.c (revision e58e871becec2d3b04ed91c0c16fe8deac9c9dfa)
1 /*
2  * Intel SOC Punit device state debug driver
3  * Punit controls power management for North Complex devices (Graphics
4  * blocks, Image Signal Processing, video processing, display, DSP etc.)
5  *
6  * Copyright (c) 2015, Intel Corporation.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms and conditions of the GNU General Public License,
10  * version 2, as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  */
18 
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/device.h>
22 #include <linux/debugfs.h>
23 #include <linux/seq_file.h>
24 #include <linux/io.h>
25 #include <asm/cpu_device_id.h>
26 #include <asm/intel-family.h>
27 #include <asm/iosf_mbi.h>
28 
29 /* Subsystem config/status Video processor */
30 #define VED_SS_PM0		0x32
31 /* Subsystem config/status ISP (Image Signal Processor) */
32 #define ISP_SS_PM0		0x39
33 /* Subsystem config/status Input/output controller */
34 #define MIO_SS_PM		0x3B
35 /* Shift bits for getting status for video, isp and i/o */
36 #define SSS_SHIFT		24
37 
38 /* Power gate status reg */
39 #define PWRGT_STATUS		0x61
40 /* Shift bits for getting status for graphics rendering */
41 #define RENDER_POS		0
42 /* Shift bits for getting status for media control */
43 #define MEDIA_POS		2
44 /* Shift bits for getting status for Valley View/Baytrail display */
45 #define VLV_DISPLAY_POS		6
46 
47 /* Subsystem config/status display for Cherry Trail SOC */
48 #define CHT_DSP_SSS		0x36
49 /* Shift bits for getting status for display */
50 #define CHT_DSP_SSS_POS		16
51 
52 struct punit_device {
53 	char *name;
54 	int reg;
55 	int sss_pos;
56 };
57 
58 static const struct punit_device punit_device_tng[] = {
59 	{ "DISPLAY",	CHT_DSP_SSS,	SSS_SHIFT },
60 	{ "VED",	VED_SS_PM0,	SSS_SHIFT },
61 	{ "ISP",	ISP_SS_PM0,	SSS_SHIFT },
62 	{ "MIO",	MIO_SS_PM,	SSS_SHIFT },
63 	{ NULL }
64 };
65 
66 static const struct punit_device punit_device_byt[] = {
67 	{ "GFX RENDER",	PWRGT_STATUS,	RENDER_POS },
68 	{ "GFX MEDIA",	PWRGT_STATUS,	MEDIA_POS },
69 	{ "DISPLAY",	PWRGT_STATUS,	VLV_DISPLAY_POS },
70 	{ "VED",	VED_SS_PM0,	SSS_SHIFT },
71 	{ "ISP",	ISP_SS_PM0,	SSS_SHIFT },
72 	{ "MIO",	MIO_SS_PM,	SSS_SHIFT },
73 	{ NULL }
74 };
75 
76 static const struct punit_device punit_device_cht[] = {
77 	{ "GFX RENDER",	PWRGT_STATUS,	RENDER_POS },
78 	{ "GFX MEDIA",	PWRGT_STATUS,	MEDIA_POS },
79 	{ "DISPLAY",	CHT_DSP_SSS,	CHT_DSP_SSS_POS },
80 	{ "VED",	VED_SS_PM0,	SSS_SHIFT },
81 	{ "ISP",	ISP_SS_PM0,	SSS_SHIFT },
82 	{ "MIO",	MIO_SS_PM,	SSS_SHIFT },
83 	{ NULL }
84 };
85 
86 static const char * const dstates[] = {"D0", "D0i1", "D0i2", "D0i3"};
87 
88 static int punit_dev_state_show(struct seq_file *seq_file, void *unused)
89 {
90 	u32 punit_pwr_status;
91 	struct punit_device *punit_devp = seq_file->private;
92 	int index;
93 	int status;
94 
95 	seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n");
96 	while (punit_devp->name) {
97 		status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
98 				       punit_devp->reg, &punit_pwr_status);
99 		if (status) {
100 			seq_printf(seq_file, "%9s : Read Failed\n",
101 				   punit_devp->name);
102 		} else  {
103 			index = (punit_pwr_status >> punit_devp->sss_pos) & 3;
104 			seq_printf(seq_file, "%9s : %s\n", punit_devp->name,
105 				   dstates[index]);
106 		}
107 		punit_devp++;
108 	}
109 
110 	return 0;
111 }
112 
113 static int punit_dev_state_open(struct inode *inode, struct file *file)
114 {
115 	return single_open(file, punit_dev_state_show, inode->i_private);
116 }
117 
118 static const struct file_operations punit_dev_state_ops = {
119 	.open		= punit_dev_state_open,
120 	.read		= seq_read,
121 	.llseek		= seq_lseek,
122 	.release	= single_release,
123 };
124 
125 static struct dentry *punit_dbg_file;
126 
127 static int punit_dbgfs_register(struct punit_device *punit_device)
128 {
129 	static struct dentry *dev_state;
130 
131 	punit_dbg_file = debugfs_create_dir("punit_atom", NULL);
132 	if (!punit_dbg_file)
133 		return -ENXIO;
134 
135 	dev_state = debugfs_create_file("dev_power_state", S_IFREG | S_IRUGO,
136 					punit_dbg_file, punit_device,
137 					&punit_dev_state_ops);
138 	if (!dev_state) {
139 		pr_err("punit_dev_state register failed\n");
140 		debugfs_remove(punit_dbg_file);
141 		return -ENXIO;
142 	}
143 
144 	return 0;
145 }
146 
147 static void punit_dbgfs_unregister(void)
148 {
149 	debugfs_remove_recursive(punit_dbg_file);
150 }
151 
152 #define ICPU(model, drv_data) \
153 	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT,\
154 	  (kernel_ulong_t)&drv_data }
155 
156 static const struct x86_cpu_id intel_punit_cpu_ids[] = {
157 	ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
158 	ICPU(INTEL_FAM6_ATOM_MERRIFIELD,  punit_device_tng),
159 	ICPU(INTEL_FAM6_ATOM_AIRMONT,	  punit_device_cht),
160 	{}
161 };
162 
163 MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids);
164 
165 static int __init punit_atom_debug_init(void)
166 {
167 	const struct x86_cpu_id *id;
168 	int ret;
169 
170 	id = x86_match_cpu(intel_punit_cpu_ids);
171 	if (!id)
172 		return -ENODEV;
173 
174 	ret = punit_dbgfs_register((struct punit_device *)id->driver_data);
175 	if (ret < 0)
176 		return ret;
177 
178 	return 0;
179 }
180 
181 static void __exit punit_atom_debug_exit(void)
182 {
183 	punit_dbgfs_unregister();
184 }
185 
186 module_init(punit_atom_debug_init);
187 module_exit(punit_atom_debug_exit);
188 
189 MODULE_AUTHOR("Kumar P, Mahesh <mahesh.kumar.p@intel.com>");
190 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
191 MODULE_DESCRIPTION("Driver for Punit devices states debugging");
192 MODULE_LICENSE("GPL v2");
193