1 /* 2 * BIOS32 and PCI BIOS handling. 3 */ 4 5 #include <linux/pci.h> 6 #include <linux/init.h> 7 #include <linux/slab.h> 8 #include <linux/module.h> 9 #include <linux/uaccess.h> 10 11 #include <asm/pci_x86.h> 12 #include <asm/e820/types.h> 13 #include <asm/pci-functions.h> 14 #include <asm/set_memory.h> 15 16 /* BIOS32 signature: "_32_" */ 17 #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) 18 19 /* PCI signature: "PCI " */ 20 #define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24)) 21 22 /* PCI service signature: "$PCI" */ 23 #define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24)) 24 25 /* PCI BIOS hardware mechanism flags */ 26 #define PCIBIOS_HW_TYPE1 0x01 27 #define PCIBIOS_HW_TYPE2 0x02 28 #define PCIBIOS_HW_TYPE1_SPEC 0x10 29 #define PCIBIOS_HW_TYPE2_SPEC 0x20 30 31 int pcibios_enabled; 32 33 /* According to the BIOS specification at: 34 * http://members.datafast.net.au/dft0802/specs/bios21.pdf, we could 35 * restrict the x zone to some pages and make it ro. But this may be 36 * broken on some bios, complex to handle with static_protections. 37 * We could make the 0xe0000-0x100000 range rox, but this can break 38 * some ISA mapping. 39 * 40 * So we let's an rw and x hole when pcibios is used. This shouldn't 41 * happen for modern system with mmconfig, and if you don't want it 42 * you could disable pcibios... 43 */ 44 static inline void set_bios_x(void) 45 { 46 pcibios_enabled = 1; 47 set_memory_x(PAGE_OFFSET + BIOS_BEGIN, (BIOS_END - BIOS_BEGIN) >> PAGE_SHIFT); 48 if (__supported_pte_mask & _PAGE_NX) 49 printk(KERN_INFO "PCI: PCI BIOS area is rw and x. Use pci=nobios if you want it NX.\n"); 50 } 51 52 /* 53 * This is the standard structure used to identify the entry point 54 * to the BIOS32 Service Directory, as documented in 55 * Standard BIOS 32-bit Service Directory Proposal 56 * Revision 0.4 May 24, 1993 57 * Phoenix Technologies Ltd. 58 * Norwood, MA 59 * and the PCI BIOS specification. 60 */ 61 62 union bios32 { 63 struct { 64 unsigned long signature; /* _32_ */ 65 unsigned long entry; /* 32 bit physical address */ 66 unsigned char revision; /* Revision level, 0 */ 67 unsigned char length; /* Length in paragraphs should be 01 */ 68 unsigned char checksum; /* All bytes must add up to zero */ 69 unsigned char reserved[5]; /* Must be zero */ 70 } fields; 71 char chars[16]; 72 }; 73 74 /* 75 * Physical address of the service directory. I don't know if we're 76 * allowed to have more than one of these or not, so just in case 77 * we'll make pcibios_present() take a memory start parameter and store 78 * the array there. 79 */ 80 81 static struct { 82 unsigned long address; 83 unsigned short segment; 84 } bios32_indirect __initdata = { 0, __KERNEL_CS }; 85 86 /* 87 * Returns the entry point for the given service, NULL on error 88 */ 89 90 static unsigned long __init bios32_service(unsigned long service) 91 { 92 unsigned char return_code; /* %al */ 93 unsigned long address; /* %ebx */ 94 unsigned long length; /* %ecx */ 95 unsigned long entry; /* %edx */ 96 unsigned long flags; 97 98 local_irq_save(flags); 99 __asm__("lcall *(%%edi); cld" 100 : "=a" (return_code), 101 "=b" (address), 102 "=c" (length), 103 "=d" (entry) 104 : "0" (service), 105 "1" (0), 106 "D" (&bios32_indirect)); 107 local_irq_restore(flags); 108 109 switch (return_code) { 110 case 0: 111 return address + entry; 112 case 0x80: /* Not present */ 113 printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service); 114 return 0; 115 default: /* Shouldn't happen */ 116 printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n", 117 service, return_code); 118 return 0; 119 } 120 } 121 122 static struct { 123 unsigned long address; 124 unsigned short segment; 125 } pci_indirect __ro_after_init = { 126 .address = 0, 127 .segment = __KERNEL_CS, 128 }; 129 130 static int pci_bios_present __ro_after_init; 131 132 static int __init check_pcibios(void) 133 { 134 u32 signature, eax, ebx, ecx; 135 u8 status, major_ver, minor_ver, hw_mech; 136 unsigned long flags, pcibios_entry; 137 138 if ((pcibios_entry = bios32_service(PCI_SERVICE))) { 139 pci_indirect.address = pcibios_entry + PAGE_OFFSET; 140 141 local_irq_save(flags); 142 __asm__( 143 "lcall *(%%edi); cld\n\t" 144 "jc 1f\n\t" 145 "xor %%ah, %%ah\n" 146 "1:" 147 : "=d" (signature), 148 "=a" (eax), 149 "=b" (ebx), 150 "=c" (ecx) 151 : "1" (PCIBIOS_PCI_BIOS_PRESENT), 152 "D" (&pci_indirect) 153 : "memory"); 154 local_irq_restore(flags); 155 156 status = (eax >> 8) & 0xff; 157 hw_mech = eax & 0xff; 158 major_ver = (ebx >> 8) & 0xff; 159 minor_ver = ebx & 0xff; 160 if (pcibios_last_bus < 0) 161 pcibios_last_bus = ecx & 0xff; 162 DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n", 163 status, hw_mech, major_ver, minor_ver, pcibios_last_bus); 164 if (status || signature != PCI_SIGNATURE) { 165 printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n", 166 status, signature); 167 return 0; 168 } 169 printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n", 170 major_ver, minor_ver, pcibios_entry, pcibios_last_bus); 171 #ifdef CONFIG_PCI_DIRECT 172 if (!(hw_mech & PCIBIOS_HW_TYPE1)) 173 pci_probe &= ~PCI_PROBE_CONF1; 174 if (!(hw_mech & PCIBIOS_HW_TYPE2)) 175 pci_probe &= ~PCI_PROBE_CONF2; 176 #endif 177 return 1; 178 } 179 return 0; 180 } 181 182 static int pci_bios_read(unsigned int seg, unsigned int bus, 183 unsigned int devfn, int reg, int len, u32 *value) 184 { 185 unsigned long result = 0; 186 unsigned long flags; 187 unsigned long bx = (bus << 8) | devfn; 188 u16 number = 0, mask = 0; 189 190 WARN_ON(seg); 191 if (!value || (bus > 255) || (devfn > 255) || (reg > 255)) 192 return -EINVAL; 193 194 raw_spin_lock_irqsave(&pci_config_lock, flags); 195 196 switch (len) { 197 case 1: 198 number = PCIBIOS_READ_CONFIG_BYTE; 199 mask = 0xff; 200 break; 201 case 2: 202 number = PCIBIOS_READ_CONFIG_WORD; 203 mask = 0xffff; 204 break; 205 case 4: 206 number = PCIBIOS_READ_CONFIG_DWORD; 207 break; 208 } 209 210 __asm__("lcall *(%%esi); cld\n\t" 211 "jc 1f\n\t" 212 "xor %%ah, %%ah\n" 213 "1:" 214 : "=c" (*value), 215 "=a" (result) 216 : "1" (number), 217 "b" (bx), 218 "D" ((long)reg), 219 "S" (&pci_indirect)); 220 /* 221 * Zero-extend the result beyond 8 or 16 bits, do not trust the 222 * BIOS having done it: 223 */ 224 if (mask) 225 *value &= mask; 226 227 raw_spin_unlock_irqrestore(&pci_config_lock, flags); 228 229 return (int)((result & 0xff00) >> 8); 230 } 231 232 static int pci_bios_write(unsigned int seg, unsigned int bus, 233 unsigned int devfn, int reg, int len, u32 value) 234 { 235 unsigned long result = 0; 236 unsigned long flags; 237 unsigned long bx = (bus << 8) | devfn; 238 u16 number = 0; 239 240 WARN_ON(seg); 241 if ((bus > 255) || (devfn > 255) || (reg > 255)) 242 return -EINVAL; 243 244 raw_spin_lock_irqsave(&pci_config_lock, flags); 245 246 switch (len) { 247 case 1: 248 number = PCIBIOS_WRITE_CONFIG_BYTE; 249 break; 250 case 2: 251 number = PCIBIOS_WRITE_CONFIG_WORD; 252 break; 253 case 4: 254 number = PCIBIOS_WRITE_CONFIG_DWORD; 255 break; 256 } 257 258 __asm__("lcall *(%%esi); cld\n\t" 259 "jc 1f\n\t" 260 "xor %%ah, %%ah\n" 261 "1:" 262 : "=a" (result) 263 : "0" (number), 264 "c" (value), 265 "b" (bx), 266 "D" ((long)reg), 267 "S" (&pci_indirect)); 268 269 raw_spin_unlock_irqrestore(&pci_config_lock, flags); 270 271 return (int)((result & 0xff00) >> 8); 272 } 273 274 275 /* 276 * Function table for BIOS32 access 277 */ 278 279 static const struct pci_raw_ops pci_bios_access = { 280 .read = pci_bios_read, 281 .write = pci_bios_write 282 }; 283 284 /* 285 * Try to find PCI BIOS. 286 */ 287 288 static const struct pci_raw_ops *__init pci_find_bios(void) 289 { 290 union bios32 *check; 291 unsigned char sum; 292 int i, length; 293 294 /* 295 * Follow the standard procedure for locating the BIOS32 Service 296 * directory by scanning the permissible address range from 297 * 0xe0000 through 0xfffff for a valid BIOS32 structure. 298 */ 299 300 for (check = (union bios32 *) __va(0xe0000); 301 check <= (union bios32 *) __va(0xffff0); 302 ++check) { 303 long sig; 304 if (probe_kernel_address(&check->fields.signature, sig)) 305 continue; 306 307 if (check->fields.signature != BIOS32_SIGNATURE) 308 continue; 309 length = check->fields.length * 16; 310 if (!length) 311 continue; 312 sum = 0; 313 for (i = 0; i < length ; ++i) 314 sum += check->chars[i]; 315 if (sum != 0) 316 continue; 317 if (check->fields.revision != 0) { 318 printk("PCI: unsupported BIOS32 revision %d at 0x%p\n", 319 check->fields.revision, check); 320 continue; 321 } 322 DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check); 323 if (check->fields.entry >= 0x100000) { 324 printk("PCI: BIOS32 entry (0x%p) in high memory, " 325 "cannot use.\n", check); 326 return NULL; 327 } else { 328 unsigned long bios32_entry = check->fields.entry; 329 DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n", 330 bios32_entry); 331 bios32_indirect.address = bios32_entry + PAGE_OFFSET; 332 set_bios_x(); 333 if (check_pcibios()) 334 return &pci_bios_access; 335 } 336 break; /* Hopefully more than one BIOS32 cannot happen... */ 337 } 338 339 return NULL; 340 } 341 342 /* 343 * BIOS Functions for IRQ Routing 344 */ 345 346 struct irq_routing_options { 347 u16 size; 348 struct irq_info *table; 349 u16 segment; 350 } __attribute__((packed)); 351 352 struct irq_routing_table * pcibios_get_irq_routing_table(void) 353 { 354 struct irq_routing_options opt; 355 struct irq_routing_table *rt = NULL; 356 int ret, map; 357 unsigned long page; 358 359 if (!pci_bios_present) 360 return NULL; 361 page = __get_free_page(GFP_KERNEL); 362 if (!page) 363 return NULL; 364 opt.table = (struct irq_info *) page; 365 opt.size = PAGE_SIZE; 366 opt.segment = __KERNEL_DS; 367 368 DBG("PCI: Fetching IRQ routing table... "); 369 __asm__("push %%es\n\t" 370 "push %%ds\n\t" 371 "pop %%es\n\t" 372 "lcall *(%%esi); cld\n\t" 373 "pop %%es\n\t" 374 "jc 1f\n\t" 375 "xor %%ah, %%ah\n" 376 "1:" 377 : "=a" (ret), 378 "=b" (map), 379 "=m" (opt) 380 : "0" (PCIBIOS_GET_ROUTING_OPTIONS), 381 "1" (0), 382 "D" ((long) &opt), 383 "S" (&pci_indirect), 384 "m" (opt) 385 : "memory"); 386 DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map); 387 if (ret & 0xff00) 388 printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff); 389 else if (opt.size) { 390 rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL); 391 if (rt) { 392 memset(rt, 0, sizeof(struct irq_routing_table)); 393 rt->size = opt.size + sizeof(struct irq_routing_table); 394 rt->exclusive_irqs = map; 395 memcpy(rt->slots, (void *) page, opt.size); 396 printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n"); 397 } 398 } 399 free_page(page); 400 return rt; 401 } 402 EXPORT_SYMBOL(pcibios_get_irq_routing_table); 403 404 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq) 405 { 406 int ret; 407 408 __asm__("lcall *(%%esi); cld\n\t" 409 "jc 1f\n\t" 410 "xor %%ah, %%ah\n" 411 "1:" 412 : "=a" (ret) 413 : "0" (PCIBIOS_SET_PCI_HW_INT), 414 "b" ((dev->bus->number << 8) | dev->devfn), 415 "c" ((irq << 8) | (pin + 10)), 416 "S" (&pci_indirect)); 417 return !(ret & 0xff00); 418 } 419 EXPORT_SYMBOL(pcibios_set_irq_routing); 420 421 void __init pci_pcbios_init(void) 422 { 423 if ((pci_probe & PCI_PROBE_BIOS) 424 && ((raw_pci_ops = pci_find_bios()))) { 425 pci_bios_present = 1; 426 } 427 } 428 429