1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Low-Level PCI Access for i386 machines 4 * 5 * Copyright 1993, 1994 Drew Eckhardt 6 * Visionary Computing 7 * (Unix and Linux consulting and custom programming) 8 * Drew@Colorado.EDU 9 * +1 (303) 786-7975 10 * 11 * Drew's work was sponsored by: 12 * iX Multiuser Multitasking Magazine 13 * Hannover, Germany 14 * hm@ix.de 15 * 16 * Copyright 1997--2000 Martin Mares <mj@ucw.cz> 17 * 18 * For more information, please consult the following manuals (look at 19 * http://www.pcisig.com/ for how to get them): 20 * 21 * PCI BIOS Specification 22 * PCI Local Bus Specification 23 * PCI to PCI Bridge Specification 24 * PCI System Design Guide 25 * 26 */ 27 28 #include <linux/types.h> 29 #include <linux/kernel.h> 30 #include <linux/export.h> 31 #include <linux/pci.h> 32 #include <linux/init.h> 33 #include <linux/ioport.h> 34 #include <linux/errno.h> 35 #include <linux/memblock.h> 36 37 #include <asm/memtype.h> 38 #include <asm/e820/api.h> 39 #include <asm/pci_x86.h> 40 #include <asm/io_apic.h> 41 42 43 /* 44 * This list of dynamic mappings is for temporarily maintaining 45 * original BIOS BAR addresses for possible reinstatement. 46 */ 47 struct pcibios_fwaddrmap { 48 struct list_head list; 49 struct pci_dev *dev; 50 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE]; 51 }; 52 53 static LIST_HEAD(pcibios_fwaddrmappings); 54 static DEFINE_SPINLOCK(pcibios_fwaddrmap_lock); 55 static bool pcibios_fw_addr_done; 56 57 /* Must be called with 'pcibios_fwaddrmap_lock' lock held. */ 58 static struct pcibios_fwaddrmap *pcibios_fwaddrmap_lookup(struct pci_dev *dev) 59 { 60 struct pcibios_fwaddrmap *map; 61 62 lockdep_assert_held(&pcibios_fwaddrmap_lock); 63 64 list_for_each_entry(map, &pcibios_fwaddrmappings, list) 65 if (map->dev == dev) 66 return map; 67 68 return NULL; 69 } 70 71 static void 72 pcibios_save_fw_addr(struct pci_dev *dev, int idx, resource_size_t fw_addr) 73 { 74 unsigned long flags; 75 struct pcibios_fwaddrmap *map; 76 77 if (pcibios_fw_addr_done) 78 return; 79 80 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags); 81 map = pcibios_fwaddrmap_lookup(dev); 82 if (!map) { 83 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags); 84 map = kzalloc_obj(*map); 85 if (!map) 86 return; 87 88 map->dev = pci_dev_get(dev); 89 map->fw_addr[idx] = fw_addr; 90 INIT_LIST_HEAD(&map->list); 91 92 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags); 93 list_add_tail(&map->list, &pcibios_fwaddrmappings); 94 } else 95 map->fw_addr[idx] = fw_addr; 96 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags); 97 } 98 99 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx) 100 { 101 unsigned long flags; 102 struct pcibios_fwaddrmap *map; 103 resource_size_t fw_addr = 0; 104 105 if (pcibios_fw_addr_done) 106 return 0; 107 108 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags); 109 map = pcibios_fwaddrmap_lookup(dev); 110 if (map) 111 fw_addr = map->fw_addr[idx]; 112 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags); 113 114 return fw_addr; 115 } 116 117 static void __init pcibios_fw_addr_list_del(void) 118 { 119 unsigned long flags; 120 struct pcibios_fwaddrmap *entry, *next; 121 122 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags); 123 list_for_each_entry_safe(entry, next, &pcibios_fwaddrmappings, list) { 124 list_del(&entry->list); 125 pci_dev_put(entry->dev); 126 kfree(entry); 127 } 128 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags); 129 pcibios_fw_addr_done = true; 130 } 131 132 static int 133 skip_isa_ioresource_align(struct pci_dev *dev) { 134 135 if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) && 136 !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA)) 137 return 1; 138 return 0; 139 } 140 141 /* 142 * We need to avoid collisions with `mirrored' VGA ports 143 * and other strange ISA hardware, so we always want the 144 * addresses to be allocated in the 0x000-0x0ff region 145 * modulo 0x400. 146 * 147 * Why? Because some silly external IO cards only decode 148 * the low 10 bits of the IO address. The 0x00-0xff region 149 * is reserved for motherboard devices that decode all 16 150 * bits, so it's ok to allocate at, say, 0x2800-0x28ff, 151 * but we want to try to avoid allocating at 0x2900-0x2bff 152 * which might have be mirrored at 0x0100-0x03ff.. 153 */ 154 resource_size_t 155 pcibios_align_resource(void *data, const struct resource *res, 156 const struct resource *empty_res, 157 resource_size_t size, resource_size_t align) 158 { 159 struct pci_dev *dev = data; 160 resource_size_t start = res->start; 161 162 if (res->flags & IORESOURCE_IO) { 163 if (skip_isa_ioresource_align(dev)) 164 return start; 165 if (start & 0x300) 166 start = (start + 0x3ff) & ~0x3ff; 167 } else if (res->flags & IORESOURCE_MEM) { 168 start = pci_align_resource(dev, res, empty_res, size, align); 169 170 /* The low 1MB range is reserved for ISA cards */ 171 if (start < BIOS_END) 172 start = BIOS_END; 173 } 174 return start; 175 } 176 EXPORT_SYMBOL(pcibios_align_resource); 177 178 /* 179 * Handle resources of PCI devices. If the world were perfect, we could 180 * just allocate all the resource regions and do nothing more. It isn't. 181 * On the other hand, we cannot just re-allocate all devices, as it would 182 * require us to know lots of host bridge internals. So we attempt to 183 * keep as much of the original configuration as possible, but tweak it 184 * when it's found to be wrong. 185 * 186 * Known BIOS problems we have to work around: 187 * - I/O or memory regions not configured 188 * - regions configured, but not enabled in the command register 189 * - bogus I/O addresses above 64K used 190 * - expansion ROMs left enabled (this may sound harmless, but given 191 * the fact the PCI specs explicitly allow address decoders to be 192 * shared between expansion ROMs and other resource regions, it's 193 * at least dangerous) 194 * - bad resource sizes or overlaps with other regions 195 * 196 * Our solution: 197 * (1) Allocate resources for all buses behind PCI-to-PCI bridges. 198 * This gives us fixed barriers on where we can allocate. 199 * (2) Allocate resources for all enabled devices. If there is 200 * a collision, just mark the resource as unallocated. Also 201 * disable expansion ROMs during this step. 202 * (3) Try to allocate resources for disabled devices. If the 203 * resources were assigned correctly, everything goes well, 204 * if they weren't, they won't disturb allocation of other 205 * resources. 206 * (4) Assign new addresses to resources which were either 207 * not configured at all or misconfigured. If explicitly 208 * requested by the user, configure expansion ROM address 209 * as well. 210 */ 211 212 static void pcibios_allocate_bridge_resources(struct pci_dev *dev) 213 { 214 int idx; 215 struct resource *r; 216 217 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { 218 r = &dev->resource[idx]; 219 if (!r->flags) 220 continue; 221 if (r->parent) /* Already allocated */ 222 continue; 223 if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) { 224 /* 225 * Something is wrong with the region. 226 * Invalidate the resource to prevent 227 * child resource allocations in this 228 * range. 229 */ 230 r->start = r->end = 0; 231 r->flags = 0; 232 } 233 } 234 } 235 236 static void pcibios_allocate_bus_resources(struct pci_bus *bus) 237 { 238 struct pci_bus *child; 239 240 /* Depth-First Search on bus tree */ 241 if (bus->self) 242 pcibios_allocate_bridge_resources(bus->self); 243 list_for_each_entry(child, &bus->children, node) 244 pcibios_allocate_bus_resources(child); 245 } 246 247 struct pci_check_idx_range { 248 int start; 249 int end; 250 }; 251 252 static void pcibios_allocate_dev_resources(struct pci_dev *dev, int pass) 253 { 254 int idx, disabled, i; 255 u16 command; 256 struct resource *r; 257 258 struct pci_check_idx_range idx_range[] = { 259 { PCI_STD_RESOURCES, PCI_STD_RESOURCE_END }, 260 #ifdef CONFIG_PCI_IOV 261 { PCI_IOV_RESOURCES, PCI_IOV_RESOURCE_END }, 262 #endif 263 }; 264 265 pci_read_config_word(dev, PCI_COMMAND, &command); 266 for (i = 0; i < ARRAY_SIZE(idx_range); i++) 267 for (idx = idx_range[i].start; idx <= idx_range[i].end; idx++) { 268 r = &dev->resource[idx]; 269 if (r->parent) /* Already allocated */ 270 continue; 271 if (!r->start) /* Address not assigned at all */ 272 continue; 273 if (r->flags & IORESOURCE_IO) 274 disabled = !(command & PCI_COMMAND_IO); 275 else 276 disabled = !(command & PCI_COMMAND_MEMORY); 277 if (pass == disabled) { 278 dev_dbg(&dev->dev, 279 "BAR %d: reserving %pr (d=%d, p=%d)\n", 280 idx, r, disabled, pass); 281 if (pci_claim_resource(dev, idx) < 0) { 282 if (r->flags & IORESOURCE_PCI_FIXED) { 283 dev_info(&dev->dev, "BAR %d %pR is immovable\n", 284 idx, r); 285 } else { 286 /* We'll assign a new address later */ 287 pcibios_save_fw_addr(dev, 288 idx, r->start); 289 r->end -= r->start; 290 r->start = 0; 291 } 292 } 293 } 294 } 295 if (!pass) { 296 r = &dev->resource[PCI_ROM_RESOURCE]; 297 if (r->flags & IORESOURCE_ROM_ENABLE) { 298 /* Turn the ROM off, leave the resource region, 299 * but keep it unregistered. */ 300 u32 reg; 301 dev_dbg(&dev->dev, "disabling ROM %pR\n", r); 302 r->flags &= ~IORESOURCE_ROM_ENABLE; 303 pci_read_config_dword(dev, dev->rom_base_reg, ®); 304 pci_write_config_dword(dev, dev->rom_base_reg, 305 reg & ~PCI_ROM_ADDRESS_ENABLE); 306 } 307 } 308 } 309 310 static void pcibios_allocate_resources(struct pci_bus *bus, int pass) 311 { 312 struct pci_dev *dev; 313 struct pci_bus *child; 314 315 list_for_each_entry(dev, &bus->devices, bus_list) { 316 pcibios_allocate_dev_resources(dev, pass); 317 318 child = dev->subordinate; 319 if (child) 320 pcibios_allocate_resources(child, pass); 321 } 322 } 323 324 static void pcibios_allocate_dev_rom_resource(struct pci_dev *dev) 325 { 326 struct resource *r; 327 328 /* 329 * Try to use BIOS settings for ROMs, otherwise let 330 * pci_assign_unassigned_resources() allocate the new 331 * addresses. 332 */ 333 r = &dev->resource[PCI_ROM_RESOURCE]; 334 if (!r->flags || !r->start) 335 return; 336 if (r->parent) /* Already allocated */ 337 return; 338 339 if (pci_claim_resource(dev, PCI_ROM_RESOURCE) < 0) { 340 r->end -= r->start; 341 r->start = 0; 342 } 343 } 344 static void pcibios_allocate_rom_resources(struct pci_bus *bus) 345 { 346 struct pci_dev *dev; 347 struct pci_bus *child; 348 349 list_for_each_entry(dev, &bus->devices, bus_list) { 350 pcibios_allocate_dev_rom_resource(dev); 351 352 child = dev->subordinate; 353 if (child) 354 pcibios_allocate_rom_resources(child); 355 } 356 } 357 358 static int __init pcibios_assign_resources(void) 359 { 360 struct pci_bus *bus; 361 362 if (!(pci_probe & PCI_ASSIGN_ROMS)) 363 list_for_each_entry(bus, &pci_root_buses, node) 364 pcibios_allocate_rom_resources(bus); 365 366 pci_assign_unassigned_resources(); 367 pcibios_fw_addr_list_del(); 368 369 return 0; 370 } 371 372 /* 373 * This is an fs_initcall (one below subsys_initcall) in order to reserve 374 * resources properly. 375 */ 376 fs_initcall(pcibios_assign_resources); 377 378 void pcibios_resource_survey_bus(struct pci_bus *bus) 379 { 380 dev_printk(KERN_DEBUG, &bus->dev, "Allocating resources\n"); 381 382 pcibios_allocate_bus_resources(bus); 383 384 pcibios_allocate_resources(bus, 0); 385 pcibios_allocate_resources(bus, 1); 386 387 if (!(pci_probe & PCI_ASSIGN_ROMS)) 388 pcibios_allocate_rom_resources(bus); 389 } 390 391 void __init pcibios_resource_survey(void) 392 { 393 struct pci_bus *bus; 394 395 DBG("PCI: Allocating resources\n"); 396 397 list_for_each_entry(bus, &pci_root_buses, node) 398 pcibios_allocate_bus_resources(bus); 399 400 list_for_each_entry(bus, &pci_root_buses, node) 401 pcibios_allocate_resources(bus, 0); 402 list_for_each_entry(bus, &pci_root_buses, node) 403 pcibios_allocate_resources(bus, 1); 404 405 e820__reserve_resources_late(); 406 /* 407 * Insert the IO APIC resources after PCI initialization has 408 * occurred to handle IO APICS that are mapped in on a BAR in 409 * PCI space, but before trying to assign unassigned pci res. 410 */ 411 ioapic_insert_resources(); 412 } 413