xref: /linux/arch/x86/mm/init_64.c (revision e21f9e2e862e9eb3dd64eaddb6256b3e5098660f)
1 /*
2  *  linux/arch/x86_64/mm/init.c
3  *
4  *  Copyright (C) 1995  Linus Torvalds
5  *  Copyright (C) 2000  Pavel Machek <pavel@ucw.cz>
6  *  Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7  */
8 
9 #include <linux/signal.h>
10 #include <linux/sched.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/string.h>
14 #include <linux/types.h>
15 #include <linux/ptrace.h>
16 #include <linux/mman.h>
17 #include <linux/mm.h>
18 #include <linux/swap.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/initrd.h>
22 #include <linux/pagemap.h>
23 #include <linux/bootmem.h>
24 #include <linux/memblock.h>
25 #include <linux/proc_fs.h>
26 #include <linux/pci.h>
27 #include <linux/pfn.h>
28 #include <linux/poison.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/memory.h>
31 #include <linux/memory_hotplug.h>
32 #include <linux/memremap.h>
33 #include <linux/nmi.h>
34 #include <linux/gfp.h>
35 #include <linux/kcore.h>
36 
37 #include <asm/processor.h>
38 #include <asm/bios_ebda.h>
39 #include <linux/uaccess.h>
40 #include <asm/pgtable.h>
41 #include <asm/pgalloc.h>
42 #include <asm/dma.h>
43 #include <asm/fixmap.h>
44 #include <asm/e820/api.h>
45 #include <asm/apic.h>
46 #include <asm/tlb.h>
47 #include <asm/mmu_context.h>
48 #include <asm/proto.h>
49 #include <asm/smp.h>
50 #include <asm/sections.h>
51 #include <asm/kdebug.h>
52 #include <asm/numa.h>
53 #include <asm/set_memory.h>
54 #include <asm/init.h>
55 #include <asm/uv/uv.h>
56 #include <asm/setup.h>
57 
58 #include "mm_internal.h"
59 
60 #include "ident_map.c"
61 
62 /*
63  * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
64  * physical space so we can cache the place of the first one and move
65  * around without checking the pgd every time.
66  */
67 
68 /* Bits supported by the hardware: */
69 pteval_t __supported_pte_mask __read_mostly = ~0;
70 /* Bits allowed in normal kernel mappings: */
71 pteval_t __default_kernel_pte_mask __read_mostly = ~0;
72 EXPORT_SYMBOL_GPL(__supported_pte_mask);
73 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */
74 EXPORT_SYMBOL(__default_kernel_pte_mask);
75 
76 int force_personality32;
77 
78 /*
79  * noexec32=on|off
80  * Control non executable heap for 32bit processes.
81  * To control the stack too use noexec=off
82  *
83  * on	PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
84  * off	PROT_READ implies PROT_EXEC
85  */
86 static int __init nonx32_setup(char *str)
87 {
88 	if (!strcmp(str, "on"))
89 		force_personality32 &= ~READ_IMPLIES_EXEC;
90 	else if (!strcmp(str, "off"))
91 		force_personality32 |= READ_IMPLIES_EXEC;
92 	return 1;
93 }
94 __setup("noexec32=", nonx32_setup);
95 
96 static void sync_global_pgds_l5(unsigned long start, unsigned long end)
97 {
98 	unsigned long addr;
99 
100 	for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
101 		const pgd_t *pgd_ref = pgd_offset_k(addr);
102 		struct page *page;
103 
104 		/* Check for overflow */
105 		if (addr < start)
106 			break;
107 
108 		if (pgd_none(*pgd_ref))
109 			continue;
110 
111 		spin_lock(&pgd_lock);
112 		list_for_each_entry(page, &pgd_list, lru) {
113 			pgd_t *pgd;
114 			spinlock_t *pgt_lock;
115 
116 			pgd = (pgd_t *)page_address(page) + pgd_index(addr);
117 			/* the pgt_lock only for Xen */
118 			pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
119 			spin_lock(pgt_lock);
120 
121 			if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
122 				BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
123 
124 			if (pgd_none(*pgd))
125 				set_pgd(pgd, *pgd_ref);
126 
127 			spin_unlock(pgt_lock);
128 		}
129 		spin_unlock(&pgd_lock);
130 	}
131 }
132 
133 static void sync_global_pgds_l4(unsigned long start, unsigned long end)
134 {
135 	unsigned long addr;
136 
137 	for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
138 		pgd_t *pgd_ref = pgd_offset_k(addr);
139 		const p4d_t *p4d_ref;
140 		struct page *page;
141 
142 		/*
143 		 * With folded p4d, pgd_none() is always false, we need to
144 		 * handle synchonization on p4d level.
145 		 */
146 		MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref));
147 		p4d_ref = p4d_offset(pgd_ref, addr);
148 
149 		if (p4d_none(*p4d_ref))
150 			continue;
151 
152 		spin_lock(&pgd_lock);
153 		list_for_each_entry(page, &pgd_list, lru) {
154 			pgd_t *pgd;
155 			p4d_t *p4d;
156 			spinlock_t *pgt_lock;
157 
158 			pgd = (pgd_t *)page_address(page) + pgd_index(addr);
159 			p4d = p4d_offset(pgd, addr);
160 			/* the pgt_lock only for Xen */
161 			pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
162 			spin_lock(pgt_lock);
163 
164 			if (!p4d_none(*p4d_ref) && !p4d_none(*p4d))
165 				BUG_ON(p4d_page_vaddr(*p4d)
166 				       != p4d_page_vaddr(*p4d_ref));
167 
168 			if (p4d_none(*p4d))
169 				set_p4d(p4d, *p4d_ref);
170 
171 			spin_unlock(pgt_lock);
172 		}
173 		spin_unlock(&pgd_lock);
174 	}
175 }
176 
177 /*
178  * When memory was added make sure all the processes MM have
179  * suitable PGD entries in the local PGD level page.
180  */
181 void sync_global_pgds(unsigned long start, unsigned long end)
182 {
183 	if (pgtable_l5_enabled)
184 		sync_global_pgds_l5(start, end);
185 	else
186 		sync_global_pgds_l4(start, end);
187 }
188 
189 /*
190  * NOTE: This function is marked __ref because it calls __init function
191  * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
192  */
193 static __ref void *spp_getpage(void)
194 {
195 	void *ptr;
196 
197 	if (after_bootmem)
198 		ptr = (void *) get_zeroed_page(GFP_ATOMIC);
199 	else
200 		ptr = alloc_bootmem_pages(PAGE_SIZE);
201 
202 	if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
203 		panic("set_pte_phys: cannot allocate page data %s\n",
204 			after_bootmem ? "after bootmem" : "");
205 	}
206 
207 	pr_debug("spp_getpage %p\n", ptr);
208 
209 	return ptr;
210 }
211 
212 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr)
213 {
214 	if (pgd_none(*pgd)) {
215 		p4d_t *p4d = (p4d_t *)spp_getpage();
216 		pgd_populate(&init_mm, pgd, p4d);
217 		if (p4d != p4d_offset(pgd, 0))
218 			printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
219 			       p4d, p4d_offset(pgd, 0));
220 	}
221 	return p4d_offset(pgd, vaddr);
222 }
223 
224 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr)
225 {
226 	if (p4d_none(*p4d)) {
227 		pud_t *pud = (pud_t *)spp_getpage();
228 		p4d_populate(&init_mm, p4d, pud);
229 		if (pud != pud_offset(p4d, 0))
230 			printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
231 			       pud, pud_offset(p4d, 0));
232 	}
233 	return pud_offset(p4d, vaddr);
234 }
235 
236 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
237 {
238 	if (pud_none(*pud)) {
239 		pmd_t *pmd = (pmd_t *) spp_getpage();
240 		pud_populate(&init_mm, pud, pmd);
241 		if (pmd != pmd_offset(pud, 0))
242 			printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n",
243 			       pmd, pmd_offset(pud, 0));
244 	}
245 	return pmd_offset(pud, vaddr);
246 }
247 
248 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
249 {
250 	if (pmd_none(*pmd)) {
251 		pte_t *pte = (pte_t *) spp_getpage();
252 		pmd_populate_kernel(&init_mm, pmd, pte);
253 		if (pte != pte_offset_kernel(pmd, 0))
254 			printk(KERN_ERR "PAGETABLE BUG #03!\n");
255 	}
256 	return pte_offset_kernel(pmd, vaddr);
257 }
258 
259 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte)
260 {
261 	pmd_t *pmd = fill_pmd(pud, vaddr);
262 	pte_t *pte = fill_pte(pmd, vaddr);
263 
264 	set_pte(pte, new_pte);
265 
266 	/*
267 	 * It's enough to flush this one mapping.
268 	 * (PGE mappings get flushed as well)
269 	 */
270 	__flush_tlb_one_kernel(vaddr);
271 }
272 
273 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte)
274 {
275 	p4d_t *p4d = p4d_page + p4d_index(vaddr);
276 	pud_t *pud = fill_pud(p4d, vaddr);
277 
278 	__set_pte_vaddr(pud, vaddr, new_pte);
279 }
280 
281 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
282 {
283 	pud_t *pud = pud_page + pud_index(vaddr);
284 
285 	__set_pte_vaddr(pud, vaddr, new_pte);
286 }
287 
288 void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
289 {
290 	pgd_t *pgd;
291 	p4d_t *p4d_page;
292 
293 	pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
294 
295 	pgd = pgd_offset_k(vaddr);
296 	if (pgd_none(*pgd)) {
297 		printk(KERN_ERR
298 			"PGD FIXMAP MISSING, it should be setup in head.S!\n");
299 		return;
300 	}
301 
302 	p4d_page = p4d_offset(pgd, 0);
303 	set_pte_vaddr_p4d(p4d_page, vaddr, pteval);
304 }
305 
306 pmd_t * __init populate_extra_pmd(unsigned long vaddr)
307 {
308 	pgd_t *pgd;
309 	p4d_t *p4d;
310 	pud_t *pud;
311 
312 	pgd = pgd_offset_k(vaddr);
313 	p4d = fill_p4d(pgd, vaddr);
314 	pud = fill_pud(p4d, vaddr);
315 	return fill_pmd(pud, vaddr);
316 }
317 
318 pte_t * __init populate_extra_pte(unsigned long vaddr)
319 {
320 	pmd_t *pmd;
321 
322 	pmd = populate_extra_pmd(vaddr);
323 	return fill_pte(pmd, vaddr);
324 }
325 
326 /*
327  * Create large page table mappings for a range of physical addresses.
328  */
329 static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
330 					enum page_cache_mode cache)
331 {
332 	pgd_t *pgd;
333 	p4d_t *p4d;
334 	pud_t *pud;
335 	pmd_t *pmd;
336 	pgprot_t prot;
337 
338 	pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
339 		pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
340 	BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
341 	for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
342 		pgd = pgd_offset_k((unsigned long)__va(phys));
343 		if (pgd_none(*pgd)) {
344 			p4d = (p4d_t *) spp_getpage();
345 			set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE |
346 						_PAGE_USER));
347 		}
348 		p4d = p4d_offset(pgd, (unsigned long)__va(phys));
349 		if (p4d_none(*p4d)) {
350 			pud = (pud_t *) spp_getpage();
351 			set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE |
352 						_PAGE_USER));
353 		}
354 		pud = pud_offset(p4d, (unsigned long)__va(phys));
355 		if (pud_none(*pud)) {
356 			pmd = (pmd_t *) spp_getpage();
357 			set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
358 						_PAGE_USER));
359 		}
360 		pmd = pmd_offset(pud, phys);
361 		BUG_ON(!pmd_none(*pmd));
362 		set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
363 	}
364 }
365 
366 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
367 {
368 	__init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
369 }
370 
371 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
372 {
373 	__init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
374 }
375 
376 /*
377  * The head.S code sets up the kernel high mapping:
378  *
379  *   from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
380  *
381  * phys_base holds the negative offset to the kernel, which is added
382  * to the compile time generated pmds. This results in invalid pmds up
383  * to the point where we hit the physaddr 0 mapping.
384  *
385  * We limit the mappings to the region from _text to _brk_end.  _brk_end
386  * is rounded up to the 2MB boundary. This catches the invalid pmds as
387  * well, as they are located before _text:
388  */
389 void __init cleanup_highmap(void)
390 {
391 	unsigned long vaddr = __START_KERNEL_map;
392 	unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
393 	unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
394 	pmd_t *pmd = level2_kernel_pgt;
395 
396 	/*
397 	 * Native path, max_pfn_mapped is not set yet.
398 	 * Xen has valid max_pfn_mapped set in
399 	 *	arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
400 	 */
401 	if (max_pfn_mapped)
402 		vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
403 
404 	for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
405 		if (pmd_none(*pmd))
406 			continue;
407 		if (vaddr < (unsigned long) _text || vaddr > end)
408 			set_pmd(pmd, __pmd(0));
409 	}
410 }
411 
412 /*
413  * Create PTE level page table mapping for physical addresses.
414  * It returns the last physical address mapped.
415  */
416 static unsigned long __meminit
417 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
418 	      pgprot_t prot)
419 {
420 	unsigned long pages = 0, paddr_next;
421 	unsigned long paddr_last = paddr_end;
422 	pte_t *pte;
423 	int i;
424 
425 	pte = pte_page + pte_index(paddr);
426 	i = pte_index(paddr);
427 
428 	for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
429 		paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
430 		if (paddr >= paddr_end) {
431 			if (!after_bootmem &&
432 			    !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
433 					     E820_TYPE_RAM) &&
434 			    !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
435 					     E820_TYPE_RESERVED_KERN))
436 				set_pte(pte, __pte(0));
437 			continue;
438 		}
439 
440 		/*
441 		 * We will re-use the existing mapping.
442 		 * Xen for example has some special requirements, like mapping
443 		 * pagetable pages as RO. So assume someone who pre-setup
444 		 * these mappings are more intelligent.
445 		 */
446 		if (!pte_none(*pte)) {
447 			if (!after_bootmem)
448 				pages++;
449 			continue;
450 		}
451 
452 		if (0)
453 			pr_info("   pte=%p addr=%lx pte=%016lx\n", pte, paddr,
454 				pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
455 		pages++;
456 		set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
457 		paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
458 	}
459 
460 	update_page_count(PG_LEVEL_4K, pages);
461 
462 	return paddr_last;
463 }
464 
465 /*
466  * Create PMD level page table mapping for physical addresses. The virtual
467  * and physical address have to be aligned at this level.
468  * It returns the last physical address mapped.
469  */
470 static unsigned long __meminit
471 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
472 	      unsigned long page_size_mask, pgprot_t prot)
473 {
474 	unsigned long pages = 0, paddr_next;
475 	unsigned long paddr_last = paddr_end;
476 
477 	int i = pmd_index(paddr);
478 
479 	for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
480 		pmd_t *pmd = pmd_page + pmd_index(paddr);
481 		pte_t *pte;
482 		pgprot_t new_prot = prot;
483 
484 		paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
485 		if (paddr >= paddr_end) {
486 			if (!after_bootmem &&
487 			    !e820__mapped_any(paddr & PMD_MASK, paddr_next,
488 					     E820_TYPE_RAM) &&
489 			    !e820__mapped_any(paddr & PMD_MASK, paddr_next,
490 					     E820_TYPE_RESERVED_KERN))
491 				set_pmd(pmd, __pmd(0));
492 			continue;
493 		}
494 
495 		if (!pmd_none(*pmd)) {
496 			if (!pmd_large(*pmd)) {
497 				spin_lock(&init_mm.page_table_lock);
498 				pte = (pte_t *)pmd_page_vaddr(*pmd);
499 				paddr_last = phys_pte_init(pte, paddr,
500 							   paddr_end, prot);
501 				spin_unlock(&init_mm.page_table_lock);
502 				continue;
503 			}
504 			/*
505 			 * If we are ok with PG_LEVEL_2M mapping, then we will
506 			 * use the existing mapping,
507 			 *
508 			 * Otherwise, we will split the large page mapping but
509 			 * use the same existing protection bits except for
510 			 * large page, so that we don't violate Intel's TLB
511 			 * Application note (317080) which says, while changing
512 			 * the page sizes, new and old translations should
513 			 * not differ with respect to page frame and
514 			 * attributes.
515 			 */
516 			if (page_size_mask & (1 << PG_LEVEL_2M)) {
517 				if (!after_bootmem)
518 					pages++;
519 				paddr_last = paddr_next;
520 				continue;
521 			}
522 			new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
523 		}
524 
525 		if (page_size_mask & (1<<PG_LEVEL_2M)) {
526 			pages++;
527 			spin_lock(&init_mm.page_table_lock);
528 			set_pte((pte_t *)pmd,
529 				pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
530 					__pgprot(pgprot_val(prot) | _PAGE_PSE)));
531 			spin_unlock(&init_mm.page_table_lock);
532 			paddr_last = paddr_next;
533 			continue;
534 		}
535 
536 		pte = alloc_low_page();
537 		paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
538 
539 		spin_lock(&init_mm.page_table_lock);
540 		pmd_populate_kernel(&init_mm, pmd, pte);
541 		spin_unlock(&init_mm.page_table_lock);
542 	}
543 	update_page_count(PG_LEVEL_2M, pages);
544 	return paddr_last;
545 }
546 
547 /*
548  * Create PUD level page table mapping for physical addresses. The virtual
549  * and physical address do not have to be aligned at this level. KASLR can
550  * randomize virtual addresses up to this level.
551  * It returns the last physical address mapped.
552  */
553 static unsigned long __meminit
554 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
555 	      unsigned long page_size_mask)
556 {
557 	unsigned long pages = 0, paddr_next;
558 	unsigned long paddr_last = paddr_end;
559 	unsigned long vaddr = (unsigned long)__va(paddr);
560 	int i = pud_index(vaddr);
561 
562 	for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
563 		pud_t *pud;
564 		pmd_t *pmd;
565 		pgprot_t prot = PAGE_KERNEL;
566 
567 		vaddr = (unsigned long)__va(paddr);
568 		pud = pud_page + pud_index(vaddr);
569 		paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
570 
571 		if (paddr >= paddr_end) {
572 			if (!after_bootmem &&
573 			    !e820__mapped_any(paddr & PUD_MASK, paddr_next,
574 					     E820_TYPE_RAM) &&
575 			    !e820__mapped_any(paddr & PUD_MASK, paddr_next,
576 					     E820_TYPE_RESERVED_KERN))
577 				set_pud(pud, __pud(0));
578 			continue;
579 		}
580 
581 		if (!pud_none(*pud)) {
582 			if (!pud_large(*pud)) {
583 				pmd = pmd_offset(pud, 0);
584 				paddr_last = phys_pmd_init(pmd, paddr,
585 							   paddr_end,
586 							   page_size_mask,
587 							   prot);
588 				__flush_tlb_all();
589 				continue;
590 			}
591 			/*
592 			 * If we are ok with PG_LEVEL_1G mapping, then we will
593 			 * use the existing mapping.
594 			 *
595 			 * Otherwise, we will split the gbpage mapping but use
596 			 * the same existing protection  bits except for large
597 			 * page, so that we don't violate Intel's TLB
598 			 * Application note (317080) which says, while changing
599 			 * the page sizes, new and old translations should
600 			 * not differ with respect to page frame and
601 			 * attributes.
602 			 */
603 			if (page_size_mask & (1 << PG_LEVEL_1G)) {
604 				if (!after_bootmem)
605 					pages++;
606 				paddr_last = paddr_next;
607 				continue;
608 			}
609 			prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
610 		}
611 
612 		if (page_size_mask & (1<<PG_LEVEL_1G)) {
613 			pages++;
614 			spin_lock(&init_mm.page_table_lock);
615 			set_pte((pte_t *)pud,
616 				pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
617 					PAGE_KERNEL_LARGE));
618 			spin_unlock(&init_mm.page_table_lock);
619 			paddr_last = paddr_next;
620 			continue;
621 		}
622 
623 		pmd = alloc_low_page();
624 		paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
625 					   page_size_mask, prot);
626 
627 		spin_lock(&init_mm.page_table_lock);
628 		pud_populate(&init_mm, pud, pmd);
629 		spin_unlock(&init_mm.page_table_lock);
630 	}
631 	__flush_tlb_all();
632 
633 	update_page_count(PG_LEVEL_1G, pages);
634 
635 	return paddr_last;
636 }
637 
638 static unsigned long __meminit
639 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end,
640 	      unsigned long page_size_mask)
641 {
642 	unsigned long paddr_next, paddr_last = paddr_end;
643 	unsigned long vaddr = (unsigned long)__va(paddr);
644 	int i = p4d_index(vaddr);
645 
646 	if (!pgtable_l5_enabled)
647 		return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, page_size_mask);
648 
649 	for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) {
650 		p4d_t *p4d;
651 		pud_t *pud;
652 
653 		vaddr = (unsigned long)__va(paddr);
654 		p4d = p4d_page + p4d_index(vaddr);
655 		paddr_next = (paddr & P4D_MASK) + P4D_SIZE;
656 
657 		if (paddr >= paddr_end) {
658 			if (!after_bootmem &&
659 			    !e820__mapped_any(paddr & P4D_MASK, paddr_next,
660 					     E820_TYPE_RAM) &&
661 			    !e820__mapped_any(paddr & P4D_MASK, paddr_next,
662 					     E820_TYPE_RESERVED_KERN))
663 				set_p4d(p4d, __p4d(0));
664 			continue;
665 		}
666 
667 		if (!p4d_none(*p4d)) {
668 			pud = pud_offset(p4d, 0);
669 			paddr_last = phys_pud_init(pud, paddr,
670 					paddr_end,
671 					page_size_mask);
672 			__flush_tlb_all();
673 			continue;
674 		}
675 
676 		pud = alloc_low_page();
677 		paddr_last = phys_pud_init(pud, paddr, paddr_end,
678 					   page_size_mask);
679 
680 		spin_lock(&init_mm.page_table_lock);
681 		p4d_populate(&init_mm, p4d, pud);
682 		spin_unlock(&init_mm.page_table_lock);
683 	}
684 	__flush_tlb_all();
685 
686 	return paddr_last;
687 }
688 
689 /*
690  * Create page table mapping for the physical memory for specific physical
691  * addresses. The virtual and physical addresses have to be aligned on PMD level
692  * down. It returns the last physical address mapped.
693  */
694 unsigned long __meminit
695 kernel_physical_mapping_init(unsigned long paddr_start,
696 			     unsigned long paddr_end,
697 			     unsigned long page_size_mask)
698 {
699 	bool pgd_changed = false;
700 	unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
701 
702 	paddr_last = paddr_end;
703 	vaddr = (unsigned long)__va(paddr_start);
704 	vaddr_end = (unsigned long)__va(paddr_end);
705 	vaddr_start = vaddr;
706 
707 	for (; vaddr < vaddr_end; vaddr = vaddr_next) {
708 		pgd_t *pgd = pgd_offset_k(vaddr);
709 		p4d_t *p4d;
710 
711 		vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
712 
713 		if (pgd_val(*pgd)) {
714 			p4d = (p4d_t *)pgd_page_vaddr(*pgd);
715 			paddr_last = phys_p4d_init(p4d, __pa(vaddr),
716 						   __pa(vaddr_end),
717 						   page_size_mask);
718 			continue;
719 		}
720 
721 		p4d = alloc_low_page();
722 		paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end),
723 					   page_size_mask);
724 
725 		spin_lock(&init_mm.page_table_lock);
726 		if (pgtable_l5_enabled)
727 			pgd_populate(&init_mm, pgd, p4d);
728 		else
729 			p4d_populate(&init_mm, p4d_offset(pgd, vaddr), (pud_t *) p4d);
730 		spin_unlock(&init_mm.page_table_lock);
731 		pgd_changed = true;
732 	}
733 
734 	if (pgd_changed)
735 		sync_global_pgds(vaddr_start, vaddr_end - 1);
736 
737 	__flush_tlb_all();
738 
739 	return paddr_last;
740 }
741 
742 #ifndef CONFIG_NUMA
743 void __init initmem_init(void)
744 {
745 	memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
746 }
747 #endif
748 
749 void __init paging_init(void)
750 {
751 	sparse_memory_present_with_active_regions(MAX_NUMNODES);
752 	sparse_init();
753 
754 	/*
755 	 * clear the default setting with node 0
756 	 * note: don't use nodes_clear here, that is really clearing when
757 	 *	 numa support is not compiled in, and later node_set_state
758 	 *	 will not set it back.
759 	 */
760 	node_clear_state(0, N_MEMORY);
761 	if (N_MEMORY != N_NORMAL_MEMORY)
762 		node_clear_state(0, N_NORMAL_MEMORY);
763 
764 	zone_sizes_init();
765 }
766 
767 /*
768  * Memory hotplug specific functions
769  */
770 #ifdef CONFIG_MEMORY_HOTPLUG
771 /*
772  * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
773  * updating.
774  */
775 static void update_end_of_memory_vars(u64 start, u64 size)
776 {
777 	unsigned long end_pfn = PFN_UP(start + size);
778 
779 	if (end_pfn > max_pfn) {
780 		max_pfn = end_pfn;
781 		max_low_pfn = end_pfn;
782 		high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
783 	}
784 }
785 
786 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages,
787 		struct vmem_altmap *altmap, bool want_memblock)
788 {
789 	int ret;
790 
791 	ret = __add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
792 	WARN_ON_ONCE(ret);
793 
794 	/* update max_pfn, max_low_pfn and high_memory */
795 	update_end_of_memory_vars(start_pfn << PAGE_SHIFT,
796 				  nr_pages << PAGE_SHIFT);
797 
798 	return ret;
799 }
800 
801 int arch_add_memory(int nid, u64 start, u64 size, struct vmem_altmap *altmap,
802 		bool want_memblock)
803 {
804 	unsigned long start_pfn = start >> PAGE_SHIFT;
805 	unsigned long nr_pages = size >> PAGE_SHIFT;
806 
807 	init_memory_mapping(start, start + size);
808 
809 	return add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
810 }
811 
812 #define PAGE_INUSE 0xFD
813 
814 static void __meminit free_pagetable(struct page *page, int order)
815 {
816 	unsigned long magic;
817 	unsigned int nr_pages = 1 << order;
818 
819 	/* bootmem page has reserved flag */
820 	if (PageReserved(page)) {
821 		__ClearPageReserved(page);
822 
823 		magic = (unsigned long)page->freelist;
824 		if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
825 			while (nr_pages--)
826 				put_page_bootmem(page++);
827 		} else
828 			while (nr_pages--)
829 				free_reserved_page(page++);
830 	} else
831 		free_pages((unsigned long)page_address(page), order);
832 }
833 
834 static void __meminit free_hugepage_table(struct page *page,
835 		struct vmem_altmap *altmap)
836 {
837 	if (altmap)
838 		vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE);
839 	else
840 		free_pagetable(page, get_order(PMD_SIZE));
841 }
842 
843 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
844 {
845 	pte_t *pte;
846 	int i;
847 
848 	for (i = 0; i < PTRS_PER_PTE; i++) {
849 		pte = pte_start + i;
850 		if (!pte_none(*pte))
851 			return;
852 	}
853 
854 	/* free a pte talbe */
855 	free_pagetable(pmd_page(*pmd), 0);
856 	spin_lock(&init_mm.page_table_lock);
857 	pmd_clear(pmd);
858 	spin_unlock(&init_mm.page_table_lock);
859 }
860 
861 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
862 {
863 	pmd_t *pmd;
864 	int i;
865 
866 	for (i = 0; i < PTRS_PER_PMD; i++) {
867 		pmd = pmd_start + i;
868 		if (!pmd_none(*pmd))
869 			return;
870 	}
871 
872 	/* free a pmd talbe */
873 	free_pagetable(pud_page(*pud), 0);
874 	spin_lock(&init_mm.page_table_lock);
875 	pud_clear(pud);
876 	spin_unlock(&init_mm.page_table_lock);
877 }
878 
879 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
880 {
881 	pud_t *pud;
882 	int i;
883 
884 	for (i = 0; i < PTRS_PER_PUD; i++) {
885 		pud = pud_start + i;
886 		if (!pud_none(*pud))
887 			return;
888 	}
889 
890 	/* free a pud talbe */
891 	free_pagetable(p4d_page(*p4d), 0);
892 	spin_lock(&init_mm.page_table_lock);
893 	p4d_clear(p4d);
894 	spin_unlock(&init_mm.page_table_lock);
895 }
896 
897 static void __meminit
898 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
899 		 bool direct)
900 {
901 	unsigned long next, pages = 0;
902 	pte_t *pte;
903 	void *page_addr;
904 	phys_addr_t phys_addr;
905 
906 	pte = pte_start + pte_index(addr);
907 	for (; addr < end; addr = next, pte++) {
908 		next = (addr + PAGE_SIZE) & PAGE_MASK;
909 		if (next > end)
910 			next = end;
911 
912 		if (!pte_present(*pte))
913 			continue;
914 
915 		/*
916 		 * We mapped [0,1G) memory as identity mapping when
917 		 * initializing, in arch/x86/kernel/head_64.S. These
918 		 * pagetables cannot be removed.
919 		 */
920 		phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
921 		if (phys_addr < (phys_addr_t)0x40000000)
922 			return;
923 
924 		if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
925 			/*
926 			 * Do not free direct mapping pages since they were
927 			 * freed when offlining, or simplely not in use.
928 			 */
929 			if (!direct)
930 				free_pagetable(pte_page(*pte), 0);
931 
932 			spin_lock(&init_mm.page_table_lock);
933 			pte_clear(&init_mm, addr, pte);
934 			spin_unlock(&init_mm.page_table_lock);
935 
936 			/* For non-direct mapping, pages means nothing. */
937 			pages++;
938 		} else {
939 			/*
940 			 * If we are here, we are freeing vmemmap pages since
941 			 * direct mapped memory ranges to be freed are aligned.
942 			 *
943 			 * If we are not removing the whole page, it means
944 			 * other page structs in this page are being used and
945 			 * we canot remove them. So fill the unused page_structs
946 			 * with 0xFD, and remove the page when it is wholly
947 			 * filled with 0xFD.
948 			 */
949 			memset((void *)addr, PAGE_INUSE, next - addr);
950 
951 			page_addr = page_address(pte_page(*pte));
952 			if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
953 				free_pagetable(pte_page(*pte), 0);
954 
955 				spin_lock(&init_mm.page_table_lock);
956 				pte_clear(&init_mm, addr, pte);
957 				spin_unlock(&init_mm.page_table_lock);
958 			}
959 		}
960 	}
961 
962 	/* Call free_pte_table() in remove_pmd_table(). */
963 	flush_tlb_all();
964 	if (direct)
965 		update_page_count(PG_LEVEL_4K, -pages);
966 }
967 
968 static void __meminit
969 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
970 		 bool direct, struct vmem_altmap *altmap)
971 {
972 	unsigned long next, pages = 0;
973 	pte_t *pte_base;
974 	pmd_t *pmd;
975 	void *page_addr;
976 
977 	pmd = pmd_start + pmd_index(addr);
978 	for (; addr < end; addr = next, pmd++) {
979 		next = pmd_addr_end(addr, end);
980 
981 		if (!pmd_present(*pmd))
982 			continue;
983 
984 		if (pmd_large(*pmd)) {
985 			if (IS_ALIGNED(addr, PMD_SIZE) &&
986 			    IS_ALIGNED(next, PMD_SIZE)) {
987 				if (!direct)
988 					free_hugepage_table(pmd_page(*pmd),
989 							    altmap);
990 
991 				spin_lock(&init_mm.page_table_lock);
992 				pmd_clear(pmd);
993 				spin_unlock(&init_mm.page_table_lock);
994 				pages++;
995 			} else {
996 				/* If here, we are freeing vmemmap pages. */
997 				memset((void *)addr, PAGE_INUSE, next - addr);
998 
999 				page_addr = page_address(pmd_page(*pmd));
1000 				if (!memchr_inv(page_addr, PAGE_INUSE,
1001 						PMD_SIZE)) {
1002 					free_hugepage_table(pmd_page(*pmd),
1003 							    altmap);
1004 
1005 					spin_lock(&init_mm.page_table_lock);
1006 					pmd_clear(pmd);
1007 					spin_unlock(&init_mm.page_table_lock);
1008 				}
1009 			}
1010 
1011 			continue;
1012 		}
1013 
1014 		pte_base = (pte_t *)pmd_page_vaddr(*pmd);
1015 		remove_pte_table(pte_base, addr, next, direct);
1016 		free_pte_table(pte_base, pmd);
1017 	}
1018 
1019 	/* Call free_pmd_table() in remove_pud_table(). */
1020 	if (direct)
1021 		update_page_count(PG_LEVEL_2M, -pages);
1022 }
1023 
1024 static void __meminit
1025 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
1026 		 struct vmem_altmap *altmap, bool direct)
1027 {
1028 	unsigned long next, pages = 0;
1029 	pmd_t *pmd_base;
1030 	pud_t *pud;
1031 	void *page_addr;
1032 
1033 	pud = pud_start + pud_index(addr);
1034 	for (; addr < end; addr = next, pud++) {
1035 		next = pud_addr_end(addr, end);
1036 
1037 		if (!pud_present(*pud))
1038 			continue;
1039 
1040 		if (pud_large(*pud)) {
1041 			if (IS_ALIGNED(addr, PUD_SIZE) &&
1042 			    IS_ALIGNED(next, PUD_SIZE)) {
1043 				if (!direct)
1044 					free_pagetable(pud_page(*pud),
1045 						       get_order(PUD_SIZE));
1046 
1047 				spin_lock(&init_mm.page_table_lock);
1048 				pud_clear(pud);
1049 				spin_unlock(&init_mm.page_table_lock);
1050 				pages++;
1051 			} else {
1052 				/* If here, we are freeing vmemmap pages. */
1053 				memset((void *)addr, PAGE_INUSE, next - addr);
1054 
1055 				page_addr = page_address(pud_page(*pud));
1056 				if (!memchr_inv(page_addr, PAGE_INUSE,
1057 						PUD_SIZE)) {
1058 					free_pagetable(pud_page(*pud),
1059 						       get_order(PUD_SIZE));
1060 
1061 					spin_lock(&init_mm.page_table_lock);
1062 					pud_clear(pud);
1063 					spin_unlock(&init_mm.page_table_lock);
1064 				}
1065 			}
1066 
1067 			continue;
1068 		}
1069 
1070 		pmd_base = pmd_offset(pud, 0);
1071 		remove_pmd_table(pmd_base, addr, next, direct, altmap);
1072 		free_pmd_table(pmd_base, pud);
1073 	}
1074 
1075 	if (direct)
1076 		update_page_count(PG_LEVEL_1G, -pages);
1077 }
1078 
1079 static void __meminit
1080 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end,
1081 		 struct vmem_altmap *altmap, bool direct)
1082 {
1083 	unsigned long next, pages = 0;
1084 	pud_t *pud_base;
1085 	p4d_t *p4d;
1086 
1087 	p4d = p4d_start + p4d_index(addr);
1088 	for (; addr < end; addr = next, p4d++) {
1089 		next = p4d_addr_end(addr, end);
1090 
1091 		if (!p4d_present(*p4d))
1092 			continue;
1093 
1094 		BUILD_BUG_ON(p4d_large(*p4d));
1095 
1096 		pud_base = pud_offset(p4d, 0);
1097 		remove_pud_table(pud_base, addr, next, altmap, direct);
1098 		/*
1099 		 * For 4-level page tables we do not want to free PUDs, but in the
1100 		 * 5-level case we should free them. This code will have to change
1101 		 * to adapt for boot-time switching between 4 and 5 level page tables.
1102 		 */
1103 		if (pgtable_l5_enabled)
1104 			free_pud_table(pud_base, p4d);
1105 	}
1106 
1107 	if (direct)
1108 		update_page_count(PG_LEVEL_512G, -pages);
1109 }
1110 
1111 /* start and end are both virtual address. */
1112 static void __meminit
1113 remove_pagetable(unsigned long start, unsigned long end, bool direct,
1114 		struct vmem_altmap *altmap)
1115 {
1116 	unsigned long next;
1117 	unsigned long addr;
1118 	pgd_t *pgd;
1119 	p4d_t *p4d;
1120 
1121 	for (addr = start; addr < end; addr = next) {
1122 		next = pgd_addr_end(addr, end);
1123 
1124 		pgd = pgd_offset_k(addr);
1125 		if (!pgd_present(*pgd))
1126 			continue;
1127 
1128 		p4d = p4d_offset(pgd, 0);
1129 		remove_p4d_table(p4d, addr, next, altmap, direct);
1130 	}
1131 
1132 	flush_tlb_all();
1133 }
1134 
1135 void __ref vmemmap_free(unsigned long start, unsigned long end,
1136 		struct vmem_altmap *altmap)
1137 {
1138 	remove_pagetable(start, end, false, altmap);
1139 }
1140 
1141 #ifdef CONFIG_MEMORY_HOTREMOVE
1142 static void __meminit
1143 kernel_physical_mapping_remove(unsigned long start, unsigned long end)
1144 {
1145 	start = (unsigned long)__va(start);
1146 	end = (unsigned long)__va(end);
1147 
1148 	remove_pagetable(start, end, true, NULL);
1149 }
1150 
1151 int __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)
1152 {
1153 	unsigned long start_pfn = start >> PAGE_SHIFT;
1154 	unsigned long nr_pages = size >> PAGE_SHIFT;
1155 	struct page *page = pfn_to_page(start_pfn);
1156 	struct zone *zone;
1157 	int ret;
1158 
1159 	/* With altmap the first mapped page is offset from @start */
1160 	if (altmap)
1161 		page += vmem_altmap_offset(altmap);
1162 	zone = page_zone(page);
1163 	ret = __remove_pages(zone, start_pfn, nr_pages, altmap);
1164 	WARN_ON_ONCE(ret);
1165 	kernel_physical_mapping_remove(start, start + size);
1166 
1167 	return ret;
1168 }
1169 #endif
1170 #endif /* CONFIG_MEMORY_HOTPLUG */
1171 
1172 static struct kcore_list kcore_vsyscall;
1173 
1174 static void __init register_page_bootmem_info(void)
1175 {
1176 #ifdef CONFIG_NUMA
1177 	int i;
1178 
1179 	for_each_online_node(i)
1180 		register_page_bootmem_info_node(NODE_DATA(i));
1181 #endif
1182 }
1183 
1184 void __init mem_init(void)
1185 {
1186 	pci_iommu_alloc();
1187 
1188 	/* clear_bss() already clear the empty_zero_page */
1189 
1190 	/* this will put all memory onto the freelists */
1191 	free_all_bootmem();
1192 	after_bootmem = 1;
1193 	x86_init.hyper.init_after_bootmem();
1194 
1195 	/*
1196 	 * Must be done after boot memory is put on freelist, because here we
1197 	 * might set fields in deferred struct pages that have not yet been
1198 	 * initialized, and free_all_bootmem() initializes all the reserved
1199 	 * deferred pages for us.
1200 	 */
1201 	register_page_bootmem_info();
1202 
1203 	/* Register memory areas for /proc/kcore */
1204 	if (get_gate_vma(&init_mm))
1205 		kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER);
1206 
1207 	mem_init_print_info(NULL);
1208 }
1209 
1210 int kernel_set_to_readonly;
1211 
1212 void set_kernel_text_rw(void)
1213 {
1214 	unsigned long start = PFN_ALIGN(_text);
1215 	unsigned long end = PFN_ALIGN(__stop___ex_table);
1216 
1217 	if (!kernel_set_to_readonly)
1218 		return;
1219 
1220 	pr_debug("Set kernel text: %lx - %lx for read write\n",
1221 		 start, end);
1222 
1223 	/*
1224 	 * Make the kernel identity mapping for text RW. Kernel text
1225 	 * mapping will always be RO. Refer to the comment in
1226 	 * static_protections() in pageattr.c
1227 	 */
1228 	set_memory_rw(start, (end - start) >> PAGE_SHIFT);
1229 }
1230 
1231 void set_kernel_text_ro(void)
1232 {
1233 	unsigned long start = PFN_ALIGN(_text);
1234 	unsigned long end = PFN_ALIGN(__stop___ex_table);
1235 
1236 	if (!kernel_set_to_readonly)
1237 		return;
1238 
1239 	pr_debug("Set kernel text: %lx - %lx for read only\n",
1240 		 start, end);
1241 
1242 	/*
1243 	 * Set the kernel identity mapping for text RO.
1244 	 */
1245 	set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1246 }
1247 
1248 void mark_rodata_ro(void)
1249 {
1250 	unsigned long start = PFN_ALIGN(_text);
1251 	unsigned long rodata_start = PFN_ALIGN(__start_rodata);
1252 	unsigned long end = (unsigned long) &__end_rodata_hpage_align;
1253 	unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
1254 	unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
1255 	unsigned long all_end;
1256 
1257 	printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
1258 	       (end - start) >> 10);
1259 	set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1260 
1261 	kernel_set_to_readonly = 1;
1262 
1263 	/*
1264 	 * The rodata/data/bss/brk section (but not the kernel text!)
1265 	 * should also be not-executable.
1266 	 *
1267 	 * We align all_end to PMD_SIZE because the existing mapping
1268 	 * is a full PMD. If we would align _brk_end to PAGE_SIZE we
1269 	 * split the PMD and the reminder between _brk_end and the end
1270 	 * of the PMD will remain mapped executable.
1271 	 *
1272 	 * Any PMD which was setup after the one which covers _brk_end
1273 	 * has been zapped already via cleanup_highmem().
1274 	 */
1275 	all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
1276 	set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
1277 
1278 #ifdef CONFIG_CPA_DEBUG
1279 	printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
1280 	set_memory_rw(start, (end-start) >> PAGE_SHIFT);
1281 
1282 	printk(KERN_INFO "Testing CPA: again\n");
1283 	set_memory_ro(start, (end-start) >> PAGE_SHIFT);
1284 #endif
1285 
1286 	free_init_pages("unused kernel",
1287 			(unsigned long) __va(__pa_symbol(text_end)),
1288 			(unsigned long) __va(__pa_symbol(rodata_start)));
1289 	free_init_pages("unused kernel",
1290 			(unsigned long) __va(__pa_symbol(rodata_end)),
1291 			(unsigned long) __va(__pa_symbol(_sdata)));
1292 
1293 	debug_checkwx();
1294 
1295 	/*
1296 	 * Do this after all of the manipulation of the
1297 	 * kernel text page tables are complete.
1298 	 */
1299 	pti_clone_kernel_text();
1300 }
1301 
1302 int kern_addr_valid(unsigned long addr)
1303 {
1304 	unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
1305 	pgd_t *pgd;
1306 	p4d_t *p4d;
1307 	pud_t *pud;
1308 	pmd_t *pmd;
1309 	pte_t *pte;
1310 
1311 	if (above != 0 && above != -1UL)
1312 		return 0;
1313 
1314 	pgd = pgd_offset_k(addr);
1315 	if (pgd_none(*pgd))
1316 		return 0;
1317 
1318 	p4d = p4d_offset(pgd, addr);
1319 	if (p4d_none(*p4d))
1320 		return 0;
1321 
1322 	pud = pud_offset(p4d, addr);
1323 	if (pud_none(*pud))
1324 		return 0;
1325 
1326 	if (pud_large(*pud))
1327 		return pfn_valid(pud_pfn(*pud));
1328 
1329 	pmd = pmd_offset(pud, addr);
1330 	if (pmd_none(*pmd))
1331 		return 0;
1332 
1333 	if (pmd_large(*pmd))
1334 		return pfn_valid(pmd_pfn(*pmd));
1335 
1336 	pte = pte_offset_kernel(pmd, addr);
1337 	if (pte_none(*pte))
1338 		return 0;
1339 
1340 	return pfn_valid(pte_pfn(*pte));
1341 }
1342 
1343 /*
1344  * Block size is the minimum amount of memory which can be hotplugged or
1345  * hotremoved. It must be power of two and must be equal or larger than
1346  * MIN_MEMORY_BLOCK_SIZE.
1347  */
1348 #define MAX_BLOCK_SIZE (2UL << 30)
1349 
1350 /* Amount of ram needed to start using large blocks */
1351 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30)
1352 
1353 static unsigned long probe_memory_block_size(void)
1354 {
1355 	unsigned long boot_mem_end = max_pfn << PAGE_SHIFT;
1356 	unsigned long bz;
1357 
1358 	/* If this is UV system, always set 2G block size */
1359 	if (is_uv_system()) {
1360 		bz = MAX_BLOCK_SIZE;
1361 		goto done;
1362 	}
1363 
1364 	/* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */
1365 	if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) {
1366 		bz = MIN_MEMORY_BLOCK_SIZE;
1367 		goto done;
1368 	}
1369 
1370 	/* Find the largest allowed block size that aligns to memory end */
1371 	for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) {
1372 		if (IS_ALIGNED(boot_mem_end, bz))
1373 			break;
1374 	}
1375 done:
1376 	pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
1377 
1378 	return bz;
1379 }
1380 
1381 static unsigned long memory_block_size_probed;
1382 unsigned long memory_block_size_bytes(void)
1383 {
1384 	if (!memory_block_size_probed)
1385 		memory_block_size_probed = probe_memory_block_size();
1386 
1387 	return memory_block_size_probed;
1388 }
1389 
1390 #ifdef CONFIG_SPARSEMEM_VMEMMAP
1391 /*
1392  * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
1393  */
1394 static long __meminitdata addr_start, addr_end;
1395 static void __meminitdata *p_start, *p_end;
1396 static int __meminitdata node_start;
1397 
1398 static int __meminit vmemmap_populate_hugepages(unsigned long start,
1399 		unsigned long end, int node, struct vmem_altmap *altmap)
1400 {
1401 	unsigned long addr;
1402 	unsigned long next;
1403 	pgd_t *pgd;
1404 	p4d_t *p4d;
1405 	pud_t *pud;
1406 	pmd_t *pmd;
1407 
1408 	for (addr = start; addr < end; addr = next) {
1409 		next = pmd_addr_end(addr, end);
1410 
1411 		pgd = vmemmap_pgd_populate(addr, node);
1412 		if (!pgd)
1413 			return -ENOMEM;
1414 
1415 		p4d = vmemmap_p4d_populate(pgd, addr, node);
1416 		if (!p4d)
1417 			return -ENOMEM;
1418 
1419 		pud = vmemmap_pud_populate(p4d, addr, node);
1420 		if (!pud)
1421 			return -ENOMEM;
1422 
1423 		pmd = pmd_offset(pud, addr);
1424 		if (pmd_none(*pmd)) {
1425 			void *p;
1426 
1427 			if (altmap)
1428 				p = altmap_alloc_block_buf(PMD_SIZE, altmap);
1429 			else
1430 				p = vmemmap_alloc_block_buf(PMD_SIZE, node);
1431 			if (p) {
1432 				pte_t entry;
1433 
1434 				entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1435 						PAGE_KERNEL_LARGE);
1436 				set_pmd(pmd, __pmd(pte_val(entry)));
1437 
1438 				/* check to see if we have contiguous blocks */
1439 				if (p_end != p || node_start != node) {
1440 					if (p_start)
1441 						pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1442 						       addr_start, addr_end-1, p_start, p_end-1, node_start);
1443 					addr_start = addr;
1444 					node_start = node;
1445 					p_start = p;
1446 				}
1447 
1448 				addr_end = addr + PMD_SIZE;
1449 				p_end = p + PMD_SIZE;
1450 				continue;
1451 			} else if (altmap)
1452 				return -ENOMEM; /* no fallback */
1453 		} else if (pmd_large(*pmd)) {
1454 			vmemmap_verify((pte_t *)pmd, node, addr, next);
1455 			continue;
1456 		}
1457 		if (vmemmap_populate_basepages(addr, next, node))
1458 			return -ENOMEM;
1459 	}
1460 	return 0;
1461 }
1462 
1463 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1464 		struct vmem_altmap *altmap)
1465 {
1466 	int err;
1467 
1468 	if (boot_cpu_has(X86_FEATURE_PSE))
1469 		err = vmemmap_populate_hugepages(start, end, node, altmap);
1470 	else if (altmap) {
1471 		pr_err_once("%s: no cpu support for altmap allocations\n",
1472 				__func__);
1473 		err = -ENOMEM;
1474 	} else
1475 		err = vmemmap_populate_basepages(start, end, node);
1476 	if (!err)
1477 		sync_global_pgds(start, end - 1);
1478 	return err;
1479 }
1480 
1481 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
1482 void register_page_bootmem_memmap(unsigned long section_nr,
1483 				  struct page *start_page, unsigned long nr_pages)
1484 {
1485 	unsigned long addr = (unsigned long)start_page;
1486 	unsigned long end = (unsigned long)(start_page + nr_pages);
1487 	unsigned long next;
1488 	pgd_t *pgd;
1489 	p4d_t *p4d;
1490 	pud_t *pud;
1491 	pmd_t *pmd;
1492 	unsigned int nr_pmd_pages;
1493 	struct page *page;
1494 
1495 	for (; addr < end; addr = next) {
1496 		pte_t *pte = NULL;
1497 
1498 		pgd = pgd_offset_k(addr);
1499 		if (pgd_none(*pgd)) {
1500 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1501 			continue;
1502 		}
1503 		get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
1504 
1505 		p4d = p4d_offset(pgd, addr);
1506 		if (p4d_none(*p4d)) {
1507 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1508 			continue;
1509 		}
1510 		get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO);
1511 
1512 		pud = pud_offset(p4d, addr);
1513 		if (pud_none(*pud)) {
1514 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1515 			continue;
1516 		}
1517 		get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
1518 
1519 		if (!boot_cpu_has(X86_FEATURE_PSE)) {
1520 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1521 			pmd = pmd_offset(pud, addr);
1522 			if (pmd_none(*pmd))
1523 				continue;
1524 			get_page_bootmem(section_nr, pmd_page(*pmd),
1525 					 MIX_SECTION_INFO);
1526 
1527 			pte = pte_offset_kernel(pmd, addr);
1528 			if (pte_none(*pte))
1529 				continue;
1530 			get_page_bootmem(section_nr, pte_page(*pte),
1531 					 SECTION_INFO);
1532 		} else {
1533 			next = pmd_addr_end(addr, end);
1534 
1535 			pmd = pmd_offset(pud, addr);
1536 			if (pmd_none(*pmd))
1537 				continue;
1538 
1539 			nr_pmd_pages = 1 << get_order(PMD_SIZE);
1540 			page = pmd_page(*pmd);
1541 			while (nr_pmd_pages--)
1542 				get_page_bootmem(section_nr, page++,
1543 						 SECTION_INFO);
1544 		}
1545 	}
1546 }
1547 #endif
1548 
1549 void __meminit vmemmap_populate_print_last(void)
1550 {
1551 	if (p_start) {
1552 		pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1553 			addr_start, addr_end-1, p_start, p_end-1, node_start);
1554 		p_start = NULL;
1555 		p_end = NULL;
1556 		node_start = 0;
1557 	}
1558 }
1559 #endif
1560