1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/x86_64/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> 7 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> 8 */ 9 10 #include <linux/signal.h> 11 #include <linux/sched.h> 12 #include <linux/kernel.h> 13 #include <linux/errno.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/ptrace.h> 17 #include <linux/mman.h> 18 #include <linux/mm.h> 19 #include <linux/swap.h> 20 #include <linux/smp.h> 21 #include <linux/init.h> 22 #include <linux/initrd.h> 23 #include <linux/pagemap.h> 24 #include <linux/memblock.h> 25 #include <linux/proc_fs.h> 26 #include <linux/pci.h> 27 #include <linux/pfn.h> 28 #include <linux/poison.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/memory.h> 31 #include <linux/memory_hotplug.h> 32 #include <linux/memremap.h> 33 #include <linux/nmi.h> 34 #include <linux/gfp.h> 35 #include <linux/kcore.h> 36 37 #include <asm/processor.h> 38 #include <asm/bios_ebda.h> 39 #include <linux/uaccess.h> 40 #include <asm/pgtable.h> 41 #include <asm/pgalloc.h> 42 #include <asm/dma.h> 43 #include <asm/fixmap.h> 44 #include <asm/e820/api.h> 45 #include <asm/apic.h> 46 #include <asm/tlb.h> 47 #include <asm/mmu_context.h> 48 #include <asm/proto.h> 49 #include <asm/smp.h> 50 #include <asm/sections.h> 51 #include <asm/kdebug.h> 52 #include <asm/numa.h> 53 #include <asm/set_memory.h> 54 #include <asm/init.h> 55 #include <asm/uv/uv.h> 56 #include <asm/setup.h> 57 58 #include "mm_internal.h" 59 60 #include "ident_map.c" 61 62 #define DEFINE_POPULATE(fname, type1, type2, init) \ 63 static inline void fname##_init(struct mm_struct *mm, \ 64 type1##_t *arg1, type2##_t *arg2, bool init) \ 65 { \ 66 if (init) \ 67 fname##_safe(mm, arg1, arg2); \ 68 else \ 69 fname(mm, arg1, arg2); \ 70 } 71 72 DEFINE_POPULATE(p4d_populate, p4d, pud, init) 73 DEFINE_POPULATE(pgd_populate, pgd, p4d, init) 74 DEFINE_POPULATE(pud_populate, pud, pmd, init) 75 DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) 76 77 #define DEFINE_ENTRY(type1, type2, init) \ 78 static inline void set_##type1##_init(type1##_t *arg1, \ 79 type2##_t arg2, bool init) \ 80 { \ 81 if (init) \ 82 set_##type1##_safe(arg1, arg2); \ 83 else \ 84 set_##type1(arg1, arg2); \ 85 } 86 87 DEFINE_ENTRY(p4d, p4d, init) 88 DEFINE_ENTRY(pud, pud, init) 89 DEFINE_ENTRY(pmd, pmd, init) 90 DEFINE_ENTRY(pte, pte, init) 91 92 93 /* 94 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the 95 * physical space so we can cache the place of the first one and move 96 * around without checking the pgd every time. 97 */ 98 99 /* Bits supported by the hardware: */ 100 pteval_t __supported_pte_mask __read_mostly = ~0; 101 /* Bits allowed in normal kernel mappings: */ 102 pteval_t __default_kernel_pte_mask __read_mostly = ~0; 103 EXPORT_SYMBOL_GPL(__supported_pte_mask); 104 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ 105 EXPORT_SYMBOL(__default_kernel_pte_mask); 106 107 int force_personality32; 108 109 /* 110 * noexec32=on|off 111 * Control non executable heap for 32bit processes. 112 * To control the stack too use noexec=off 113 * 114 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) 115 * off PROT_READ implies PROT_EXEC 116 */ 117 static int __init nonx32_setup(char *str) 118 { 119 if (!strcmp(str, "on")) 120 force_personality32 &= ~READ_IMPLIES_EXEC; 121 else if (!strcmp(str, "off")) 122 force_personality32 |= READ_IMPLIES_EXEC; 123 return 1; 124 } 125 __setup("noexec32=", nonx32_setup); 126 127 static void sync_global_pgds_l5(unsigned long start, unsigned long end) 128 { 129 unsigned long addr; 130 131 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 132 const pgd_t *pgd_ref = pgd_offset_k(addr); 133 struct page *page; 134 135 /* Check for overflow */ 136 if (addr < start) 137 break; 138 139 if (pgd_none(*pgd_ref)) 140 continue; 141 142 spin_lock(&pgd_lock); 143 list_for_each_entry(page, &pgd_list, lru) { 144 pgd_t *pgd; 145 spinlock_t *pgt_lock; 146 147 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 148 /* the pgt_lock only for Xen */ 149 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 150 spin_lock(pgt_lock); 151 152 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) 153 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 154 155 if (pgd_none(*pgd)) 156 set_pgd(pgd, *pgd_ref); 157 158 spin_unlock(pgt_lock); 159 } 160 spin_unlock(&pgd_lock); 161 } 162 } 163 164 static void sync_global_pgds_l4(unsigned long start, unsigned long end) 165 { 166 unsigned long addr; 167 168 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 169 pgd_t *pgd_ref = pgd_offset_k(addr); 170 const p4d_t *p4d_ref; 171 struct page *page; 172 173 /* 174 * With folded p4d, pgd_none() is always false, we need to 175 * handle synchonization on p4d level. 176 */ 177 MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); 178 p4d_ref = p4d_offset(pgd_ref, addr); 179 180 if (p4d_none(*p4d_ref)) 181 continue; 182 183 spin_lock(&pgd_lock); 184 list_for_each_entry(page, &pgd_list, lru) { 185 pgd_t *pgd; 186 p4d_t *p4d; 187 spinlock_t *pgt_lock; 188 189 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 190 p4d = p4d_offset(pgd, addr); 191 /* the pgt_lock only for Xen */ 192 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 193 spin_lock(pgt_lock); 194 195 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) 196 BUG_ON(p4d_page_vaddr(*p4d) 197 != p4d_page_vaddr(*p4d_ref)); 198 199 if (p4d_none(*p4d)) 200 set_p4d(p4d, *p4d_ref); 201 202 spin_unlock(pgt_lock); 203 } 204 spin_unlock(&pgd_lock); 205 } 206 } 207 208 /* 209 * When memory was added make sure all the processes MM have 210 * suitable PGD entries in the local PGD level page. 211 */ 212 void sync_global_pgds(unsigned long start, unsigned long end) 213 { 214 if (pgtable_l5_enabled()) 215 sync_global_pgds_l5(start, end); 216 else 217 sync_global_pgds_l4(start, end); 218 } 219 220 /* 221 * NOTE: This function is marked __ref because it calls __init function 222 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. 223 */ 224 static __ref void *spp_getpage(void) 225 { 226 void *ptr; 227 228 if (after_bootmem) 229 ptr = (void *) get_zeroed_page(GFP_ATOMIC); 230 else 231 ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 232 233 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { 234 panic("set_pte_phys: cannot allocate page data %s\n", 235 after_bootmem ? "after bootmem" : ""); 236 } 237 238 pr_debug("spp_getpage %p\n", ptr); 239 240 return ptr; 241 } 242 243 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) 244 { 245 if (pgd_none(*pgd)) { 246 p4d_t *p4d = (p4d_t *)spp_getpage(); 247 pgd_populate(&init_mm, pgd, p4d); 248 if (p4d != p4d_offset(pgd, 0)) 249 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", 250 p4d, p4d_offset(pgd, 0)); 251 } 252 return p4d_offset(pgd, vaddr); 253 } 254 255 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) 256 { 257 if (p4d_none(*p4d)) { 258 pud_t *pud = (pud_t *)spp_getpage(); 259 p4d_populate(&init_mm, p4d, pud); 260 if (pud != pud_offset(p4d, 0)) 261 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 262 pud, pud_offset(p4d, 0)); 263 } 264 return pud_offset(p4d, vaddr); 265 } 266 267 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) 268 { 269 if (pud_none(*pud)) { 270 pmd_t *pmd = (pmd_t *) spp_getpage(); 271 pud_populate(&init_mm, pud, pmd); 272 if (pmd != pmd_offset(pud, 0)) 273 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", 274 pmd, pmd_offset(pud, 0)); 275 } 276 return pmd_offset(pud, vaddr); 277 } 278 279 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) 280 { 281 if (pmd_none(*pmd)) { 282 pte_t *pte = (pte_t *) spp_getpage(); 283 pmd_populate_kernel(&init_mm, pmd, pte); 284 if (pte != pte_offset_kernel(pmd, 0)) 285 printk(KERN_ERR "PAGETABLE BUG #03!\n"); 286 } 287 return pte_offset_kernel(pmd, vaddr); 288 } 289 290 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) 291 { 292 pmd_t *pmd = fill_pmd(pud, vaddr); 293 pte_t *pte = fill_pte(pmd, vaddr); 294 295 set_pte(pte, new_pte); 296 297 /* 298 * It's enough to flush this one mapping. 299 * (PGE mappings get flushed as well) 300 */ 301 __flush_tlb_one_kernel(vaddr); 302 } 303 304 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) 305 { 306 p4d_t *p4d = p4d_page + p4d_index(vaddr); 307 pud_t *pud = fill_pud(p4d, vaddr); 308 309 __set_pte_vaddr(pud, vaddr, new_pte); 310 } 311 312 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) 313 { 314 pud_t *pud = pud_page + pud_index(vaddr); 315 316 __set_pte_vaddr(pud, vaddr, new_pte); 317 } 318 319 void set_pte_vaddr(unsigned long vaddr, pte_t pteval) 320 { 321 pgd_t *pgd; 322 p4d_t *p4d_page; 323 324 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); 325 326 pgd = pgd_offset_k(vaddr); 327 if (pgd_none(*pgd)) { 328 printk(KERN_ERR 329 "PGD FIXMAP MISSING, it should be setup in head.S!\n"); 330 return; 331 } 332 333 p4d_page = p4d_offset(pgd, 0); 334 set_pte_vaddr_p4d(p4d_page, vaddr, pteval); 335 } 336 337 pmd_t * __init populate_extra_pmd(unsigned long vaddr) 338 { 339 pgd_t *pgd; 340 p4d_t *p4d; 341 pud_t *pud; 342 343 pgd = pgd_offset_k(vaddr); 344 p4d = fill_p4d(pgd, vaddr); 345 pud = fill_pud(p4d, vaddr); 346 return fill_pmd(pud, vaddr); 347 } 348 349 pte_t * __init populate_extra_pte(unsigned long vaddr) 350 { 351 pmd_t *pmd; 352 353 pmd = populate_extra_pmd(vaddr); 354 return fill_pte(pmd, vaddr); 355 } 356 357 /* 358 * Create large page table mappings for a range of physical addresses. 359 */ 360 static void __init __init_extra_mapping(unsigned long phys, unsigned long size, 361 enum page_cache_mode cache) 362 { 363 pgd_t *pgd; 364 p4d_t *p4d; 365 pud_t *pud; 366 pmd_t *pmd; 367 pgprot_t prot; 368 369 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | 370 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache))); 371 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); 372 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { 373 pgd = pgd_offset_k((unsigned long)__va(phys)); 374 if (pgd_none(*pgd)) { 375 p4d = (p4d_t *) spp_getpage(); 376 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | 377 _PAGE_USER)); 378 } 379 p4d = p4d_offset(pgd, (unsigned long)__va(phys)); 380 if (p4d_none(*p4d)) { 381 pud = (pud_t *) spp_getpage(); 382 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | 383 _PAGE_USER)); 384 } 385 pud = pud_offset(p4d, (unsigned long)__va(phys)); 386 if (pud_none(*pud)) { 387 pmd = (pmd_t *) spp_getpage(); 388 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | 389 _PAGE_USER)); 390 } 391 pmd = pmd_offset(pud, phys); 392 BUG_ON(!pmd_none(*pmd)); 393 set_pmd(pmd, __pmd(phys | pgprot_val(prot))); 394 } 395 } 396 397 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) 398 { 399 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); 400 } 401 402 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) 403 { 404 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); 405 } 406 407 /* 408 * The head.S code sets up the kernel high mapping: 409 * 410 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) 411 * 412 * phys_base holds the negative offset to the kernel, which is added 413 * to the compile time generated pmds. This results in invalid pmds up 414 * to the point where we hit the physaddr 0 mapping. 415 * 416 * We limit the mappings to the region from _text to _brk_end. _brk_end 417 * is rounded up to the 2MB boundary. This catches the invalid pmds as 418 * well, as they are located before _text: 419 */ 420 void __init cleanup_highmap(void) 421 { 422 unsigned long vaddr = __START_KERNEL_map; 423 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; 424 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 425 pmd_t *pmd = level2_kernel_pgt; 426 427 /* 428 * Native path, max_pfn_mapped is not set yet. 429 * Xen has valid max_pfn_mapped set in 430 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). 431 */ 432 if (max_pfn_mapped) 433 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); 434 435 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { 436 if (pmd_none(*pmd)) 437 continue; 438 if (vaddr < (unsigned long) _text || vaddr > end) 439 set_pmd(pmd, __pmd(0)); 440 } 441 } 442 443 /* 444 * Create PTE level page table mapping for physical addresses. 445 * It returns the last physical address mapped. 446 */ 447 static unsigned long __meminit 448 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, 449 pgprot_t prot, bool init) 450 { 451 unsigned long pages = 0, paddr_next; 452 unsigned long paddr_last = paddr_end; 453 pte_t *pte; 454 int i; 455 456 pte = pte_page + pte_index(paddr); 457 i = pte_index(paddr); 458 459 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { 460 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; 461 if (paddr >= paddr_end) { 462 if (!after_bootmem && 463 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 464 E820_TYPE_RAM) && 465 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 466 E820_TYPE_RESERVED_KERN)) 467 set_pte_init(pte, __pte(0), init); 468 continue; 469 } 470 471 /* 472 * We will re-use the existing mapping. 473 * Xen for example has some special requirements, like mapping 474 * pagetable pages as RO. So assume someone who pre-setup 475 * these mappings are more intelligent. 476 */ 477 if (!pte_none(*pte)) { 478 if (!after_bootmem) 479 pages++; 480 continue; 481 } 482 483 if (0) 484 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, 485 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); 486 pages++; 487 set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); 488 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; 489 } 490 491 update_page_count(PG_LEVEL_4K, pages); 492 493 return paddr_last; 494 } 495 496 /* 497 * Create PMD level page table mapping for physical addresses. The virtual 498 * and physical address have to be aligned at this level. 499 * It returns the last physical address mapped. 500 */ 501 static unsigned long __meminit 502 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, 503 unsigned long page_size_mask, pgprot_t prot, bool init) 504 { 505 unsigned long pages = 0, paddr_next; 506 unsigned long paddr_last = paddr_end; 507 508 int i = pmd_index(paddr); 509 510 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { 511 pmd_t *pmd = pmd_page + pmd_index(paddr); 512 pte_t *pte; 513 pgprot_t new_prot = prot; 514 515 paddr_next = (paddr & PMD_MASK) + PMD_SIZE; 516 if (paddr >= paddr_end) { 517 if (!after_bootmem && 518 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 519 E820_TYPE_RAM) && 520 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 521 E820_TYPE_RESERVED_KERN)) 522 set_pmd_init(pmd, __pmd(0), init); 523 continue; 524 } 525 526 if (!pmd_none(*pmd)) { 527 if (!pmd_large(*pmd)) { 528 spin_lock(&init_mm.page_table_lock); 529 pte = (pte_t *)pmd_page_vaddr(*pmd); 530 paddr_last = phys_pte_init(pte, paddr, 531 paddr_end, prot, 532 init); 533 spin_unlock(&init_mm.page_table_lock); 534 continue; 535 } 536 /* 537 * If we are ok with PG_LEVEL_2M mapping, then we will 538 * use the existing mapping, 539 * 540 * Otherwise, we will split the large page mapping but 541 * use the same existing protection bits except for 542 * large page, so that we don't violate Intel's TLB 543 * Application note (317080) which says, while changing 544 * the page sizes, new and old translations should 545 * not differ with respect to page frame and 546 * attributes. 547 */ 548 if (page_size_mask & (1 << PG_LEVEL_2M)) { 549 if (!after_bootmem) 550 pages++; 551 paddr_last = paddr_next; 552 continue; 553 } 554 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); 555 } 556 557 if (page_size_mask & (1<<PG_LEVEL_2M)) { 558 pages++; 559 spin_lock(&init_mm.page_table_lock); 560 set_pte_init((pte_t *)pmd, 561 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, 562 __pgprot(pgprot_val(prot) | _PAGE_PSE)), 563 init); 564 spin_unlock(&init_mm.page_table_lock); 565 paddr_last = paddr_next; 566 continue; 567 } 568 569 pte = alloc_low_page(); 570 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); 571 572 spin_lock(&init_mm.page_table_lock); 573 pmd_populate_kernel_init(&init_mm, pmd, pte, init); 574 spin_unlock(&init_mm.page_table_lock); 575 } 576 update_page_count(PG_LEVEL_2M, pages); 577 return paddr_last; 578 } 579 580 /* 581 * Create PUD level page table mapping for physical addresses. The virtual 582 * and physical address do not have to be aligned at this level. KASLR can 583 * randomize virtual addresses up to this level. 584 * It returns the last physical address mapped. 585 */ 586 static unsigned long __meminit 587 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, 588 unsigned long page_size_mask, pgprot_t _prot, bool init) 589 { 590 unsigned long pages = 0, paddr_next; 591 unsigned long paddr_last = paddr_end; 592 unsigned long vaddr = (unsigned long)__va(paddr); 593 int i = pud_index(vaddr); 594 595 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { 596 pud_t *pud; 597 pmd_t *pmd; 598 pgprot_t prot = _prot; 599 600 vaddr = (unsigned long)__va(paddr); 601 pud = pud_page + pud_index(vaddr); 602 paddr_next = (paddr & PUD_MASK) + PUD_SIZE; 603 604 if (paddr >= paddr_end) { 605 if (!after_bootmem && 606 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 607 E820_TYPE_RAM) && 608 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 609 E820_TYPE_RESERVED_KERN)) 610 set_pud_init(pud, __pud(0), init); 611 continue; 612 } 613 614 if (!pud_none(*pud)) { 615 if (!pud_large(*pud)) { 616 pmd = pmd_offset(pud, 0); 617 paddr_last = phys_pmd_init(pmd, paddr, 618 paddr_end, 619 page_size_mask, 620 prot, init); 621 continue; 622 } 623 /* 624 * If we are ok with PG_LEVEL_1G mapping, then we will 625 * use the existing mapping. 626 * 627 * Otherwise, we will split the gbpage mapping but use 628 * the same existing protection bits except for large 629 * page, so that we don't violate Intel's TLB 630 * Application note (317080) which says, while changing 631 * the page sizes, new and old translations should 632 * not differ with respect to page frame and 633 * attributes. 634 */ 635 if (page_size_mask & (1 << PG_LEVEL_1G)) { 636 if (!after_bootmem) 637 pages++; 638 paddr_last = paddr_next; 639 continue; 640 } 641 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); 642 } 643 644 if (page_size_mask & (1<<PG_LEVEL_1G)) { 645 pages++; 646 spin_lock(&init_mm.page_table_lock); 647 648 prot = __pgprot(pgprot_val(prot) | __PAGE_KERNEL_LARGE); 649 650 set_pte_init((pte_t *)pud, 651 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, 652 prot), 653 init); 654 spin_unlock(&init_mm.page_table_lock); 655 paddr_last = paddr_next; 656 continue; 657 } 658 659 pmd = alloc_low_page(); 660 paddr_last = phys_pmd_init(pmd, paddr, paddr_end, 661 page_size_mask, prot, init); 662 663 spin_lock(&init_mm.page_table_lock); 664 pud_populate_init(&init_mm, pud, pmd, init); 665 spin_unlock(&init_mm.page_table_lock); 666 } 667 668 update_page_count(PG_LEVEL_1G, pages); 669 670 return paddr_last; 671 } 672 673 static unsigned long __meminit 674 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, 675 unsigned long page_size_mask, pgprot_t prot, bool init) 676 { 677 unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; 678 679 paddr_last = paddr_end; 680 vaddr = (unsigned long)__va(paddr); 681 vaddr_end = (unsigned long)__va(paddr_end); 682 683 if (!pgtable_l5_enabled()) 684 return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, 685 page_size_mask, prot, init); 686 687 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 688 p4d_t *p4d = p4d_page + p4d_index(vaddr); 689 pud_t *pud; 690 691 vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE; 692 paddr = __pa(vaddr); 693 694 if (paddr >= paddr_end) { 695 paddr_next = __pa(vaddr_next); 696 if (!after_bootmem && 697 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 698 E820_TYPE_RAM) && 699 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 700 E820_TYPE_RESERVED_KERN)) 701 set_p4d_init(p4d, __p4d(0), init); 702 continue; 703 } 704 705 if (!p4d_none(*p4d)) { 706 pud = pud_offset(p4d, 0); 707 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 708 page_size_mask, prot, init); 709 continue; 710 } 711 712 pud = alloc_low_page(); 713 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 714 page_size_mask, prot, init); 715 716 spin_lock(&init_mm.page_table_lock); 717 p4d_populate_init(&init_mm, p4d, pud, init); 718 spin_unlock(&init_mm.page_table_lock); 719 } 720 721 return paddr_last; 722 } 723 724 static unsigned long __meminit 725 __kernel_physical_mapping_init(unsigned long paddr_start, 726 unsigned long paddr_end, 727 unsigned long page_size_mask, 728 pgprot_t prot, bool init) 729 { 730 bool pgd_changed = false; 731 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; 732 733 paddr_last = paddr_end; 734 vaddr = (unsigned long)__va(paddr_start); 735 vaddr_end = (unsigned long)__va(paddr_end); 736 vaddr_start = vaddr; 737 738 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 739 pgd_t *pgd = pgd_offset_k(vaddr); 740 p4d_t *p4d; 741 742 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; 743 744 if (pgd_val(*pgd)) { 745 p4d = (p4d_t *)pgd_page_vaddr(*pgd); 746 paddr_last = phys_p4d_init(p4d, __pa(vaddr), 747 __pa(vaddr_end), 748 page_size_mask, 749 prot, init); 750 continue; 751 } 752 753 p4d = alloc_low_page(); 754 paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), 755 page_size_mask, prot, init); 756 757 spin_lock(&init_mm.page_table_lock); 758 if (pgtable_l5_enabled()) 759 pgd_populate_init(&init_mm, pgd, p4d, init); 760 else 761 p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), 762 (pud_t *) p4d, init); 763 764 spin_unlock(&init_mm.page_table_lock); 765 pgd_changed = true; 766 } 767 768 if (pgd_changed) 769 sync_global_pgds(vaddr_start, vaddr_end - 1); 770 771 return paddr_last; 772 } 773 774 775 /* 776 * Create page table mapping for the physical memory for specific physical 777 * addresses. Note that it can only be used to populate non-present entries. 778 * The virtual and physical addresses have to be aligned on PMD level 779 * down. It returns the last physical address mapped. 780 */ 781 unsigned long __meminit 782 kernel_physical_mapping_init(unsigned long paddr_start, 783 unsigned long paddr_end, 784 unsigned long page_size_mask, pgprot_t prot) 785 { 786 return __kernel_physical_mapping_init(paddr_start, paddr_end, 787 page_size_mask, prot, true); 788 } 789 790 /* 791 * This function is similar to kernel_physical_mapping_init() above with the 792 * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() 793 * when updating the mapping. The caller is responsible to flush the TLBs after 794 * the function returns. 795 */ 796 unsigned long __meminit 797 kernel_physical_mapping_change(unsigned long paddr_start, 798 unsigned long paddr_end, 799 unsigned long page_size_mask) 800 { 801 return __kernel_physical_mapping_init(paddr_start, paddr_end, 802 page_size_mask, PAGE_KERNEL, 803 false); 804 } 805 806 #ifndef CONFIG_NUMA 807 void __init initmem_init(void) 808 { 809 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); 810 } 811 #endif 812 813 void __init paging_init(void) 814 { 815 sparse_memory_present_with_active_regions(MAX_NUMNODES); 816 sparse_init(); 817 818 /* 819 * clear the default setting with node 0 820 * note: don't use nodes_clear here, that is really clearing when 821 * numa support is not compiled in, and later node_set_state 822 * will not set it back. 823 */ 824 node_clear_state(0, N_MEMORY); 825 node_clear_state(0, N_NORMAL_MEMORY); 826 827 zone_sizes_init(); 828 } 829 830 /* 831 * Memory hotplug specific functions 832 */ 833 #ifdef CONFIG_MEMORY_HOTPLUG 834 /* 835 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need 836 * updating. 837 */ 838 static void update_end_of_memory_vars(u64 start, u64 size) 839 { 840 unsigned long end_pfn = PFN_UP(start + size); 841 842 if (end_pfn > max_pfn) { 843 max_pfn = end_pfn; 844 max_low_pfn = end_pfn; 845 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; 846 } 847 } 848 849 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, 850 struct mhp_params *params) 851 { 852 int ret; 853 854 ret = __add_pages(nid, start_pfn, nr_pages, params); 855 WARN_ON_ONCE(ret); 856 857 /* update max_pfn, max_low_pfn and high_memory */ 858 update_end_of_memory_vars(start_pfn << PAGE_SHIFT, 859 nr_pages << PAGE_SHIFT); 860 861 return ret; 862 } 863 864 int arch_add_memory(int nid, u64 start, u64 size, 865 struct mhp_params *params) 866 { 867 unsigned long start_pfn = start >> PAGE_SHIFT; 868 unsigned long nr_pages = size >> PAGE_SHIFT; 869 870 init_memory_mapping(start, start + size, params->pgprot); 871 872 return add_pages(nid, start_pfn, nr_pages, params); 873 } 874 875 #define PAGE_INUSE 0xFD 876 877 static void __meminit free_pagetable(struct page *page, int order) 878 { 879 unsigned long magic; 880 unsigned int nr_pages = 1 << order; 881 882 /* bootmem page has reserved flag */ 883 if (PageReserved(page)) { 884 __ClearPageReserved(page); 885 886 magic = (unsigned long)page->freelist; 887 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { 888 while (nr_pages--) 889 put_page_bootmem(page++); 890 } else 891 while (nr_pages--) 892 free_reserved_page(page++); 893 } else 894 free_pages((unsigned long)page_address(page), order); 895 } 896 897 static void __meminit free_hugepage_table(struct page *page, 898 struct vmem_altmap *altmap) 899 { 900 if (altmap) 901 vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); 902 else 903 free_pagetable(page, get_order(PMD_SIZE)); 904 } 905 906 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 907 { 908 pte_t *pte; 909 int i; 910 911 for (i = 0; i < PTRS_PER_PTE; i++) { 912 pte = pte_start + i; 913 if (!pte_none(*pte)) 914 return; 915 } 916 917 /* free a pte talbe */ 918 free_pagetable(pmd_page(*pmd), 0); 919 spin_lock(&init_mm.page_table_lock); 920 pmd_clear(pmd); 921 spin_unlock(&init_mm.page_table_lock); 922 } 923 924 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) 925 { 926 pmd_t *pmd; 927 int i; 928 929 for (i = 0; i < PTRS_PER_PMD; i++) { 930 pmd = pmd_start + i; 931 if (!pmd_none(*pmd)) 932 return; 933 } 934 935 /* free a pmd talbe */ 936 free_pagetable(pud_page(*pud), 0); 937 spin_lock(&init_mm.page_table_lock); 938 pud_clear(pud); 939 spin_unlock(&init_mm.page_table_lock); 940 } 941 942 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 943 { 944 pud_t *pud; 945 int i; 946 947 for (i = 0; i < PTRS_PER_PUD; i++) { 948 pud = pud_start + i; 949 if (!pud_none(*pud)) 950 return; 951 } 952 953 /* free a pud talbe */ 954 free_pagetable(p4d_page(*p4d), 0); 955 spin_lock(&init_mm.page_table_lock); 956 p4d_clear(p4d); 957 spin_unlock(&init_mm.page_table_lock); 958 } 959 960 static void __meminit 961 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, 962 bool direct) 963 { 964 unsigned long next, pages = 0; 965 pte_t *pte; 966 void *page_addr; 967 phys_addr_t phys_addr; 968 969 pte = pte_start + pte_index(addr); 970 for (; addr < end; addr = next, pte++) { 971 next = (addr + PAGE_SIZE) & PAGE_MASK; 972 if (next > end) 973 next = end; 974 975 if (!pte_present(*pte)) 976 continue; 977 978 /* 979 * We mapped [0,1G) memory as identity mapping when 980 * initializing, in arch/x86/kernel/head_64.S. These 981 * pagetables cannot be removed. 982 */ 983 phys_addr = pte_val(*pte) + (addr & PAGE_MASK); 984 if (phys_addr < (phys_addr_t)0x40000000) 985 return; 986 987 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) { 988 /* 989 * Do not free direct mapping pages since they were 990 * freed when offlining, or simplely not in use. 991 */ 992 if (!direct) 993 free_pagetable(pte_page(*pte), 0); 994 995 spin_lock(&init_mm.page_table_lock); 996 pte_clear(&init_mm, addr, pte); 997 spin_unlock(&init_mm.page_table_lock); 998 999 /* For non-direct mapping, pages means nothing. */ 1000 pages++; 1001 } else { 1002 /* 1003 * If we are here, we are freeing vmemmap pages since 1004 * direct mapped memory ranges to be freed are aligned. 1005 * 1006 * If we are not removing the whole page, it means 1007 * other page structs in this page are being used and 1008 * we canot remove them. So fill the unused page_structs 1009 * with 0xFD, and remove the page when it is wholly 1010 * filled with 0xFD. 1011 */ 1012 memset((void *)addr, PAGE_INUSE, next - addr); 1013 1014 page_addr = page_address(pte_page(*pte)); 1015 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) { 1016 free_pagetable(pte_page(*pte), 0); 1017 1018 spin_lock(&init_mm.page_table_lock); 1019 pte_clear(&init_mm, addr, pte); 1020 spin_unlock(&init_mm.page_table_lock); 1021 } 1022 } 1023 } 1024 1025 /* Call free_pte_table() in remove_pmd_table(). */ 1026 flush_tlb_all(); 1027 if (direct) 1028 update_page_count(PG_LEVEL_4K, -pages); 1029 } 1030 1031 static void __meminit 1032 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, 1033 bool direct, struct vmem_altmap *altmap) 1034 { 1035 unsigned long next, pages = 0; 1036 pte_t *pte_base; 1037 pmd_t *pmd; 1038 void *page_addr; 1039 1040 pmd = pmd_start + pmd_index(addr); 1041 for (; addr < end; addr = next, pmd++) { 1042 next = pmd_addr_end(addr, end); 1043 1044 if (!pmd_present(*pmd)) 1045 continue; 1046 1047 if (pmd_large(*pmd)) { 1048 if (IS_ALIGNED(addr, PMD_SIZE) && 1049 IS_ALIGNED(next, PMD_SIZE)) { 1050 if (!direct) 1051 free_hugepage_table(pmd_page(*pmd), 1052 altmap); 1053 1054 spin_lock(&init_mm.page_table_lock); 1055 pmd_clear(pmd); 1056 spin_unlock(&init_mm.page_table_lock); 1057 pages++; 1058 } else { 1059 /* If here, we are freeing vmemmap pages. */ 1060 memset((void *)addr, PAGE_INUSE, next - addr); 1061 1062 page_addr = page_address(pmd_page(*pmd)); 1063 if (!memchr_inv(page_addr, PAGE_INUSE, 1064 PMD_SIZE)) { 1065 free_hugepage_table(pmd_page(*pmd), 1066 altmap); 1067 1068 spin_lock(&init_mm.page_table_lock); 1069 pmd_clear(pmd); 1070 spin_unlock(&init_mm.page_table_lock); 1071 } 1072 } 1073 1074 continue; 1075 } 1076 1077 pte_base = (pte_t *)pmd_page_vaddr(*pmd); 1078 remove_pte_table(pte_base, addr, next, direct); 1079 free_pte_table(pte_base, pmd); 1080 } 1081 1082 /* Call free_pmd_table() in remove_pud_table(). */ 1083 if (direct) 1084 update_page_count(PG_LEVEL_2M, -pages); 1085 } 1086 1087 static void __meminit 1088 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, 1089 struct vmem_altmap *altmap, bool direct) 1090 { 1091 unsigned long next, pages = 0; 1092 pmd_t *pmd_base; 1093 pud_t *pud; 1094 void *page_addr; 1095 1096 pud = pud_start + pud_index(addr); 1097 for (; addr < end; addr = next, pud++) { 1098 next = pud_addr_end(addr, end); 1099 1100 if (!pud_present(*pud)) 1101 continue; 1102 1103 if (pud_large(*pud)) { 1104 if (IS_ALIGNED(addr, PUD_SIZE) && 1105 IS_ALIGNED(next, PUD_SIZE)) { 1106 if (!direct) 1107 free_pagetable(pud_page(*pud), 1108 get_order(PUD_SIZE)); 1109 1110 spin_lock(&init_mm.page_table_lock); 1111 pud_clear(pud); 1112 spin_unlock(&init_mm.page_table_lock); 1113 pages++; 1114 } else { 1115 /* If here, we are freeing vmemmap pages. */ 1116 memset((void *)addr, PAGE_INUSE, next - addr); 1117 1118 page_addr = page_address(pud_page(*pud)); 1119 if (!memchr_inv(page_addr, PAGE_INUSE, 1120 PUD_SIZE)) { 1121 free_pagetable(pud_page(*pud), 1122 get_order(PUD_SIZE)); 1123 1124 spin_lock(&init_mm.page_table_lock); 1125 pud_clear(pud); 1126 spin_unlock(&init_mm.page_table_lock); 1127 } 1128 } 1129 1130 continue; 1131 } 1132 1133 pmd_base = pmd_offset(pud, 0); 1134 remove_pmd_table(pmd_base, addr, next, direct, altmap); 1135 free_pmd_table(pmd_base, pud); 1136 } 1137 1138 if (direct) 1139 update_page_count(PG_LEVEL_1G, -pages); 1140 } 1141 1142 static void __meminit 1143 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, 1144 struct vmem_altmap *altmap, bool direct) 1145 { 1146 unsigned long next, pages = 0; 1147 pud_t *pud_base; 1148 p4d_t *p4d; 1149 1150 p4d = p4d_start + p4d_index(addr); 1151 for (; addr < end; addr = next, p4d++) { 1152 next = p4d_addr_end(addr, end); 1153 1154 if (!p4d_present(*p4d)) 1155 continue; 1156 1157 BUILD_BUG_ON(p4d_large(*p4d)); 1158 1159 pud_base = pud_offset(p4d, 0); 1160 remove_pud_table(pud_base, addr, next, altmap, direct); 1161 /* 1162 * For 4-level page tables we do not want to free PUDs, but in the 1163 * 5-level case we should free them. This code will have to change 1164 * to adapt for boot-time switching between 4 and 5 level page tables. 1165 */ 1166 if (pgtable_l5_enabled()) 1167 free_pud_table(pud_base, p4d); 1168 } 1169 1170 if (direct) 1171 update_page_count(PG_LEVEL_512G, -pages); 1172 } 1173 1174 /* start and end are both virtual address. */ 1175 static void __meminit 1176 remove_pagetable(unsigned long start, unsigned long end, bool direct, 1177 struct vmem_altmap *altmap) 1178 { 1179 unsigned long next; 1180 unsigned long addr; 1181 pgd_t *pgd; 1182 p4d_t *p4d; 1183 1184 for (addr = start; addr < end; addr = next) { 1185 next = pgd_addr_end(addr, end); 1186 1187 pgd = pgd_offset_k(addr); 1188 if (!pgd_present(*pgd)) 1189 continue; 1190 1191 p4d = p4d_offset(pgd, 0); 1192 remove_p4d_table(p4d, addr, next, altmap, direct); 1193 } 1194 1195 flush_tlb_all(); 1196 } 1197 1198 void __ref vmemmap_free(unsigned long start, unsigned long end, 1199 struct vmem_altmap *altmap) 1200 { 1201 remove_pagetable(start, end, false, altmap); 1202 } 1203 1204 static void __meminit 1205 kernel_physical_mapping_remove(unsigned long start, unsigned long end) 1206 { 1207 start = (unsigned long)__va(start); 1208 end = (unsigned long)__va(end); 1209 1210 remove_pagetable(start, end, true, NULL); 1211 } 1212 1213 void __ref arch_remove_memory(int nid, u64 start, u64 size, 1214 struct vmem_altmap *altmap) 1215 { 1216 unsigned long start_pfn = start >> PAGE_SHIFT; 1217 unsigned long nr_pages = size >> PAGE_SHIFT; 1218 1219 __remove_pages(start_pfn, nr_pages, altmap); 1220 kernel_physical_mapping_remove(start, start + size); 1221 } 1222 #endif /* CONFIG_MEMORY_HOTPLUG */ 1223 1224 static struct kcore_list kcore_vsyscall; 1225 1226 static void __init register_page_bootmem_info(void) 1227 { 1228 #ifdef CONFIG_NUMA 1229 int i; 1230 1231 for_each_online_node(i) 1232 register_page_bootmem_info_node(NODE_DATA(i)); 1233 #endif 1234 } 1235 1236 void __init mem_init(void) 1237 { 1238 pci_iommu_alloc(); 1239 1240 /* clear_bss() already clear the empty_zero_page */ 1241 1242 /* this will put all memory onto the freelists */ 1243 memblock_free_all(); 1244 after_bootmem = 1; 1245 x86_init.hyper.init_after_bootmem(); 1246 1247 /* 1248 * Must be done after boot memory is put on freelist, because here we 1249 * might set fields in deferred struct pages that have not yet been 1250 * initialized, and memblock_free_all() initializes all the reserved 1251 * deferred pages for us. 1252 */ 1253 register_page_bootmem_info(); 1254 1255 /* Register memory areas for /proc/kcore */ 1256 if (get_gate_vma(&init_mm)) 1257 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); 1258 1259 mem_init_print_info(NULL); 1260 } 1261 1262 int kernel_set_to_readonly; 1263 1264 void mark_rodata_ro(void) 1265 { 1266 unsigned long start = PFN_ALIGN(_text); 1267 unsigned long rodata_start = PFN_ALIGN(__start_rodata); 1268 unsigned long end = (unsigned long)__end_rodata_hpage_align; 1269 unsigned long text_end = PFN_ALIGN(_etext); 1270 unsigned long rodata_end = PFN_ALIGN(__end_rodata); 1271 unsigned long all_end; 1272 1273 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 1274 (end - start) >> 10); 1275 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1276 1277 kernel_set_to_readonly = 1; 1278 1279 /* 1280 * The rodata/data/bss/brk section (but not the kernel text!) 1281 * should also be not-executable. 1282 * 1283 * We align all_end to PMD_SIZE because the existing mapping 1284 * is a full PMD. If we would align _brk_end to PAGE_SIZE we 1285 * split the PMD and the reminder between _brk_end and the end 1286 * of the PMD will remain mapped executable. 1287 * 1288 * Any PMD which was setup after the one which covers _brk_end 1289 * has been zapped already via cleanup_highmem(). 1290 */ 1291 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1292 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); 1293 1294 #ifdef CONFIG_CPA_DEBUG 1295 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); 1296 set_memory_rw(start, (end-start) >> PAGE_SHIFT); 1297 1298 printk(KERN_INFO "Testing CPA: again\n"); 1299 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 1300 #endif 1301 1302 free_kernel_image_pages("unused kernel image (text/rodata gap)", 1303 (void *)text_end, (void *)rodata_start); 1304 free_kernel_image_pages("unused kernel image (rodata/data gap)", 1305 (void *)rodata_end, (void *)_sdata); 1306 1307 debug_checkwx(); 1308 } 1309 1310 int kern_addr_valid(unsigned long addr) 1311 { 1312 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; 1313 pgd_t *pgd; 1314 p4d_t *p4d; 1315 pud_t *pud; 1316 pmd_t *pmd; 1317 pte_t *pte; 1318 1319 if (above != 0 && above != -1UL) 1320 return 0; 1321 1322 pgd = pgd_offset_k(addr); 1323 if (pgd_none(*pgd)) 1324 return 0; 1325 1326 p4d = p4d_offset(pgd, addr); 1327 if (p4d_none(*p4d)) 1328 return 0; 1329 1330 pud = pud_offset(p4d, addr); 1331 if (pud_none(*pud)) 1332 return 0; 1333 1334 if (pud_large(*pud)) 1335 return pfn_valid(pud_pfn(*pud)); 1336 1337 pmd = pmd_offset(pud, addr); 1338 if (pmd_none(*pmd)) 1339 return 0; 1340 1341 if (pmd_large(*pmd)) 1342 return pfn_valid(pmd_pfn(*pmd)); 1343 1344 pte = pte_offset_kernel(pmd, addr); 1345 if (pte_none(*pte)) 1346 return 0; 1347 1348 return pfn_valid(pte_pfn(*pte)); 1349 } 1350 1351 /* 1352 * Block size is the minimum amount of memory which can be hotplugged or 1353 * hotremoved. It must be power of two and must be equal or larger than 1354 * MIN_MEMORY_BLOCK_SIZE. 1355 */ 1356 #define MAX_BLOCK_SIZE (2UL << 30) 1357 1358 /* Amount of ram needed to start using large blocks */ 1359 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) 1360 1361 /* Adjustable memory block size */ 1362 static unsigned long set_memory_block_size; 1363 int __init set_memory_block_size_order(unsigned int order) 1364 { 1365 unsigned long size = 1UL << order; 1366 1367 if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) 1368 return -EINVAL; 1369 1370 set_memory_block_size = size; 1371 return 0; 1372 } 1373 1374 static unsigned long probe_memory_block_size(void) 1375 { 1376 unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; 1377 unsigned long bz; 1378 1379 /* If memory block size has been set, then use it */ 1380 bz = set_memory_block_size; 1381 if (bz) 1382 goto done; 1383 1384 /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ 1385 if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { 1386 bz = MIN_MEMORY_BLOCK_SIZE; 1387 goto done; 1388 } 1389 1390 /* Find the largest allowed block size that aligns to memory end */ 1391 for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { 1392 if (IS_ALIGNED(boot_mem_end, bz)) 1393 break; 1394 } 1395 done: 1396 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); 1397 1398 return bz; 1399 } 1400 1401 static unsigned long memory_block_size_probed; 1402 unsigned long memory_block_size_bytes(void) 1403 { 1404 if (!memory_block_size_probed) 1405 memory_block_size_probed = probe_memory_block_size(); 1406 1407 return memory_block_size_probed; 1408 } 1409 1410 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1411 /* 1412 * Initialise the sparsemem vmemmap using huge-pages at the PMD level. 1413 */ 1414 static long __meminitdata addr_start, addr_end; 1415 static void __meminitdata *p_start, *p_end; 1416 static int __meminitdata node_start; 1417 1418 static int __meminit vmemmap_populate_hugepages(unsigned long start, 1419 unsigned long end, int node, struct vmem_altmap *altmap) 1420 { 1421 unsigned long addr; 1422 unsigned long next; 1423 pgd_t *pgd; 1424 p4d_t *p4d; 1425 pud_t *pud; 1426 pmd_t *pmd; 1427 1428 for (addr = start; addr < end; addr = next) { 1429 next = pmd_addr_end(addr, end); 1430 1431 pgd = vmemmap_pgd_populate(addr, node); 1432 if (!pgd) 1433 return -ENOMEM; 1434 1435 p4d = vmemmap_p4d_populate(pgd, addr, node); 1436 if (!p4d) 1437 return -ENOMEM; 1438 1439 pud = vmemmap_pud_populate(p4d, addr, node); 1440 if (!pud) 1441 return -ENOMEM; 1442 1443 pmd = pmd_offset(pud, addr); 1444 if (pmd_none(*pmd)) { 1445 void *p; 1446 1447 if (altmap) 1448 p = altmap_alloc_block_buf(PMD_SIZE, altmap); 1449 else 1450 p = vmemmap_alloc_block_buf(PMD_SIZE, node); 1451 if (p) { 1452 pte_t entry; 1453 1454 entry = pfn_pte(__pa(p) >> PAGE_SHIFT, 1455 PAGE_KERNEL_LARGE); 1456 set_pmd(pmd, __pmd(pte_val(entry))); 1457 1458 /* check to see if we have contiguous blocks */ 1459 if (p_end != p || node_start != node) { 1460 if (p_start) 1461 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1462 addr_start, addr_end-1, p_start, p_end-1, node_start); 1463 addr_start = addr; 1464 node_start = node; 1465 p_start = p; 1466 } 1467 1468 addr_end = addr + PMD_SIZE; 1469 p_end = p + PMD_SIZE; 1470 continue; 1471 } else if (altmap) 1472 return -ENOMEM; /* no fallback */ 1473 } else if (pmd_large(*pmd)) { 1474 vmemmap_verify((pte_t *)pmd, node, addr, next); 1475 continue; 1476 } 1477 if (vmemmap_populate_basepages(addr, next, node)) 1478 return -ENOMEM; 1479 } 1480 return 0; 1481 } 1482 1483 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1484 struct vmem_altmap *altmap) 1485 { 1486 int err; 1487 1488 if (end - start < PAGES_PER_SECTION * sizeof(struct page)) 1489 err = vmemmap_populate_basepages(start, end, node); 1490 else if (boot_cpu_has(X86_FEATURE_PSE)) 1491 err = vmemmap_populate_hugepages(start, end, node, altmap); 1492 else if (altmap) { 1493 pr_err_once("%s: no cpu support for altmap allocations\n", 1494 __func__); 1495 err = -ENOMEM; 1496 } else 1497 err = vmemmap_populate_basepages(start, end, node); 1498 if (!err) 1499 sync_global_pgds(start, end - 1); 1500 return err; 1501 } 1502 1503 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE) 1504 void register_page_bootmem_memmap(unsigned long section_nr, 1505 struct page *start_page, unsigned long nr_pages) 1506 { 1507 unsigned long addr = (unsigned long)start_page; 1508 unsigned long end = (unsigned long)(start_page + nr_pages); 1509 unsigned long next; 1510 pgd_t *pgd; 1511 p4d_t *p4d; 1512 pud_t *pud; 1513 pmd_t *pmd; 1514 unsigned int nr_pmd_pages; 1515 struct page *page; 1516 1517 for (; addr < end; addr = next) { 1518 pte_t *pte = NULL; 1519 1520 pgd = pgd_offset_k(addr); 1521 if (pgd_none(*pgd)) { 1522 next = (addr + PAGE_SIZE) & PAGE_MASK; 1523 continue; 1524 } 1525 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); 1526 1527 p4d = p4d_offset(pgd, addr); 1528 if (p4d_none(*p4d)) { 1529 next = (addr + PAGE_SIZE) & PAGE_MASK; 1530 continue; 1531 } 1532 get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); 1533 1534 pud = pud_offset(p4d, addr); 1535 if (pud_none(*pud)) { 1536 next = (addr + PAGE_SIZE) & PAGE_MASK; 1537 continue; 1538 } 1539 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); 1540 1541 if (!boot_cpu_has(X86_FEATURE_PSE)) { 1542 next = (addr + PAGE_SIZE) & PAGE_MASK; 1543 pmd = pmd_offset(pud, addr); 1544 if (pmd_none(*pmd)) 1545 continue; 1546 get_page_bootmem(section_nr, pmd_page(*pmd), 1547 MIX_SECTION_INFO); 1548 1549 pte = pte_offset_kernel(pmd, addr); 1550 if (pte_none(*pte)) 1551 continue; 1552 get_page_bootmem(section_nr, pte_page(*pte), 1553 SECTION_INFO); 1554 } else { 1555 next = pmd_addr_end(addr, end); 1556 1557 pmd = pmd_offset(pud, addr); 1558 if (pmd_none(*pmd)) 1559 continue; 1560 1561 nr_pmd_pages = 1 << get_order(PMD_SIZE); 1562 page = pmd_page(*pmd); 1563 while (nr_pmd_pages--) 1564 get_page_bootmem(section_nr, page++, 1565 SECTION_INFO); 1566 } 1567 } 1568 } 1569 #endif 1570 1571 void __meminit vmemmap_populate_print_last(void) 1572 { 1573 if (p_start) { 1574 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1575 addr_start, addr_end-1, p_start, p_end-1, node_start); 1576 p_start = NULL; 1577 p_end = NULL; 1578 node_start = 0; 1579 } 1580 } 1581 #endif 1582