1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/x86_64/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> 7 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> 8 */ 9 10 #include <linux/signal.h> 11 #include <linux/sched.h> 12 #include <linux/kernel.h> 13 #include <linux/errno.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/ptrace.h> 17 #include <linux/mman.h> 18 #include <linux/mm.h> 19 #include <linux/swap.h> 20 #include <linux/smp.h> 21 #include <linux/init.h> 22 #include <linux/initrd.h> 23 #include <linux/pagemap.h> 24 #include <linux/memblock.h> 25 #include <linux/proc_fs.h> 26 #include <linux/pci.h> 27 #include <linux/pfn.h> 28 #include <linux/poison.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/memory.h> 31 #include <linux/memory_hotplug.h> 32 #include <linux/memremap.h> 33 #include <linux/nmi.h> 34 #include <linux/gfp.h> 35 #include <linux/kcore.h> 36 37 #include <asm/processor.h> 38 #include <asm/bios_ebda.h> 39 #include <linux/uaccess.h> 40 #include <asm/pgalloc.h> 41 #include <asm/dma.h> 42 #include <asm/fixmap.h> 43 #include <asm/e820/api.h> 44 #include <asm/apic.h> 45 #include <asm/tlb.h> 46 #include <asm/mmu_context.h> 47 #include <asm/proto.h> 48 #include <asm/smp.h> 49 #include <asm/sections.h> 50 #include <asm/kdebug.h> 51 #include <asm/numa.h> 52 #include <asm/set_memory.h> 53 #include <asm/init.h> 54 #include <asm/uv/uv.h> 55 #include <asm/setup.h> 56 #include <asm/ftrace.h> 57 58 #include "mm_internal.h" 59 60 #include "ident_map.c" 61 62 #define DEFINE_POPULATE(fname, type1, type2, init) \ 63 static inline void fname##_init(struct mm_struct *mm, \ 64 type1##_t *arg1, type2##_t *arg2, bool init) \ 65 { \ 66 if (init) \ 67 fname##_safe(mm, arg1, arg2); \ 68 else \ 69 fname(mm, arg1, arg2); \ 70 } 71 72 DEFINE_POPULATE(p4d_populate, p4d, pud, init) 73 DEFINE_POPULATE(pgd_populate, pgd, p4d, init) 74 DEFINE_POPULATE(pud_populate, pud, pmd, init) 75 DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) 76 77 #define DEFINE_ENTRY(type1, type2, init) \ 78 static inline void set_##type1##_init(type1##_t *arg1, \ 79 type2##_t arg2, bool init) \ 80 { \ 81 if (init) \ 82 set_##type1##_safe(arg1, arg2); \ 83 else \ 84 set_##type1(arg1, arg2); \ 85 } 86 87 DEFINE_ENTRY(p4d, p4d, init) 88 DEFINE_ENTRY(pud, pud, init) 89 DEFINE_ENTRY(pmd, pmd, init) 90 DEFINE_ENTRY(pte, pte, init) 91 92 93 /* 94 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the 95 * physical space so we can cache the place of the first one and move 96 * around without checking the pgd every time. 97 */ 98 99 /* Bits supported by the hardware: */ 100 pteval_t __supported_pte_mask __read_mostly = ~0; 101 /* Bits allowed in normal kernel mappings: */ 102 pteval_t __default_kernel_pte_mask __read_mostly = ~0; 103 EXPORT_SYMBOL_GPL(__supported_pte_mask); 104 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ 105 EXPORT_SYMBOL(__default_kernel_pte_mask); 106 107 int force_personality32; 108 109 /* 110 * noexec32=on|off 111 * Control non executable heap for 32bit processes. 112 * To control the stack too use noexec=off 113 * 114 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) 115 * off PROT_READ implies PROT_EXEC 116 */ 117 static int __init nonx32_setup(char *str) 118 { 119 if (!strcmp(str, "on")) 120 force_personality32 &= ~READ_IMPLIES_EXEC; 121 else if (!strcmp(str, "off")) 122 force_personality32 |= READ_IMPLIES_EXEC; 123 return 1; 124 } 125 __setup("noexec32=", nonx32_setup); 126 127 static void sync_global_pgds_l5(unsigned long start, unsigned long end) 128 { 129 unsigned long addr; 130 131 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 132 const pgd_t *pgd_ref = pgd_offset_k(addr); 133 struct page *page; 134 135 /* Check for overflow */ 136 if (addr < start) 137 break; 138 139 if (pgd_none(*pgd_ref)) 140 continue; 141 142 spin_lock(&pgd_lock); 143 list_for_each_entry(page, &pgd_list, lru) { 144 pgd_t *pgd; 145 spinlock_t *pgt_lock; 146 147 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 148 /* the pgt_lock only for Xen */ 149 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 150 spin_lock(pgt_lock); 151 152 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) 153 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 154 155 if (pgd_none(*pgd)) 156 set_pgd(pgd, *pgd_ref); 157 158 spin_unlock(pgt_lock); 159 } 160 spin_unlock(&pgd_lock); 161 } 162 } 163 164 static void sync_global_pgds_l4(unsigned long start, unsigned long end) 165 { 166 unsigned long addr; 167 168 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 169 pgd_t *pgd_ref = pgd_offset_k(addr); 170 const p4d_t *p4d_ref; 171 struct page *page; 172 173 /* 174 * With folded p4d, pgd_none() is always false, we need to 175 * handle synchonization on p4d level. 176 */ 177 MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); 178 p4d_ref = p4d_offset(pgd_ref, addr); 179 180 if (p4d_none(*p4d_ref)) 181 continue; 182 183 spin_lock(&pgd_lock); 184 list_for_each_entry(page, &pgd_list, lru) { 185 pgd_t *pgd; 186 p4d_t *p4d; 187 spinlock_t *pgt_lock; 188 189 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 190 p4d = p4d_offset(pgd, addr); 191 /* the pgt_lock only for Xen */ 192 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 193 spin_lock(pgt_lock); 194 195 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) 196 BUG_ON(p4d_page_vaddr(*p4d) 197 != p4d_page_vaddr(*p4d_ref)); 198 199 if (p4d_none(*p4d)) 200 set_p4d(p4d, *p4d_ref); 201 202 spin_unlock(pgt_lock); 203 } 204 spin_unlock(&pgd_lock); 205 } 206 } 207 208 /* 209 * When memory was added make sure all the processes MM have 210 * suitable PGD entries in the local PGD level page. 211 */ 212 static void sync_global_pgds(unsigned long start, unsigned long end) 213 { 214 if (pgtable_l5_enabled()) 215 sync_global_pgds_l5(start, end); 216 else 217 sync_global_pgds_l4(start, end); 218 } 219 220 void arch_sync_kernel_mappings(unsigned long start, unsigned long end) 221 { 222 sync_global_pgds(start, end); 223 } 224 225 /* 226 * NOTE: This function is marked __ref because it calls __init function 227 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. 228 */ 229 static __ref void *spp_getpage(void) 230 { 231 void *ptr; 232 233 if (after_bootmem) 234 ptr = (void *) get_zeroed_page(GFP_ATOMIC); 235 else 236 ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 237 238 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { 239 panic("set_pte_phys: cannot allocate page data %s\n", 240 after_bootmem ? "after bootmem" : ""); 241 } 242 243 pr_debug("spp_getpage %p\n", ptr); 244 245 return ptr; 246 } 247 248 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) 249 { 250 if (pgd_none(*pgd)) { 251 p4d_t *p4d = (p4d_t *)spp_getpage(); 252 pgd_populate(&init_mm, pgd, p4d); 253 if (p4d != p4d_offset(pgd, 0)) 254 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", 255 p4d, p4d_offset(pgd, 0)); 256 } 257 return p4d_offset(pgd, vaddr); 258 } 259 260 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) 261 { 262 if (p4d_none(*p4d)) { 263 pud_t *pud = (pud_t *)spp_getpage(); 264 p4d_populate(&init_mm, p4d, pud); 265 if (pud != pud_offset(p4d, 0)) 266 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 267 pud, pud_offset(p4d, 0)); 268 } 269 return pud_offset(p4d, vaddr); 270 } 271 272 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) 273 { 274 if (pud_none(*pud)) { 275 pmd_t *pmd = (pmd_t *) spp_getpage(); 276 pud_populate(&init_mm, pud, pmd); 277 if (pmd != pmd_offset(pud, 0)) 278 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", 279 pmd, pmd_offset(pud, 0)); 280 } 281 return pmd_offset(pud, vaddr); 282 } 283 284 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) 285 { 286 if (pmd_none(*pmd)) { 287 pte_t *pte = (pte_t *) spp_getpage(); 288 pmd_populate_kernel(&init_mm, pmd, pte); 289 if (pte != pte_offset_kernel(pmd, 0)) 290 printk(KERN_ERR "PAGETABLE BUG #03!\n"); 291 } 292 return pte_offset_kernel(pmd, vaddr); 293 } 294 295 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) 296 { 297 pmd_t *pmd = fill_pmd(pud, vaddr); 298 pte_t *pte = fill_pte(pmd, vaddr); 299 300 set_pte(pte, new_pte); 301 302 /* 303 * It's enough to flush this one mapping. 304 * (PGE mappings get flushed as well) 305 */ 306 flush_tlb_one_kernel(vaddr); 307 } 308 309 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) 310 { 311 p4d_t *p4d = p4d_page + p4d_index(vaddr); 312 pud_t *pud = fill_pud(p4d, vaddr); 313 314 __set_pte_vaddr(pud, vaddr, new_pte); 315 } 316 317 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) 318 { 319 pud_t *pud = pud_page + pud_index(vaddr); 320 321 __set_pte_vaddr(pud, vaddr, new_pte); 322 } 323 324 void set_pte_vaddr(unsigned long vaddr, pte_t pteval) 325 { 326 pgd_t *pgd; 327 p4d_t *p4d_page; 328 329 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); 330 331 pgd = pgd_offset_k(vaddr); 332 if (pgd_none(*pgd)) { 333 printk(KERN_ERR 334 "PGD FIXMAP MISSING, it should be setup in head.S!\n"); 335 return; 336 } 337 338 p4d_page = p4d_offset(pgd, 0); 339 set_pte_vaddr_p4d(p4d_page, vaddr, pteval); 340 } 341 342 pmd_t * __init populate_extra_pmd(unsigned long vaddr) 343 { 344 pgd_t *pgd; 345 p4d_t *p4d; 346 pud_t *pud; 347 348 pgd = pgd_offset_k(vaddr); 349 p4d = fill_p4d(pgd, vaddr); 350 pud = fill_pud(p4d, vaddr); 351 return fill_pmd(pud, vaddr); 352 } 353 354 pte_t * __init populate_extra_pte(unsigned long vaddr) 355 { 356 pmd_t *pmd; 357 358 pmd = populate_extra_pmd(vaddr); 359 return fill_pte(pmd, vaddr); 360 } 361 362 /* 363 * Create large page table mappings for a range of physical addresses. 364 */ 365 static void __init __init_extra_mapping(unsigned long phys, unsigned long size, 366 enum page_cache_mode cache) 367 { 368 pgd_t *pgd; 369 p4d_t *p4d; 370 pud_t *pud; 371 pmd_t *pmd; 372 pgprot_t prot; 373 374 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | 375 protval_4k_2_large(cachemode2protval(cache)); 376 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); 377 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { 378 pgd = pgd_offset_k((unsigned long)__va(phys)); 379 if (pgd_none(*pgd)) { 380 p4d = (p4d_t *) spp_getpage(); 381 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | 382 _PAGE_USER)); 383 } 384 p4d = p4d_offset(pgd, (unsigned long)__va(phys)); 385 if (p4d_none(*p4d)) { 386 pud = (pud_t *) spp_getpage(); 387 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | 388 _PAGE_USER)); 389 } 390 pud = pud_offset(p4d, (unsigned long)__va(phys)); 391 if (pud_none(*pud)) { 392 pmd = (pmd_t *) spp_getpage(); 393 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | 394 _PAGE_USER)); 395 } 396 pmd = pmd_offset(pud, phys); 397 BUG_ON(!pmd_none(*pmd)); 398 set_pmd(pmd, __pmd(phys | pgprot_val(prot))); 399 } 400 } 401 402 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) 403 { 404 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); 405 } 406 407 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) 408 { 409 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); 410 } 411 412 /* 413 * The head.S code sets up the kernel high mapping: 414 * 415 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) 416 * 417 * phys_base holds the negative offset to the kernel, which is added 418 * to the compile time generated pmds. This results in invalid pmds up 419 * to the point where we hit the physaddr 0 mapping. 420 * 421 * We limit the mappings to the region from _text to _brk_end. _brk_end 422 * is rounded up to the 2MB boundary. This catches the invalid pmds as 423 * well, as they are located before _text: 424 */ 425 void __init cleanup_highmap(void) 426 { 427 unsigned long vaddr = __START_KERNEL_map; 428 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; 429 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 430 pmd_t *pmd = level2_kernel_pgt; 431 432 /* 433 * Native path, max_pfn_mapped is not set yet. 434 * Xen has valid max_pfn_mapped set in 435 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). 436 */ 437 if (max_pfn_mapped) 438 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); 439 440 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { 441 if (pmd_none(*pmd)) 442 continue; 443 if (vaddr < (unsigned long) _text || vaddr > end) 444 set_pmd(pmd, __pmd(0)); 445 } 446 } 447 448 /* 449 * Create PTE level page table mapping for physical addresses. 450 * It returns the last physical address mapped. 451 */ 452 static unsigned long __meminit 453 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, 454 pgprot_t prot, bool init) 455 { 456 unsigned long pages = 0, paddr_next; 457 unsigned long paddr_last = paddr_end; 458 pte_t *pte; 459 int i; 460 461 pte = pte_page + pte_index(paddr); 462 i = pte_index(paddr); 463 464 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { 465 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; 466 if (paddr >= paddr_end) { 467 if (!after_bootmem && 468 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 469 E820_TYPE_RAM) && 470 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 471 E820_TYPE_RESERVED_KERN)) 472 set_pte_init(pte, __pte(0), init); 473 continue; 474 } 475 476 /* 477 * We will re-use the existing mapping. 478 * Xen for example has some special requirements, like mapping 479 * pagetable pages as RO. So assume someone who pre-setup 480 * these mappings are more intelligent. 481 */ 482 if (!pte_none(*pte)) { 483 if (!after_bootmem) 484 pages++; 485 continue; 486 } 487 488 if (0) 489 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, 490 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); 491 pages++; 492 set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); 493 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; 494 } 495 496 update_page_count(PG_LEVEL_4K, pages); 497 498 return paddr_last; 499 } 500 501 /* 502 * Create PMD level page table mapping for physical addresses. The virtual 503 * and physical address have to be aligned at this level. 504 * It returns the last physical address mapped. 505 */ 506 static unsigned long __meminit 507 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, 508 unsigned long page_size_mask, pgprot_t prot, bool init) 509 { 510 unsigned long pages = 0, paddr_next; 511 unsigned long paddr_last = paddr_end; 512 513 int i = pmd_index(paddr); 514 515 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { 516 pmd_t *pmd = pmd_page + pmd_index(paddr); 517 pte_t *pte; 518 pgprot_t new_prot = prot; 519 520 paddr_next = (paddr & PMD_MASK) + PMD_SIZE; 521 if (paddr >= paddr_end) { 522 if (!after_bootmem && 523 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 524 E820_TYPE_RAM) && 525 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 526 E820_TYPE_RESERVED_KERN)) 527 set_pmd_init(pmd, __pmd(0), init); 528 continue; 529 } 530 531 if (!pmd_none(*pmd)) { 532 if (!pmd_large(*pmd)) { 533 spin_lock(&init_mm.page_table_lock); 534 pte = (pte_t *)pmd_page_vaddr(*pmd); 535 paddr_last = phys_pte_init(pte, paddr, 536 paddr_end, prot, 537 init); 538 spin_unlock(&init_mm.page_table_lock); 539 continue; 540 } 541 /* 542 * If we are ok with PG_LEVEL_2M mapping, then we will 543 * use the existing mapping, 544 * 545 * Otherwise, we will split the large page mapping but 546 * use the same existing protection bits except for 547 * large page, so that we don't violate Intel's TLB 548 * Application note (317080) which says, while changing 549 * the page sizes, new and old translations should 550 * not differ with respect to page frame and 551 * attributes. 552 */ 553 if (page_size_mask & (1 << PG_LEVEL_2M)) { 554 if (!after_bootmem) 555 pages++; 556 paddr_last = paddr_next; 557 continue; 558 } 559 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); 560 } 561 562 if (page_size_mask & (1<<PG_LEVEL_2M)) { 563 pages++; 564 spin_lock(&init_mm.page_table_lock); 565 set_pte_init((pte_t *)pmd, 566 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, 567 __pgprot(pgprot_val(prot) | _PAGE_PSE)), 568 init); 569 spin_unlock(&init_mm.page_table_lock); 570 paddr_last = paddr_next; 571 continue; 572 } 573 574 pte = alloc_low_page(); 575 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); 576 577 spin_lock(&init_mm.page_table_lock); 578 pmd_populate_kernel_init(&init_mm, pmd, pte, init); 579 spin_unlock(&init_mm.page_table_lock); 580 } 581 update_page_count(PG_LEVEL_2M, pages); 582 return paddr_last; 583 } 584 585 /* 586 * Create PUD level page table mapping for physical addresses. The virtual 587 * and physical address do not have to be aligned at this level. KASLR can 588 * randomize virtual addresses up to this level. 589 * It returns the last physical address mapped. 590 */ 591 static unsigned long __meminit 592 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, 593 unsigned long page_size_mask, pgprot_t _prot, bool init) 594 { 595 unsigned long pages = 0, paddr_next; 596 unsigned long paddr_last = paddr_end; 597 unsigned long vaddr = (unsigned long)__va(paddr); 598 int i = pud_index(vaddr); 599 600 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { 601 pud_t *pud; 602 pmd_t *pmd; 603 pgprot_t prot = _prot; 604 605 vaddr = (unsigned long)__va(paddr); 606 pud = pud_page + pud_index(vaddr); 607 paddr_next = (paddr & PUD_MASK) + PUD_SIZE; 608 609 if (paddr >= paddr_end) { 610 if (!after_bootmem && 611 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 612 E820_TYPE_RAM) && 613 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 614 E820_TYPE_RESERVED_KERN)) 615 set_pud_init(pud, __pud(0), init); 616 continue; 617 } 618 619 if (!pud_none(*pud)) { 620 if (!pud_large(*pud)) { 621 pmd = pmd_offset(pud, 0); 622 paddr_last = phys_pmd_init(pmd, paddr, 623 paddr_end, 624 page_size_mask, 625 prot, init); 626 continue; 627 } 628 /* 629 * If we are ok with PG_LEVEL_1G mapping, then we will 630 * use the existing mapping. 631 * 632 * Otherwise, we will split the gbpage mapping but use 633 * the same existing protection bits except for large 634 * page, so that we don't violate Intel's TLB 635 * Application note (317080) which says, while changing 636 * the page sizes, new and old translations should 637 * not differ with respect to page frame and 638 * attributes. 639 */ 640 if (page_size_mask & (1 << PG_LEVEL_1G)) { 641 if (!after_bootmem) 642 pages++; 643 paddr_last = paddr_next; 644 continue; 645 } 646 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); 647 } 648 649 if (page_size_mask & (1<<PG_LEVEL_1G)) { 650 pages++; 651 spin_lock(&init_mm.page_table_lock); 652 653 prot = __pgprot(pgprot_val(prot) | __PAGE_KERNEL_LARGE); 654 655 set_pte_init((pte_t *)pud, 656 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, 657 prot), 658 init); 659 spin_unlock(&init_mm.page_table_lock); 660 paddr_last = paddr_next; 661 continue; 662 } 663 664 pmd = alloc_low_page(); 665 paddr_last = phys_pmd_init(pmd, paddr, paddr_end, 666 page_size_mask, prot, init); 667 668 spin_lock(&init_mm.page_table_lock); 669 pud_populate_init(&init_mm, pud, pmd, init); 670 spin_unlock(&init_mm.page_table_lock); 671 } 672 673 update_page_count(PG_LEVEL_1G, pages); 674 675 return paddr_last; 676 } 677 678 static unsigned long __meminit 679 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, 680 unsigned long page_size_mask, pgprot_t prot, bool init) 681 { 682 unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; 683 684 paddr_last = paddr_end; 685 vaddr = (unsigned long)__va(paddr); 686 vaddr_end = (unsigned long)__va(paddr_end); 687 688 if (!pgtable_l5_enabled()) 689 return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, 690 page_size_mask, prot, init); 691 692 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 693 p4d_t *p4d = p4d_page + p4d_index(vaddr); 694 pud_t *pud; 695 696 vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE; 697 paddr = __pa(vaddr); 698 699 if (paddr >= paddr_end) { 700 paddr_next = __pa(vaddr_next); 701 if (!after_bootmem && 702 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 703 E820_TYPE_RAM) && 704 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 705 E820_TYPE_RESERVED_KERN)) 706 set_p4d_init(p4d, __p4d(0), init); 707 continue; 708 } 709 710 if (!p4d_none(*p4d)) { 711 pud = pud_offset(p4d, 0); 712 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 713 page_size_mask, prot, init); 714 continue; 715 } 716 717 pud = alloc_low_page(); 718 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 719 page_size_mask, prot, init); 720 721 spin_lock(&init_mm.page_table_lock); 722 p4d_populate_init(&init_mm, p4d, pud, init); 723 spin_unlock(&init_mm.page_table_lock); 724 } 725 726 return paddr_last; 727 } 728 729 static unsigned long __meminit 730 __kernel_physical_mapping_init(unsigned long paddr_start, 731 unsigned long paddr_end, 732 unsigned long page_size_mask, 733 pgprot_t prot, bool init) 734 { 735 bool pgd_changed = false; 736 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; 737 738 paddr_last = paddr_end; 739 vaddr = (unsigned long)__va(paddr_start); 740 vaddr_end = (unsigned long)__va(paddr_end); 741 vaddr_start = vaddr; 742 743 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 744 pgd_t *pgd = pgd_offset_k(vaddr); 745 p4d_t *p4d; 746 747 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; 748 749 if (pgd_val(*pgd)) { 750 p4d = (p4d_t *)pgd_page_vaddr(*pgd); 751 paddr_last = phys_p4d_init(p4d, __pa(vaddr), 752 __pa(vaddr_end), 753 page_size_mask, 754 prot, init); 755 continue; 756 } 757 758 p4d = alloc_low_page(); 759 paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), 760 page_size_mask, prot, init); 761 762 spin_lock(&init_mm.page_table_lock); 763 if (pgtable_l5_enabled()) 764 pgd_populate_init(&init_mm, pgd, p4d, init); 765 else 766 p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), 767 (pud_t *) p4d, init); 768 769 spin_unlock(&init_mm.page_table_lock); 770 pgd_changed = true; 771 } 772 773 if (pgd_changed) 774 sync_global_pgds(vaddr_start, vaddr_end - 1); 775 776 return paddr_last; 777 } 778 779 780 /* 781 * Create page table mapping for the physical memory for specific physical 782 * addresses. Note that it can only be used to populate non-present entries. 783 * The virtual and physical addresses have to be aligned on PMD level 784 * down. It returns the last physical address mapped. 785 */ 786 unsigned long __meminit 787 kernel_physical_mapping_init(unsigned long paddr_start, 788 unsigned long paddr_end, 789 unsigned long page_size_mask, pgprot_t prot) 790 { 791 return __kernel_physical_mapping_init(paddr_start, paddr_end, 792 page_size_mask, prot, true); 793 } 794 795 /* 796 * This function is similar to kernel_physical_mapping_init() above with the 797 * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() 798 * when updating the mapping. The caller is responsible to flush the TLBs after 799 * the function returns. 800 */ 801 unsigned long __meminit 802 kernel_physical_mapping_change(unsigned long paddr_start, 803 unsigned long paddr_end, 804 unsigned long page_size_mask) 805 { 806 return __kernel_physical_mapping_init(paddr_start, paddr_end, 807 page_size_mask, PAGE_KERNEL, 808 false); 809 } 810 811 #ifndef CONFIG_NUMA 812 void __init initmem_init(void) 813 { 814 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); 815 } 816 #endif 817 818 void __init paging_init(void) 819 { 820 sparse_init(); 821 822 /* 823 * clear the default setting with node 0 824 * note: don't use nodes_clear here, that is really clearing when 825 * numa support is not compiled in, and later node_set_state 826 * will not set it back. 827 */ 828 node_clear_state(0, N_MEMORY); 829 node_clear_state(0, N_NORMAL_MEMORY); 830 831 zone_sizes_init(); 832 } 833 834 /* 835 * Memory hotplug specific functions 836 */ 837 #ifdef CONFIG_MEMORY_HOTPLUG 838 /* 839 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need 840 * updating. 841 */ 842 static void update_end_of_memory_vars(u64 start, u64 size) 843 { 844 unsigned long end_pfn = PFN_UP(start + size); 845 846 if (end_pfn > max_pfn) { 847 max_pfn = end_pfn; 848 max_low_pfn = end_pfn; 849 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; 850 } 851 } 852 853 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, 854 struct mhp_params *params) 855 { 856 int ret; 857 858 ret = __add_pages(nid, start_pfn, nr_pages, params); 859 WARN_ON_ONCE(ret); 860 861 /* update max_pfn, max_low_pfn and high_memory */ 862 update_end_of_memory_vars(start_pfn << PAGE_SHIFT, 863 nr_pages << PAGE_SHIFT); 864 865 return ret; 866 } 867 868 int arch_add_memory(int nid, u64 start, u64 size, 869 struct mhp_params *params) 870 { 871 unsigned long start_pfn = start >> PAGE_SHIFT; 872 unsigned long nr_pages = size >> PAGE_SHIFT; 873 874 init_memory_mapping(start, start + size, params->pgprot); 875 876 return add_pages(nid, start_pfn, nr_pages, params); 877 } 878 879 #define PAGE_INUSE 0xFD 880 881 static void __meminit free_pagetable(struct page *page, int order) 882 { 883 unsigned long magic; 884 unsigned int nr_pages = 1 << order; 885 886 /* bootmem page has reserved flag */ 887 if (PageReserved(page)) { 888 __ClearPageReserved(page); 889 890 magic = (unsigned long)page->freelist; 891 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { 892 while (nr_pages--) 893 put_page_bootmem(page++); 894 } else 895 while (nr_pages--) 896 free_reserved_page(page++); 897 } else 898 free_pages((unsigned long)page_address(page), order); 899 } 900 901 static void __meminit free_hugepage_table(struct page *page, 902 struct vmem_altmap *altmap) 903 { 904 if (altmap) 905 vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); 906 else 907 free_pagetable(page, get_order(PMD_SIZE)); 908 } 909 910 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 911 { 912 pte_t *pte; 913 int i; 914 915 for (i = 0; i < PTRS_PER_PTE; i++) { 916 pte = pte_start + i; 917 if (!pte_none(*pte)) 918 return; 919 } 920 921 /* free a pte talbe */ 922 free_pagetable(pmd_page(*pmd), 0); 923 spin_lock(&init_mm.page_table_lock); 924 pmd_clear(pmd); 925 spin_unlock(&init_mm.page_table_lock); 926 } 927 928 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) 929 { 930 pmd_t *pmd; 931 int i; 932 933 for (i = 0; i < PTRS_PER_PMD; i++) { 934 pmd = pmd_start + i; 935 if (!pmd_none(*pmd)) 936 return; 937 } 938 939 /* free a pmd talbe */ 940 free_pagetable(pud_page(*pud), 0); 941 spin_lock(&init_mm.page_table_lock); 942 pud_clear(pud); 943 spin_unlock(&init_mm.page_table_lock); 944 } 945 946 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 947 { 948 pud_t *pud; 949 int i; 950 951 for (i = 0; i < PTRS_PER_PUD; i++) { 952 pud = pud_start + i; 953 if (!pud_none(*pud)) 954 return; 955 } 956 957 /* free a pud talbe */ 958 free_pagetable(p4d_page(*p4d), 0); 959 spin_lock(&init_mm.page_table_lock); 960 p4d_clear(p4d); 961 spin_unlock(&init_mm.page_table_lock); 962 } 963 964 static void __meminit 965 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, 966 bool direct) 967 { 968 unsigned long next, pages = 0; 969 pte_t *pte; 970 void *page_addr; 971 phys_addr_t phys_addr; 972 973 pte = pte_start + pte_index(addr); 974 for (; addr < end; addr = next, pte++) { 975 next = (addr + PAGE_SIZE) & PAGE_MASK; 976 if (next > end) 977 next = end; 978 979 if (!pte_present(*pte)) 980 continue; 981 982 /* 983 * We mapped [0,1G) memory as identity mapping when 984 * initializing, in arch/x86/kernel/head_64.S. These 985 * pagetables cannot be removed. 986 */ 987 phys_addr = pte_val(*pte) + (addr & PAGE_MASK); 988 if (phys_addr < (phys_addr_t)0x40000000) 989 return; 990 991 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) { 992 /* 993 * Do not free direct mapping pages since they were 994 * freed when offlining, or simplely not in use. 995 */ 996 if (!direct) 997 free_pagetable(pte_page(*pte), 0); 998 999 spin_lock(&init_mm.page_table_lock); 1000 pte_clear(&init_mm, addr, pte); 1001 spin_unlock(&init_mm.page_table_lock); 1002 1003 /* For non-direct mapping, pages means nothing. */ 1004 pages++; 1005 } else { 1006 /* 1007 * If we are here, we are freeing vmemmap pages since 1008 * direct mapped memory ranges to be freed are aligned. 1009 * 1010 * If we are not removing the whole page, it means 1011 * other page structs in this page are being used and 1012 * we canot remove them. So fill the unused page_structs 1013 * with 0xFD, and remove the page when it is wholly 1014 * filled with 0xFD. 1015 */ 1016 memset((void *)addr, PAGE_INUSE, next - addr); 1017 1018 page_addr = page_address(pte_page(*pte)); 1019 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) { 1020 free_pagetable(pte_page(*pte), 0); 1021 1022 spin_lock(&init_mm.page_table_lock); 1023 pte_clear(&init_mm, addr, pte); 1024 spin_unlock(&init_mm.page_table_lock); 1025 } 1026 } 1027 } 1028 1029 /* Call free_pte_table() in remove_pmd_table(). */ 1030 flush_tlb_all(); 1031 if (direct) 1032 update_page_count(PG_LEVEL_4K, -pages); 1033 } 1034 1035 static void __meminit 1036 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, 1037 bool direct, struct vmem_altmap *altmap) 1038 { 1039 unsigned long next, pages = 0; 1040 pte_t *pte_base; 1041 pmd_t *pmd; 1042 void *page_addr; 1043 1044 pmd = pmd_start + pmd_index(addr); 1045 for (; addr < end; addr = next, pmd++) { 1046 next = pmd_addr_end(addr, end); 1047 1048 if (!pmd_present(*pmd)) 1049 continue; 1050 1051 if (pmd_large(*pmd)) { 1052 if (IS_ALIGNED(addr, PMD_SIZE) && 1053 IS_ALIGNED(next, PMD_SIZE)) { 1054 if (!direct) 1055 free_hugepage_table(pmd_page(*pmd), 1056 altmap); 1057 1058 spin_lock(&init_mm.page_table_lock); 1059 pmd_clear(pmd); 1060 spin_unlock(&init_mm.page_table_lock); 1061 pages++; 1062 } else { 1063 /* If here, we are freeing vmemmap pages. */ 1064 memset((void *)addr, PAGE_INUSE, next - addr); 1065 1066 page_addr = page_address(pmd_page(*pmd)); 1067 if (!memchr_inv(page_addr, PAGE_INUSE, 1068 PMD_SIZE)) { 1069 free_hugepage_table(pmd_page(*pmd), 1070 altmap); 1071 1072 spin_lock(&init_mm.page_table_lock); 1073 pmd_clear(pmd); 1074 spin_unlock(&init_mm.page_table_lock); 1075 } 1076 } 1077 1078 continue; 1079 } 1080 1081 pte_base = (pte_t *)pmd_page_vaddr(*pmd); 1082 remove_pte_table(pte_base, addr, next, direct); 1083 free_pte_table(pte_base, pmd); 1084 } 1085 1086 /* Call free_pmd_table() in remove_pud_table(). */ 1087 if (direct) 1088 update_page_count(PG_LEVEL_2M, -pages); 1089 } 1090 1091 static void __meminit 1092 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, 1093 struct vmem_altmap *altmap, bool direct) 1094 { 1095 unsigned long next, pages = 0; 1096 pmd_t *pmd_base; 1097 pud_t *pud; 1098 void *page_addr; 1099 1100 pud = pud_start + pud_index(addr); 1101 for (; addr < end; addr = next, pud++) { 1102 next = pud_addr_end(addr, end); 1103 1104 if (!pud_present(*pud)) 1105 continue; 1106 1107 if (pud_large(*pud)) { 1108 if (IS_ALIGNED(addr, PUD_SIZE) && 1109 IS_ALIGNED(next, PUD_SIZE)) { 1110 if (!direct) 1111 free_pagetable(pud_page(*pud), 1112 get_order(PUD_SIZE)); 1113 1114 spin_lock(&init_mm.page_table_lock); 1115 pud_clear(pud); 1116 spin_unlock(&init_mm.page_table_lock); 1117 pages++; 1118 } else { 1119 /* If here, we are freeing vmemmap pages. */ 1120 memset((void *)addr, PAGE_INUSE, next - addr); 1121 1122 page_addr = page_address(pud_page(*pud)); 1123 if (!memchr_inv(page_addr, PAGE_INUSE, 1124 PUD_SIZE)) { 1125 free_pagetable(pud_page(*pud), 1126 get_order(PUD_SIZE)); 1127 1128 spin_lock(&init_mm.page_table_lock); 1129 pud_clear(pud); 1130 spin_unlock(&init_mm.page_table_lock); 1131 } 1132 } 1133 1134 continue; 1135 } 1136 1137 pmd_base = pmd_offset(pud, 0); 1138 remove_pmd_table(pmd_base, addr, next, direct, altmap); 1139 free_pmd_table(pmd_base, pud); 1140 } 1141 1142 if (direct) 1143 update_page_count(PG_LEVEL_1G, -pages); 1144 } 1145 1146 static void __meminit 1147 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, 1148 struct vmem_altmap *altmap, bool direct) 1149 { 1150 unsigned long next, pages = 0; 1151 pud_t *pud_base; 1152 p4d_t *p4d; 1153 1154 p4d = p4d_start + p4d_index(addr); 1155 for (; addr < end; addr = next, p4d++) { 1156 next = p4d_addr_end(addr, end); 1157 1158 if (!p4d_present(*p4d)) 1159 continue; 1160 1161 BUILD_BUG_ON(p4d_large(*p4d)); 1162 1163 pud_base = pud_offset(p4d, 0); 1164 remove_pud_table(pud_base, addr, next, altmap, direct); 1165 /* 1166 * For 4-level page tables we do not want to free PUDs, but in the 1167 * 5-level case we should free them. This code will have to change 1168 * to adapt for boot-time switching between 4 and 5 level page tables. 1169 */ 1170 if (pgtable_l5_enabled()) 1171 free_pud_table(pud_base, p4d); 1172 } 1173 1174 if (direct) 1175 update_page_count(PG_LEVEL_512G, -pages); 1176 } 1177 1178 /* start and end are both virtual address. */ 1179 static void __meminit 1180 remove_pagetable(unsigned long start, unsigned long end, bool direct, 1181 struct vmem_altmap *altmap) 1182 { 1183 unsigned long next; 1184 unsigned long addr; 1185 pgd_t *pgd; 1186 p4d_t *p4d; 1187 1188 for (addr = start; addr < end; addr = next) { 1189 next = pgd_addr_end(addr, end); 1190 1191 pgd = pgd_offset_k(addr); 1192 if (!pgd_present(*pgd)) 1193 continue; 1194 1195 p4d = p4d_offset(pgd, 0); 1196 remove_p4d_table(p4d, addr, next, altmap, direct); 1197 } 1198 1199 flush_tlb_all(); 1200 } 1201 1202 void __ref vmemmap_free(unsigned long start, unsigned long end, 1203 struct vmem_altmap *altmap) 1204 { 1205 remove_pagetable(start, end, false, altmap); 1206 } 1207 1208 static void __meminit 1209 kernel_physical_mapping_remove(unsigned long start, unsigned long end) 1210 { 1211 start = (unsigned long)__va(start); 1212 end = (unsigned long)__va(end); 1213 1214 remove_pagetable(start, end, true, NULL); 1215 } 1216 1217 void __ref arch_remove_memory(int nid, u64 start, u64 size, 1218 struct vmem_altmap *altmap) 1219 { 1220 unsigned long start_pfn = start >> PAGE_SHIFT; 1221 unsigned long nr_pages = size >> PAGE_SHIFT; 1222 1223 __remove_pages(start_pfn, nr_pages, altmap); 1224 kernel_physical_mapping_remove(start, start + size); 1225 } 1226 #endif /* CONFIG_MEMORY_HOTPLUG */ 1227 1228 static struct kcore_list kcore_vsyscall; 1229 1230 static void __init register_page_bootmem_info(void) 1231 { 1232 #ifdef CONFIG_NUMA 1233 int i; 1234 1235 for_each_online_node(i) 1236 register_page_bootmem_info_node(NODE_DATA(i)); 1237 #endif 1238 } 1239 1240 /* 1241 * Pre-allocates page-table pages for the vmalloc area in the kernel page-table. 1242 * Only the level which needs to be synchronized between all page-tables is 1243 * allocated because the synchronization can be expensive. 1244 */ 1245 static void __init preallocate_vmalloc_pages(void) 1246 { 1247 unsigned long addr; 1248 const char *lvl; 1249 1250 for (addr = VMALLOC_START; addr <= VMALLOC_END; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 1251 pgd_t *pgd = pgd_offset_k(addr); 1252 p4d_t *p4d; 1253 pud_t *pud; 1254 1255 lvl = "p4d"; 1256 p4d = p4d_alloc(&init_mm, pgd, addr); 1257 if (!p4d) 1258 goto failed; 1259 1260 /* 1261 * With 5-level paging the P4D level is not folded. So the PGDs 1262 * are now populated and there is no need to walk down to the 1263 * PUD level. 1264 */ 1265 if (pgtable_l5_enabled()) 1266 continue; 1267 1268 lvl = "pud"; 1269 pud = pud_alloc(&init_mm, p4d, addr); 1270 if (!pud) 1271 goto failed; 1272 } 1273 1274 return; 1275 1276 failed: 1277 1278 /* 1279 * The pages have to be there now or they will be missing in 1280 * process page-tables later. 1281 */ 1282 panic("Failed to pre-allocate %s pages for vmalloc area\n", lvl); 1283 } 1284 1285 void __init mem_init(void) 1286 { 1287 pci_iommu_alloc(); 1288 1289 /* clear_bss() already clear the empty_zero_page */ 1290 1291 /* this will put all memory onto the freelists */ 1292 memblock_free_all(); 1293 after_bootmem = 1; 1294 x86_init.hyper.init_after_bootmem(); 1295 1296 /* 1297 * Must be done after boot memory is put on freelist, because here we 1298 * might set fields in deferred struct pages that have not yet been 1299 * initialized, and memblock_free_all() initializes all the reserved 1300 * deferred pages for us. 1301 */ 1302 register_page_bootmem_info(); 1303 1304 /* Register memory areas for /proc/kcore */ 1305 if (get_gate_vma(&init_mm)) 1306 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); 1307 1308 preallocate_vmalloc_pages(); 1309 1310 mem_init_print_info(NULL); 1311 } 1312 1313 #ifdef CONFIG_DEFERRED_STRUCT_PAGE_INIT 1314 int __init deferred_page_init_max_threads(const struct cpumask *node_cpumask) 1315 { 1316 /* 1317 * More CPUs always led to greater speedups on tested systems, up to 1318 * all the nodes' CPUs. Use all since the system is otherwise idle 1319 * now. 1320 */ 1321 return max_t(int, cpumask_weight(node_cpumask), 1); 1322 } 1323 #endif 1324 1325 int kernel_set_to_readonly; 1326 1327 void mark_rodata_ro(void) 1328 { 1329 unsigned long start = PFN_ALIGN(_text); 1330 unsigned long rodata_start = PFN_ALIGN(__start_rodata); 1331 unsigned long end = (unsigned long)__end_rodata_hpage_align; 1332 unsigned long text_end = PFN_ALIGN(_etext); 1333 unsigned long rodata_end = PFN_ALIGN(__end_rodata); 1334 unsigned long all_end; 1335 1336 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 1337 (end - start) >> 10); 1338 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1339 1340 kernel_set_to_readonly = 1; 1341 1342 /* 1343 * The rodata/data/bss/brk section (but not the kernel text!) 1344 * should also be not-executable. 1345 * 1346 * We align all_end to PMD_SIZE because the existing mapping 1347 * is a full PMD. If we would align _brk_end to PAGE_SIZE we 1348 * split the PMD and the reminder between _brk_end and the end 1349 * of the PMD will remain mapped executable. 1350 * 1351 * Any PMD which was setup after the one which covers _brk_end 1352 * has been zapped already via cleanup_highmem(). 1353 */ 1354 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1355 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); 1356 1357 set_ftrace_ops_ro(); 1358 1359 #ifdef CONFIG_CPA_DEBUG 1360 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); 1361 set_memory_rw(start, (end-start) >> PAGE_SHIFT); 1362 1363 printk(KERN_INFO "Testing CPA: again\n"); 1364 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 1365 #endif 1366 1367 free_kernel_image_pages("unused kernel image (text/rodata gap)", 1368 (void *)text_end, (void *)rodata_start); 1369 free_kernel_image_pages("unused kernel image (rodata/data gap)", 1370 (void *)rodata_end, (void *)_sdata); 1371 1372 debug_checkwx(); 1373 } 1374 1375 int kern_addr_valid(unsigned long addr) 1376 { 1377 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; 1378 pgd_t *pgd; 1379 p4d_t *p4d; 1380 pud_t *pud; 1381 pmd_t *pmd; 1382 pte_t *pte; 1383 1384 if (above != 0 && above != -1UL) 1385 return 0; 1386 1387 pgd = pgd_offset_k(addr); 1388 if (pgd_none(*pgd)) 1389 return 0; 1390 1391 p4d = p4d_offset(pgd, addr); 1392 if (p4d_none(*p4d)) 1393 return 0; 1394 1395 pud = pud_offset(p4d, addr); 1396 if (pud_none(*pud)) 1397 return 0; 1398 1399 if (pud_large(*pud)) 1400 return pfn_valid(pud_pfn(*pud)); 1401 1402 pmd = pmd_offset(pud, addr); 1403 if (pmd_none(*pmd)) 1404 return 0; 1405 1406 if (pmd_large(*pmd)) 1407 return pfn_valid(pmd_pfn(*pmd)); 1408 1409 pte = pte_offset_kernel(pmd, addr); 1410 if (pte_none(*pte)) 1411 return 0; 1412 1413 return pfn_valid(pte_pfn(*pte)); 1414 } 1415 1416 /* 1417 * Block size is the minimum amount of memory which can be hotplugged or 1418 * hotremoved. It must be power of two and must be equal or larger than 1419 * MIN_MEMORY_BLOCK_SIZE. 1420 */ 1421 #define MAX_BLOCK_SIZE (2UL << 30) 1422 1423 /* Amount of ram needed to start using large blocks */ 1424 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) 1425 1426 /* Adjustable memory block size */ 1427 static unsigned long set_memory_block_size; 1428 int __init set_memory_block_size_order(unsigned int order) 1429 { 1430 unsigned long size = 1UL << order; 1431 1432 if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) 1433 return -EINVAL; 1434 1435 set_memory_block_size = size; 1436 return 0; 1437 } 1438 1439 static unsigned long probe_memory_block_size(void) 1440 { 1441 unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; 1442 unsigned long bz; 1443 1444 /* If memory block size has been set, then use it */ 1445 bz = set_memory_block_size; 1446 if (bz) 1447 goto done; 1448 1449 /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ 1450 if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { 1451 bz = MIN_MEMORY_BLOCK_SIZE; 1452 goto done; 1453 } 1454 1455 /* 1456 * Use max block size to minimize overhead on bare metal, where 1457 * alignment for memory hotplug isn't a concern. 1458 */ 1459 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) { 1460 bz = MAX_BLOCK_SIZE; 1461 goto done; 1462 } 1463 1464 /* Find the largest allowed block size that aligns to memory end */ 1465 for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { 1466 if (IS_ALIGNED(boot_mem_end, bz)) 1467 break; 1468 } 1469 done: 1470 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); 1471 1472 return bz; 1473 } 1474 1475 static unsigned long memory_block_size_probed; 1476 unsigned long memory_block_size_bytes(void) 1477 { 1478 if (!memory_block_size_probed) 1479 memory_block_size_probed = probe_memory_block_size(); 1480 1481 return memory_block_size_probed; 1482 } 1483 1484 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1485 /* 1486 * Initialise the sparsemem vmemmap using huge-pages at the PMD level. 1487 */ 1488 static long __meminitdata addr_start, addr_end; 1489 static void __meminitdata *p_start, *p_end; 1490 static int __meminitdata node_start; 1491 1492 static int __meminit vmemmap_populate_hugepages(unsigned long start, 1493 unsigned long end, int node, struct vmem_altmap *altmap) 1494 { 1495 unsigned long addr; 1496 unsigned long next; 1497 pgd_t *pgd; 1498 p4d_t *p4d; 1499 pud_t *pud; 1500 pmd_t *pmd; 1501 1502 for (addr = start; addr < end; addr = next) { 1503 next = pmd_addr_end(addr, end); 1504 1505 pgd = vmemmap_pgd_populate(addr, node); 1506 if (!pgd) 1507 return -ENOMEM; 1508 1509 p4d = vmemmap_p4d_populate(pgd, addr, node); 1510 if (!p4d) 1511 return -ENOMEM; 1512 1513 pud = vmemmap_pud_populate(p4d, addr, node); 1514 if (!pud) 1515 return -ENOMEM; 1516 1517 pmd = pmd_offset(pud, addr); 1518 if (pmd_none(*pmd)) { 1519 void *p; 1520 1521 p = vmemmap_alloc_block_buf(PMD_SIZE, node, altmap); 1522 if (p) { 1523 pte_t entry; 1524 1525 entry = pfn_pte(__pa(p) >> PAGE_SHIFT, 1526 PAGE_KERNEL_LARGE); 1527 set_pmd(pmd, __pmd(pte_val(entry))); 1528 1529 /* check to see if we have contiguous blocks */ 1530 if (p_end != p || node_start != node) { 1531 if (p_start) 1532 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1533 addr_start, addr_end-1, p_start, p_end-1, node_start); 1534 addr_start = addr; 1535 node_start = node; 1536 p_start = p; 1537 } 1538 1539 addr_end = addr + PMD_SIZE; 1540 p_end = p + PMD_SIZE; 1541 continue; 1542 } else if (altmap) 1543 return -ENOMEM; /* no fallback */ 1544 } else if (pmd_large(*pmd)) { 1545 vmemmap_verify((pte_t *)pmd, node, addr, next); 1546 continue; 1547 } 1548 if (vmemmap_populate_basepages(addr, next, node, NULL)) 1549 return -ENOMEM; 1550 } 1551 return 0; 1552 } 1553 1554 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1555 struct vmem_altmap *altmap) 1556 { 1557 int err; 1558 1559 if (end - start < PAGES_PER_SECTION * sizeof(struct page)) 1560 err = vmemmap_populate_basepages(start, end, node, NULL); 1561 else if (boot_cpu_has(X86_FEATURE_PSE)) 1562 err = vmemmap_populate_hugepages(start, end, node, altmap); 1563 else if (altmap) { 1564 pr_err_once("%s: no cpu support for altmap allocations\n", 1565 __func__); 1566 err = -ENOMEM; 1567 } else 1568 err = vmemmap_populate_basepages(start, end, node, NULL); 1569 if (!err) 1570 sync_global_pgds(start, end - 1); 1571 return err; 1572 } 1573 1574 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE) 1575 void register_page_bootmem_memmap(unsigned long section_nr, 1576 struct page *start_page, unsigned long nr_pages) 1577 { 1578 unsigned long addr = (unsigned long)start_page; 1579 unsigned long end = (unsigned long)(start_page + nr_pages); 1580 unsigned long next; 1581 pgd_t *pgd; 1582 p4d_t *p4d; 1583 pud_t *pud; 1584 pmd_t *pmd; 1585 unsigned int nr_pmd_pages; 1586 struct page *page; 1587 1588 for (; addr < end; addr = next) { 1589 pte_t *pte = NULL; 1590 1591 pgd = pgd_offset_k(addr); 1592 if (pgd_none(*pgd)) { 1593 next = (addr + PAGE_SIZE) & PAGE_MASK; 1594 continue; 1595 } 1596 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); 1597 1598 p4d = p4d_offset(pgd, addr); 1599 if (p4d_none(*p4d)) { 1600 next = (addr + PAGE_SIZE) & PAGE_MASK; 1601 continue; 1602 } 1603 get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); 1604 1605 pud = pud_offset(p4d, addr); 1606 if (pud_none(*pud)) { 1607 next = (addr + PAGE_SIZE) & PAGE_MASK; 1608 continue; 1609 } 1610 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); 1611 1612 if (!boot_cpu_has(X86_FEATURE_PSE)) { 1613 next = (addr + PAGE_SIZE) & PAGE_MASK; 1614 pmd = pmd_offset(pud, addr); 1615 if (pmd_none(*pmd)) 1616 continue; 1617 get_page_bootmem(section_nr, pmd_page(*pmd), 1618 MIX_SECTION_INFO); 1619 1620 pte = pte_offset_kernel(pmd, addr); 1621 if (pte_none(*pte)) 1622 continue; 1623 get_page_bootmem(section_nr, pte_page(*pte), 1624 SECTION_INFO); 1625 } else { 1626 next = pmd_addr_end(addr, end); 1627 1628 pmd = pmd_offset(pud, addr); 1629 if (pmd_none(*pmd)) 1630 continue; 1631 1632 nr_pmd_pages = 1 << get_order(PMD_SIZE); 1633 page = pmd_page(*pmd); 1634 while (nr_pmd_pages--) 1635 get_page_bootmem(section_nr, page++, 1636 SECTION_INFO); 1637 } 1638 } 1639 } 1640 #endif 1641 1642 void __meminit vmemmap_populate_print_last(void) 1643 { 1644 if (p_start) { 1645 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1646 addr_start, addr_end-1, p_start, p_end-1, node_start); 1647 p_start = NULL; 1648 p_end = NULL; 1649 node_start = 0; 1650 } 1651 } 1652 #endif 1653