1 /* 2 * linux/arch/x86_64/mm/init.c 3 * 4 * Copyright (C) 1995 Linus Torvalds 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> 6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> 7 */ 8 9 #include <linux/signal.h> 10 #include <linux/sched.h> 11 #include <linux/kernel.h> 12 #include <linux/errno.h> 13 #include <linux/string.h> 14 #include <linux/types.h> 15 #include <linux/ptrace.h> 16 #include <linux/mman.h> 17 #include <linux/mm.h> 18 #include <linux/swap.h> 19 #include <linux/smp.h> 20 #include <linux/init.h> 21 #include <linux/initrd.h> 22 #include <linux/pagemap.h> 23 #include <linux/bootmem.h> 24 #include <linux/memblock.h> 25 #include <linux/proc_fs.h> 26 #include <linux/pci.h> 27 #include <linux/pfn.h> 28 #include <linux/poison.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/memory.h> 31 #include <linux/memory_hotplug.h> 32 #include <linux/memremap.h> 33 #include <linux/nmi.h> 34 #include <linux/gfp.h> 35 #include <linux/kcore.h> 36 37 #include <asm/processor.h> 38 #include <asm/bios_ebda.h> 39 #include <linux/uaccess.h> 40 #include <asm/pgtable.h> 41 #include <asm/pgalloc.h> 42 #include <asm/dma.h> 43 #include <asm/fixmap.h> 44 #include <asm/e820/api.h> 45 #include <asm/apic.h> 46 #include <asm/tlb.h> 47 #include <asm/mmu_context.h> 48 #include <asm/proto.h> 49 #include <asm/smp.h> 50 #include <asm/sections.h> 51 #include <asm/kdebug.h> 52 #include <asm/numa.h> 53 #include <asm/set_memory.h> 54 #include <asm/init.h> 55 #include <asm/uv/uv.h> 56 #include <asm/setup.h> 57 58 #include "mm_internal.h" 59 60 #include "ident_map.c" 61 62 /* 63 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the 64 * physical space so we can cache the place of the first one and move 65 * around without checking the pgd every time. 66 */ 67 68 pteval_t __supported_pte_mask __read_mostly = ~0; 69 EXPORT_SYMBOL_GPL(__supported_pte_mask); 70 71 int force_personality32; 72 73 /* 74 * noexec32=on|off 75 * Control non executable heap for 32bit processes. 76 * To control the stack too use noexec=off 77 * 78 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) 79 * off PROT_READ implies PROT_EXEC 80 */ 81 static int __init nonx32_setup(char *str) 82 { 83 if (!strcmp(str, "on")) 84 force_personality32 &= ~READ_IMPLIES_EXEC; 85 else if (!strcmp(str, "off")) 86 force_personality32 |= READ_IMPLIES_EXEC; 87 return 1; 88 } 89 __setup("noexec32=", nonx32_setup); 90 91 static void sync_global_pgds_l5(unsigned long start, unsigned long end) 92 { 93 unsigned long addr; 94 95 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 96 const pgd_t *pgd_ref = pgd_offset_k(addr); 97 struct page *page; 98 99 /* Check for overflow */ 100 if (addr < start) 101 break; 102 103 if (pgd_none(*pgd_ref)) 104 continue; 105 106 spin_lock(&pgd_lock); 107 list_for_each_entry(page, &pgd_list, lru) { 108 pgd_t *pgd; 109 spinlock_t *pgt_lock; 110 111 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 112 /* the pgt_lock only for Xen */ 113 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 114 spin_lock(pgt_lock); 115 116 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) 117 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 118 119 if (pgd_none(*pgd)) 120 set_pgd(pgd, *pgd_ref); 121 122 spin_unlock(pgt_lock); 123 } 124 spin_unlock(&pgd_lock); 125 } 126 } 127 128 static void sync_global_pgds_l4(unsigned long start, unsigned long end) 129 { 130 unsigned long addr; 131 132 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 133 pgd_t *pgd_ref = pgd_offset_k(addr); 134 const p4d_t *p4d_ref; 135 struct page *page; 136 137 /* 138 * With folded p4d, pgd_none() is always false, we need to 139 * handle synchonization on p4d level. 140 */ 141 MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); 142 p4d_ref = p4d_offset(pgd_ref, addr); 143 144 if (p4d_none(*p4d_ref)) 145 continue; 146 147 spin_lock(&pgd_lock); 148 list_for_each_entry(page, &pgd_list, lru) { 149 pgd_t *pgd; 150 p4d_t *p4d; 151 spinlock_t *pgt_lock; 152 153 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 154 p4d = p4d_offset(pgd, addr); 155 /* the pgt_lock only for Xen */ 156 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 157 spin_lock(pgt_lock); 158 159 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) 160 BUG_ON(p4d_page_vaddr(*p4d) 161 != p4d_page_vaddr(*p4d_ref)); 162 163 if (p4d_none(*p4d)) 164 set_p4d(p4d, *p4d_ref); 165 166 spin_unlock(pgt_lock); 167 } 168 spin_unlock(&pgd_lock); 169 } 170 } 171 172 /* 173 * When memory was added make sure all the processes MM have 174 * suitable PGD entries in the local PGD level page. 175 */ 176 void sync_global_pgds(unsigned long start, unsigned long end) 177 { 178 if (pgtable_l5_enabled) 179 sync_global_pgds_l5(start, end); 180 else 181 sync_global_pgds_l4(start, end); 182 } 183 184 /* 185 * NOTE: This function is marked __ref because it calls __init function 186 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. 187 */ 188 static __ref void *spp_getpage(void) 189 { 190 void *ptr; 191 192 if (after_bootmem) 193 ptr = (void *) get_zeroed_page(GFP_ATOMIC); 194 else 195 ptr = alloc_bootmem_pages(PAGE_SIZE); 196 197 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { 198 panic("set_pte_phys: cannot allocate page data %s\n", 199 after_bootmem ? "after bootmem" : ""); 200 } 201 202 pr_debug("spp_getpage %p\n", ptr); 203 204 return ptr; 205 } 206 207 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) 208 { 209 if (pgd_none(*pgd)) { 210 p4d_t *p4d = (p4d_t *)spp_getpage(); 211 pgd_populate(&init_mm, pgd, p4d); 212 if (p4d != p4d_offset(pgd, 0)) 213 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", 214 p4d, p4d_offset(pgd, 0)); 215 } 216 return p4d_offset(pgd, vaddr); 217 } 218 219 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) 220 { 221 if (p4d_none(*p4d)) { 222 pud_t *pud = (pud_t *)spp_getpage(); 223 p4d_populate(&init_mm, p4d, pud); 224 if (pud != pud_offset(p4d, 0)) 225 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 226 pud, pud_offset(p4d, 0)); 227 } 228 return pud_offset(p4d, vaddr); 229 } 230 231 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) 232 { 233 if (pud_none(*pud)) { 234 pmd_t *pmd = (pmd_t *) spp_getpage(); 235 pud_populate(&init_mm, pud, pmd); 236 if (pmd != pmd_offset(pud, 0)) 237 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", 238 pmd, pmd_offset(pud, 0)); 239 } 240 return pmd_offset(pud, vaddr); 241 } 242 243 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) 244 { 245 if (pmd_none(*pmd)) { 246 pte_t *pte = (pte_t *) spp_getpage(); 247 pmd_populate_kernel(&init_mm, pmd, pte); 248 if (pte != pte_offset_kernel(pmd, 0)) 249 printk(KERN_ERR "PAGETABLE BUG #03!\n"); 250 } 251 return pte_offset_kernel(pmd, vaddr); 252 } 253 254 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) 255 { 256 pmd_t *pmd = fill_pmd(pud, vaddr); 257 pte_t *pte = fill_pte(pmd, vaddr); 258 259 set_pte(pte, new_pte); 260 261 /* 262 * It's enough to flush this one mapping. 263 * (PGE mappings get flushed as well) 264 */ 265 __flush_tlb_one_kernel(vaddr); 266 } 267 268 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) 269 { 270 p4d_t *p4d = p4d_page + p4d_index(vaddr); 271 pud_t *pud = fill_pud(p4d, vaddr); 272 273 __set_pte_vaddr(pud, vaddr, new_pte); 274 } 275 276 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) 277 { 278 pud_t *pud = pud_page + pud_index(vaddr); 279 280 __set_pte_vaddr(pud, vaddr, new_pte); 281 } 282 283 void set_pte_vaddr(unsigned long vaddr, pte_t pteval) 284 { 285 pgd_t *pgd; 286 p4d_t *p4d_page; 287 288 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); 289 290 pgd = pgd_offset_k(vaddr); 291 if (pgd_none(*pgd)) { 292 printk(KERN_ERR 293 "PGD FIXMAP MISSING, it should be setup in head.S!\n"); 294 return; 295 } 296 297 p4d_page = p4d_offset(pgd, 0); 298 set_pte_vaddr_p4d(p4d_page, vaddr, pteval); 299 } 300 301 pmd_t * __init populate_extra_pmd(unsigned long vaddr) 302 { 303 pgd_t *pgd; 304 p4d_t *p4d; 305 pud_t *pud; 306 307 pgd = pgd_offset_k(vaddr); 308 p4d = fill_p4d(pgd, vaddr); 309 pud = fill_pud(p4d, vaddr); 310 return fill_pmd(pud, vaddr); 311 } 312 313 pte_t * __init populate_extra_pte(unsigned long vaddr) 314 { 315 pmd_t *pmd; 316 317 pmd = populate_extra_pmd(vaddr); 318 return fill_pte(pmd, vaddr); 319 } 320 321 /* 322 * Create large page table mappings for a range of physical addresses. 323 */ 324 static void __init __init_extra_mapping(unsigned long phys, unsigned long size, 325 enum page_cache_mode cache) 326 { 327 pgd_t *pgd; 328 p4d_t *p4d; 329 pud_t *pud; 330 pmd_t *pmd; 331 pgprot_t prot; 332 333 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | 334 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache))); 335 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); 336 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { 337 pgd = pgd_offset_k((unsigned long)__va(phys)); 338 if (pgd_none(*pgd)) { 339 p4d = (p4d_t *) spp_getpage(); 340 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | 341 _PAGE_USER)); 342 } 343 p4d = p4d_offset(pgd, (unsigned long)__va(phys)); 344 if (p4d_none(*p4d)) { 345 pud = (pud_t *) spp_getpage(); 346 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | 347 _PAGE_USER)); 348 } 349 pud = pud_offset(p4d, (unsigned long)__va(phys)); 350 if (pud_none(*pud)) { 351 pmd = (pmd_t *) spp_getpage(); 352 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | 353 _PAGE_USER)); 354 } 355 pmd = pmd_offset(pud, phys); 356 BUG_ON(!pmd_none(*pmd)); 357 set_pmd(pmd, __pmd(phys | pgprot_val(prot))); 358 } 359 } 360 361 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) 362 { 363 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); 364 } 365 366 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) 367 { 368 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); 369 } 370 371 /* 372 * The head.S code sets up the kernel high mapping: 373 * 374 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) 375 * 376 * phys_base holds the negative offset to the kernel, which is added 377 * to the compile time generated pmds. This results in invalid pmds up 378 * to the point where we hit the physaddr 0 mapping. 379 * 380 * We limit the mappings to the region from _text to _brk_end. _brk_end 381 * is rounded up to the 2MB boundary. This catches the invalid pmds as 382 * well, as they are located before _text: 383 */ 384 void __init cleanup_highmap(void) 385 { 386 unsigned long vaddr = __START_KERNEL_map; 387 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; 388 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 389 pmd_t *pmd = level2_kernel_pgt; 390 391 /* 392 * Native path, max_pfn_mapped is not set yet. 393 * Xen has valid max_pfn_mapped set in 394 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). 395 */ 396 if (max_pfn_mapped) 397 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); 398 399 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { 400 if (pmd_none(*pmd)) 401 continue; 402 if (vaddr < (unsigned long) _text || vaddr > end) 403 set_pmd(pmd, __pmd(0)); 404 } 405 } 406 407 /* 408 * Create PTE level page table mapping for physical addresses. 409 * It returns the last physical address mapped. 410 */ 411 static unsigned long __meminit 412 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, 413 pgprot_t prot) 414 { 415 unsigned long pages = 0, paddr_next; 416 unsigned long paddr_last = paddr_end; 417 pte_t *pte; 418 int i; 419 420 pte = pte_page + pte_index(paddr); 421 i = pte_index(paddr); 422 423 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { 424 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; 425 if (paddr >= paddr_end) { 426 if (!after_bootmem && 427 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 428 E820_TYPE_RAM) && 429 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 430 E820_TYPE_RESERVED_KERN)) 431 set_pte(pte, __pte(0)); 432 continue; 433 } 434 435 /* 436 * We will re-use the existing mapping. 437 * Xen for example has some special requirements, like mapping 438 * pagetable pages as RO. So assume someone who pre-setup 439 * these mappings are more intelligent. 440 */ 441 if (!pte_none(*pte)) { 442 if (!after_bootmem) 443 pages++; 444 continue; 445 } 446 447 if (0) 448 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, 449 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); 450 pages++; 451 set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot)); 452 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; 453 } 454 455 update_page_count(PG_LEVEL_4K, pages); 456 457 return paddr_last; 458 } 459 460 /* 461 * Create PMD level page table mapping for physical addresses. The virtual 462 * and physical address have to be aligned at this level. 463 * It returns the last physical address mapped. 464 */ 465 static unsigned long __meminit 466 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, 467 unsigned long page_size_mask, pgprot_t prot) 468 { 469 unsigned long pages = 0, paddr_next; 470 unsigned long paddr_last = paddr_end; 471 472 int i = pmd_index(paddr); 473 474 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { 475 pmd_t *pmd = pmd_page + pmd_index(paddr); 476 pte_t *pte; 477 pgprot_t new_prot = prot; 478 479 paddr_next = (paddr & PMD_MASK) + PMD_SIZE; 480 if (paddr >= paddr_end) { 481 if (!after_bootmem && 482 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 483 E820_TYPE_RAM) && 484 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 485 E820_TYPE_RESERVED_KERN)) 486 set_pmd(pmd, __pmd(0)); 487 continue; 488 } 489 490 if (!pmd_none(*pmd)) { 491 if (!pmd_large(*pmd)) { 492 spin_lock(&init_mm.page_table_lock); 493 pte = (pte_t *)pmd_page_vaddr(*pmd); 494 paddr_last = phys_pte_init(pte, paddr, 495 paddr_end, prot); 496 spin_unlock(&init_mm.page_table_lock); 497 continue; 498 } 499 /* 500 * If we are ok with PG_LEVEL_2M mapping, then we will 501 * use the existing mapping, 502 * 503 * Otherwise, we will split the large page mapping but 504 * use the same existing protection bits except for 505 * large page, so that we don't violate Intel's TLB 506 * Application note (317080) which says, while changing 507 * the page sizes, new and old translations should 508 * not differ with respect to page frame and 509 * attributes. 510 */ 511 if (page_size_mask & (1 << PG_LEVEL_2M)) { 512 if (!after_bootmem) 513 pages++; 514 paddr_last = paddr_next; 515 continue; 516 } 517 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); 518 } 519 520 if (page_size_mask & (1<<PG_LEVEL_2M)) { 521 pages++; 522 spin_lock(&init_mm.page_table_lock); 523 set_pte((pte_t *)pmd, 524 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, 525 __pgprot(pgprot_val(prot) | _PAGE_PSE))); 526 spin_unlock(&init_mm.page_table_lock); 527 paddr_last = paddr_next; 528 continue; 529 } 530 531 pte = alloc_low_page(); 532 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot); 533 534 spin_lock(&init_mm.page_table_lock); 535 pmd_populate_kernel(&init_mm, pmd, pte); 536 spin_unlock(&init_mm.page_table_lock); 537 } 538 update_page_count(PG_LEVEL_2M, pages); 539 return paddr_last; 540 } 541 542 /* 543 * Create PUD level page table mapping for physical addresses. The virtual 544 * and physical address do not have to be aligned at this level. KASLR can 545 * randomize virtual addresses up to this level. 546 * It returns the last physical address mapped. 547 */ 548 static unsigned long __meminit 549 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, 550 unsigned long page_size_mask) 551 { 552 unsigned long pages = 0, paddr_next; 553 unsigned long paddr_last = paddr_end; 554 unsigned long vaddr = (unsigned long)__va(paddr); 555 int i = pud_index(vaddr); 556 557 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { 558 pud_t *pud; 559 pmd_t *pmd; 560 pgprot_t prot = PAGE_KERNEL; 561 562 vaddr = (unsigned long)__va(paddr); 563 pud = pud_page + pud_index(vaddr); 564 paddr_next = (paddr & PUD_MASK) + PUD_SIZE; 565 566 if (paddr >= paddr_end) { 567 if (!after_bootmem && 568 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 569 E820_TYPE_RAM) && 570 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 571 E820_TYPE_RESERVED_KERN)) 572 set_pud(pud, __pud(0)); 573 continue; 574 } 575 576 if (!pud_none(*pud)) { 577 if (!pud_large(*pud)) { 578 pmd = pmd_offset(pud, 0); 579 paddr_last = phys_pmd_init(pmd, paddr, 580 paddr_end, 581 page_size_mask, 582 prot); 583 __flush_tlb_all(); 584 continue; 585 } 586 /* 587 * If we are ok with PG_LEVEL_1G mapping, then we will 588 * use the existing mapping. 589 * 590 * Otherwise, we will split the gbpage mapping but use 591 * the same existing protection bits except for large 592 * page, so that we don't violate Intel's TLB 593 * Application note (317080) which says, while changing 594 * the page sizes, new and old translations should 595 * not differ with respect to page frame and 596 * attributes. 597 */ 598 if (page_size_mask & (1 << PG_LEVEL_1G)) { 599 if (!after_bootmem) 600 pages++; 601 paddr_last = paddr_next; 602 continue; 603 } 604 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); 605 } 606 607 if (page_size_mask & (1<<PG_LEVEL_1G)) { 608 pages++; 609 spin_lock(&init_mm.page_table_lock); 610 set_pte((pte_t *)pud, 611 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, 612 PAGE_KERNEL_LARGE)); 613 spin_unlock(&init_mm.page_table_lock); 614 paddr_last = paddr_next; 615 continue; 616 } 617 618 pmd = alloc_low_page(); 619 paddr_last = phys_pmd_init(pmd, paddr, paddr_end, 620 page_size_mask, prot); 621 622 spin_lock(&init_mm.page_table_lock); 623 pud_populate(&init_mm, pud, pmd); 624 spin_unlock(&init_mm.page_table_lock); 625 } 626 __flush_tlb_all(); 627 628 update_page_count(PG_LEVEL_1G, pages); 629 630 return paddr_last; 631 } 632 633 static unsigned long __meminit 634 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, 635 unsigned long page_size_mask) 636 { 637 unsigned long paddr_next, paddr_last = paddr_end; 638 unsigned long vaddr = (unsigned long)__va(paddr); 639 int i = p4d_index(vaddr); 640 641 if (!pgtable_l5_enabled) 642 return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, page_size_mask); 643 644 for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) { 645 p4d_t *p4d; 646 pud_t *pud; 647 648 vaddr = (unsigned long)__va(paddr); 649 p4d = p4d_page + p4d_index(vaddr); 650 paddr_next = (paddr & P4D_MASK) + P4D_SIZE; 651 652 if (paddr >= paddr_end) { 653 if (!after_bootmem && 654 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 655 E820_TYPE_RAM) && 656 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 657 E820_TYPE_RESERVED_KERN)) 658 set_p4d(p4d, __p4d(0)); 659 continue; 660 } 661 662 if (!p4d_none(*p4d)) { 663 pud = pud_offset(p4d, 0); 664 paddr_last = phys_pud_init(pud, paddr, 665 paddr_end, 666 page_size_mask); 667 __flush_tlb_all(); 668 continue; 669 } 670 671 pud = alloc_low_page(); 672 paddr_last = phys_pud_init(pud, paddr, paddr_end, 673 page_size_mask); 674 675 spin_lock(&init_mm.page_table_lock); 676 p4d_populate(&init_mm, p4d, pud); 677 spin_unlock(&init_mm.page_table_lock); 678 } 679 __flush_tlb_all(); 680 681 return paddr_last; 682 } 683 684 /* 685 * Create page table mapping for the physical memory for specific physical 686 * addresses. The virtual and physical addresses have to be aligned on PMD level 687 * down. It returns the last physical address mapped. 688 */ 689 unsigned long __meminit 690 kernel_physical_mapping_init(unsigned long paddr_start, 691 unsigned long paddr_end, 692 unsigned long page_size_mask) 693 { 694 bool pgd_changed = false; 695 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; 696 697 paddr_last = paddr_end; 698 vaddr = (unsigned long)__va(paddr_start); 699 vaddr_end = (unsigned long)__va(paddr_end); 700 vaddr_start = vaddr; 701 702 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 703 pgd_t *pgd = pgd_offset_k(vaddr); 704 p4d_t *p4d; 705 706 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; 707 708 if (pgd_val(*pgd)) { 709 p4d = (p4d_t *)pgd_page_vaddr(*pgd); 710 paddr_last = phys_p4d_init(p4d, __pa(vaddr), 711 __pa(vaddr_end), 712 page_size_mask); 713 continue; 714 } 715 716 p4d = alloc_low_page(); 717 paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), 718 page_size_mask); 719 720 spin_lock(&init_mm.page_table_lock); 721 if (pgtable_l5_enabled) 722 pgd_populate(&init_mm, pgd, p4d); 723 else 724 p4d_populate(&init_mm, p4d_offset(pgd, vaddr), (pud_t *) p4d); 725 spin_unlock(&init_mm.page_table_lock); 726 pgd_changed = true; 727 } 728 729 if (pgd_changed) 730 sync_global_pgds(vaddr_start, vaddr_end - 1); 731 732 __flush_tlb_all(); 733 734 return paddr_last; 735 } 736 737 #ifndef CONFIG_NUMA 738 void __init initmem_init(void) 739 { 740 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0); 741 } 742 #endif 743 744 void __init paging_init(void) 745 { 746 sparse_memory_present_with_active_regions(MAX_NUMNODES); 747 sparse_init(); 748 749 /* 750 * clear the default setting with node 0 751 * note: don't use nodes_clear here, that is really clearing when 752 * numa support is not compiled in, and later node_set_state 753 * will not set it back. 754 */ 755 node_clear_state(0, N_MEMORY); 756 if (N_MEMORY != N_NORMAL_MEMORY) 757 node_clear_state(0, N_NORMAL_MEMORY); 758 759 zone_sizes_init(); 760 } 761 762 /* 763 * Memory hotplug specific functions 764 */ 765 #ifdef CONFIG_MEMORY_HOTPLUG 766 /* 767 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need 768 * updating. 769 */ 770 static void update_end_of_memory_vars(u64 start, u64 size) 771 { 772 unsigned long end_pfn = PFN_UP(start + size); 773 774 if (end_pfn > max_pfn) { 775 max_pfn = end_pfn; 776 max_low_pfn = end_pfn; 777 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; 778 } 779 } 780 781 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, 782 struct vmem_altmap *altmap, bool want_memblock) 783 { 784 int ret; 785 786 ret = __add_pages(nid, start_pfn, nr_pages, altmap, want_memblock); 787 WARN_ON_ONCE(ret); 788 789 /* update max_pfn, max_low_pfn and high_memory */ 790 update_end_of_memory_vars(start_pfn << PAGE_SHIFT, 791 nr_pages << PAGE_SHIFT); 792 793 return ret; 794 } 795 796 int arch_add_memory(int nid, u64 start, u64 size, struct vmem_altmap *altmap, 797 bool want_memblock) 798 { 799 unsigned long start_pfn = start >> PAGE_SHIFT; 800 unsigned long nr_pages = size >> PAGE_SHIFT; 801 802 init_memory_mapping(start, start + size); 803 804 return add_pages(nid, start_pfn, nr_pages, altmap, want_memblock); 805 } 806 807 #define PAGE_INUSE 0xFD 808 809 static void __meminit free_pagetable(struct page *page, int order) 810 { 811 unsigned long magic; 812 unsigned int nr_pages = 1 << order; 813 814 /* bootmem page has reserved flag */ 815 if (PageReserved(page)) { 816 __ClearPageReserved(page); 817 818 magic = (unsigned long)page->freelist; 819 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { 820 while (nr_pages--) 821 put_page_bootmem(page++); 822 } else 823 while (nr_pages--) 824 free_reserved_page(page++); 825 } else 826 free_pages((unsigned long)page_address(page), order); 827 } 828 829 static void __meminit free_hugepage_table(struct page *page, 830 struct vmem_altmap *altmap) 831 { 832 if (altmap) 833 vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); 834 else 835 free_pagetable(page, get_order(PMD_SIZE)); 836 } 837 838 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 839 { 840 pte_t *pte; 841 int i; 842 843 for (i = 0; i < PTRS_PER_PTE; i++) { 844 pte = pte_start + i; 845 if (!pte_none(*pte)) 846 return; 847 } 848 849 /* free a pte talbe */ 850 free_pagetable(pmd_page(*pmd), 0); 851 spin_lock(&init_mm.page_table_lock); 852 pmd_clear(pmd); 853 spin_unlock(&init_mm.page_table_lock); 854 } 855 856 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) 857 { 858 pmd_t *pmd; 859 int i; 860 861 for (i = 0; i < PTRS_PER_PMD; i++) { 862 pmd = pmd_start + i; 863 if (!pmd_none(*pmd)) 864 return; 865 } 866 867 /* free a pmd talbe */ 868 free_pagetable(pud_page(*pud), 0); 869 spin_lock(&init_mm.page_table_lock); 870 pud_clear(pud); 871 spin_unlock(&init_mm.page_table_lock); 872 } 873 874 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 875 { 876 pud_t *pud; 877 int i; 878 879 for (i = 0; i < PTRS_PER_PUD; i++) { 880 pud = pud_start + i; 881 if (!pud_none(*pud)) 882 return; 883 } 884 885 /* free a pud talbe */ 886 free_pagetable(p4d_page(*p4d), 0); 887 spin_lock(&init_mm.page_table_lock); 888 p4d_clear(p4d); 889 spin_unlock(&init_mm.page_table_lock); 890 } 891 892 static void __meminit 893 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, 894 bool direct) 895 { 896 unsigned long next, pages = 0; 897 pte_t *pte; 898 void *page_addr; 899 phys_addr_t phys_addr; 900 901 pte = pte_start + pte_index(addr); 902 for (; addr < end; addr = next, pte++) { 903 next = (addr + PAGE_SIZE) & PAGE_MASK; 904 if (next > end) 905 next = end; 906 907 if (!pte_present(*pte)) 908 continue; 909 910 /* 911 * We mapped [0,1G) memory as identity mapping when 912 * initializing, in arch/x86/kernel/head_64.S. These 913 * pagetables cannot be removed. 914 */ 915 phys_addr = pte_val(*pte) + (addr & PAGE_MASK); 916 if (phys_addr < (phys_addr_t)0x40000000) 917 return; 918 919 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) { 920 /* 921 * Do not free direct mapping pages since they were 922 * freed when offlining, or simplely not in use. 923 */ 924 if (!direct) 925 free_pagetable(pte_page(*pte), 0); 926 927 spin_lock(&init_mm.page_table_lock); 928 pte_clear(&init_mm, addr, pte); 929 spin_unlock(&init_mm.page_table_lock); 930 931 /* For non-direct mapping, pages means nothing. */ 932 pages++; 933 } else { 934 /* 935 * If we are here, we are freeing vmemmap pages since 936 * direct mapped memory ranges to be freed are aligned. 937 * 938 * If we are not removing the whole page, it means 939 * other page structs in this page are being used and 940 * we canot remove them. So fill the unused page_structs 941 * with 0xFD, and remove the page when it is wholly 942 * filled with 0xFD. 943 */ 944 memset((void *)addr, PAGE_INUSE, next - addr); 945 946 page_addr = page_address(pte_page(*pte)); 947 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) { 948 free_pagetable(pte_page(*pte), 0); 949 950 spin_lock(&init_mm.page_table_lock); 951 pte_clear(&init_mm, addr, pte); 952 spin_unlock(&init_mm.page_table_lock); 953 } 954 } 955 } 956 957 /* Call free_pte_table() in remove_pmd_table(). */ 958 flush_tlb_all(); 959 if (direct) 960 update_page_count(PG_LEVEL_4K, -pages); 961 } 962 963 static void __meminit 964 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, 965 bool direct, struct vmem_altmap *altmap) 966 { 967 unsigned long next, pages = 0; 968 pte_t *pte_base; 969 pmd_t *pmd; 970 void *page_addr; 971 972 pmd = pmd_start + pmd_index(addr); 973 for (; addr < end; addr = next, pmd++) { 974 next = pmd_addr_end(addr, end); 975 976 if (!pmd_present(*pmd)) 977 continue; 978 979 if (pmd_large(*pmd)) { 980 if (IS_ALIGNED(addr, PMD_SIZE) && 981 IS_ALIGNED(next, PMD_SIZE)) { 982 if (!direct) 983 free_hugepage_table(pmd_page(*pmd), 984 altmap); 985 986 spin_lock(&init_mm.page_table_lock); 987 pmd_clear(pmd); 988 spin_unlock(&init_mm.page_table_lock); 989 pages++; 990 } else { 991 /* If here, we are freeing vmemmap pages. */ 992 memset((void *)addr, PAGE_INUSE, next - addr); 993 994 page_addr = page_address(pmd_page(*pmd)); 995 if (!memchr_inv(page_addr, PAGE_INUSE, 996 PMD_SIZE)) { 997 free_hugepage_table(pmd_page(*pmd), 998 altmap); 999 1000 spin_lock(&init_mm.page_table_lock); 1001 pmd_clear(pmd); 1002 spin_unlock(&init_mm.page_table_lock); 1003 } 1004 } 1005 1006 continue; 1007 } 1008 1009 pte_base = (pte_t *)pmd_page_vaddr(*pmd); 1010 remove_pte_table(pte_base, addr, next, direct); 1011 free_pte_table(pte_base, pmd); 1012 } 1013 1014 /* Call free_pmd_table() in remove_pud_table(). */ 1015 if (direct) 1016 update_page_count(PG_LEVEL_2M, -pages); 1017 } 1018 1019 static void __meminit 1020 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, 1021 struct vmem_altmap *altmap, bool direct) 1022 { 1023 unsigned long next, pages = 0; 1024 pmd_t *pmd_base; 1025 pud_t *pud; 1026 void *page_addr; 1027 1028 pud = pud_start + pud_index(addr); 1029 for (; addr < end; addr = next, pud++) { 1030 next = pud_addr_end(addr, end); 1031 1032 if (!pud_present(*pud)) 1033 continue; 1034 1035 if (pud_large(*pud)) { 1036 if (IS_ALIGNED(addr, PUD_SIZE) && 1037 IS_ALIGNED(next, PUD_SIZE)) { 1038 if (!direct) 1039 free_pagetable(pud_page(*pud), 1040 get_order(PUD_SIZE)); 1041 1042 spin_lock(&init_mm.page_table_lock); 1043 pud_clear(pud); 1044 spin_unlock(&init_mm.page_table_lock); 1045 pages++; 1046 } else { 1047 /* If here, we are freeing vmemmap pages. */ 1048 memset((void *)addr, PAGE_INUSE, next - addr); 1049 1050 page_addr = page_address(pud_page(*pud)); 1051 if (!memchr_inv(page_addr, PAGE_INUSE, 1052 PUD_SIZE)) { 1053 free_pagetable(pud_page(*pud), 1054 get_order(PUD_SIZE)); 1055 1056 spin_lock(&init_mm.page_table_lock); 1057 pud_clear(pud); 1058 spin_unlock(&init_mm.page_table_lock); 1059 } 1060 } 1061 1062 continue; 1063 } 1064 1065 pmd_base = pmd_offset(pud, 0); 1066 remove_pmd_table(pmd_base, addr, next, direct, altmap); 1067 free_pmd_table(pmd_base, pud); 1068 } 1069 1070 if (direct) 1071 update_page_count(PG_LEVEL_1G, -pages); 1072 } 1073 1074 static void __meminit 1075 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, 1076 struct vmem_altmap *altmap, bool direct) 1077 { 1078 unsigned long next, pages = 0; 1079 pud_t *pud_base; 1080 p4d_t *p4d; 1081 1082 p4d = p4d_start + p4d_index(addr); 1083 for (; addr < end; addr = next, p4d++) { 1084 next = p4d_addr_end(addr, end); 1085 1086 if (!p4d_present(*p4d)) 1087 continue; 1088 1089 BUILD_BUG_ON(p4d_large(*p4d)); 1090 1091 pud_base = pud_offset(p4d, 0); 1092 remove_pud_table(pud_base, addr, next, altmap, direct); 1093 /* 1094 * For 4-level page tables we do not want to free PUDs, but in the 1095 * 5-level case we should free them. This code will have to change 1096 * to adapt for boot-time switching between 4 and 5 level page tables. 1097 */ 1098 if (pgtable_l5_enabled) 1099 free_pud_table(pud_base, p4d); 1100 } 1101 1102 if (direct) 1103 update_page_count(PG_LEVEL_512G, -pages); 1104 } 1105 1106 /* start and end are both virtual address. */ 1107 static void __meminit 1108 remove_pagetable(unsigned long start, unsigned long end, bool direct, 1109 struct vmem_altmap *altmap) 1110 { 1111 unsigned long next; 1112 unsigned long addr; 1113 pgd_t *pgd; 1114 p4d_t *p4d; 1115 1116 for (addr = start; addr < end; addr = next) { 1117 next = pgd_addr_end(addr, end); 1118 1119 pgd = pgd_offset_k(addr); 1120 if (!pgd_present(*pgd)) 1121 continue; 1122 1123 p4d = p4d_offset(pgd, 0); 1124 remove_p4d_table(p4d, addr, next, altmap, direct); 1125 } 1126 1127 flush_tlb_all(); 1128 } 1129 1130 void __ref vmemmap_free(unsigned long start, unsigned long end, 1131 struct vmem_altmap *altmap) 1132 { 1133 remove_pagetable(start, end, false, altmap); 1134 } 1135 1136 #ifdef CONFIG_MEMORY_HOTREMOVE 1137 static void __meminit 1138 kernel_physical_mapping_remove(unsigned long start, unsigned long end) 1139 { 1140 start = (unsigned long)__va(start); 1141 end = (unsigned long)__va(end); 1142 1143 remove_pagetable(start, end, true, NULL); 1144 } 1145 1146 int __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap) 1147 { 1148 unsigned long start_pfn = start >> PAGE_SHIFT; 1149 unsigned long nr_pages = size >> PAGE_SHIFT; 1150 struct page *page = pfn_to_page(start_pfn); 1151 struct zone *zone; 1152 int ret; 1153 1154 /* With altmap the first mapped page is offset from @start */ 1155 if (altmap) 1156 page += vmem_altmap_offset(altmap); 1157 zone = page_zone(page); 1158 ret = __remove_pages(zone, start_pfn, nr_pages, altmap); 1159 WARN_ON_ONCE(ret); 1160 kernel_physical_mapping_remove(start, start + size); 1161 1162 return ret; 1163 } 1164 #endif 1165 #endif /* CONFIG_MEMORY_HOTPLUG */ 1166 1167 static struct kcore_list kcore_vsyscall; 1168 1169 static void __init register_page_bootmem_info(void) 1170 { 1171 #ifdef CONFIG_NUMA 1172 int i; 1173 1174 for_each_online_node(i) 1175 register_page_bootmem_info_node(NODE_DATA(i)); 1176 #endif 1177 } 1178 1179 void __init mem_init(void) 1180 { 1181 pci_iommu_alloc(); 1182 1183 /* clear_bss() already clear the empty_zero_page */ 1184 1185 /* this will put all memory onto the freelists */ 1186 free_all_bootmem(); 1187 after_bootmem = 1; 1188 1189 /* 1190 * Must be done after boot memory is put on freelist, because here we 1191 * might set fields in deferred struct pages that have not yet been 1192 * initialized, and free_all_bootmem() initializes all the reserved 1193 * deferred pages for us. 1194 */ 1195 register_page_bootmem_info(); 1196 1197 /* Register memory areas for /proc/kcore */ 1198 if (get_gate_vma(&init_mm)) 1199 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); 1200 1201 mem_init_print_info(NULL); 1202 } 1203 1204 int kernel_set_to_readonly; 1205 1206 void set_kernel_text_rw(void) 1207 { 1208 unsigned long start = PFN_ALIGN(_text); 1209 unsigned long end = PFN_ALIGN(__stop___ex_table); 1210 1211 if (!kernel_set_to_readonly) 1212 return; 1213 1214 pr_debug("Set kernel text: %lx - %lx for read write\n", 1215 start, end); 1216 1217 /* 1218 * Make the kernel identity mapping for text RW. Kernel text 1219 * mapping will always be RO. Refer to the comment in 1220 * static_protections() in pageattr.c 1221 */ 1222 set_memory_rw(start, (end - start) >> PAGE_SHIFT); 1223 } 1224 1225 void set_kernel_text_ro(void) 1226 { 1227 unsigned long start = PFN_ALIGN(_text); 1228 unsigned long end = PFN_ALIGN(__stop___ex_table); 1229 1230 if (!kernel_set_to_readonly) 1231 return; 1232 1233 pr_debug("Set kernel text: %lx - %lx for read only\n", 1234 start, end); 1235 1236 /* 1237 * Set the kernel identity mapping for text RO. 1238 */ 1239 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1240 } 1241 1242 void mark_rodata_ro(void) 1243 { 1244 unsigned long start = PFN_ALIGN(_text); 1245 unsigned long rodata_start = PFN_ALIGN(__start_rodata); 1246 unsigned long end = (unsigned long) &__end_rodata_hpage_align; 1247 unsigned long text_end = PFN_ALIGN(&__stop___ex_table); 1248 unsigned long rodata_end = PFN_ALIGN(&__end_rodata); 1249 unsigned long all_end; 1250 1251 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 1252 (end - start) >> 10); 1253 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1254 1255 kernel_set_to_readonly = 1; 1256 1257 /* 1258 * The rodata/data/bss/brk section (but not the kernel text!) 1259 * should also be not-executable. 1260 * 1261 * We align all_end to PMD_SIZE because the existing mapping 1262 * is a full PMD. If we would align _brk_end to PAGE_SIZE we 1263 * split the PMD and the reminder between _brk_end and the end 1264 * of the PMD will remain mapped executable. 1265 * 1266 * Any PMD which was setup after the one which covers _brk_end 1267 * has been zapped already via cleanup_highmem(). 1268 */ 1269 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1270 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); 1271 1272 #ifdef CONFIG_CPA_DEBUG 1273 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); 1274 set_memory_rw(start, (end-start) >> PAGE_SHIFT); 1275 1276 printk(KERN_INFO "Testing CPA: again\n"); 1277 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 1278 #endif 1279 1280 free_init_pages("unused kernel", 1281 (unsigned long) __va(__pa_symbol(text_end)), 1282 (unsigned long) __va(__pa_symbol(rodata_start))); 1283 free_init_pages("unused kernel", 1284 (unsigned long) __va(__pa_symbol(rodata_end)), 1285 (unsigned long) __va(__pa_symbol(_sdata))); 1286 1287 debug_checkwx(); 1288 } 1289 1290 int kern_addr_valid(unsigned long addr) 1291 { 1292 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; 1293 pgd_t *pgd; 1294 p4d_t *p4d; 1295 pud_t *pud; 1296 pmd_t *pmd; 1297 pte_t *pte; 1298 1299 if (above != 0 && above != -1UL) 1300 return 0; 1301 1302 pgd = pgd_offset_k(addr); 1303 if (pgd_none(*pgd)) 1304 return 0; 1305 1306 p4d = p4d_offset(pgd, addr); 1307 if (p4d_none(*p4d)) 1308 return 0; 1309 1310 pud = pud_offset(p4d, addr); 1311 if (pud_none(*pud)) 1312 return 0; 1313 1314 if (pud_large(*pud)) 1315 return pfn_valid(pud_pfn(*pud)); 1316 1317 pmd = pmd_offset(pud, addr); 1318 if (pmd_none(*pmd)) 1319 return 0; 1320 1321 if (pmd_large(*pmd)) 1322 return pfn_valid(pmd_pfn(*pmd)); 1323 1324 pte = pte_offset_kernel(pmd, addr); 1325 if (pte_none(*pte)) 1326 return 0; 1327 1328 return pfn_valid(pte_pfn(*pte)); 1329 } 1330 1331 static unsigned long probe_memory_block_size(void) 1332 { 1333 unsigned long bz = MIN_MEMORY_BLOCK_SIZE; 1334 1335 /* if system is UV or has 64GB of RAM or more, use large blocks */ 1336 if (is_uv_system() || ((max_pfn << PAGE_SHIFT) >= (64UL << 30))) 1337 bz = 2UL << 30; /* 2GB */ 1338 1339 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); 1340 1341 return bz; 1342 } 1343 1344 static unsigned long memory_block_size_probed; 1345 unsigned long memory_block_size_bytes(void) 1346 { 1347 if (!memory_block_size_probed) 1348 memory_block_size_probed = probe_memory_block_size(); 1349 1350 return memory_block_size_probed; 1351 } 1352 1353 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1354 /* 1355 * Initialise the sparsemem vmemmap using huge-pages at the PMD level. 1356 */ 1357 static long __meminitdata addr_start, addr_end; 1358 static void __meminitdata *p_start, *p_end; 1359 static int __meminitdata node_start; 1360 1361 static int __meminit vmemmap_populate_hugepages(unsigned long start, 1362 unsigned long end, int node, struct vmem_altmap *altmap) 1363 { 1364 unsigned long addr; 1365 unsigned long next; 1366 pgd_t *pgd; 1367 p4d_t *p4d; 1368 pud_t *pud; 1369 pmd_t *pmd; 1370 1371 for (addr = start; addr < end; addr = next) { 1372 next = pmd_addr_end(addr, end); 1373 1374 pgd = vmemmap_pgd_populate(addr, node); 1375 if (!pgd) 1376 return -ENOMEM; 1377 1378 p4d = vmemmap_p4d_populate(pgd, addr, node); 1379 if (!p4d) 1380 return -ENOMEM; 1381 1382 pud = vmemmap_pud_populate(p4d, addr, node); 1383 if (!pud) 1384 return -ENOMEM; 1385 1386 pmd = pmd_offset(pud, addr); 1387 if (pmd_none(*pmd)) { 1388 void *p; 1389 1390 if (altmap) 1391 p = altmap_alloc_block_buf(PMD_SIZE, altmap); 1392 else 1393 p = vmemmap_alloc_block_buf(PMD_SIZE, node); 1394 if (p) { 1395 pte_t entry; 1396 1397 entry = pfn_pte(__pa(p) >> PAGE_SHIFT, 1398 PAGE_KERNEL_LARGE); 1399 set_pmd(pmd, __pmd(pte_val(entry))); 1400 1401 /* check to see if we have contiguous blocks */ 1402 if (p_end != p || node_start != node) { 1403 if (p_start) 1404 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1405 addr_start, addr_end-1, p_start, p_end-1, node_start); 1406 addr_start = addr; 1407 node_start = node; 1408 p_start = p; 1409 } 1410 1411 addr_end = addr + PMD_SIZE; 1412 p_end = p + PMD_SIZE; 1413 continue; 1414 } else if (altmap) 1415 return -ENOMEM; /* no fallback */ 1416 } else if (pmd_large(*pmd)) { 1417 vmemmap_verify((pte_t *)pmd, node, addr, next); 1418 continue; 1419 } 1420 if (vmemmap_populate_basepages(addr, next, node)) 1421 return -ENOMEM; 1422 } 1423 return 0; 1424 } 1425 1426 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1427 struct vmem_altmap *altmap) 1428 { 1429 int err; 1430 1431 if (boot_cpu_has(X86_FEATURE_PSE)) 1432 err = vmemmap_populate_hugepages(start, end, node, altmap); 1433 else if (altmap) { 1434 pr_err_once("%s: no cpu support for altmap allocations\n", 1435 __func__); 1436 err = -ENOMEM; 1437 } else 1438 err = vmemmap_populate_basepages(start, end, node); 1439 if (!err) 1440 sync_global_pgds(start, end - 1); 1441 return err; 1442 } 1443 1444 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE) 1445 void register_page_bootmem_memmap(unsigned long section_nr, 1446 struct page *start_page, unsigned long nr_pages) 1447 { 1448 unsigned long addr = (unsigned long)start_page; 1449 unsigned long end = (unsigned long)(start_page + nr_pages); 1450 unsigned long next; 1451 pgd_t *pgd; 1452 p4d_t *p4d; 1453 pud_t *pud; 1454 pmd_t *pmd; 1455 unsigned int nr_pmd_pages; 1456 struct page *page; 1457 1458 for (; addr < end; addr = next) { 1459 pte_t *pte = NULL; 1460 1461 pgd = pgd_offset_k(addr); 1462 if (pgd_none(*pgd)) { 1463 next = (addr + PAGE_SIZE) & PAGE_MASK; 1464 continue; 1465 } 1466 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); 1467 1468 p4d = p4d_offset(pgd, addr); 1469 if (p4d_none(*p4d)) { 1470 next = (addr + PAGE_SIZE) & PAGE_MASK; 1471 continue; 1472 } 1473 get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); 1474 1475 pud = pud_offset(p4d, addr); 1476 if (pud_none(*pud)) { 1477 next = (addr + PAGE_SIZE) & PAGE_MASK; 1478 continue; 1479 } 1480 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); 1481 1482 if (!boot_cpu_has(X86_FEATURE_PSE)) { 1483 next = (addr + PAGE_SIZE) & PAGE_MASK; 1484 pmd = pmd_offset(pud, addr); 1485 if (pmd_none(*pmd)) 1486 continue; 1487 get_page_bootmem(section_nr, pmd_page(*pmd), 1488 MIX_SECTION_INFO); 1489 1490 pte = pte_offset_kernel(pmd, addr); 1491 if (pte_none(*pte)) 1492 continue; 1493 get_page_bootmem(section_nr, pte_page(*pte), 1494 SECTION_INFO); 1495 } else { 1496 next = pmd_addr_end(addr, end); 1497 1498 pmd = pmd_offset(pud, addr); 1499 if (pmd_none(*pmd)) 1500 continue; 1501 1502 nr_pmd_pages = 1 << get_order(PMD_SIZE); 1503 page = pmd_page(*pmd); 1504 while (nr_pmd_pages--) 1505 get_page_bootmem(section_nr, page++, 1506 SECTION_INFO); 1507 } 1508 } 1509 } 1510 #endif 1511 1512 void __meminit vmemmap_populate_print_last(void) 1513 { 1514 if (p_start) { 1515 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1516 addr_start, addr_end-1, p_start, p_end-1, node_start); 1517 p_start = NULL; 1518 p_end = NULL; 1519 node_start = 0; 1520 } 1521 } 1522 #endif 1523