xref: /linux/arch/x86/mm/amdtopology.c (revision c0c914eca7f251c70facc37dfebeaf176601918d)
1 /*
2  * AMD NUMA support.
3  * Discover the memory map and associated nodes.
4  *
5  * This version reads it directly from the AMD northbridge.
6  *
7  * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8  */
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/string.h>
12 #include <linux/module.h>
13 #include <linux/nodemask.h>
14 #include <linux/memblock.h>
15 #include <linux/bootmem.h>
16 
17 #include <asm/io.h>
18 #include <linux/pci_ids.h>
19 #include <linux/acpi.h>
20 #include <asm/types.h>
21 #include <asm/mmzone.h>
22 #include <asm/proto.h>
23 #include <asm/e820.h>
24 #include <asm/pci-direct.h>
25 #include <asm/numa.h>
26 #include <asm/mpspec.h>
27 #include <asm/apic.h>
28 #include <asm/amd_nb.h>
29 
30 static unsigned char __initdata nodeids[8];
31 
32 static __init int find_northbridge(void)
33 {
34 	int num;
35 
36 	for (num = 0; num < 32; num++) {
37 		u32 header;
38 
39 		header = read_pci_config(0, num, 0, 0x00);
40 		if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
41 			header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
42 			header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
43 			continue;
44 
45 		header = read_pci_config(0, num, 1, 0x00);
46 		if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
47 			header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
48 			header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
49 			continue;
50 		return num;
51 	}
52 
53 	return -ENOENT;
54 }
55 
56 static __init void early_get_boot_cpu_id(void)
57 {
58 	/*
59 	 * need to get the APIC ID of the BSP so can use that to
60 	 * create apicid_to_node in amd_scan_nodes()
61 	 */
62 #ifdef CONFIG_X86_MPPARSE
63 	/*
64 	 * get boot-time SMP configuration:
65 	 */
66 	if (smp_found_config)
67 		early_get_smp_config();
68 #endif
69 }
70 
71 int __init amd_numa_init(void)
72 {
73 	u64 start = PFN_PHYS(0);
74 	u64 end = PFN_PHYS(max_pfn);
75 	unsigned numnodes;
76 	u64 prevbase;
77 	int i, j, nb;
78 	u32 nodeid, reg;
79 	unsigned int bits, cores, apicid_base;
80 
81 	if (!early_pci_allowed())
82 		return -EINVAL;
83 
84 	nb = find_northbridge();
85 	if (nb < 0)
86 		return nb;
87 
88 	pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
89 
90 	reg = read_pci_config(0, nb, 0, 0x60);
91 	numnodes = ((reg >> 4) & 0xF) + 1;
92 	if (numnodes <= 1)
93 		return -ENOENT;
94 
95 	pr_info("Number of physical nodes %d\n", numnodes);
96 
97 	prevbase = 0;
98 	for (i = 0; i < 8; i++) {
99 		u64 base, limit;
100 
101 		base = read_pci_config(0, nb, 1, 0x40 + i*8);
102 		limit = read_pci_config(0, nb, 1, 0x44 + i*8);
103 
104 		nodeids[i] = nodeid = limit & 7;
105 		if ((base & 3) == 0) {
106 			if (i < numnodes)
107 				pr_info("Skipping disabled node %d\n", i);
108 			continue;
109 		}
110 		if (nodeid >= numnodes) {
111 			pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
112 				base, limit);
113 			continue;
114 		}
115 
116 		if (!limit) {
117 			pr_info("Skipping node entry %d (base %Lx)\n",
118 				i, base);
119 			continue;
120 		}
121 		if ((base >> 8) & 3 || (limit >> 8) & 3) {
122 			pr_err("Node %d using interleaving mode %Lx/%Lx\n",
123 			       nodeid, (base >> 8) & 3, (limit >> 8) & 3);
124 			return -EINVAL;
125 		}
126 		if (node_isset(nodeid, numa_nodes_parsed)) {
127 			pr_info("Node %d already present, skipping\n",
128 				nodeid);
129 			continue;
130 		}
131 
132 		limit >>= 16;
133 		limit++;
134 		limit <<= 24;
135 
136 		if (limit > end)
137 			limit = end;
138 		if (limit <= base)
139 			continue;
140 
141 		base >>= 16;
142 		base <<= 24;
143 
144 		if (base < start)
145 			base = start;
146 		if (limit > end)
147 			limit = end;
148 		if (limit == base) {
149 			pr_err("Empty node %d\n", nodeid);
150 			continue;
151 		}
152 		if (limit < base) {
153 			pr_err("Node %d bogus settings %Lx-%Lx.\n",
154 			       nodeid, base, limit);
155 			continue;
156 		}
157 
158 		/* Could sort here, but pun for now. Should not happen anyroads. */
159 		if (prevbase > base) {
160 			pr_err("Node map not sorted %Lx,%Lx\n",
161 			       prevbase, base);
162 			return -EINVAL;
163 		}
164 
165 		pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
166 			nodeid, base, limit);
167 
168 		prevbase = base;
169 		numa_add_memblk(nodeid, base, limit);
170 		node_set(nodeid, numa_nodes_parsed);
171 	}
172 
173 	if (!nodes_weight(numa_nodes_parsed))
174 		return -ENOENT;
175 
176 	/*
177 	 * We seem to have valid NUMA configuration.  Map apicids to nodes
178 	 * using the coreid bits from early_identify_cpu.
179 	 */
180 	bits = boot_cpu_data.x86_coreid_bits;
181 	cores = 1 << bits;
182 	apicid_base = 0;
183 
184 	/* get the APIC ID of the BSP early for systems with apicid lifting */
185 	early_get_boot_cpu_id();
186 	if (boot_cpu_physical_apicid > 0) {
187 		pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
188 		apicid_base = boot_cpu_physical_apicid;
189 	}
190 
191 	for_each_node_mask(i, numa_nodes_parsed)
192 		for (j = apicid_base; j < cores + apicid_base; j++)
193 			set_apicid_to_node((i << bits) + j, i);
194 
195 	return 0;
196 }
197