xref: /linux/arch/x86/lib/delay.c (revision 5e8c0fb6a95728b852d56c0a9244425d474670c0)
1 /*
2  *	Precise Delay Loops for i386
3  *
4  *	Copyright (C) 1993 Linus Torvalds
5  *	Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6  *	Copyright (C) 2008 Jiri Hladky <hladky _dot_ jiri _at_ gmail _dot_ com>
7  *
8  *	The __delay function must _NOT_ be inlined as its execution time
9  *	depends wildly on alignment on many x86 processors. The additional
10  *	jump magic is needed to get the timing stable on all the CPU's
11  *	we have to worry about.
12  */
13 
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/timex.h>
17 #include <linux/preempt.h>
18 #include <linux/delay.h>
19 
20 #include <asm/processor.h>
21 #include <asm/delay.h>
22 #include <asm/timer.h>
23 
24 #ifdef CONFIG_SMP
25 # include <asm/smp.h>
26 #endif
27 
28 /* simple loop based delay: */
29 static void delay_loop(unsigned long loops)
30 {
31 	asm volatile(
32 		"	test %0,%0	\n"
33 		"	jz 3f		\n"
34 		"	jmp 1f		\n"
35 
36 		".align 16		\n"
37 		"1:	jmp 2f		\n"
38 
39 		".align 16		\n"
40 		"2:	dec %0		\n"
41 		"	jnz 2b		\n"
42 		"3:	dec %0		\n"
43 
44 		: /* we don't need output */
45 		:"a" (loops)
46 	);
47 }
48 
49 /* TSC based delay: */
50 static void delay_tsc(unsigned long __loops)
51 {
52 	u32 bclock, now, loops = __loops;
53 	int cpu;
54 
55 	preempt_disable();
56 	cpu = smp_processor_id();
57 	rdtsc_barrier();
58 	rdtscl(bclock);
59 	for (;;) {
60 		rdtsc_barrier();
61 		rdtscl(now);
62 		if ((now - bclock) >= loops)
63 			break;
64 
65 		/* Allow RT tasks to run */
66 		preempt_enable();
67 		rep_nop();
68 		preempt_disable();
69 
70 		/*
71 		 * It is possible that we moved to another CPU, and
72 		 * since TSC's are per-cpu we need to calculate
73 		 * that. The delay must guarantee that we wait "at
74 		 * least" the amount of time. Being moved to another
75 		 * CPU could make the wait longer but we just need to
76 		 * make sure we waited long enough. Rebalance the
77 		 * counter for this CPU.
78 		 */
79 		if (unlikely(cpu != smp_processor_id())) {
80 			loops -= (now - bclock);
81 			cpu = smp_processor_id();
82 			rdtsc_barrier();
83 			rdtscl(bclock);
84 		}
85 	}
86 	preempt_enable();
87 }
88 
89 /*
90  * Since we calibrate only once at boot, this
91  * function should be set once at boot and not changed
92  */
93 static void (*delay_fn)(unsigned long) = delay_loop;
94 
95 void use_tsc_delay(void)
96 {
97 	delay_fn = delay_tsc;
98 }
99 
100 int read_current_timer(unsigned long *timer_val)
101 {
102 	if (delay_fn == delay_tsc) {
103 		rdtscll(*timer_val);
104 		return 0;
105 	}
106 	return -1;
107 }
108 
109 void __delay(unsigned long loops)
110 {
111 	delay_fn(loops);
112 }
113 EXPORT_SYMBOL(__delay);
114 
115 inline void __const_udelay(unsigned long xloops)
116 {
117 	int d0;
118 
119 	xloops *= 4;
120 	asm("mull %%edx"
121 		:"=d" (xloops), "=&a" (d0)
122 		:"1" (xloops), "0"
123 		(this_cpu_read(cpu_info.loops_per_jiffy) * (HZ/4)));
124 
125 	__delay(++xloops);
126 }
127 EXPORT_SYMBOL(__const_udelay);
128 
129 void __udelay(unsigned long usecs)
130 {
131 	__const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */
132 }
133 EXPORT_SYMBOL(__udelay);
134 
135 void __ndelay(unsigned long nsecs)
136 {
137 	__const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
138 }
139 EXPORT_SYMBOL(__ndelay);
140