xref: /linux/arch/x86/lib/delay.c (revision 2fe05e1139a555ae91f00a812cb9520e7d3022ab)
1 /*
2  *	Precise Delay Loops for i386
3  *
4  *	Copyright (C) 1993 Linus Torvalds
5  *	Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6  *	Copyright (C) 2008 Jiri Hladky <hladky _dot_ jiri _at_ gmail _dot_ com>
7  *
8  *	The __delay function must _NOT_ be inlined as its execution time
9  *	depends wildly on alignment on many x86 processors. The additional
10  *	jump magic is needed to get the timing stable on all the CPU's
11  *	we have to worry about.
12  */
13 
14 #include <linux/export.h>
15 #include <linux/sched.h>
16 #include <linux/timex.h>
17 #include <linux/preempt.h>
18 #include <linux/delay.h>
19 
20 #include <asm/processor.h>
21 #include <asm/delay.h>
22 #include <asm/timer.h>
23 #include <asm/mwait.h>
24 
25 #ifdef CONFIG_SMP
26 # include <asm/smp.h>
27 #endif
28 
29 /* simple loop based delay: */
30 static void delay_loop(unsigned long loops)
31 {
32 	asm volatile(
33 		"	test %0,%0	\n"
34 		"	jz 3f		\n"
35 		"	jmp 1f		\n"
36 
37 		".align 16		\n"
38 		"1:	jmp 2f		\n"
39 
40 		".align 16		\n"
41 		"2:	dec %0		\n"
42 		"	jnz 2b		\n"
43 		"3:	dec %0		\n"
44 
45 		: /* we don't need output */
46 		:"a" (loops)
47 	);
48 }
49 
50 /* TSC based delay: */
51 static void delay_tsc(unsigned long __loops)
52 {
53 	u64 bclock, now, loops = __loops;
54 	int cpu;
55 
56 	preempt_disable();
57 	cpu = smp_processor_id();
58 	bclock = rdtsc_ordered();
59 	for (;;) {
60 		now = rdtsc_ordered();
61 		if ((now - bclock) >= loops)
62 			break;
63 
64 		/* Allow RT tasks to run */
65 		preempt_enable();
66 		rep_nop();
67 		preempt_disable();
68 
69 		/*
70 		 * It is possible that we moved to another CPU, and
71 		 * since TSC's are per-cpu we need to calculate
72 		 * that. The delay must guarantee that we wait "at
73 		 * least" the amount of time. Being moved to another
74 		 * CPU could make the wait longer but we just need to
75 		 * make sure we waited long enough. Rebalance the
76 		 * counter for this CPU.
77 		 */
78 		if (unlikely(cpu != smp_processor_id())) {
79 			loops -= (now - bclock);
80 			cpu = smp_processor_id();
81 			bclock = rdtsc_ordered();
82 		}
83 	}
84 	preempt_enable();
85 }
86 
87 /*
88  * On some AMD platforms, MWAITX has a configurable 32-bit timer, that
89  * counts with TSC frequency. The input value is the loop of the
90  * counter, it will exit when the timer expires.
91  */
92 static void delay_mwaitx(unsigned long __loops)
93 {
94 	u64 start, end, delay, loops = __loops;
95 
96 	/*
97 	 * Timer value of 0 causes MWAITX to wait indefinitely, unless there
98 	 * is a store on the memory monitored by MONITORX.
99 	 */
100 	if (loops == 0)
101 		return;
102 
103 	start = rdtsc_ordered();
104 
105 	for (;;) {
106 		delay = min_t(u64, MWAITX_MAX_LOOPS, loops);
107 
108 		/*
109 		 * Use cpu_tss as a cacheline-aligned, seldomly
110 		 * accessed per-cpu variable as the monitor target.
111 		 */
112 		__monitorx(raw_cpu_ptr(&cpu_tss), 0, 0);
113 
114 		/*
115 		 * AMD, like Intel, supports the EAX hint and EAX=0xf
116 		 * means, do not enter any deep C-state and we use it
117 		 * here in delay() to minimize wakeup latency.
118 		 */
119 		__mwaitx(MWAITX_DISABLE_CSTATES, delay, MWAITX_ECX_TIMER_ENABLE);
120 
121 		end = rdtsc_ordered();
122 
123 		if (loops <= end - start)
124 			break;
125 
126 		loops -= end - start;
127 
128 		start = end;
129 	}
130 }
131 
132 /*
133  * Since we calibrate only once at boot, this
134  * function should be set once at boot and not changed
135  */
136 static void (*delay_fn)(unsigned long) = delay_loop;
137 
138 void use_tsc_delay(void)
139 {
140 	if (delay_fn == delay_loop)
141 		delay_fn = delay_tsc;
142 }
143 
144 void use_mwaitx_delay(void)
145 {
146 	delay_fn = delay_mwaitx;
147 }
148 
149 int read_current_timer(unsigned long *timer_val)
150 {
151 	if (delay_fn == delay_tsc) {
152 		*timer_val = rdtsc();
153 		return 0;
154 	}
155 	return -1;
156 }
157 
158 void __delay(unsigned long loops)
159 {
160 	delay_fn(loops);
161 }
162 EXPORT_SYMBOL(__delay);
163 
164 inline void __const_udelay(unsigned long xloops)
165 {
166 	unsigned long lpj = this_cpu_read(cpu_info.loops_per_jiffy) ? : loops_per_jiffy;
167 	int d0;
168 
169 	xloops *= 4;
170 	asm("mull %%edx"
171 		:"=d" (xloops), "=&a" (d0)
172 		:"1" (xloops), "0" (lpj * (HZ / 4)));
173 
174 	__delay(++xloops);
175 }
176 EXPORT_SYMBOL(__const_udelay);
177 
178 void __udelay(unsigned long usecs)
179 {
180 	__const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */
181 }
182 EXPORT_SYMBOL(__udelay);
183 
184 void __ndelay(unsigned long nsecs)
185 {
186 	__const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
187 }
188 EXPORT_SYMBOL(__ndelay);
189