xref: /linux/arch/x86/kvm/x86.h (revision f898c16a0624e7f2dcb0b1cda6916c9be6489197)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
4 
5 #include <linux/kvm_host.h>
6 #include <asm/fpu/xstate.h>
7 #include <asm/mce.h>
8 #include <asm/pvclock.h>
9 #include "kvm_cache_regs.h"
10 #include "kvm_emulate.h"
11 
12 struct kvm_caps {
13 	/* control of guest tsc rate supported? */
14 	bool has_tsc_control;
15 	/* maximum supported tsc_khz for guests */
16 	u32  max_guest_tsc_khz;
17 	/* number of bits of the fractional part of the TSC scaling ratio */
18 	u8   tsc_scaling_ratio_frac_bits;
19 	/* maximum allowed value of TSC scaling ratio */
20 	u64  max_tsc_scaling_ratio;
21 	/* 1ull << kvm_caps.tsc_scaling_ratio_frac_bits */
22 	u64  default_tsc_scaling_ratio;
23 	/* bus lock detection supported? */
24 	bool has_bus_lock_exit;
25 	/* notify VM exit supported? */
26 	bool has_notify_vmexit;
27 	/* bit mask of VM types */
28 	u32 supported_vm_types;
29 
30 	u64 supported_mce_cap;
31 	u64 supported_xcr0;
32 	u64 supported_xss;
33 	u64 supported_perf_cap;
34 };
35 
36 void kvm_spurious_fault(void);
37 
38 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check)		\
39 ({									\
40 	bool failed = (consistency_check);				\
41 	if (failed)							\
42 		trace_kvm_nested_vmenter_failed(#consistency_check, 0);	\
43 	failed;								\
44 })
45 
46 /*
47  * The first...last VMX feature MSRs that are emulated by KVM.  This may or may
48  * not cover all known VMX MSRs, as KVM doesn't emulate an MSR until there's an
49  * associated feature that KVM supports for nested virtualization.
50  */
51 #define KVM_FIRST_EMULATED_VMX_MSR	MSR_IA32_VMX_BASIC
52 #define KVM_LAST_EMULATED_VMX_MSR	MSR_IA32_VMX_VMFUNC
53 
54 #define KVM_DEFAULT_PLE_GAP		128
55 #define KVM_VMX_DEFAULT_PLE_WINDOW	4096
56 #define KVM_DEFAULT_PLE_WINDOW_GROW	2
57 #define KVM_DEFAULT_PLE_WINDOW_SHRINK	0
58 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX	UINT_MAX
59 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX	USHRT_MAX
60 #define KVM_SVM_DEFAULT_PLE_WINDOW	3000
61 
62 static inline unsigned int __grow_ple_window(unsigned int val,
63 		unsigned int base, unsigned int modifier, unsigned int max)
64 {
65 	u64 ret = val;
66 
67 	if (modifier < 1)
68 		return base;
69 
70 	if (modifier < base)
71 		ret *= modifier;
72 	else
73 		ret += modifier;
74 
75 	return min(ret, (u64)max);
76 }
77 
78 static inline unsigned int __shrink_ple_window(unsigned int val,
79 		unsigned int base, unsigned int modifier, unsigned int min)
80 {
81 	if (modifier < 1)
82 		return base;
83 
84 	if (modifier < base)
85 		val /= modifier;
86 	else
87 		val -= modifier;
88 
89 	return max(val, min);
90 }
91 
92 #define MSR_IA32_CR_PAT_DEFAULT  0x0007040600070406ULL
93 
94 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu);
95 int kvm_check_nested_events(struct kvm_vcpu *vcpu);
96 
97 static inline bool kvm_vcpu_has_run(struct kvm_vcpu *vcpu)
98 {
99 	return vcpu->arch.last_vmentry_cpu != -1;
100 }
101 
102 static inline bool kvm_is_exception_pending(struct kvm_vcpu *vcpu)
103 {
104 	return vcpu->arch.exception.pending ||
105 	       vcpu->arch.exception_vmexit.pending ||
106 	       kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu);
107 }
108 
109 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
110 {
111 	vcpu->arch.exception.pending = false;
112 	vcpu->arch.exception.injected = false;
113 	vcpu->arch.exception_vmexit.pending = false;
114 }
115 
116 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
117 	bool soft)
118 {
119 	vcpu->arch.interrupt.injected = true;
120 	vcpu->arch.interrupt.soft = soft;
121 	vcpu->arch.interrupt.nr = vector;
122 }
123 
124 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
125 {
126 	vcpu->arch.interrupt.injected = false;
127 }
128 
129 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
130 {
131 	return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
132 		vcpu->arch.nmi_injected;
133 }
134 
135 static inline bool kvm_exception_is_soft(unsigned int nr)
136 {
137 	return (nr == BP_VECTOR) || (nr == OF_VECTOR);
138 }
139 
140 static inline bool is_protmode(struct kvm_vcpu *vcpu)
141 {
142 	return kvm_is_cr0_bit_set(vcpu, X86_CR0_PE);
143 }
144 
145 static inline bool is_long_mode(struct kvm_vcpu *vcpu)
146 {
147 #ifdef CONFIG_X86_64
148 	return !!(vcpu->arch.efer & EFER_LMA);
149 #else
150 	return false;
151 #endif
152 }
153 
154 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
155 {
156 	int cs_db, cs_l;
157 
158 	WARN_ON_ONCE(vcpu->arch.guest_state_protected);
159 
160 	if (!is_long_mode(vcpu))
161 		return false;
162 	static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
163 	return cs_l;
164 }
165 
166 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu)
167 {
168 	/*
169 	 * If running with protected guest state, the CS register is not
170 	 * accessible. The hypercall register values will have had to been
171 	 * provided in 64-bit mode, so assume the guest is in 64-bit.
172 	 */
173 	return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu);
174 }
175 
176 static inline bool x86_exception_has_error_code(unsigned int vector)
177 {
178 	static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
179 			BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
180 			BIT(PF_VECTOR) | BIT(AC_VECTOR);
181 
182 	return (1U << vector) & exception_has_error_code;
183 }
184 
185 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
186 {
187 	return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
188 }
189 
190 static inline bool is_pae(struct kvm_vcpu *vcpu)
191 {
192 	return kvm_is_cr4_bit_set(vcpu, X86_CR4_PAE);
193 }
194 
195 static inline bool is_pse(struct kvm_vcpu *vcpu)
196 {
197 	return kvm_is_cr4_bit_set(vcpu, X86_CR4_PSE);
198 }
199 
200 static inline bool is_paging(struct kvm_vcpu *vcpu)
201 {
202 	return likely(kvm_is_cr0_bit_set(vcpu, X86_CR0_PG));
203 }
204 
205 static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
206 {
207 	return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
208 }
209 
210 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
211 {
212 	return kvm_is_cr4_bit_set(vcpu, X86_CR4_LA57) ? 57 : 48;
213 }
214 
215 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
216 {
217 	return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu));
218 }
219 
220 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
221 					gva_t gva, gfn_t gfn, unsigned access)
222 {
223 	u64 gen = kvm_memslots(vcpu->kvm)->generation;
224 
225 	if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
226 		return;
227 
228 	/*
229 	 * If this is a shadow nested page table, the "GVA" is
230 	 * actually a nGPA.
231 	 */
232 	vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
233 	vcpu->arch.mmio_access = access;
234 	vcpu->arch.mmio_gfn = gfn;
235 	vcpu->arch.mmio_gen = gen;
236 }
237 
238 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
239 {
240 	return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
241 }
242 
243 /*
244  * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
245  * clear all mmio cache info.
246  */
247 #define MMIO_GVA_ANY (~(gva_t)0)
248 
249 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
250 {
251 	if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
252 		return;
253 
254 	vcpu->arch.mmio_gva = 0;
255 }
256 
257 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
258 {
259 	if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
260 	      vcpu->arch.mmio_gva == (gva & PAGE_MASK))
261 		return true;
262 
263 	return false;
264 }
265 
266 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
267 {
268 	if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
269 	      vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
270 		return true;
271 
272 	return false;
273 }
274 
275 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
276 {
277 	unsigned long val = kvm_register_read_raw(vcpu, reg);
278 
279 	return is_64_bit_mode(vcpu) ? val : (u32)val;
280 }
281 
282 static inline void kvm_register_write(struct kvm_vcpu *vcpu,
283 				       int reg, unsigned long val)
284 {
285 	if (!is_64_bit_mode(vcpu))
286 		val = (u32)val;
287 	return kvm_register_write_raw(vcpu, reg, val);
288 }
289 
290 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
291 {
292 	return !(kvm->arch.disabled_quirks & quirk);
293 }
294 
295 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
296 
297 u64 get_kvmclock_ns(struct kvm *kvm);
298 uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm);
299 bool kvm_get_monotonic_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp);
300 
301 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
302 	gva_t addr, void *val, unsigned int bytes,
303 	struct x86_exception *exception);
304 
305 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
306 	gva_t addr, void *val, unsigned int bytes,
307 	struct x86_exception *exception);
308 
309 int handle_ud(struct kvm_vcpu *vcpu);
310 
311 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu,
312 				   struct kvm_queued_exception *ex);
313 
314 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
315 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
316 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
317 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
318 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
319 					  int page_num);
320 bool kvm_vector_hashing_enabled(void);
321 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code);
322 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
323 				    void *insn, int insn_len);
324 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
325 			    int emulation_type, void *insn, int insn_len);
326 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu);
327 
328 extern u64 host_xcr0;
329 extern u64 host_xss;
330 extern u64 host_arch_capabilities;
331 
332 extern struct kvm_caps kvm_caps;
333 
334 extern bool enable_pmu;
335 
336 /*
337  * Get a filtered version of KVM's supported XCR0 that strips out dynamic
338  * features for which the current process doesn't (yet) have permission to use.
339  * This is intended to be used only when enumerating support to userspace,
340  * e.g. in KVM_GET_SUPPORTED_CPUID and KVM_CAP_XSAVE2, it does NOT need to be
341  * used to check/restrict guest behavior as KVM rejects KVM_SET_CPUID{2} if
342  * userspace attempts to enable unpermitted features.
343  */
344 static inline u64 kvm_get_filtered_xcr0(void)
345 {
346 	u64 permitted_xcr0 = kvm_caps.supported_xcr0;
347 
348 	BUILD_BUG_ON(XFEATURE_MASK_USER_DYNAMIC != XFEATURE_MASK_XTILE_DATA);
349 
350 	if (permitted_xcr0 & XFEATURE_MASK_USER_DYNAMIC) {
351 		permitted_xcr0 &= xstate_get_guest_group_perm();
352 
353 		/*
354 		 * Treat XTILE_CFG as unsupported if the current process isn't
355 		 * allowed to use XTILE_DATA, as attempting to set XTILE_CFG in
356 		 * XCR0 without setting XTILE_DATA is architecturally illegal.
357 		 */
358 		if (!(permitted_xcr0 & XFEATURE_MASK_XTILE_DATA))
359 			permitted_xcr0 &= ~XFEATURE_MASK_XTILE_CFG;
360 	}
361 	return permitted_xcr0;
362 }
363 
364 static inline bool kvm_mpx_supported(void)
365 {
366 	return (kvm_caps.supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
367 		== (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
368 }
369 
370 extern unsigned int min_timer_period_us;
371 
372 extern bool enable_vmware_backdoor;
373 
374 extern int pi_inject_timer;
375 
376 extern bool report_ignored_msrs;
377 
378 extern bool eager_page_split;
379 
380 static inline void kvm_pr_unimpl_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
381 {
382 	if (report_ignored_msrs)
383 		vcpu_unimpl(vcpu, "Unhandled WRMSR(0x%x) = 0x%llx\n", msr, data);
384 }
385 
386 static inline void kvm_pr_unimpl_rdmsr(struct kvm_vcpu *vcpu, u32 msr)
387 {
388 	if (report_ignored_msrs)
389 		vcpu_unimpl(vcpu, "Unhandled RDMSR(0x%x)\n", msr);
390 }
391 
392 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
393 {
394 	return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
395 				   vcpu->arch.virtual_tsc_shift);
396 }
397 
398 /* Same "calling convention" as do_div:
399  * - divide (n << 32) by base
400  * - put result in n
401  * - return remainder
402  */
403 #define do_shl32_div32(n, base)					\
404 	({							\
405 	    u32 __quot, __rem;					\
406 	    asm("divl %2" : "=a" (__quot), "=d" (__rem)		\
407 			: "rm" (base), "0" (0), "1" ((u32) n));	\
408 	    n = __quot;						\
409 	    __rem;						\
410 	 })
411 
412 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
413 {
414 	return kvm->arch.mwait_in_guest;
415 }
416 
417 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
418 {
419 	return kvm->arch.hlt_in_guest;
420 }
421 
422 static inline bool kvm_pause_in_guest(struct kvm *kvm)
423 {
424 	return kvm->arch.pause_in_guest;
425 }
426 
427 static inline bool kvm_cstate_in_guest(struct kvm *kvm)
428 {
429 	return kvm->arch.cstate_in_guest;
430 }
431 
432 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm)
433 {
434 	return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED;
435 }
436 
437 static __always_inline void kvm_before_interrupt(struct kvm_vcpu *vcpu,
438 						 enum kvm_intr_type intr)
439 {
440 	WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr);
441 }
442 
443 static __always_inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
444 {
445 	WRITE_ONCE(vcpu->arch.handling_intr_from_guest, 0);
446 }
447 
448 static inline bool kvm_handling_nmi_from_guest(struct kvm_vcpu *vcpu)
449 {
450 	return vcpu->arch.handling_intr_from_guest == KVM_HANDLING_NMI;
451 }
452 
453 static inline bool kvm_pat_valid(u64 data)
454 {
455 	if (data & 0xF8F8F8F8F8F8F8F8ull)
456 		return false;
457 	/* 0, 1, 4, 5, 6, 7 are valid values.  */
458 	return (data | ((data & 0x0202020202020202ull) << 1)) == data;
459 }
460 
461 static inline bool kvm_dr7_valid(u64 data)
462 {
463 	/* Bits [63:32] are reserved */
464 	return !(data >> 32);
465 }
466 static inline bool kvm_dr6_valid(u64 data)
467 {
468 	/* Bits [63:32] are reserved */
469 	return !(data >> 32);
470 }
471 
472 /*
473  * Trigger machine check on the host. We assume all the MSRs are already set up
474  * by the CPU and that we still run on the same CPU as the MCE occurred on.
475  * We pass a fake environment to the machine check handler because we want
476  * the guest to be always treated like user space, no matter what context
477  * it used internally.
478  */
479 static inline void kvm_machine_check(void)
480 {
481 #if defined(CONFIG_X86_MCE)
482 	struct pt_regs regs = {
483 		.cs = 3, /* Fake ring 3 no matter what the guest ran on */
484 		.flags = X86_EFLAGS_IF,
485 	};
486 
487 	do_machine_check(&regs);
488 #endif
489 }
490 
491 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
492 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
493 int kvm_spec_ctrl_test_value(u64 value);
494 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
495 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
496 			      struct x86_exception *e);
497 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva);
498 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
499 
500 /*
501  * Internal error codes that are used to indicate that MSR emulation encountered
502  * an error that should result in #GP in the guest, unless userspace
503  * handles it.
504  */
505 #define  KVM_MSR_RET_INVALID	2	/* in-kernel MSR emulation #GP condition */
506 #define  KVM_MSR_RET_FILTERED	3	/* #GP due to userspace MSR filter */
507 
508 #define __cr4_reserved_bits(__cpu_has, __c)             \
509 ({                                                      \
510 	u64 __reserved_bits = CR4_RESERVED_BITS;        \
511                                                         \
512 	if (!__cpu_has(__c, X86_FEATURE_XSAVE))         \
513 		__reserved_bits |= X86_CR4_OSXSAVE;     \
514 	if (!__cpu_has(__c, X86_FEATURE_SMEP))          \
515 		__reserved_bits |= X86_CR4_SMEP;        \
516 	if (!__cpu_has(__c, X86_FEATURE_SMAP))          \
517 		__reserved_bits |= X86_CR4_SMAP;        \
518 	if (!__cpu_has(__c, X86_FEATURE_FSGSBASE))      \
519 		__reserved_bits |= X86_CR4_FSGSBASE;    \
520 	if (!__cpu_has(__c, X86_FEATURE_PKU))           \
521 		__reserved_bits |= X86_CR4_PKE;         \
522 	if (!__cpu_has(__c, X86_FEATURE_LA57))          \
523 		__reserved_bits |= X86_CR4_LA57;        \
524 	if (!__cpu_has(__c, X86_FEATURE_UMIP))          \
525 		__reserved_bits |= X86_CR4_UMIP;        \
526 	if (!__cpu_has(__c, X86_FEATURE_VMX))           \
527 		__reserved_bits |= X86_CR4_VMXE;        \
528 	if (!__cpu_has(__c, X86_FEATURE_PCID))          \
529 		__reserved_bits |= X86_CR4_PCIDE;       \
530 	if (!__cpu_has(__c, X86_FEATURE_LAM))           \
531 		__reserved_bits |= X86_CR4_LAM_SUP;     \
532 	__reserved_bits;                                \
533 })
534 
535 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
536 			  void *dst);
537 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
538 			 void *dst);
539 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
540 			 unsigned int port, void *data,  unsigned int count,
541 			 int in);
542 
543 #endif
544