1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_X86_H 3 #define ARCH_X86_KVM_X86_H 4 5 #include <linux/kvm_host.h> 6 #include <asm/fpu/xstate.h> 7 #include <asm/mce.h> 8 #include <asm/pvclock.h> 9 #include "kvm_cache_regs.h" 10 #include "kvm_emulate.h" 11 12 struct kvm_caps { 13 /* control of guest tsc rate supported? */ 14 bool has_tsc_control; 15 /* maximum supported tsc_khz for guests */ 16 u32 max_guest_tsc_khz; 17 /* number of bits of the fractional part of the TSC scaling ratio */ 18 u8 tsc_scaling_ratio_frac_bits; 19 /* maximum allowed value of TSC scaling ratio */ 20 u64 max_tsc_scaling_ratio; 21 /* 1ull << kvm_caps.tsc_scaling_ratio_frac_bits */ 22 u64 default_tsc_scaling_ratio; 23 /* bus lock detection supported? */ 24 bool has_bus_lock_exit; 25 /* notify VM exit supported? */ 26 bool has_notify_vmexit; 27 /* bit mask of VM types */ 28 u32 supported_vm_types; 29 30 u64 supported_mce_cap; 31 u64 supported_xcr0; 32 u64 supported_xss; 33 u64 supported_perf_cap; 34 }; 35 36 struct kvm_host_values { 37 /* 38 * The host's raw MAXPHYADDR, i.e. the number of non-reserved physical 39 * address bits irrespective of features that repurpose legal bits, 40 * e.g. MKTME. 41 */ 42 u8 maxphyaddr; 43 44 u64 efer; 45 u64 xcr0; 46 u64 xss; 47 u64 arch_capabilities; 48 }; 49 50 void kvm_spurious_fault(void); 51 52 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \ 53 ({ \ 54 bool failed = (consistency_check); \ 55 if (failed) \ 56 trace_kvm_nested_vmenter_failed(#consistency_check, 0); \ 57 failed; \ 58 }) 59 60 /* 61 * The first...last VMX feature MSRs that are emulated by KVM. This may or may 62 * not cover all known VMX MSRs, as KVM doesn't emulate an MSR until there's an 63 * associated feature that KVM supports for nested virtualization. 64 */ 65 #define KVM_FIRST_EMULATED_VMX_MSR MSR_IA32_VMX_BASIC 66 #define KVM_LAST_EMULATED_VMX_MSR MSR_IA32_VMX_VMFUNC 67 68 #define KVM_DEFAULT_PLE_GAP 128 69 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096 70 #define KVM_DEFAULT_PLE_WINDOW_GROW 2 71 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0 72 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX 73 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX 74 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000 75 76 static inline unsigned int __grow_ple_window(unsigned int val, 77 unsigned int base, unsigned int modifier, unsigned int max) 78 { 79 u64 ret = val; 80 81 if (modifier < 1) 82 return base; 83 84 if (modifier < base) 85 ret *= modifier; 86 else 87 ret += modifier; 88 89 return min(ret, (u64)max); 90 } 91 92 static inline unsigned int __shrink_ple_window(unsigned int val, 93 unsigned int base, unsigned int modifier, unsigned int min) 94 { 95 if (modifier < 1) 96 return base; 97 98 if (modifier < base) 99 val /= modifier; 100 else 101 val -= modifier; 102 103 return max(val, min); 104 } 105 106 #define MSR_IA32_CR_PAT_DEFAULT \ 107 PAT_VALUE(WB, WT, UC_MINUS, UC, WB, WT, UC_MINUS, UC) 108 109 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu); 110 int kvm_check_nested_events(struct kvm_vcpu *vcpu); 111 112 /* Forcibly leave the nested mode in cases like a vCPU reset */ 113 static inline void kvm_leave_nested(struct kvm_vcpu *vcpu) 114 { 115 kvm_x86_ops.nested_ops->leave_nested(vcpu); 116 } 117 118 static inline bool kvm_vcpu_has_run(struct kvm_vcpu *vcpu) 119 { 120 return vcpu->arch.last_vmentry_cpu != -1; 121 } 122 123 static inline bool kvm_is_exception_pending(struct kvm_vcpu *vcpu) 124 { 125 return vcpu->arch.exception.pending || 126 vcpu->arch.exception_vmexit.pending || 127 kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu); 128 } 129 130 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu) 131 { 132 vcpu->arch.exception.pending = false; 133 vcpu->arch.exception.injected = false; 134 vcpu->arch.exception_vmexit.pending = false; 135 } 136 137 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector, 138 bool soft) 139 { 140 vcpu->arch.interrupt.injected = true; 141 vcpu->arch.interrupt.soft = soft; 142 vcpu->arch.interrupt.nr = vector; 143 } 144 145 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu) 146 { 147 vcpu->arch.interrupt.injected = false; 148 } 149 150 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu) 151 { 152 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected || 153 vcpu->arch.nmi_injected; 154 } 155 156 static inline bool kvm_exception_is_soft(unsigned int nr) 157 { 158 return (nr == BP_VECTOR) || (nr == OF_VECTOR); 159 } 160 161 static inline bool is_protmode(struct kvm_vcpu *vcpu) 162 { 163 return kvm_is_cr0_bit_set(vcpu, X86_CR0_PE); 164 } 165 166 static inline bool is_long_mode(struct kvm_vcpu *vcpu) 167 { 168 #ifdef CONFIG_X86_64 169 return !!(vcpu->arch.efer & EFER_LMA); 170 #else 171 return false; 172 #endif 173 } 174 175 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu) 176 { 177 int cs_db, cs_l; 178 179 WARN_ON_ONCE(vcpu->arch.guest_state_protected); 180 181 if (!is_long_mode(vcpu)) 182 return false; 183 kvm_x86_call(get_cs_db_l_bits)(vcpu, &cs_db, &cs_l); 184 return cs_l; 185 } 186 187 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu) 188 { 189 /* 190 * If running with protected guest state, the CS register is not 191 * accessible. The hypercall register values will have had to been 192 * provided in 64-bit mode, so assume the guest is in 64-bit. 193 */ 194 return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu); 195 } 196 197 static inline bool x86_exception_has_error_code(unsigned int vector) 198 { 199 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) | 200 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) | 201 BIT(PF_VECTOR) | BIT(AC_VECTOR); 202 203 return (1U << vector) & exception_has_error_code; 204 } 205 206 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu) 207 { 208 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu; 209 } 210 211 static inline bool is_pae(struct kvm_vcpu *vcpu) 212 { 213 return kvm_is_cr4_bit_set(vcpu, X86_CR4_PAE); 214 } 215 216 static inline bool is_pse(struct kvm_vcpu *vcpu) 217 { 218 return kvm_is_cr4_bit_set(vcpu, X86_CR4_PSE); 219 } 220 221 static inline bool is_paging(struct kvm_vcpu *vcpu) 222 { 223 return likely(kvm_is_cr0_bit_set(vcpu, X86_CR0_PG)); 224 } 225 226 static inline bool is_pae_paging(struct kvm_vcpu *vcpu) 227 { 228 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu); 229 } 230 231 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu) 232 { 233 return kvm_is_cr4_bit_set(vcpu, X86_CR4_LA57) ? 57 : 48; 234 } 235 236 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu) 237 { 238 return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu)); 239 } 240 241 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu, 242 gva_t gva, gfn_t gfn, unsigned access) 243 { 244 u64 gen = kvm_memslots(vcpu->kvm)->generation; 245 246 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 247 return; 248 249 /* 250 * If this is a shadow nested page table, the "GVA" is 251 * actually a nGPA. 252 */ 253 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK; 254 vcpu->arch.mmio_access = access; 255 vcpu->arch.mmio_gfn = gfn; 256 vcpu->arch.mmio_gen = gen; 257 } 258 259 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu) 260 { 261 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation; 262 } 263 264 /* 265 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we 266 * clear all mmio cache info. 267 */ 268 #define MMIO_GVA_ANY (~(gva_t)0) 269 270 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva) 271 { 272 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK)) 273 return; 274 275 vcpu->arch.mmio_gva = 0; 276 } 277 278 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva) 279 { 280 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva && 281 vcpu->arch.mmio_gva == (gva & PAGE_MASK)) 282 return true; 283 284 return false; 285 } 286 287 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa) 288 { 289 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn && 290 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT) 291 return true; 292 293 return false; 294 } 295 296 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg) 297 { 298 unsigned long val = kvm_register_read_raw(vcpu, reg); 299 300 return is_64_bit_mode(vcpu) ? val : (u32)val; 301 } 302 303 static inline void kvm_register_write(struct kvm_vcpu *vcpu, 304 int reg, unsigned long val) 305 { 306 if (!is_64_bit_mode(vcpu)) 307 val = (u32)val; 308 return kvm_register_write_raw(vcpu, reg, val); 309 } 310 311 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk) 312 { 313 return !(kvm->arch.disabled_quirks & quirk); 314 } 315 316 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip); 317 318 u64 get_kvmclock_ns(struct kvm *kvm); 319 uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm); 320 bool kvm_get_monotonic_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp); 321 322 int kvm_read_guest_virt(struct kvm_vcpu *vcpu, 323 gva_t addr, void *val, unsigned int bytes, 324 struct x86_exception *exception); 325 326 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, 327 gva_t addr, void *val, unsigned int bytes, 328 struct x86_exception *exception); 329 330 int handle_ud(struct kvm_vcpu *vcpu); 331 332 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu, 333 struct kvm_queued_exception *ex); 334 335 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); 336 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 337 bool kvm_vector_hashing_enabled(void); 338 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code); 339 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type, 340 void *insn, int insn_len); 341 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 342 int emulation_type, void *insn, int insn_len); 343 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu); 344 fastpath_t handle_fastpath_hlt(struct kvm_vcpu *vcpu); 345 346 extern struct kvm_caps kvm_caps; 347 extern struct kvm_host_values kvm_host; 348 349 extern bool enable_pmu; 350 351 /* 352 * Get a filtered version of KVM's supported XCR0 that strips out dynamic 353 * features for which the current process doesn't (yet) have permission to use. 354 * This is intended to be used only when enumerating support to userspace, 355 * e.g. in KVM_GET_SUPPORTED_CPUID and KVM_CAP_XSAVE2, it does NOT need to be 356 * used to check/restrict guest behavior as KVM rejects KVM_SET_CPUID{2} if 357 * userspace attempts to enable unpermitted features. 358 */ 359 static inline u64 kvm_get_filtered_xcr0(void) 360 { 361 u64 permitted_xcr0 = kvm_caps.supported_xcr0; 362 363 BUILD_BUG_ON(XFEATURE_MASK_USER_DYNAMIC != XFEATURE_MASK_XTILE_DATA); 364 365 if (permitted_xcr0 & XFEATURE_MASK_USER_DYNAMIC) { 366 permitted_xcr0 &= xstate_get_guest_group_perm(); 367 368 /* 369 * Treat XTILE_CFG as unsupported if the current process isn't 370 * allowed to use XTILE_DATA, as attempting to set XTILE_CFG in 371 * XCR0 without setting XTILE_DATA is architecturally illegal. 372 */ 373 if (!(permitted_xcr0 & XFEATURE_MASK_XTILE_DATA)) 374 permitted_xcr0 &= ~XFEATURE_MASK_XTILE_CFG; 375 } 376 return permitted_xcr0; 377 } 378 379 static inline bool kvm_mpx_supported(void) 380 { 381 return (kvm_caps.supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) 382 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); 383 } 384 385 extern unsigned int min_timer_period_us; 386 387 extern bool enable_vmware_backdoor; 388 389 extern int pi_inject_timer; 390 391 extern bool report_ignored_msrs; 392 393 extern bool eager_page_split; 394 395 static inline void kvm_pr_unimpl_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data) 396 { 397 if (report_ignored_msrs) 398 vcpu_unimpl(vcpu, "Unhandled WRMSR(0x%x) = 0x%llx\n", msr, data); 399 } 400 401 static inline void kvm_pr_unimpl_rdmsr(struct kvm_vcpu *vcpu, u32 msr) 402 { 403 if (report_ignored_msrs) 404 vcpu_unimpl(vcpu, "Unhandled RDMSR(0x%x)\n", msr); 405 } 406 407 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 408 { 409 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 410 vcpu->arch.virtual_tsc_shift); 411 } 412 413 /* Same "calling convention" as do_div: 414 * - divide (n << 32) by base 415 * - put result in n 416 * - return remainder 417 */ 418 #define do_shl32_div32(n, base) \ 419 ({ \ 420 u32 __quot, __rem; \ 421 asm("divl %2" : "=a" (__quot), "=d" (__rem) \ 422 : "rm" (base), "0" (0), "1" ((u32) n)); \ 423 n = __quot; \ 424 __rem; \ 425 }) 426 427 static inline bool kvm_mwait_in_guest(struct kvm *kvm) 428 { 429 return kvm->arch.mwait_in_guest; 430 } 431 432 static inline bool kvm_hlt_in_guest(struct kvm *kvm) 433 { 434 return kvm->arch.hlt_in_guest; 435 } 436 437 static inline bool kvm_pause_in_guest(struct kvm *kvm) 438 { 439 return kvm->arch.pause_in_guest; 440 } 441 442 static inline bool kvm_cstate_in_guest(struct kvm *kvm) 443 { 444 return kvm->arch.cstate_in_guest; 445 } 446 447 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm) 448 { 449 return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED; 450 } 451 452 static __always_inline void kvm_before_interrupt(struct kvm_vcpu *vcpu, 453 enum kvm_intr_type intr) 454 { 455 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr); 456 } 457 458 static __always_inline void kvm_after_interrupt(struct kvm_vcpu *vcpu) 459 { 460 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, 0); 461 } 462 463 static inline bool kvm_handling_nmi_from_guest(struct kvm_vcpu *vcpu) 464 { 465 return vcpu->arch.handling_intr_from_guest == KVM_HANDLING_NMI; 466 } 467 468 static inline bool kvm_pat_valid(u64 data) 469 { 470 if (data & 0xF8F8F8F8F8F8F8F8ull) 471 return false; 472 /* 0, 1, 4, 5, 6, 7 are valid values. */ 473 return (data | ((data & 0x0202020202020202ull) << 1)) == data; 474 } 475 476 static inline bool kvm_dr7_valid(u64 data) 477 { 478 /* Bits [63:32] are reserved */ 479 return !(data >> 32); 480 } 481 static inline bool kvm_dr6_valid(u64 data) 482 { 483 /* Bits [63:32] are reserved */ 484 return !(data >> 32); 485 } 486 487 /* 488 * Trigger machine check on the host. We assume all the MSRs are already set up 489 * by the CPU and that we still run on the same CPU as the MCE occurred on. 490 * We pass a fake environment to the machine check handler because we want 491 * the guest to be always treated like user space, no matter what context 492 * it used internally. 493 */ 494 static inline void kvm_machine_check(void) 495 { 496 #if defined(CONFIG_X86_MCE) 497 struct pt_regs regs = { 498 .cs = 3, /* Fake ring 3 no matter what the guest ran on */ 499 .flags = X86_EFLAGS_IF, 500 }; 501 502 do_machine_check(®s); 503 #endif 504 } 505 506 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu); 507 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu); 508 int kvm_spec_ctrl_test_value(u64 value); 509 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 510 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r, 511 struct x86_exception *e); 512 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva); 513 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); 514 515 enum kvm_msr_access { 516 MSR_TYPE_R = BIT(0), 517 MSR_TYPE_W = BIT(1), 518 MSR_TYPE_RW = MSR_TYPE_R | MSR_TYPE_W, 519 }; 520 521 /* 522 * Internal error codes that are used to indicate that MSR emulation encountered 523 * an error that should result in #GP in the guest, unless userspace handles it. 524 * Note, '1', '0', and negative numbers are off limits, as they are used by KVM 525 * as part of KVM's lightly documented internal KVM_RUN return codes. 526 * 527 * UNSUPPORTED - The MSR isn't supported, either because it is completely 528 * unknown to KVM, or because the MSR should not exist according 529 * to the vCPU model. 530 * 531 * FILTERED - Access to the MSR is denied by a userspace MSR filter. 532 */ 533 #define KVM_MSR_RET_UNSUPPORTED 2 534 #define KVM_MSR_RET_FILTERED 3 535 536 #define __cr4_reserved_bits(__cpu_has, __c) \ 537 ({ \ 538 u64 __reserved_bits = CR4_RESERVED_BITS; \ 539 \ 540 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \ 541 __reserved_bits |= X86_CR4_OSXSAVE; \ 542 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \ 543 __reserved_bits |= X86_CR4_SMEP; \ 544 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \ 545 __reserved_bits |= X86_CR4_SMAP; \ 546 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \ 547 __reserved_bits |= X86_CR4_FSGSBASE; \ 548 if (!__cpu_has(__c, X86_FEATURE_PKU)) \ 549 __reserved_bits |= X86_CR4_PKE; \ 550 if (!__cpu_has(__c, X86_FEATURE_LA57)) \ 551 __reserved_bits |= X86_CR4_LA57; \ 552 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \ 553 __reserved_bits |= X86_CR4_UMIP; \ 554 if (!__cpu_has(__c, X86_FEATURE_VMX)) \ 555 __reserved_bits |= X86_CR4_VMXE; \ 556 if (!__cpu_has(__c, X86_FEATURE_PCID)) \ 557 __reserved_bits |= X86_CR4_PCIDE; \ 558 if (!__cpu_has(__c, X86_FEATURE_LAM)) \ 559 __reserved_bits |= X86_CR4_LAM_SUP; \ 560 __reserved_bits; \ 561 }) 562 563 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 564 void *dst); 565 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 566 void *dst); 567 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size, 568 unsigned int port, void *data, unsigned int count, 569 int in); 570 571 #endif 572