1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_X86_H 3 #define ARCH_X86_KVM_X86_H 4 5 #include <linux/kvm_host.h> 6 #include <asm/fpu/xstate.h> 7 #include <asm/mce.h> 8 #include <asm/pvclock.h> 9 #include "kvm_cache_regs.h" 10 #include "kvm_emulate.h" 11 #include "cpuid.h" 12 13 struct kvm_caps { 14 /* control of guest tsc rate supported? */ 15 bool has_tsc_control; 16 /* maximum supported tsc_khz for guests */ 17 u32 max_guest_tsc_khz; 18 /* number of bits of the fractional part of the TSC scaling ratio */ 19 u8 tsc_scaling_ratio_frac_bits; 20 /* maximum allowed value of TSC scaling ratio */ 21 u64 max_tsc_scaling_ratio; 22 /* 1ull << kvm_caps.tsc_scaling_ratio_frac_bits */ 23 u64 default_tsc_scaling_ratio; 24 /* bus lock detection supported? */ 25 bool has_bus_lock_exit; 26 /* notify VM exit supported? */ 27 bool has_notify_vmexit; 28 /* bit mask of VM types */ 29 u32 supported_vm_types; 30 31 u64 supported_mce_cap; 32 u64 supported_xcr0; 33 u64 supported_xss; 34 u64 supported_perf_cap; 35 }; 36 37 struct kvm_host_values { 38 /* 39 * The host's raw MAXPHYADDR, i.e. the number of non-reserved physical 40 * address bits irrespective of features that repurpose legal bits, 41 * e.g. MKTME. 42 */ 43 u8 maxphyaddr; 44 45 u64 efer; 46 u64 xcr0; 47 u64 xss; 48 u64 arch_capabilities; 49 }; 50 51 void kvm_spurious_fault(void); 52 53 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \ 54 ({ \ 55 bool failed = (consistency_check); \ 56 if (failed) \ 57 trace_kvm_nested_vmenter_failed(#consistency_check, 0); \ 58 failed; \ 59 }) 60 61 /* 62 * The first...last VMX feature MSRs that are emulated by KVM. This may or may 63 * not cover all known VMX MSRs, as KVM doesn't emulate an MSR until there's an 64 * associated feature that KVM supports for nested virtualization. 65 */ 66 #define KVM_FIRST_EMULATED_VMX_MSR MSR_IA32_VMX_BASIC 67 #define KVM_LAST_EMULATED_VMX_MSR MSR_IA32_VMX_VMFUNC 68 69 #define KVM_DEFAULT_PLE_GAP 128 70 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096 71 #define KVM_DEFAULT_PLE_WINDOW_GROW 2 72 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0 73 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX 74 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX 75 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000 76 77 static inline unsigned int __grow_ple_window(unsigned int val, 78 unsigned int base, unsigned int modifier, unsigned int max) 79 { 80 u64 ret = val; 81 82 if (modifier < 1) 83 return base; 84 85 if (modifier < base) 86 ret *= modifier; 87 else 88 ret += modifier; 89 90 return min(ret, (u64)max); 91 } 92 93 static inline unsigned int __shrink_ple_window(unsigned int val, 94 unsigned int base, unsigned int modifier, unsigned int min) 95 { 96 if (modifier < 1) 97 return base; 98 99 if (modifier < base) 100 val /= modifier; 101 else 102 val -= modifier; 103 104 return max(val, min); 105 } 106 107 #define MSR_IA32_CR_PAT_DEFAULT \ 108 PAT_VALUE(WB, WT, UC_MINUS, UC, WB, WT, UC_MINUS, UC) 109 110 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu); 111 int kvm_check_nested_events(struct kvm_vcpu *vcpu); 112 113 /* Forcibly leave the nested mode in cases like a vCPU reset */ 114 static inline void kvm_leave_nested(struct kvm_vcpu *vcpu) 115 { 116 kvm_x86_ops.nested_ops->leave_nested(vcpu); 117 } 118 119 static inline bool kvm_vcpu_has_run(struct kvm_vcpu *vcpu) 120 { 121 return vcpu->arch.last_vmentry_cpu != -1; 122 } 123 124 static inline void kvm_set_mp_state(struct kvm_vcpu *vcpu, int mp_state) 125 { 126 vcpu->arch.mp_state = mp_state; 127 if (mp_state == KVM_MP_STATE_RUNNABLE) 128 vcpu->arch.pv.pv_unhalted = false; 129 } 130 131 static inline bool kvm_is_exception_pending(struct kvm_vcpu *vcpu) 132 { 133 return vcpu->arch.exception.pending || 134 vcpu->arch.exception_vmexit.pending || 135 kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu); 136 } 137 138 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu) 139 { 140 vcpu->arch.exception.pending = false; 141 vcpu->arch.exception.injected = false; 142 vcpu->arch.exception_vmexit.pending = false; 143 } 144 145 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector, 146 bool soft) 147 { 148 vcpu->arch.interrupt.injected = true; 149 vcpu->arch.interrupt.soft = soft; 150 vcpu->arch.interrupt.nr = vector; 151 } 152 153 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu) 154 { 155 vcpu->arch.interrupt.injected = false; 156 } 157 158 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu) 159 { 160 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected || 161 vcpu->arch.nmi_injected; 162 } 163 164 static inline bool kvm_exception_is_soft(unsigned int nr) 165 { 166 return (nr == BP_VECTOR) || (nr == OF_VECTOR); 167 } 168 169 static inline bool is_protmode(struct kvm_vcpu *vcpu) 170 { 171 return kvm_is_cr0_bit_set(vcpu, X86_CR0_PE); 172 } 173 174 static inline bool is_long_mode(struct kvm_vcpu *vcpu) 175 { 176 #ifdef CONFIG_X86_64 177 return !!(vcpu->arch.efer & EFER_LMA); 178 #else 179 return false; 180 #endif 181 } 182 183 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu) 184 { 185 int cs_db, cs_l; 186 187 WARN_ON_ONCE(vcpu->arch.guest_state_protected); 188 189 if (!is_long_mode(vcpu)) 190 return false; 191 kvm_x86_call(get_cs_db_l_bits)(vcpu, &cs_db, &cs_l); 192 return cs_l; 193 } 194 195 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu) 196 { 197 /* 198 * If running with protected guest state, the CS register is not 199 * accessible. The hypercall register values will have had to been 200 * provided in 64-bit mode, so assume the guest is in 64-bit. 201 */ 202 return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu); 203 } 204 205 static inline bool x86_exception_has_error_code(unsigned int vector) 206 { 207 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) | 208 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) | 209 BIT(PF_VECTOR) | BIT(AC_VECTOR); 210 211 return (1U << vector) & exception_has_error_code; 212 } 213 214 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu) 215 { 216 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu; 217 } 218 219 static inline bool is_pae(struct kvm_vcpu *vcpu) 220 { 221 return kvm_is_cr4_bit_set(vcpu, X86_CR4_PAE); 222 } 223 224 static inline bool is_pse(struct kvm_vcpu *vcpu) 225 { 226 return kvm_is_cr4_bit_set(vcpu, X86_CR4_PSE); 227 } 228 229 static inline bool is_paging(struct kvm_vcpu *vcpu) 230 { 231 return likely(kvm_is_cr0_bit_set(vcpu, X86_CR0_PG)); 232 } 233 234 static inline bool is_pae_paging(struct kvm_vcpu *vcpu) 235 { 236 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu); 237 } 238 239 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu) 240 { 241 return kvm_is_cr4_bit_set(vcpu, X86_CR4_LA57) ? 57 : 48; 242 } 243 244 static inline u8 max_host_virt_addr_bits(void) 245 { 246 return kvm_cpu_cap_has(X86_FEATURE_LA57) ? 57 : 48; 247 } 248 249 /* 250 * x86 MSRs which contain linear addresses, x86 hidden segment bases, and 251 * IDT/GDT bases have static canonicality checks, the size of which depends 252 * only on the CPU's support for 5-level paging, rather than on the state of 253 * CR4.LA57. This applies to both WRMSR and to other instructions that set 254 * their values, e.g. SGDT. 255 * 256 * KVM passes through most of these MSRS and also doesn't intercept the 257 * instructions that set the hidden segment bases. 258 * 259 * Because of this, to be consistent with hardware, even if the guest doesn't 260 * have LA57 enabled in its CPUID, perform canonicality checks based on *host* 261 * support for 5 level paging. 262 * 263 * Finally, instructions which are related to MMU invalidation of a given 264 * linear address, also have a similar static canonical check on address. 265 * This allows for example to invalidate 5-level addresses of a guest from a 266 * host which uses 4-level paging. 267 */ 268 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu, 269 unsigned int flags) 270 { 271 if (flags & (X86EMUL_F_INVLPG | X86EMUL_F_MSR | X86EMUL_F_DT_LOAD)) 272 return !__is_canonical_address(la, max_host_virt_addr_bits()); 273 else 274 return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu)); 275 } 276 277 static inline bool is_noncanonical_msr_address(u64 la, struct kvm_vcpu *vcpu) 278 { 279 return is_noncanonical_address(la, vcpu, X86EMUL_F_MSR); 280 } 281 282 static inline bool is_noncanonical_base_address(u64 la, struct kvm_vcpu *vcpu) 283 { 284 return is_noncanonical_address(la, vcpu, X86EMUL_F_DT_LOAD); 285 } 286 287 static inline bool is_noncanonical_invlpg_address(u64 la, struct kvm_vcpu *vcpu) 288 { 289 return is_noncanonical_address(la, vcpu, X86EMUL_F_INVLPG); 290 } 291 292 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu, 293 gva_t gva, gfn_t gfn, unsigned access) 294 { 295 u64 gen = kvm_memslots(vcpu->kvm)->generation; 296 297 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 298 return; 299 300 /* 301 * If this is a shadow nested page table, the "GVA" is 302 * actually a nGPA. 303 */ 304 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK; 305 vcpu->arch.mmio_access = access; 306 vcpu->arch.mmio_gfn = gfn; 307 vcpu->arch.mmio_gen = gen; 308 } 309 310 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu) 311 { 312 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation; 313 } 314 315 /* 316 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we 317 * clear all mmio cache info. 318 */ 319 #define MMIO_GVA_ANY (~(gva_t)0) 320 321 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva) 322 { 323 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK)) 324 return; 325 326 vcpu->arch.mmio_gva = 0; 327 } 328 329 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva) 330 { 331 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva && 332 vcpu->arch.mmio_gva == (gva & PAGE_MASK)) 333 return true; 334 335 return false; 336 } 337 338 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa) 339 { 340 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn && 341 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT) 342 return true; 343 344 return false; 345 } 346 347 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg) 348 { 349 unsigned long val = kvm_register_read_raw(vcpu, reg); 350 351 return is_64_bit_mode(vcpu) ? val : (u32)val; 352 } 353 354 static inline void kvm_register_write(struct kvm_vcpu *vcpu, 355 int reg, unsigned long val) 356 { 357 if (!is_64_bit_mode(vcpu)) 358 val = (u32)val; 359 return kvm_register_write_raw(vcpu, reg, val); 360 } 361 362 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk) 363 { 364 return !(kvm->arch.disabled_quirks & quirk); 365 } 366 367 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip); 368 369 u64 get_kvmclock_ns(struct kvm *kvm); 370 uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm); 371 bool kvm_get_monotonic_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp); 372 int kvm_guest_time_update(struct kvm_vcpu *v); 373 374 int kvm_read_guest_virt(struct kvm_vcpu *vcpu, 375 gva_t addr, void *val, unsigned int bytes, 376 struct x86_exception *exception); 377 378 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, 379 gva_t addr, void *val, unsigned int bytes, 380 struct x86_exception *exception); 381 382 int handle_ud(struct kvm_vcpu *vcpu); 383 384 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu, 385 struct kvm_queued_exception *ex); 386 387 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); 388 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 389 bool kvm_vector_hashing_enabled(void); 390 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code); 391 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type, 392 void *insn, int insn_len); 393 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 394 int emulation_type, void *insn, int insn_len); 395 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu); 396 fastpath_t handle_fastpath_hlt(struct kvm_vcpu *vcpu); 397 398 extern struct kvm_caps kvm_caps; 399 extern struct kvm_host_values kvm_host; 400 401 extern bool enable_pmu; 402 403 /* 404 * Get a filtered version of KVM's supported XCR0 that strips out dynamic 405 * features for which the current process doesn't (yet) have permission to use. 406 * This is intended to be used only when enumerating support to userspace, 407 * e.g. in KVM_GET_SUPPORTED_CPUID and KVM_CAP_XSAVE2, it does NOT need to be 408 * used to check/restrict guest behavior as KVM rejects KVM_SET_CPUID{2} if 409 * userspace attempts to enable unpermitted features. 410 */ 411 static inline u64 kvm_get_filtered_xcr0(void) 412 { 413 u64 permitted_xcr0 = kvm_caps.supported_xcr0; 414 415 BUILD_BUG_ON(XFEATURE_MASK_USER_DYNAMIC != XFEATURE_MASK_XTILE_DATA); 416 417 if (permitted_xcr0 & XFEATURE_MASK_USER_DYNAMIC) { 418 permitted_xcr0 &= xstate_get_guest_group_perm(); 419 420 /* 421 * Treat XTILE_CFG as unsupported if the current process isn't 422 * allowed to use XTILE_DATA, as attempting to set XTILE_CFG in 423 * XCR0 without setting XTILE_DATA is architecturally illegal. 424 */ 425 if (!(permitted_xcr0 & XFEATURE_MASK_XTILE_DATA)) 426 permitted_xcr0 &= ~XFEATURE_MASK_XTILE_CFG; 427 } 428 return permitted_xcr0; 429 } 430 431 static inline bool kvm_mpx_supported(void) 432 { 433 return (kvm_caps.supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) 434 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); 435 } 436 437 extern unsigned int min_timer_period_us; 438 439 extern bool enable_vmware_backdoor; 440 441 extern int pi_inject_timer; 442 443 extern bool report_ignored_msrs; 444 445 extern bool eager_page_split; 446 447 static inline void kvm_pr_unimpl_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data) 448 { 449 if (report_ignored_msrs) 450 vcpu_unimpl(vcpu, "Unhandled WRMSR(0x%x) = 0x%llx\n", msr, data); 451 } 452 453 static inline void kvm_pr_unimpl_rdmsr(struct kvm_vcpu *vcpu, u32 msr) 454 { 455 if (report_ignored_msrs) 456 vcpu_unimpl(vcpu, "Unhandled RDMSR(0x%x)\n", msr); 457 } 458 459 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 460 { 461 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 462 vcpu->arch.virtual_tsc_shift); 463 } 464 465 /* Same "calling convention" as do_div: 466 * - divide (n << 32) by base 467 * - put result in n 468 * - return remainder 469 */ 470 #define do_shl32_div32(n, base) \ 471 ({ \ 472 u32 __quot, __rem; \ 473 asm("divl %2" : "=a" (__quot), "=d" (__rem) \ 474 : "rm" (base), "0" (0), "1" ((u32) n)); \ 475 n = __quot; \ 476 __rem; \ 477 }) 478 479 static inline bool kvm_mwait_in_guest(struct kvm *kvm) 480 { 481 return kvm->arch.mwait_in_guest; 482 } 483 484 static inline bool kvm_hlt_in_guest(struct kvm *kvm) 485 { 486 return kvm->arch.hlt_in_guest; 487 } 488 489 static inline bool kvm_pause_in_guest(struct kvm *kvm) 490 { 491 return kvm->arch.pause_in_guest; 492 } 493 494 static inline bool kvm_cstate_in_guest(struct kvm *kvm) 495 { 496 return kvm->arch.cstate_in_guest; 497 } 498 499 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm) 500 { 501 return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED; 502 } 503 504 static __always_inline void kvm_before_interrupt(struct kvm_vcpu *vcpu, 505 enum kvm_intr_type intr) 506 { 507 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr); 508 } 509 510 static __always_inline void kvm_after_interrupt(struct kvm_vcpu *vcpu) 511 { 512 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, 0); 513 } 514 515 static inline bool kvm_handling_nmi_from_guest(struct kvm_vcpu *vcpu) 516 { 517 return vcpu->arch.handling_intr_from_guest == KVM_HANDLING_NMI; 518 } 519 520 static inline bool kvm_pat_valid(u64 data) 521 { 522 if (data & 0xF8F8F8F8F8F8F8F8ull) 523 return false; 524 /* 0, 1, 4, 5, 6, 7 are valid values. */ 525 return (data | ((data & 0x0202020202020202ull) << 1)) == data; 526 } 527 528 static inline bool kvm_dr7_valid(u64 data) 529 { 530 /* Bits [63:32] are reserved */ 531 return !(data >> 32); 532 } 533 static inline bool kvm_dr6_valid(u64 data) 534 { 535 /* Bits [63:32] are reserved */ 536 return !(data >> 32); 537 } 538 539 /* 540 * Trigger machine check on the host. We assume all the MSRs are already set up 541 * by the CPU and that we still run on the same CPU as the MCE occurred on. 542 * We pass a fake environment to the machine check handler because we want 543 * the guest to be always treated like user space, no matter what context 544 * it used internally. 545 */ 546 static inline void kvm_machine_check(void) 547 { 548 #if defined(CONFIG_X86_MCE) 549 struct pt_regs regs = { 550 .cs = 3, /* Fake ring 3 no matter what the guest ran on */ 551 .flags = X86_EFLAGS_IF, 552 }; 553 554 do_machine_check(®s); 555 #endif 556 } 557 558 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu); 559 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu); 560 int kvm_spec_ctrl_test_value(u64 value); 561 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r, 562 struct x86_exception *e); 563 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva); 564 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); 565 566 enum kvm_msr_access { 567 MSR_TYPE_R = BIT(0), 568 MSR_TYPE_W = BIT(1), 569 MSR_TYPE_RW = MSR_TYPE_R | MSR_TYPE_W, 570 }; 571 572 /* 573 * Internal error codes that are used to indicate that MSR emulation encountered 574 * an error that should result in #GP in the guest, unless userspace handles it. 575 * Note, '1', '0', and negative numbers are off limits, as they are used by KVM 576 * as part of KVM's lightly documented internal KVM_RUN return codes. 577 * 578 * UNSUPPORTED - The MSR isn't supported, either because it is completely 579 * unknown to KVM, or because the MSR should not exist according 580 * to the vCPU model. 581 * 582 * FILTERED - Access to the MSR is denied by a userspace MSR filter. 583 */ 584 #define KVM_MSR_RET_UNSUPPORTED 2 585 #define KVM_MSR_RET_FILTERED 3 586 587 static inline bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) 588 { 589 return !(cr4 & vcpu->arch.cr4_guest_rsvd_bits); 590 } 591 592 #define __cr4_reserved_bits(__cpu_has, __c) \ 593 ({ \ 594 u64 __reserved_bits = CR4_RESERVED_BITS; \ 595 \ 596 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \ 597 __reserved_bits |= X86_CR4_OSXSAVE; \ 598 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \ 599 __reserved_bits |= X86_CR4_SMEP; \ 600 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \ 601 __reserved_bits |= X86_CR4_SMAP; \ 602 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \ 603 __reserved_bits |= X86_CR4_FSGSBASE; \ 604 if (!__cpu_has(__c, X86_FEATURE_PKU)) \ 605 __reserved_bits |= X86_CR4_PKE; \ 606 if (!__cpu_has(__c, X86_FEATURE_LA57)) \ 607 __reserved_bits |= X86_CR4_LA57; \ 608 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \ 609 __reserved_bits |= X86_CR4_UMIP; \ 610 if (!__cpu_has(__c, X86_FEATURE_VMX)) \ 611 __reserved_bits |= X86_CR4_VMXE; \ 612 if (!__cpu_has(__c, X86_FEATURE_PCID)) \ 613 __reserved_bits |= X86_CR4_PCIDE; \ 614 if (!__cpu_has(__c, X86_FEATURE_LAM)) \ 615 __reserved_bits |= X86_CR4_LAM_SUP; \ 616 __reserved_bits; \ 617 }) 618 619 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 620 void *dst); 621 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 622 void *dst); 623 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size, 624 unsigned int port, void *data, unsigned int count, 625 int in); 626 627 static inline bool user_exit_on_hypercall(struct kvm *kvm, unsigned long hc_nr) 628 { 629 return kvm->arch.hypercall_exit_enabled & BIT(hc_nr); 630 } 631 632 int ____kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long nr, 633 unsigned long a0, unsigned long a1, 634 unsigned long a2, unsigned long a3, 635 int op_64_bit, int cpl, 636 int (*complete_hypercall)(struct kvm_vcpu *)); 637 638 #define __kvm_emulate_hypercall(_vcpu, nr, a0, a1, a2, a3, op_64_bit, cpl, complete_hypercall) \ 639 ({ \ 640 int __ret; \ 641 \ 642 __ret = ____kvm_emulate_hypercall(_vcpu, \ 643 kvm_##nr##_read(_vcpu), kvm_##a0##_read(_vcpu), \ 644 kvm_##a1##_read(_vcpu), kvm_##a2##_read(_vcpu), \ 645 kvm_##a3##_read(_vcpu), op_64_bit, cpl, \ 646 complete_hypercall); \ 647 \ 648 if (__ret > 0) \ 649 __ret = complete_hypercall(_vcpu); \ 650 __ret; \ 651 }) 652 653 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 654 655 #endif 656