1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __KVM_X86_VMX_VMCS_H 3 #define __KVM_X86_VMX_VMCS_H 4 5 #include <linux/ktime.h> 6 #include <linux/list.h> 7 #include <linux/nospec.h> 8 9 #include <asm/kvm.h> 10 #include <asm/vmx.h> 11 12 #include "capabilities.h" 13 14 /* 15 * Indexing into the vmcs12 uses the VMCS encoding rotated left by 6 as a very 16 * rudimentary compression of the range of indices. The compression ratio is 17 * good enough to allow KVM to use a (very sparsely populated) array without 18 * wasting too much memory, while the "algorithm" is fast enough to be used to 19 * lookup vmcs12 fields on-demand, e.g. for emulation. 20 */ 21 #define ROL16(val, n) ((u16)(((u16)(val) << (n)) | ((u16)(val) >> (16 - (n))))) 22 #define VMCS12_IDX_TO_ENC(idx) ROL16(idx, 10) 23 #define ENC_TO_VMCS12_IDX(enc) ROL16(enc, 6) 24 25 DECLARE_PER_CPU(struct vmcs *, current_vmcs); 26 27 /* 28 * vmcs_host_state tracks registers that are loaded from the VMCS on VMEXIT 29 * and whose values change infrequently, but are not constant. I.e. this is 30 * used as a write-through cache of the corresponding VMCS fields. 31 */ 32 struct vmcs_host_state { 33 unsigned long cr3; /* May not match real cr3 */ 34 unsigned long cr4; /* May not match real cr4 */ 35 unsigned long gs_base; 36 unsigned long fs_base; 37 unsigned long rsp; 38 39 u16 fs_sel, gs_sel, ldt_sel; 40 #ifdef CONFIG_X86_64 41 u16 ds_sel, es_sel; 42 #endif 43 }; 44 45 struct vmcs_controls_shadow { 46 u32 vm_entry; 47 u32 vm_exit; 48 u32 pin; 49 u32 exec; 50 u32 secondary_exec; 51 u64 tertiary_exec; 52 }; 53 54 /* 55 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also 56 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs 57 * loaded on this CPU (so we can clear them if the CPU goes down). 58 */ 59 struct loaded_vmcs { 60 struct vmcs *vmcs; 61 struct vmcs *shadow_vmcs; 62 int cpu; 63 bool launched; 64 bool nmi_known_unmasked; 65 bool hv_timer_soft_disabled; 66 /* Support for vnmi-less CPUs */ 67 int soft_vnmi_blocked; 68 ktime_t entry_time; 69 s64 vnmi_blocked_time; 70 unsigned long *msr_bitmap; 71 struct list_head loaded_vmcss_on_cpu_link; 72 struct vmcs_host_state host_state; 73 struct vmcs_controls_shadow controls_shadow; 74 }; 75 76 static __always_inline bool is_intr_type(u32 intr_info, u32 type) 77 { 78 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK; 79 80 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type); 81 } 82 83 static inline bool is_intr_type_n(u32 intr_info, u32 type, u8 vector) 84 { 85 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK | 86 INTR_INFO_VECTOR_MASK; 87 88 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type | vector); 89 } 90 91 static inline bool is_exception_n(u32 intr_info, u8 vector) 92 { 93 return is_intr_type_n(intr_info, INTR_TYPE_HARD_EXCEPTION, vector); 94 } 95 96 static inline bool is_debug(u32 intr_info) 97 { 98 return is_exception_n(intr_info, DB_VECTOR); 99 } 100 101 static inline bool is_breakpoint(u32 intr_info) 102 { 103 return is_exception_n(intr_info, BP_VECTOR); 104 } 105 106 static inline bool is_double_fault(u32 intr_info) 107 { 108 return is_exception_n(intr_info, DF_VECTOR); 109 } 110 111 static inline bool is_page_fault(u32 intr_info) 112 { 113 return is_exception_n(intr_info, PF_VECTOR); 114 } 115 116 static inline bool is_invalid_opcode(u32 intr_info) 117 { 118 return is_exception_n(intr_info, UD_VECTOR); 119 } 120 121 static inline bool is_gp_fault(u32 intr_info) 122 { 123 return is_exception_n(intr_info, GP_VECTOR); 124 } 125 126 static inline bool is_alignment_check(u32 intr_info) 127 { 128 return is_exception_n(intr_info, AC_VECTOR); 129 } 130 131 static inline bool is_machine_check(u32 intr_info) 132 { 133 return is_exception_n(intr_info, MC_VECTOR); 134 } 135 136 static inline bool is_nm_fault(u32 intr_info) 137 { 138 return is_exception_n(intr_info, NM_VECTOR); 139 } 140 141 static inline bool is_ve_fault(u32 intr_info) 142 { 143 return is_exception_n(intr_info, VE_VECTOR); 144 } 145 146 /* Undocumented: icebp/int1 */ 147 static inline bool is_icebp(u32 intr_info) 148 { 149 return is_intr_type(intr_info, INTR_TYPE_PRIV_SW_EXCEPTION); 150 } 151 152 static __always_inline bool is_nmi(u32 intr_info) 153 { 154 return is_intr_type(intr_info, INTR_TYPE_NMI_INTR); 155 } 156 157 static inline bool is_external_intr(u32 intr_info) 158 { 159 return is_intr_type(intr_info, INTR_TYPE_EXT_INTR); 160 } 161 162 static inline bool is_exception_with_error_code(u32 intr_info) 163 { 164 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_DELIVER_CODE_MASK; 165 166 return (intr_info & mask) == mask; 167 } 168 169 enum vmcs_field_width { 170 VMCS_FIELD_WIDTH_U16 = 0, 171 VMCS_FIELD_WIDTH_U64 = 1, 172 VMCS_FIELD_WIDTH_U32 = 2, 173 VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3 174 }; 175 176 static inline int vmcs_field_width(unsigned long field) 177 { 178 if (0x1 & field) /* the *_HIGH fields are all 32 bit */ 179 return VMCS_FIELD_WIDTH_U32; 180 return (field >> 13) & 0x3; 181 } 182 183 static inline int vmcs_field_readonly(unsigned long field) 184 { 185 return (((field >> 10) & 0x3) == 1); 186 } 187 188 #define VMCS_FIELD_INDEX_SHIFT (1) 189 #define VMCS_FIELD_INDEX_MASK GENMASK(9, 1) 190 191 static inline unsigned int vmcs_field_index(unsigned long field) 192 { 193 return (field & VMCS_FIELD_INDEX_MASK) >> VMCS_FIELD_INDEX_SHIFT; 194 } 195 196 #endif /* __KVM_X86_VMX_VMCS_H */ 197