1*ffb6fc84SIsaku Yamahata /* SPDX-License-Identifier: GPL-2.0 */ 2*ffb6fc84SIsaku Yamahata #ifndef __KVM_X86_VMX_PMU_INTEL_H 3*ffb6fc84SIsaku Yamahata #define __KVM_X86_VMX_PMU_INTEL_H 4*ffb6fc84SIsaku Yamahata 5*ffb6fc84SIsaku Yamahata #include <linux/kvm_host.h> 6*ffb6fc84SIsaku Yamahata 7*ffb6fc84SIsaku Yamahata bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu); 8*ffb6fc84SIsaku Yamahata int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu); 9*ffb6fc84SIsaku Yamahata 10*ffb6fc84SIsaku Yamahata struct lbr_desc { 11*ffb6fc84SIsaku Yamahata /* Basic info about guest LBR records. */ 12*ffb6fc84SIsaku Yamahata struct x86_pmu_lbr records; 13*ffb6fc84SIsaku Yamahata 14*ffb6fc84SIsaku Yamahata /* 15*ffb6fc84SIsaku Yamahata * Emulate LBR feature via passthrough LBR registers when the 16*ffb6fc84SIsaku Yamahata * per-vcpu guest LBR event is scheduled on the current pcpu. 17*ffb6fc84SIsaku Yamahata * 18*ffb6fc84SIsaku Yamahata * The records may be inaccurate if the host reclaims the LBR. 19*ffb6fc84SIsaku Yamahata */ 20*ffb6fc84SIsaku Yamahata struct perf_event *event; 21*ffb6fc84SIsaku Yamahata 22*ffb6fc84SIsaku Yamahata /* True if LBRs are marked as not intercepted in the MSR bitmap */ 23*ffb6fc84SIsaku Yamahata bool msr_passthrough; 24*ffb6fc84SIsaku Yamahata }; 25*ffb6fc84SIsaku Yamahata 26*ffb6fc84SIsaku Yamahata extern struct x86_pmu_lbr vmx_lbr_caps; 27*ffb6fc84SIsaku Yamahata 28*ffb6fc84SIsaku Yamahata #endif /* __KVM_X86_VMX_PMU_INTEL_H */ 29