1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * AMD SVM support 6 * 7 * Copyright (C) 2006 Qumranet, Inc. 8 * Copyright 2010 Red Hat, Inc. and/or its affiliates. 9 * 10 * Authors: 11 * Yaniv Kamay <yaniv@qumranet.com> 12 * Avi Kivity <avi@qumranet.com> 13 */ 14 15 #ifndef __SVM_SVM_H 16 #define __SVM_SVM_H 17 18 #include <linux/kvm_types.h> 19 #include <linux/kvm_host.h> 20 #include <linux/bits.h> 21 22 #include <asm/svm.h> 23 #include <asm/sev-common.h> 24 25 #include "kvm_cache_regs.h" 26 27 #define __sme_page_pa(x) __sme_set(page_to_pfn(x) << PAGE_SHIFT) 28 29 #define IOPM_SIZE PAGE_SIZE * 3 30 #define MSRPM_SIZE PAGE_SIZE * 2 31 32 #define MAX_DIRECT_ACCESS_MSRS 20 33 #define MSRPM_OFFSETS 16 34 extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; 35 extern bool npt_enabled; 36 extern bool intercept_smi; 37 38 /* 39 * Clean bits in VMCB. 40 * VMCB_ALL_CLEAN_MASK might also need to 41 * be updated if this enum is modified. 42 */ 43 enum { 44 VMCB_INTERCEPTS, /* Intercept vectors, TSC offset, 45 pause filter count */ 46 VMCB_PERM_MAP, /* IOPM Base and MSRPM Base */ 47 VMCB_ASID, /* ASID */ 48 VMCB_INTR, /* int_ctl, int_vector */ 49 VMCB_NPT, /* npt_en, nCR3, gPAT */ 50 VMCB_CR, /* CR0, CR3, CR4, EFER */ 51 VMCB_DR, /* DR6, DR7 */ 52 VMCB_DT, /* GDT, IDT */ 53 VMCB_SEG, /* CS, DS, SS, ES, CPL */ 54 VMCB_CR2, /* CR2 only */ 55 VMCB_LBR, /* DBGCTL, BR_FROM, BR_TO, LAST_EX_FROM, LAST_EX_TO */ 56 VMCB_AVIC, /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE, 57 * AVIC PHYSICAL_TABLE pointer, 58 * AVIC LOGICAL_TABLE pointer 59 */ 60 VMCB_SW = 31, /* Reserved for hypervisor/software use */ 61 }; 62 63 #define VMCB_ALL_CLEAN_MASK ( \ 64 (1U << VMCB_INTERCEPTS) | (1U << VMCB_PERM_MAP) | \ 65 (1U << VMCB_ASID) | (1U << VMCB_INTR) | \ 66 (1U << VMCB_NPT) | (1U << VMCB_CR) | (1U << VMCB_DR) | \ 67 (1U << VMCB_DT) | (1U << VMCB_SEG) | (1U << VMCB_CR2) | \ 68 (1U << VMCB_LBR) | (1U << VMCB_AVIC) | \ 69 (1U << VMCB_SW)) 70 71 /* TPR and CR2 are always written before VMRUN */ 72 #define VMCB_ALWAYS_DIRTY_MASK ((1U << VMCB_INTR) | (1U << VMCB_CR2)) 73 74 struct kvm_sev_info { 75 bool active; /* SEV enabled guest */ 76 bool es_active; /* SEV-ES enabled guest */ 77 unsigned int asid; /* ASID used for this guest */ 78 unsigned int handle; /* SEV firmware handle */ 79 int fd; /* SEV device fd */ 80 unsigned long pages_locked; /* Number of pages locked */ 81 struct list_head regions_list; /* List of registered regions */ 82 u64 ap_jump_table; /* SEV-ES AP Jump Table address */ 83 struct kvm *enc_context_owner; /* Owner of copied encryption context */ 84 struct list_head mirror_vms; /* List of VMs mirroring */ 85 struct list_head mirror_entry; /* Use as a list entry of mirrors */ 86 struct misc_cg *misc_cg; /* For misc cgroup accounting */ 87 atomic_t migration_in_progress; 88 }; 89 90 struct kvm_svm { 91 struct kvm kvm; 92 93 /* Struct members for AVIC */ 94 u32 avic_vm_id; 95 struct page *avic_logical_id_table_page; 96 struct page *avic_physical_id_table_page; 97 struct hlist_node hnode; 98 99 struct kvm_sev_info sev_info; 100 }; 101 102 struct kvm_vcpu; 103 104 struct kvm_vmcb_info { 105 struct vmcb *ptr; 106 unsigned long pa; 107 int cpu; 108 uint64_t asid_generation; 109 }; 110 111 struct vmcb_save_area_cached { 112 u64 efer; 113 u64 cr4; 114 u64 cr3; 115 u64 cr0; 116 u64 dr7; 117 u64 dr6; 118 }; 119 120 struct vmcb_ctrl_area_cached { 121 u32 intercepts[MAX_INTERCEPT]; 122 u16 pause_filter_thresh; 123 u16 pause_filter_count; 124 u64 iopm_base_pa; 125 u64 msrpm_base_pa; 126 u64 tsc_offset; 127 u32 asid; 128 u8 tlb_ctl; 129 u32 int_ctl; 130 u32 int_vector; 131 u32 int_state; 132 u32 exit_code; 133 u32 exit_code_hi; 134 u64 exit_info_1; 135 u64 exit_info_2; 136 u32 exit_int_info; 137 u32 exit_int_info_err; 138 u64 nested_ctl; 139 u32 event_inj; 140 u32 event_inj_err; 141 u64 nested_cr3; 142 u64 virt_ext; 143 u32 clean; 144 u8 reserved_sw[32]; 145 }; 146 147 struct svm_nested_state { 148 struct kvm_vmcb_info vmcb02; 149 u64 hsave_msr; 150 u64 vm_cr_msr; 151 u64 vmcb12_gpa; 152 u64 last_vmcb12_gpa; 153 154 /* These are the merged vectors */ 155 u32 *msrpm; 156 157 /* A VMRUN has started but has not yet been performed, so 158 * we cannot inject a nested vmexit yet. */ 159 bool nested_run_pending; 160 161 /* cache for control fields of the guest */ 162 struct vmcb_ctrl_area_cached ctl; 163 164 /* 165 * Note: this struct is not kept up-to-date while L2 runs; it is only 166 * valid within nested_svm_vmrun. 167 */ 168 struct vmcb_save_area_cached save; 169 170 bool initialized; 171 172 /* 173 * Indicates whether MSR bitmap for L2 needs to be rebuilt due to 174 * changes in MSR bitmap for L1 or switching to a different L2. Note, 175 * this flag can only be used reliably in conjunction with a paravirt L1 176 * which informs L0 whether any changes to MSR bitmap for L2 were done 177 * on its side. 178 */ 179 bool force_msr_bitmap_recalc; 180 }; 181 182 struct vcpu_sev_es_state { 183 /* SEV-ES support */ 184 struct vmcb_save_area *vmsa; 185 struct ghcb *ghcb; 186 struct kvm_host_map ghcb_map; 187 bool received_first_sipi; 188 189 /* SEV-ES scratch area support */ 190 void *ghcb_sa; 191 u32 ghcb_sa_len; 192 bool ghcb_sa_sync; 193 bool ghcb_sa_free; 194 }; 195 196 struct vcpu_svm { 197 struct kvm_vcpu vcpu; 198 /* vmcb always points at current_vmcb->ptr, it's purely a shorthand. */ 199 struct vmcb *vmcb; 200 struct kvm_vmcb_info vmcb01; 201 struct kvm_vmcb_info *current_vmcb; 202 struct svm_cpu_data *svm_data; 203 u32 asid; 204 u32 sysenter_esp_hi; 205 u32 sysenter_eip_hi; 206 uint64_t tsc_aux; 207 208 u64 msr_decfg; 209 210 u64 next_rip; 211 212 u64 spec_ctrl; 213 214 u64 tsc_ratio_msr; 215 /* 216 * Contains guest-controlled bits of VIRT_SPEC_CTRL, which will be 217 * translated into the appropriate L2_CFG bits on the host to 218 * perform speculative control. 219 */ 220 u64 virt_spec_ctrl; 221 222 u32 *msrpm; 223 224 ulong nmi_iret_rip; 225 226 struct svm_nested_state nested; 227 228 bool nmi_singlestep; 229 u64 nmi_singlestep_guest_rflags; 230 231 unsigned int3_injected; 232 unsigned long int3_rip; 233 234 /* cached guest cpuid flags for faster access */ 235 bool nrips_enabled : 1; 236 bool tsc_scaling_enabled : 1; 237 238 u32 ldr_reg; 239 u32 dfr_reg; 240 struct page *avic_backing_page; 241 u64 *avic_physical_id_cache; 242 243 /* 244 * Per-vcpu list of struct amd_svm_iommu_ir: 245 * This is used mainly to store interrupt remapping information used 246 * when update the vcpu affinity. This avoids the need to scan for 247 * IRTE and try to match ga_tag in the IOMMU driver. 248 */ 249 struct list_head ir_list; 250 spinlock_t ir_list_lock; 251 252 /* Save desired MSR intercept (read: pass-through) state */ 253 struct { 254 DECLARE_BITMAP(read, MAX_DIRECT_ACCESS_MSRS); 255 DECLARE_BITMAP(write, MAX_DIRECT_ACCESS_MSRS); 256 } shadow_msr_intercept; 257 258 struct vcpu_sev_es_state sev_es; 259 260 bool guest_state_loaded; 261 }; 262 263 struct svm_cpu_data { 264 int cpu; 265 266 u64 asid_generation; 267 u32 max_asid; 268 u32 next_asid; 269 u32 min_asid; 270 struct kvm_ldttss_desc *tss_desc; 271 272 struct page *save_area; 273 struct vmcb *current_vmcb; 274 275 /* index = sev_asid, value = vmcb pointer */ 276 struct vmcb **sev_vmcbs; 277 }; 278 279 DECLARE_PER_CPU(struct svm_cpu_data *, svm_data); 280 281 void recalc_intercepts(struct vcpu_svm *svm); 282 283 static __always_inline struct kvm_svm *to_kvm_svm(struct kvm *kvm) 284 { 285 return container_of(kvm, struct kvm_svm, kvm); 286 } 287 288 static __always_inline bool sev_guest(struct kvm *kvm) 289 { 290 #ifdef CONFIG_KVM_AMD_SEV 291 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; 292 293 return sev->active; 294 #else 295 return false; 296 #endif 297 } 298 299 static __always_inline bool sev_es_guest(struct kvm *kvm) 300 { 301 #ifdef CONFIG_KVM_AMD_SEV 302 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; 303 304 return sev->es_active && !WARN_ON_ONCE(!sev->active); 305 #else 306 return false; 307 #endif 308 } 309 310 static inline void vmcb_mark_all_dirty(struct vmcb *vmcb) 311 { 312 vmcb->control.clean = 0; 313 } 314 315 static inline void vmcb_mark_all_clean(struct vmcb *vmcb) 316 { 317 vmcb->control.clean = VMCB_ALL_CLEAN_MASK 318 & ~VMCB_ALWAYS_DIRTY_MASK; 319 } 320 321 static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit) 322 { 323 vmcb->control.clean &= ~(1 << bit); 324 } 325 326 static inline bool vmcb_is_dirty(struct vmcb *vmcb, int bit) 327 { 328 return !test_bit(bit, (unsigned long *)&vmcb->control.clean); 329 } 330 331 static __always_inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu) 332 { 333 return container_of(vcpu, struct vcpu_svm, vcpu); 334 } 335 336 /* 337 * Only the PDPTRs are loaded on demand into the shadow MMU. All other 338 * fields are synchronized on VM-Exit, because accessing the VMCB is cheap. 339 * 340 * CR3 might be out of date in the VMCB but it is not marked dirty; instead, 341 * KVM_REQ_LOAD_MMU_PGD is always requested when the cached vcpu->arch.cr3 342 * is changed. svm_load_mmu_pgd() then syncs the new CR3 value into the VMCB. 343 */ 344 #define SVM_REGS_LAZY_LOAD_SET (1 << VCPU_EXREG_PDPTR) 345 346 static inline void vmcb_set_intercept(struct vmcb_control_area *control, u32 bit) 347 { 348 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT); 349 __set_bit(bit, (unsigned long *)&control->intercepts); 350 } 351 352 static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u32 bit) 353 { 354 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT); 355 __clear_bit(bit, (unsigned long *)&control->intercepts); 356 } 357 358 static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u32 bit) 359 { 360 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT); 361 return test_bit(bit, (unsigned long *)&control->intercepts); 362 } 363 364 static inline bool vmcb12_is_intercept(struct vmcb_ctrl_area_cached *control, u32 bit) 365 { 366 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT); 367 return test_bit(bit, (unsigned long *)&control->intercepts); 368 } 369 370 static inline void set_dr_intercepts(struct vcpu_svm *svm) 371 { 372 struct vmcb *vmcb = svm->vmcb01.ptr; 373 374 if (!sev_es_guest(svm->vcpu.kvm)) { 375 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ); 376 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ); 377 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ); 378 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ); 379 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ); 380 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ); 381 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ); 382 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE); 383 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE); 384 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE); 385 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE); 386 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE); 387 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE); 388 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE); 389 } 390 391 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ); 392 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE); 393 394 recalc_intercepts(svm); 395 } 396 397 static inline void clr_dr_intercepts(struct vcpu_svm *svm) 398 { 399 struct vmcb *vmcb = svm->vmcb01.ptr; 400 401 vmcb->control.intercepts[INTERCEPT_DR] = 0; 402 403 /* DR7 access must remain intercepted for an SEV-ES guest */ 404 if (sev_es_guest(svm->vcpu.kvm)) { 405 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ); 406 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE); 407 } 408 409 recalc_intercepts(svm); 410 } 411 412 static inline void set_exception_intercept(struct vcpu_svm *svm, u32 bit) 413 { 414 struct vmcb *vmcb = svm->vmcb01.ptr; 415 416 WARN_ON_ONCE(bit >= 32); 417 vmcb_set_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit); 418 419 recalc_intercepts(svm); 420 } 421 422 static inline void clr_exception_intercept(struct vcpu_svm *svm, u32 bit) 423 { 424 struct vmcb *vmcb = svm->vmcb01.ptr; 425 426 WARN_ON_ONCE(bit >= 32); 427 vmcb_clr_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit); 428 429 recalc_intercepts(svm); 430 } 431 432 static inline void svm_set_intercept(struct vcpu_svm *svm, int bit) 433 { 434 struct vmcb *vmcb = svm->vmcb01.ptr; 435 436 vmcb_set_intercept(&vmcb->control, bit); 437 438 recalc_intercepts(svm); 439 } 440 441 static inline void svm_clr_intercept(struct vcpu_svm *svm, int bit) 442 { 443 struct vmcb *vmcb = svm->vmcb01.ptr; 444 445 vmcb_clr_intercept(&vmcb->control, bit); 446 447 recalc_intercepts(svm); 448 } 449 450 static inline bool svm_is_intercept(struct vcpu_svm *svm, int bit) 451 { 452 return vmcb_is_intercept(&svm->vmcb->control, bit); 453 } 454 455 static inline bool vgif_enabled(struct vcpu_svm *svm) 456 { 457 return !!(svm->vmcb->control.int_ctl & V_GIF_ENABLE_MASK); 458 } 459 460 static inline void enable_gif(struct vcpu_svm *svm) 461 { 462 if (vgif_enabled(svm)) 463 svm->vmcb->control.int_ctl |= V_GIF_MASK; 464 else 465 svm->vcpu.arch.hflags |= HF_GIF_MASK; 466 } 467 468 static inline void disable_gif(struct vcpu_svm *svm) 469 { 470 if (vgif_enabled(svm)) 471 svm->vmcb->control.int_ctl &= ~V_GIF_MASK; 472 else 473 svm->vcpu.arch.hflags &= ~HF_GIF_MASK; 474 } 475 476 static inline bool gif_set(struct vcpu_svm *svm) 477 { 478 if (vgif_enabled(svm)) 479 return !!(svm->vmcb->control.int_ctl & V_GIF_MASK); 480 else 481 return !!(svm->vcpu.arch.hflags & HF_GIF_MASK); 482 } 483 484 /* svm.c */ 485 #define MSR_INVALID 0xffffffffU 486 487 extern bool dump_invalid_vmcb; 488 489 u32 svm_msrpm_offset(u32 msr); 490 u32 *svm_vcpu_alloc_msrpm(void); 491 void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm); 492 void svm_vcpu_free_msrpm(u32 *msrpm); 493 494 int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer); 495 void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 496 void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 497 void disable_nmi_singlestep(struct vcpu_svm *svm); 498 bool svm_smi_blocked(struct kvm_vcpu *vcpu); 499 bool svm_nmi_blocked(struct kvm_vcpu *vcpu); 500 bool svm_interrupt_blocked(struct kvm_vcpu *vcpu); 501 void svm_set_gif(struct vcpu_svm *svm, bool value); 502 int svm_invoke_exit_handler(struct kvm_vcpu *vcpu, u64 exit_code); 503 void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr, 504 int read, int write); 505 void svm_complete_interrupt_delivery(struct kvm_vcpu *vcpu, int delivery_mode, 506 int trig_mode, int vec); 507 508 /* nested.c */ 509 510 #define NESTED_EXIT_HOST 0 /* Exit handled on host level */ 511 #define NESTED_EXIT_DONE 1 /* Exit caused nested vmexit */ 512 #define NESTED_EXIT_CONTINUE 2 /* Further checks needed */ 513 514 static inline bool nested_svm_virtualize_tpr(struct kvm_vcpu *vcpu) 515 { 516 struct vcpu_svm *svm = to_svm(vcpu); 517 518 return is_guest_mode(vcpu) && (svm->nested.ctl.int_ctl & V_INTR_MASKING_MASK); 519 } 520 521 static inline bool nested_exit_on_smi(struct vcpu_svm *svm) 522 { 523 return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_SMI); 524 } 525 526 static inline bool nested_exit_on_intr(struct vcpu_svm *svm) 527 { 528 return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_INTR); 529 } 530 531 static inline bool nested_exit_on_nmi(struct vcpu_svm *svm) 532 { 533 return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_NMI); 534 } 535 536 int enter_svm_guest_mode(struct kvm_vcpu *vcpu, 537 u64 vmcb_gpa, struct vmcb *vmcb12, bool from_vmrun); 538 void svm_leave_nested(struct kvm_vcpu *vcpu); 539 void svm_free_nested(struct vcpu_svm *svm); 540 int svm_allocate_nested(struct vcpu_svm *svm); 541 int nested_svm_vmrun(struct kvm_vcpu *vcpu); 542 void svm_copy_vmrun_state(struct vmcb_save_area *to_save, 543 struct vmcb_save_area *from_save); 544 void svm_copy_vmloadsave_state(struct vmcb *to_vmcb, struct vmcb *from_vmcb); 545 int nested_svm_vmexit(struct vcpu_svm *svm); 546 547 static inline int nested_svm_simple_vmexit(struct vcpu_svm *svm, u32 exit_code) 548 { 549 svm->vmcb->control.exit_code = exit_code; 550 svm->vmcb->control.exit_info_1 = 0; 551 svm->vmcb->control.exit_info_2 = 0; 552 return nested_svm_vmexit(svm); 553 } 554 555 int nested_svm_exit_handled(struct vcpu_svm *svm); 556 int nested_svm_check_permissions(struct kvm_vcpu *vcpu); 557 int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr, 558 bool has_error_code, u32 error_code); 559 int nested_svm_exit_special(struct vcpu_svm *svm); 560 void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu *vcpu); 561 void svm_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 multiplier); 562 void nested_copy_vmcb_control_to_cache(struct vcpu_svm *svm, 563 struct vmcb_control_area *control); 564 void nested_copy_vmcb_save_to_cache(struct vcpu_svm *svm, 565 struct vmcb_save_area *save); 566 void nested_sync_control_from_vmcb02(struct vcpu_svm *svm); 567 void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm); 568 void svm_switch_vmcb(struct vcpu_svm *svm, struct kvm_vmcb_info *target_vmcb); 569 570 extern struct kvm_x86_nested_ops svm_nested_ops; 571 572 /* avic.c */ 573 574 int avic_ga_log_notifier(u32 ga_tag); 575 void avic_vm_destroy(struct kvm *kvm); 576 int avic_vm_init(struct kvm *kvm); 577 void avic_init_vmcb(struct vcpu_svm *svm); 578 int avic_incomplete_ipi_interception(struct kvm_vcpu *vcpu); 579 int avic_unaccelerated_access_interception(struct kvm_vcpu *vcpu); 580 int avic_init_vcpu(struct vcpu_svm *svm); 581 void __avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu); 582 void __avic_vcpu_put(struct kvm_vcpu *vcpu); 583 void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu); 584 void avic_set_virtual_apic_mode(struct kvm_vcpu *vcpu); 585 void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu); 586 bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason); 587 void avic_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr); 588 void avic_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr); 589 bool avic_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu); 590 int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq, 591 uint32_t guest_irq, bool set); 592 void avic_vcpu_blocking(struct kvm_vcpu *vcpu); 593 void avic_vcpu_unblocking(struct kvm_vcpu *vcpu); 594 void avic_ring_doorbell(struct kvm_vcpu *vcpu); 595 596 /* sev.c */ 597 598 #define GHCB_VERSION_MAX 1ULL 599 #define GHCB_VERSION_MIN 1ULL 600 601 602 extern unsigned int max_sev_asid; 603 604 void sev_vm_destroy(struct kvm *kvm); 605 int sev_mem_enc_ioctl(struct kvm *kvm, void __user *argp); 606 int sev_mem_enc_register_region(struct kvm *kvm, 607 struct kvm_enc_region *range); 608 int sev_mem_enc_unregister_region(struct kvm *kvm, 609 struct kvm_enc_region *range); 610 int sev_vm_copy_enc_context_from(struct kvm *kvm, unsigned int source_fd); 611 int sev_vm_move_enc_context_from(struct kvm *kvm, unsigned int source_fd); 612 void pre_sev_run(struct vcpu_svm *svm, int cpu); 613 void __init sev_set_cpu_caps(void); 614 void __init sev_hardware_setup(void); 615 void sev_hardware_unsetup(void); 616 int sev_cpu_init(struct svm_cpu_data *sd); 617 void sev_free_vcpu(struct kvm_vcpu *vcpu); 618 int sev_handle_vmgexit(struct kvm_vcpu *vcpu); 619 int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in); 620 void sev_es_init_vmcb(struct vcpu_svm *svm); 621 void sev_es_vcpu_reset(struct vcpu_svm *svm); 622 void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 623 void sev_es_prepare_switch_to_guest(struct vmcb_save_area *hostsa); 624 void sev_es_unmap_ghcb(struct vcpu_svm *svm); 625 626 /* vmenter.S */ 627 628 void __svm_sev_es_vcpu_run(unsigned long vmcb_pa); 629 void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs); 630 631 #endif 632