1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H 3 #define ARCH_X86_KVM_REVERSE_CPUID_H 4 5 #include <uapi/asm/kvm.h> 6 #include <asm/cpufeature.h> 7 #include <asm/cpufeatures.h> 8 9 /* 10 * Hardware-defined CPUID leafs that are either scattered by the kernel or are 11 * unknown to the kernel, but need to be directly used by KVM. Note, these 12 * word values conflict with the kernel's "bug" caps, but KVM doesn't use those. 13 */ 14 enum kvm_only_cpuid_leafs { 15 CPUID_12_EAX = NCAPINTS, 16 CPUID_7_1_EDX, 17 CPUID_8000_0007_EDX, 18 CPUID_8000_0022_EAX, 19 CPUID_7_2_EDX, 20 CPUID_24_0_EBX, 21 NR_KVM_CPU_CAPS, 22 23 NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, 24 }; 25 26 /* 27 * Define a KVM-only feature flag. 28 * 29 * For features that are scattered by cpufeatures.h, __feature_translate() also 30 * needs to be updated to translate the kernel-defined feature into the 31 * KVM-defined feature. 32 * 33 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h, 34 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so 35 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is 36 * needed in this case. 37 */ 38 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f)) 39 40 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */ 41 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0) 42 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1) 43 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11) 44 45 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ 46 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) 47 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5) 48 #define X86_FEATURE_AMX_COMPLEX KVM_X86_FEATURE(CPUID_7_1_EDX, 8) 49 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14) 50 #define X86_FEATURE_AVX10 KVM_X86_FEATURE(CPUID_7_1_EDX, 19) 51 52 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */ 53 #define X86_FEATURE_INTEL_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0) 54 #define X86_FEATURE_IPRED_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 1) 55 #define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2) 56 #define X86_FEATURE_DDPD_U KVM_X86_FEATURE(CPUID_7_2_EDX, 3) 57 #define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4) 58 #define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5) 59 60 /* Intel-defined sub-features, CPUID level 0x00000024:0 (EBX) */ 61 #define X86_FEATURE_AVX10_128 KVM_X86_FEATURE(CPUID_24_0_EBX, 16) 62 #define X86_FEATURE_AVX10_256 KVM_X86_FEATURE(CPUID_24_0_EBX, 17) 63 #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18) 64 65 /* CPUID level 0x80000007 (EDX). */ 66 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8) 67 68 /* CPUID level 0x80000022 (EAX) */ 69 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0) 70 71 struct cpuid_reg { 72 u32 function; 73 u32 index; 74 int reg; 75 }; 76 77 static const struct cpuid_reg reverse_cpuid[] = { 78 [CPUID_1_EDX] = { 1, 0, CPUID_EDX}, 79 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX}, 80 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX}, 81 [CPUID_1_ECX] = { 1, 0, CPUID_ECX}, 82 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX}, 83 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX}, 84 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX}, 85 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX}, 86 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX}, 87 [CPUID_6_EAX] = { 6, 0, CPUID_EAX}, 88 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX}, 89 [CPUID_7_ECX] = { 7, 0, CPUID_ECX}, 90 [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX}, 91 [CPUID_7_EDX] = { 7, 0, CPUID_EDX}, 92 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX}, 93 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX}, 94 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX}, 95 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX}, 96 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX}, 97 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX}, 98 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX}, 99 [CPUID_7_2_EDX] = { 7, 2, CPUID_EDX}, 100 [CPUID_24_0_EBX] = { 0x24, 0, CPUID_EBX}, 101 }; 102 103 /* 104 * Reverse CPUID and its derivatives can only be used for hardware-defined 105 * feature words, i.e. words whose bits directly correspond to a CPUID leaf. 106 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word 107 * is nonsensical as the bit number/mask is an arbitrary software-defined value 108 * and can't be used by KVM to query/control guest capabilities. And obviously 109 * the leaf being queried must have an entry in the lookup table. 110 */ 111 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf) 112 { 113 BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS); 114 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1); 115 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2); 116 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3); 117 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4); 118 BUILD_BUG_ON(x86_leaf == CPUID_LNX_5); 119 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid)); 120 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0); 121 } 122 123 /* 124 * Translate feature bits that are scattered in the kernel's cpufeatures word 125 * into KVM feature words that align with hardware's definitions. 126 */ 127 static __always_inline u32 __feature_translate(int x86_feature) 128 { 129 #define KVM_X86_TRANSLATE_FEATURE(f) \ 130 case X86_FEATURE_##f: return KVM_X86_FEATURE_##f 131 132 switch (x86_feature) { 133 KVM_X86_TRANSLATE_FEATURE(SGX1); 134 KVM_X86_TRANSLATE_FEATURE(SGX2); 135 KVM_X86_TRANSLATE_FEATURE(SGX_EDECCSSA); 136 KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC); 137 KVM_X86_TRANSLATE_FEATURE(PERFMON_V2); 138 KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL); 139 KVM_X86_TRANSLATE_FEATURE(BHI_CTRL); 140 default: 141 return x86_feature; 142 } 143 } 144 145 static __always_inline u32 __feature_leaf(int x86_feature) 146 { 147 return __feature_translate(x86_feature) / 32; 148 } 149 150 /* 151 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain 152 * the hardware defined bit number (stored in bits 4:0) and a software defined 153 * "word" (stored in bits 31:5). The word is used to index into arrays of 154 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has(). 155 */ 156 static __always_inline u32 __feature_bit(int x86_feature) 157 { 158 x86_feature = __feature_translate(x86_feature); 159 160 reverse_cpuid_check(x86_feature / 32); 161 return 1 << (x86_feature & 31); 162 } 163 164 #define feature_bit(name) __feature_bit(X86_FEATURE_##name) 165 166 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature) 167 { 168 unsigned int x86_leaf = __feature_leaf(x86_feature); 169 170 reverse_cpuid_check(x86_leaf); 171 return reverse_cpuid[x86_leaf]; 172 } 173 174 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 175 u32 reg) 176 { 177 switch (reg) { 178 case CPUID_EAX: 179 return &entry->eax; 180 case CPUID_EBX: 181 return &entry->ebx; 182 case CPUID_ECX: 183 return &entry->ecx; 184 case CPUID_EDX: 185 return &entry->edx; 186 default: 187 BUILD_BUG(); 188 return NULL; 189 } 190 } 191 192 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 193 unsigned int x86_feature) 194 { 195 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature); 196 197 return __cpuid_entry_get_reg(entry, cpuid.reg); 198 } 199 200 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry, 201 unsigned int x86_feature) 202 { 203 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 204 205 return *reg & __feature_bit(x86_feature); 206 } 207 208 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry, 209 unsigned int x86_feature) 210 { 211 return cpuid_entry_get(entry, x86_feature); 212 } 213 214 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry, 215 unsigned int x86_feature) 216 { 217 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 218 219 *reg &= ~__feature_bit(x86_feature); 220 } 221 222 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry, 223 unsigned int x86_feature) 224 { 225 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 226 227 *reg |= __feature_bit(x86_feature); 228 } 229 230 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry, 231 unsigned int x86_feature, 232 bool set) 233 { 234 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 235 236 /* 237 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the 238 * compiler into using CMOV instead of Jcc when possible. 239 */ 240 if (set) 241 *reg |= __feature_bit(x86_feature); 242 else 243 *reg &= ~__feature_bit(x86_feature); 244 } 245 246 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */ 247