1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H 3 #define ARCH_X86_KVM_REVERSE_CPUID_H 4 5 #include <uapi/asm/kvm.h> 6 #include <asm/cpufeature.h> 7 #include <asm/cpufeatures.h> 8 9 /* 10 * Hardware-defined CPUID leafs that are either scattered by the kernel or are 11 * unknown to the kernel, but need to be directly used by KVM. Note, these 12 * word values conflict with the kernel's "bug" caps, but KVM doesn't use those. 13 */ 14 enum kvm_only_cpuid_leafs { 15 CPUID_12_EAX = NCAPINTS, 16 CPUID_7_1_EDX, 17 CPUID_8000_0007_EDX, 18 CPUID_8000_0022_EAX, 19 CPUID_7_2_EDX, 20 CPUID_24_0_EBX, 21 NR_KVM_CPU_CAPS, 22 23 NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, 24 }; 25 26 /* 27 * Define a KVM-only feature flag. 28 * 29 * For features that are scattered by cpufeatures.h, __feature_translate() also 30 * needs to be updated to translate the kernel-defined feature into the 31 * KVM-defined feature. 32 * 33 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h, 34 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so 35 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is 36 * needed in this case. 37 */ 38 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f)) 39 40 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */ 41 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0) 42 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1) 43 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11) 44 45 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ 46 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) 47 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5) 48 #define X86_FEATURE_AMX_COMPLEX KVM_X86_FEATURE(CPUID_7_1_EDX, 8) 49 #define X86_FEATURE_AVX_VNNI_INT16 KVM_X86_FEATURE(CPUID_7_1_EDX, 10) 50 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14) 51 #define X86_FEATURE_AVX10 KVM_X86_FEATURE(CPUID_7_1_EDX, 19) 52 53 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */ 54 #define X86_FEATURE_INTEL_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0) 55 #define X86_FEATURE_IPRED_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 1) 56 #define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2) 57 #define X86_FEATURE_DDPD_U KVM_X86_FEATURE(CPUID_7_2_EDX, 3) 58 #define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4) 59 #define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5) 60 61 /* Intel-defined sub-features, CPUID level 0x00000024:0 (EBX) */ 62 #define X86_FEATURE_AVX10_128 KVM_X86_FEATURE(CPUID_24_0_EBX, 16) 63 #define X86_FEATURE_AVX10_256 KVM_X86_FEATURE(CPUID_24_0_EBX, 17) 64 #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18) 65 66 /* CPUID level 0x80000007 (EDX). */ 67 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8) 68 69 /* CPUID level 0x80000022 (EAX) */ 70 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0) 71 72 struct cpuid_reg { 73 u32 function; 74 u32 index; 75 int reg; 76 }; 77 78 static const struct cpuid_reg reverse_cpuid[] = { 79 [CPUID_1_EDX] = { 1, 0, CPUID_EDX}, 80 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX}, 81 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX}, 82 [CPUID_1_ECX] = { 1, 0, CPUID_ECX}, 83 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX}, 84 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX}, 85 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX}, 86 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX}, 87 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX}, 88 [CPUID_6_EAX] = { 6, 0, CPUID_EAX}, 89 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX}, 90 [CPUID_7_ECX] = { 7, 0, CPUID_ECX}, 91 [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX}, 92 [CPUID_7_EDX] = { 7, 0, CPUID_EDX}, 93 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX}, 94 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX}, 95 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX}, 96 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX}, 97 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX}, 98 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX}, 99 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX}, 100 [CPUID_7_2_EDX] = { 7, 2, CPUID_EDX}, 101 [CPUID_24_0_EBX] = { 0x24, 0, CPUID_EBX}, 102 }; 103 104 /* 105 * Reverse CPUID and its derivatives can only be used for hardware-defined 106 * feature words, i.e. words whose bits directly correspond to a CPUID leaf. 107 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word 108 * is nonsensical as the bit number/mask is an arbitrary software-defined value 109 * and can't be used by KVM to query/control guest capabilities. And obviously 110 * the leaf being queried must have an entry in the lookup table. 111 */ 112 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf) 113 { 114 BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS); 115 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1); 116 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2); 117 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3); 118 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4); 119 BUILD_BUG_ON(x86_leaf == CPUID_LNX_5); 120 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid)); 121 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0); 122 } 123 124 /* 125 * Translate feature bits that are scattered in the kernel's cpufeatures word 126 * into KVM feature words that align with hardware's definitions. 127 */ 128 static __always_inline u32 __feature_translate(int x86_feature) 129 { 130 #define KVM_X86_TRANSLATE_FEATURE(f) \ 131 case X86_FEATURE_##f: return KVM_X86_FEATURE_##f 132 133 switch (x86_feature) { 134 KVM_X86_TRANSLATE_FEATURE(SGX1); 135 KVM_X86_TRANSLATE_FEATURE(SGX2); 136 KVM_X86_TRANSLATE_FEATURE(SGX_EDECCSSA); 137 KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC); 138 KVM_X86_TRANSLATE_FEATURE(PERFMON_V2); 139 KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL); 140 KVM_X86_TRANSLATE_FEATURE(BHI_CTRL); 141 default: 142 return x86_feature; 143 } 144 } 145 146 static __always_inline u32 __feature_leaf(int x86_feature) 147 { 148 return __feature_translate(x86_feature) / 32; 149 } 150 151 /* 152 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain 153 * the hardware defined bit number (stored in bits 4:0) and a software defined 154 * "word" (stored in bits 31:5). The word is used to index into arrays of 155 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has(). 156 */ 157 static __always_inline u32 __feature_bit(int x86_feature) 158 { 159 x86_feature = __feature_translate(x86_feature); 160 161 reverse_cpuid_check(x86_feature / 32); 162 return 1 << (x86_feature & 31); 163 } 164 165 #define feature_bit(name) __feature_bit(X86_FEATURE_##name) 166 167 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature) 168 { 169 unsigned int x86_leaf = __feature_leaf(x86_feature); 170 171 reverse_cpuid_check(x86_leaf); 172 return reverse_cpuid[x86_leaf]; 173 } 174 175 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 176 u32 reg) 177 { 178 switch (reg) { 179 case CPUID_EAX: 180 return &entry->eax; 181 case CPUID_EBX: 182 return &entry->ebx; 183 case CPUID_ECX: 184 return &entry->ecx; 185 case CPUID_EDX: 186 return &entry->edx; 187 default: 188 BUILD_BUG(); 189 return NULL; 190 } 191 } 192 193 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 194 unsigned int x86_feature) 195 { 196 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature); 197 198 return __cpuid_entry_get_reg(entry, cpuid.reg); 199 } 200 201 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry, 202 unsigned int x86_feature) 203 { 204 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 205 206 return *reg & __feature_bit(x86_feature); 207 } 208 209 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry, 210 unsigned int x86_feature) 211 { 212 return cpuid_entry_get(entry, x86_feature); 213 } 214 215 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry, 216 unsigned int x86_feature) 217 { 218 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 219 220 *reg &= ~__feature_bit(x86_feature); 221 } 222 223 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry, 224 unsigned int x86_feature) 225 { 226 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 227 228 *reg |= __feature_bit(x86_feature); 229 } 230 231 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry, 232 unsigned int x86_feature, 233 bool set) 234 { 235 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 236 237 /* 238 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the 239 * compiler into using CMOV instead of Jcc when possible. 240 */ 241 if (set) 242 *reg |= __feature_bit(x86_feature); 243 else 244 *reg &= ~__feature_bit(x86_feature); 245 } 246 247 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */ 248