1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56fc9bf2e0SSean Christopherson #include "paging.h" 57fc9bf2e0SSean Christopherson 58c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 59c50d8ae3SPaolo Bonzini 60a9d6496dSShaokun Zhang int __read_mostly nx_huge_pages = -1; 61c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 62c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 63c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 64c50d8ae3SPaolo Bonzini #else 65c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 66c50d8ae3SPaolo Bonzini #endif 67c50d8ae3SPaolo Bonzini 68c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 69c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 70c50d8ae3SPaolo Bonzini 71d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 72c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 73c50d8ae3SPaolo Bonzini .get = param_get_bool, 74c50d8ae3SPaolo Bonzini }; 75c50d8ae3SPaolo Bonzini 76d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 77c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 78c50d8ae3SPaolo Bonzini .get = param_get_uint, 79c50d8ae3SPaolo Bonzini }; 80c50d8ae3SPaolo Bonzini 81c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 82c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 83c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 84c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 85c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 86c50d8ae3SPaolo Bonzini 8771fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8871fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8971fe7013SSean Christopherson 90c50d8ae3SPaolo Bonzini /* 91c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 92c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 93c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 94c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 95c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 96c50d8ae3SPaolo Bonzini */ 97c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 98c50d8ae3SPaolo Bonzini 991d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 100746700d2SWei Huang static int tdp_root_level __read_mostly; 10183013059SSean Christopherson static int max_tdp_level __read_mostly; 102703c335dSSean Christopherson 103c50d8ae3SPaolo Bonzini enum { 104c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 105c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 106c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 107c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 108c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 109c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 110c50d8ae3SPaolo Bonzini }; 111c50d8ae3SPaolo Bonzini 112c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1135a9624afSPaolo Bonzini bool dbg = 0; 114c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 115c50d8ae3SPaolo Bonzini #endif 116c50d8ae3SPaolo Bonzini 117c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 118c50d8ae3SPaolo Bonzini 119c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 120c50d8ae3SPaolo Bonzini 121c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 122c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 123c50d8ae3SPaolo Bonzini 124c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 125c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 126c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 127c50d8ae3SPaolo Bonzini 128c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 129c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 130c50d8ae3SPaolo Bonzini 131c50d8ae3SPaolo Bonzini 132c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 133c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 134c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 135c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 136c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 137c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 138c50d8ae3SPaolo Bonzini 139c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 140c50d8ae3SPaolo Bonzini 141dc1cff96SPeter Xu /* make pte_list_desc fit well in cache lines */ 14213236e25SPeter Xu #define PTE_LIST_EXT 14 143c50d8ae3SPaolo Bonzini 14413236e25SPeter Xu /* 14513236e25SPeter Xu * Slight optimization of cacheline layout, by putting `more' and `spte_count' 14613236e25SPeter Xu * at the start; then accessing it will only use one single cacheline for 14713236e25SPeter Xu * either full (entries==PTE_LIST_EXT) case or entries<=6. 14813236e25SPeter Xu */ 149c50d8ae3SPaolo Bonzini struct pte_list_desc { 150c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 15113236e25SPeter Xu /* 15213236e25SPeter Xu * Stores number of entries stored in the pte_list_desc. No need to be 15313236e25SPeter Xu * u64 but just for easier alignment. When PTE_LIST_EXT, means full. 15413236e25SPeter Xu */ 15513236e25SPeter Xu u64 spte_count; 15613236e25SPeter Xu u64 *sptes[PTE_LIST_EXT]; 157c50d8ae3SPaolo Bonzini }; 158c50d8ae3SPaolo Bonzini 159c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 160c50d8ae3SPaolo Bonzini u64 addr; 161c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 162c50d8ae3SPaolo Bonzini u64 *sptep; 163c50d8ae3SPaolo Bonzini int level; 164c50d8ae3SPaolo Bonzini unsigned index; 165c50d8ae3SPaolo Bonzini }; 166c50d8ae3SPaolo Bonzini 167c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 168c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 169c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 170c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 171c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 172c50d8ae3SPaolo Bonzini 173c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 174c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 175c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 176c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 177c50d8ae3SPaolo Bonzini 178c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 179c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 180c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 181c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 182c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 183c50d8ae3SPaolo Bonzini 184c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 18502c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 186c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 187c50d8ae3SPaolo Bonzini 188c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 189c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 190c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 191c50d8ae3SPaolo Bonzini 192594e91a1SSean Christopherson struct kvm_mmu_role_regs { 193594e91a1SSean Christopherson const unsigned long cr0; 194594e91a1SSean Christopherson const unsigned long cr4; 195594e91a1SSean Christopherson const u64 efer; 196594e91a1SSean Christopherson }; 197594e91a1SSean Christopherson 198c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 199c50d8ae3SPaolo Bonzini #include "mmutrace.h" 200c50d8ae3SPaolo Bonzini 201594e91a1SSean Christopherson /* 202594e91a1SSean Christopherson * Yes, lot's of underscores. They're a hint that you probably shouldn't be 203594e91a1SSean Christopherson * reading from the role_regs. Once the mmu_role is constructed, it becomes 204594e91a1SSean Christopherson * the single source of truth for the MMU's state. 205594e91a1SSean Christopherson */ 206594e91a1SSean Christopherson #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \ 2074ac21457SPaolo Bonzini static inline bool __maybe_unused ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\ 208594e91a1SSean Christopherson { \ 209594e91a1SSean Christopherson return !!(regs->reg & flag); \ 210594e91a1SSean Christopherson } 211594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG); 212594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP); 213594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE); 214594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE); 215594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP); 216594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP); 217594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE); 218594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57); 219594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX); 220594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA); 221594e91a1SSean Christopherson 22260667724SSean Christopherson /* 22360667724SSean Christopherson * The MMU itself (with a valid role) is the single source of truth for the 22460667724SSean Christopherson * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The 22560667724SSean Christopherson * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1, 22660667724SSean Christopherson * and the vCPU may be incorrect/irrelevant. 22760667724SSean Christopherson */ 22860667724SSean Christopherson #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \ 2294ac21457SPaolo Bonzini static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \ 23060667724SSean Christopherson { \ 23160667724SSean Christopherson return !!(mmu->mmu_role. base_or_ext . reg##_##name); \ 23260667724SSean Christopherson } 23360667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg); 23460667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp); 23560667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse); 23660667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae); 23760667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep); 23860667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap); 23960667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke); 24060667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57); 24160667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, efer, nx); 24260667724SSean Christopherson 243594e91a1SSean Christopherson static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) 244594e91a1SSean Christopherson { 245594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 246594e91a1SSean Christopherson .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS), 247594e91a1SSean Christopherson .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS), 248594e91a1SSean Christopherson .efer = vcpu->arch.efer, 249594e91a1SSean Christopherson }; 250594e91a1SSean Christopherson 251594e91a1SSean Christopherson return regs; 252594e91a1SSean Christopherson } 253c50d8ae3SPaolo Bonzini 254f4bd6f73SSean Christopherson static int role_regs_to_root_level(struct kvm_mmu_role_regs *regs) 255f4bd6f73SSean Christopherson { 256f4bd6f73SSean Christopherson if (!____is_cr0_pg(regs)) 257f4bd6f73SSean Christopherson return 0; 258f4bd6f73SSean Christopherson else if (____is_efer_lma(regs)) 259f4bd6f73SSean Christopherson return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : 260f4bd6f73SSean Christopherson PT64_ROOT_4LEVEL; 261f4bd6f73SSean Christopherson else if (____is_cr4_pae(regs)) 262f4bd6f73SSean Christopherson return PT32E_ROOT_LEVEL; 263f4bd6f73SSean Christopherson else 264f4bd6f73SSean Christopherson return PT32_ROOT_LEVEL; 265f4bd6f73SSean Christopherson } 266c50d8ae3SPaolo Bonzini 267c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 268c50d8ae3SPaolo Bonzini { 269afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 270c50d8ae3SPaolo Bonzini } 271c50d8ae3SPaolo Bonzini 272c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 273c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 274c50d8ae3SPaolo Bonzini { 275c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 276c50d8ae3SPaolo Bonzini 277afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 278b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 279c50d8ae3SPaolo Bonzini 280c50d8ae3SPaolo Bonzini if (ret) 281c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 282c50d8ae3SPaolo Bonzini } 283c50d8ae3SPaolo Bonzini 2842f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 285c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 286c50d8ae3SPaolo Bonzini { 287c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 288c50d8ae3SPaolo Bonzini 289c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 290c50d8ae3SPaolo Bonzini range.pages = pages; 291c50d8ae3SPaolo Bonzini 292c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 293c50d8ae3SPaolo Bonzini } 294c50d8ae3SPaolo Bonzini 2958f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2968f79b064SBen Gardon unsigned int access) 2978f79b064SBen Gardon { 298c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 2998f79b064SBen Gardon 300c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 301c236d962SSean Christopherson mmu_spte_set(sptep, spte); 302c50d8ae3SPaolo Bonzini } 303c50d8ae3SPaolo Bonzini 304c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 305c50d8ae3SPaolo Bonzini { 306c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 307c50d8ae3SPaolo Bonzini 3088a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 309c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 310c50d8ae3SPaolo Bonzini 311c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 312c50d8ae3SPaolo Bonzini } 313c50d8ae3SPaolo Bonzini 314c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 315c50d8ae3SPaolo Bonzini { 316c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 317c50d8ae3SPaolo Bonzini } 318c50d8ae3SPaolo Bonzini 319c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 320c50d8ae3SPaolo Bonzini { 321c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 322c50d8ae3SPaolo Bonzini 323c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 324c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 325c50d8ae3SPaolo Bonzini return false; 326c50d8ae3SPaolo Bonzini 327c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 328c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 329c50d8ae3SPaolo Bonzini 330c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 331c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 332c50d8ae3SPaolo Bonzini } 333c50d8ae3SPaolo Bonzini 334cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 335cd313569SMohammed Gamal struct x86_exception *exception) 336cd313569SMohammed Gamal { 337cd313569SMohammed Gamal return gpa; 338cd313569SMohammed Gamal } 339cd313569SMohammed Gamal 340c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 341c50d8ae3SPaolo Bonzini { 342c50d8ae3SPaolo Bonzini return 1; 343c50d8ae3SPaolo Bonzini } 344c50d8ae3SPaolo Bonzini 345c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 346c50d8ae3SPaolo Bonzini { 347c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 348c50d8ae3SPaolo Bonzini 349c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 350c50d8ae3SPaolo Bonzini } 351c50d8ae3SPaolo Bonzini 352c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 353c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 354c50d8ae3SPaolo Bonzini { 355c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 356c50d8ae3SPaolo Bonzini } 357c50d8ae3SPaolo Bonzini 358c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 359c50d8ae3SPaolo Bonzini { 360c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 361c50d8ae3SPaolo Bonzini } 362c50d8ae3SPaolo Bonzini 363c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 364c50d8ae3SPaolo Bonzini { 365c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 366c50d8ae3SPaolo Bonzini } 367c50d8ae3SPaolo Bonzini 368c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 369c50d8ae3SPaolo Bonzini { 370c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 371c50d8ae3SPaolo Bonzini } 372c50d8ae3SPaolo Bonzini #else 373c50d8ae3SPaolo Bonzini union split_spte { 374c50d8ae3SPaolo Bonzini struct { 375c50d8ae3SPaolo Bonzini u32 spte_low; 376c50d8ae3SPaolo Bonzini u32 spte_high; 377c50d8ae3SPaolo Bonzini }; 378c50d8ae3SPaolo Bonzini u64 spte; 379c50d8ae3SPaolo Bonzini }; 380c50d8ae3SPaolo Bonzini 381c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 382c50d8ae3SPaolo Bonzini { 38357354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 384c50d8ae3SPaolo Bonzini 385c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 386c50d8ae3SPaolo Bonzini return; 387c50d8ae3SPaolo Bonzini 388c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 389c50d8ae3SPaolo Bonzini smp_wmb(); 390c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 391c50d8ae3SPaolo Bonzini } 392c50d8ae3SPaolo Bonzini 393c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 394c50d8ae3SPaolo Bonzini { 395c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 396c50d8ae3SPaolo Bonzini 397c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 398c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 399c50d8ae3SPaolo Bonzini 400c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 401c50d8ae3SPaolo Bonzini 402c50d8ae3SPaolo Bonzini /* 403c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 404c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 405c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 406c50d8ae3SPaolo Bonzini */ 407c50d8ae3SPaolo Bonzini smp_wmb(); 408c50d8ae3SPaolo Bonzini 409c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 410c50d8ae3SPaolo Bonzini } 411c50d8ae3SPaolo Bonzini 412c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 413c50d8ae3SPaolo Bonzini { 414c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 415c50d8ae3SPaolo Bonzini 416c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 417c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 418c50d8ae3SPaolo Bonzini 419c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 420c50d8ae3SPaolo Bonzini 421c50d8ae3SPaolo Bonzini /* 422c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 423c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 424c50d8ae3SPaolo Bonzini */ 425c50d8ae3SPaolo Bonzini smp_wmb(); 426c50d8ae3SPaolo Bonzini 427c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 428c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 429c50d8ae3SPaolo Bonzini } 430c50d8ae3SPaolo Bonzini 431c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 432c50d8ae3SPaolo Bonzini { 433c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 434c50d8ae3SPaolo Bonzini 435c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 436c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 437c50d8ae3SPaolo Bonzini 438c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 439c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 440c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 441c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 442c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 443c50d8ae3SPaolo Bonzini 444c50d8ae3SPaolo Bonzini return orig.spte; 445c50d8ae3SPaolo Bonzini } 446c50d8ae3SPaolo Bonzini 447c50d8ae3SPaolo Bonzini /* 448c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 449c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 450c50d8ae3SPaolo Bonzini * 451c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 452c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 453c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 454c50d8ae3SPaolo Bonzini * 455c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 456c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 457c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 458c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 459c50d8ae3SPaolo Bonzini * 460c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 461c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 462c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 463c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 464c50d8ae3SPaolo Bonzini */ 465c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 466c50d8ae3SPaolo Bonzini { 46757354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 468c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 469c50d8ae3SPaolo Bonzini int count; 470c50d8ae3SPaolo Bonzini 471c50d8ae3SPaolo Bonzini retry: 472c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 473c50d8ae3SPaolo Bonzini smp_rmb(); 474c50d8ae3SPaolo Bonzini 475c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 476c50d8ae3SPaolo Bonzini smp_rmb(); 477c50d8ae3SPaolo Bonzini 478c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 479c50d8ae3SPaolo Bonzini smp_rmb(); 480c50d8ae3SPaolo Bonzini 481c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 482c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 483c50d8ae3SPaolo Bonzini goto retry; 484c50d8ae3SPaolo Bonzini 485c50d8ae3SPaolo Bonzini return spte.spte; 486c50d8ae3SPaolo Bonzini } 487c50d8ae3SPaolo Bonzini #endif 488c50d8ae3SPaolo Bonzini 489c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 490c50d8ae3SPaolo Bonzini { 491c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 492c50d8ae3SPaolo Bonzini return false; 493c50d8ae3SPaolo Bonzini 494c50d8ae3SPaolo Bonzini /* 495c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 496c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 497c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 498c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 499c50d8ae3SPaolo Bonzini */ 500c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 501c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 502c50d8ae3SPaolo Bonzini return true; 503c50d8ae3SPaolo Bonzini 504c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 505c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 506c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 507c50d8ae3SPaolo Bonzini return true; 508c50d8ae3SPaolo Bonzini } 509c50d8ae3SPaolo Bonzini 510c50d8ae3SPaolo Bonzini return false; 511c50d8ae3SPaolo Bonzini } 512c50d8ae3SPaolo Bonzini 513c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 514c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 515c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 516c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 517c50d8ae3SPaolo Bonzini * the spte. 518c50d8ae3SPaolo Bonzini */ 519c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 520c50d8ae3SPaolo Bonzini { 521c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 522c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 523c50d8ae3SPaolo Bonzini } 524c50d8ae3SPaolo Bonzini 525c50d8ae3SPaolo Bonzini /* 526c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 527c50d8ae3SPaolo Bonzini * accessed/dirty status. 528c50d8ae3SPaolo Bonzini */ 529c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 530c50d8ae3SPaolo Bonzini { 531c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 532c50d8ae3SPaolo Bonzini 533c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 534c50d8ae3SPaolo Bonzini 535c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 536c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 537c50d8ae3SPaolo Bonzini return old_spte; 538c50d8ae3SPaolo Bonzini } 539c50d8ae3SPaolo Bonzini 540c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 541c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 542c50d8ae3SPaolo Bonzini else 543c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 544c50d8ae3SPaolo Bonzini 545c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 546c50d8ae3SPaolo Bonzini 547c50d8ae3SPaolo Bonzini return old_spte; 548c50d8ae3SPaolo Bonzini } 549c50d8ae3SPaolo Bonzini 550c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 551c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 552c50d8ae3SPaolo Bonzini * 553c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 554c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 555c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 556c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 557c50d8ae3SPaolo Bonzini * case. 558c50d8ae3SPaolo Bonzini * 559c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 560c50d8ae3SPaolo Bonzini */ 561c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 562c50d8ae3SPaolo Bonzini { 563c50d8ae3SPaolo Bonzini bool flush = false; 564c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 565c50d8ae3SPaolo Bonzini 566c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 567c50d8ae3SPaolo Bonzini return false; 568c50d8ae3SPaolo Bonzini 569c50d8ae3SPaolo Bonzini /* 570c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 571c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 572c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 573c50d8ae3SPaolo Bonzini */ 574c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 575c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 576c50d8ae3SPaolo Bonzini flush = true; 577c50d8ae3SPaolo Bonzini 578c50d8ae3SPaolo Bonzini /* 579c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 580c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 581c50d8ae3SPaolo Bonzini */ 582c50d8ae3SPaolo Bonzini 583c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 584c50d8ae3SPaolo Bonzini flush = true; 585c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 586c50d8ae3SPaolo Bonzini } 587c50d8ae3SPaolo Bonzini 588c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 589c50d8ae3SPaolo Bonzini flush = true; 590c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 591c50d8ae3SPaolo Bonzini } 592c50d8ae3SPaolo Bonzini 593c50d8ae3SPaolo Bonzini return flush; 594c50d8ae3SPaolo Bonzini } 595c50d8ae3SPaolo Bonzini 596c50d8ae3SPaolo Bonzini /* 597c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 598c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 599c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 6007fa2a347SSean Christopherson * Returns the old PTE. 601c50d8ae3SPaolo Bonzini */ 60271f51d2cSMingwei Zhang static int mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep) 603c50d8ae3SPaolo Bonzini { 604c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 605c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 60671f51d2cSMingwei Zhang int level = sptep_to_sp(sptep)->role.level; 607c50d8ae3SPaolo Bonzini 608c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 609c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 610c50d8ae3SPaolo Bonzini else 611c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 612c50d8ae3SPaolo Bonzini 613c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 6147fa2a347SSean Christopherson return old_spte; 615c50d8ae3SPaolo Bonzini 61671f51d2cSMingwei Zhang kvm_update_page_stats(kvm, level, -1); 61771f51d2cSMingwei Zhang 618c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 619c50d8ae3SPaolo Bonzini 620c50d8ae3SPaolo Bonzini /* 621c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 622c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 623c50d8ae3SPaolo Bonzini * unmap it from mmu first. 624c50d8ae3SPaolo Bonzini */ 625c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 626c50d8ae3SPaolo Bonzini 627c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 628c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 629c50d8ae3SPaolo Bonzini 630c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 631c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 632c50d8ae3SPaolo Bonzini 6337fa2a347SSean Christopherson return old_spte; 634c50d8ae3SPaolo Bonzini } 635c50d8ae3SPaolo Bonzini 636c50d8ae3SPaolo Bonzini /* 637c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 638c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 639c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 640c50d8ae3SPaolo Bonzini */ 641c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 642c50d8ae3SPaolo Bonzini { 643c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 644c50d8ae3SPaolo Bonzini } 645c50d8ae3SPaolo Bonzini 646c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 647c50d8ae3SPaolo Bonzini { 648c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 649c50d8ae3SPaolo Bonzini } 650c50d8ae3SPaolo Bonzini 651c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 652c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 653c50d8ae3SPaolo Bonzini { 654c50d8ae3SPaolo Bonzini u64 new_spte = spte; 6558a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 6568a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 657c50d8ae3SPaolo Bonzini 658c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 659c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 660c50d8ae3SPaolo Bonzini 661c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 6628a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 6638a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 664c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 665c50d8ae3SPaolo Bonzini 666c50d8ae3SPaolo Bonzini return new_spte; 667c50d8ae3SPaolo Bonzini } 668c50d8ae3SPaolo Bonzini 669c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 670c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 671c50d8ae3SPaolo Bonzini { 672c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 673c50d8ae3SPaolo Bonzini 674c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 675c50d8ae3SPaolo Bonzini return false; 676c50d8ae3SPaolo Bonzini 677c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 678c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 679c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 680c50d8ae3SPaolo Bonzini } else { 681c50d8ae3SPaolo Bonzini /* 682c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 683c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 684c50d8ae3SPaolo Bonzini */ 685c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 686c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 687c50d8ae3SPaolo Bonzini 688c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 689c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 690c50d8ae3SPaolo Bonzini } 691c50d8ae3SPaolo Bonzini 692c50d8ae3SPaolo Bonzini return true; 693c50d8ae3SPaolo Bonzini } 694c50d8ae3SPaolo Bonzini 695c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 696c50d8ae3SPaolo Bonzini { 697c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 698c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_begin(); 699c5c8c7c5SDavid Matlack } else { 700c50d8ae3SPaolo Bonzini /* 701c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 702c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 703c50d8ae3SPaolo Bonzini */ 704c50d8ae3SPaolo Bonzini local_irq_disable(); 705c50d8ae3SPaolo Bonzini 706c50d8ae3SPaolo Bonzini /* 707c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 708c50d8ae3SPaolo Bonzini * to vcpu->mode. 709c50d8ae3SPaolo Bonzini */ 710c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 711c50d8ae3SPaolo Bonzini } 712c5c8c7c5SDavid Matlack } 713c50d8ae3SPaolo Bonzini 714c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 715c50d8ae3SPaolo Bonzini { 716c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 717c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_end(); 718c5c8c7c5SDavid Matlack } else { 719c50d8ae3SPaolo Bonzini /* 720c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 721c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 722c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 723c50d8ae3SPaolo Bonzini */ 724c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 725c50d8ae3SPaolo Bonzini local_irq_enable(); 726c50d8ae3SPaolo Bonzini } 727c5c8c7c5SDavid Matlack } 728c50d8ae3SPaolo Bonzini 729378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 730c50d8ae3SPaolo Bonzini { 731c50d8ae3SPaolo Bonzini int r; 732c50d8ae3SPaolo Bonzini 733531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 73494ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 735531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 736c50d8ae3SPaolo Bonzini if (r) 737c50d8ae3SPaolo Bonzini return r; 73894ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 739171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 740171a90d7SSean Christopherson if (r) 741171a90d7SSean Christopherson return r; 742378f5cd6SSean Christopherson if (maybe_indirect) { 74394ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 744171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 745c50d8ae3SPaolo Bonzini if (r) 746c50d8ae3SPaolo Bonzini return r; 747378f5cd6SSean Christopherson } 74894ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 749531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 750c50d8ae3SPaolo Bonzini } 751c50d8ae3SPaolo Bonzini 752c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 753c50d8ae3SPaolo Bonzini { 75494ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 75594ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 75694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 75794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 758c50d8ae3SPaolo Bonzini } 759c50d8ae3SPaolo Bonzini 760c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 761c50d8ae3SPaolo Bonzini { 76294ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 763c50d8ae3SPaolo Bonzini } 764c50d8ae3SPaolo Bonzini 765c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 766c50d8ae3SPaolo Bonzini { 767c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 768c50d8ae3SPaolo Bonzini } 769c50d8ae3SPaolo Bonzini 770c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 771c50d8ae3SPaolo Bonzini { 772c50d8ae3SPaolo Bonzini if (!sp->role.direct) 773c50d8ae3SPaolo Bonzini return sp->gfns[index]; 774c50d8ae3SPaolo Bonzini 775c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 776c50d8ae3SPaolo Bonzini } 777c50d8ae3SPaolo Bonzini 778c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 779c50d8ae3SPaolo Bonzini { 780c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 781c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 782c50d8ae3SPaolo Bonzini return; 783c50d8ae3SPaolo Bonzini } 784c50d8ae3SPaolo Bonzini 785c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 786c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 787c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 788c50d8ae3SPaolo Bonzini sp->gfn, 789c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 790c50d8ae3SPaolo Bonzini } 791c50d8ae3SPaolo Bonzini 792c50d8ae3SPaolo Bonzini /* 793c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 794c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 795c50d8ae3SPaolo Bonzini */ 796c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 7978ca6f063SBen Gardon const struct kvm_memory_slot *slot, int level) 798c50d8ae3SPaolo Bonzini { 799c50d8ae3SPaolo Bonzini unsigned long idx; 800c50d8ae3SPaolo Bonzini 801c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 802c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 803c50d8ae3SPaolo Bonzini } 804c50d8ae3SPaolo Bonzini 805269e9552SHamza Mahfooz static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot, 806c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 807c50d8ae3SPaolo Bonzini { 808c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 809c50d8ae3SPaolo Bonzini int i; 810c50d8ae3SPaolo Bonzini 8113bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 812c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 813c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 814c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 815c50d8ae3SPaolo Bonzini } 816c50d8ae3SPaolo Bonzini } 817c50d8ae3SPaolo Bonzini 818269e9552SHamza Mahfooz void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 819c50d8ae3SPaolo Bonzini { 820c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 821c50d8ae3SPaolo Bonzini } 822c50d8ae3SPaolo Bonzini 823269e9552SHamza Mahfooz void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 824c50d8ae3SPaolo Bonzini { 825c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 826c50d8ae3SPaolo Bonzini } 827c50d8ae3SPaolo Bonzini 828c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 829c50d8ae3SPaolo Bonzini { 830c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 831c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 832c50d8ae3SPaolo Bonzini gfn_t gfn; 833c50d8ae3SPaolo Bonzini 834c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 835c50d8ae3SPaolo Bonzini gfn = sp->gfn; 836c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 837c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 838c50d8ae3SPaolo Bonzini 839c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 8403bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 841c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 842c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 843c50d8ae3SPaolo Bonzini 844c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 845c50d8ae3SPaolo Bonzini } 846c50d8ae3SPaolo Bonzini 84729cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 848c50d8ae3SPaolo Bonzini { 849c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 850c50d8ae3SPaolo Bonzini return; 851c50d8ae3SPaolo Bonzini 852c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 853c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 854c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 855c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 856c50d8ae3SPaolo Bonzini } 857c50d8ae3SPaolo Bonzini 858c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 859c50d8ae3SPaolo Bonzini { 860c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 861c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 862c50d8ae3SPaolo Bonzini gfn_t gfn; 863c50d8ae3SPaolo Bonzini 864c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 865c50d8ae3SPaolo Bonzini gfn = sp->gfn; 866c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 867c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 8683bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 869c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 870c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 871c50d8ae3SPaolo Bonzini 872c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 873c50d8ae3SPaolo Bonzini } 874c50d8ae3SPaolo Bonzini 87529cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 876c50d8ae3SPaolo Bonzini { 877c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 878c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 879c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 880c50d8ae3SPaolo Bonzini } 881c50d8ae3SPaolo Bonzini 882c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 883c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 884c50d8ae3SPaolo Bonzini bool no_dirty_log) 885c50d8ae3SPaolo Bonzini { 886c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 887c50d8ae3SPaolo Bonzini 888c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 88991b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 89091b0d268SPaolo Bonzini return NULL; 891044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 89291b0d268SPaolo Bonzini return NULL; 893c50d8ae3SPaolo Bonzini 894c50d8ae3SPaolo Bonzini return slot; 895c50d8ae3SPaolo Bonzini } 896c50d8ae3SPaolo Bonzini 897c50d8ae3SPaolo Bonzini /* 898c50d8ae3SPaolo Bonzini * About rmap_head encoding: 899c50d8ae3SPaolo Bonzini * 900c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 901c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 902c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 903c50d8ae3SPaolo Bonzini */ 904c50d8ae3SPaolo Bonzini 905c50d8ae3SPaolo Bonzini /* 906c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 907c50d8ae3SPaolo Bonzini */ 908c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 909c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 910c50d8ae3SPaolo Bonzini { 911c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 91213236e25SPeter Xu int count = 0; 913c50d8ae3SPaolo Bonzini 914c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 915805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 916c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 917c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 918805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 919c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 920c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 921c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 92213236e25SPeter Xu desc->spte_count = 2; 923c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 924c50d8ae3SPaolo Bonzini ++count; 925c50d8ae3SPaolo Bonzini } else { 926805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 927c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 92813236e25SPeter Xu while (desc->spte_count == PTE_LIST_EXT) { 929c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 930c6c4f961SLi RongQing if (!desc->more) { 931c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 932c50d8ae3SPaolo Bonzini desc = desc->more; 93313236e25SPeter Xu desc->spte_count = 0; 934c6c4f961SLi RongQing break; 935c6c4f961SLi RongQing } 936c6c4f961SLi RongQing desc = desc->more; 937c50d8ae3SPaolo Bonzini } 93813236e25SPeter Xu count += desc->spte_count; 93913236e25SPeter Xu desc->sptes[desc->spte_count++] = spte; 940c50d8ae3SPaolo Bonzini } 941c50d8ae3SPaolo Bonzini return count; 942c50d8ae3SPaolo Bonzini } 943c50d8ae3SPaolo Bonzini 944c50d8ae3SPaolo Bonzini static void 945c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 946c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 947c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 948c50d8ae3SPaolo Bonzini { 94913236e25SPeter Xu int j = desc->spte_count - 1; 950c50d8ae3SPaolo Bonzini 951c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 952c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 95313236e25SPeter Xu desc->spte_count--; 95413236e25SPeter Xu if (desc->spte_count) 955c50d8ae3SPaolo Bonzini return; 956c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 957fe3c2b4cSMiaohe Lin rmap_head->val = 0; 958c50d8ae3SPaolo Bonzini else 959c50d8ae3SPaolo Bonzini if (prev_desc) 960c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 961c50d8ae3SPaolo Bonzini else 962c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 963c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 964c50d8ae3SPaolo Bonzini } 965c50d8ae3SPaolo Bonzini 966c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 967c50d8ae3SPaolo Bonzini { 968c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 969c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 970c50d8ae3SPaolo Bonzini int i; 971c50d8ae3SPaolo Bonzini 972c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 973c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 974c50d8ae3SPaolo Bonzini BUG(); 975c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 976805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 977c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 978c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 979c50d8ae3SPaolo Bonzini BUG(); 980c50d8ae3SPaolo Bonzini } 981c50d8ae3SPaolo Bonzini rmap_head->val = 0; 982c50d8ae3SPaolo Bonzini } else { 983805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 984c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 985c50d8ae3SPaolo Bonzini prev_desc = NULL; 986c50d8ae3SPaolo Bonzini while (desc) { 98713236e25SPeter Xu for (i = 0; i < desc->spte_count; ++i) { 988c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 989c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 990c50d8ae3SPaolo Bonzini desc, i, prev_desc); 991c50d8ae3SPaolo Bonzini return; 992c50d8ae3SPaolo Bonzini } 993c50d8ae3SPaolo Bonzini } 994c50d8ae3SPaolo Bonzini prev_desc = desc; 995c50d8ae3SPaolo Bonzini desc = desc->more; 996c50d8ae3SPaolo Bonzini } 997c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 998c50d8ae3SPaolo Bonzini BUG(); 999c50d8ae3SPaolo Bonzini } 1000c50d8ae3SPaolo Bonzini } 1001c50d8ae3SPaolo Bonzini 100271f51d2cSMingwei Zhang static void pte_list_remove(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 100371f51d2cSMingwei Zhang u64 *sptep) 1004c50d8ae3SPaolo Bonzini { 100571f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, sptep); 1006c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 1007c50d8ae3SPaolo Bonzini } 1008c50d8ae3SPaolo Bonzini 1009a75b5404SPeter Xu /* Return true if rmap existed, false otherwise */ 101071f51d2cSMingwei Zhang static bool pte_list_destroy(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1011a75b5404SPeter Xu { 1012a75b5404SPeter Xu struct pte_list_desc *desc, *next; 1013a75b5404SPeter Xu int i; 1014a75b5404SPeter Xu 1015a75b5404SPeter Xu if (!rmap_head->val) 1016a75b5404SPeter Xu return false; 1017a75b5404SPeter Xu 1018a75b5404SPeter Xu if (!(rmap_head->val & 1)) { 101971f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val); 1020a75b5404SPeter Xu goto out; 1021a75b5404SPeter Xu } 1022a75b5404SPeter Xu 1023a75b5404SPeter Xu desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1024a75b5404SPeter Xu 1025a75b5404SPeter Xu for (; desc; desc = next) { 1026a75b5404SPeter Xu for (i = 0; i < desc->spte_count; i++) 102771f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, desc->sptes[i]); 1028a75b5404SPeter Xu next = desc->more; 1029a75b5404SPeter Xu mmu_free_pte_list_desc(desc); 1030a75b5404SPeter Xu } 1031a75b5404SPeter Xu out: 1032a75b5404SPeter Xu /* rmap_head is meaningless now, remember to reset it */ 1033a75b5404SPeter Xu rmap_head->val = 0; 1034a75b5404SPeter Xu return true; 1035a75b5404SPeter Xu } 1036a75b5404SPeter Xu 10373bcd0662SPeter Xu unsigned int pte_list_count(struct kvm_rmap_head *rmap_head) 10383bcd0662SPeter Xu { 10393bcd0662SPeter Xu struct pte_list_desc *desc; 10403bcd0662SPeter Xu unsigned int count = 0; 10413bcd0662SPeter Xu 10423bcd0662SPeter Xu if (!rmap_head->val) 10433bcd0662SPeter Xu return 0; 10443bcd0662SPeter Xu else if (!(rmap_head->val & 1)) 10453bcd0662SPeter Xu return 1; 10463bcd0662SPeter Xu 10473bcd0662SPeter Xu desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 10483bcd0662SPeter Xu 10493bcd0662SPeter Xu while (desc) { 10503bcd0662SPeter Xu count += desc->spte_count; 10513bcd0662SPeter Xu desc = desc->more; 10523bcd0662SPeter Xu } 10533bcd0662SPeter Xu 10543bcd0662SPeter Xu return count; 10553bcd0662SPeter Xu } 10563bcd0662SPeter Xu 105793e083d4SDavid Matlack static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level, 1058269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1059c50d8ae3SPaolo Bonzini { 1060c50d8ae3SPaolo Bonzini unsigned long idx; 1061c50d8ae3SPaolo Bonzini 1062c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 10633bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1064c50d8ae3SPaolo Bonzini } 1065c50d8ae3SPaolo Bonzini 1066c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1067c50d8ae3SPaolo Bonzini { 1068356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 1069c50d8ae3SPaolo Bonzini 1070356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 107194ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 1072c50d8ae3SPaolo Bonzini } 1073c50d8ae3SPaolo Bonzini 1074c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1075c50d8ae3SPaolo Bonzini { 1076601f8af0SDavid Matlack struct kvm_memory_slot *slot; 1077c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1078c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1079c50d8ae3SPaolo Bonzini 108057354682SSean Christopherson sp = sptep_to_sp(spte); 1081c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 1082601f8af0SDavid Matlack slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 108393e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 1084c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 1085c50d8ae3SPaolo Bonzini } 1086c50d8ae3SPaolo Bonzini 1087601f8af0SDavid Matlack 1088c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1089c50d8ae3SPaolo Bonzini { 1090601f8af0SDavid Matlack struct kvm_memslots *slots; 1091601f8af0SDavid Matlack struct kvm_memory_slot *slot; 1092c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1093c50d8ae3SPaolo Bonzini gfn_t gfn; 1094c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1095c50d8ae3SPaolo Bonzini 109657354682SSean Christopherson sp = sptep_to_sp(spte); 1097c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1098601f8af0SDavid Matlack 1099601f8af0SDavid Matlack /* 1100601f8af0SDavid Matlack * Unlike rmap_add and rmap_recycle, rmap_remove does not run in the 1101601f8af0SDavid Matlack * context of a vCPU so have to determine which memslots to use based 1102601f8af0SDavid Matlack * on context information in sp->role. 1103601f8af0SDavid Matlack */ 1104601f8af0SDavid Matlack slots = kvm_memslots_for_spte_role(kvm, sp->role); 1105601f8af0SDavid Matlack 1106601f8af0SDavid Matlack slot = __gfn_to_memslot(slots, gfn); 110793e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 1108601f8af0SDavid Matlack 1109c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1110c50d8ae3SPaolo Bonzini } 1111c50d8ae3SPaolo Bonzini 1112c50d8ae3SPaolo Bonzini /* 1113c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1114c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1115c50d8ae3SPaolo Bonzini */ 1116c50d8ae3SPaolo Bonzini struct rmap_iterator { 1117c50d8ae3SPaolo Bonzini /* private fields */ 1118c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1119c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1120c50d8ae3SPaolo Bonzini }; 1121c50d8ae3SPaolo Bonzini 1122c50d8ae3SPaolo Bonzini /* 1123c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1124c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 11250a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1126c50d8ae3SPaolo Bonzini * 1127c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1128c50d8ae3SPaolo Bonzini */ 1129c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1130c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1131c50d8ae3SPaolo Bonzini { 1132c50d8ae3SPaolo Bonzini u64 *sptep; 1133c50d8ae3SPaolo Bonzini 1134c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1135c50d8ae3SPaolo Bonzini return NULL; 1136c50d8ae3SPaolo Bonzini 1137c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1138c50d8ae3SPaolo Bonzini iter->desc = NULL; 1139c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1140c50d8ae3SPaolo Bonzini goto out; 1141c50d8ae3SPaolo Bonzini } 1142c50d8ae3SPaolo Bonzini 1143c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1144c50d8ae3SPaolo Bonzini iter->pos = 0; 1145c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1146c50d8ae3SPaolo Bonzini out: 1147c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1148c50d8ae3SPaolo Bonzini return sptep; 1149c50d8ae3SPaolo Bonzini } 1150c50d8ae3SPaolo Bonzini 1151c50d8ae3SPaolo Bonzini /* 1152c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1153c50d8ae3SPaolo Bonzini * 1154c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1155c50d8ae3SPaolo Bonzini */ 1156c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1157c50d8ae3SPaolo Bonzini { 1158c50d8ae3SPaolo Bonzini u64 *sptep; 1159c50d8ae3SPaolo Bonzini 1160c50d8ae3SPaolo Bonzini if (iter->desc) { 1161c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1162c50d8ae3SPaolo Bonzini ++iter->pos; 1163c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1164c50d8ae3SPaolo Bonzini if (sptep) 1165c50d8ae3SPaolo Bonzini goto out; 1166c50d8ae3SPaolo Bonzini } 1167c50d8ae3SPaolo Bonzini 1168c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1169c50d8ae3SPaolo Bonzini 1170c50d8ae3SPaolo Bonzini if (iter->desc) { 1171c50d8ae3SPaolo Bonzini iter->pos = 0; 1172c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1173c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1174c50d8ae3SPaolo Bonzini goto out; 1175c50d8ae3SPaolo Bonzini } 1176c50d8ae3SPaolo Bonzini } 1177c50d8ae3SPaolo Bonzini 1178c50d8ae3SPaolo Bonzini return NULL; 1179c50d8ae3SPaolo Bonzini out: 1180c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1181c50d8ae3SPaolo Bonzini return sptep; 1182c50d8ae3SPaolo Bonzini } 1183c50d8ae3SPaolo Bonzini 1184c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1185c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1186c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1187c50d8ae3SPaolo Bonzini 1188c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1189c50d8ae3SPaolo Bonzini { 119071f51d2cSMingwei Zhang u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep); 11917fa2a347SSean Christopherson 11927fa2a347SSean Christopherson if (is_shadow_present_pte(old_spte)) 1193c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1194c50d8ae3SPaolo Bonzini } 1195c50d8ae3SPaolo Bonzini 1196c50d8ae3SPaolo Bonzini 1197c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1198c50d8ae3SPaolo Bonzini { 1199c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 120057354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1201c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1202c50d8ae3SPaolo Bonzini return true; 1203c50d8ae3SPaolo Bonzini } 1204c50d8ae3SPaolo Bonzini 1205c50d8ae3SPaolo Bonzini return false; 1206c50d8ae3SPaolo Bonzini } 1207c50d8ae3SPaolo Bonzini 1208c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1209c50d8ae3SPaolo Bonzini { 1210c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 121157354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1212c50d8ae3SPaolo Bonzini 1213c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1214c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1215c50d8ae3SPaolo Bonzini } 1216c50d8ae3SPaolo Bonzini } 1217c50d8ae3SPaolo Bonzini 1218c50d8ae3SPaolo Bonzini /* 1219c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1220c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1221c50d8ae3SPaolo Bonzini * 1222c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1223c50d8ae3SPaolo Bonzini * protection: 1224c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1225c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1226c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1227c50d8ae3SPaolo Bonzini * shadow page. 1228c50d8ae3SPaolo Bonzini * 1229c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1230c50d8ae3SPaolo Bonzini */ 1231c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1232c50d8ae3SPaolo Bonzini { 1233c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1234c50d8ae3SPaolo Bonzini 1235c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1236c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1237c50d8ae3SPaolo Bonzini return false; 1238c50d8ae3SPaolo Bonzini 1239805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1240c50d8ae3SPaolo Bonzini 1241c50d8ae3SPaolo Bonzini if (pt_protect) 12425fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1243c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1244c50d8ae3SPaolo Bonzini 1245c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1246c50d8ae3SPaolo Bonzini } 1247c50d8ae3SPaolo Bonzini 1248c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1249c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1250c50d8ae3SPaolo Bonzini bool pt_protect) 1251c50d8ae3SPaolo Bonzini { 1252c50d8ae3SPaolo Bonzini u64 *sptep; 1253c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1254c50d8ae3SPaolo Bonzini bool flush = false; 1255c50d8ae3SPaolo Bonzini 1256c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1257c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1258c50d8ae3SPaolo Bonzini 1259c50d8ae3SPaolo Bonzini return flush; 1260c50d8ae3SPaolo Bonzini } 1261c50d8ae3SPaolo Bonzini 1262c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1263c50d8ae3SPaolo Bonzini { 1264c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1265c50d8ae3SPaolo Bonzini 1266805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1267c50d8ae3SPaolo Bonzini 1268c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1269c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1270c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1271c50d8ae3SPaolo Bonzini } 1272c50d8ae3SPaolo Bonzini 1273c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1274c50d8ae3SPaolo Bonzini { 1275c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1276c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1277c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1278c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1279c50d8ae3SPaolo Bonzini 1280c50d8ae3SPaolo Bonzini return was_writable; 1281c50d8ae3SPaolo Bonzini } 1282c50d8ae3SPaolo Bonzini 1283c50d8ae3SPaolo Bonzini /* 1284c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1285c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1286c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1287c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1288c50d8ae3SPaolo Bonzini */ 12890a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1290269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1291c50d8ae3SPaolo Bonzini { 1292c50d8ae3SPaolo Bonzini u64 *sptep; 1293c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1294c50d8ae3SPaolo Bonzini bool flush = false; 1295c50d8ae3SPaolo Bonzini 1296c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1297c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1298c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1299c50d8ae3SPaolo Bonzini else 1300c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1301c50d8ae3SPaolo Bonzini 1302c50d8ae3SPaolo Bonzini return flush; 1303c50d8ae3SPaolo Bonzini } 1304c50d8ae3SPaolo Bonzini 1305c50d8ae3SPaolo Bonzini /** 1306c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1307c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1308c50d8ae3SPaolo Bonzini * @slot: slot to protect 1309c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1310c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1311c50d8ae3SPaolo Bonzini * 131289212919SKeqian Zhu * Used when we do not need to care about huge page mappings. 1313c50d8ae3SPaolo Bonzini */ 1314c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1315c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1316c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1317c50d8ae3SPaolo Bonzini { 1318c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1319c50d8ae3SPaolo Bonzini 1320897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1321a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1322a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1323e2209710SBen Gardon 1324e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1325e2209710SBen Gardon return; 1326e2209710SBen Gardon 1327c50d8ae3SPaolo Bonzini while (mask) { 132893e083d4SDavid Matlack rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13293bae0459SSean Christopherson PG_LEVEL_4K, slot); 1330c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1331c50d8ae3SPaolo Bonzini 1332c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1333c50d8ae3SPaolo Bonzini mask &= mask - 1; 1334c50d8ae3SPaolo Bonzini } 1335c50d8ae3SPaolo Bonzini } 1336c50d8ae3SPaolo Bonzini 1337c50d8ae3SPaolo Bonzini /** 1338c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1339c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1340c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1341c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1342c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1343c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1344c50d8ae3SPaolo Bonzini * 1345c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1346c50d8ae3SPaolo Bonzini */ 1347a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1348c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1349c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1350c50d8ae3SPaolo Bonzini { 1351c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1352c50d8ae3SPaolo Bonzini 1353897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1354a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1355a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1356e2209710SBen Gardon 1357e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1358e2209710SBen Gardon return; 1359e2209710SBen Gardon 1360c50d8ae3SPaolo Bonzini while (mask) { 136193e083d4SDavid Matlack rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13623bae0459SSean Christopherson PG_LEVEL_4K, slot); 13630a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1364c50d8ae3SPaolo Bonzini 1365c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1366c50d8ae3SPaolo Bonzini mask &= mask - 1; 1367c50d8ae3SPaolo Bonzini } 1368c50d8ae3SPaolo Bonzini } 1369c50d8ae3SPaolo Bonzini 1370c50d8ae3SPaolo Bonzini /** 1371c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1372c50d8ae3SPaolo Bonzini * PT level pages. 1373c50d8ae3SPaolo Bonzini * 1374c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1375c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1376c50d8ae3SPaolo Bonzini * 137789212919SKeqian Zhu * We need to care about huge page mappings: e.g. during dirty logging we may 137889212919SKeqian Zhu * have such mappings. 1379c50d8ae3SPaolo Bonzini */ 1380c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1381c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1382c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1383c50d8ae3SPaolo Bonzini { 138489212919SKeqian Zhu /* 138589212919SKeqian Zhu * Huge pages are NOT write protected when we start dirty logging in 138689212919SKeqian Zhu * initially-all-set mode; must write protect them here so that they 138789212919SKeqian Zhu * are split to 4K on the first write. 138889212919SKeqian Zhu * 138989212919SKeqian Zhu * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn 139089212919SKeqian Zhu * of memslot has no such restriction, so the range can cross two large 139189212919SKeqian Zhu * pages. 139289212919SKeqian Zhu */ 139389212919SKeqian Zhu if (kvm_dirty_log_manual_protect_and_init_set(kvm)) { 139489212919SKeqian Zhu gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); 139589212919SKeqian Zhu gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); 139689212919SKeqian Zhu 139789212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M); 139889212919SKeqian Zhu 139989212919SKeqian Zhu /* Cross two large pages? */ 140089212919SKeqian Zhu if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) != 140189212919SKeqian Zhu ALIGN(end << PAGE_SHIFT, PMD_SIZE)) 140289212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, end, 140389212919SKeqian Zhu PG_LEVEL_2M); 140489212919SKeqian Zhu } 140589212919SKeqian Zhu 140689212919SKeqian Zhu /* Now handle 4K PTEs. */ 1407a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1408a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1409c50d8ae3SPaolo Bonzini else 1410c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1411c50d8ae3SPaolo Bonzini } 1412c50d8ae3SPaolo Bonzini 1413fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1414fb04a1edSPeter Xu { 14156dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1416fb04a1edSPeter Xu } 1417fb04a1edSPeter Xu 1418c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 14193ad93562SKeqian Zhu struct kvm_memory_slot *slot, u64 gfn, 14203ad93562SKeqian Zhu int min_level) 1421c50d8ae3SPaolo Bonzini { 1422c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1423c50d8ae3SPaolo Bonzini int i; 1424c50d8ae3SPaolo Bonzini bool write_protected = false; 1425c50d8ae3SPaolo Bonzini 1426e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 14273ad93562SKeqian Zhu for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 142893e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, i, slot); 1429c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1430c50d8ae3SPaolo Bonzini } 1431e2209710SBen Gardon } 1432c50d8ae3SPaolo Bonzini 1433897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 143446044f72SBen Gardon write_protected |= 14353ad93562SKeqian Zhu kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level); 143646044f72SBen Gardon 1437c50d8ae3SPaolo Bonzini return write_protected; 1438c50d8ae3SPaolo Bonzini } 1439c50d8ae3SPaolo Bonzini 1440c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1441c50d8ae3SPaolo Bonzini { 1442c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1443c50d8ae3SPaolo Bonzini 1444c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 14453ad93562SKeqian Zhu return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); 1446c50d8ae3SPaolo Bonzini } 1447c50d8ae3SPaolo Bonzini 14480a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1449269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1450c50d8ae3SPaolo Bonzini { 145171f51d2cSMingwei Zhang return pte_list_destroy(kvm, rmap_head); 1452c50d8ae3SPaolo Bonzini } 1453c50d8ae3SPaolo Bonzini 14543039bcc7SSean Christopherson static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1455c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14563039bcc7SSean Christopherson pte_t unused) 1457c50d8ae3SPaolo Bonzini { 14580a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1459c50d8ae3SPaolo Bonzini } 1460c50d8ae3SPaolo Bonzini 14613039bcc7SSean Christopherson static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1462c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14633039bcc7SSean Christopherson pte_t pte) 1464c50d8ae3SPaolo Bonzini { 1465c50d8ae3SPaolo Bonzini u64 *sptep; 1466c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1467c50d8ae3SPaolo Bonzini int need_flush = 0; 1468c50d8ae3SPaolo Bonzini u64 new_spte; 1469c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1470c50d8ae3SPaolo Bonzini 14713039bcc7SSean Christopherson WARN_ON(pte_huge(pte)); 14723039bcc7SSean Christopherson new_pfn = pte_pfn(pte); 1473c50d8ae3SPaolo Bonzini 1474c50d8ae3SPaolo Bonzini restart: 1475c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1476805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1477c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1478c50d8ae3SPaolo Bonzini 1479c50d8ae3SPaolo Bonzini need_flush = 1; 1480c50d8ae3SPaolo Bonzini 14813039bcc7SSean Christopherson if (pte_write(pte)) { 148271f51d2cSMingwei Zhang pte_list_remove(kvm, rmap_head, sptep); 1483c50d8ae3SPaolo Bonzini goto restart; 1484c50d8ae3SPaolo Bonzini } else { 1485cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1486cb3eedabSPaolo Bonzini *sptep, new_pfn); 1487c50d8ae3SPaolo Bonzini 148871f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, sptep); 1489c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1490c50d8ae3SPaolo Bonzini } 1491c50d8ae3SPaolo Bonzini } 1492c50d8ae3SPaolo Bonzini 1493c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1494c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1495c50d8ae3SPaolo Bonzini return 0; 1496c50d8ae3SPaolo Bonzini } 1497c50d8ae3SPaolo Bonzini 1498c50d8ae3SPaolo Bonzini return need_flush; 1499c50d8ae3SPaolo Bonzini } 1500c50d8ae3SPaolo Bonzini 1501c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1502c50d8ae3SPaolo Bonzini /* input fields. */ 1503269e9552SHamza Mahfooz const struct kvm_memory_slot *slot; 1504c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1505c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1506c50d8ae3SPaolo Bonzini int start_level; 1507c50d8ae3SPaolo Bonzini int end_level; 1508c50d8ae3SPaolo Bonzini 1509c50d8ae3SPaolo Bonzini /* output fields. */ 1510c50d8ae3SPaolo Bonzini gfn_t gfn; 1511c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1512c50d8ae3SPaolo Bonzini int level; 1513c50d8ae3SPaolo Bonzini 1514c50d8ae3SPaolo Bonzini /* private field. */ 1515c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1516c50d8ae3SPaolo Bonzini }; 1517c50d8ae3SPaolo Bonzini 1518c50d8ae3SPaolo Bonzini static void 1519c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1520c50d8ae3SPaolo Bonzini { 1521c50d8ae3SPaolo Bonzini iterator->level = level; 1522c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 152393e083d4SDavid Matlack iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot); 152493e083d4SDavid Matlack iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot); 1525c50d8ae3SPaolo Bonzini } 1526c50d8ae3SPaolo Bonzini 1527c50d8ae3SPaolo Bonzini static void 1528c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1529269e9552SHamza Mahfooz const struct kvm_memory_slot *slot, int start_level, 1530c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1531c50d8ae3SPaolo Bonzini { 1532c50d8ae3SPaolo Bonzini iterator->slot = slot; 1533c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1534c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1535c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1536c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1537c50d8ae3SPaolo Bonzini 1538c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1539c50d8ae3SPaolo Bonzini } 1540c50d8ae3SPaolo Bonzini 1541c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1542c50d8ae3SPaolo Bonzini { 1543c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1544c50d8ae3SPaolo Bonzini } 1545c50d8ae3SPaolo Bonzini 1546c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1547c50d8ae3SPaolo Bonzini { 1548c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1549c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1550c50d8ae3SPaolo Bonzini return; 1551c50d8ae3SPaolo Bonzini } 1552c50d8ae3SPaolo Bonzini 1553c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1554c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1555c50d8ae3SPaolo Bonzini return; 1556c50d8ae3SPaolo Bonzini } 1557c50d8ae3SPaolo Bonzini 1558c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1559c50d8ae3SPaolo Bonzini } 1560c50d8ae3SPaolo Bonzini 1561c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1562c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1563c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1564c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1565c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1566c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1567c50d8ae3SPaolo Bonzini 15683039bcc7SSean Christopherson typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1569c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 15703039bcc7SSean Christopherson int level, pte_t pte); 1571c1b91493SSean Christopherson 15723039bcc7SSean Christopherson static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm, 15733039bcc7SSean Christopherson struct kvm_gfn_range *range, 1574c1b91493SSean Christopherson rmap_handler_t handler) 1575c50d8ae3SPaolo Bonzini { 1576c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 15773039bcc7SSean Christopherson bool ret = false; 1578c50d8ae3SPaolo Bonzini 15793039bcc7SSean Christopherson for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 15803039bcc7SSean Christopherson range->start, range->end - 1, &iterator) 15813039bcc7SSean Christopherson ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, 15823039bcc7SSean Christopherson iterator.level, range->pte); 1583c50d8ae3SPaolo Bonzini 1584c50d8ae3SPaolo Bonzini return ret; 1585c50d8ae3SPaolo Bonzini } 1586c50d8ae3SPaolo Bonzini 15873039bcc7SSean Christopherson bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 1588c50d8ae3SPaolo Bonzini { 1589e2209710SBen Gardon bool flush = false; 1590c50d8ae3SPaolo Bonzini 1591e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15923039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp); 1593063afacdSBen Gardon 1594897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15953039bcc7SSean Christopherson flush |= kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush); 1596063afacdSBen Gardon 15973039bcc7SSean Christopherson return flush; 1598c50d8ae3SPaolo Bonzini } 1599c50d8ae3SPaolo Bonzini 16003039bcc7SSean Christopherson bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1601c50d8ae3SPaolo Bonzini { 1602e2209710SBen Gardon bool flush = false; 16031d8dd6b3SBen Gardon 1604e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16053039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp); 16061d8dd6b3SBen Gardon 1607897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16083039bcc7SSean Christopherson flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range); 16091d8dd6b3SBen Gardon 16103039bcc7SSean Christopherson return flush; 1611c50d8ae3SPaolo Bonzini } 1612c50d8ae3SPaolo Bonzini 16133039bcc7SSean Christopherson static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1614c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 16153039bcc7SSean Christopherson pte_t unused) 1616c50d8ae3SPaolo Bonzini { 1617c50d8ae3SPaolo Bonzini u64 *sptep; 16183f649ab7SKees Cook struct rmap_iterator iter; 1619c50d8ae3SPaolo Bonzini int young = 0; 1620c50d8ae3SPaolo Bonzini 1621c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1622c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1623c50d8ae3SPaolo Bonzini 1624c50d8ae3SPaolo Bonzini return young; 1625c50d8ae3SPaolo Bonzini } 1626c50d8ae3SPaolo Bonzini 16273039bcc7SSean Christopherson static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1628c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 16293039bcc7SSean Christopherson int level, pte_t unused) 1630c50d8ae3SPaolo Bonzini { 1631c50d8ae3SPaolo Bonzini u64 *sptep; 1632c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1633c50d8ae3SPaolo Bonzini 1634c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1635c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1636c50d8ae3SPaolo Bonzini return 1; 1637c50d8ae3SPaolo Bonzini return 0; 1638c50d8ae3SPaolo Bonzini } 1639c50d8ae3SPaolo Bonzini 1640c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1641c50d8ae3SPaolo Bonzini 1642c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1643c50d8ae3SPaolo Bonzini { 1644601f8af0SDavid Matlack struct kvm_memory_slot *slot; 1645c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1646c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1647c50d8ae3SPaolo Bonzini 164857354682SSean Christopherson sp = sptep_to_sp(spte); 1649601f8af0SDavid Matlack slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 165093e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 1651c50d8ae3SPaolo Bonzini 16523039bcc7SSean Christopherson kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0)); 1653c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1654c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1655c50d8ae3SPaolo Bonzini } 1656c50d8ae3SPaolo Bonzini 16573039bcc7SSean Christopherson bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1658c50d8ae3SPaolo Bonzini { 1659e2209710SBen Gardon bool young = false; 1660f8e14497SBen Gardon 1661e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16623039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp); 16633039bcc7SSean Christopherson 1664897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16653039bcc7SSean Christopherson young |= kvm_tdp_mmu_age_gfn_range(kvm, range); 1666f8e14497SBen Gardon 1667f8e14497SBen Gardon return young; 1668c50d8ae3SPaolo Bonzini } 1669c50d8ae3SPaolo Bonzini 16703039bcc7SSean Christopherson bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1671c50d8ae3SPaolo Bonzini { 1672e2209710SBen Gardon bool young = false; 1673f8e14497SBen Gardon 1674e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16753039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp); 16763039bcc7SSean Christopherson 1677897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16783039bcc7SSean Christopherson young |= kvm_tdp_mmu_test_age_gfn(kvm, range); 1679f8e14497SBen Gardon 1680f8e14497SBen Gardon return young; 1681c50d8ae3SPaolo Bonzini } 1682c50d8ae3SPaolo Bonzini 1683c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1684c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1685c50d8ae3SPaolo Bonzini { 1686c50d8ae3SPaolo Bonzini u64 *pos; 1687c50d8ae3SPaolo Bonzini u64 *end; 1688c50d8ae3SPaolo Bonzini 1689c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1690c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1691c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1692c50d8ae3SPaolo Bonzini pos, *pos); 1693c50d8ae3SPaolo Bonzini return 0; 1694c50d8ae3SPaolo Bonzini } 1695c50d8ae3SPaolo Bonzini return 1; 1696c50d8ae3SPaolo Bonzini } 1697c50d8ae3SPaolo Bonzini #endif 1698c50d8ae3SPaolo Bonzini 1699c50d8ae3SPaolo Bonzini /* 1700c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1701c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1702c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1703c50d8ae3SPaolo Bonzini * faster 1704c50d8ae3SPaolo Bonzini */ 1705d5aaad6fSSean Christopherson static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr) 1706c50d8ae3SPaolo Bonzini { 1707c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1708c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1709c50d8ae3SPaolo Bonzini } 1710c50d8ae3SPaolo Bonzini 1711c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1712c50d8ae3SPaolo Bonzini { 1713c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1714c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1715c50d8ae3SPaolo Bonzini list_del(&sp->link); 1716c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1717c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1718c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1719c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1720c50d8ae3SPaolo Bonzini } 1721c50d8ae3SPaolo Bonzini 1722c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1723c50d8ae3SPaolo Bonzini { 1724c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1725c50d8ae3SPaolo Bonzini } 1726c50d8ae3SPaolo Bonzini 1727c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1728c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1729c50d8ae3SPaolo Bonzini { 1730c50d8ae3SPaolo Bonzini if (!parent_pte) 1731c50d8ae3SPaolo Bonzini return; 1732c50d8ae3SPaolo Bonzini 1733c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1734c50d8ae3SPaolo Bonzini } 1735c50d8ae3SPaolo Bonzini 1736c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1737c50d8ae3SPaolo Bonzini u64 *parent_pte) 1738c50d8ae3SPaolo Bonzini { 1739c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1740c50d8ae3SPaolo Bonzini } 1741c50d8ae3SPaolo Bonzini 1742c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1743c50d8ae3SPaolo Bonzini u64 *parent_pte) 1744c50d8ae3SPaolo Bonzini { 1745c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1746c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1747c50d8ae3SPaolo Bonzini } 1748c50d8ae3SPaolo Bonzini 1749c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1750c50d8ae3SPaolo Bonzini { 1751c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1752c50d8ae3SPaolo Bonzini 175394ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 175494ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1755c50d8ae3SPaolo Bonzini if (!direct) 175694ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1757c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1758c50d8ae3SPaolo Bonzini 1759c50d8ae3SPaolo Bonzini /* 1760c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1761c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1762c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1763c50d8ae3SPaolo Bonzini */ 1764c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1765c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1766c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1767c50d8ae3SPaolo Bonzini return sp; 1768c50d8ae3SPaolo Bonzini } 1769c50d8ae3SPaolo Bonzini 1770c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1771c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1772c50d8ae3SPaolo Bonzini { 1773c50d8ae3SPaolo Bonzini u64 *sptep; 1774c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1775c50d8ae3SPaolo Bonzini 1776c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1777c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1778c50d8ae3SPaolo Bonzini } 1779c50d8ae3SPaolo Bonzini } 1780c50d8ae3SPaolo Bonzini 1781c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1782c50d8ae3SPaolo Bonzini { 1783c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1784c50d8ae3SPaolo Bonzini unsigned int index; 1785c50d8ae3SPaolo Bonzini 178657354682SSean Christopherson sp = sptep_to_sp(spte); 1787c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1788c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1789c50d8ae3SPaolo Bonzini return; 1790c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1791c50d8ae3SPaolo Bonzini return; 1792c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1793c50d8ae3SPaolo Bonzini } 1794c50d8ae3SPaolo Bonzini 1795c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1796c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1797c50d8ae3SPaolo Bonzini { 1798c3e5e415SLai Jiangshan return -1; 1799c50d8ae3SPaolo Bonzini } 1800c50d8ae3SPaolo Bonzini 1801c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1802c50d8ae3SPaolo Bonzini 1803c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1804c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1805c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1806c50d8ae3SPaolo Bonzini unsigned int idx; 1807c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1808c50d8ae3SPaolo Bonzini unsigned int nr; 1809c50d8ae3SPaolo Bonzini }; 1810c50d8ae3SPaolo Bonzini 1811c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1812c50d8ae3SPaolo Bonzini int idx) 1813c50d8ae3SPaolo Bonzini { 1814c50d8ae3SPaolo Bonzini int i; 1815c50d8ae3SPaolo Bonzini 1816c50d8ae3SPaolo Bonzini if (sp->unsync) 1817c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1818c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1819c50d8ae3SPaolo Bonzini return 0; 1820c50d8ae3SPaolo Bonzini 1821c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1822c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1823c50d8ae3SPaolo Bonzini pvec->nr++; 1824c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1825c50d8ae3SPaolo Bonzini } 1826c50d8ae3SPaolo Bonzini 1827c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1828c50d8ae3SPaolo Bonzini { 1829c50d8ae3SPaolo Bonzini --sp->unsync_children; 1830c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1831c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1832c50d8ae3SPaolo Bonzini } 1833c50d8ae3SPaolo Bonzini 1834c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1835c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1836c50d8ae3SPaolo Bonzini { 1837c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1838c50d8ae3SPaolo Bonzini 1839c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1840c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1841c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1842c50d8ae3SPaolo Bonzini 1843c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1844c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1845c50d8ae3SPaolo Bonzini continue; 1846c50d8ae3SPaolo Bonzini } 1847c50d8ae3SPaolo Bonzini 1848e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1849c50d8ae3SPaolo Bonzini 1850c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1851c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1852c50d8ae3SPaolo Bonzini return -ENOSPC; 1853c50d8ae3SPaolo Bonzini 1854c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1855c50d8ae3SPaolo Bonzini if (!ret) { 1856c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1857c50d8ae3SPaolo Bonzini continue; 1858c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1859c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1860c50d8ae3SPaolo Bonzini } else 1861c50d8ae3SPaolo Bonzini return ret; 1862c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1863c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1864c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1865c50d8ae3SPaolo Bonzini return -ENOSPC; 1866c50d8ae3SPaolo Bonzini } else 1867c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1868c50d8ae3SPaolo Bonzini } 1869c50d8ae3SPaolo Bonzini 1870c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1871c50d8ae3SPaolo Bonzini } 1872c50d8ae3SPaolo Bonzini 1873c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1874c50d8ae3SPaolo Bonzini 1875c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1876c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1877c50d8ae3SPaolo Bonzini { 1878c50d8ae3SPaolo Bonzini pvec->nr = 0; 1879c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1880c50d8ae3SPaolo Bonzini return 0; 1881c50d8ae3SPaolo Bonzini 1882c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1883c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1884c50d8ae3SPaolo Bonzini } 1885c50d8ae3SPaolo Bonzini 1886c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1887c50d8ae3SPaolo Bonzini { 1888c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1889c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1890c50d8ae3SPaolo Bonzini sp->unsync = 0; 1891c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1892c50d8ae3SPaolo Bonzini } 1893c50d8ae3SPaolo Bonzini 1894c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1895c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1896c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1897c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1898c50d8ae3SPaolo Bonzini 1899ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1900ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1901c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1902c50d8ae3SPaolo Bonzini } else 1903c50d8ae3SPaolo Bonzini 1904c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1905ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1906ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1907c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1908c50d8ae3SPaolo Bonzini 1909479a1efcSSean Christopherson static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1910c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1911c50d8ae3SPaolo Bonzini { 1912c3e5e415SLai Jiangshan int ret = vcpu->arch.mmu->sync_page(vcpu, sp); 1913c3e5e415SLai Jiangshan 1914c3e5e415SLai Jiangshan if (ret < 0) { 1915c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1916c50d8ae3SPaolo Bonzini return false; 1917c50d8ae3SPaolo Bonzini } 1918c50d8ae3SPaolo Bonzini 1919c3e5e415SLai Jiangshan return !!ret; 1920c50d8ae3SPaolo Bonzini } 1921c50d8ae3SPaolo Bonzini 1922c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1923c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1924c50d8ae3SPaolo Bonzini bool remote_flush) 1925c50d8ae3SPaolo Bonzini { 1926c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1927c50d8ae3SPaolo Bonzini return false; 1928c50d8ae3SPaolo Bonzini 1929c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1930c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1931c50d8ae3SPaolo Bonzini else 1932c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1933c50d8ae3SPaolo Bonzini return true; 1934c50d8ae3SPaolo Bonzini } 1935c50d8ae3SPaolo Bonzini 1936c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1937c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1938c50d8ae3SPaolo Bonzini #else 1939c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1940c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1941c50d8ae3SPaolo Bonzini #endif 1942c50d8ae3SPaolo Bonzini 1943c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1944c50d8ae3SPaolo Bonzini { 1945c50d8ae3SPaolo Bonzini return sp->role.invalid || 1946c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1947c50d8ae3SPaolo Bonzini } 1948c50d8ae3SPaolo Bonzini 1949c50d8ae3SPaolo Bonzini struct mmu_page_path { 1950c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1951c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1952c50d8ae3SPaolo Bonzini }; 1953c50d8ae3SPaolo Bonzini 1954c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1955c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1956c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1957c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1958c50d8ae3SPaolo Bonzini 1959c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1960c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1961c50d8ae3SPaolo Bonzini int i) 1962c50d8ae3SPaolo Bonzini { 1963c50d8ae3SPaolo Bonzini int n; 1964c50d8ae3SPaolo Bonzini 1965c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1966c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1967c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1968c50d8ae3SPaolo Bonzini int level = sp->role.level; 1969c50d8ae3SPaolo Bonzini 1970c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 19713bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1972c50d8ae3SPaolo Bonzini break; 1973c50d8ae3SPaolo Bonzini 1974c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1975c50d8ae3SPaolo Bonzini } 1976c50d8ae3SPaolo Bonzini 1977c50d8ae3SPaolo Bonzini return n; 1978c50d8ae3SPaolo Bonzini } 1979c50d8ae3SPaolo Bonzini 1980c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1981c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1982c50d8ae3SPaolo Bonzini { 1983c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1984c50d8ae3SPaolo Bonzini int level; 1985c50d8ae3SPaolo Bonzini 1986c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1987c50d8ae3SPaolo Bonzini return 0; 1988c50d8ae3SPaolo Bonzini 1989c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1990c50d8ae3SPaolo Bonzini 1991c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1992c50d8ae3SPaolo Bonzini level = sp->role.level; 19933bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1994c50d8ae3SPaolo Bonzini 1995c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1996c50d8ae3SPaolo Bonzini 1997c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1998c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1999c50d8ae3SPaolo Bonzini */ 2000c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 2001c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 2002c50d8ae3SPaolo Bonzini } 2003c50d8ae3SPaolo Bonzini 2004c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 2005c50d8ae3SPaolo Bonzini { 2006c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2007c50d8ae3SPaolo Bonzini unsigned int level = 0; 2008c50d8ae3SPaolo Bonzini 2009c50d8ae3SPaolo Bonzini do { 2010c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 2011c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 2012c50d8ae3SPaolo Bonzini if (!sp) 2013c50d8ae3SPaolo Bonzini return; 2014c50d8ae3SPaolo Bonzini 2015c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 2016c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 2017c50d8ae3SPaolo Bonzini level++; 2018c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 2019c50d8ae3SPaolo Bonzini } 2020c50d8ae3SPaolo Bonzini 202165855ed8SLai Jiangshan static int mmu_sync_children(struct kvm_vcpu *vcpu, 202265855ed8SLai Jiangshan struct kvm_mmu_page *parent, bool can_yield) 2023c50d8ae3SPaolo Bonzini { 2024c50d8ae3SPaolo Bonzini int i; 2025c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2026c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2027c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2028c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2029c3e5e415SLai Jiangshan bool flush = false; 2030c50d8ae3SPaolo Bonzini 2031c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2032c50d8ae3SPaolo Bonzini bool protected = false; 2033c50d8ae3SPaolo Bonzini 2034c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 2035c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 2036c50d8ae3SPaolo Bonzini 2037c50d8ae3SPaolo Bonzini if (protected) { 20385591c069SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true); 2039c3e5e415SLai Jiangshan flush = false; 2040c50d8ae3SPaolo Bonzini } 2041c50d8ae3SPaolo Bonzini 2042c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2043479a1efcSSean Christopherson kvm_unlink_unsync_page(vcpu->kvm, sp); 2044c3e5e415SLai Jiangshan flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2045c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2046c50d8ae3SPaolo Bonzini } 2047531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 2048c3e5e415SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 204965855ed8SLai Jiangshan if (!can_yield) { 205065855ed8SLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 205165855ed8SLai Jiangshan return -EINTR; 205265855ed8SLai Jiangshan } 205365855ed8SLai Jiangshan 2054531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 2055c3e5e415SLai Jiangshan flush = false; 2056c50d8ae3SPaolo Bonzini } 2057c50d8ae3SPaolo Bonzini } 2058c50d8ae3SPaolo Bonzini 2059c3e5e415SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 206065855ed8SLai Jiangshan return 0; 2061c50d8ae3SPaolo Bonzini } 2062c50d8ae3SPaolo Bonzini 2063c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2064c50d8ae3SPaolo Bonzini { 2065c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2066c50d8ae3SPaolo Bonzini } 2067c50d8ae3SPaolo Bonzini 2068c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2069c50d8ae3SPaolo Bonzini { 207057354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2071c50d8ae3SPaolo Bonzini } 2072c50d8ae3SPaolo Bonzini 2073c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2074c50d8ae3SPaolo Bonzini gfn_t gfn, 2075c50d8ae3SPaolo Bonzini gva_t gaddr, 2076c50d8ae3SPaolo Bonzini unsigned level, 2077c50d8ae3SPaolo Bonzini int direct, 20780a2b64c5SBen Gardon unsigned int access) 2079c50d8ae3SPaolo Bonzini { 2080fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2081c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2082ac101b7cSSean Christopherson struct hlist_head *sp_list; 2083c50d8ae3SPaolo Bonzini unsigned quadrant; 2084c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2085c50d8ae3SPaolo Bonzini int collisions = 0; 2086c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2087c50d8ae3SPaolo Bonzini 2088c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2089c50d8ae3SPaolo Bonzini role.level = level; 2090c50d8ae3SPaolo Bonzini role.direct = direct; 2091c50d8ae3SPaolo Bonzini if (role.direct) 2092c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2093c50d8ae3SPaolo Bonzini role.access = access; 2094fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2095c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2096c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2097c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2098c50d8ae3SPaolo Bonzini } 2099ac101b7cSSean Christopherson 2100ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2101ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2102c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2103c50d8ae3SPaolo Bonzini collisions++; 2104c50d8ae3SPaolo Bonzini continue; 2105c50d8ae3SPaolo Bonzini } 2106c50d8ae3SPaolo Bonzini 2107ddc16abbSSean Christopherson if (sp->role.word != role.word) { 2108ddc16abbSSean Christopherson /* 2109ddc16abbSSean Christopherson * If the guest is creating an upper-level page, zap 2110ddc16abbSSean Christopherson * unsync pages for the same gfn. While it's possible 2111ddc16abbSSean Christopherson * the guest is using recursive page tables, in all 2112ddc16abbSSean Christopherson * likelihood the guest has stopped using the unsync 2113ddc16abbSSean Christopherson * page and is installing a completely unrelated page. 2114ddc16abbSSean Christopherson * Unsync pages must not be left as is, because the new 2115ddc16abbSSean Christopherson * upper-level page will be write-protected. 2116ddc16abbSSean Christopherson */ 2117ddc16abbSSean Christopherson if (level > PG_LEVEL_4K && sp->unsync) 2118ddc16abbSSean Christopherson kvm_mmu_prepare_zap_page(vcpu->kvm, sp, 2119ddc16abbSSean Christopherson &invalid_list); 2120c50d8ae3SPaolo Bonzini continue; 2121ddc16abbSSean Christopherson } 2122c50d8ae3SPaolo Bonzini 2123fb58a9c3SSean Christopherson if (direct_mmu) 2124fb58a9c3SSean Christopherson goto trace_get_page; 2125fb58a9c3SSean Christopherson 2126c50d8ae3SPaolo Bonzini if (sp->unsync) { 212707dc4f35SSean Christopherson /* 2128479a1efcSSean Christopherson * The page is good, but is stale. kvm_sync_page does 212907dc4f35SSean Christopherson * get the latest guest state, but (unlike mmu_unsync_children) 213007dc4f35SSean Christopherson * it doesn't write-protect the page or mark it synchronized! 213107dc4f35SSean Christopherson * This way the validity of the mapping is ensured, but the 213207dc4f35SSean Christopherson * overhead of write protection is not incurred until the 213307dc4f35SSean Christopherson * guest invalidates the TLB mapping. This allows multiple 213407dc4f35SSean Christopherson * SPs for a single gfn to be unsync. 213507dc4f35SSean Christopherson * 213607dc4f35SSean Christopherson * If the sync fails, the page is zapped. If so, break 213707dc4f35SSean Christopherson * in order to rebuild it. 2138c50d8ae3SPaolo Bonzini */ 2139479a1efcSSean Christopherson if (!kvm_sync_page(vcpu, sp, &invalid_list)) 2140c50d8ae3SPaolo Bonzini break; 2141c50d8ae3SPaolo Bonzini 2142c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 2143c3e5e415SLai Jiangshan kvm_flush_remote_tlbs(vcpu->kvm); 2144c50d8ae3SPaolo Bonzini } 2145c50d8ae3SPaolo Bonzini 2146c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2147fb58a9c3SSean Christopherson 2148fb58a9c3SSean Christopherson trace_get_page: 2149c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2150c50d8ae3SPaolo Bonzini goto out; 2151c50d8ae3SPaolo Bonzini } 2152c50d8ae3SPaolo Bonzini 2153c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2154c50d8ae3SPaolo Bonzini 2155c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2156c50d8ae3SPaolo Bonzini 2157c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2158c50d8ae3SPaolo Bonzini sp->role = role; 2159ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2160c50d8ae3SPaolo Bonzini if (!direct) { 2161c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 21623bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2163c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2164c50d8ae3SPaolo Bonzini } 2165c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2166c50d8ae3SPaolo Bonzini out: 2167ddc16abbSSean Christopherson kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 2168ddc16abbSSean Christopherson 2169c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2170c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2171c50d8ae3SPaolo Bonzini return sp; 2172c50d8ae3SPaolo Bonzini } 2173c50d8ae3SPaolo Bonzini 2174c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2175c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2176c50d8ae3SPaolo Bonzini u64 addr) 2177c50d8ae3SPaolo Bonzini { 2178c50d8ae3SPaolo Bonzini iterator->addr = addr; 2179c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2180c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2181c50d8ae3SPaolo Bonzini 2182c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2183c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2184c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2185c50d8ae3SPaolo Bonzini --iterator->level; 2186c50d8ae3SPaolo Bonzini 2187c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2188c50d8ae3SPaolo Bonzini /* 2189c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2190c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2191c50d8ae3SPaolo Bonzini */ 2192c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2193c50d8ae3SPaolo Bonzini 2194c50d8ae3SPaolo Bonzini iterator->shadow_addr 2195c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2196c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2197c50d8ae3SPaolo Bonzini --iterator->level; 2198c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2199c50d8ae3SPaolo Bonzini iterator->level = 0; 2200c50d8ae3SPaolo Bonzini } 2201c50d8ae3SPaolo Bonzini } 2202c50d8ae3SPaolo Bonzini 2203c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2204c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2205c50d8ae3SPaolo Bonzini { 2206c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2207c50d8ae3SPaolo Bonzini addr); 2208c50d8ae3SPaolo Bonzini } 2209c50d8ae3SPaolo Bonzini 2210c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2211c50d8ae3SPaolo Bonzini { 22123bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2213c50d8ae3SPaolo Bonzini return false; 2214c50d8ae3SPaolo Bonzini 2215c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2216c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2217c50d8ae3SPaolo Bonzini return true; 2218c50d8ae3SPaolo Bonzini } 2219c50d8ae3SPaolo Bonzini 2220c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2221c50d8ae3SPaolo Bonzini u64 spte) 2222c50d8ae3SPaolo Bonzini { 22233e44dce4SLai Jiangshan if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) { 2224c50d8ae3SPaolo Bonzini iterator->level = 0; 2225c50d8ae3SPaolo Bonzini return; 2226c50d8ae3SPaolo Bonzini } 2227c50d8ae3SPaolo Bonzini 2228c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2229c50d8ae3SPaolo Bonzini --iterator->level; 2230c50d8ae3SPaolo Bonzini } 2231c50d8ae3SPaolo Bonzini 2232c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2233c50d8ae3SPaolo Bonzini { 2234c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2235c50d8ae3SPaolo Bonzini } 2236c50d8ae3SPaolo Bonzini 2237c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2238c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2239c50d8ae3SPaolo Bonzini { 2240c50d8ae3SPaolo Bonzini u64 spte; 2241c50d8ae3SPaolo Bonzini 2242c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2243c50d8ae3SPaolo Bonzini 2244cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2245c50d8ae3SPaolo Bonzini 2246c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2247c50d8ae3SPaolo Bonzini 2248c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2249c50d8ae3SPaolo Bonzini 2250c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2251c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2252c50d8ae3SPaolo Bonzini } 2253c50d8ae3SPaolo Bonzini 2254c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2255c50d8ae3SPaolo Bonzini unsigned direct_access) 2256c50d8ae3SPaolo Bonzini { 2257c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2258c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2259c50d8ae3SPaolo Bonzini 2260c50d8ae3SPaolo Bonzini /* 2261c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2262c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2263c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2264c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2265c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2266c50d8ae3SPaolo Bonzini */ 2267e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2268c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2269c50d8ae3SPaolo Bonzini return; 2270c50d8ae3SPaolo Bonzini 2271c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2272c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2273c50d8ae3SPaolo Bonzini } 2274c50d8ae3SPaolo Bonzini } 2275c50d8ae3SPaolo Bonzini 22762de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 22772de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 22782de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2279c50d8ae3SPaolo Bonzini { 2280c50d8ae3SPaolo Bonzini u64 pte; 2281c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2282c50d8ae3SPaolo Bonzini 2283c50d8ae3SPaolo Bonzini pte = *spte; 2284c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2285c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2286c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2287c50d8ae3SPaolo Bonzini } else { 2288e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2289c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 22902de4085cSBen Gardon 22912de4085cSBen Gardon /* 22922de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 22932de4085cSBen Gardon * unlikely to be used again in the near future. This 22942de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22952de4085cSBen Gardon */ 22962de4085cSBen Gardon if (tdp_enabled && invalid_list && 22972de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22982de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22992de4085cSBen Gardon invalid_list); 2300c50d8ae3SPaolo Bonzini } 2301ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2302c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2303ace569e0SSean Christopherson } 23042de4085cSBen Gardon return 0; 2305c50d8ae3SPaolo Bonzini } 2306c50d8ae3SPaolo Bonzini 23072de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 23082de4085cSBen Gardon struct kvm_mmu_page *sp, 23092de4085cSBen Gardon struct list_head *invalid_list) 2310c50d8ae3SPaolo Bonzini { 23112de4085cSBen Gardon int zapped = 0; 2312c50d8ae3SPaolo Bonzini unsigned i; 2313c50d8ae3SPaolo Bonzini 2314c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 23152de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 23162de4085cSBen Gardon 23172de4085cSBen Gardon return zapped; 2318c50d8ae3SPaolo Bonzini } 2319c50d8ae3SPaolo Bonzini 2320c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2321c50d8ae3SPaolo Bonzini { 2322c50d8ae3SPaolo Bonzini u64 *sptep; 2323c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2324c50d8ae3SPaolo Bonzini 2325c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2326c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2327c50d8ae3SPaolo Bonzini } 2328c50d8ae3SPaolo Bonzini 2329c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2330c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2331c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2332c50d8ae3SPaolo Bonzini { 2333c50d8ae3SPaolo Bonzini int i, zapped = 0; 2334c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2335c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2336c50d8ae3SPaolo Bonzini 23373bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2338c50d8ae3SPaolo Bonzini return 0; 2339c50d8ae3SPaolo Bonzini 2340c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2341c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2342c50d8ae3SPaolo Bonzini 2343c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2344c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2345c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2346c50d8ae3SPaolo Bonzini zapped++; 2347c50d8ae3SPaolo Bonzini } 2348c50d8ae3SPaolo Bonzini } 2349c50d8ae3SPaolo Bonzini 2350c50d8ae3SPaolo Bonzini return zapped; 2351c50d8ae3SPaolo Bonzini } 2352c50d8ae3SPaolo Bonzini 2353c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2354c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2355c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2356c50d8ae3SPaolo Bonzini int *nr_zapped) 2357c50d8ae3SPaolo Bonzini { 2358c50d8ae3SPaolo Bonzini bool list_unstable; 2359c50d8ae3SPaolo Bonzini 2360c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2361c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2362c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 23632de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2364c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2365c50d8ae3SPaolo Bonzini 2366c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2367c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2368c50d8ae3SPaolo Bonzini 2369c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2370c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2371c50d8ae3SPaolo Bonzini 2372c50d8ae3SPaolo Bonzini if (sp->unsync) 2373c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2374c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2375c50d8ae3SPaolo Bonzini /* Count self */ 2376c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2377f95eec9bSSean Christopherson 2378f95eec9bSSean Christopherson /* 2379f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2380f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2381f95eec9bSSean Christopherson * !sp->root_count. 2382f95eec9bSSean Christopherson */ 2383f95eec9bSSean Christopherson if (sp->role.invalid) 2384f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2385f95eec9bSSean Christopherson else 2386c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2387c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2388c50d8ae3SPaolo Bonzini } else { 2389f95eec9bSSean Christopherson /* 2390f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2391f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2392f95eec9bSSean Christopherson */ 2393f95eec9bSSean Christopherson list_del(&sp->link); 2394c50d8ae3SPaolo Bonzini 2395c50d8ae3SPaolo Bonzini /* 2396c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2397c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2398c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2399c50d8ae3SPaolo Bonzini */ 2400c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2401c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2402c50d8ae3SPaolo Bonzini } 2403c50d8ae3SPaolo Bonzini 2404c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2405c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2406c50d8ae3SPaolo Bonzini 2407c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2408c50d8ae3SPaolo Bonzini return list_unstable; 2409c50d8ae3SPaolo Bonzini } 2410c50d8ae3SPaolo Bonzini 2411c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2412c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2413c50d8ae3SPaolo Bonzini { 2414c50d8ae3SPaolo Bonzini int nr_zapped; 2415c50d8ae3SPaolo Bonzini 2416c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2417c50d8ae3SPaolo Bonzini return nr_zapped; 2418c50d8ae3SPaolo Bonzini } 2419c50d8ae3SPaolo Bonzini 2420c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2421c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2422c50d8ae3SPaolo Bonzini { 2423c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2424c50d8ae3SPaolo Bonzini 2425c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2426c50d8ae3SPaolo Bonzini return; 2427c50d8ae3SPaolo Bonzini 2428c50d8ae3SPaolo Bonzini /* 2429c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2430c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2431c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2432c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2433c50d8ae3SPaolo Bonzini * 2434c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2435c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2436c50d8ae3SPaolo Bonzini */ 2437c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2438c50d8ae3SPaolo Bonzini 2439c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2440c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2441c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2442c50d8ae3SPaolo Bonzini } 2443c50d8ae3SPaolo Bonzini } 2444c50d8ae3SPaolo Bonzini 24456b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 24466b82ef2cSSean Christopherson unsigned long nr_to_zap) 2447c50d8ae3SPaolo Bonzini { 24486b82ef2cSSean Christopherson unsigned long total_zapped = 0; 24496b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2450ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 24516b82ef2cSSean Christopherson bool unstable; 24526b82ef2cSSean Christopherson int nr_zapped; 2453c50d8ae3SPaolo Bonzini 2454c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2455ba7888ddSSean Christopherson return 0; 2456c50d8ae3SPaolo Bonzini 24576b82ef2cSSean Christopherson restart: 24588fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 24596b82ef2cSSean Christopherson /* 24606b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 24616b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 24626b82ef2cSSean Christopherson */ 24636b82ef2cSSean Christopherson if (sp->root_count) 24646b82ef2cSSean Christopherson continue; 24656b82ef2cSSean Christopherson 24666b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 24676b82ef2cSSean Christopherson &nr_zapped); 24686b82ef2cSSean Christopherson total_zapped += nr_zapped; 24696b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2470ba7888ddSSean Christopherson break; 2471ba7888ddSSean Christopherson 24726b82ef2cSSean Christopherson if (unstable) 24736b82ef2cSSean Christopherson goto restart; 2474ba7888ddSSean Christopherson } 24756b82ef2cSSean Christopherson 24766b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 24776b82ef2cSSean Christopherson 24786b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 24796b82ef2cSSean Christopherson return total_zapped; 24806b82ef2cSSean Christopherson } 24816b82ef2cSSean Christopherson 2482afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2483afe8d7e6SSean Christopherson { 2484afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2485afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2486afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2487afe8d7e6SSean Christopherson 2488afe8d7e6SSean Christopherson return 0; 2489c50d8ae3SPaolo Bonzini } 2490c50d8ae3SPaolo Bonzini 2491ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2492ba7888ddSSean Christopherson { 24936b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2494ba7888ddSSean Christopherson 24956b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2496ba7888ddSSean Christopherson return 0; 2497ba7888ddSSean Christopherson 24986b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2499ba7888ddSSean Christopherson 25006e6ec584SSean Christopherson /* 25016e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 25026e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 25036e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 25046e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 2505c4342633SIngo Molnar * being too aggressive may unnecessarily kill the guest, and getting an 25066e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 25076e6ec584SSean Christopherson * page fault paths. 25086e6ec584SSean Christopherson */ 2509ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2510ba7888ddSSean Christopherson return -ENOSPC; 2511ba7888ddSSean Christopherson return 0; 2512ba7888ddSSean Christopherson } 2513ba7888ddSSean Christopherson 2514c50d8ae3SPaolo Bonzini /* 2515c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2516c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2517c50d8ae3SPaolo Bonzini */ 2518c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2519c50d8ae3SPaolo Bonzini { 2520531810caSBen Gardon write_lock(&kvm->mmu_lock); 2521c50d8ae3SPaolo Bonzini 2522c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 25236b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 25246b82ef2cSSean Christopherson goal_nr_mmu_pages); 2525c50d8ae3SPaolo Bonzini 2526c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2527c50d8ae3SPaolo Bonzini } 2528c50d8ae3SPaolo Bonzini 2529c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2530c50d8ae3SPaolo Bonzini 2531531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2532c50d8ae3SPaolo Bonzini } 2533c50d8ae3SPaolo Bonzini 2534c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2535c50d8ae3SPaolo Bonzini { 2536c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2537c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2538c50d8ae3SPaolo Bonzini int r; 2539c50d8ae3SPaolo Bonzini 2540c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2541c50d8ae3SPaolo Bonzini r = 0; 2542531810caSBen Gardon write_lock(&kvm->mmu_lock); 2543c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2544c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2545c50d8ae3SPaolo Bonzini sp->role.word); 2546c50d8ae3SPaolo Bonzini r = 1; 2547c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2548c50d8ae3SPaolo Bonzini } 2549c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2550531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2551c50d8ae3SPaolo Bonzini 2552c50d8ae3SPaolo Bonzini return r; 2553c50d8ae3SPaolo Bonzini } 255496ad91aeSSean Christopherson 255596ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 255696ad91aeSSean Christopherson { 255796ad91aeSSean Christopherson gpa_t gpa; 255896ad91aeSSean Christopherson int r; 255996ad91aeSSean Christopherson 256096ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 256196ad91aeSSean Christopherson return 0; 256296ad91aeSSean Christopherson 256396ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 256496ad91aeSSean Christopherson 256596ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 256696ad91aeSSean Christopherson 256796ad91aeSSean Christopherson return r; 256896ad91aeSSean Christopherson } 2569c50d8ae3SPaolo Bonzini 2570c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2571c50d8ae3SPaolo Bonzini { 2572c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2573c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2574c50d8ae3SPaolo Bonzini sp->unsync = 1; 2575c50d8ae3SPaolo Bonzini 2576c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2577c50d8ae3SPaolo Bonzini } 2578c50d8ae3SPaolo Bonzini 25790337f585SSean Christopherson /* 25800337f585SSean Christopherson * Attempt to unsync any shadow pages that can be reached by the specified gfn, 25810337f585SSean Christopherson * KVM is creating a writable mapping for said gfn. Returns 0 if all pages 25820337f585SSean Christopherson * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must 25830337f585SSean Christopherson * be write-protected. 25840337f585SSean Christopherson */ 2585f1c4a88cSLai Jiangshan int mmu_try_to_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, bool can_unsync, 2586f1c4a88cSLai Jiangshan bool speculative) 2587c50d8ae3SPaolo Bonzini { 2588c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2589ce25681dSSean Christopherson bool locked = false; 2590c50d8ae3SPaolo Bonzini 25910337f585SSean Christopherson /* 25920337f585SSean Christopherson * Force write-protection if the page is being tracked. Note, the page 25930337f585SSean Christopherson * track machinery is used to write-protect upper-level shadow pages, 25940337f585SSean Christopherson * i.e. this guards the role.level == 4K assertion below! 25950337f585SSean Christopherson */ 2596c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 25970337f585SSean Christopherson return -EPERM; 2598c50d8ae3SPaolo Bonzini 25990337f585SSean Christopherson /* 26000337f585SSean Christopherson * The page is not write-tracked, mark existing shadow pages unsync 26010337f585SSean Christopherson * unless KVM is synchronizing an unsync SP (can_unsync = false). In 26020337f585SSean Christopherson * that case, KVM must complete emulation of the guest TLB flush before 26030337f585SSean Christopherson * allowing shadow pages to become unsync (writable by the guest). 26040337f585SSean Christopherson */ 2605c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2606c50d8ae3SPaolo Bonzini if (!can_unsync) 26070337f585SSean Christopherson return -EPERM; 2608c50d8ae3SPaolo Bonzini 2609c50d8ae3SPaolo Bonzini if (sp->unsync) 2610c50d8ae3SPaolo Bonzini continue; 2611c50d8ae3SPaolo Bonzini 2612f1c4a88cSLai Jiangshan if (speculative) 2613f1c4a88cSLai Jiangshan return -EEXIST; 2614f1c4a88cSLai Jiangshan 2615ce25681dSSean Christopherson /* 2616ce25681dSSean Christopherson * TDP MMU page faults require an additional spinlock as they 2617ce25681dSSean Christopherson * run with mmu_lock held for read, not write, and the unsync 2618ce25681dSSean Christopherson * logic is not thread safe. Take the spinklock regardless of 2619ce25681dSSean Christopherson * the MMU type to avoid extra conditionals/parameters, there's 2620ce25681dSSean Christopherson * no meaningful penalty if mmu_lock is held for write. 2621ce25681dSSean Christopherson */ 2622ce25681dSSean Christopherson if (!locked) { 2623ce25681dSSean Christopherson locked = true; 2624ce25681dSSean Christopherson spin_lock(&vcpu->kvm->arch.mmu_unsync_pages_lock); 2625ce25681dSSean Christopherson 2626ce25681dSSean Christopherson /* 2627ce25681dSSean Christopherson * Recheck after taking the spinlock, a different vCPU 2628ce25681dSSean Christopherson * may have since marked the page unsync. A false 2629ce25681dSSean Christopherson * positive on the unprotected check above is not 2630ce25681dSSean Christopherson * possible as clearing sp->unsync _must_ hold mmu_lock 2631ce25681dSSean Christopherson * for write, i.e. unsync cannot transition from 0->1 2632ce25681dSSean Christopherson * while this CPU holds mmu_lock for read (or write). 2633ce25681dSSean Christopherson */ 2634ce25681dSSean Christopherson if (READ_ONCE(sp->unsync)) 2635ce25681dSSean Christopherson continue; 2636ce25681dSSean Christopherson } 2637ce25681dSSean Christopherson 26383bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2639c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2640c50d8ae3SPaolo Bonzini } 2641ce25681dSSean Christopherson if (locked) 2642ce25681dSSean Christopherson spin_unlock(&vcpu->kvm->arch.mmu_unsync_pages_lock); 2643c50d8ae3SPaolo Bonzini 2644c50d8ae3SPaolo Bonzini /* 2645c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2646c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2647c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2648c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2649c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2650c50d8ae3SPaolo Bonzini * following could happen: 2651c50d8ae3SPaolo Bonzini * 2652c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2653c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2654c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2655c50d8ae3SPaolo Bonzini * to be writable 2656c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2657c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2658c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2659c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2660c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2661c50d8ae3SPaolo Bonzini * fault. 2662c50d8ae3SPaolo Bonzini * 2663c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2664c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2665c50d8ae3SPaolo Bonzini * 26660337f585SSean Christopherson * 2.3 Walking of unsync pages sees sp->unsync is 26670337f585SSean Christopherson * false and skips the page. 2668c50d8ae3SPaolo Bonzini * 2669c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2670c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2671c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2672c50d8ae3SPaolo Bonzini * gets used. 2673c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2674c50d8ae3SPaolo Bonzini * as unsync 2675c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2676c50d8ae3SPaolo Bonzini * 2677c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2678c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2679c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2680c50d8ae3SPaolo Bonzini */ 2681c50d8ae3SPaolo Bonzini smp_wmb(); 2682c50d8ae3SPaolo Bonzini 26830337f585SSean Christopherson return 0; 2684c50d8ae3SPaolo Bonzini } 2685c50d8ae3SPaolo Bonzini 2686799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2687799a4190SBen Gardon unsigned int pte_access, int level, 2688799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 2689799a4190SBen Gardon bool can_unsync, bool host_writable) 2690799a4190SBen Gardon { 2691799a4190SBen Gardon u64 spte; 2692799a4190SBen Gardon struct kvm_mmu_page *sp; 2693799a4190SBen Gardon int ret; 2694799a4190SBen Gardon 2695799a4190SBen Gardon sp = sptep_to_sp(sptep); 2696799a4190SBen Gardon 2697799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 2698799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 2699799a4190SBen Gardon 2700799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 2701799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 2702799a4190SBen Gardon 270312703759SSean Christopherson if (*sptep == spte) 270412703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 270512703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 2706c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 2707c50d8ae3SPaolo Bonzini return ret; 2708c50d8ae3SPaolo Bonzini } 2709c50d8ae3SPaolo Bonzini 27100a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2711e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 27120a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 27130a2b64c5SBen Gardon bool host_writable) 2714c50d8ae3SPaolo Bonzini { 2715c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2716c50d8ae3SPaolo Bonzini int rmap_count; 2717c50d8ae3SPaolo Bonzini int set_spte_ret; 2718c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2719c50d8ae3SPaolo Bonzini bool flush = false; 2720c50d8ae3SPaolo Bonzini 2721c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2722c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2723c50d8ae3SPaolo Bonzini 2724a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2725a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2726a54aa15cSSean Christopherson return RET_PF_EMULATE; 2727a54aa15cSSean Christopherson } 2728a54aa15cSSean Christopherson 2729c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2730c50d8ae3SPaolo Bonzini /* 2731c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2732c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2733c50d8ae3SPaolo Bonzini */ 27343bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2735c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2736c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2737c50d8ae3SPaolo Bonzini 2738e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2739c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2740c50d8ae3SPaolo Bonzini flush = true; 2741c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2742c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2743c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2744c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2745c50d8ae3SPaolo Bonzini flush = true; 2746c50d8ae3SPaolo Bonzini } else 2747c50d8ae3SPaolo Bonzini was_rmapped = 1; 2748c50d8ae3SPaolo Bonzini } 2749c50d8ae3SPaolo Bonzini 2750c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 2751c50d8ae3SPaolo Bonzini speculative, true, host_writable); 2752c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 2753c50d8ae3SPaolo Bonzini if (write_fault) 2754c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 2755c50d8ae3SPaolo Bonzini } 2756c50d8ae3SPaolo Bonzini 2757c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 2758c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2759c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2760c50d8ae3SPaolo Bonzini 276112703759SSean Christopherson /* 276212703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 276312703759SSean Christopherson * are identical, and emulation is not required. 276412703759SSean Christopherson */ 276512703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 276612703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 276712703759SSean Christopherson return RET_PF_SPURIOUS; 276812703759SSean Christopherson } 276912703759SSean Christopherson 2770c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2771c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2772c50d8ae3SPaolo Bonzini 2773c50d8ae3SPaolo Bonzini if (!was_rmapped) { 277471f51d2cSMingwei Zhang kvm_update_page_stats(vcpu->kvm, level, 1); 2775c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 2776c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 2777c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 2778c50d8ae3SPaolo Bonzini } 2779c50d8ae3SPaolo Bonzini 2780c50d8ae3SPaolo Bonzini return ret; 2781c50d8ae3SPaolo Bonzini } 2782c50d8ae3SPaolo Bonzini 2783c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 2784c50d8ae3SPaolo Bonzini bool no_dirty_log) 2785c50d8ae3SPaolo Bonzini { 2786c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 2787c50d8ae3SPaolo Bonzini 2788c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 2789c50d8ae3SPaolo Bonzini if (!slot) 2790c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 2791c50d8ae3SPaolo Bonzini 2792c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 2793c50d8ae3SPaolo Bonzini } 2794c50d8ae3SPaolo Bonzini 2795c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2796c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2797c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2798c50d8ae3SPaolo Bonzini { 2799c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2800c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 28010a2b64c5SBen Gardon unsigned int access = sp->role.access; 2802c50d8ae3SPaolo Bonzini int i, ret; 2803c50d8ae3SPaolo Bonzini gfn_t gfn; 2804c50d8ae3SPaolo Bonzini 2805c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2806c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2807c50d8ae3SPaolo Bonzini if (!slot) 2808c50d8ae3SPaolo Bonzini return -1; 2809c50d8ae3SPaolo Bonzini 2810c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2811c50d8ae3SPaolo Bonzini if (ret <= 0) 2812c50d8ae3SPaolo Bonzini return -1; 2813c50d8ae3SPaolo Bonzini 2814c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 2815e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 2816c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 2817c50d8ae3SPaolo Bonzini put_page(pages[i]); 2818c50d8ae3SPaolo Bonzini } 2819c50d8ae3SPaolo Bonzini 2820c50d8ae3SPaolo Bonzini return 0; 2821c50d8ae3SPaolo Bonzini } 2822c50d8ae3SPaolo Bonzini 2823c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2824c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2825c50d8ae3SPaolo Bonzini { 2826c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2827c50d8ae3SPaolo Bonzini int i; 2828c50d8ae3SPaolo Bonzini 2829c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2830c50d8ae3SPaolo Bonzini 2831c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2832c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2833c50d8ae3SPaolo Bonzini 2834c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2835c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2836c50d8ae3SPaolo Bonzini if (!start) 2837c50d8ae3SPaolo Bonzini continue; 2838c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2839c6cecc4bSSean Christopherson return; 2840c50d8ae3SPaolo Bonzini start = NULL; 2841c50d8ae3SPaolo Bonzini } else if (!start) 2842c50d8ae3SPaolo Bonzini start = spte; 2843c50d8ae3SPaolo Bonzini } 2844c6cecc4bSSean Christopherson if (start) 2845c6cecc4bSSean Christopherson direct_pte_prefetch_many(vcpu, sp, start, spte); 2846c50d8ae3SPaolo Bonzini } 2847c50d8ae3SPaolo Bonzini 2848c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2849c50d8ae3SPaolo Bonzini { 2850c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2851c50d8ae3SPaolo Bonzini 285257354682SSean Christopherson sp = sptep_to_sp(sptep); 2853c50d8ae3SPaolo Bonzini 2854c50d8ae3SPaolo Bonzini /* 2855c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2856c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2857c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2858c50d8ae3SPaolo Bonzini */ 2859c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2860c50d8ae3SPaolo Bonzini return; 2861c50d8ae3SPaolo Bonzini 28623bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2863c50d8ae3SPaolo Bonzini return; 2864c50d8ae3SPaolo Bonzini 28654a42d848SDavid Stevens /* 28664a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 28674a42d848SDavid Stevens * accidentally prefetching those addresses. 28684a42d848SDavid Stevens */ 28694a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 28704a42d848SDavid Stevens return; 28714a42d848SDavid Stevens 2872c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2873c50d8ae3SPaolo Bonzini } 2874c50d8ae3SPaolo Bonzini 28751b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 28768ca6f063SBen Gardon const struct kvm_memory_slot *slot) 2877db543216SSean Christopherson { 2878db543216SSean Christopherson unsigned long hva; 2879db543216SSean Christopherson pte_t *pte; 2880db543216SSean Christopherson int level; 2881db543216SSean Christopherson 2882e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 28833bae0459SSean Christopherson return PG_LEVEL_4K; 2884db543216SSean Christopherson 2885293e306eSSean Christopherson /* 2886293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2887293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2888293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2889293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2890293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2891293e306eSSean Christopherson * read-only memslot. 2892293e306eSSean Christopherson */ 2893db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2894db543216SSean Christopherson 28951b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2896db543216SSean Christopherson if (unlikely(!pte)) 28973bae0459SSean Christopherson return PG_LEVEL_4K; 2898db543216SSean Christopherson 2899db543216SSean Christopherson return level; 2900db543216SSean Christopherson } 2901db543216SSean Christopherson 29028ca6f063SBen Gardon int kvm_mmu_max_mapping_level(struct kvm *kvm, 29038ca6f063SBen Gardon const struct kvm_memory_slot *slot, gfn_t gfn, 29048ca6f063SBen Gardon kvm_pfn_t pfn, int max_level) 29051b6d9d9eSSean Christopherson { 29061b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 2907ec607a56SPaolo Bonzini int host_level; 29081b6d9d9eSSean Christopherson 29091b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 29101b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 29111b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 29121b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 29131b6d9d9eSSean Christopherson break; 29141b6d9d9eSSean Christopherson } 29151b6d9d9eSSean Christopherson 29161b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 29171b6d9d9eSSean Christopherson return PG_LEVEL_4K; 29181b6d9d9eSSean Christopherson 2919ec607a56SPaolo Bonzini host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot); 2920ec607a56SPaolo Bonzini return min(host_level, max_level); 29211b6d9d9eSSean Christopherson } 29221b6d9d9eSSean Christopherson 292373a3c659SPaolo Bonzini void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 29240885904dSSean Christopherson { 2925293e306eSSean Christopherson struct kvm_memory_slot *slot; 292617eff019SSean Christopherson kvm_pfn_t mask; 29270885904dSSean Christopherson 292873a3c659SPaolo Bonzini fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled; 29293cf06612SSean Christopherson 293073a3c659SPaolo Bonzini if (unlikely(fault->max_level == PG_LEVEL_4K)) 293173a3c659SPaolo Bonzini return; 293217eff019SSean Christopherson 293373a3c659SPaolo Bonzini if (is_error_noslot_pfn(fault->pfn) || kvm_is_reserved_pfn(fault->pfn)) 293473a3c659SPaolo Bonzini return; 293517eff019SSean Christopherson 293673a3c659SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, fault->gfn, true); 2937293e306eSSean Christopherson if (!slot) 293873a3c659SPaolo Bonzini return; 2939293e306eSSean Christopherson 29403cf06612SSean Christopherson /* 29413cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 29423cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 29433cf06612SSean Christopherson */ 294473a3c659SPaolo Bonzini fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, 294573a3c659SPaolo Bonzini fault->gfn, fault->pfn, 294673a3c659SPaolo Bonzini fault->max_level); 294773a3c659SPaolo Bonzini if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed) 294873a3c659SPaolo Bonzini return; 29494cd071d1SSean Christopherson 29500885904dSSean Christopherson /* 29514cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 29524cd071d1SSean Christopherson * the pmd can't be split from under us. 29530885904dSSean Christopherson */ 295473a3c659SPaolo Bonzini fault->goal_level = fault->req_level; 295573a3c659SPaolo Bonzini mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1; 295673a3c659SPaolo Bonzini VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask)); 295773a3c659SPaolo Bonzini fault->pfn &= ~mask; 29580885904dSSean Christopherson } 29590885904dSSean Christopherson 2960536f0e6aSPaolo Bonzini void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level) 2961c50d8ae3SPaolo Bonzini { 2962536f0e6aSPaolo Bonzini if (cur_level > PG_LEVEL_4K && 2963536f0e6aSPaolo Bonzini cur_level == fault->goal_level && 2964c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2965c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2966c50d8ae3SPaolo Bonzini /* 2967c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2968c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2969c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2970c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2971c50d8ae3SPaolo Bonzini * the address. 2972c50d8ae3SPaolo Bonzini */ 2973536f0e6aSPaolo Bonzini u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) - 2974536f0e6aSPaolo Bonzini KVM_PAGES_PER_HPAGE(cur_level - 1); 2975536f0e6aSPaolo Bonzini fault->pfn |= fault->gfn & page_mask; 2976536f0e6aSPaolo Bonzini fault->goal_level--; 2977c50d8ae3SPaolo Bonzini } 2978c50d8ae3SPaolo Bonzini } 2979c50d8ae3SPaolo Bonzini 298043b74355SPaolo Bonzini static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 2981c50d8ae3SPaolo Bonzini { 2982c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2983c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 298473a3c659SPaolo Bonzini int ret; 298543b74355SPaolo Bonzini gfn_t base_gfn = fault->gfn; 2986c50d8ae3SPaolo Bonzini 298773a3c659SPaolo Bonzini kvm_mmu_hugepage_adjust(vcpu, fault); 29884cd071d1SSean Christopherson 2989*f0066d94SPaolo Bonzini trace_kvm_mmu_spte_requested(fault); 299043b74355SPaolo Bonzini for_each_shadow_entry(vcpu, fault->addr, it) { 2991c50d8ae3SPaolo Bonzini /* 2992c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2993c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2994c50d8ae3SPaolo Bonzini */ 299573a3c659SPaolo Bonzini if (fault->nx_huge_page_workaround_enabled) 2996536f0e6aSPaolo Bonzini disallowed_hugepage_adjust(fault, *it.sptep, it.level); 2997c50d8ae3SPaolo Bonzini 299843b74355SPaolo Bonzini base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 299973a3c659SPaolo Bonzini if (it.level == fault->goal_level) 3000c50d8ae3SPaolo Bonzini break; 3001c50d8ae3SPaolo Bonzini 3002c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 300303fffc54SSean Christopherson if (is_shadow_present_pte(*it.sptep)) 300403fffc54SSean Christopherson continue; 300503fffc54SSean Christopherson 3006c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 3007c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 3008c50d8ae3SPaolo Bonzini 3009c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 301073a3c659SPaolo Bonzini if (fault->is_tdp && fault->huge_page_disallowed && 301173a3c659SPaolo Bonzini fault->req_level >= it.level) 3012c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 3013c50d8ae3SPaolo Bonzini } 3014c50d8ae3SPaolo Bonzini 3015c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 301673a3c659SPaolo Bonzini fault->write, fault->goal_level, base_gfn, fault->pfn, 301743b74355SPaolo Bonzini fault->prefault, fault->map_writable); 301812703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 301912703759SSean Christopherson return ret; 302012703759SSean Christopherson 3021c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 3022c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 3023c50d8ae3SPaolo Bonzini return ret; 3024c50d8ae3SPaolo Bonzini } 3025c50d8ae3SPaolo Bonzini 3026c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 3027c50d8ae3SPaolo Bonzini { 3028c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 3029c50d8ae3SPaolo Bonzini } 3030c50d8ae3SPaolo Bonzini 3031c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 3032c50d8ae3SPaolo Bonzini { 3033c50d8ae3SPaolo Bonzini /* 3034c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 3035c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 3036c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 3037c50d8ae3SPaolo Bonzini */ 3038c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 3039c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3040c50d8ae3SPaolo Bonzini 3041c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 3042c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 3043c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3044c50d8ae3SPaolo Bonzini } 3045c50d8ae3SPaolo Bonzini 3046c50d8ae3SPaolo Bonzini return -EFAULT; 3047c50d8ae3SPaolo Bonzini } 3048c50d8ae3SPaolo Bonzini 30493a13f4feSPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, 30503a13f4feSPaolo Bonzini unsigned int access, int *ret_val) 3051c50d8ae3SPaolo Bonzini { 3052c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 30533a13f4feSPaolo Bonzini if (unlikely(is_error_pfn(fault->pfn))) { 30543a13f4feSPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn); 3055c50d8ae3SPaolo Bonzini return true; 3056c50d8ae3SPaolo Bonzini } 3057c50d8ae3SPaolo Bonzini 30583a13f4feSPaolo Bonzini if (unlikely(is_noslot_pfn(fault->pfn))) { 30593a13f4feSPaolo Bonzini gva_t gva = fault->is_tdp ? 0 : fault->addr; 30603a13f4feSPaolo Bonzini 30613a13f4feSPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, fault->gfn, 3062c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 306330ab5901SSean Christopherson /* 306430ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 306530ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 306630ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 306730ab5901SSean Christopherson */ 306830ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 306930ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 307030ab5901SSean Christopherson return true; 307130ab5901SSean Christopherson } 307230ab5901SSean Christopherson } 3073c50d8ae3SPaolo Bonzini 3074c50d8ae3SPaolo Bonzini return false; 3075c50d8ae3SPaolo Bonzini } 3076c50d8ae3SPaolo Bonzini 30773c8ad5a6SPaolo Bonzini static bool page_fault_can_be_fast(struct kvm_page_fault *fault) 3078c50d8ae3SPaolo Bonzini { 3079c50d8ae3SPaolo Bonzini /* 3080c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3081c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3082c50d8ae3SPaolo Bonzini */ 30833c8ad5a6SPaolo Bonzini if (fault->rsvd) 3084c50d8ae3SPaolo Bonzini return false; 3085c50d8ae3SPaolo Bonzini 3086c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 30873c8ad5a6SPaolo Bonzini if (unlikely(fault->exec && fault->present)) 3088c50d8ae3SPaolo Bonzini return false; 3089c50d8ae3SPaolo Bonzini 3090c50d8ae3SPaolo Bonzini /* 3091c50d8ae3SPaolo Bonzini * #PF can be fast if: 3092c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3093c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3094c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3095c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3096c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3097c50d8ae3SPaolo Bonzini * 3098c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3099c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3100c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3101c50d8ae3SPaolo Bonzini * accesses to a present page. 3102c50d8ae3SPaolo Bonzini */ 3103c50d8ae3SPaolo Bonzini 31043c8ad5a6SPaolo Bonzini return shadow_acc_track_mask != 0 || (fault->write && fault->present); 3105c50d8ae3SPaolo Bonzini } 3106c50d8ae3SPaolo Bonzini 3107c50d8ae3SPaolo Bonzini /* 3108c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3109c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3110c50d8ae3SPaolo Bonzini */ 3111c50d8ae3SPaolo Bonzini static bool 3112c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 3113c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3114c50d8ae3SPaolo Bonzini { 3115c50d8ae3SPaolo Bonzini gfn_t gfn; 3116c50d8ae3SPaolo Bonzini 3117c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3118c50d8ae3SPaolo Bonzini 3119c50d8ae3SPaolo Bonzini /* 3120c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3121c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3122c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3123c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3124c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3125c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3126c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3127c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3128c50d8ae3SPaolo Bonzini * 3129c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3130c50d8ae3SPaolo Bonzini */ 3131c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3132c50d8ae3SPaolo Bonzini return false; 3133c50d8ae3SPaolo Bonzini 3134c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3135c50d8ae3SPaolo Bonzini /* 3136c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3137c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3138c50d8ae3SPaolo Bonzini */ 3139c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3140c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3141c50d8ae3SPaolo Bonzini } 3142c50d8ae3SPaolo Bonzini 3143c50d8ae3SPaolo Bonzini return true; 3144c50d8ae3SPaolo Bonzini } 3145c50d8ae3SPaolo Bonzini 31463c8ad5a6SPaolo Bonzini static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte) 3147c50d8ae3SPaolo Bonzini { 31483c8ad5a6SPaolo Bonzini if (fault->exec) 3149c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3150c50d8ae3SPaolo Bonzini 31513c8ad5a6SPaolo Bonzini if (fault->write) 3152c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3153c50d8ae3SPaolo Bonzini 3154c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3155c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3156c50d8ae3SPaolo Bonzini } 3157c50d8ae3SPaolo Bonzini 3158c50d8ae3SPaolo Bonzini /* 31596e8eb206SDavid Matlack * Returns the last level spte pointer of the shadow page walk for the given 31606e8eb206SDavid Matlack * gpa, and sets *spte to the spte value. This spte may be non-preset. If no 31616e8eb206SDavid Matlack * walk could be performed, returns NULL and *spte does not contain valid data. 31626e8eb206SDavid Matlack * 31636e8eb206SDavid Matlack * Contract: 31646e8eb206SDavid Matlack * - Must be called between walk_shadow_page_lockless_{begin,end}. 31656e8eb206SDavid Matlack * - The returned sptep must not be used after walk_shadow_page_lockless_end. 31666e8eb206SDavid Matlack */ 31676e8eb206SDavid Matlack static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte) 31686e8eb206SDavid Matlack { 31696e8eb206SDavid Matlack struct kvm_shadow_walk_iterator iterator; 31706e8eb206SDavid Matlack u64 old_spte; 31716e8eb206SDavid Matlack u64 *sptep = NULL; 31726e8eb206SDavid Matlack 31736e8eb206SDavid Matlack for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) { 31746e8eb206SDavid Matlack sptep = iterator.sptep; 31756e8eb206SDavid Matlack *spte = old_spte; 31766e8eb206SDavid Matlack } 31776e8eb206SDavid Matlack 31786e8eb206SDavid Matlack return sptep; 31796e8eb206SDavid Matlack } 31806e8eb206SDavid Matlack 31816e8eb206SDavid Matlack /* 3182c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3183c50d8ae3SPaolo Bonzini */ 31843c8ad5a6SPaolo Bonzini static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 3185c50d8ae3SPaolo Bonzini { 3186c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3187c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3188c50d8ae3SPaolo Bonzini u64 spte = 0ull; 31896e8eb206SDavid Matlack u64 *sptep = NULL; 3190c50d8ae3SPaolo Bonzini uint retry_count = 0; 3191c50d8ae3SPaolo Bonzini 31923c8ad5a6SPaolo Bonzini if (!page_fault_can_be_fast(fault)) 3193c4371c2aSSean Christopherson return ret; 3194c50d8ae3SPaolo Bonzini 3195c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3196c50d8ae3SPaolo Bonzini 3197c50d8ae3SPaolo Bonzini do { 3198c50d8ae3SPaolo Bonzini u64 new_spte; 3199c50d8ae3SPaolo Bonzini 32006e8eb206SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 32013c8ad5a6SPaolo Bonzini sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte); 32026e8eb206SDavid Matlack else 32033c8ad5a6SPaolo Bonzini sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); 3204c50d8ae3SPaolo Bonzini 3205ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3206ec89e643SSean Christopherson break; 3207ec89e643SSean Christopherson 32086e8eb206SDavid Matlack sp = sptep_to_sp(sptep); 3209c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3210c50d8ae3SPaolo Bonzini break; 3211c50d8ae3SPaolo Bonzini 3212c50d8ae3SPaolo Bonzini /* 3213c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3214c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3215c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3216c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3217c50d8ae3SPaolo Bonzini * current CPU took the fault. 3218c50d8ae3SPaolo Bonzini * 3219c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3220c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3221c50d8ae3SPaolo Bonzini */ 32223c8ad5a6SPaolo Bonzini if (is_access_allowed(fault, spte)) { 3223c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3224c50d8ae3SPaolo Bonzini break; 3225c50d8ae3SPaolo Bonzini } 3226c50d8ae3SPaolo Bonzini 3227c50d8ae3SPaolo Bonzini new_spte = spte; 3228c50d8ae3SPaolo Bonzini 3229c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3230c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3231c50d8ae3SPaolo Bonzini 3232c50d8ae3SPaolo Bonzini /* 3233c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3234c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3235c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3236c50d8ae3SPaolo Bonzini */ 32373c8ad5a6SPaolo Bonzini if (fault->write && 3238e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3239c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3240c50d8ae3SPaolo Bonzini 3241c50d8ae3SPaolo Bonzini /* 3242c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3243c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3244c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3245c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3246c50d8ae3SPaolo Bonzini * 3247c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3248c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3249c50d8ae3SPaolo Bonzini * 3250c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3251c50d8ae3SPaolo Bonzini */ 32523bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3253c50d8ae3SPaolo Bonzini break; 3254c50d8ae3SPaolo Bonzini } 3255c50d8ae3SPaolo Bonzini 3256c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3257c50d8ae3SPaolo Bonzini if (new_spte == spte || 32583c8ad5a6SPaolo Bonzini !is_access_allowed(fault, new_spte)) 3259c50d8ae3SPaolo Bonzini break; 3260c50d8ae3SPaolo Bonzini 3261c50d8ae3SPaolo Bonzini /* 3262c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3263c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 32643ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3265c50d8ae3SPaolo Bonzini */ 32666e8eb206SDavid Matlack if (fast_pf_fix_direct_spte(vcpu, sp, sptep, spte, new_spte)) { 3267c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3268c50d8ae3SPaolo Bonzini break; 3269c4371c2aSSean Christopherson } 3270c50d8ae3SPaolo Bonzini 3271c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3272c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3273c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3274c50d8ae3SPaolo Bonzini break; 3275c50d8ae3SPaolo Bonzini } 3276c50d8ae3SPaolo Bonzini 3277c50d8ae3SPaolo Bonzini } while (true); 3278c50d8ae3SPaolo Bonzini 3279*f0066d94SPaolo Bonzini trace_fast_page_fault(vcpu, fault, sptep, spte, ret); 3280c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3281c50d8ae3SPaolo Bonzini 3282c4371c2aSSean Christopherson return ret; 3283c50d8ae3SPaolo Bonzini } 3284c50d8ae3SPaolo Bonzini 3285c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3286c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3287c50d8ae3SPaolo Bonzini { 3288c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3289c50d8ae3SPaolo Bonzini 3290c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3291c50d8ae3SPaolo Bonzini return; 3292c50d8ae3SPaolo Bonzini 3293e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 329402c00b3aSBen Gardon 3295897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 32966103bc07SBen Gardon kvm_tdp_mmu_put_root(kvm, sp, false); 329776eb54e7SBen Gardon else if (!--sp->root_count && sp->role.invalid) 3298c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3299c50d8ae3SPaolo Bonzini 3300c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3301c50d8ae3SPaolo Bonzini } 3302c50d8ae3SPaolo Bonzini 3303c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3304c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3305c50d8ae3SPaolo Bonzini ulong roots_to_free) 3306c50d8ae3SPaolo Bonzini { 33074d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3308c50d8ae3SPaolo Bonzini int i; 3309c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3310c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3311c50d8ae3SPaolo Bonzini 3312c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3313c50d8ae3SPaolo Bonzini 3314c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3315c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3316c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3317c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3318c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3319c50d8ae3SPaolo Bonzini break; 3320c50d8ae3SPaolo Bonzini 3321c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3322c50d8ae3SPaolo Bonzini return; 3323c50d8ae3SPaolo Bonzini } 3324c50d8ae3SPaolo Bonzini 3325531810caSBen Gardon write_lock(&kvm->mmu_lock); 3326c50d8ae3SPaolo Bonzini 3327c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3328c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 33294d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3330c50d8ae3SPaolo Bonzini &invalid_list); 3331c50d8ae3SPaolo Bonzini 3332c50d8ae3SPaolo Bonzini if (free_active_root) { 3333c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3334c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 33354d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 333604d45551SSean Christopherson } else if (mmu->pae_root) { 3337c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3338c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3339c834e5e4SSean Christopherson continue; 3340c834e5e4SSean Christopherson 3341c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3342c50d8ae3SPaolo Bonzini &invalid_list); 3343c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3344c50d8ae3SPaolo Bonzini } 3345c50d8ae3SPaolo Bonzini } 334604d45551SSean Christopherson mmu->root_hpa = INVALID_PAGE; 3347be01e8e2SSean Christopherson mmu->root_pgd = 0; 3348c50d8ae3SPaolo Bonzini } 3349c50d8ae3SPaolo Bonzini 33504d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3351531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3352c50d8ae3SPaolo Bonzini } 3353c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3354c50d8ae3SPaolo Bonzini 335525b62c62SSean Christopherson void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 335625b62c62SSean Christopherson { 335725b62c62SSean Christopherson unsigned long roots_to_free = 0; 335825b62c62SSean Christopherson hpa_t root_hpa; 335925b62c62SSean Christopherson int i; 336025b62c62SSean Christopherson 336125b62c62SSean Christopherson /* 336225b62c62SSean Christopherson * This should not be called while L2 is active, L2 can't invalidate 336325b62c62SSean Christopherson * _only_ its own roots, e.g. INVVPID unconditionally exits. 336425b62c62SSean Christopherson */ 336525b62c62SSean Christopherson WARN_ON_ONCE(mmu->mmu_role.base.guest_mode); 336625b62c62SSean Christopherson 336725b62c62SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 336825b62c62SSean Christopherson root_hpa = mmu->prev_roots[i].hpa; 336925b62c62SSean Christopherson if (!VALID_PAGE(root_hpa)) 337025b62c62SSean Christopherson continue; 337125b62c62SSean Christopherson 337225b62c62SSean Christopherson if (!to_shadow_page(root_hpa) || 337325b62c62SSean Christopherson to_shadow_page(root_hpa)->role.guest_mode) 337425b62c62SSean Christopherson roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 337525b62c62SSean Christopherson } 337625b62c62SSean Christopherson 337725b62c62SSean Christopherson kvm_mmu_free_roots(vcpu, mmu, roots_to_free); 337825b62c62SSean Christopherson } 337925b62c62SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots); 338025b62c62SSean Christopherson 338125b62c62SSean Christopherson 3382c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3383c50d8ae3SPaolo Bonzini { 3384c50d8ae3SPaolo Bonzini int ret = 0; 3385c50d8ae3SPaolo Bonzini 3386995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3387c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3388c50d8ae3SPaolo Bonzini ret = 1; 3389c50d8ae3SPaolo Bonzini } 3390c50d8ae3SPaolo Bonzini 3391c50d8ae3SPaolo Bonzini return ret; 3392c50d8ae3SPaolo Bonzini } 3393c50d8ae3SPaolo Bonzini 33948123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 33958123f265SSean Christopherson u8 level, bool direct) 3396c50d8ae3SPaolo Bonzini { 3397c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 33988123f265SSean Christopherson 33998123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 34008123f265SSean Christopherson ++sp->root_count; 34018123f265SSean Christopherson 34028123f265SSean Christopherson return __pa(sp->spt); 34038123f265SSean Christopherson } 34048123f265SSean Christopherson 34058123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 34068123f265SSean Christopherson { 3407b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3408b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 34098123f265SSean Christopherson hpa_t root; 3410c50d8ae3SPaolo Bonzini unsigned i; 34114a38162eSPaolo Bonzini int r; 34124a38162eSPaolo Bonzini 34134a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 34144a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 34154a38162eSPaolo Bonzini if (r < 0) 34164a38162eSPaolo Bonzini goto out_unlock; 3417c50d8ae3SPaolo Bonzini 3418897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 341902c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3420b37233c9SSean Christopherson mmu->root_hpa = root; 342102c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 34226e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3423b37233c9SSean Christopherson mmu->root_hpa = root; 34248123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 34254a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 34264a38162eSPaolo Bonzini r = -EIO; 34274a38162eSPaolo Bonzini goto out_unlock; 34284a38162eSPaolo Bonzini } 342973ad1606SSean Christopherson 3430c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3431c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3432c50d8ae3SPaolo Bonzini 34338123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 34348123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 343517e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 343617e368d9SSean Christopherson shadow_me_mask; 3437c50d8ae3SPaolo Bonzini } 3438b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 343973ad1606SSean Christopherson } else { 344073ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 34414a38162eSPaolo Bonzini r = -EIO; 34424a38162eSPaolo Bonzini goto out_unlock; 344373ad1606SSean Christopherson } 34443651c7fcSSean Christopherson 3445be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3446b37233c9SSean Christopherson mmu->root_pgd = 0; 34474a38162eSPaolo Bonzini out_unlock: 34484a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 34494a38162eSPaolo Bonzini return r; 3450c50d8ae3SPaolo Bonzini } 3451c50d8ae3SPaolo Bonzini 3452c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3453c50d8ae3SPaolo Bonzini { 3454b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 34556e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3456be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 34578123f265SSean Christopherson hpa_t root; 34584a38162eSPaolo Bonzini unsigned i; 34594a38162eSPaolo Bonzini int r; 3460c50d8ae3SPaolo Bonzini 3461b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3462be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3463c50d8ae3SPaolo Bonzini 3464c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3465c50d8ae3SPaolo Bonzini return 1; 3466c50d8ae3SPaolo Bonzini 3467c50d8ae3SPaolo Bonzini /* 34684a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 34694a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 34704a38162eSPaolo Bonzini */ 34716e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34726e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 34736e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 34746e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 34756e0918aeSSean Christopherson continue; 34766e0918aeSSean Christopherson 34776e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 34786e0918aeSSean Christopherson return 1; 34796e0918aeSSean Christopherson } 34806e0918aeSSean Christopherson } 34816e0918aeSSean Christopherson 3482d501f747SBen Gardon r = alloc_all_memslots_rmaps(vcpu->kvm); 3483d501f747SBen Gardon if (r) 3484d501f747SBen Gardon return r; 3485d501f747SBen Gardon 34864a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 34874a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 34884a38162eSPaolo Bonzini if (r < 0) 34894a38162eSPaolo Bonzini goto out_unlock; 34904a38162eSPaolo Bonzini 3491c50d8ae3SPaolo Bonzini /* 3492c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3493c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3494c50d8ae3SPaolo Bonzini */ 3495b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 34968123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3497b37233c9SSean Christopherson mmu->shadow_root_level, false); 3498b37233c9SSean Christopherson mmu->root_hpa = root; 3499be01e8e2SSean Christopherson goto set_root_pgd; 3500c50d8ae3SPaolo Bonzini } 3501c50d8ae3SPaolo Bonzini 35024a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 35034a38162eSPaolo Bonzini r = -EIO; 35044a38162eSPaolo Bonzini goto out_unlock; 35054a38162eSPaolo Bonzini } 350673ad1606SSean Christopherson 3507c50d8ae3SPaolo Bonzini /* 3508c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3509c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3510c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3511c50d8ae3SPaolo Bonzini */ 351217e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3513cb0f722aSWei Huang if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL) { 3514c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3515c50d8ae3SPaolo Bonzini 351603ca4589SSean Christopherson if (WARN_ON_ONCE(!mmu->pml4_root)) { 35174a38162eSPaolo Bonzini r = -EIO; 35184a38162eSPaolo Bonzini goto out_unlock; 35194a38162eSPaolo Bonzini } 352003ca4589SSean Christopherson mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; 3521cb0f722aSWei Huang 3522cb0f722aSWei Huang if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) { 3523cb0f722aSWei Huang if (WARN_ON_ONCE(!mmu->pml5_root)) { 3524cb0f722aSWei Huang r = -EIO; 3525cb0f722aSWei Huang goto out_unlock; 3526cb0f722aSWei Huang } 3527cb0f722aSWei Huang mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask; 3528cb0f722aSWei Huang } 352904d45551SSean Christopherson } 353004d45551SSean Christopherson 3531c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3532c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 35336e6ec584SSean Christopherson 3534b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 35356e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3536c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3537c50d8ae3SPaolo Bonzini continue; 3538c50d8ae3SPaolo Bonzini } 35396e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3540c50d8ae3SPaolo Bonzini } 3541c50d8ae3SPaolo Bonzini 35428123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 35438123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3544b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3545c50d8ae3SPaolo Bonzini } 3546c50d8ae3SPaolo Bonzini 3547cb0f722aSWei Huang if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) 3548cb0f722aSWei Huang mmu->root_hpa = __pa(mmu->pml5_root); 3549cb0f722aSWei Huang else if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 355003ca4589SSean Christopherson mmu->root_hpa = __pa(mmu->pml4_root); 3551ba0a194fSSean Christopherson else 3552ba0a194fSSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 3553c50d8ae3SPaolo Bonzini 3554be01e8e2SSean Christopherson set_root_pgd: 3555b37233c9SSean Christopherson mmu->root_pgd = root_pgd; 35564a38162eSPaolo Bonzini out_unlock: 35574a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3558c50d8ae3SPaolo Bonzini 3559c50d8ae3SPaolo Bonzini return 0; 3560c50d8ae3SPaolo Bonzini } 3561c50d8ae3SPaolo Bonzini 3562748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3563c50d8ae3SPaolo Bonzini { 3564748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3565a717a780SSean Christopherson bool need_pml5 = mmu->shadow_root_level > PT64_ROOT_4LEVEL; 3566cb0f722aSWei Huang u64 *pml5_root = NULL; 3567cb0f722aSWei Huang u64 *pml4_root = NULL; 3568cb0f722aSWei Huang u64 *pae_root; 3569748e52b9SSean Christopherson 3570748e52b9SSean Christopherson /* 3571748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3572748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3573748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3574748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3575748e52b9SSean Christopherson */ 3576748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3577748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3578748e52b9SSean Christopherson return 0; 3579748e52b9SSean Christopherson 3580a717a780SSean Christopherson /* 3581a717a780SSean Christopherson * NPT, the only paging mode that uses this horror, uses a fixed number 3582a717a780SSean Christopherson * of levels for the shadow page tables, e.g. all MMUs are 4-level or 3583a717a780SSean Christopherson * all MMus are 5-level. Thus, this can safely require that pml5_root 3584a717a780SSean Christopherson * is allocated if the other roots are valid and pml5 is needed, as any 3585a717a780SSean Christopherson * prior MMU would also have required pml5. 3586a717a780SSean Christopherson */ 3587a717a780SSean Christopherson if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root)) 3588748e52b9SSean Christopherson return 0; 3589748e52b9SSean Christopherson 3590748e52b9SSean Christopherson /* 3591748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3592748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3593748e52b9SSean Christopherson */ 3594cb0f722aSWei Huang if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root || 3595a717a780SSean Christopherson (need_pml5 && mmu->pml5_root))) 3596748e52b9SSean Christopherson return -EIO; 3597748e52b9SSean Christopherson 35984a98623dSSean Christopherson /* 35994a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 36004a98623dSSean Christopherson * doesn't need to be decrypted. 36014a98623dSSean Christopherson */ 3602748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3603748e52b9SSean Christopherson if (!pae_root) 3604748e52b9SSean Christopherson return -ENOMEM; 3605748e52b9SSean Christopherson 3606cb0f722aSWei Huang #ifdef CONFIG_X86_64 360703ca4589SSean Christopherson pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3608cb0f722aSWei Huang if (!pml4_root) 3609cb0f722aSWei Huang goto err_pml4; 3610cb0f722aSWei Huang 3611a717a780SSean Christopherson if (need_pml5) { 3612cb0f722aSWei Huang pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3613cb0f722aSWei Huang if (!pml5_root) 3614cb0f722aSWei Huang goto err_pml5; 3615748e52b9SSean Christopherson } 3616cb0f722aSWei Huang #endif 3617748e52b9SSean Christopherson 3618748e52b9SSean Christopherson mmu->pae_root = pae_root; 361903ca4589SSean Christopherson mmu->pml4_root = pml4_root; 3620cb0f722aSWei Huang mmu->pml5_root = pml5_root; 3621748e52b9SSean Christopherson 3622748e52b9SSean Christopherson return 0; 3623cb0f722aSWei Huang 3624cb0f722aSWei Huang #ifdef CONFIG_X86_64 3625cb0f722aSWei Huang err_pml5: 3626cb0f722aSWei Huang free_page((unsigned long)pml4_root); 3627cb0f722aSWei Huang err_pml4: 3628cb0f722aSWei Huang free_page((unsigned long)pae_root); 3629cb0f722aSWei Huang return -ENOMEM; 3630cb0f722aSWei Huang #endif 3631c50d8ae3SPaolo Bonzini } 3632c50d8ae3SPaolo Bonzini 3633c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3634c50d8ae3SPaolo Bonzini { 3635c50d8ae3SPaolo Bonzini int i; 3636c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3637c50d8ae3SPaolo Bonzini 3638c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3639c50d8ae3SPaolo Bonzini return; 3640c50d8ae3SPaolo Bonzini 3641c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3642c50d8ae3SPaolo Bonzini return; 3643c50d8ae3SPaolo Bonzini 3644c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3645c50d8ae3SPaolo Bonzini 3646c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3647c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3648e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3649c50d8ae3SPaolo Bonzini 3650c50d8ae3SPaolo Bonzini /* 3651c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3652c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3653c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3654c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3655c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3656c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 36570337f585SSean Christopherson * mmu_try_to_unsync_pages() describe what could go wrong if 36580337f585SSean Christopherson * this requirement isn't satisfied. 3659c50d8ae3SPaolo Bonzini */ 3660c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3661c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3662c50d8ae3SPaolo Bonzini return; 3663c50d8ae3SPaolo Bonzini 3664531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3665c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3666c50d8ae3SPaolo Bonzini 366765855ed8SLai Jiangshan mmu_sync_children(vcpu, sp, true); 3668c50d8ae3SPaolo Bonzini 3669c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3670531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3671c50d8ae3SPaolo Bonzini return; 3672c50d8ae3SPaolo Bonzini } 3673c50d8ae3SPaolo Bonzini 3674531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3675c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3676c50d8ae3SPaolo Bonzini 3677c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3678c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3679c50d8ae3SPaolo Bonzini 3680c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3681c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3682e47c4aeeSSean Christopherson sp = to_shadow_page(root); 368365855ed8SLai Jiangshan mmu_sync_children(vcpu, sp, true); 3684c50d8ae3SPaolo Bonzini } 3685c50d8ae3SPaolo Bonzini } 3686c50d8ae3SPaolo Bonzini 3687c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3688531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3689c50d8ae3SPaolo Bonzini } 3690c50d8ae3SPaolo Bonzini 3691736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3692c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3693c50d8ae3SPaolo Bonzini { 3694c50d8ae3SPaolo Bonzini if (exception) 3695c50d8ae3SPaolo Bonzini exception->error_code = 0; 3696c50d8ae3SPaolo Bonzini return vaddr; 3697c50d8ae3SPaolo Bonzini } 3698c50d8ae3SPaolo Bonzini 3699736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3700c50d8ae3SPaolo Bonzini u32 access, 3701c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3702c50d8ae3SPaolo Bonzini { 3703c50d8ae3SPaolo Bonzini if (exception) 3704c50d8ae3SPaolo Bonzini exception->error_code = 0; 3705c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3706c50d8ae3SPaolo Bonzini } 3707c50d8ae3SPaolo Bonzini 3708c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3709c50d8ae3SPaolo Bonzini { 3710c50d8ae3SPaolo Bonzini /* 3711c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3712c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3713c50d8ae3SPaolo Bonzini */ 3714c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3715c50d8ae3SPaolo Bonzini return false; 3716c50d8ae3SPaolo Bonzini 3717c50d8ae3SPaolo Bonzini if (direct) 3718c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3719c50d8ae3SPaolo Bonzini 3720c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3721c50d8ae3SPaolo Bonzini } 3722c50d8ae3SPaolo Bonzini 372395fb5b02SBen Gardon /* 372495fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 372595fb5b02SBen Gardon * That SPTE may be non-present. 3726c5c8c7c5SDavid Matlack * 3727c5c8c7c5SDavid Matlack * Must be called between walk_shadow_page_lockless_{begin,end}. 372895fb5b02SBen Gardon */ 372939b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3730c50d8ae3SPaolo Bonzini { 3731c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 37322aa07893SSean Christopherson int leaf = -1; 373395fb5b02SBen Gardon u64 spte; 3734c50d8ae3SPaolo Bonzini 373539b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 373639b4d43eSSean Christopherson *root_level = iterator.level; 3737c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3738c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 373995fb5b02SBen Gardon leaf = iterator.level; 3740c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3741c50d8ae3SPaolo Bonzini 3742dde81f94SSean Christopherson sptes[leaf] = spte; 374395fb5b02SBen Gardon } 374495fb5b02SBen Gardon 374595fb5b02SBen Gardon return leaf; 374695fb5b02SBen Gardon } 374795fb5b02SBen Gardon 37489aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 374995fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 375095fb5b02SBen Gardon { 3751dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 375295fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 375339b4d43eSSean Christopherson int root, leaf, level; 375495fb5b02SBen Gardon bool reserved = false; 375595fb5b02SBen Gardon 3756c5c8c7c5SDavid Matlack walk_shadow_page_lockless_begin(vcpu); 3757c5c8c7c5SDavid Matlack 375863c0cac9SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 375939b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 376095fb5b02SBen Gardon else 376139b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 376295fb5b02SBen Gardon 3763c5c8c7c5SDavid Matlack walk_shadow_page_lockless_end(vcpu); 3764c5c8c7c5SDavid Matlack 37652aa07893SSean Christopherson if (unlikely(leaf < 0)) { 37662aa07893SSean Christopherson *sptep = 0ull; 37672aa07893SSean Christopherson return reserved; 37682aa07893SSean Christopherson } 37692aa07893SSean Christopherson 37709aa41879SSean Christopherson *sptep = sptes[leaf]; 37719aa41879SSean Christopherson 37729aa41879SSean Christopherson /* 37739aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 37749aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 37759aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 37769aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 37779aa41879SSean Christopherson */ 37789aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 37799aa41879SSean Christopherson leaf++; 378095fb5b02SBen Gardon 378195fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 378295fb5b02SBen Gardon 37839aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3784961f8445SSean Christopherson reserved |= is_rsvd_spte(rsvd_check, sptes[level], level); 3785c50d8ae3SPaolo Bonzini 3786c50d8ae3SPaolo Bonzini if (reserved) { 3787bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3788c50d8ae3SPaolo Bonzini __func__, addr); 378995fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3790bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3791bb4cdf3aSSean Christopherson sptes[level], level, 3792961f8445SSean Christopherson get_rsvd_bits(rsvd_check, sptes[level], level)); 3793c50d8ae3SPaolo Bonzini } 3794ddce6208SSean Christopherson 3795c50d8ae3SPaolo Bonzini return reserved; 3796c50d8ae3SPaolo Bonzini } 3797c50d8ae3SPaolo Bonzini 3798c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3799c50d8ae3SPaolo Bonzini { 3800c50d8ae3SPaolo Bonzini u64 spte; 3801c50d8ae3SPaolo Bonzini bool reserved; 3802c50d8ae3SPaolo Bonzini 3803c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3804c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3805c50d8ae3SPaolo Bonzini 380695fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3807c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3808c50d8ae3SPaolo Bonzini return -EINVAL; 3809c50d8ae3SPaolo Bonzini 3810c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3811c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 38120a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3813c50d8ae3SPaolo Bonzini 3814c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3815c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3816c50d8ae3SPaolo Bonzini 3817c50d8ae3SPaolo Bonzini if (direct) 3818c50d8ae3SPaolo Bonzini addr = 0; 3819c50d8ae3SPaolo Bonzini 3820c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3821c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3822c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3823c50d8ae3SPaolo Bonzini } 3824c50d8ae3SPaolo Bonzini 3825c50d8ae3SPaolo Bonzini /* 3826c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3827c50d8ae3SPaolo Bonzini * the address. 3828c50d8ae3SPaolo Bonzini */ 3829c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3830c50d8ae3SPaolo Bonzini } 3831c50d8ae3SPaolo Bonzini 3832c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3833b8a5d551SPaolo Bonzini struct kvm_page_fault *fault) 3834c50d8ae3SPaolo Bonzini { 3835b8a5d551SPaolo Bonzini if (unlikely(fault->rsvd)) 3836c50d8ae3SPaolo Bonzini return false; 3837c50d8ae3SPaolo Bonzini 3838b8a5d551SPaolo Bonzini if (!fault->present || !fault->write) 3839c50d8ae3SPaolo Bonzini return false; 3840c50d8ae3SPaolo Bonzini 3841c50d8ae3SPaolo Bonzini /* 3842c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3843c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3844c50d8ae3SPaolo Bonzini */ 3845b8a5d551SPaolo Bonzini if (kvm_page_track_is_active(vcpu, fault->gfn, KVM_PAGE_TRACK_WRITE)) 3846c50d8ae3SPaolo Bonzini return true; 3847c50d8ae3SPaolo Bonzini 3848c50d8ae3SPaolo Bonzini return false; 3849c50d8ae3SPaolo Bonzini } 3850c50d8ae3SPaolo Bonzini 3851c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3852c50d8ae3SPaolo Bonzini { 3853c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3854c50d8ae3SPaolo Bonzini u64 spte; 3855c50d8ae3SPaolo Bonzini 3856c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 38573e44dce4SLai Jiangshan for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) 3858c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3859c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3860c50d8ae3SPaolo Bonzini } 3861c50d8ae3SPaolo Bonzini 3862e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 38639f1a8526SSean Christopherson gfn_t gfn) 3864c50d8ae3SPaolo Bonzini { 3865c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3866c50d8ae3SPaolo Bonzini 3867c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3868c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3869c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3870d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3871c50d8ae3SPaolo Bonzini 38729f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 38739f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3874c50d8ae3SPaolo Bonzini } 3875c50d8ae3SPaolo Bonzini 38763647cd04SPaolo Bonzini static bool kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, int *r) 3877c50d8ae3SPaolo Bonzini { 38783647cd04SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn); 3879c50d8ae3SPaolo Bonzini bool async; 3880c50d8ae3SPaolo Bonzini 3881e0c37868SSean Christopherson /* 3882e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3883e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3884e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3885e0c37868SSean Christopherson */ 3886e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 38878f32d5e5SMaxim Levitsky goto out_retry; 3888e0c37868SSean Christopherson 38899cc13d60SMaxim Levitsky if (!kvm_is_visible_memslot(slot)) { 3890c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 38919cc13d60SMaxim Levitsky if (is_guest_mode(vcpu)) { 38923647cd04SPaolo Bonzini fault->pfn = KVM_PFN_NOSLOT; 38933647cd04SPaolo Bonzini fault->map_writable = false; 3894c50d8ae3SPaolo Bonzini return false; 3895c50d8ae3SPaolo Bonzini } 38969cc13d60SMaxim Levitsky /* 38979cc13d60SMaxim Levitsky * If the APIC access page exists but is disabled, go directly 38989cc13d60SMaxim Levitsky * to emulation without caching the MMIO access or creating a 38999cc13d60SMaxim Levitsky * MMIO SPTE. That way the cache doesn't need to be purged 39009cc13d60SMaxim Levitsky * when the AVIC is re-enabled. 39019cc13d60SMaxim Levitsky */ 39029cc13d60SMaxim Levitsky if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT && 39039cc13d60SMaxim Levitsky !kvm_apicv_activated(vcpu->kvm)) { 39049cc13d60SMaxim Levitsky *r = RET_PF_EMULATE; 39059cc13d60SMaxim Levitsky return true; 39069cc13d60SMaxim Levitsky } 39079cc13d60SMaxim Levitsky } 3908c50d8ae3SPaolo Bonzini 3909c50d8ae3SPaolo Bonzini async = false; 39103647cd04SPaolo Bonzini fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async, 39113647cd04SPaolo Bonzini fault->write, &fault->map_writable, 39123647cd04SPaolo Bonzini &fault->hva); 3913c50d8ae3SPaolo Bonzini if (!async) 3914c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3915c50d8ae3SPaolo Bonzini 39163647cd04SPaolo Bonzini if (!fault->prefault && kvm_can_do_async_pf(vcpu)) { 39173647cd04SPaolo Bonzini trace_kvm_try_async_get_page(fault->addr, fault->gfn); 39183647cd04SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) { 39193647cd04SPaolo Bonzini trace_kvm_async_pf_doublefault(fault->addr, fault->gfn); 3920c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 39218f32d5e5SMaxim Levitsky goto out_retry; 39223647cd04SPaolo Bonzini } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) 39238f32d5e5SMaxim Levitsky goto out_retry; 3924c50d8ae3SPaolo Bonzini } 3925c50d8ae3SPaolo Bonzini 39263647cd04SPaolo Bonzini fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL, 39273647cd04SPaolo Bonzini fault->write, &fault->map_writable, 39283647cd04SPaolo Bonzini &fault->hva); 39298f32d5e5SMaxim Levitsky 39308f32d5e5SMaxim Levitsky out_retry: 39318f32d5e5SMaxim Levitsky *r = RET_PF_RETRY; 39328f32d5e5SMaxim Levitsky return true; 3933c50d8ae3SPaolo Bonzini } 3934c50d8ae3SPaolo Bonzini 39354326e57eSPaolo Bonzini static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 3936c50d8ae3SPaolo Bonzini { 393763c0cac9SDavid Matlack bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); 3938c50d8ae3SPaolo Bonzini 39390f90e1c1SSean Christopherson unsigned long mmu_seq; 394083f06fa7SSean Christopherson int r; 3941c50d8ae3SPaolo Bonzini 39423c8ad5a6SPaolo Bonzini fault->gfn = fault->addr >> PAGE_SHIFT; 3943b8a5d551SPaolo Bonzini if (page_fault_handle_page_track(vcpu, fault)) 3944c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3945c50d8ae3SPaolo Bonzini 39463c8ad5a6SPaolo Bonzini r = fast_page_fault(vcpu, fault); 3947c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3948c4371c2aSSean Christopherson return r; 394983291445SSean Christopherson 3950378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3951c50d8ae3SPaolo Bonzini if (r) 3952c50d8ae3SPaolo Bonzini return r; 3953c50d8ae3SPaolo Bonzini 3954367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3955367fd790SSean Christopherson smp_rmb(); 3956367fd790SSean Christopherson 39573647cd04SPaolo Bonzini if (kvm_faultin_pfn(vcpu, fault, &r)) 39588f32d5e5SMaxim Levitsky return r; 3959367fd790SSean Christopherson 39603a13f4feSPaolo Bonzini if (handle_abnormal_pfn(vcpu, fault, ACC_ALL, &r)) 3961367fd790SSean Christopherson return r; 3962367fd790SSean Christopherson 3963367fd790SSean Christopherson r = RET_PF_RETRY; 3964a2855afcSBen Gardon 39650b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3966a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3967a2855afcSBen Gardon else 3968531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3969a2855afcSBen Gardon 39703647cd04SPaolo Bonzini if (!is_noslot_pfn(fault->pfn) && mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, fault->hva)) 3971367fd790SSean Christopherson goto out_unlock; 39727bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 39737bd7ded6SSean Christopherson if (r) 3974367fd790SSean Christopherson goto out_unlock; 3975bb18842eSBen Gardon 39760b873fd7SDavid Matlack if (is_tdp_mmu_fault) 39772f6305ddSPaolo Bonzini r = kvm_tdp_mmu_map(vcpu, fault); 3978bb18842eSBen Gardon else 397943b74355SPaolo Bonzini r = __direct_map(vcpu, fault); 39800f90e1c1SSean Christopherson 3981367fd790SSean Christopherson out_unlock: 39820b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3983a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 3984a2855afcSBen Gardon else 3985531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 39863647cd04SPaolo Bonzini kvm_release_pfn_clean(fault->pfn); 3987367fd790SSean Christopherson return r; 3988c50d8ae3SPaolo Bonzini } 3989c50d8ae3SPaolo Bonzini 3990c501040aSPaolo Bonzini static int nonpaging_page_fault(struct kvm_vcpu *vcpu, 3991c501040aSPaolo Bonzini struct kvm_page_fault *fault) 39920f90e1c1SSean Christopherson { 39934326e57eSPaolo Bonzini pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code); 39940f90e1c1SSean Christopherson 39950f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 39964326e57eSPaolo Bonzini fault->max_level = PG_LEVEL_2M; 39974326e57eSPaolo Bonzini return direct_page_fault(vcpu, fault); 39980f90e1c1SSean Christopherson } 39990f90e1c1SSean Christopherson 4000c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 4001c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 4002c50d8ae3SPaolo Bonzini { 4003c50d8ae3SPaolo Bonzini int r = 1; 40049ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 4005c50d8ae3SPaolo Bonzini 4006736c291cSSean Christopherson #ifndef CONFIG_X86_64 4007736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 4008736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 4009736c291cSSean Christopherson return -EFAULT; 4010736c291cSSean Christopherson #endif 4011736c291cSSean Christopherson 4012c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 40139ce372b3SVitaly Kuznetsov if (!flags) { 4014c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 4015c50d8ae3SPaolo Bonzini 4016c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 4017c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 4018c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 4019c50d8ae3SPaolo Bonzini insn_len); 40209ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 402168fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 4022c50d8ae3SPaolo Bonzini local_irq_disable(); 40236bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 4024c50d8ae3SPaolo Bonzini local_irq_enable(); 40259ce372b3SVitaly Kuznetsov } else { 40269ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 4027c50d8ae3SPaolo Bonzini } 40289ce372b3SVitaly Kuznetsov 4029c50d8ae3SPaolo Bonzini return r; 4030c50d8ae3SPaolo Bonzini } 4031c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 4032c50d8ae3SPaolo Bonzini 4033c501040aSPaolo Bonzini int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 4034c50d8ae3SPaolo Bonzini { 40354326e57eSPaolo Bonzini while (fault->max_level > PG_LEVEL_4K) { 40364326e57eSPaolo Bonzini int page_num = KVM_PAGES_PER_HPAGE(fault->max_level); 40374326e57eSPaolo Bonzini gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1); 4038c50d8ae3SPaolo Bonzini 4039cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 4040cb9b88c6SSean Christopherson break; 40414326e57eSPaolo Bonzini 40424326e57eSPaolo Bonzini --fault->max_level; 4043c50d8ae3SPaolo Bonzini } 4044c50d8ae3SPaolo Bonzini 40454326e57eSPaolo Bonzini return direct_page_fault(vcpu, fault); 4046c50d8ae3SPaolo Bonzini } 4047c50d8ae3SPaolo Bonzini 404884a16226SSean Christopherson static void nonpaging_init_context(struct kvm_mmu *context) 4049c50d8ae3SPaolo Bonzini { 4050c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 4051c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4052c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 40535efac074SPaolo Bonzini context->invlpg = NULL; 4054c50d8ae3SPaolo Bonzini context->direct_map = true; 4055c50d8ae3SPaolo Bonzini } 4056c50d8ae3SPaolo Bonzini 4057be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 40580be44352SSean Christopherson union kvm_mmu_page_role role) 40590be44352SSean Christopherson { 4060be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 4061e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 4062e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 40630be44352SSean Christopherson } 40640be44352SSean Christopherson 4065c50d8ae3SPaolo Bonzini /* 4066be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 4067c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 4068c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 4069c50d8ae3SPaolo Bonzini * returned. 4070c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 4071c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4072c50d8ae3SPaolo Bonzini */ 4073be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4074c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4075c50d8ae3SPaolo Bonzini { 4076c50d8ae3SPaolo Bonzini uint i; 4077c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 4078c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4079c50d8ae3SPaolo Bonzini 4080be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 4081c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 4082c50d8ae3SPaolo Bonzini 4083be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 40840be44352SSean Christopherson return true; 40850be44352SSean Christopherson 4086c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4087c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 4088c50d8ae3SPaolo Bonzini 4089be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 4090c50d8ae3SPaolo Bonzini break; 4091c50d8ae3SPaolo Bonzini } 4092c50d8ae3SPaolo Bonzini 4093c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 4094be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 4095c50d8ae3SPaolo Bonzini 4096c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4097c50d8ae3SPaolo Bonzini } 4098c50d8ae3SPaolo Bonzini 4099be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4100b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4101c50d8ae3SPaolo Bonzini { 4102c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4103c50d8ae3SPaolo Bonzini 4104c50d8ae3SPaolo Bonzini /* 4105c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4106c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4107c50d8ae3SPaolo Bonzini * later if necessary. 4108c50d8ae3SPaolo Bonzini */ 4109c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4110b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4111fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 4112c50d8ae3SPaolo Bonzini 4113c50d8ae3SPaolo Bonzini return false; 4114c50d8ae3SPaolo Bonzini } 4115c50d8ae3SPaolo Bonzini 4116be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4117b5129100SSean Christopherson union kvm_mmu_page_role new_role) 4118c50d8ae3SPaolo Bonzini { 4119be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4120b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4121b869855bSSean Christopherson return; 4122c50d8ae3SPaolo Bonzini } 4123c50d8ae3SPaolo Bonzini 4124c50d8ae3SPaolo Bonzini /* 4125b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4126b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4127b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4128b869855bSSean Christopherson * free the root set here and allocate a new one. 4129b869855bSSean Christopherson */ 4130b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4131b869855bSSean Christopherson 4132b5129100SSean Christopherson if (force_flush_and_sync_on_reuse) { 4133b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 4134b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4135b5129100SSean Christopherson } 4136b869855bSSean Christopherson 4137b869855bSSean Christopherson /* 4138b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4139b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4140b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4141b869855bSSean Christopherson * the shadow page tables. 4142c50d8ae3SPaolo Bonzini */ 4143c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4144c50d8ae3SPaolo Bonzini 4145daa5b6c1SBen Gardon /* 4146daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 4147daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 4148daa5b6c1SBen Gardon */ 4149daa5b6c1SBen Gardon if (!new_role.direct) 4150daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 4151daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 4152c50d8ae3SPaolo Bonzini } 4153c50d8ae3SPaolo Bonzini 4154b5129100SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd) 4155c50d8ae3SPaolo Bonzini { 4156b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu)); 4157c50d8ae3SPaolo Bonzini } 4158be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4159c50d8ae3SPaolo Bonzini 4160c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4161c50d8ae3SPaolo Bonzini { 4162c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4163c50d8ae3SPaolo Bonzini } 4164c50d8ae3SPaolo Bonzini 4165c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 4166c3e5e415SLai Jiangshan unsigned int access) 4167c50d8ae3SPaolo Bonzini { 4168c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4169c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4170c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4171c50d8ae3SPaolo Bonzini return true; 4172c50d8ae3SPaolo Bonzini } 4173c50d8ae3SPaolo Bonzini 4174c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4175c50d8ae3SPaolo Bonzini return true; 4176c50d8ae3SPaolo Bonzini } 4177c50d8ae3SPaolo Bonzini 4178c50d8ae3SPaolo Bonzini return false; 4179c50d8ae3SPaolo Bonzini } 4180c50d8ae3SPaolo Bonzini 4181c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4182c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4183c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4184c50d8ae3SPaolo Bonzini #undef PTTYPE 4185c50d8ae3SPaolo Bonzini 4186c50d8ae3SPaolo Bonzini #define PTTYPE 64 4187c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4188c50d8ae3SPaolo Bonzini #undef PTTYPE 4189c50d8ae3SPaolo Bonzini 4190c50d8ae3SPaolo Bonzini #define PTTYPE 32 4191c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4192c50d8ae3SPaolo Bonzini #undef PTTYPE 4193c50d8ae3SPaolo Bonzini 4194c50d8ae3SPaolo Bonzini static void 4195b705a277SSean Christopherson __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check, 41965b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4197c50d8ae3SPaolo Bonzini bool pse, bool amd) 4198c50d8ae3SPaolo Bonzini { 4199c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4200c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 42015b7f575cSSean Christopherson u64 high_bits_rsvd; 4202c50d8ae3SPaolo Bonzini 4203c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4204c50d8ae3SPaolo Bonzini 4205c50d8ae3SPaolo Bonzini if (!gbpages) 4206c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4207c50d8ae3SPaolo Bonzini 42085b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 42095b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 42105b7f575cSSean Christopherson else 42115b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 42125b7f575cSSean Christopherson 42135b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 42145b7f575cSSean Christopherson if (!nx) 42155b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 42165b7f575cSSean Christopherson 4217c50d8ae3SPaolo Bonzini /* 4218c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4219c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4220c50d8ae3SPaolo Bonzini */ 4221c50d8ae3SPaolo Bonzini if (amd) 4222c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4223c50d8ae3SPaolo Bonzini 4224c50d8ae3SPaolo Bonzini switch (level) { 4225c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4226c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4227c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4228c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4229c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4230c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4231c50d8ae3SPaolo Bonzini 4232c50d8ae3SPaolo Bonzini if (!pse) { 4233c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4234c50d8ae3SPaolo Bonzini break; 4235c50d8ae3SPaolo Bonzini } 4236c50d8ae3SPaolo Bonzini 4237c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4238c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4239c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4240c50d8ae3SPaolo Bonzini else 4241c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4242c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4243c50d8ae3SPaolo Bonzini break; 4244c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 42455b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 42465b7f575cSSean Christopherson high_bits_rsvd | 42475b7f575cSSean Christopherson rsvd_bits(5, 8) | 42485b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 42495b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 42505b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 42515b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4252c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4253c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4254c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4255c50d8ae3SPaolo Bonzini break; 4256c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 42575b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 42585b7f575cSSean Christopherson nonleaf_bit8_rsvd | 42595b7f575cSSean Christopherson rsvd_bits(7, 7); 4260c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4261c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4262df561f66SGustavo A. R. Silva fallthrough; 4263c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 42645b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 42655b7f575cSSean Christopherson nonleaf_bit8_rsvd | 42665b7f575cSSean Christopherson rsvd_bits(7, 7); 42675b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 42685b7f575cSSean Christopherson gbpages_bit_rsvd; 42695b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 42705b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4271c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4272c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 42735b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 42745b7f575cSSean Christopherson gbpages_bit_rsvd | 4275c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 42765b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4277c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4278c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4279c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4280c50d8ae3SPaolo Bonzini break; 4281c50d8ae3SPaolo Bonzini } 4282c50d8ae3SPaolo Bonzini } 4283c50d8ae3SPaolo Bonzini 428427de9250SSean Christopherson static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu) 428527de9250SSean Christopherson { 428627de9250SSean Christopherson /* 428727de9250SSean Christopherson * If TDP is enabled, let the guest use GBPAGES if they're supported in 428827de9250SSean Christopherson * hardware. The hardware page walker doesn't let KVM disable GBPAGES, 428927de9250SSean Christopherson * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA 429027de9250SSean Christopherson * walk for performance and complexity reasons. Not to mention KVM 429127de9250SSean Christopherson * _can't_ solve the problem because GVA->GPA walks aren't visible to 429227de9250SSean Christopherson * KVM once a TDP translation is installed. Mimic hardware behavior so 429327de9250SSean Christopherson * that KVM's is at least consistent, i.e. doesn't randomly inject #PF. 429427de9250SSean Christopherson */ 429527de9250SSean Christopherson return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) : 429627de9250SSean Christopherson guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES); 429727de9250SSean Christopherson } 429827de9250SSean Christopherson 4299c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4300c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4301c50d8ae3SPaolo Bonzini { 4302b705a277SSean Christopherson __reset_rsvds_bits_mask(&context->guest_rsvd_check, 43035b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 430490599c28SSean Christopherson context->root_level, is_efer_nx(context), 430527de9250SSean Christopherson guest_can_use_gbpages(vcpu), 43064e9c0d80SSean Christopherson is_cr4_pse(context), 430723493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4308c50d8ae3SPaolo Bonzini } 4309c50d8ae3SPaolo Bonzini 4310c50d8ae3SPaolo Bonzini static void 4311c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 43125b7f575cSSean Christopherson u64 pa_bits_rsvd, bool execonly) 4313c50d8ae3SPaolo Bonzini { 43145b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 4315c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4316c50d8ae3SPaolo Bonzini 43175b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 43185b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 43195b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6); 43205b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6); 43215b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4322c50d8ae3SPaolo Bonzini 4323c50d8ae3SPaolo Bonzini /* large page */ 4324c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4325c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 43265b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29); 43275b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20); 4328c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4329c50d8ae3SPaolo Bonzini 4330c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4331c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4332c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4333c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4334c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4335c50d8ae3SPaolo Bonzini if (!execonly) { 4336c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4337c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4338c50d8ae3SPaolo Bonzini } 4339c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4340c50d8ae3SPaolo Bonzini } 4341c50d8ae3SPaolo Bonzini 4342c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4343c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4344c50d8ae3SPaolo Bonzini { 4345c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 43465b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, execonly); 4347c50d8ae3SPaolo Bonzini } 4348c50d8ae3SPaolo Bonzini 43496f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 43506f8e65a6SSean Christopherson { 43516f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 43526f8e65a6SSean Christopherson } 43536f8e65a6SSean Christopherson 4354c50d8ae3SPaolo Bonzini /* 4355c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4356c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4357c50d8ae3SPaolo Bonzini * follow the features in guest. 4358c50d8ae3SPaolo Bonzini */ 435916be1d12SSean Christopherson static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 436016be1d12SSean Christopherson struct kvm_mmu *context) 4361c50d8ae3SPaolo Bonzini { 4362112022bdSSean Christopherson /* 4363112022bdSSean Christopherson * KVM uses NX when TDP is disabled to handle a variety of scenarios, 4364112022bdSSean Christopherson * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and 4365112022bdSSean Christopherson * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0. 4366112022bdSSean Christopherson * The iTLB multi-hit workaround can be toggled at any time, so assume 4367112022bdSSean Christopherson * NX can be used by any non-nested shadow MMU to avoid having to reset 4368112022bdSSean Christopherson * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled. 4369112022bdSSean Christopherson */ 437090599c28SSean Christopherson bool uses_nx = is_efer_nx(context) || !tdp_enabled; 43718c985b2dSSean Christopherson 43728c985b2dSSean Christopherson /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */ 43738c985b2dSSean Christopherson bool is_amd = true; 43748c985b2dSSean Christopherson /* KVM doesn't use 2-level page tables for the shadow MMU. */ 43758c985b2dSSean Christopherson bool is_pse = false; 4376c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4377c50d8ae3SPaolo Bonzini int i; 4378c50d8ae3SPaolo Bonzini 43798c985b2dSSean Christopherson WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL); 43808c985b2dSSean Christopherson 4381c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4382b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4383c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 438427de9250SSean Christopherson guest_can_use_gbpages(vcpu), is_pse, is_amd); 4385c50d8ae3SPaolo Bonzini 4386c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4387c50d8ae3SPaolo Bonzini return; 4388c50d8ae3SPaolo Bonzini 4389c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4390c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4391c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4392c50d8ae3SPaolo Bonzini } 4393c50d8ae3SPaolo Bonzini 4394c50d8ae3SPaolo Bonzini } 4395c50d8ae3SPaolo Bonzini 4396c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4397c50d8ae3SPaolo Bonzini { 4398c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4399c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4400c50d8ae3SPaolo Bonzini } 4401c50d8ae3SPaolo Bonzini 4402c50d8ae3SPaolo Bonzini /* 4403c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4404c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4405c50d8ae3SPaolo Bonzini */ 4406c50d8ae3SPaolo Bonzini static void 4407c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4408c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4409c50d8ae3SPaolo Bonzini { 4410c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4411c50d8ae3SPaolo Bonzini int i; 4412c50d8ae3SPaolo Bonzini 4413c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4414c50d8ae3SPaolo Bonzini 4415c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4416b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4417c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4418c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 44198c985b2dSSean Christopherson false, true); 4420c50d8ae3SPaolo Bonzini else 4421c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 44226f8e65a6SSean Christopherson reserved_hpa_bits(), false); 4423c50d8ae3SPaolo Bonzini 4424c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4425c50d8ae3SPaolo Bonzini return; 4426c50d8ae3SPaolo Bonzini 4427c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4428c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4429c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4430c50d8ae3SPaolo Bonzini } 4431c50d8ae3SPaolo Bonzini } 4432c50d8ae3SPaolo Bonzini 4433c50d8ae3SPaolo Bonzini /* 4434c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4435c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4436c50d8ae3SPaolo Bonzini */ 4437c50d8ae3SPaolo Bonzini static void 4438c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4439c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4440c50d8ae3SPaolo Bonzini { 4441c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 44426f8e65a6SSean Christopherson reserved_hpa_bits(), execonly); 4443c50d8ae3SPaolo Bonzini } 4444c50d8ae3SPaolo Bonzini 4445c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4446c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4447c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4448c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4449c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4450c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4451c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4452c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4453c50d8ae3SPaolo Bonzini 4454c50d8ae3SPaolo Bonzini 4455c596f147SSean Christopherson static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept) 4456c50d8ae3SPaolo Bonzini { 4457c50d8ae3SPaolo Bonzini unsigned byte; 4458c50d8ae3SPaolo Bonzini 4459c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4460c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4461c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4462c50d8ae3SPaolo Bonzini 4463c596f147SSean Christopherson bool cr4_smep = is_cr4_smep(mmu); 4464c596f147SSean Christopherson bool cr4_smap = is_cr4_smap(mmu); 4465c596f147SSean Christopherson bool cr0_wp = is_cr0_wp(mmu); 446690599c28SSean Christopherson bool efer_nx = is_efer_nx(mmu); 4467c50d8ae3SPaolo Bonzini 4468c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4469c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4470c50d8ae3SPaolo Bonzini 4471c50d8ae3SPaolo Bonzini /* 4472c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4473c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4474c50d8ae3SPaolo Bonzini */ 4475c50d8ae3SPaolo Bonzini 4476c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4477c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4478c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4479c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4480c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4481c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4482c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4483c50d8ae3SPaolo Bonzini u8 smepf = 0; 4484c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4485c50d8ae3SPaolo Bonzini u8 smapf = 0; 4486c50d8ae3SPaolo Bonzini 4487c50d8ae3SPaolo Bonzini if (!ept) { 4488c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4489c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4490c50d8ae3SPaolo Bonzini 4491c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 449290599c28SSean Christopherson if (!efer_nx) 4493c50d8ae3SPaolo Bonzini ff = 0; 4494c50d8ae3SPaolo Bonzini 4495c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4496c50d8ae3SPaolo Bonzini if (!cr0_wp) 4497c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4498c50d8ae3SPaolo Bonzini 4499c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4500c50d8ae3SPaolo Bonzini if (cr4_smep) 4501c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4502c50d8ae3SPaolo Bonzini 4503c50d8ae3SPaolo Bonzini /* 4504c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4505c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4506c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4507c50d8ae3SPaolo Bonzini * conditions are true: 4508c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4509c50d8ae3SPaolo Bonzini * - A user page is accessed 4510c50d8ae3SPaolo Bonzini * - The access is not a fetch 4511c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4512c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4513c50d8ae3SPaolo Bonzini * 4514c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4515c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4516c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4517c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4518c50d8ae3SPaolo Bonzini */ 4519c50d8ae3SPaolo Bonzini if (cr4_smap) 4520c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4521c50d8ae3SPaolo Bonzini } 4522c50d8ae3SPaolo Bonzini 4523c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4524c50d8ae3SPaolo Bonzini } 4525c50d8ae3SPaolo Bonzini } 4526c50d8ae3SPaolo Bonzini 4527c50d8ae3SPaolo Bonzini /* 4528c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4529c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4530c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4531c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4532c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4533c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4534c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4535c50d8ae3SPaolo Bonzini * 4536c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4537c50d8ae3SPaolo Bonzini * page tables and the machine state: 4538c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4539c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4540c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4541c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4542c50d8ae3SPaolo Bonzini * 4543c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4544c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4545c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4546c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4547c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4548c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4549c50d8ae3SPaolo Bonzini * only will be masked away. 4550c50d8ae3SPaolo Bonzini */ 45512e4c0661SSean Christopherson static void update_pkru_bitmask(struct kvm_mmu *mmu) 4552c50d8ae3SPaolo Bonzini { 4553c50d8ae3SPaolo Bonzini unsigned bit; 4554c50d8ae3SPaolo Bonzini bool wp; 4555c50d8ae3SPaolo Bonzini 45562e4c0661SSean Christopherson if (!is_cr4_pke(mmu)) { 4557c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4558c50d8ae3SPaolo Bonzini return; 4559c50d8ae3SPaolo Bonzini } 4560c50d8ae3SPaolo Bonzini 45612e4c0661SSean Christopherson wp = is_cr0_wp(mmu); 4562c50d8ae3SPaolo Bonzini 4563c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4564c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4565c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4566c50d8ae3SPaolo Bonzini 4567c50d8ae3SPaolo Bonzini pfec = bit << 1; 4568c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4569c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4570c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4571c50d8ae3SPaolo Bonzini 4572c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4573c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4574c50d8ae3SPaolo Bonzini 4575c50d8ae3SPaolo Bonzini /* 4576c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4577c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4578c50d8ae3SPaolo Bonzini */ 4579c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4580c50d8ae3SPaolo Bonzini /* 4581c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4582c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4583c50d8ae3SPaolo Bonzini */ 4584c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4585c50d8ae3SPaolo Bonzini 4586c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4587c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4588c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4589c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4590c50d8ae3SPaolo Bonzini 4591c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4592c50d8ae3SPaolo Bonzini } 4593c50d8ae3SPaolo Bonzini } 4594c50d8ae3SPaolo Bonzini 4595533f9a4bSSean Christopherson static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu, 4596533f9a4bSSean Christopherson struct kvm_mmu *mmu) 4597c50d8ae3SPaolo Bonzini { 4598533f9a4bSSean Christopherson if (!is_cr0_pg(mmu)) 4599533f9a4bSSean Christopherson return; 4600c50d8ae3SPaolo Bonzini 4601533f9a4bSSean Christopherson reset_rsvds_bits_mask(vcpu, mmu); 4602533f9a4bSSean Christopherson update_permission_bitmask(mmu, false); 4603533f9a4bSSean Christopherson update_pkru_bitmask(mmu); 4604c50d8ae3SPaolo Bonzini } 4605c50d8ae3SPaolo Bonzini 4606fe660f72SSean Christopherson static void paging64_init_context(struct kvm_mmu *context) 4607c50d8ae3SPaolo Bonzini { 4608c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4609c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4610c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4611c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4612c50d8ae3SPaolo Bonzini context->direct_map = false; 4613c50d8ae3SPaolo Bonzini } 4614c50d8ae3SPaolo Bonzini 461584a16226SSean Christopherson static void paging32_init_context(struct kvm_mmu *context) 4616c50d8ae3SPaolo Bonzini { 4617c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4618c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4619c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4620c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4621c50d8ae3SPaolo Bonzini context->direct_map = false; 4622c50d8ae3SPaolo Bonzini } 4623c50d8ae3SPaolo Bonzini 46248626c120SSean Christopherson static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu, 46258626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 4626c50d8ae3SPaolo Bonzini { 4627c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4628c50d8ae3SPaolo Bonzini 4629ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4630ca8d664fSSean Christopherson ext.cr0_pg = 1; 46318626c120SSean Christopherson ext.cr4_pae = ____is_cr4_pae(regs); 46328626c120SSean Christopherson ext.cr4_smep = ____is_cr4_smep(regs); 46338626c120SSean Christopherson ext.cr4_smap = ____is_cr4_smap(regs); 46348626c120SSean Christopherson ext.cr4_pse = ____is_cr4_pse(regs); 463584c679f5SSean Christopherson 463684c679f5SSean Christopherson /* PKEY and LA57 are active iff long mode is active. */ 463784c679f5SSean Christopherson ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs); 463884c679f5SSean Christopherson ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs); 4639ca8d664fSSean Christopherson } 4640c50d8ae3SPaolo Bonzini 4641c50d8ae3SPaolo Bonzini ext.valid = 1; 4642c50d8ae3SPaolo Bonzini 4643c50d8ae3SPaolo Bonzini return ext; 4644c50d8ae3SPaolo Bonzini } 4645c50d8ae3SPaolo Bonzini 4646c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 46478626c120SSean Christopherson struct kvm_mmu_role_regs *regs, 4648c50d8ae3SPaolo Bonzini bool base_only) 4649c50d8ae3SPaolo Bonzini { 4650c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4651c50d8ae3SPaolo Bonzini 4652c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4653ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4654167f8a5cSSean Christopherson role.base.efer_nx = ____is_efer_nx(regs); 46558626c120SSean Christopherson role.base.cr0_wp = ____is_cr0_wp(regs); 4656ca8d664fSSean Christopherson } 4657c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4658c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4659c50d8ae3SPaolo Bonzini 4660c50d8ae3SPaolo Bonzini if (base_only) 4661c50d8ae3SPaolo Bonzini return role; 4662c50d8ae3SPaolo Bonzini 46638626c120SSean Christopherson role.ext = kvm_calc_mmu_role_ext(vcpu, regs); 4664c50d8ae3SPaolo Bonzini 4665c50d8ae3SPaolo Bonzini return role; 4666c50d8ae3SPaolo Bonzini } 4667c50d8ae3SPaolo Bonzini 4668d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4669d468d94bSSean Christopherson { 4670746700d2SWei Huang /* tdp_root_level is architecture forced level, use it if nonzero */ 4671746700d2SWei Huang if (tdp_root_level) 4672746700d2SWei Huang return tdp_root_level; 4673746700d2SWei Huang 4674d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 467583013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4676d468d94bSSean Christopherson return 4; 4677d468d94bSSean Christopherson 467883013059SSean Christopherson return max_tdp_level; 4679d468d94bSSean Christopherson } 4680d468d94bSSean Christopherson 4681c50d8ae3SPaolo Bonzini static union kvm_mmu_role 46828626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, 46838626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4684c50d8ae3SPaolo Bonzini { 46858626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4686c50d8ae3SPaolo Bonzini 4687c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4688d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4689c50d8ae3SPaolo Bonzini role.base.direct = true; 4690c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4691c50d8ae3SPaolo Bonzini 4692c50d8ae3SPaolo Bonzini return role; 4693c50d8ae3SPaolo Bonzini } 4694c50d8ae3SPaolo Bonzini 4695c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4696c50d8ae3SPaolo Bonzini { 46978c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 46988626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4699c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 47008626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, false); 4701c50d8ae3SPaolo Bonzini 4702c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4703c50d8ae3SPaolo Bonzini return; 4704c50d8ae3SPaolo Bonzini 4705c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 47067a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4707c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 47085efac074SPaolo Bonzini context->invlpg = NULL; 4709d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4710c50d8ae3SPaolo Bonzini context->direct_map = true; 4711d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4712c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4713c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4714f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(®s); 4715c50d8ae3SPaolo Bonzini 471636f26787SSean Christopherson if (!is_cr0_pg(context)) 4717c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 471836f26787SSean Christopherson else if (is_cr4_pae(context)) 4719c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4720f4bd6f73SSean Christopherson else 4721c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4722c50d8ae3SPaolo Bonzini 4723533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4724c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4725c50d8ae3SPaolo Bonzini } 4726c50d8ae3SPaolo Bonzini 4727c50d8ae3SPaolo Bonzini static union kvm_mmu_role 47288626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, 47298626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4730c50d8ae3SPaolo Bonzini { 47318626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4732c50d8ae3SPaolo Bonzini 47338626c120SSean Christopherson role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs); 47348626c120SSean Christopherson role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs); 4735ca8d664fSSean Christopherson role.base.gpte_is_8_bytes = ____is_cr0_pg(regs) && ____is_cr4_pae(regs); 4736c50d8ae3SPaolo Bonzini 473759505b55SSean Christopherson return role; 473859505b55SSean Christopherson } 473959505b55SSean Christopherson 474059505b55SSean Christopherson static union kvm_mmu_role 47418626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, 47428626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 474359505b55SSean Christopherson { 474459505b55SSean Christopherson union kvm_mmu_role role = 47458626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, base_only); 474659505b55SSean Christopherson 47478626c120SSean Christopherson role.base.direct = !____is_cr0_pg(regs); 474859505b55SSean Christopherson 47498626c120SSean Christopherson if (!____is_efer_lma(regs)) 4750c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 47518626c120SSean Christopherson else if (____is_cr4_la57(regs)) 4752c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4753c50d8ae3SPaolo Bonzini else 4754c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4755c50d8ae3SPaolo Bonzini 4756c50d8ae3SPaolo Bonzini return role; 4757c50d8ae3SPaolo Bonzini } 4758c50d8ae3SPaolo Bonzini 47598c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 4760594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs, 47618c008659SPaolo Bonzini union kvm_mmu_role new_role) 4762c50d8ae3SPaolo Bonzini { 476318db1b17SSean Christopherson if (new_role.as_u64 == context->mmu_role.as_u64) 476418db1b17SSean Christopherson return; 4765c50d8ae3SPaolo Bonzini 4766c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 476718db1b17SSean Christopherson 476836f26787SSean Christopherson if (!is_cr0_pg(context)) 476984a16226SSean Christopherson nonpaging_init_context(context); 477036f26787SSean Christopherson else if (is_cr4_pae(context)) 4771fe660f72SSean Christopherson paging64_init_context(context); 4772c50d8ae3SPaolo Bonzini else 477384a16226SSean Christopherson paging32_init_context(context); 4774f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(regs); 4775c50d8ae3SPaolo Bonzini 4776533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4777d555f705SSean Christopherson context->shadow_root_level = new_role.base.level; 4778d555f705SSean Christopherson 4779c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4780c50d8ae3SPaolo Bonzini } 47810f04a2acSVitaly Kuznetsov 4782594e91a1SSean Christopherson static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, 4783594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs) 47840f04a2acSVitaly Kuznetsov { 47858c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 47860f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 47878626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false); 47880f04a2acSVitaly Kuznetsov 4789594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, regs, new_role); 47900f04a2acSVitaly Kuznetsov } 47910f04a2acSVitaly Kuznetsov 479259505b55SSean Christopherson static union kvm_mmu_role 47938626c120SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu, 47948626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 479559505b55SSean Christopherson { 479659505b55SSean Christopherson union kvm_mmu_role role = 47978626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 479859505b55SSean Christopherson 479959505b55SSean Christopherson role.base.direct = false; 4800d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 480159505b55SSean Christopherson 480259505b55SSean Christopherson return role; 480359505b55SSean Christopherson } 480459505b55SSean Christopherson 4805dbc4739bSSean Christopherson void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4806dbc4739bSSean Christopherson unsigned long cr4, u64 efer, gpa_t nested_cr3) 48070f04a2acSVitaly Kuznetsov { 48088c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4809594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 4810594e91a1SSean Christopherson .cr0 = cr0, 4811594e91a1SSean Christopherson .cr4 = cr4, 4812594e91a1SSean Christopherson .efer = efer, 4813594e91a1SSean Christopherson }; 48148626c120SSean Christopherson union kvm_mmu_role new_role; 48150f04a2acSVitaly Kuznetsov 48168626c120SSean Christopherson new_role = kvm_calc_shadow_npt_root_page_role(vcpu, ®s); 4817a506fdd2SVitaly Kuznetsov 4818b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base); 4819a3322d5cSSean Christopherson 4820594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, ®s, new_role); 48210f04a2acSVitaly Kuznetsov } 48220f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4823c50d8ae3SPaolo Bonzini 4824c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4825c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4826bb1fcc70SSean Christopherson bool execonly, u8 level) 4827c50d8ae3SPaolo Bonzini { 4828c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4829c50d8ae3SPaolo Bonzini 4830c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4831c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4832c50d8ae3SPaolo Bonzini 4833bb1fcc70SSean Christopherson role.base.level = level; 4834c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4835c50d8ae3SPaolo Bonzini role.base.direct = false; 4836c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4837c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4838c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4839c50d8ae3SPaolo Bonzini 4840cd6767c3SSean Christopherson /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */ 4841cd6767c3SSean Christopherson role.ext.word = 0; 4842c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4843cd6767c3SSean Christopherson role.ext.valid = 1; 4844c50d8ae3SPaolo Bonzini 4845c50d8ae3SPaolo Bonzini return role; 4846c50d8ae3SPaolo Bonzini } 4847c50d8ae3SPaolo Bonzini 4848c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4849c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 4850c50d8ae3SPaolo Bonzini { 48518c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4852bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4853c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4854c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4855bb1fcc70SSean Christopherson execonly, level); 4856c50d8ae3SPaolo Bonzini 4857b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base); 4858c50d8ae3SPaolo Bonzini 4859c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4860c50d8ae3SPaolo Bonzini return; 4861c50d8ae3SPaolo Bonzini 486218db1b17SSean Christopherson context->mmu_role.as_u64 = new_role.as_u64; 486318db1b17SSean Christopherson 4864bb1fcc70SSean Christopherson context->shadow_root_level = level; 4865c50d8ae3SPaolo Bonzini 4866c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4867c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4868c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4869c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4870c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4871bb1fcc70SSean Christopherson context->root_level = level; 4872c50d8ae3SPaolo Bonzini context->direct_map = false; 4873c50d8ae3SPaolo Bonzini 4874c596f147SSean Christopherson update_permission_bitmask(context, true); 48752e4c0661SSean Christopherson update_pkru_bitmask(context); 4876c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 4877c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4878c50d8ae3SPaolo Bonzini } 4879c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4880c50d8ae3SPaolo Bonzini 4881c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4882c50d8ae3SPaolo Bonzini { 48838c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4884594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4885c50d8ae3SPaolo Bonzini 4886594e91a1SSean Christopherson kvm_init_shadow_mmu(vcpu, ®s); 4887929d1cfaSPaolo Bonzini 4888d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4889c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4890c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4891c50d8ae3SPaolo Bonzini } 4892c50d8ae3SPaolo Bonzini 48938626c120SSean Christopherson static union kvm_mmu_role 48948626c120SSean Christopherson kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu, struct kvm_mmu_role_regs *regs) 4895654430efSSean Christopherson { 48968626c120SSean Christopherson union kvm_mmu_role role; 48978626c120SSean Christopherson 48988626c120SSean Christopherson role = kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 4899654430efSSean Christopherson 4900654430efSSean Christopherson /* 4901654430efSSean Christopherson * Nested MMUs are used only for walking L2's gva->gpa, they never have 4902654430efSSean Christopherson * shadow pages of their own and so "direct" has no meaning. Set it 4903654430efSSean Christopherson * to "true" to try to detect bogus usage of the nested MMU. 4904654430efSSean Christopherson */ 4905654430efSSean Christopherson role.base.direct = true; 4906f4bd6f73SSean Christopherson role.base.level = role_regs_to_root_level(regs); 4907654430efSSean Christopherson return role; 4908654430efSSean Christopherson } 4909654430efSSean Christopherson 4910c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4911c50d8ae3SPaolo Bonzini { 49128626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 49138626c120SSean Christopherson union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu, ®s); 4914c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4915c50d8ae3SPaolo Bonzini 4916c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4917c50d8ae3SPaolo Bonzini return; 4918c50d8ae3SPaolo Bonzini 4919c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4920d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4921c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4922c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 49235472fcd4SSean Christopherson g_context->root_level = new_role.base.level; 4924c50d8ae3SPaolo Bonzini 4925c50d8ae3SPaolo Bonzini /* 49265efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 49275efac074SPaolo Bonzini * SPTEs. 49285efac074SPaolo Bonzini */ 49295efac074SPaolo Bonzini g_context->invlpg = NULL; 49305efac074SPaolo Bonzini 49315efac074SPaolo Bonzini /* 4932c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4933c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4934c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4935c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4936c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4937c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4938c50d8ae3SPaolo Bonzini */ 4939fa4b5588SSean Christopherson if (!is_paging(vcpu)) 4940c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 4941fa4b5588SSean Christopherson else if (is_long_mode(vcpu)) 4942c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4943fa4b5588SSean Christopherson else if (is_pae(vcpu)) 4944c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4945fa4b5588SSean Christopherson else 4946c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 4947fa4b5588SSean Christopherson 4948533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, g_context); 4949c50d8ae3SPaolo Bonzini } 4950c50d8ae3SPaolo Bonzini 4951c9060662SSean Christopherson void kvm_init_mmu(struct kvm_vcpu *vcpu) 4952c50d8ae3SPaolo Bonzini { 4953c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4954c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4955c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4956c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4957c50d8ae3SPaolo Bonzini else 4958c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4959c50d8ae3SPaolo Bonzini } 4960c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4961c50d8ae3SPaolo Bonzini 4962c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4963c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4964c50d8ae3SPaolo Bonzini { 49658626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4966c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4967c50d8ae3SPaolo Bonzini 4968c50d8ae3SPaolo Bonzini if (tdp_enabled) 49698626c120SSean Christopherson role = kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, true); 4970c50d8ae3SPaolo Bonzini else 49718626c120SSean Christopherson role = kvm_calc_shadow_mmu_root_page_role(vcpu, ®s, true); 4972c50d8ae3SPaolo Bonzini 4973c50d8ae3SPaolo Bonzini return role.base; 4974c50d8ae3SPaolo Bonzini } 4975c50d8ae3SPaolo Bonzini 497649c6f875SSean Christopherson void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) 497749c6f875SSean Christopherson { 497849c6f875SSean Christopherson /* 497949c6f875SSean Christopherson * Invalidate all MMU roles to force them to reinitialize as CPUID 498049c6f875SSean Christopherson * information is factored into reserved bit calculations. 498149c6f875SSean Christopherson */ 498249c6f875SSean Christopherson vcpu->arch.root_mmu.mmu_role.ext.valid = 0; 498349c6f875SSean Christopherson vcpu->arch.guest_mmu.mmu_role.ext.valid = 0; 498449c6f875SSean Christopherson vcpu->arch.nested_mmu.mmu_role.ext.valid = 0; 498549c6f875SSean Christopherson kvm_mmu_reset_context(vcpu); 498663f5a190SSean Christopherson 498763f5a190SSean Christopherson /* 498863f5a190SSean Christopherson * KVM does not correctly handle changing guest CPUID after KVM_RUN, as 498963f5a190SSean Christopherson * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't 499063f5a190SSean Christopherson * tracked in kvm_mmu_page_role. As a result, KVM may miss guest page 499163f5a190SSean Christopherson * faults due to reusing SPs/SPTEs. Alert userspace, but otherwise 499263f5a190SSean Christopherson * sweep the problem under the rug. 499363f5a190SSean Christopherson * 499463f5a190SSean Christopherson * KVM's horrific CPUID ABI makes the problem all but impossible to 499563f5a190SSean Christopherson * solve, as correctly handling multiple vCPU models (with respect to 499663f5a190SSean Christopherson * paging and physical address properties) in a single VM would require 499763f5a190SSean Christopherson * tracking all relevant CPUID information in kvm_mmu_page_role. That 499863f5a190SSean Christopherson * is very undesirable as it would double the memory requirements for 499963f5a190SSean Christopherson * gfn_track (see struct kvm_mmu_page_role comments), and in practice 500063f5a190SSean Christopherson * no sane VMM mucks with the core vCPU model on the fly. 500163f5a190SSean Christopherson */ 500263f5a190SSean Christopherson if (vcpu->arch.last_vmentry_cpu != -1) { 500363f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} after KVM_RUN may cause guest instability\n"); 500463f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} will fail after KVM_RUN starting with Linux 5.16\n"); 500563f5a190SSean Christopherson } 500649c6f875SSean Christopherson } 500749c6f875SSean Christopherson 5008c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 5009c50d8ae3SPaolo Bonzini { 5010c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5011c9060662SSean Christopherson kvm_init_mmu(vcpu); 5012c50d8ae3SPaolo Bonzini } 5013c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 5014c50d8ae3SPaolo Bonzini 5015c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 5016c50d8ae3SPaolo Bonzini { 5017c50d8ae3SPaolo Bonzini int r; 5018c50d8ae3SPaolo Bonzini 5019378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 5020c50d8ae3SPaolo Bonzini if (r) 5021c50d8ae3SPaolo Bonzini goto out; 5022748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 5023c50d8ae3SPaolo Bonzini if (r) 5024c50d8ae3SPaolo Bonzini goto out; 50254a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 50266e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 50276e6ec584SSean Christopherson else 50286e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 5029c50d8ae3SPaolo Bonzini if (r) 5030c50d8ae3SPaolo Bonzini goto out; 5031a91f387bSSean Christopherson 5032a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 5033a91f387bSSean Christopherson 5034727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 5035b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 5036c50d8ae3SPaolo Bonzini out: 5037c50d8ae3SPaolo Bonzini return r; 5038c50d8ae3SPaolo Bonzini } 5039c50d8ae3SPaolo Bonzini 5040c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 5041c50d8ae3SPaolo Bonzini { 5042c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 5043c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 5044c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 5045c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 5046c50d8ae3SPaolo Bonzini } 5047c50d8ae3SPaolo Bonzini 5048c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 5049c50d8ae3SPaolo Bonzini { 5050c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 5051c50d8ae3SPaolo Bonzini return false; 5052c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 5053c50d8ae3SPaolo Bonzini return true; 5054c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 5055c50d8ae3SPaolo Bonzini return true; 5056c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 5057c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 5058c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 5059c50d8ae3SPaolo Bonzini } 5060c50d8ae3SPaolo Bonzini 5061c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 5062c50d8ae3SPaolo Bonzini int *bytes) 5063c50d8ae3SPaolo Bonzini { 5064c50d8ae3SPaolo Bonzini u64 gentry = 0; 5065c50d8ae3SPaolo Bonzini int r; 5066c50d8ae3SPaolo Bonzini 5067c50d8ae3SPaolo Bonzini /* 5068c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 5069c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 5070c50d8ae3SPaolo Bonzini * when they have the same mode. 5071c50d8ae3SPaolo Bonzini */ 5072c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5073c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5074c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5075c50d8ae3SPaolo Bonzini *bytes = 8; 5076c50d8ae3SPaolo Bonzini } 5077c50d8ae3SPaolo Bonzini 5078c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5079c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5080c50d8ae3SPaolo Bonzini if (r) 5081c50d8ae3SPaolo Bonzini gentry = 0; 5082c50d8ae3SPaolo Bonzini } 5083c50d8ae3SPaolo Bonzini 5084c50d8ae3SPaolo Bonzini return gentry; 5085c50d8ae3SPaolo Bonzini } 5086c50d8ae3SPaolo Bonzini 5087c50d8ae3SPaolo Bonzini /* 5088c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5089c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5090c50d8ae3SPaolo Bonzini */ 5091c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5092c50d8ae3SPaolo Bonzini { 5093c50d8ae3SPaolo Bonzini /* 5094c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5095c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5096c50d8ae3SPaolo Bonzini */ 50973bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5098c50d8ae3SPaolo Bonzini return false; 5099c50d8ae3SPaolo Bonzini 5100c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5101c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5102c50d8ae3SPaolo Bonzini } 5103c50d8ae3SPaolo Bonzini 5104c50d8ae3SPaolo Bonzini /* 5105c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5106c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5107c50d8ae3SPaolo Bonzini */ 5108c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5109c50d8ae3SPaolo Bonzini int bytes) 5110c50d8ae3SPaolo Bonzini { 5111c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5112c50d8ae3SPaolo Bonzini 5113c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5114c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5115c50d8ae3SPaolo Bonzini 5116c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5117c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 5118c50d8ae3SPaolo Bonzini 5119c50d8ae3SPaolo Bonzini /* 5120c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5121c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5122c50d8ae3SPaolo Bonzini */ 5123c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5124c50d8ae3SPaolo Bonzini return false; 5125c50d8ae3SPaolo Bonzini 5126c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5127c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5128c50d8ae3SPaolo Bonzini 5129c50d8ae3SPaolo Bonzini return misaligned; 5130c50d8ae3SPaolo Bonzini } 5131c50d8ae3SPaolo Bonzini 5132c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5133c50d8ae3SPaolo Bonzini { 5134c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5135c50d8ae3SPaolo Bonzini u64 *spte; 5136c50d8ae3SPaolo Bonzini int level; 5137c50d8ae3SPaolo Bonzini 5138c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5139c50d8ae3SPaolo Bonzini level = sp->role.level; 5140c50d8ae3SPaolo Bonzini *nspte = 1; 5141c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 5142c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5143c50d8ae3SPaolo Bonzini /* 5144c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5145c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5146c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5147c50d8ae3SPaolo Bonzini */ 5148c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5149c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5150c50d8ae3SPaolo Bonzini page_offset <<= 1; 5151c50d8ae3SPaolo Bonzini *nspte = 2; 5152c50d8ae3SPaolo Bonzini } 5153c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5154c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5155c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5156c50d8ae3SPaolo Bonzini return NULL; 5157c50d8ae3SPaolo Bonzini } 5158c50d8ae3SPaolo Bonzini 5159c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5160c50d8ae3SPaolo Bonzini return spte; 5161c50d8ae3SPaolo Bonzini } 5162c50d8ae3SPaolo Bonzini 5163c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5164c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5165c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5166c50d8ae3SPaolo Bonzini { 5167c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5168c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5169c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5170c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5171c50d8ae3SPaolo Bonzini int npte; 517206152b2dSLai Jiangshan bool flush = false; 5173c50d8ae3SPaolo Bonzini 5174c50d8ae3SPaolo Bonzini /* 5175c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5176c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5177c50d8ae3SPaolo Bonzini */ 5178c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5179c50d8ae3SPaolo Bonzini return; 5180c50d8ae3SPaolo Bonzini 5181c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5182c50d8ae3SPaolo Bonzini 5183c50d8ae3SPaolo Bonzini /* 5184c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5185d9f6e12fSIngo Molnar * or not since pte prefetch is skipped if it does not have 5186c50d8ae3SPaolo Bonzini * enough objects in the cache. 5187c50d8ae3SPaolo Bonzini */ 5188378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5189c50d8ae3SPaolo Bonzini 5190531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5191c50d8ae3SPaolo Bonzini 5192c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5193c50d8ae3SPaolo Bonzini 5194c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5195c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5196c50d8ae3SPaolo Bonzini 5197c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5198c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5199c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5200c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5201c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5202c50d8ae3SPaolo Bonzini continue; 5203c50d8ae3SPaolo Bonzini } 5204c50d8ae3SPaolo Bonzini 5205c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5206c50d8ae3SPaolo Bonzini if (!spte) 5207c50d8ae3SPaolo Bonzini continue; 5208c50d8ae3SPaolo Bonzini 5209c50d8ae3SPaolo Bonzini while (npte--) { 5210c50d8ae3SPaolo Bonzini entry = *spte; 52112de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5212c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5213c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5214c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 521506152b2dSLai Jiangshan flush = true; 5216c50d8ae3SPaolo Bonzini ++spte; 5217c50d8ae3SPaolo Bonzini } 5218c50d8ae3SPaolo Bonzini } 521906152b2dSLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 5220c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5221531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5222c50d8ae3SPaolo Bonzini } 5223c50d8ae3SPaolo Bonzini 5224736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5225c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5226c50d8ae3SPaolo Bonzini { 522792daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5228c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5229c50d8ae3SPaolo Bonzini 52306948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5231ddce6208SSean Christopherson return RET_PF_RETRY; 5232ddce6208SSean Christopherson 5233c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5234c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5235736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5236c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5237c50d8ae3SPaolo Bonzini goto emulate; 5238c50d8ae3SPaolo Bonzini } 5239c50d8ae3SPaolo Bonzini 5240c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 52417a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 52427a02674dSSean Christopherson lower_32_bits(error_code), false); 524319025e7bSSean Christopherson if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) 52447b367bc9SSean Christopherson return -EIO; 5245c50d8ae3SPaolo Bonzini } 5246c50d8ae3SPaolo Bonzini 5247c50d8ae3SPaolo Bonzini if (r < 0) 5248c50d8ae3SPaolo Bonzini return r; 524983a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 525083a2ba4cSSean Christopherson return 1; 5251c50d8ae3SPaolo Bonzini 5252c50d8ae3SPaolo Bonzini /* 5253c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5254c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5255c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5256c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5257c50d8ae3SPaolo Bonzini * and resume the guest. 5258c50d8ae3SPaolo Bonzini */ 5259c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5260c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5261736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5262c50d8ae3SPaolo Bonzini return 1; 5263c50d8ae3SPaolo Bonzini } 5264c50d8ae3SPaolo Bonzini 5265c50d8ae3SPaolo Bonzini /* 5266c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5267c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5268c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5269c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5270c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5271c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5272c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5273c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5274c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5275c50d8ae3SPaolo Bonzini */ 5276736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 527792daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5278c50d8ae3SPaolo Bonzini emulate: 5279736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5280c50d8ae3SPaolo Bonzini insn_len); 5281c50d8ae3SPaolo Bonzini } 5282c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5283c50d8ae3SPaolo Bonzini 52845efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 52855efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5286c50d8ae3SPaolo Bonzini { 5287c50d8ae3SPaolo Bonzini int i; 5288c50d8ae3SPaolo Bonzini 52895efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 52905efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 52915efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5292c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5293c50d8ae3SPaolo Bonzini return; 5294c50d8ae3SPaolo Bonzini 5295b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 52965efac074SPaolo Bonzini } 52975efac074SPaolo Bonzini 52985efac074SPaolo Bonzini if (!mmu->invlpg) 52995efac074SPaolo Bonzini return; 53005efac074SPaolo Bonzini 53015efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5302c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5303c50d8ae3SPaolo Bonzini 5304c50d8ae3SPaolo Bonzini /* 5305c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5306c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5307c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5308c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5309c50d8ae3SPaolo Bonzini * just always sync it. 5310c50d8ae3SPaolo Bonzini * 5311c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5312c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5313c50d8ae3SPaolo Bonzini * for them. 5314c50d8ae3SPaolo Bonzini */ 5315c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5316c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5317c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 53185efac074SPaolo Bonzini } else { 53195efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 53205efac074SPaolo Bonzini } 53215efac074SPaolo Bonzini } 5322c50d8ae3SPaolo Bonzini 53235efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 53245efac074SPaolo Bonzini { 53255efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5326c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5327c50d8ae3SPaolo Bonzini } 5328c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5329c50d8ae3SPaolo Bonzini 53305efac074SPaolo Bonzini 5331c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5332c50d8ae3SPaolo Bonzini { 5333c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5334c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5335c50d8ae3SPaolo Bonzini uint i; 5336c50d8ae3SPaolo Bonzini 5337c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5338c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5339c50d8ae3SPaolo Bonzini tlb_flush = true; 5340c50d8ae3SPaolo Bonzini } 5341c50d8ae3SPaolo Bonzini 5342c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5343c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5344be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5345c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5346c50d8ae3SPaolo Bonzini tlb_flush = true; 5347c50d8ae3SPaolo Bonzini } 5348c50d8ae3SPaolo Bonzini } 5349c50d8ae3SPaolo Bonzini 5350c50d8ae3SPaolo Bonzini if (tlb_flush) 5351b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5352c50d8ae3SPaolo Bonzini 5353c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5354c50d8ae3SPaolo Bonzini 5355c50d8ae3SPaolo Bonzini /* 5356c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5357c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5358c50d8ae3SPaolo Bonzini * for them. 5359c50d8ae3SPaolo Bonzini */ 5360c50d8ae3SPaolo Bonzini } 5361c50d8ae3SPaolo Bonzini 5362746700d2SWei Huang void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 5363746700d2SWei Huang int tdp_max_root_level, int tdp_huge_page_level) 5364c50d8ae3SPaolo Bonzini { 5365bde77235SSean Christopherson tdp_enabled = enable_tdp; 5366746700d2SWei Huang tdp_root_level = tdp_forced_root_level; 536783013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5368703c335dSSean Christopherson 5369703c335dSSean Christopherson /* 53701d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5371703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5372703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5373703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5374703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5375703c335dSSean Christopherson */ 5376703c335dSSean Christopherson if (tdp_enabled) 53771d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5378703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 53791d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5380703c335dSSean Christopherson else 53811d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5382c50d8ae3SPaolo Bonzini } 5383bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5384c50d8ae3SPaolo Bonzini 5385c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5386269e9552SHamza Mahfooz typedef bool (*slot_level_handler) (struct kvm *kvm, 5387269e9552SHamza Mahfooz struct kvm_rmap_head *rmap_head, 5388269e9552SHamza Mahfooz const struct kvm_memory_slot *slot); 5389c50d8ae3SPaolo Bonzini 5390c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5391c50d8ae3SPaolo Bonzini static __always_inline bool 5392269e9552SHamza Mahfooz slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5393c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 53941a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 53951a61b7dbSSean Christopherson bool flush) 5396c50d8ae3SPaolo Bonzini { 5397c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5398c50d8ae3SPaolo Bonzini 5399c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5400c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5401c50d8ae3SPaolo Bonzini if (iterator.rmap) 54020a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5403c50d8ae3SPaolo Bonzini 5404531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5405302695a5SSean Christopherson if (flush && flush_on_yield) { 5406c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5407c50d8ae3SPaolo Bonzini start_gfn, 5408c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5409c50d8ae3SPaolo Bonzini flush = false; 5410c50d8ae3SPaolo Bonzini } 5411531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5412c50d8ae3SPaolo Bonzini } 5413c50d8ae3SPaolo Bonzini } 5414c50d8ae3SPaolo Bonzini 5415c50d8ae3SPaolo Bonzini return flush; 5416c50d8ae3SPaolo Bonzini } 5417c50d8ae3SPaolo Bonzini 5418c50d8ae3SPaolo Bonzini static __always_inline bool 5419269e9552SHamza Mahfooz slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5420c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5421302695a5SSean Christopherson bool flush_on_yield) 5422c50d8ae3SPaolo Bonzini { 5423c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5424c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5425c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 54261a61b7dbSSean Christopherson flush_on_yield, false); 5427c50d8ae3SPaolo Bonzini } 5428c50d8ae3SPaolo Bonzini 5429c50d8ae3SPaolo Bonzini static __always_inline bool 5430269e9552SHamza Mahfooz slot_handle_leaf(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5431302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5432c50d8ae3SPaolo Bonzini { 54333bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5434302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5435c50d8ae3SPaolo Bonzini } 5436c50d8ae3SPaolo Bonzini 5437c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5438c50d8ae3SPaolo Bonzini { 54394a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 54404a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5441c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 544203ca4589SSean Christopherson free_page((unsigned long)mmu->pml4_root); 5443cb0f722aSWei Huang free_page((unsigned long)mmu->pml5_root); 5444c50d8ae3SPaolo Bonzini } 5445c50d8ae3SPaolo Bonzini 544604d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5447c50d8ae3SPaolo Bonzini { 5448c50d8ae3SPaolo Bonzini struct page *page; 5449c50d8ae3SPaolo Bonzini int i; 5450c50d8ae3SPaolo Bonzini 545104d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 545204d28e37SSean Christopherson mmu->root_pgd = 0; 545304d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 545404d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 545504d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 545604d28e37SSean Christopherson 5457c50d8ae3SPaolo Bonzini /* 5458c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5459c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5460c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5461c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 546204d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 546304d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 546404d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 546504d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 546604d45551SSean Christopherson * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots(). 5467c50d8ae3SPaolo Bonzini */ 5468d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5469c50d8ae3SPaolo Bonzini return 0; 5470c50d8ae3SPaolo Bonzini 5471c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5472c50d8ae3SPaolo Bonzini if (!page) 5473c50d8ae3SPaolo Bonzini return -ENOMEM; 5474c50d8ae3SPaolo Bonzini 5475c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 54764a98623dSSean Christopherson 54774a98623dSSean Christopherson /* 54784a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 54794a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 54804a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 54814a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 54824a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 54834a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 54844a98623dSSean Christopherson */ 54854a98623dSSean Christopherson if (!tdp_enabled) 54864a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 54874a98623dSSean Christopherson else 54884a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 54894a98623dSSean Christopherson 5490c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5491c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5492c50d8ae3SPaolo Bonzini 5493c50d8ae3SPaolo Bonzini return 0; 5494c50d8ae3SPaolo Bonzini } 5495c50d8ae3SPaolo Bonzini 5496c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5497c50d8ae3SPaolo Bonzini { 5498c50d8ae3SPaolo Bonzini int ret; 5499c50d8ae3SPaolo Bonzini 55005962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 55015f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 55025f6078f9SSean Christopherson 55035962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 55045f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 55055962bfb7SSean Christopherson 550696880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 550796880883SSean Christopherson 5508c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5509c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5510c50d8ae3SPaolo Bonzini 5511c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5512c50d8ae3SPaolo Bonzini 551304d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5514c50d8ae3SPaolo Bonzini if (ret) 5515c50d8ae3SPaolo Bonzini return ret; 5516c50d8ae3SPaolo Bonzini 551704d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5518c50d8ae3SPaolo Bonzini if (ret) 5519c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5520c50d8ae3SPaolo Bonzini 5521c50d8ae3SPaolo Bonzini return ret; 5522c50d8ae3SPaolo Bonzini fail_allocate_root: 5523c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5524c50d8ae3SPaolo Bonzini return ret; 5525c50d8ae3SPaolo Bonzini } 5526c50d8ae3SPaolo Bonzini 5527c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5528c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5529c50d8ae3SPaolo Bonzini { 5530c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5531c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5532c50d8ae3SPaolo Bonzini 5533c50d8ae3SPaolo Bonzini restart: 5534c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5535c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5536c50d8ae3SPaolo Bonzini /* 5537c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5538c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5539c50d8ae3SPaolo Bonzini */ 5540c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5541c50d8ae3SPaolo Bonzini break; 5542c50d8ae3SPaolo Bonzini 5543c50d8ae3SPaolo Bonzini /* 5544f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5545f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5546f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5547c50d8ae3SPaolo Bonzini */ 5548f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5549c50d8ae3SPaolo Bonzini continue; 5550c50d8ae3SPaolo Bonzini 5551c50d8ae3SPaolo Bonzini /* 5552c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5553c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5554c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5555c50d8ae3SPaolo Bonzini * be in active use by the guest. 5556c50d8ae3SPaolo Bonzini */ 5557c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5558531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5559c50d8ae3SPaolo Bonzini batch = 0; 5560c50d8ae3SPaolo Bonzini goto restart; 5561c50d8ae3SPaolo Bonzini } 5562c50d8ae3SPaolo Bonzini 5563c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5564c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5565c50d8ae3SPaolo Bonzini batch += nr_zapped; 5566c50d8ae3SPaolo Bonzini goto restart; 5567c50d8ae3SPaolo Bonzini } 5568c50d8ae3SPaolo Bonzini } 5569c50d8ae3SPaolo Bonzini 5570c50d8ae3SPaolo Bonzini /* 5571c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5572c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5573c50d8ae3SPaolo Bonzini * may reference the pages. 5574c50d8ae3SPaolo Bonzini */ 5575c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5576c50d8ae3SPaolo Bonzini } 5577c50d8ae3SPaolo Bonzini 5578c50d8ae3SPaolo Bonzini /* 5579c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5580c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5581c50d8ae3SPaolo Bonzini * 5582c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5583c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5584c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5585c50d8ae3SPaolo Bonzini * after calling the function. 5586c50d8ae3SPaolo Bonzini */ 5587c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5588c50d8ae3SPaolo Bonzini { 5589c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5590c50d8ae3SPaolo Bonzini 5591531810caSBen Gardon write_lock(&kvm->mmu_lock); 5592c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5593c50d8ae3SPaolo Bonzini 5594c50d8ae3SPaolo Bonzini /* 5595c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5596c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5597c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5598c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5599c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5600c50d8ae3SPaolo Bonzini */ 5601c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5602c50d8ae3SPaolo Bonzini 5603b7cccd39SBen Gardon /* In order to ensure all threads see this change when 5604b7cccd39SBen Gardon * handling the MMU reload signal, this must happen in the 5605b7cccd39SBen Gardon * same critical section as kvm_reload_remote_mmus, and 5606b7cccd39SBen Gardon * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages 5607b7cccd39SBen Gardon * could drop the MMU lock and yield. 5608b7cccd39SBen Gardon */ 5609b7cccd39SBen Gardon if (is_tdp_mmu_enabled(kvm)) 5610b7cccd39SBen Gardon kvm_tdp_mmu_invalidate_all_roots(kvm); 5611b7cccd39SBen Gardon 5612c50d8ae3SPaolo Bonzini /* 5613c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5614c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5615c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5616c50d8ae3SPaolo Bonzini * 5617c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5618c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5619c50d8ae3SPaolo Bonzini */ 5620c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5621c50d8ae3SPaolo Bonzini 5622c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5623faaf05b0SBen Gardon 5624531810caSBen Gardon write_unlock(&kvm->mmu_lock); 56254c6654bdSBen Gardon 56264c6654bdSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 56274c6654bdSBen Gardon read_lock(&kvm->mmu_lock); 56284c6654bdSBen Gardon kvm_tdp_mmu_zap_invalidated_roots(kvm); 56294c6654bdSBen Gardon read_unlock(&kvm->mmu_lock); 56304c6654bdSBen Gardon } 5631c50d8ae3SPaolo Bonzini } 5632c50d8ae3SPaolo Bonzini 5633c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5634c50d8ae3SPaolo Bonzini { 5635c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5636c50d8ae3SPaolo Bonzini } 5637c50d8ae3SPaolo Bonzini 5638c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5639c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5640c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5641c50d8ae3SPaolo Bonzini { 5642c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5643c50d8ae3SPaolo Bonzini } 5644c50d8ae3SPaolo Bonzini 5645c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5646c50d8ae3SPaolo Bonzini { 5647c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5648c50d8ae3SPaolo Bonzini 5649ce25681dSSean Christopherson spin_lock_init(&kvm->arch.mmu_unsync_pages_lock); 5650ce25681dSSean Christopherson 5651d501f747SBen Gardon if (!kvm_mmu_init_tdp_mmu(kvm)) 5652d501f747SBen Gardon /* 5653d501f747SBen Gardon * No smp_load/store wrappers needed here as we are in 5654d501f747SBen Gardon * VM init and there cannot be any memslots / other threads 5655d501f747SBen Gardon * accessing this struct kvm yet. 5656d501f747SBen Gardon */ 5657a2557408SBen Gardon kvm->arch.memslots_have_rmaps = true; 5658fe5db27dSBen Gardon 5659c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5660c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5661c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5662c50d8ae3SPaolo Bonzini } 5663c50d8ae3SPaolo Bonzini 5664c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5665c50d8ae3SPaolo Bonzini { 5666c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5667c50d8ae3SPaolo Bonzini 5668c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5669fe5db27dSBen Gardon 5670fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5671c50d8ae3SPaolo Bonzini } 5672c50d8ae3SPaolo Bonzini 567388f58535SMaxim Levitsky /* 567488f58535SMaxim Levitsky * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end 567588f58535SMaxim Levitsky * (not including it) 567688f58535SMaxim Levitsky */ 5677c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5678c50d8ae3SPaolo Bonzini { 5679c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5680c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5681c50d8ae3SPaolo Bonzini int i; 56821a61b7dbSSean Christopherson bool flush = false; 5683c50d8ae3SPaolo Bonzini 5684531810caSBen Gardon write_lock(&kvm->mmu_lock); 56855a324c24SSean Christopherson 5686edb298c6SMaxim Levitsky kvm_inc_notifier_count(kvm, gfn_start, gfn_end); 5687edb298c6SMaxim Levitsky 56885a324c24SSean Christopherson if (kvm_memslots_have_rmaps(kvm)) { 5689c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5690c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5691c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5692c50d8ae3SPaolo Bonzini gfn_t start, end; 5693c50d8ae3SPaolo Bonzini 5694c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5695c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5696c50d8ae3SPaolo Bonzini if (start >= end) 5697c50d8ae3SPaolo Bonzini continue; 5698c50d8ae3SPaolo Bonzini 5699269e9552SHamza Mahfooz flush = slot_handle_level_range(kvm, 5700269e9552SHamza Mahfooz (const struct kvm_memory_slot *) memslot, 5701e2209710SBen Gardon kvm_zap_rmapp, PG_LEVEL_4K, 5702e2209710SBen Gardon KVM_MAX_HUGEPAGE_LEVEL, start, 5703e2209710SBen Gardon end - 1, true, flush); 5704c50d8ae3SPaolo Bonzini } 5705c50d8ae3SPaolo Bonzini } 5706faaf05b0SBen Gardon if (flush) 57072822da44SMaxim Levitsky kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 57082822da44SMaxim Levitsky gfn_end - gfn_start); 5709e2209710SBen Gardon } 57106103bc07SBen Gardon 57116103bc07SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57126103bc07SBen Gardon for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 57136103bc07SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 57145a324c24SSean Christopherson gfn_end, flush); 57152822da44SMaxim Levitsky if (flush) 57162822da44SMaxim Levitsky kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 57172822da44SMaxim Levitsky gfn_end - gfn_start); 57186103bc07SBen Gardon } 57195a324c24SSean Christopherson 57205a324c24SSean Christopherson if (flush) 57215a324c24SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, gfn_end); 57225a324c24SSean Christopherson 5723edb298c6SMaxim Levitsky kvm_dec_notifier_count(kvm, gfn_start, gfn_end); 5724edb298c6SMaxim Levitsky 57255a324c24SSean Christopherson write_unlock(&kvm->mmu_lock); 5726c50d8ae3SPaolo Bonzini } 5727c50d8ae3SPaolo Bonzini 5728c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 57290a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5730269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5731c50d8ae3SPaolo Bonzini { 5732c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5733c50d8ae3SPaolo Bonzini } 5734c50d8ae3SPaolo Bonzini 5735c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 5736269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot, 57373c9bd400SJay Zhou int start_level) 5738c50d8ae3SPaolo Bonzini { 5739e2209710SBen Gardon bool flush = false; 5740c50d8ae3SPaolo Bonzini 5741e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5742531810caSBen Gardon write_lock(&kvm->mmu_lock); 57433c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5744e2209710SBen Gardon start_level, KVM_MAX_HUGEPAGE_LEVEL, 5745e2209710SBen Gardon false); 5746531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5747e2209710SBen Gardon } 5748c50d8ae3SPaolo Bonzini 574924ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 575024ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 575124ae4cfaSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 575224ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 575324ae4cfaSBen Gardon } 575424ae4cfaSBen Gardon 5755c50d8ae3SPaolo Bonzini /* 5756c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5757c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5758c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5759c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5760c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5761c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 57625fc3424fSSean Christopherson * have checked Host-writable | MMU-writable instead of 57635fc3424fSSean Christopherson * PT_WRITABLE_MASK, that means it does not depend on PT_WRITABLE_MASK 57645fc3424fSSean Christopherson * anymore. 5765c50d8ae3SPaolo Bonzini */ 5766c50d8ae3SPaolo Bonzini if (flush) 57677f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5768c50d8ae3SPaolo Bonzini } 5769c50d8ae3SPaolo Bonzini 5770c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 57710a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5772269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5773c50d8ae3SPaolo Bonzini { 5774c50d8ae3SPaolo Bonzini u64 *sptep; 5775c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5776c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5777c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5778c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5779c50d8ae3SPaolo Bonzini 5780c50d8ae3SPaolo Bonzini restart: 5781c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 578257354682SSean Christopherson sp = sptep_to_sp(sptep); 5783c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5784c50d8ae3SPaolo Bonzini 5785c50d8ae3SPaolo Bonzini /* 5786c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5787c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5788c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5789c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5790c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5791c50d8ae3SPaolo Bonzini */ 5792c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 57939eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 57949eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 579571f51d2cSMingwei Zhang pte_list_remove(kvm, rmap_head, sptep); 5796c50d8ae3SPaolo Bonzini 5797c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5798c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5799c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5800c50d8ae3SPaolo Bonzini else 5801c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5802c50d8ae3SPaolo Bonzini 5803c50d8ae3SPaolo Bonzini goto restart; 5804c50d8ae3SPaolo Bonzini } 5805c50d8ae3SPaolo Bonzini } 5806c50d8ae3SPaolo Bonzini 5807c50d8ae3SPaolo Bonzini return need_tlb_flush; 5808c50d8ae3SPaolo Bonzini } 5809c50d8ae3SPaolo Bonzini 5810c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5811269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5812c50d8ae3SPaolo Bonzini { 581331c65657SColin Ian King bool flush = false; 58149eba50f8SSean Christopherson 5815e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5816531810caSBen Gardon write_lock(&kvm->mmu_lock); 5817302695a5SSean Christopherson flush = slot_handle_leaf(kvm, slot, kvm_mmu_zap_collapsible_spte, true); 5818302695a5SSean Christopherson if (flush) 5819302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 5820531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5821e2209710SBen Gardon } 58222db6f772SBen Gardon 58232db6f772SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 58242db6f772SBen Gardon read_lock(&kvm->mmu_lock); 58252db6f772SBen Gardon flush = kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot, flush); 58262db6f772SBen Gardon if (flush) 58272db6f772SBen Gardon kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 58282db6f772SBen Gardon read_unlock(&kvm->mmu_lock); 58292db6f772SBen Gardon } 5830c50d8ae3SPaolo Bonzini } 5831c50d8ae3SPaolo Bonzini 5832b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 58336c9dd6d2SPaolo Bonzini const struct kvm_memory_slot *memslot) 5834b3594ffbSSean Christopherson { 5835b3594ffbSSean Christopherson /* 58367f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5837302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 58387f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 58397f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 58407f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5841b3594ffbSSean Christopherson */ 5842b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5843cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5844cec37648SSean Christopherson memslot->npages); 5845b3594ffbSSean Christopherson } 5846b3594ffbSSean Christopherson 5847c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5848269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot) 5849c50d8ae3SPaolo Bonzini { 5850e2209710SBen Gardon bool flush = false; 5851c50d8ae3SPaolo Bonzini 5852e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5853531810caSBen Gardon write_lock(&kvm->mmu_lock); 5854e2209710SBen Gardon flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, 5855e2209710SBen Gardon false); 5856531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5857e2209710SBen Gardon } 5858c50d8ae3SPaolo Bonzini 585924ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 586024ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 586124ae4cfaSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 586224ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 586324ae4cfaSBen Gardon } 586424ae4cfaSBen Gardon 5865c50d8ae3SPaolo Bonzini /* 5866c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5867c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5868c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5869c50d8ae3SPaolo Bonzini * dirty_bitmap. 5870c50d8ae3SPaolo Bonzini */ 5871c50d8ae3SPaolo Bonzini if (flush) 58727f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5873c50d8ae3SPaolo Bonzini } 5874c50d8ae3SPaolo Bonzini 5875c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5876c50d8ae3SPaolo Bonzini { 5877c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5878c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5879c50d8ae3SPaolo Bonzini int ign; 5880c50d8ae3SPaolo Bonzini 5881531810caSBen Gardon write_lock(&kvm->mmu_lock); 5882c50d8ae3SPaolo Bonzini restart: 5883c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5884f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5885c50d8ae3SPaolo Bonzini continue; 5886c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5887c50d8ae3SPaolo Bonzini goto restart; 5888531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5889c50d8ae3SPaolo Bonzini goto restart; 5890c50d8ae3SPaolo Bonzini } 5891c50d8ae3SPaolo Bonzini 5892c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5893faaf05b0SBen Gardon 5894897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5895faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5896faaf05b0SBen Gardon 5897531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5898c50d8ae3SPaolo Bonzini } 5899c50d8ae3SPaolo Bonzini 5900c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5901c50d8ae3SPaolo Bonzini { 5902c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5903c50d8ae3SPaolo Bonzini 5904c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5905c50d8ae3SPaolo Bonzini 5906c50d8ae3SPaolo Bonzini /* 5907c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5908c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5909c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5910c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5911c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5912c50d8ae3SPaolo Bonzini */ 5913c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5914c50d8ae3SPaolo Bonzini 5915c50d8ae3SPaolo Bonzini /* 5916c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5917c50d8ae3SPaolo Bonzini * zap all shadow pages. 5918c50d8ae3SPaolo Bonzini */ 5919c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 5920c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 5921c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5922c50d8ae3SPaolo Bonzini } 5923c50d8ae3SPaolo Bonzini } 5924c50d8ae3SPaolo Bonzini 5925c50d8ae3SPaolo Bonzini static unsigned long 5926c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 5927c50d8ae3SPaolo Bonzini { 5928c50d8ae3SPaolo Bonzini struct kvm *kvm; 5929c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 5930c50d8ae3SPaolo Bonzini unsigned long freed = 0; 5931c50d8ae3SPaolo Bonzini 5932c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5933c50d8ae3SPaolo Bonzini 5934c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5935c50d8ae3SPaolo Bonzini int idx; 5936c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5937c50d8ae3SPaolo Bonzini 5938c50d8ae3SPaolo Bonzini /* 5939c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 5940c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 5941c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 5942c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 5943c50d8ae3SPaolo Bonzini */ 5944c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 5945c50d8ae3SPaolo Bonzini break; 5946c50d8ae3SPaolo Bonzini /* 5947c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 5948c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 5949c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 5950c50d8ae3SPaolo Bonzini * anyway. 5951c50d8ae3SPaolo Bonzini */ 5952c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 5953c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 5954c50d8ae3SPaolo Bonzini continue; 5955c50d8ae3SPaolo Bonzini 5956c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 5957531810caSBen Gardon write_lock(&kvm->mmu_lock); 5958c50d8ae3SPaolo Bonzini 5959c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 5960c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 5961c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 5962c50d8ae3SPaolo Bonzini goto unlock; 5963c50d8ae3SPaolo Bonzini } 5964c50d8ae3SPaolo Bonzini 5965ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 5966c50d8ae3SPaolo Bonzini 5967c50d8ae3SPaolo Bonzini unlock: 5968531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5969c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 5970c50d8ae3SPaolo Bonzini 5971c50d8ae3SPaolo Bonzini /* 5972c50d8ae3SPaolo Bonzini * unfair on small ones 5973c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 5974c50d8ae3SPaolo Bonzini * sadness comes quickly 5975c50d8ae3SPaolo Bonzini */ 5976c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 5977c50d8ae3SPaolo Bonzini break; 5978c50d8ae3SPaolo Bonzini } 5979c50d8ae3SPaolo Bonzini 5980c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5981c50d8ae3SPaolo Bonzini return freed; 5982c50d8ae3SPaolo Bonzini } 5983c50d8ae3SPaolo Bonzini 5984c50d8ae3SPaolo Bonzini static unsigned long 5985c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 5986c50d8ae3SPaolo Bonzini { 5987c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 5988c50d8ae3SPaolo Bonzini } 5989c50d8ae3SPaolo Bonzini 5990c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 5991c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 5992c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 5993c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 5994c50d8ae3SPaolo Bonzini }; 5995c50d8ae3SPaolo Bonzini 5996c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 5997c50d8ae3SPaolo Bonzini { 5998c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 5999c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 6000c50d8ae3SPaolo Bonzini } 6001c50d8ae3SPaolo Bonzini 6002c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 6003c50d8ae3SPaolo Bonzini { 6004c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 6005c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 6006c50d8ae3SPaolo Bonzini } 6007c50d8ae3SPaolo Bonzini 6008c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 6009c50d8ae3SPaolo Bonzini { 6010c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 6011c50d8ae3SPaolo Bonzini } 6012c50d8ae3SPaolo Bonzini 6013c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 6014c50d8ae3SPaolo Bonzini { 6015c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 6016c50d8ae3SPaolo Bonzini bool new_val; 6017c50d8ae3SPaolo Bonzini 6018c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 6019c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 6020c50d8ae3SPaolo Bonzini new_val = 0; 6021c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 6022c50d8ae3SPaolo Bonzini new_val = 1; 6023c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 6024c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 6025c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 6026c50d8ae3SPaolo Bonzini return -EINVAL; 6027c50d8ae3SPaolo Bonzini 6028c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 6029c50d8ae3SPaolo Bonzini 6030c50d8ae3SPaolo Bonzini if (new_val != old_val) { 6031c50d8ae3SPaolo Bonzini struct kvm *kvm; 6032c50d8ae3SPaolo Bonzini 6033c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6034c50d8ae3SPaolo Bonzini 6035c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6036c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 6037c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6038c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 6039c50d8ae3SPaolo Bonzini 6040c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6041c50d8ae3SPaolo Bonzini } 6042c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6043c50d8ae3SPaolo Bonzini } 6044c50d8ae3SPaolo Bonzini 6045c50d8ae3SPaolo Bonzini return 0; 6046c50d8ae3SPaolo Bonzini } 6047c50d8ae3SPaolo Bonzini 6048c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 6049c50d8ae3SPaolo Bonzini { 6050c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 6051c50d8ae3SPaolo Bonzini 6052c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 6053c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 6054c50d8ae3SPaolo Bonzini 6055c50d8ae3SPaolo Bonzini /* 6056c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 6057c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 6058c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 6059c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 6060c50d8ae3SPaolo Bonzini */ 6061c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 6062c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 6063c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 6064c50d8ae3SPaolo Bonzini 6065c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 6066c50d8ae3SPaolo Bonzini 6067c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 6068c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 6069c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6070c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 6071c50d8ae3SPaolo Bonzini goto out; 6072c50d8ae3SPaolo Bonzini 6073c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 6074c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 6075c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6076c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 6077c50d8ae3SPaolo Bonzini goto out; 6078c50d8ae3SPaolo Bonzini 6079c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 6080c50d8ae3SPaolo Bonzini goto out; 6081c50d8ae3SPaolo Bonzini 6082c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6083c50d8ae3SPaolo Bonzini if (ret) 6084c50d8ae3SPaolo Bonzini goto out; 6085c50d8ae3SPaolo Bonzini 6086c50d8ae3SPaolo Bonzini return 0; 6087c50d8ae3SPaolo Bonzini 6088c50d8ae3SPaolo Bonzini out: 6089c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6090c50d8ae3SPaolo Bonzini return ret; 6091c50d8ae3SPaolo Bonzini } 6092c50d8ae3SPaolo Bonzini 6093c50d8ae3SPaolo Bonzini /* 6094c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 6095c50d8ae3SPaolo Bonzini */ 6096c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 6097c50d8ae3SPaolo Bonzini { 6098c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 6099c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 6100c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 6101c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 6102c50d8ae3SPaolo Bonzini int i; 6103c50d8ae3SPaolo Bonzini 6104c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 6105c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 6106c50d8ae3SPaolo Bonzini 6107c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 6108c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 6109c50d8ae3SPaolo Bonzini } 6110c50d8ae3SPaolo Bonzini 6111c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 6112c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 6113c50d8ae3SPaolo Bonzini 6114c50d8ae3SPaolo Bonzini return nr_mmu_pages; 6115c50d8ae3SPaolo Bonzini } 6116c50d8ae3SPaolo Bonzini 6117c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6118c50d8ae3SPaolo Bonzini { 6119c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6120c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6121c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6122c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6123c50d8ae3SPaolo Bonzini } 6124c50d8ae3SPaolo Bonzini 6125c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6126c50d8ae3SPaolo Bonzini { 6127c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6128c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6129c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6130c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6131c50d8ae3SPaolo Bonzini } 6132c50d8ae3SPaolo Bonzini 6133c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 6134c50d8ae3SPaolo Bonzini { 6135c50d8ae3SPaolo Bonzini unsigned int old_val; 6136c50d8ae3SPaolo Bonzini int err; 6137c50d8ae3SPaolo Bonzini 6138c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 6139c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6140c50d8ae3SPaolo Bonzini if (err) 6141c50d8ae3SPaolo Bonzini return err; 6142c50d8ae3SPaolo Bonzini 6143c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 6144c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 6145c50d8ae3SPaolo Bonzini struct kvm *kvm; 6146c50d8ae3SPaolo Bonzini 6147c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6148c50d8ae3SPaolo Bonzini 6149c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6150c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6151c50d8ae3SPaolo Bonzini 6152c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6153c50d8ae3SPaolo Bonzini } 6154c50d8ae3SPaolo Bonzini 6155c50d8ae3SPaolo Bonzini return err; 6156c50d8ae3SPaolo Bonzini } 6157c50d8ae3SPaolo Bonzini 6158c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6159c50d8ae3SPaolo Bonzini { 6160ade74e14SSean Christopherson unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; 6161c50d8ae3SPaolo Bonzini int rcu_idx; 6162c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6163c50d8ae3SPaolo Bonzini unsigned int ratio; 6164c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6165048f4980SSean Christopherson bool flush = false; 6166c50d8ae3SPaolo Bonzini ulong to_zap; 6167c50d8ae3SPaolo Bonzini 6168c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6169531810caSBen Gardon write_lock(&kvm->mmu_lock); 6170c50d8ae3SPaolo Bonzini 6171c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6172ade74e14SSean Christopherson to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0; 61737d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 61747d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 61757d919c7aSSean Christopherson break; 61767d919c7aSSean Christopherson 6177c50d8ae3SPaolo Bonzini /* 6178c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6179c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6180c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6181c50d8ae3SPaolo Bonzini */ 6182c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6183c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6184c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6185c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6186897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 6187315f02c6SPaolo Bonzini flush |= kvm_tdp_mmu_zap_sp(kvm, sp); 61888d1a182eSBen Gardon } else { 6189c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6190c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 619129cf0f50SBen Gardon } 6192c50d8ae3SPaolo Bonzini 6193531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 6194048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6195531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 6196048f4980SSean Christopherson flush = false; 6197c50d8ae3SPaolo Bonzini } 6198c50d8ae3SPaolo Bonzini } 6199048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6200c50d8ae3SPaolo Bonzini 6201531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6202c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6203c50d8ae3SPaolo Bonzini } 6204c50d8ae3SPaolo Bonzini 6205c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6206c50d8ae3SPaolo Bonzini { 6207c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6208c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6209c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6210c50d8ae3SPaolo Bonzini } 6211c50d8ae3SPaolo Bonzini 6212c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6213c50d8ae3SPaolo Bonzini { 6214c50d8ae3SPaolo Bonzini u64 start_time; 6215c50d8ae3SPaolo Bonzini long remaining_time; 6216c50d8ae3SPaolo Bonzini 6217c50d8ae3SPaolo Bonzini while (true) { 6218c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6219c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6220c50d8ae3SPaolo Bonzini 6221c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6222c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6223c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6224c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6225c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6226c50d8ae3SPaolo Bonzini } 6227c50d8ae3SPaolo Bonzini 6228c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6229c50d8ae3SPaolo Bonzini 6230c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6231c50d8ae3SPaolo Bonzini return 0; 6232c50d8ae3SPaolo Bonzini 6233c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6234c50d8ae3SPaolo Bonzini } 6235c50d8ae3SPaolo Bonzini } 6236c50d8ae3SPaolo Bonzini 6237c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6238c50d8ae3SPaolo Bonzini { 6239c50d8ae3SPaolo Bonzini int err; 6240c50d8ae3SPaolo Bonzini 6241c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6242c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6243c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6244c50d8ae3SPaolo Bonzini if (!err) 6245c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6246c50d8ae3SPaolo Bonzini 6247c50d8ae3SPaolo Bonzini return err; 6248c50d8ae3SPaolo Bonzini } 6249c50d8ae3SPaolo Bonzini 6250c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6251c50d8ae3SPaolo Bonzini { 6252c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6253c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6254c50d8ae3SPaolo Bonzini } 6255