1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 21c50d8ae3SPaolo Bonzini #include "x86.h" 22c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 232f728d66SSean Christopherson #include "kvm_emulate.h" 24c50d8ae3SPaolo Bonzini #include "cpuid.h" 25c50d8ae3SPaolo Bonzini 26c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 27c50d8ae3SPaolo Bonzini #include <linux/types.h> 28c50d8ae3SPaolo Bonzini #include <linux/string.h> 29c50d8ae3SPaolo Bonzini #include <linux/mm.h> 30c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 31c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 32c50d8ae3SPaolo Bonzini #include <linux/export.h> 33c50d8ae3SPaolo Bonzini #include <linux/swap.h> 34c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 35c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 36c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 37c50d8ae3SPaolo Bonzini #include <linux/slab.h> 38c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 39c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 40c50d8ae3SPaolo Bonzini #include <linux/hash.h> 41c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 42c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 43c50d8ae3SPaolo Bonzini 44c50d8ae3SPaolo Bonzini #include <asm/page.h> 45eb243d1dSIngo Molnar #include <asm/memtype.h> 46c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 47c50d8ae3SPaolo Bonzini #include <asm/e820/api.h> 48c50d8ae3SPaolo Bonzini #include <asm/io.h> 49c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 50c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 51c50d8ae3SPaolo Bonzini #include "trace.h" 52c50d8ae3SPaolo Bonzini 53c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 54c50d8ae3SPaolo Bonzini 55c50d8ae3SPaolo Bonzini static int __read_mostly nx_huge_pages = -1; 56c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 57c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 58c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 59c50d8ae3SPaolo Bonzini #else 60c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 61c50d8ae3SPaolo Bonzini #endif 62c50d8ae3SPaolo Bonzini 63c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 64c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 65c50d8ae3SPaolo Bonzini 66c50d8ae3SPaolo Bonzini static struct kernel_param_ops nx_huge_pages_ops = { 67c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 68c50d8ae3SPaolo Bonzini .get = param_get_bool, 69c50d8ae3SPaolo Bonzini }; 70c50d8ae3SPaolo Bonzini 71c50d8ae3SPaolo Bonzini static struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 72c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 73c50d8ae3SPaolo Bonzini .get = param_get_uint, 74c50d8ae3SPaolo Bonzini }; 75c50d8ae3SPaolo Bonzini 76c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 77c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 78c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 79c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 80c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 81c50d8ae3SPaolo Bonzini 8271fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8371fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8471fe7013SSean Christopherson 85c50d8ae3SPaolo Bonzini /* 86c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 87c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 88c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 89c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 90c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 91c50d8ae3SPaolo Bonzini */ 92c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 93c50d8ae3SPaolo Bonzini 94703c335dSSean Christopherson static int max_page_level __read_mostly; 95703c335dSSean Christopherson 96c50d8ae3SPaolo Bonzini enum { 97c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 98c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 99c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 100c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 101c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 102c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 103c50d8ae3SPaolo Bonzini }; 104c50d8ae3SPaolo Bonzini 105c50d8ae3SPaolo Bonzini #undef MMU_DEBUG 106c50d8ae3SPaolo Bonzini 107c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 108c50d8ae3SPaolo Bonzini static bool dbg = 0; 109c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 110c50d8ae3SPaolo Bonzini 111c50d8ae3SPaolo Bonzini #define pgprintk(x...) do { if (dbg) printk(x); } while (0) 112c50d8ae3SPaolo Bonzini #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) 113c50d8ae3SPaolo Bonzini #define MMU_WARN_ON(x) WARN_ON(x) 114c50d8ae3SPaolo Bonzini #else 115c50d8ae3SPaolo Bonzini #define pgprintk(x...) do { } while (0) 116c50d8ae3SPaolo Bonzini #define rmap_printk(x...) do { } while (0) 117c50d8ae3SPaolo Bonzini #define MMU_WARN_ON(x) do { } while (0) 118c50d8ae3SPaolo Bonzini #endif 119c50d8ae3SPaolo Bonzini 120c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 121c50d8ae3SPaolo Bonzini 122c50d8ae3SPaolo Bonzini #define PT_FIRST_AVAIL_BITS_SHIFT 10 123c50d8ae3SPaolo Bonzini #define PT64_SECOND_AVAIL_BITS_SHIFT 54 124c50d8ae3SPaolo Bonzini 125c50d8ae3SPaolo Bonzini /* 126c50d8ae3SPaolo Bonzini * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 127c50d8ae3SPaolo Bonzini * Access Tracking SPTEs. 128c50d8ae3SPaolo Bonzini */ 129c50d8ae3SPaolo Bonzini #define SPTE_SPECIAL_MASK (3ULL << 52) 130c50d8ae3SPaolo Bonzini #define SPTE_AD_ENABLED_MASK (0ULL << 52) 131c50d8ae3SPaolo Bonzini #define SPTE_AD_DISABLED_MASK (1ULL << 52) 132c50d8ae3SPaolo Bonzini #define SPTE_AD_WRPROT_ONLY_MASK (2ULL << 52) 133c50d8ae3SPaolo Bonzini #define SPTE_MMIO_MASK (3ULL << 52) 134c50d8ae3SPaolo Bonzini 135c50d8ae3SPaolo Bonzini #define PT64_LEVEL_BITS 9 136c50d8ae3SPaolo Bonzini 137c50d8ae3SPaolo Bonzini #define PT64_LEVEL_SHIFT(level) \ 138c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) 139c50d8ae3SPaolo Bonzini 140c50d8ae3SPaolo Bonzini #define PT64_INDEX(address, level)\ 141c50d8ae3SPaolo Bonzini (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) 142c50d8ae3SPaolo Bonzini 143c50d8ae3SPaolo Bonzini 144c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 145c50d8ae3SPaolo Bonzini 146c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 147c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 148c50d8ae3SPaolo Bonzini 149c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 150c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 151c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 152c50d8ae3SPaolo Bonzini 153c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 154c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 155c50d8ae3SPaolo Bonzini 156c50d8ae3SPaolo Bonzini 157c50d8ae3SPaolo Bonzini #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK 158c50d8ae3SPaolo Bonzini #define PT64_BASE_ADDR_MASK (physical_mask & ~(u64)(PAGE_SIZE-1)) 159c50d8ae3SPaolo Bonzini #else 160c50d8ae3SPaolo Bonzini #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) 161c50d8ae3SPaolo Bonzini #endif 162c50d8ae3SPaolo Bonzini #define PT64_LVL_ADDR_MASK(level) \ 163c50d8ae3SPaolo Bonzini (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 164c50d8ae3SPaolo Bonzini * PT64_LEVEL_BITS))) - 1)) 165c50d8ae3SPaolo Bonzini #define PT64_LVL_OFFSET_MASK(level) \ 166c50d8ae3SPaolo Bonzini (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 167c50d8ae3SPaolo Bonzini * PT64_LEVEL_BITS))) - 1)) 168c50d8ae3SPaolo Bonzini 169c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 170c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 171c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 172c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 173c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 174c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 175c50d8ae3SPaolo Bonzini 176c50d8ae3SPaolo Bonzini #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \ 177c50d8ae3SPaolo Bonzini | shadow_x_mask | shadow_nx_mask | shadow_me_mask) 178c50d8ae3SPaolo Bonzini 179c50d8ae3SPaolo Bonzini #define ACC_EXEC_MASK 1 180c50d8ae3SPaolo Bonzini #define ACC_WRITE_MASK PT_WRITABLE_MASK 181c50d8ae3SPaolo Bonzini #define ACC_USER_MASK PT_USER_MASK 182c50d8ae3SPaolo Bonzini #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) 183c50d8ae3SPaolo Bonzini 184c50d8ae3SPaolo Bonzini /* The mask for the R/X bits in EPT PTEs */ 185c50d8ae3SPaolo Bonzini #define PT64_EPT_READABLE_MASK 0x1ull 186c50d8ae3SPaolo Bonzini #define PT64_EPT_EXECUTABLE_MASK 0x4ull 187c50d8ae3SPaolo Bonzini 188c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 189c50d8ae3SPaolo Bonzini 190c50d8ae3SPaolo Bonzini #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) 191c50d8ae3SPaolo Bonzini #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1)) 192c50d8ae3SPaolo Bonzini 193c50d8ae3SPaolo Bonzini #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) 194c50d8ae3SPaolo Bonzini 195c50d8ae3SPaolo Bonzini /* make pte_list_desc fit well in cache line */ 196c50d8ae3SPaolo Bonzini #define PTE_LIST_EXT 3 197c50d8ae3SPaolo Bonzini 198c50d8ae3SPaolo Bonzini /* 199c50d8ae3SPaolo Bonzini * Return values of handle_mmio_page_fault and mmu.page_fault: 200c50d8ae3SPaolo Bonzini * RET_PF_RETRY: let CPU fault again on the address. 201c50d8ae3SPaolo Bonzini * RET_PF_EMULATE: mmio page fault, emulate the instruction directly. 202c50d8ae3SPaolo Bonzini * 203c50d8ae3SPaolo Bonzini * For handle_mmio_page_fault only: 204c50d8ae3SPaolo Bonzini * RET_PF_INVALID: the spte is invalid, let the real page fault path update it. 205c50d8ae3SPaolo Bonzini */ 206c50d8ae3SPaolo Bonzini enum { 207c50d8ae3SPaolo Bonzini RET_PF_RETRY = 0, 208c50d8ae3SPaolo Bonzini RET_PF_EMULATE = 1, 209c50d8ae3SPaolo Bonzini RET_PF_INVALID = 2, 210c50d8ae3SPaolo Bonzini }; 211c50d8ae3SPaolo Bonzini 212c50d8ae3SPaolo Bonzini struct pte_list_desc { 213c50d8ae3SPaolo Bonzini u64 *sptes[PTE_LIST_EXT]; 214c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 215c50d8ae3SPaolo Bonzini }; 216c50d8ae3SPaolo Bonzini 217c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 218c50d8ae3SPaolo Bonzini u64 addr; 219c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 220c50d8ae3SPaolo Bonzini u64 *sptep; 221c50d8ae3SPaolo Bonzini int level; 222c50d8ae3SPaolo Bonzini unsigned index; 223c50d8ae3SPaolo Bonzini }; 224c50d8ae3SPaolo Bonzini 225c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 226c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 227c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 228c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 229c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 230c50d8ae3SPaolo Bonzini 231c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 232c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 233c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 234c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 235c50d8ae3SPaolo Bonzini 236c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 237c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 238c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 239c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 240c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 241c50d8ae3SPaolo Bonzini 242c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 243c50d8ae3SPaolo Bonzini static struct kmem_cache *mmu_page_header_cache; 244c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 245c50d8ae3SPaolo Bonzini 246c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_nx_mask; 247c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ 248c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_user_mask; 249c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_accessed_mask; 250c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_dirty_mask; 251c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_mmio_value; 252c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_mmio_access_mask; 253c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_present_mask; 254c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_me_mask; 255c50d8ae3SPaolo Bonzini 256c50d8ae3SPaolo Bonzini /* 257c50d8ae3SPaolo Bonzini * SPTEs used by MMUs without A/D bits are marked with SPTE_AD_DISABLED_MASK; 258c50d8ae3SPaolo Bonzini * shadow_acc_track_mask is the set of bits to be cleared in non-accessed 259c50d8ae3SPaolo Bonzini * pages. 260c50d8ae3SPaolo Bonzini */ 261c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_acc_track_mask; 262c50d8ae3SPaolo Bonzini 263c50d8ae3SPaolo Bonzini /* 264c50d8ae3SPaolo Bonzini * The mask/shift to use for saving the original R/X bits when marking the PTE 265c50d8ae3SPaolo Bonzini * as not-present for access tracking purposes. We do not save the W bit as the 266c50d8ae3SPaolo Bonzini * PTEs being access tracked also need to be dirty tracked, so the W bit will be 267c50d8ae3SPaolo Bonzini * restored only when a write is attempted to the page. 268c50d8ae3SPaolo Bonzini */ 269c50d8ae3SPaolo Bonzini static const u64 shadow_acc_track_saved_bits_mask = PT64_EPT_READABLE_MASK | 270c50d8ae3SPaolo Bonzini PT64_EPT_EXECUTABLE_MASK; 271c50d8ae3SPaolo Bonzini static const u64 shadow_acc_track_saved_bits_shift = PT64_SECOND_AVAIL_BITS_SHIFT; 272c50d8ae3SPaolo Bonzini 273c50d8ae3SPaolo Bonzini /* 274c50d8ae3SPaolo Bonzini * This mask must be set on all non-zero Non-Present or Reserved SPTEs in order 275c50d8ae3SPaolo Bonzini * to guard against L1TF attacks. 276c50d8ae3SPaolo Bonzini */ 277c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_nonpresent_or_rsvd_mask; 278c50d8ae3SPaolo Bonzini 279c50d8ae3SPaolo Bonzini /* 280c50d8ae3SPaolo Bonzini * The number of high-order 1 bits to use in the mask above. 281c50d8ae3SPaolo Bonzini */ 282c50d8ae3SPaolo Bonzini static const u64 shadow_nonpresent_or_rsvd_mask_len = 5; 283c50d8ae3SPaolo Bonzini 284c50d8ae3SPaolo Bonzini /* 285c50d8ae3SPaolo Bonzini * In some cases, we need to preserve the GFN of a non-present or reserved 286c50d8ae3SPaolo Bonzini * SPTE when we usurp the upper five bits of the physical address space to 287c50d8ae3SPaolo Bonzini * defend against L1TF, e.g. for MMIO SPTEs. To preserve the GFN, we'll 288c50d8ae3SPaolo Bonzini * shift bits of the GFN that overlap with shadow_nonpresent_or_rsvd_mask 289c50d8ae3SPaolo Bonzini * left into the reserved bits, i.e. the GFN in the SPTE will be split into 290c50d8ae3SPaolo Bonzini * high and low parts. This mask covers the lower bits of the GFN. 291c50d8ae3SPaolo Bonzini */ 292c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask; 293c50d8ae3SPaolo Bonzini 294c50d8ae3SPaolo Bonzini /* 295c50d8ae3SPaolo Bonzini * The number of non-reserved physical address bits irrespective of features 296c50d8ae3SPaolo Bonzini * that repurpose legal bits, e.g. MKTME. 297c50d8ae3SPaolo Bonzini */ 298c50d8ae3SPaolo Bonzini static u8 __read_mostly shadow_phys_bits; 299c50d8ae3SPaolo Bonzini 300c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 301c50d8ae3SPaolo Bonzini static bool is_executable_pte(u64 spte); 302c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 303c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 304c50d8ae3SPaolo Bonzini 305c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 306c50d8ae3SPaolo Bonzini #include "mmutrace.h" 307c50d8ae3SPaolo Bonzini 308c50d8ae3SPaolo Bonzini 309c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 310c50d8ae3SPaolo Bonzini { 311afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 312c50d8ae3SPaolo Bonzini } 313c50d8ae3SPaolo Bonzini 314c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 315c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 316c50d8ae3SPaolo Bonzini { 317c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 318c50d8ae3SPaolo Bonzini 319afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 320afaf0b2fSSean Christopherson ret = kvm_x86_ops.tlb_remote_flush_with_range(kvm, range); 321c50d8ae3SPaolo Bonzini 322c50d8ae3SPaolo Bonzini if (ret) 323c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 324c50d8ae3SPaolo Bonzini } 325c50d8ae3SPaolo Bonzini 326c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 327c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 328c50d8ae3SPaolo Bonzini { 329c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 330c50d8ae3SPaolo Bonzini 331c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 332c50d8ae3SPaolo Bonzini range.pages = pages; 333c50d8ae3SPaolo Bonzini 334c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 335c50d8ae3SPaolo Bonzini } 336c50d8ae3SPaolo Bonzini 337e7581cacSPaolo Bonzini void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 access_mask) 338c50d8ae3SPaolo Bonzini { 339c50d8ae3SPaolo Bonzini BUG_ON((u64)(unsigned)access_mask != access_mask); 340d43e2675SPaolo Bonzini WARN_ON(mmio_value & (shadow_nonpresent_or_rsvd_mask << shadow_nonpresent_or_rsvd_mask_len)); 341d43e2675SPaolo Bonzini WARN_ON(mmio_value & shadow_nonpresent_or_rsvd_lower_gfn_mask); 342c50d8ae3SPaolo Bonzini shadow_mmio_value = mmio_value | SPTE_MMIO_MASK; 343c50d8ae3SPaolo Bonzini shadow_mmio_access_mask = access_mask; 344c50d8ae3SPaolo Bonzini } 345c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask); 346c50d8ae3SPaolo Bonzini 347c50d8ae3SPaolo Bonzini static bool is_mmio_spte(u64 spte) 348c50d8ae3SPaolo Bonzini { 349e7581cacSPaolo Bonzini return (spte & SPTE_SPECIAL_MASK) == SPTE_MMIO_MASK; 350c50d8ae3SPaolo Bonzini } 351c50d8ae3SPaolo Bonzini 352c50d8ae3SPaolo Bonzini static inline bool sp_ad_disabled(struct kvm_mmu_page *sp) 353c50d8ae3SPaolo Bonzini { 354c50d8ae3SPaolo Bonzini return sp->role.ad_disabled; 355c50d8ae3SPaolo Bonzini } 356c50d8ae3SPaolo Bonzini 357c50d8ae3SPaolo Bonzini static inline bool kvm_vcpu_ad_need_write_protect(struct kvm_vcpu *vcpu) 358c50d8ae3SPaolo Bonzini { 359c50d8ae3SPaolo Bonzini /* 360c50d8ae3SPaolo Bonzini * When using the EPT page-modification log, the GPAs in the log 361c50d8ae3SPaolo Bonzini * would come from L2 rather than L1. Therefore, we need to rely 362c50d8ae3SPaolo Bonzini * on write protection to record dirty pages. This also bypasses 363c50d8ae3SPaolo Bonzini * PML, since writes now result in a vmexit. 364c50d8ae3SPaolo Bonzini */ 365c50d8ae3SPaolo Bonzini return vcpu->arch.mmu == &vcpu->arch.guest_mmu; 366c50d8ae3SPaolo Bonzini } 367c50d8ae3SPaolo Bonzini 368c50d8ae3SPaolo Bonzini static inline bool spte_ad_enabled(u64 spte) 369c50d8ae3SPaolo Bonzini { 370c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 371c50d8ae3SPaolo Bonzini return (spte & SPTE_SPECIAL_MASK) != SPTE_AD_DISABLED_MASK; 372c50d8ae3SPaolo Bonzini } 373c50d8ae3SPaolo Bonzini 374c50d8ae3SPaolo Bonzini static inline bool spte_ad_need_write_protect(u64 spte) 375c50d8ae3SPaolo Bonzini { 376c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 377c50d8ae3SPaolo Bonzini return (spte & SPTE_SPECIAL_MASK) != SPTE_AD_ENABLED_MASK; 378c50d8ae3SPaolo Bonzini } 379c50d8ae3SPaolo Bonzini 380c50d8ae3SPaolo Bonzini static bool is_nx_huge_page_enabled(void) 381c50d8ae3SPaolo Bonzini { 382c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages); 383c50d8ae3SPaolo Bonzini } 384c50d8ae3SPaolo Bonzini 385c50d8ae3SPaolo Bonzini static inline u64 spte_shadow_accessed_mask(u64 spte) 386c50d8ae3SPaolo Bonzini { 387c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 388c50d8ae3SPaolo Bonzini return spte_ad_enabled(spte) ? shadow_accessed_mask : 0; 389c50d8ae3SPaolo Bonzini } 390c50d8ae3SPaolo Bonzini 391c50d8ae3SPaolo Bonzini static inline u64 spte_shadow_dirty_mask(u64 spte) 392c50d8ae3SPaolo Bonzini { 393c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 394c50d8ae3SPaolo Bonzini return spte_ad_enabled(spte) ? shadow_dirty_mask : 0; 395c50d8ae3SPaolo Bonzini } 396c50d8ae3SPaolo Bonzini 397c50d8ae3SPaolo Bonzini static inline bool is_access_track_spte(u64 spte) 398c50d8ae3SPaolo Bonzini { 399c50d8ae3SPaolo Bonzini return !spte_ad_enabled(spte) && (spte & shadow_acc_track_mask) == 0; 400c50d8ae3SPaolo Bonzini } 401c50d8ae3SPaolo Bonzini 402c50d8ae3SPaolo Bonzini /* 403c50d8ae3SPaolo Bonzini * Due to limited space in PTEs, the MMIO generation is a 19 bit subset of 404c50d8ae3SPaolo Bonzini * the memslots generation and is derived as follows: 405c50d8ae3SPaolo Bonzini * 406c50d8ae3SPaolo Bonzini * Bits 0-8 of the MMIO generation are propagated to spte bits 3-11 407c50d8ae3SPaolo Bonzini * Bits 9-18 of the MMIO generation are propagated to spte bits 52-61 408c50d8ae3SPaolo Bonzini * 409c50d8ae3SPaolo Bonzini * The KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS flag is intentionally not included in 410c50d8ae3SPaolo Bonzini * the MMIO generation number, as doing so would require stealing a bit from 411c50d8ae3SPaolo Bonzini * the "real" generation number and thus effectively halve the maximum number 412c50d8ae3SPaolo Bonzini * of MMIO generations that can be handled before encountering a wrap (which 413c50d8ae3SPaolo Bonzini * requires a full MMU zap). The flag is instead explicitly queried when 414c50d8ae3SPaolo Bonzini * checking for MMIO spte cache hits. 415c50d8ae3SPaolo Bonzini */ 41656871d44SPaolo Bonzini #define MMIO_SPTE_GEN_MASK GENMASK_ULL(17, 0) 417c50d8ae3SPaolo Bonzini 418c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_LOW_START 3 419c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_LOW_END 11 420c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_LOW_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_END, \ 421c50d8ae3SPaolo Bonzini MMIO_SPTE_GEN_LOW_START) 422c50d8ae3SPaolo Bonzini 42356871d44SPaolo Bonzini #define MMIO_SPTE_GEN_HIGH_START PT64_SECOND_AVAIL_BITS_SHIFT 42456871d44SPaolo Bonzini #define MMIO_SPTE_GEN_HIGH_END 62 425c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_HIGH_MASK GENMASK_ULL(MMIO_SPTE_GEN_HIGH_END, \ 426c50d8ae3SPaolo Bonzini MMIO_SPTE_GEN_HIGH_START) 42756871d44SPaolo Bonzini 428c50d8ae3SPaolo Bonzini static u64 generation_mmio_spte_mask(u64 gen) 429c50d8ae3SPaolo Bonzini { 430c50d8ae3SPaolo Bonzini u64 mask; 431c50d8ae3SPaolo Bonzini 432c50d8ae3SPaolo Bonzini WARN_ON(gen & ~MMIO_SPTE_GEN_MASK); 43356871d44SPaolo Bonzini BUILD_BUG_ON((MMIO_SPTE_GEN_HIGH_MASK | MMIO_SPTE_GEN_LOW_MASK) & SPTE_SPECIAL_MASK); 434c50d8ae3SPaolo Bonzini 435c50d8ae3SPaolo Bonzini mask = (gen << MMIO_SPTE_GEN_LOW_START) & MMIO_SPTE_GEN_LOW_MASK; 436c50d8ae3SPaolo Bonzini mask |= (gen << MMIO_SPTE_GEN_HIGH_START) & MMIO_SPTE_GEN_HIGH_MASK; 437c50d8ae3SPaolo Bonzini return mask; 438c50d8ae3SPaolo Bonzini } 439c50d8ae3SPaolo Bonzini 440c50d8ae3SPaolo Bonzini static u64 get_mmio_spte_generation(u64 spte) 441c50d8ae3SPaolo Bonzini { 442c50d8ae3SPaolo Bonzini u64 gen; 443c50d8ae3SPaolo Bonzini 444c50d8ae3SPaolo Bonzini gen = (spte & MMIO_SPTE_GEN_LOW_MASK) >> MMIO_SPTE_GEN_LOW_START; 445c50d8ae3SPaolo Bonzini gen |= (spte & MMIO_SPTE_GEN_HIGH_MASK) >> MMIO_SPTE_GEN_HIGH_START; 446c50d8ae3SPaolo Bonzini return gen; 447c50d8ae3SPaolo Bonzini } 448c50d8ae3SPaolo Bonzini 4498f79b064SBen Gardon static u64 make_mmio_spte(struct kvm_vcpu *vcpu, u64 gfn, unsigned int access) 450c50d8ae3SPaolo Bonzini { 4518f79b064SBen Gardon 452c50d8ae3SPaolo Bonzini u64 gen = kvm_vcpu_memslots(vcpu)->generation & MMIO_SPTE_GEN_MASK; 453c50d8ae3SPaolo Bonzini u64 mask = generation_mmio_spte_mask(gen); 454c50d8ae3SPaolo Bonzini u64 gpa = gfn << PAGE_SHIFT; 455c50d8ae3SPaolo Bonzini 456c50d8ae3SPaolo Bonzini access &= shadow_mmio_access_mask; 457c50d8ae3SPaolo Bonzini mask |= shadow_mmio_value | access; 458c50d8ae3SPaolo Bonzini mask |= gpa | shadow_nonpresent_or_rsvd_mask; 459c50d8ae3SPaolo Bonzini mask |= (gpa & shadow_nonpresent_or_rsvd_mask) 460c50d8ae3SPaolo Bonzini << shadow_nonpresent_or_rsvd_mask_len; 461c50d8ae3SPaolo Bonzini 4628f79b064SBen Gardon return mask; 4638f79b064SBen Gardon } 4648f79b064SBen Gardon 4658f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 4668f79b064SBen Gardon unsigned int access) 4678f79b064SBen Gardon { 4688f79b064SBen Gardon u64 mask = make_mmio_spte(vcpu, gfn, access); 4698f79b064SBen Gardon unsigned int gen = get_mmio_spte_generation(mask); 4708f79b064SBen Gardon 4718f79b064SBen Gardon access = mask & ACC_ALL; 4728f79b064SBen Gardon 473c50d8ae3SPaolo Bonzini trace_mark_mmio_spte(sptep, gfn, access, gen); 474c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, mask); 475c50d8ae3SPaolo Bonzini } 476c50d8ae3SPaolo Bonzini 477c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 478c50d8ae3SPaolo Bonzini { 479c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 480c50d8ae3SPaolo Bonzini 481c50d8ae3SPaolo Bonzini gpa |= (spte >> shadow_nonpresent_or_rsvd_mask_len) 482c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 483c50d8ae3SPaolo Bonzini 484c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 485c50d8ae3SPaolo Bonzini } 486c50d8ae3SPaolo Bonzini 487c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 488c50d8ae3SPaolo Bonzini { 489c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 490c50d8ae3SPaolo Bonzini } 491c50d8ae3SPaolo Bonzini 492c50d8ae3SPaolo Bonzini static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 4930a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access) 494c50d8ae3SPaolo Bonzini { 495c50d8ae3SPaolo Bonzini if (unlikely(is_noslot_pfn(pfn))) { 496c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 497c50d8ae3SPaolo Bonzini return true; 498c50d8ae3SPaolo Bonzini } 499c50d8ae3SPaolo Bonzini 500c50d8ae3SPaolo Bonzini return false; 501c50d8ae3SPaolo Bonzini } 502c50d8ae3SPaolo Bonzini 503c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 504c50d8ae3SPaolo Bonzini { 505c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 506c50d8ae3SPaolo Bonzini 507c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 508c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 509c50d8ae3SPaolo Bonzini return false; 510c50d8ae3SPaolo Bonzini 511c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 512c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 513c50d8ae3SPaolo Bonzini 514c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 515c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 516c50d8ae3SPaolo Bonzini } 517c50d8ae3SPaolo Bonzini 518c50d8ae3SPaolo Bonzini /* 519c50d8ae3SPaolo Bonzini * Sets the shadow PTE masks used by the MMU. 520c50d8ae3SPaolo Bonzini * 521c50d8ae3SPaolo Bonzini * Assumptions: 522c50d8ae3SPaolo Bonzini * - Setting either @accessed_mask or @dirty_mask requires setting both 523c50d8ae3SPaolo Bonzini * - At least one of @accessed_mask or @acc_track_mask must be set 524c50d8ae3SPaolo Bonzini */ 525c50d8ae3SPaolo Bonzini void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 526c50d8ae3SPaolo Bonzini u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 527c50d8ae3SPaolo Bonzini u64 acc_track_mask, u64 me_mask) 528c50d8ae3SPaolo Bonzini { 529c50d8ae3SPaolo Bonzini BUG_ON(!dirty_mask != !accessed_mask); 530c50d8ae3SPaolo Bonzini BUG_ON(!accessed_mask && !acc_track_mask); 531c50d8ae3SPaolo Bonzini BUG_ON(acc_track_mask & SPTE_SPECIAL_MASK); 532c50d8ae3SPaolo Bonzini 533c50d8ae3SPaolo Bonzini shadow_user_mask = user_mask; 534c50d8ae3SPaolo Bonzini shadow_accessed_mask = accessed_mask; 535c50d8ae3SPaolo Bonzini shadow_dirty_mask = dirty_mask; 536c50d8ae3SPaolo Bonzini shadow_nx_mask = nx_mask; 537c50d8ae3SPaolo Bonzini shadow_x_mask = x_mask; 538c50d8ae3SPaolo Bonzini shadow_present_mask = p_mask; 539c50d8ae3SPaolo Bonzini shadow_acc_track_mask = acc_track_mask; 540c50d8ae3SPaolo Bonzini shadow_me_mask = me_mask; 541c50d8ae3SPaolo Bonzini } 542c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); 543c50d8ae3SPaolo Bonzini 544c50d8ae3SPaolo Bonzini static u8 kvm_get_shadow_phys_bits(void) 545c50d8ae3SPaolo Bonzini { 546c50d8ae3SPaolo Bonzini /* 5477adacf5eSPaolo Bonzini * boot_cpu_data.x86_phys_bits is reduced when MKTME or SME are detected 5487adacf5eSPaolo Bonzini * in CPU detection code, but the processor treats those reduced bits as 5497adacf5eSPaolo Bonzini * 'keyID' thus they are not reserved bits. Therefore KVM needs to look at 5507adacf5eSPaolo Bonzini * the physical address bits reported by CPUID. 551c50d8ae3SPaolo Bonzini */ 5527adacf5eSPaolo Bonzini if (likely(boot_cpu_data.extended_cpuid_level >= 0x80000008)) 553c50d8ae3SPaolo Bonzini return cpuid_eax(0x80000008) & 0xff; 5547adacf5eSPaolo Bonzini 5557adacf5eSPaolo Bonzini /* 5567adacf5eSPaolo Bonzini * Quite weird to have VMX or SVM but not MAXPHYADDR; probably a VM with 5577adacf5eSPaolo Bonzini * custom CPUID. Proceed with whatever the kernel found since these features 5587adacf5eSPaolo Bonzini * aren't virtualizable (SME/SEV also require CPUIDs higher than 0x80000008). 5597adacf5eSPaolo Bonzini */ 5607adacf5eSPaolo Bonzini return boot_cpu_data.x86_phys_bits; 561c50d8ae3SPaolo Bonzini } 562c50d8ae3SPaolo Bonzini 563c50d8ae3SPaolo Bonzini static void kvm_mmu_reset_all_pte_masks(void) 564c50d8ae3SPaolo Bonzini { 565c50d8ae3SPaolo Bonzini u8 low_phys_bits; 566c50d8ae3SPaolo Bonzini 567c50d8ae3SPaolo Bonzini shadow_user_mask = 0; 568c50d8ae3SPaolo Bonzini shadow_accessed_mask = 0; 569c50d8ae3SPaolo Bonzini shadow_dirty_mask = 0; 570c50d8ae3SPaolo Bonzini shadow_nx_mask = 0; 571c50d8ae3SPaolo Bonzini shadow_x_mask = 0; 572c50d8ae3SPaolo Bonzini shadow_present_mask = 0; 573c50d8ae3SPaolo Bonzini shadow_acc_track_mask = 0; 574c50d8ae3SPaolo Bonzini 575c50d8ae3SPaolo Bonzini shadow_phys_bits = kvm_get_shadow_phys_bits(); 576c50d8ae3SPaolo Bonzini 577c50d8ae3SPaolo Bonzini /* 578c50d8ae3SPaolo Bonzini * If the CPU has 46 or less physical address bits, then set an 579c50d8ae3SPaolo Bonzini * appropriate mask to guard against L1TF attacks. Otherwise, it is 580c50d8ae3SPaolo Bonzini * assumed that the CPU is not vulnerable to L1TF. 581c50d8ae3SPaolo Bonzini * 582c50d8ae3SPaolo Bonzini * Some Intel CPUs address the L1 cache using more PA bits than are 583c50d8ae3SPaolo Bonzini * reported by CPUID. Use the PA width of the L1 cache when possible 584c50d8ae3SPaolo Bonzini * to achieve more effective mitigation, e.g. if system RAM overlaps 585c50d8ae3SPaolo Bonzini * the most significant bits of legal physical address space. 586c50d8ae3SPaolo Bonzini */ 587c50d8ae3SPaolo Bonzini shadow_nonpresent_or_rsvd_mask = 0; 588d43e2675SPaolo Bonzini low_phys_bits = boot_cpu_data.x86_phys_bits; 589d43e2675SPaolo Bonzini if (boot_cpu_has_bug(X86_BUG_L1TF) && 590d43e2675SPaolo Bonzini !WARN_ON_ONCE(boot_cpu_data.x86_cache_bits >= 591d43e2675SPaolo Bonzini 52 - shadow_nonpresent_or_rsvd_mask_len)) { 592d43e2675SPaolo Bonzini low_phys_bits = boot_cpu_data.x86_cache_bits 593d43e2675SPaolo Bonzini - shadow_nonpresent_or_rsvd_mask_len; 594c50d8ae3SPaolo Bonzini shadow_nonpresent_or_rsvd_mask = 595d43e2675SPaolo Bonzini rsvd_bits(low_phys_bits, boot_cpu_data.x86_cache_bits - 1); 596d43e2675SPaolo Bonzini } 597c50d8ae3SPaolo Bonzini 598c50d8ae3SPaolo Bonzini shadow_nonpresent_or_rsvd_lower_gfn_mask = 599c50d8ae3SPaolo Bonzini GENMASK_ULL(low_phys_bits - 1, PAGE_SHIFT); 600c50d8ae3SPaolo Bonzini } 601c50d8ae3SPaolo Bonzini 602c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 603c50d8ae3SPaolo Bonzini { 604c50d8ae3SPaolo Bonzini return 1; 605c50d8ae3SPaolo Bonzini } 606c50d8ae3SPaolo Bonzini 607c50d8ae3SPaolo Bonzini static int is_nx(struct kvm_vcpu *vcpu) 608c50d8ae3SPaolo Bonzini { 609c50d8ae3SPaolo Bonzini return vcpu->arch.efer & EFER_NX; 610c50d8ae3SPaolo Bonzini } 611c50d8ae3SPaolo Bonzini 612c50d8ae3SPaolo Bonzini static int is_shadow_present_pte(u64 pte) 613c50d8ae3SPaolo Bonzini { 614c50d8ae3SPaolo Bonzini return (pte != 0) && !is_mmio_spte(pte); 615c50d8ae3SPaolo Bonzini } 616c50d8ae3SPaolo Bonzini 617c50d8ae3SPaolo Bonzini static int is_large_pte(u64 pte) 618c50d8ae3SPaolo Bonzini { 619c50d8ae3SPaolo Bonzini return pte & PT_PAGE_SIZE_MASK; 620c50d8ae3SPaolo Bonzini } 621c50d8ae3SPaolo Bonzini 622c50d8ae3SPaolo Bonzini static int is_last_spte(u64 pte, int level) 623c50d8ae3SPaolo Bonzini { 6243bae0459SSean Christopherson if (level == PG_LEVEL_4K) 625c50d8ae3SPaolo Bonzini return 1; 626c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 627c50d8ae3SPaolo Bonzini return 1; 628c50d8ae3SPaolo Bonzini return 0; 629c50d8ae3SPaolo Bonzini } 630c50d8ae3SPaolo Bonzini 631c50d8ae3SPaolo Bonzini static bool is_executable_pte(u64 spte) 632c50d8ae3SPaolo Bonzini { 633c50d8ae3SPaolo Bonzini return (spte & (shadow_x_mask | shadow_nx_mask)) == shadow_x_mask; 634c50d8ae3SPaolo Bonzini } 635c50d8ae3SPaolo Bonzini 636c50d8ae3SPaolo Bonzini static kvm_pfn_t spte_to_pfn(u64 pte) 637c50d8ae3SPaolo Bonzini { 638c50d8ae3SPaolo Bonzini return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; 639c50d8ae3SPaolo Bonzini } 640c50d8ae3SPaolo Bonzini 641c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 642c50d8ae3SPaolo Bonzini { 643c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 644c50d8ae3SPaolo Bonzini 645c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 646c50d8ae3SPaolo Bonzini } 647c50d8ae3SPaolo Bonzini 648c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 649c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 650c50d8ae3SPaolo Bonzini { 651c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 652c50d8ae3SPaolo Bonzini } 653c50d8ae3SPaolo Bonzini 654c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 655c50d8ae3SPaolo Bonzini { 656c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 657c50d8ae3SPaolo Bonzini } 658c50d8ae3SPaolo Bonzini 659c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 660c50d8ae3SPaolo Bonzini { 661c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 662c50d8ae3SPaolo Bonzini } 663c50d8ae3SPaolo Bonzini 664c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 665c50d8ae3SPaolo Bonzini { 666c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 667c50d8ae3SPaolo Bonzini } 668c50d8ae3SPaolo Bonzini #else 669c50d8ae3SPaolo Bonzini union split_spte { 670c50d8ae3SPaolo Bonzini struct { 671c50d8ae3SPaolo Bonzini u32 spte_low; 672c50d8ae3SPaolo Bonzini u32 spte_high; 673c50d8ae3SPaolo Bonzini }; 674c50d8ae3SPaolo Bonzini u64 spte; 675c50d8ae3SPaolo Bonzini }; 676c50d8ae3SPaolo Bonzini 677c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 678c50d8ae3SPaolo Bonzini { 679c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = page_header(__pa(sptep)); 680c50d8ae3SPaolo Bonzini 681c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 682c50d8ae3SPaolo Bonzini return; 683c50d8ae3SPaolo Bonzini 684c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 685c50d8ae3SPaolo Bonzini smp_wmb(); 686c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 687c50d8ae3SPaolo Bonzini } 688c50d8ae3SPaolo Bonzini 689c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 690c50d8ae3SPaolo Bonzini { 691c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 692c50d8ae3SPaolo Bonzini 693c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 694c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 695c50d8ae3SPaolo Bonzini 696c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 697c50d8ae3SPaolo Bonzini 698c50d8ae3SPaolo Bonzini /* 699c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 700c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 701c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 702c50d8ae3SPaolo Bonzini */ 703c50d8ae3SPaolo Bonzini smp_wmb(); 704c50d8ae3SPaolo Bonzini 705c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 706c50d8ae3SPaolo Bonzini } 707c50d8ae3SPaolo Bonzini 708c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 709c50d8ae3SPaolo Bonzini { 710c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 711c50d8ae3SPaolo Bonzini 712c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 713c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 714c50d8ae3SPaolo Bonzini 715c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 716c50d8ae3SPaolo Bonzini 717c50d8ae3SPaolo Bonzini /* 718c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 719c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 720c50d8ae3SPaolo Bonzini */ 721c50d8ae3SPaolo Bonzini smp_wmb(); 722c50d8ae3SPaolo Bonzini 723c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 724c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 725c50d8ae3SPaolo Bonzini } 726c50d8ae3SPaolo Bonzini 727c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 728c50d8ae3SPaolo Bonzini { 729c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 730c50d8ae3SPaolo Bonzini 731c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 732c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 733c50d8ae3SPaolo Bonzini 734c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 735c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 736c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 737c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 738c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 739c50d8ae3SPaolo Bonzini 740c50d8ae3SPaolo Bonzini return orig.spte; 741c50d8ae3SPaolo Bonzini } 742c50d8ae3SPaolo Bonzini 743c50d8ae3SPaolo Bonzini /* 744c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 745c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 746c50d8ae3SPaolo Bonzini * 747c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 748c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 749c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 750c50d8ae3SPaolo Bonzini * 751c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 752c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 753c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 754c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 755c50d8ae3SPaolo Bonzini * 756c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 757c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 758c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 759c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 760c50d8ae3SPaolo Bonzini */ 761c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 762c50d8ae3SPaolo Bonzini { 763c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = page_header(__pa(sptep)); 764c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 765c50d8ae3SPaolo Bonzini int count; 766c50d8ae3SPaolo Bonzini 767c50d8ae3SPaolo Bonzini retry: 768c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 769c50d8ae3SPaolo Bonzini smp_rmb(); 770c50d8ae3SPaolo Bonzini 771c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 772c50d8ae3SPaolo Bonzini smp_rmb(); 773c50d8ae3SPaolo Bonzini 774c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 775c50d8ae3SPaolo Bonzini smp_rmb(); 776c50d8ae3SPaolo Bonzini 777c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 778c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 779c50d8ae3SPaolo Bonzini goto retry; 780c50d8ae3SPaolo Bonzini 781c50d8ae3SPaolo Bonzini return spte.spte; 782c50d8ae3SPaolo Bonzini } 783c50d8ae3SPaolo Bonzini #endif 784c50d8ae3SPaolo Bonzini 785c50d8ae3SPaolo Bonzini static bool spte_can_locklessly_be_made_writable(u64 spte) 786c50d8ae3SPaolo Bonzini { 787c50d8ae3SPaolo Bonzini return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) == 788c50d8ae3SPaolo Bonzini (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE); 789c50d8ae3SPaolo Bonzini } 790c50d8ae3SPaolo Bonzini 791c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 792c50d8ae3SPaolo Bonzini { 793c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 794c50d8ae3SPaolo Bonzini return false; 795c50d8ae3SPaolo Bonzini 796c50d8ae3SPaolo Bonzini /* 797c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 798c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 799c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 800c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 801c50d8ae3SPaolo Bonzini */ 802c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 803c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 804c50d8ae3SPaolo Bonzini return true; 805c50d8ae3SPaolo Bonzini 806c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 807c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 808c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 809c50d8ae3SPaolo Bonzini return true; 810c50d8ae3SPaolo Bonzini } 811c50d8ae3SPaolo Bonzini 812c50d8ae3SPaolo Bonzini return false; 813c50d8ae3SPaolo Bonzini } 814c50d8ae3SPaolo Bonzini 815c50d8ae3SPaolo Bonzini static bool is_accessed_spte(u64 spte) 816c50d8ae3SPaolo Bonzini { 817c50d8ae3SPaolo Bonzini u64 accessed_mask = spte_shadow_accessed_mask(spte); 818c50d8ae3SPaolo Bonzini 819c50d8ae3SPaolo Bonzini return accessed_mask ? spte & accessed_mask 820c50d8ae3SPaolo Bonzini : !is_access_track_spte(spte); 821c50d8ae3SPaolo Bonzini } 822c50d8ae3SPaolo Bonzini 823c50d8ae3SPaolo Bonzini static bool is_dirty_spte(u64 spte) 824c50d8ae3SPaolo Bonzini { 825c50d8ae3SPaolo Bonzini u64 dirty_mask = spte_shadow_dirty_mask(spte); 826c50d8ae3SPaolo Bonzini 827c50d8ae3SPaolo Bonzini return dirty_mask ? spte & dirty_mask : spte & PT_WRITABLE_MASK; 828c50d8ae3SPaolo Bonzini } 829c50d8ae3SPaolo Bonzini 830c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 831c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 832c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 833c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 834c50d8ae3SPaolo Bonzini * the spte. 835c50d8ae3SPaolo Bonzini */ 836c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 837c50d8ae3SPaolo Bonzini { 838c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 839c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 840c50d8ae3SPaolo Bonzini } 841c50d8ae3SPaolo Bonzini 842c50d8ae3SPaolo Bonzini /* 843c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 844c50d8ae3SPaolo Bonzini * accessed/dirty status. 845c50d8ae3SPaolo Bonzini */ 846c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 847c50d8ae3SPaolo Bonzini { 848c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 849c50d8ae3SPaolo Bonzini 850c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 851c50d8ae3SPaolo Bonzini 852c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 853c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 854c50d8ae3SPaolo Bonzini return old_spte; 855c50d8ae3SPaolo Bonzini } 856c50d8ae3SPaolo Bonzini 857c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 858c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 859c50d8ae3SPaolo Bonzini else 860c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 861c50d8ae3SPaolo Bonzini 862c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 863c50d8ae3SPaolo Bonzini 864c50d8ae3SPaolo Bonzini return old_spte; 865c50d8ae3SPaolo Bonzini } 866c50d8ae3SPaolo Bonzini 867c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 868c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 869c50d8ae3SPaolo Bonzini * 870c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 871c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 872c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 873c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 874c50d8ae3SPaolo Bonzini * case. 875c50d8ae3SPaolo Bonzini * 876c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 877c50d8ae3SPaolo Bonzini */ 878c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 879c50d8ae3SPaolo Bonzini { 880c50d8ae3SPaolo Bonzini bool flush = false; 881c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 882c50d8ae3SPaolo Bonzini 883c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 884c50d8ae3SPaolo Bonzini return false; 885c50d8ae3SPaolo Bonzini 886c50d8ae3SPaolo Bonzini /* 887c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 888c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 889c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 890c50d8ae3SPaolo Bonzini */ 891c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 892c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 893c50d8ae3SPaolo Bonzini flush = true; 894c50d8ae3SPaolo Bonzini 895c50d8ae3SPaolo Bonzini /* 896c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 897c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 898c50d8ae3SPaolo Bonzini */ 899c50d8ae3SPaolo Bonzini 900c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 901c50d8ae3SPaolo Bonzini flush = true; 902c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 903c50d8ae3SPaolo Bonzini } 904c50d8ae3SPaolo Bonzini 905c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 906c50d8ae3SPaolo Bonzini flush = true; 907c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 908c50d8ae3SPaolo Bonzini } 909c50d8ae3SPaolo Bonzini 910c50d8ae3SPaolo Bonzini return flush; 911c50d8ae3SPaolo Bonzini } 912c50d8ae3SPaolo Bonzini 913c50d8ae3SPaolo Bonzini /* 914c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 915c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 916c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 917c50d8ae3SPaolo Bonzini * Returns non-zero if the PTE was previously valid. 918c50d8ae3SPaolo Bonzini */ 919c50d8ae3SPaolo Bonzini static int mmu_spte_clear_track_bits(u64 *sptep) 920c50d8ae3SPaolo Bonzini { 921c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 922c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 923c50d8ae3SPaolo Bonzini 924c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 925c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 926c50d8ae3SPaolo Bonzini else 927c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 928c50d8ae3SPaolo Bonzini 929c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 930c50d8ae3SPaolo Bonzini return 0; 931c50d8ae3SPaolo Bonzini 932c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 933c50d8ae3SPaolo Bonzini 934c50d8ae3SPaolo Bonzini /* 935c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 936c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 937c50d8ae3SPaolo Bonzini * unmap it from mmu first. 938c50d8ae3SPaolo Bonzini */ 939c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 940c50d8ae3SPaolo Bonzini 941c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 942c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 943c50d8ae3SPaolo Bonzini 944c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 945c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 946c50d8ae3SPaolo Bonzini 947c50d8ae3SPaolo Bonzini return 1; 948c50d8ae3SPaolo Bonzini } 949c50d8ae3SPaolo Bonzini 950c50d8ae3SPaolo Bonzini /* 951c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 952c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 953c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 954c50d8ae3SPaolo Bonzini */ 955c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 956c50d8ae3SPaolo Bonzini { 957c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 958c50d8ae3SPaolo Bonzini } 959c50d8ae3SPaolo Bonzini 960c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 961c50d8ae3SPaolo Bonzini { 962c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 963c50d8ae3SPaolo Bonzini } 964c50d8ae3SPaolo Bonzini 965c50d8ae3SPaolo Bonzini static u64 mark_spte_for_access_track(u64 spte) 966c50d8ae3SPaolo Bonzini { 967c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) 968c50d8ae3SPaolo Bonzini return spte & ~shadow_accessed_mask; 969c50d8ae3SPaolo Bonzini 970c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 971c50d8ae3SPaolo Bonzini return spte; 972c50d8ae3SPaolo Bonzini 973c50d8ae3SPaolo Bonzini /* 974c50d8ae3SPaolo Bonzini * Making an Access Tracking PTE will result in removal of write access 975c50d8ae3SPaolo Bonzini * from the PTE. So, verify that we will be able to restore the write 976c50d8ae3SPaolo Bonzini * access in the fast page fault path later on. 977c50d8ae3SPaolo Bonzini */ 978c50d8ae3SPaolo Bonzini WARN_ONCE((spte & PT_WRITABLE_MASK) && 979c50d8ae3SPaolo Bonzini !spte_can_locklessly_be_made_writable(spte), 980c50d8ae3SPaolo Bonzini "kvm: Writable SPTE is not locklessly dirty-trackable\n"); 981c50d8ae3SPaolo Bonzini 982c50d8ae3SPaolo Bonzini WARN_ONCE(spte & (shadow_acc_track_saved_bits_mask << 983c50d8ae3SPaolo Bonzini shadow_acc_track_saved_bits_shift), 984c50d8ae3SPaolo Bonzini "kvm: Access Tracking saved bit locations are not zero\n"); 985c50d8ae3SPaolo Bonzini 986c50d8ae3SPaolo Bonzini spte |= (spte & shadow_acc_track_saved_bits_mask) << 987c50d8ae3SPaolo Bonzini shadow_acc_track_saved_bits_shift; 988c50d8ae3SPaolo Bonzini spte &= ~shadow_acc_track_mask; 989c50d8ae3SPaolo Bonzini 990c50d8ae3SPaolo Bonzini return spte; 991c50d8ae3SPaolo Bonzini } 992c50d8ae3SPaolo Bonzini 993c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 994c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 995c50d8ae3SPaolo Bonzini { 996c50d8ae3SPaolo Bonzini u64 new_spte = spte; 997c50d8ae3SPaolo Bonzini u64 saved_bits = (spte >> shadow_acc_track_saved_bits_shift) 998c50d8ae3SPaolo Bonzini & shadow_acc_track_saved_bits_mask; 999c50d8ae3SPaolo Bonzini 1000c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 1001c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 1002c50d8ae3SPaolo Bonzini 1003c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 1004c50d8ae3SPaolo Bonzini new_spte &= ~(shadow_acc_track_saved_bits_mask << 1005c50d8ae3SPaolo Bonzini shadow_acc_track_saved_bits_shift); 1006c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 1007c50d8ae3SPaolo Bonzini 1008c50d8ae3SPaolo Bonzini return new_spte; 1009c50d8ae3SPaolo Bonzini } 1010c50d8ae3SPaolo Bonzini 1011c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 1012c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 1013c50d8ae3SPaolo Bonzini { 1014c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 1015c50d8ae3SPaolo Bonzini 1016c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 1017c50d8ae3SPaolo Bonzini return false; 1018c50d8ae3SPaolo Bonzini 1019c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 1020c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 1021c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1022c50d8ae3SPaolo Bonzini } else { 1023c50d8ae3SPaolo Bonzini /* 1024c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 1025c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 1026c50d8ae3SPaolo Bonzini */ 1027c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 1028c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 1029c50d8ae3SPaolo Bonzini 1030c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 1031c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 1032c50d8ae3SPaolo Bonzini } 1033c50d8ae3SPaolo Bonzini 1034c50d8ae3SPaolo Bonzini return true; 1035c50d8ae3SPaolo Bonzini } 1036c50d8ae3SPaolo Bonzini 1037c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 1038c50d8ae3SPaolo Bonzini { 1039c50d8ae3SPaolo Bonzini /* 1040c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 1041c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 1042c50d8ae3SPaolo Bonzini */ 1043c50d8ae3SPaolo Bonzini local_irq_disable(); 1044c50d8ae3SPaolo Bonzini 1045c50d8ae3SPaolo Bonzini /* 1046c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 1047c50d8ae3SPaolo Bonzini * to vcpu->mode. 1048c50d8ae3SPaolo Bonzini */ 1049c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 1050c50d8ae3SPaolo Bonzini } 1051c50d8ae3SPaolo Bonzini 1052c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 1053c50d8ae3SPaolo Bonzini { 1054c50d8ae3SPaolo Bonzini /* 1055c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 1056c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 1057c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 1058c50d8ae3SPaolo Bonzini */ 1059c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 1060c50d8ae3SPaolo Bonzini local_irq_enable(); 1061c50d8ae3SPaolo Bonzini } 1062c50d8ae3SPaolo Bonzini 1063c50d8ae3SPaolo Bonzini static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, 1064c50d8ae3SPaolo Bonzini struct kmem_cache *base_cache, int min) 1065c50d8ae3SPaolo Bonzini { 1066c50d8ae3SPaolo Bonzini void *obj; 1067c50d8ae3SPaolo Bonzini 1068c50d8ae3SPaolo Bonzini if (cache->nobjs >= min) 1069c50d8ae3SPaolo Bonzini return 0; 1070c50d8ae3SPaolo Bonzini while (cache->nobjs < ARRAY_SIZE(cache->objects)) { 1071c50d8ae3SPaolo Bonzini obj = kmem_cache_zalloc(base_cache, GFP_KERNEL_ACCOUNT); 1072c50d8ae3SPaolo Bonzini if (!obj) 1073c50d8ae3SPaolo Bonzini return cache->nobjs >= min ? 0 : -ENOMEM; 1074c50d8ae3SPaolo Bonzini cache->objects[cache->nobjs++] = obj; 1075c50d8ae3SPaolo Bonzini } 1076c50d8ae3SPaolo Bonzini return 0; 1077c50d8ae3SPaolo Bonzini } 1078c50d8ae3SPaolo Bonzini 1079c50d8ae3SPaolo Bonzini static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache) 1080c50d8ae3SPaolo Bonzini { 1081c50d8ae3SPaolo Bonzini return cache->nobjs; 1082c50d8ae3SPaolo Bonzini } 1083c50d8ae3SPaolo Bonzini 1084c50d8ae3SPaolo Bonzini static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc, 1085c50d8ae3SPaolo Bonzini struct kmem_cache *cache) 1086c50d8ae3SPaolo Bonzini { 1087c50d8ae3SPaolo Bonzini while (mc->nobjs) 1088c50d8ae3SPaolo Bonzini kmem_cache_free(cache, mc->objects[--mc->nobjs]); 1089c50d8ae3SPaolo Bonzini } 1090c50d8ae3SPaolo Bonzini 1091c50d8ae3SPaolo Bonzini static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, 1092c50d8ae3SPaolo Bonzini int min) 1093c50d8ae3SPaolo Bonzini { 1094c50d8ae3SPaolo Bonzini void *page; 1095c50d8ae3SPaolo Bonzini 1096c50d8ae3SPaolo Bonzini if (cache->nobjs >= min) 1097c50d8ae3SPaolo Bonzini return 0; 1098c50d8ae3SPaolo Bonzini while (cache->nobjs < ARRAY_SIZE(cache->objects)) { 1099c50d8ae3SPaolo Bonzini page = (void *)__get_free_page(GFP_KERNEL_ACCOUNT); 1100c50d8ae3SPaolo Bonzini if (!page) 1101c50d8ae3SPaolo Bonzini return cache->nobjs >= min ? 0 : -ENOMEM; 1102c50d8ae3SPaolo Bonzini cache->objects[cache->nobjs++] = page; 1103c50d8ae3SPaolo Bonzini } 1104c50d8ae3SPaolo Bonzini return 0; 1105c50d8ae3SPaolo Bonzini } 1106c50d8ae3SPaolo Bonzini 1107c50d8ae3SPaolo Bonzini static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) 1108c50d8ae3SPaolo Bonzini { 1109c50d8ae3SPaolo Bonzini while (mc->nobjs) 1110c50d8ae3SPaolo Bonzini free_page((unsigned long)mc->objects[--mc->nobjs]); 1111c50d8ae3SPaolo Bonzini } 1112c50d8ae3SPaolo Bonzini 1113c50d8ae3SPaolo Bonzini static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) 1114c50d8ae3SPaolo Bonzini { 1115c50d8ae3SPaolo Bonzini int r; 1116c50d8ae3SPaolo Bonzini 1117c50d8ae3SPaolo Bonzini r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 1118c50d8ae3SPaolo Bonzini pte_list_desc_cache, 8 + PTE_PREFETCH_NUM); 1119c50d8ae3SPaolo Bonzini if (r) 1120c50d8ae3SPaolo Bonzini goto out; 1121c50d8ae3SPaolo Bonzini r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); 1122c50d8ae3SPaolo Bonzini if (r) 1123c50d8ae3SPaolo Bonzini goto out; 1124c50d8ae3SPaolo Bonzini r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 1125c50d8ae3SPaolo Bonzini mmu_page_header_cache, 4); 1126c50d8ae3SPaolo Bonzini out: 1127c50d8ae3SPaolo Bonzini return r; 1128c50d8ae3SPaolo Bonzini } 1129c50d8ae3SPaolo Bonzini 1130c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 1131c50d8ae3SPaolo Bonzini { 1132c50d8ae3SPaolo Bonzini mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 1133c50d8ae3SPaolo Bonzini pte_list_desc_cache); 1134c50d8ae3SPaolo Bonzini mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); 1135c50d8ae3SPaolo Bonzini mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache, 1136c50d8ae3SPaolo Bonzini mmu_page_header_cache); 1137c50d8ae3SPaolo Bonzini } 1138c50d8ae3SPaolo Bonzini 1139c50d8ae3SPaolo Bonzini static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc) 1140c50d8ae3SPaolo Bonzini { 1141c50d8ae3SPaolo Bonzini void *p; 1142c50d8ae3SPaolo Bonzini 1143c50d8ae3SPaolo Bonzini BUG_ON(!mc->nobjs); 1144c50d8ae3SPaolo Bonzini p = mc->objects[--mc->nobjs]; 1145c50d8ae3SPaolo Bonzini return p; 1146c50d8ae3SPaolo Bonzini } 1147c50d8ae3SPaolo Bonzini 1148c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 1149c50d8ae3SPaolo Bonzini { 1150c50d8ae3SPaolo Bonzini return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 1151c50d8ae3SPaolo Bonzini } 1152c50d8ae3SPaolo Bonzini 1153c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 1154c50d8ae3SPaolo Bonzini { 1155c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 1156c50d8ae3SPaolo Bonzini } 1157c50d8ae3SPaolo Bonzini 1158c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 1159c50d8ae3SPaolo Bonzini { 1160c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1161c50d8ae3SPaolo Bonzini return sp->gfns[index]; 1162c50d8ae3SPaolo Bonzini 1163c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 1164c50d8ae3SPaolo Bonzini } 1165c50d8ae3SPaolo Bonzini 1166c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 1167c50d8ae3SPaolo Bonzini { 1168c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 1169c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 1170c50d8ae3SPaolo Bonzini return; 1171c50d8ae3SPaolo Bonzini } 1172c50d8ae3SPaolo Bonzini 1173c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 1174c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 1175c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 1176c50d8ae3SPaolo Bonzini sp->gfn, 1177c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 1178c50d8ae3SPaolo Bonzini } 1179c50d8ae3SPaolo Bonzini 1180c50d8ae3SPaolo Bonzini /* 1181c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 1182c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 1183c50d8ae3SPaolo Bonzini */ 1184c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 1185c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1186c50d8ae3SPaolo Bonzini int level) 1187c50d8ae3SPaolo Bonzini { 1188c50d8ae3SPaolo Bonzini unsigned long idx; 1189c50d8ae3SPaolo Bonzini 1190c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 1191c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 1192c50d8ae3SPaolo Bonzini } 1193c50d8ae3SPaolo Bonzini 1194c50d8ae3SPaolo Bonzini static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot, 1195c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 1196c50d8ae3SPaolo Bonzini { 1197c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 1198c50d8ae3SPaolo Bonzini int i; 1199c50d8ae3SPaolo Bonzini 12003bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1201c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 1202c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 1203c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 1204c50d8ae3SPaolo Bonzini } 1205c50d8ae3SPaolo Bonzini } 1206c50d8ae3SPaolo Bonzini 1207c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 1208c50d8ae3SPaolo Bonzini { 1209c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 1210c50d8ae3SPaolo Bonzini } 1211c50d8ae3SPaolo Bonzini 1212c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 1213c50d8ae3SPaolo Bonzini { 1214c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 1215c50d8ae3SPaolo Bonzini } 1216c50d8ae3SPaolo Bonzini 1217c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 1218c50d8ae3SPaolo Bonzini { 1219c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1220c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1221c50d8ae3SPaolo Bonzini gfn_t gfn; 1222c50d8ae3SPaolo Bonzini 1223c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 1224c50d8ae3SPaolo Bonzini gfn = sp->gfn; 1225c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1226c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 1227c50d8ae3SPaolo Bonzini 1228c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 12293bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 1230c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 1231c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 1232c50d8ae3SPaolo Bonzini 1233c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 1234c50d8ae3SPaolo Bonzini } 1235c50d8ae3SPaolo Bonzini 1236c50d8ae3SPaolo Bonzini static void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1237c50d8ae3SPaolo Bonzini { 1238c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 1239c50d8ae3SPaolo Bonzini return; 1240c50d8ae3SPaolo Bonzini 1241c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 1242c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 1243c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 1244c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 1245c50d8ae3SPaolo Bonzini } 1246c50d8ae3SPaolo Bonzini 1247c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 1248c50d8ae3SPaolo Bonzini { 1249c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1250c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1251c50d8ae3SPaolo Bonzini gfn_t gfn; 1252c50d8ae3SPaolo Bonzini 1253c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 1254c50d8ae3SPaolo Bonzini gfn = sp->gfn; 1255c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1256c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 12573bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 1258c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 1259c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 1260c50d8ae3SPaolo Bonzini 1261c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 1262c50d8ae3SPaolo Bonzini } 1263c50d8ae3SPaolo Bonzini 1264c50d8ae3SPaolo Bonzini static void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1265c50d8ae3SPaolo Bonzini { 1266c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 1267c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 1268c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 1269c50d8ae3SPaolo Bonzini } 1270c50d8ae3SPaolo Bonzini 1271c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 1272c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 1273c50d8ae3SPaolo Bonzini bool no_dirty_log) 1274c50d8ae3SPaolo Bonzini { 1275c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1276c50d8ae3SPaolo Bonzini 1277c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 127891b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 127991b0d268SPaolo Bonzini return NULL; 128091b0d268SPaolo Bonzini if (no_dirty_log && slot->dirty_bitmap) 128191b0d268SPaolo Bonzini return NULL; 1282c50d8ae3SPaolo Bonzini 1283c50d8ae3SPaolo Bonzini return slot; 1284c50d8ae3SPaolo Bonzini } 1285c50d8ae3SPaolo Bonzini 1286c50d8ae3SPaolo Bonzini /* 1287c50d8ae3SPaolo Bonzini * About rmap_head encoding: 1288c50d8ae3SPaolo Bonzini * 1289c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 1290c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 1291c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 1292c50d8ae3SPaolo Bonzini */ 1293c50d8ae3SPaolo Bonzini 1294c50d8ae3SPaolo Bonzini /* 1295c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 1296c50d8ae3SPaolo Bonzini */ 1297c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 1298c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 1299c50d8ae3SPaolo Bonzini { 1300c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 1301c50d8ae3SPaolo Bonzini int i, count = 0; 1302c50d8ae3SPaolo Bonzini 1303c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 1304c50d8ae3SPaolo Bonzini rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte); 1305c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 1306c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 1307c50d8ae3SPaolo Bonzini rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte); 1308c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 1309c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 1310c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 1311c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 1312c50d8ae3SPaolo Bonzini ++count; 1313c50d8ae3SPaolo Bonzini } else { 1314c50d8ae3SPaolo Bonzini rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte); 1315c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1316c50d8ae3SPaolo Bonzini while (desc->sptes[PTE_LIST_EXT-1] && desc->more) { 1317c50d8ae3SPaolo Bonzini desc = desc->more; 1318c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 1319c50d8ae3SPaolo Bonzini } 1320c50d8ae3SPaolo Bonzini if (desc->sptes[PTE_LIST_EXT-1]) { 1321c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 1322c50d8ae3SPaolo Bonzini desc = desc->more; 1323c50d8ae3SPaolo Bonzini } 1324c50d8ae3SPaolo Bonzini for (i = 0; desc->sptes[i]; ++i) 1325c50d8ae3SPaolo Bonzini ++count; 1326c50d8ae3SPaolo Bonzini desc->sptes[i] = spte; 1327c50d8ae3SPaolo Bonzini } 1328c50d8ae3SPaolo Bonzini return count; 1329c50d8ae3SPaolo Bonzini } 1330c50d8ae3SPaolo Bonzini 1331c50d8ae3SPaolo Bonzini static void 1332c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 1333c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 1334c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 1335c50d8ae3SPaolo Bonzini { 1336c50d8ae3SPaolo Bonzini int j; 1337c50d8ae3SPaolo Bonzini 1338c50d8ae3SPaolo Bonzini for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) 1339c50d8ae3SPaolo Bonzini ; 1340c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 1341c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 1342c50d8ae3SPaolo Bonzini if (j != 0) 1343c50d8ae3SPaolo Bonzini return; 1344c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 1345fe3c2b4cSMiaohe Lin rmap_head->val = 0; 1346c50d8ae3SPaolo Bonzini else 1347c50d8ae3SPaolo Bonzini if (prev_desc) 1348c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 1349c50d8ae3SPaolo Bonzini else 1350c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 1351c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 1352c50d8ae3SPaolo Bonzini } 1353c50d8ae3SPaolo Bonzini 1354c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 1355c50d8ae3SPaolo Bonzini { 1356c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 1357c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 1358c50d8ae3SPaolo Bonzini int i; 1359c50d8ae3SPaolo Bonzini 1360c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 1361c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 1362c50d8ae3SPaolo Bonzini BUG(); 1363c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 1364c50d8ae3SPaolo Bonzini rmap_printk("%s: %p 1->0\n", __func__, spte); 1365c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 1366c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 1367c50d8ae3SPaolo Bonzini BUG(); 1368c50d8ae3SPaolo Bonzini } 1369c50d8ae3SPaolo Bonzini rmap_head->val = 0; 1370c50d8ae3SPaolo Bonzini } else { 1371c50d8ae3SPaolo Bonzini rmap_printk("%s: %p many->many\n", __func__, spte); 1372c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1373c50d8ae3SPaolo Bonzini prev_desc = NULL; 1374c50d8ae3SPaolo Bonzini while (desc) { 1375c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { 1376c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 1377c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 1378c50d8ae3SPaolo Bonzini desc, i, prev_desc); 1379c50d8ae3SPaolo Bonzini return; 1380c50d8ae3SPaolo Bonzini } 1381c50d8ae3SPaolo Bonzini } 1382c50d8ae3SPaolo Bonzini prev_desc = desc; 1383c50d8ae3SPaolo Bonzini desc = desc->more; 1384c50d8ae3SPaolo Bonzini } 1385c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 1386c50d8ae3SPaolo Bonzini BUG(); 1387c50d8ae3SPaolo Bonzini } 1388c50d8ae3SPaolo Bonzini } 1389c50d8ae3SPaolo Bonzini 1390c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 1391c50d8ae3SPaolo Bonzini { 1392c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1393c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 1394c50d8ae3SPaolo Bonzini } 1395c50d8ae3SPaolo Bonzini 1396c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 1397c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot) 1398c50d8ae3SPaolo Bonzini { 1399c50d8ae3SPaolo Bonzini unsigned long idx; 1400c50d8ae3SPaolo Bonzini 1401c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 14023bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1403c50d8ae3SPaolo Bonzini } 1404c50d8ae3SPaolo Bonzini 1405c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 1406c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1407c50d8ae3SPaolo Bonzini { 1408c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1409c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1410c50d8ae3SPaolo Bonzini 1411c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1412c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 1413c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 1414c50d8ae3SPaolo Bonzini } 1415c50d8ae3SPaolo Bonzini 1416c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1417c50d8ae3SPaolo Bonzini { 1418c50d8ae3SPaolo Bonzini struct kvm_mmu_memory_cache *cache; 1419c50d8ae3SPaolo Bonzini 1420c50d8ae3SPaolo Bonzini cache = &vcpu->arch.mmu_pte_list_desc_cache; 1421c50d8ae3SPaolo Bonzini return mmu_memory_cache_free_objects(cache); 1422c50d8ae3SPaolo Bonzini } 1423c50d8ae3SPaolo Bonzini 1424c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1425c50d8ae3SPaolo Bonzini { 1426c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1427c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1428c50d8ae3SPaolo Bonzini 1429c50d8ae3SPaolo Bonzini sp = page_header(__pa(spte)); 1430c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 1431c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1432c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 1433c50d8ae3SPaolo Bonzini } 1434c50d8ae3SPaolo Bonzini 1435c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1436c50d8ae3SPaolo Bonzini { 1437c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1438c50d8ae3SPaolo Bonzini gfn_t gfn; 1439c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1440c50d8ae3SPaolo Bonzini 1441c50d8ae3SPaolo Bonzini sp = page_header(__pa(spte)); 1442c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1443c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 1444c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1445c50d8ae3SPaolo Bonzini } 1446c50d8ae3SPaolo Bonzini 1447c50d8ae3SPaolo Bonzini /* 1448c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1449c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1450c50d8ae3SPaolo Bonzini */ 1451c50d8ae3SPaolo Bonzini struct rmap_iterator { 1452c50d8ae3SPaolo Bonzini /* private fields */ 1453c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1454c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1455c50d8ae3SPaolo Bonzini }; 1456c50d8ae3SPaolo Bonzini 1457c50d8ae3SPaolo Bonzini /* 1458c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1459c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 14600a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1461c50d8ae3SPaolo Bonzini * 1462c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1463c50d8ae3SPaolo Bonzini */ 1464c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1465c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1466c50d8ae3SPaolo Bonzini { 1467c50d8ae3SPaolo Bonzini u64 *sptep; 1468c50d8ae3SPaolo Bonzini 1469c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1470c50d8ae3SPaolo Bonzini return NULL; 1471c50d8ae3SPaolo Bonzini 1472c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1473c50d8ae3SPaolo Bonzini iter->desc = NULL; 1474c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1475c50d8ae3SPaolo Bonzini goto out; 1476c50d8ae3SPaolo Bonzini } 1477c50d8ae3SPaolo Bonzini 1478c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1479c50d8ae3SPaolo Bonzini iter->pos = 0; 1480c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1481c50d8ae3SPaolo Bonzini out: 1482c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1483c50d8ae3SPaolo Bonzini return sptep; 1484c50d8ae3SPaolo Bonzini } 1485c50d8ae3SPaolo Bonzini 1486c50d8ae3SPaolo Bonzini /* 1487c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1488c50d8ae3SPaolo Bonzini * 1489c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1490c50d8ae3SPaolo Bonzini */ 1491c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1492c50d8ae3SPaolo Bonzini { 1493c50d8ae3SPaolo Bonzini u64 *sptep; 1494c50d8ae3SPaolo Bonzini 1495c50d8ae3SPaolo Bonzini if (iter->desc) { 1496c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1497c50d8ae3SPaolo Bonzini ++iter->pos; 1498c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1499c50d8ae3SPaolo Bonzini if (sptep) 1500c50d8ae3SPaolo Bonzini goto out; 1501c50d8ae3SPaolo Bonzini } 1502c50d8ae3SPaolo Bonzini 1503c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1504c50d8ae3SPaolo Bonzini 1505c50d8ae3SPaolo Bonzini if (iter->desc) { 1506c50d8ae3SPaolo Bonzini iter->pos = 0; 1507c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1508c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1509c50d8ae3SPaolo Bonzini goto out; 1510c50d8ae3SPaolo Bonzini } 1511c50d8ae3SPaolo Bonzini } 1512c50d8ae3SPaolo Bonzini 1513c50d8ae3SPaolo Bonzini return NULL; 1514c50d8ae3SPaolo Bonzini out: 1515c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1516c50d8ae3SPaolo Bonzini return sptep; 1517c50d8ae3SPaolo Bonzini } 1518c50d8ae3SPaolo Bonzini 1519c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1520c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1521c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1522c50d8ae3SPaolo Bonzini 1523c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1524c50d8ae3SPaolo Bonzini { 1525c50d8ae3SPaolo Bonzini if (mmu_spte_clear_track_bits(sptep)) 1526c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1527c50d8ae3SPaolo Bonzini } 1528c50d8ae3SPaolo Bonzini 1529c50d8ae3SPaolo Bonzini 1530c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1531c50d8ae3SPaolo Bonzini { 1532c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 15333bae0459SSean Christopherson WARN_ON(page_header(__pa(sptep))->role.level == PG_LEVEL_4K); 1534c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1535c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1536c50d8ae3SPaolo Bonzini return true; 1537c50d8ae3SPaolo Bonzini } 1538c50d8ae3SPaolo Bonzini 1539c50d8ae3SPaolo Bonzini return false; 1540c50d8ae3SPaolo Bonzini } 1541c50d8ae3SPaolo Bonzini 1542c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1543c50d8ae3SPaolo Bonzini { 1544c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 1545c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = page_header(__pa(sptep)); 1546c50d8ae3SPaolo Bonzini 1547c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1548c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1549c50d8ae3SPaolo Bonzini } 1550c50d8ae3SPaolo Bonzini } 1551c50d8ae3SPaolo Bonzini 1552c50d8ae3SPaolo Bonzini /* 1553c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1554c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1555c50d8ae3SPaolo Bonzini * 1556c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1557c50d8ae3SPaolo Bonzini * protection: 1558c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1559c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1560c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1561c50d8ae3SPaolo Bonzini * shadow page. 1562c50d8ae3SPaolo Bonzini * 1563c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1564c50d8ae3SPaolo Bonzini */ 1565c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1566c50d8ae3SPaolo Bonzini { 1567c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1568c50d8ae3SPaolo Bonzini 1569c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1570c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1571c50d8ae3SPaolo Bonzini return false; 1572c50d8ae3SPaolo Bonzini 1573c50d8ae3SPaolo Bonzini rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep); 1574c50d8ae3SPaolo Bonzini 1575c50d8ae3SPaolo Bonzini if (pt_protect) 1576c50d8ae3SPaolo Bonzini spte &= ~SPTE_MMU_WRITEABLE; 1577c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1578c50d8ae3SPaolo Bonzini 1579c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1580c50d8ae3SPaolo Bonzini } 1581c50d8ae3SPaolo Bonzini 1582c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1583c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1584c50d8ae3SPaolo Bonzini bool pt_protect) 1585c50d8ae3SPaolo Bonzini { 1586c50d8ae3SPaolo Bonzini u64 *sptep; 1587c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1588c50d8ae3SPaolo Bonzini bool flush = false; 1589c50d8ae3SPaolo Bonzini 1590c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1591c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1592c50d8ae3SPaolo Bonzini 1593c50d8ae3SPaolo Bonzini return flush; 1594c50d8ae3SPaolo Bonzini } 1595c50d8ae3SPaolo Bonzini 1596c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1597c50d8ae3SPaolo Bonzini { 1598c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1599c50d8ae3SPaolo Bonzini 1600c50d8ae3SPaolo Bonzini rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep); 1601c50d8ae3SPaolo Bonzini 1602c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1603c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1604c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1605c50d8ae3SPaolo Bonzini } 1606c50d8ae3SPaolo Bonzini 1607c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1608c50d8ae3SPaolo Bonzini { 1609c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1610c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1611c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1612c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1613c50d8ae3SPaolo Bonzini 1614c50d8ae3SPaolo Bonzini return was_writable; 1615c50d8ae3SPaolo Bonzini } 1616c50d8ae3SPaolo Bonzini 1617c50d8ae3SPaolo Bonzini /* 1618c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1619c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1620c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1621c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1622c50d8ae3SPaolo Bonzini */ 1623c50d8ae3SPaolo Bonzini static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1624c50d8ae3SPaolo Bonzini { 1625c50d8ae3SPaolo Bonzini u64 *sptep; 1626c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1627c50d8ae3SPaolo Bonzini bool flush = false; 1628c50d8ae3SPaolo Bonzini 1629c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1630c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1631c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1632c50d8ae3SPaolo Bonzini else 1633c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1634c50d8ae3SPaolo Bonzini 1635c50d8ae3SPaolo Bonzini return flush; 1636c50d8ae3SPaolo Bonzini } 1637c50d8ae3SPaolo Bonzini 1638c50d8ae3SPaolo Bonzini static bool spte_set_dirty(u64 *sptep) 1639c50d8ae3SPaolo Bonzini { 1640c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1641c50d8ae3SPaolo Bonzini 1642c50d8ae3SPaolo Bonzini rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep); 1643c50d8ae3SPaolo Bonzini 1644c50d8ae3SPaolo Bonzini /* 1645afaf0b2fSSean Christopherson * Similar to the !kvm_x86_ops.slot_disable_log_dirty case, 1646c50d8ae3SPaolo Bonzini * do not bother adding back write access to pages marked 1647c50d8ae3SPaolo Bonzini * SPTE_AD_WRPROT_ONLY_MASK. 1648c50d8ae3SPaolo Bonzini */ 1649c50d8ae3SPaolo Bonzini spte |= shadow_dirty_mask; 1650c50d8ae3SPaolo Bonzini 1651c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1652c50d8ae3SPaolo Bonzini } 1653c50d8ae3SPaolo Bonzini 1654c50d8ae3SPaolo Bonzini static bool __rmap_set_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1655c50d8ae3SPaolo Bonzini { 1656c50d8ae3SPaolo Bonzini u64 *sptep; 1657c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1658c50d8ae3SPaolo Bonzini bool flush = false; 1659c50d8ae3SPaolo Bonzini 1660c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1661c50d8ae3SPaolo Bonzini if (spte_ad_enabled(*sptep)) 1662c50d8ae3SPaolo Bonzini flush |= spte_set_dirty(sptep); 1663c50d8ae3SPaolo Bonzini 1664c50d8ae3SPaolo Bonzini return flush; 1665c50d8ae3SPaolo Bonzini } 1666c50d8ae3SPaolo Bonzini 1667c50d8ae3SPaolo Bonzini /** 1668c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1669c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1670c50d8ae3SPaolo Bonzini * @slot: slot to protect 1671c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1672c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1673c50d8ae3SPaolo Bonzini * 1674c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1675c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1676c50d8ae3SPaolo Bonzini */ 1677c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1678c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1679c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1680c50d8ae3SPaolo Bonzini { 1681c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1682c50d8ae3SPaolo Bonzini 1683c50d8ae3SPaolo Bonzini while (mask) { 1684c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 16853bae0459SSean Christopherson PG_LEVEL_4K, slot); 1686c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1687c50d8ae3SPaolo Bonzini 1688c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1689c50d8ae3SPaolo Bonzini mask &= mask - 1; 1690c50d8ae3SPaolo Bonzini } 1691c50d8ae3SPaolo Bonzini } 1692c50d8ae3SPaolo Bonzini 1693c50d8ae3SPaolo Bonzini /** 1694c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1695c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1696c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1697c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1698c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1699c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1700c50d8ae3SPaolo Bonzini * 1701c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1702c50d8ae3SPaolo Bonzini */ 1703c50d8ae3SPaolo Bonzini void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1704c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1705c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1706c50d8ae3SPaolo Bonzini { 1707c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1708c50d8ae3SPaolo Bonzini 1709c50d8ae3SPaolo Bonzini while (mask) { 1710c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 17113bae0459SSean Christopherson PG_LEVEL_4K, slot); 1712c50d8ae3SPaolo Bonzini __rmap_clear_dirty(kvm, rmap_head); 1713c50d8ae3SPaolo Bonzini 1714c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1715c50d8ae3SPaolo Bonzini mask &= mask - 1; 1716c50d8ae3SPaolo Bonzini } 1717c50d8ae3SPaolo Bonzini } 1718c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked); 1719c50d8ae3SPaolo Bonzini 1720c50d8ae3SPaolo Bonzini /** 1721c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1722c50d8ae3SPaolo Bonzini * PT level pages. 1723c50d8ae3SPaolo Bonzini * 1724c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1725c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1726c50d8ae3SPaolo Bonzini * 1727c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1728c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1729c50d8ae3SPaolo Bonzini */ 1730c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1731c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1732c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1733c50d8ae3SPaolo Bonzini { 1734afaf0b2fSSean Christopherson if (kvm_x86_ops.enable_log_dirty_pt_masked) 1735afaf0b2fSSean Christopherson kvm_x86_ops.enable_log_dirty_pt_masked(kvm, slot, gfn_offset, 1736c50d8ae3SPaolo Bonzini mask); 1737c50d8ae3SPaolo Bonzini else 1738c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1739c50d8ae3SPaolo Bonzini } 1740c50d8ae3SPaolo Bonzini 1741c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 1742c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, u64 gfn) 1743c50d8ae3SPaolo Bonzini { 1744c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1745c50d8ae3SPaolo Bonzini int i; 1746c50d8ae3SPaolo Bonzini bool write_protected = false; 1747c50d8ae3SPaolo Bonzini 17483bae0459SSean Christopherson for (i = PG_LEVEL_4K; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1749c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1750c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1751c50d8ae3SPaolo Bonzini } 1752c50d8ae3SPaolo Bonzini 1753c50d8ae3SPaolo Bonzini return write_protected; 1754c50d8ae3SPaolo Bonzini } 1755c50d8ae3SPaolo Bonzini 1756c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1757c50d8ae3SPaolo Bonzini { 1758c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1759c50d8ae3SPaolo Bonzini 1760c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 1761c50d8ae3SPaolo Bonzini return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn); 1762c50d8ae3SPaolo Bonzini } 1763c50d8ae3SPaolo Bonzini 1764c50d8ae3SPaolo Bonzini static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1765c50d8ae3SPaolo Bonzini { 1766c50d8ae3SPaolo Bonzini u64 *sptep; 1767c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1768c50d8ae3SPaolo Bonzini bool flush = false; 1769c50d8ae3SPaolo Bonzini 1770c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1771c50d8ae3SPaolo Bonzini rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep); 1772c50d8ae3SPaolo Bonzini 1773c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1774c50d8ae3SPaolo Bonzini flush = true; 1775c50d8ae3SPaolo Bonzini } 1776c50d8ae3SPaolo Bonzini 1777c50d8ae3SPaolo Bonzini return flush; 1778c50d8ae3SPaolo Bonzini } 1779c50d8ae3SPaolo Bonzini 1780c50d8ae3SPaolo Bonzini static int kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1781c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1782c50d8ae3SPaolo Bonzini unsigned long data) 1783c50d8ae3SPaolo Bonzini { 1784c50d8ae3SPaolo Bonzini return kvm_zap_rmapp(kvm, rmap_head); 1785c50d8ae3SPaolo Bonzini } 1786c50d8ae3SPaolo Bonzini 1787c50d8ae3SPaolo Bonzini static int kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1788c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1789c50d8ae3SPaolo Bonzini unsigned long data) 1790c50d8ae3SPaolo Bonzini { 1791c50d8ae3SPaolo Bonzini u64 *sptep; 1792c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1793c50d8ae3SPaolo Bonzini int need_flush = 0; 1794c50d8ae3SPaolo Bonzini u64 new_spte; 1795c50d8ae3SPaolo Bonzini pte_t *ptep = (pte_t *)data; 1796c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1797c50d8ae3SPaolo Bonzini 1798c50d8ae3SPaolo Bonzini WARN_ON(pte_huge(*ptep)); 1799c50d8ae3SPaolo Bonzini new_pfn = pte_pfn(*ptep); 1800c50d8ae3SPaolo Bonzini 1801c50d8ae3SPaolo Bonzini restart: 1802c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1803c50d8ae3SPaolo Bonzini rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n", 1804c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1805c50d8ae3SPaolo Bonzini 1806c50d8ae3SPaolo Bonzini need_flush = 1; 1807c50d8ae3SPaolo Bonzini 1808c50d8ae3SPaolo Bonzini if (pte_write(*ptep)) { 1809c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1810c50d8ae3SPaolo Bonzini goto restart; 1811c50d8ae3SPaolo Bonzini } else { 1812c50d8ae3SPaolo Bonzini new_spte = *sptep & ~PT64_BASE_ADDR_MASK; 1813c50d8ae3SPaolo Bonzini new_spte |= (u64)new_pfn << PAGE_SHIFT; 1814c50d8ae3SPaolo Bonzini 1815c50d8ae3SPaolo Bonzini new_spte &= ~PT_WRITABLE_MASK; 1816c50d8ae3SPaolo Bonzini new_spte &= ~SPTE_HOST_WRITEABLE; 1817c50d8ae3SPaolo Bonzini 1818c50d8ae3SPaolo Bonzini new_spte = mark_spte_for_access_track(new_spte); 1819c50d8ae3SPaolo Bonzini 1820c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1821c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1822c50d8ae3SPaolo Bonzini } 1823c50d8ae3SPaolo Bonzini } 1824c50d8ae3SPaolo Bonzini 1825c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1826c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1827c50d8ae3SPaolo Bonzini return 0; 1828c50d8ae3SPaolo Bonzini } 1829c50d8ae3SPaolo Bonzini 1830c50d8ae3SPaolo Bonzini return need_flush; 1831c50d8ae3SPaolo Bonzini } 1832c50d8ae3SPaolo Bonzini 1833c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1834c50d8ae3SPaolo Bonzini /* input fields. */ 1835c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1836c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1837c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1838c50d8ae3SPaolo Bonzini int start_level; 1839c50d8ae3SPaolo Bonzini int end_level; 1840c50d8ae3SPaolo Bonzini 1841c50d8ae3SPaolo Bonzini /* output fields. */ 1842c50d8ae3SPaolo Bonzini gfn_t gfn; 1843c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1844c50d8ae3SPaolo Bonzini int level; 1845c50d8ae3SPaolo Bonzini 1846c50d8ae3SPaolo Bonzini /* private field. */ 1847c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1848c50d8ae3SPaolo Bonzini }; 1849c50d8ae3SPaolo Bonzini 1850c50d8ae3SPaolo Bonzini static void 1851c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1852c50d8ae3SPaolo Bonzini { 1853c50d8ae3SPaolo Bonzini iterator->level = level; 1854c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1855c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1856c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1857c50d8ae3SPaolo Bonzini iterator->slot); 1858c50d8ae3SPaolo Bonzini } 1859c50d8ae3SPaolo Bonzini 1860c50d8ae3SPaolo Bonzini static void 1861c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1862c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, int start_level, 1863c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1864c50d8ae3SPaolo Bonzini { 1865c50d8ae3SPaolo Bonzini iterator->slot = slot; 1866c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1867c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1868c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1869c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1870c50d8ae3SPaolo Bonzini 1871c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1872c50d8ae3SPaolo Bonzini } 1873c50d8ae3SPaolo Bonzini 1874c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1875c50d8ae3SPaolo Bonzini { 1876c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1877c50d8ae3SPaolo Bonzini } 1878c50d8ae3SPaolo Bonzini 1879c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1880c50d8ae3SPaolo Bonzini { 1881c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1882c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1883c50d8ae3SPaolo Bonzini return; 1884c50d8ae3SPaolo Bonzini } 1885c50d8ae3SPaolo Bonzini 1886c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1887c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1888c50d8ae3SPaolo Bonzini return; 1889c50d8ae3SPaolo Bonzini } 1890c50d8ae3SPaolo Bonzini 1891c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1892c50d8ae3SPaolo Bonzini } 1893c50d8ae3SPaolo Bonzini 1894c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1895c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1896c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1897c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1898c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1899c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1900c50d8ae3SPaolo Bonzini 1901c50d8ae3SPaolo Bonzini static int kvm_handle_hva_range(struct kvm *kvm, 1902c50d8ae3SPaolo Bonzini unsigned long start, 1903c50d8ae3SPaolo Bonzini unsigned long end, 1904c50d8ae3SPaolo Bonzini unsigned long data, 1905c50d8ae3SPaolo Bonzini int (*handler)(struct kvm *kvm, 1906c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1907c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1908c50d8ae3SPaolo Bonzini gfn_t gfn, 1909c50d8ae3SPaolo Bonzini int level, 1910c50d8ae3SPaolo Bonzini unsigned long data)) 1911c50d8ae3SPaolo Bonzini { 1912c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1913c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 1914c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 1915c50d8ae3SPaolo Bonzini int ret = 0; 1916c50d8ae3SPaolo Bonzini int i; 1917c50d8ae3SPaolo Bonzini 1918c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 1919c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 1920c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 1921c50d8ae3SPaolo Bonzini unsigned long hva_start, hva_end; 1922c50d8ae3SPaolo Bonzini gfn_t gfn_start, gfn_end; 1923c50d8ae3SPaolo Bonzini 1924c50d8ae3SPaolo Bonzini hva_start = max(start, memslot->userspace_addr); 1925c50d8ae3SPaolo Bonzini hva_end = min(end, memslot->userspace_addr + 1926c50d8ae3SPaolo Bonzini (memslot->npages << PAGE_SHIFT)); 1927c50d8ae3SPaolo Bonzini if (hva_start >= hva_end) 1928c50d8ae3SPaolo Bonzini continue; 1929c50d8ae3SPaolo Bonzini /* 1930c50d8ae3SPaolo Bonzini * {gfn(page) | page intersects with [hva_start, hva_end)} = 1931c50d8ae3SPaolo Bonzini * {gfn_start, gfn_start+1, ..., gfn_end-1}. 1932c50d8ae3SPaolo Bonzini */ 1933c50d8ae3SPaolo Bonzini gfn_start = hva_to_gfn_memslot(hva_start, memslot); 1934c50d8ae3SPaolo Bonzini gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); 1935c50d8ae3SPaolo Bonzini 19363bae0459SSean Christopherson for_each_slot_rmap_range(memslot, PG_LEVEL_4K, 1937e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 1938c50d8ae3SPaolo Bonzini gfn_start, gfn_end - 1, 1939c50d8ae3SPaolo Bonzini &iterator) 1940c50d8ae3SPaolo Bonzini ret |= handler(kvm, iterator.rmap, memslot, 1941c50d8ae3SPaolo Bonzini iterator.gfn, iterator.level, data); 1942c50d8ae3SPaolo Bonzini } 1943c50d8ae3SPaolo Bonzini } 1944c50d8ae3SPaolo Bonzini 1945c50d8ae3SPaolo Bonzini return ret; 1946c50d8ae3SPaolo Bonzini } 1947c50d8ae3SPaolo Bonzini 1948c50d8ae3SPaolo Bonzini static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, 1949c50d8ae3SPaolo Bonzini unsigned long data, 1950c50d8ae3SPaolo Bonzini int (*handler)(struct kvm *kvm, 1951c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1952c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1953c50d8ae3SPaolo Bonzini gfn_t gfn, int level, 1954c50d8ae3SPaolo Bonzini unsigned long data)) 1955c50d8ae3SPaolo Bonzini { 1956c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler); 1957c50d8ae3SPaolo Bonzini } 1958c50d8ae3SPaolo Bonzini 1959c50d8ae3SPaolo Bonzini int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 1960c50d8ae3SPaolo Bonzini { 1961c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp); 1962c50d8ae3SPaolo Bonzini } 1963c50d8ae3SPaolo Bonzini 1964c50d8ae3SPaolo Bonzini int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 1965c50d8ae3SPaolo Bonzini { 1966c50d8ae3SPaolo Bonzini return kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); 1967c50d8ae3SPaolo Bonzini } 1968c50d8ae3SPaolo Bonzini 1969c50d8ae3SPaolo Bonzini static int kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1970c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1971c50d8ae3SPaolo Bonzini unsigned long data) 1972c50d8ae3SPaolo Bonzini { 1973c50d8ae3SPaolo Bonzini u64 *sptep; 1974c50d8ae3SPaolo Bonzini struct rmap_iterator uninitialized_var(iter); 1975c50d8ae3SPaolo Bonzini int young = 0; 1976c50d8ae3SPaolo Bonzini 1977c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1978c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1979c50d8ae3SPaolo Bonzini 1980c50d8ae3SPaolo Bonzini trace_kvm_age_page(gfn, level, slot, young); 1981c50d8ae3SPaolo Bonzini return young; 1982c50d8ae3SPaolo Bonzini } 1983c50d8ae3SPaolo Bonzini 1984c50d8ae3SPaolo Bonzini static int kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1985c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 1986c50d8ae3SPaolo Bonzini int level, unsigned long data) 1987c50d8ae3SPaolo Bonzini { 1988c50d8ae3SPaolo Bonzini u64 *sptep; 1989c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1990c50d8ae3SPaolo Bonzini 1991c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1992c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1993c50d8ae3SPaolo Bonzini return 1; 1994c50d8ae3SPaolo Bonzini return 0; 1995c50d8ae3SPaolo Bonzini } 1996c50d8ae3SPaolo Bonzini 1997c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1998c50d8ae3SPaolo Bonzini 1999c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 2000c50d8ae3SPaolo Bonzini { 2001c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 2002c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2003c50d8ae3SPaolo Bonzini 2004c50d8ae3SPaolo Bonzini sp = page_header(__pa(spte)); 2005c50d8ae3SPaolo Bonzini 2006c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 2007c50d8ae3SPaolo Bonzini 2008c50d8ae3SPaolo Bonzini kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, 0); 2009c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 2010c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 2011c50d8ae3SPaolo Bonzini } 2012c50d8ae3SPaolo Bonzini 2013c50d8ae3SPaolo Bonzini int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 2014c50d8ae3SPaolo Bonzini { 2015c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp); 2016c50d8ae3SPaolo Bonzini } 2017c50d8ae3SPaolo Bonzini 2018c50d8ae3SPaolo Bonzini int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 2019c50d8ae3SPaolo Bonzini { 2020c50d8ae3SPaolo Bonzini return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp); 2021c50d8ae3SPaolo Bonzini } 2022c50d8ae3SPaolo Bonzini 2023c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 2024c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 2025c50d8ae3SPaolo Bonzini { 2026c50d8ae3SPaolo Bonzini u64 *pos; 2027c50d8ae3SPaolo Bonzini u64 *end; 2028c50d8ae3SPaolo Bonzini 2029c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 2030c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 2031c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 2032c50d8ae3SPaolo Bonzini pos, *pos); 2033c50d8ae3SPaolo Bonzini return 0; 2034c50d8ae3SPaolo Bonzini } 2035c50d8ae3SPaolo Bonzini return 1; 2036c50d8ae3SPaolo Bonzini } 2037c50d8ae3SPaolo Bonzini #endif 2038c50d8ae3SPaolo Bonzini 2039c50d8ae3SPaolo Bonzini /* 2040c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 2041c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 2042c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 2043c50d8ae3SPaolo Bonzini * faster 2044c50d8ae3SPaolo Bonzini */ 2045c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 2046c50d8ae3SPaolo Bonzini { 2047c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 2048c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 2049c50d8ae3SPaolo Bonzini } 2050c50d8ae3SPaolo Bonzini 2051c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 2052c50d8ae3SPaolo Bonzini { 2053c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 2054c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 2055c50d8ae3SPaolo Bonzini list_del(&sp->link); 2056c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 2057c50d8ae3SPaolo Bonzini if (!sp->role.direct) 2058c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 2059c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 2060c50d8ae3SPaolo Bonzini } 2061c50d8ae3SPaolo Bonzini 2062c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 2063c50d8ae3SPaolo Bonzini { 2064c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 2065c50d8ae3SPaolo Bonzini } 2066c50d8ae3SPaolo Bonzini 2067c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 2068c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 2069c50d8ae3SPaolo Bonzini { 2070c50d8ae3SPaolo Bonzini if (!parent_pte) 2071c50d8ae3SPaolo Bonzini return; 2072c50d8ae3SPaolo Bonzini 2073c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 2074c50d8ae3SPaolo Bonzini } 2075c50d8ae3SPaolo Bonzini 2076c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 2077c50d8ae3SPaolo Bonzini u64 *parent_pte) 2078c50d8ae3SPaolo Bonzini { 2079c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 2080c50d8ae3SPaolo Bonzini } 2081c50d8ae3SPaolo Bonzini 2082c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 2083c50d8ae3SPaolo Bonzini u64 *parent_pte) 2084c50d8ae3SPaolo Bonzini { 2085c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 2086c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 2087c50d8ae3SPaolo Bonzini } 2088c50d8ae3SPaolo Bonzini 2089c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 2090c50d8ae3SPaolo Bonzini { 2091c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2092c50d8ae3SPaolo Bonzini 2093c50d8ae3SPaolo Bonzini sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 2094c50d8ae3SPaolo Bonzini sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache); 2095c50d8ae3SPaolo Bonzini if (!direct) 2096c50d8ae3SPaolo Bonzini sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache); 2097c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 2098c50d8ae3SPaolo Bonzini 2099c50d8ae3SPaolo Bonzini /* 2100c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 2101c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 2102c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 2103c50d8ae3SPaolo Bonzini */ 2104c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 2105c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 2106c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 2107c50d8ae3SPaolo Bonzini return sp; 2108c50d8ae3SPaolo Bonzini } 2109c50d8ae3SPaolo Bonzini 2110c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 2111c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 2112c50d8ae3SPaolo Bonzini { 2113c50d8ae3SPaolo Bonzini u64 *sptep; 2114c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2115c50d8ae3SPaolo Bonzini 2116c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 2117c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2118c50d8ae3SPaolo Bonzini } 2119c50d8ae3SPaolo Bonzini } 2120c50d8ae3SPaolo Bonzini 2121c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 2122c50d8ae3SPaolo Bonzini { 2123c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2124c50d8ae3SPaolo Bonzini unsigned int index; 2125c50d8ae3SPaolo Bonzini 2126c50d8ae3SPaolo Bonzini sp = page_header(__pa(spte)); 2127c50d8ae3SPaolo Bonzini index = spte - sp->spt; 2128c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 2129c50d8ae3SPaolo Bonzini return; 2130c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 2131c50d8ae3SPaolo Bonzini return; 2132c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2133c50d8ae3SPaolo Bonzini } 2134c50d8ae3SPaolo Bonzini 2135c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 2136c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2137c50d8ae3SPaolo Bonzini { 2138c50d8ae3SPaolo Bonzini return 0; 2139c50d8ae3SPaolo Bonzini } 2140c50d8ae3SPaolo Bonzini 2141c50d8ae3SPaolo Bonzini static void nonpaging_update_pte(struct kvm_vcpu *vcpu, 2142c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *spte, 2143c50d8ae3SPaolo Bonzini const void *pte) 2144c50d8ae3SPaolo Bonzini { 2145c50d8ae3SPaolo Bonzini WARN_ON(1); 2146c50d8ae3SPaolo Bonzini } 2147c50d8ae3SPaolo Bonzini 2148c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 2149c50d8ae3SPaolo Bonzini 2150c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 2151c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 2152c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2153c50d8ae3SPaolo Bonzini unsigned int idx; 2154c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 2155c50d8ae3SPaolo Bonzini unsigned int nr; 2156c50d8ae3SPaolo Bonzini }; 2157c50d8ae3SPaolo Bonzini 2158c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 2159c50d8ae3SPaolo Bonzini int idx) 2160c50d8ae3SPaolo Bonzini { 2161c50d8ae3SPaolo Bonzini int i; 2162c50d8ae3SPaolo Bonzini 2163c50d8ae3SPaolo Bonzini if (sp->unsync) 2164c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 2165c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 2166c50d8ae3SPaolo Bonzini return 0; 2167c50d8ae3SPaolo Bonzini 2168c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 2169c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 2170c50d8ae3SPaolo Bonzini pvec->nr++; 2171c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 2172c50d8ae3SPaolo Bonzini } 2173c50d8ae3SPaolo Bonzini 2174c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 2175c50d8ae3SPaolo Bonzini { 2176c50d8ae3SPaolo Bonzini --sp->unsync_children; 2177c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 2178c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 2179c50d8ae3SPaolo Bonzini } 2180c50d8ae3SPaolo Bonzini 2181c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 2182c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 2183c50d8ae3SPaolo Bonzini { 2184c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 2185c50d8ae3SPaolo Bonzini 2186c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 2187c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2188c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 2189c50d8ae3SPaolo Bonzini 2190c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 2191c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 2192c50d8ae3SPaolo Bonzini continue; 2193c50d8ae3SPaolo Bonzini } 2194c50d8ae3SPaolo Bonzini 2195c50d8ae3SPaolo Bonzini child = page_header(ent & PT64_BASE_ADDR_MASK); 2196c50d8ae3SPaolo Bonzini 2197c50d8ae3SPaolo Bonzini if (child->unsync_children) { 2198c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 2199c50d8ae3SPaolo Bonzini return -ENOSPC; 2200c50d8ae3SPaolo Bonzini 2201c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 2202c50d8ae3SPaolo Bonzini if (!ret) { 2203c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 2204c50d8ae3SPaolo Bonzini continue; 2205c50d8ae3SPaolo Bonzini } else if (ret > 0) { 2206c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 2207c50d8ae3SPaolo Bonzini } else 2208c50d8ae3SPaolo Bonzini return ret; 2209c50d8ae3SPaolo Bonzini } else if (child->unsync) { 2210c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 2211c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 2212c50d8ae3SPaolo Bonzini return -ENOSPC; 2213c50d8ae3SPaolo Bonzini } else 2214c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 2215c50d8ae3SPaolo Bonzini } 2216c50d8ae3SPaolo Bonzini 2217c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 2218c50d8ae3SPaolo Bonzini } 2219c50d8ae3SPaolo Bonzini 2220c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 2221c50d8ae3SPaolo Bonzini 2222c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 2223c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 2224c50d8ae3SPaolo Bonzini { 2225c50d8ae3SPaolo Bonzini pvec->nr = 0; 2226c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 2227c50d8ae3SPaolo Bonzini return 0; 2228c50d8ae3SPaolo Bonzini 2229c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 2230c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 2231c50d8ae3SPaolo Bonzini } 2232c50d8ae3SPaolo Bonzini 2233c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 2234c50d8ae3SPaolo Bonzini { 2235c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 2236c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 2237c50d8ae3SPaolo Bonzini sp->unsync = 0; 2238c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 2239c50d8ae3SPaolo Bonzini } 2240c50d8ae3SPaolo Bonzini 2241c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2242c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 2243c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2244c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 2245c50d8ae3SPaolo Bonzini 2246ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 2247ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 2248c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 2249c50d8ae3SPaolo Bonzini } else 2250c50d8ae3SPaolo Bonzini 2251c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 2252ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 2253ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 2254c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 2255c50d8ae3SPaolo Bonzini 2256c50d8ae3SPaolo Bonzini static inline bool is_ept_sp(struct kvm_mmu_page *sp) 2257c50d8ae3SPaolo Bonzini { 2258c50d8ae3SPaolo Bonzini return sp->role.cr0_wp && sp->role.smap_andnot_wp; 2259c50d8ae3SPaolo Bonzini } 2260c50d8ae3SPaolo Bonzini 2261c50d8ae3SPaolo Bonzini /* @sp->gfn should be write-protected at the call site */ 2262c50d8ae3SPaolo Bonzini static bool __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 2263c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2264c50d8ae3SPaolo Bonzini { 2265c50d8ae3SPaolo Bonzini if ((!is_ept_sp(sp) && sp->role.gpte_is_8_bytes != !!is_pae(vcpu)) || 2266c50d8ae3SPaolo Bonzini vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 2267c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 2268c50d8ae3SPaolo Bonzini return false; 2269c50d8ae3SPaolo Bonzini } 2270c50d8ae3SPaolo Bonzini 2271c50d8ae3SPaolo Bonzini return true; 2272c50d8ae3SPaolo Bonzini } 2273c50d8ae3SPaolo Bonzini 2274c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 2275c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2276c50d8ae3SPaolo Bonzini bool remote_flush) 2277c50d8ae3SPaolo Bonzini { 2278c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 2279c50d8ae3SPaolo Bonzini return false; 2280c50d8ae3SPaolo Bonzini 2281c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 2282c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 2283c50d8ae3SPaolo Bonzini else 2284c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2285c50d8ae3SPaolo Bonzini return true; 2286c50d8ae3SPaolo Bonzini } 2287c50d8ae3SPaolo Bonzini 2288c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 2289c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2290c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 2291c50d8ae3SPaolo Bonzini { 2292c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 2293c50d8ae3SPaolo Bonzini return; 2294c50d8ae3SPaolo Bonzini 2295c50d8ae3SPaolo Bonzini if (local_flush) 22968c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2297c50d8ae3SPaolo Bonzini } 2298c50d8ae3SPaolo Bonzini 2299c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 2300c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 2301c50d8ae3SPaolo Bonzini #else 2302c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 2303c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 2304c50d8ae3SPaolo Bonzini #endif 2305c50d8ae3SPaolo Bonzini 2306c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 2307c50d8ae3SPaolo Bonzini { 2308c50d8ae3SPaolo Bonzini return sp->role.invalid || 2309c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 2310c50d8ae3SPaolo Bonzini } 2311c50d8ae3SPaolo Bonzini 2312c50d8ae3SPaolo Bonzini static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 2313c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2314c50d8ae3SPaolo Bonzini { 2315c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(vcpu->kvm, sp); 2316c50d8ae3SPaolo Bonzini return __kvm_sync_page(vcpu, sp, invalid_list); 2317c50d8ae3SPaolo Bonzini } 2318c50d8ae3SPaolo Bonzini 2319c50d8ae3SPaolo Bonzini /* @gfn should be write-protected at the call site */ 2320c50d8ae3SPaolo Bonzini static bool kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, 2321c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2322c50d8ae3SPaolo Bonzini { 2323c50d8ae3SPaolo Bonzini struct kvm_mmu_page *s; 2324c50d8ae3SPaolo Bonzini bool ret = false; 2325c50d8ae3SPaolo Bonzini 2326c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) { 2327c50d8ae3SPaolo Bonzini if (!s->unsync) 2328c50d8ae3SPaolo Bonzini continue; 2329c50d8ae3SPaolo Bonzini 23303bae0459SSean Christopherson WARN_ON(s->role.level != PG_LEVEL_4K); 2331c50d8ae3SPaolo Bonzini ret |= kvm_sync_page(vcpu, s, invalid_list); 2332c50d8ae3SPaolo Bonzini } 2333c50d8ae3SPaolo Bonzini 2334c50d8ae3SPaolo Bonzini return ret; 2335c50d8ae3SPaolo Bonzini } 2336c50d8ae3SPaolo Bonzini 2337c50d8ae3SPaolo Bonzini struct mmu_page_path { 2338c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 2339c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 2340c50d8ae3SPaolo Bonzini }; 2341c50d8ae3SPaolo Bonzini 2342c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 2343c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 2344c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 2345c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 2346c50d8ae3SPaolo Bonzini 2347c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 2348c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 2349c50d8ae3SPaolo Bonzini int i) 2350c50d8ae3SPaolo Bonzini { 2351c50d8ae3SPaolo Bonzini int n; 2352c50d8ae3SPaolo Bonzini 2353c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 2354c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 2355c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 2356c50d8ae3SPaolo Bonzini int level = sp->role.level; 2357c50d8ae3SPaolo Bonzini 2358c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 23593bae0459SSean Christopherson if (level == PG_LEVEL_4K) 2360c50d8ae3SPaolo Bonzini break; 2361c50d8ae3SPaolo Bonzini 2362c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 2363c50d8ae3SPaolo Bonzini } 2364c50d8ae3SPaolo Bonzini 2365c50d8ae3SPaolo Bonzini return n; 2366c50d8ae3SPaolo Bonzini } 2367c50d8ae3SPaolo Bonzini 2368c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 2369c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 2370c50d8ae3SPaolo Bonzini { 2371c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2372c50d8ae3SPaolo Bonzini int level; 2373c50d8ae3SPaolo Bonzini 2374c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 2375c50d8ae3SPaolo Bonzini return 0; 2376c50d8ae3SPaolo Bonzini 2377c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 2378c50d8ae3SPaolo Bonzini 2379c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 2380c50d8ae3SPaolo Bonzini level = sp->role.level; 23813bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 2382c50d8ae3SPaolo Bonzini 2383c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 2384c50d8ae3SPaolo Bonzini 2385c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 2386c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 2387c50d8ae3SPaolo Bonzini */ 2388c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 2389c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 2390c50d8ae3SPaolo Bonzini } 2391c50d8ae3SPaolo Bonzini 2392c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 2393c50d8ae3SPaolo Bonzini { 2394c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2395c50d8ae3SPaolo Bonzini unsigned int level = 0; 2396c50d8ae3SPaolo Bonzini 2397c50d8ae3SPaolo Bonzini do { 2398c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 2399c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 2400c50d8ae3SPaolo Bonzini if (!sp) 2401c50d8ae3SPaolo Bonzini return; 2402c50d8ae3SPaolo Bonzini 2403c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 2404c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 2405c50d8ae3SPaolo Bonzini level++; 2406c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 2407c50d8ae3SPaolo Bonzini } 2408c50d8ae3SPaolo Bonzini 2409c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 2410c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 2411c50d8ae3SPaolo Bonzini { 2412c50d8ae3SPaolo Bonzini int i; 2413c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2414c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2415c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2416c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2417c50d8ae3SPaolo Bonzini bool flush = false; 2418c50d8ae3SPaolo Bonzini 2419c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2420c50d8ae3SPaolo Bonzini bool protected = false; 2421c50d8ae3SPaolo Bonzini 2422c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 2423c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 2424c50d8ae3SPaolo Bonzini 2425c50d8ae3SPaolo Bonzini if (protected) { 2426c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 2427c50d8ae3SPaolo Bonzini flush = false; 2428c50d8ae3SPaolo Bonzini } 2429c50d8ae3SPaolo Bonzini 2430c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2431c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2432c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2433c50d8ae3SPaolo Bonzini } 2434c50d8ae3SPaolo Bonzini if (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock)) { 2435c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2436c50d8ae3SPaolo Bonzini cond_resched_lock(&vcpu->kvm->mmu_lock); 2437c50d8ae3SPaolo Bonzini flush = false; 2438c50d8ae3SPaolo Bonzini } 2439c50d8ae3SPaolo Bonzini } 2440c50d8ae3SPaolo Bonzini 2441c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2442c50d8ae3SPaolo Bonzini } 2443c50d8ae3SPaolo Bonzini 2444c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2445c50d8ae3SPaolo Bonzini { 2446c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2447c50d8ae3SPaolo Bonzini } 2448c50d8ae3SPaolo Bonzini 2449c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2450c50d8ae3SPaolo Bonzini { 2451c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = page_header(__pa(spte)); 2452c50d8ae3SPaolo Bonzini 2453c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2454c50d8ae3SPaolo Bonzini } 2455c50d8ae3SPaolo Bonzini 2456c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2457c50d8ae3SPaolo Bonzini gfn_t gfn, 2458c50d8ae3SPaolo Bonzini gva_t gaddr, 2459c50d8ae3SPaolo Bonzini unsigned level, 2460c50d8ae3SPaolo Bonzini int direct, 24610a2b64c5SBen Gardon unsigned int access) 2462c50d8ae3SPaolo Bonzini { 2463fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2464c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2465ac101b7cSSean Christopherson struct hlist_head *sp_list; 2466c50d8ae3SPaolo Bonzini unsigned quadrant; 2467c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2468c50d8ae3SPaolo Bonzini bool need_sync = false; 2469c50d8ae3SPaolo Bonzini bool flush = false; 2470c50d8ae3SPaolo Bonzini int collisions = 0; 2471c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2472c50d8ae3SPaolo Bonzini 2473c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2474c50d8ae3SPaolo Bonzini role.level = level; 2475c50d8ae3SPaolo Bonzini role.direct = direct; 2476c50d8ae3SPaolo Bonzini if (role.direct) 2477c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2478c50d8ae3SPaolo Bonzini role.access = access; 2479fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2480c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2481c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2482c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2483c50d8ae3SPaolo Bonzini } 2484ac101b7cSSean Christopherson 2485ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2486ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2487c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2488c50d8ae3SPaolo Bonzini collisions++; 2489c50d8ae3SPaolo Bonzini continue; 2490c50d8ae3SPaolo Bonzini } 2491c50d8ae3SPaolo Bonzini 2492c50d8ae3SPaolo Bonzini if (!need_sync && sp->unsync) 2493c50d8ae3SPaolo Bonzini need_sync = true; 2494c50d8ae3SPaolo Bonzini 2495c50d8ae3SPaolo Bonzini if (sp->role.word != role.word) 2496c50d8ae3SPaolo Bonzini continue; 2497c50d8ae3SPaolo Bonzini 2498fb58a9c3SSean Christopherson if (direct_mmu) 2499fb58a9c3SSean Christopherson goto trace_get_page; 2500fb58a9c3SSean Christopherson 2501c50d8ae3SPaolo Bonzini if (sp->unsync) { 2502c50d8ae3SPaolo Bonzini /* The page is good, but __kvm_sync_page might still end 2503c50d8ae3SPaolo Bonzini * up zapping it. If so, break in order to rebuild it. 2504c50d8ae3SPaolo Bonzini */ 2505c50d8ae3SPaolo Bonzini if (!__kvm_sync_page(vcpu, sp, &invalid_list)) 2506c50d8ae3SPaolo Bonzini break; 2507c50d8ae3SPaolo Bonzini 2508c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 25098c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2510c50d8ae3SPaolo Bonzini } 2511c50d8ae3SPaolo Bonzini 2512c50d8ae3SPaolo Bonzini if (sp->unsync_children) 25138c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2514c50d8ae3SPaolo Bonzini 2515c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2516fb58a9c3SSean Christopherson 2517fb58a9c3SSean Christopherson trace_get_page: 2518c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2519c50d8ae3SPaolo Bonzini goto out; 2520c50d8ae3SPaolo Bonzini } 2521c50d8ae3SPaolo Bonzini 2522c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2523c50d8ae3SPaolo Bonzini 2524c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2525c50d8ae3SPaolo Bonzini 2526c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2527c50d8ae3SPaolo Bonzini sp->role = role; 2528ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2529c50d8ae3SPaolo Bonzini if (!direct) { 2530c50d8ae3SPaolo Bonzini /* 2531c50d8ae3SPaolo Bonzini * we should do write protection before syncing pages 2532c50d8ae3SPaolo Bonzini * otherwise the content of the synced shadow page may 2533c50d8ae3SPaolo Bonzini * be inconsistent with guest page table. 2534c50d8ae3SPaolo Bonzini */ 2535c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 25363bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2537c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2538c50d8ae3SPaolo Bonzini 25393bae0459SSean Christopherson if (level > PG_LEVEL_4K && need_sync) 2540c50d8ae3SPaolo Bonzini flush |= kvm_sync_pages(vcpu, gfn, &invalid_list); 2541c50d8ae3SPaolo Bonzini } 2542c50d8ae3SPaolo Bonzini clear_page(sp->spt); 2543c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2544c50d8ae3SPaolo Bonzini 2545c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2546c50d8ae3SPaolo Bonzini out: 2547c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2548c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2549c50d8ae3SPaolo Bonzini return sp; 2550c50d8ae3SPaolo Bonzini } 2551c50d8ae3SPaolo Bonzini 2552c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2553c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2554c50d8ae3SPaolo Bonzini u64 addr) 2555c50d8ae3SPaolo Bonzini { 2556c50d8ae3SPaolo Bonzini iterator->addr = addr; 2557c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2558c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2559c50d8ae3SPaolo Bonzini 2560c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2561c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2562c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2563c50d8ae3SPaolo Bonzini --iterator->level; 2564c50d8ae3SPaolo Bonzini 2565c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2566c50d8ae3SPaolo Bonzini /* 2567c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2568c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2569c50d8ae3SPaolo Bonzini */ 2570c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2571c50d8ae3SPaolo Bonzini 2572c50d8ae3SPaolo Bonzini iterator->shadow_addr 2573c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2574c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2575c50d8ae3SPaolo Bonzini --iterator->level; 2576c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2577c50d8ae3SPaolo Bonzini iterator->level = 0; 2578c50d8ae3SPaolo Bonzini } 2579c50d8ae3SPaolo Bonzini } 2580c50d8ae3SPaolo Bonzini 2581c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2582c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2583c50d8ae3SPaolo Bonzini { 2584c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2585c50d8ae3SPaolo Bonzini addr); 2586c50d8ae3SPaolo Bonzini } 2587c50d8ae3SPaolo Bonzini 2588c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2589c50d8ae3SPaolo Bonzini { 25903bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2591c50d8ae3SPaolo Bonzini return false; 2592c50d8ae3SPaolo Bonzini 2593c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2594c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2595c50d8ae3SPaolo Bonzini return true; 2596c50d8ae3SPaolo Bonzini } 2597c50d8ae3SPaolo Bonzini 2598c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2599c50d8ae3SPaolo Bonzini u64 spte) 2600c50d8ae3SPaolo Bonzini { 2601c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2602c50d8ae3SPaolo Bonzini iterator->level = 0; 2603c50d8ae3SPaolo Bonzini return; 2604c50d8ae3SPaolo Bonzini } 2605c50d8ae3SPaolo Bonzini 2606c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2607c50d8ae3SPaolo Bonzini --iterator->level; 2608c50d8ae3SPaolo Bonzini } 2609c50d8ae3SPaolo Bonzini 2610c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2611c50d8ae3SPaolo Bonzini { 2612c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2613c50d8ae3SPaolo Bonzini } 2614c50d8ae3SPaolo Bonzini 2615c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2616c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2617c50d8ae3SPaolo Bonzini { 2618c50d8ae3SPaolo Bonzini u64 spte; 2619c50d8ae3SPaolo Bonzini 2620c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2621c50d8ae3SPaolo Bonzini 2622c50d8ae3SPaolo Bonzini spte = __pa(sp->spt) | shadow_present_mask | PT_WRITABLE_MASK | 2623c50d8ae3SPaolo Bonzini shadow_user_mask | shadow_x_mask | shadow_me_mask; 2624c50d8ae3SPaolo Bonzini 2625c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2626c50d8ae3SPaolo Bonzini spte |= SPTE_AD_DISABLED_MASK; 2627c50d8ae3SPaolo Bonzini else 2628c50d8ae3SPaolo Bonzini spte |= shadow_accessed_mask; 2629c50d8ae3SPaolo Bonzini 2630c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2631c50d8ae3SPaolo Bonzini 2632c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2633c50d8ae3SPaolo Bonzini 2634c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2635c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2636c50d8ae3SPaolo Bonzini } 2637c50d8ae3SPaolo Bonzini 2638c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2639c50d8ae3SPaolo Bonzini unsigned direct_access) 2640c50d8ae3SPaolo Bonzini { 2641c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2642c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2643c50d8ae3SPaolo Bonzini 2644c50d8ae3SPaolo Bonzini /* 2645c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2646c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2647c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2648c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2649c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2650c50d8ae3SPaolo Bonzini */ 2651c50d8ae3SPaolo Bonzini child = page_header(*sptep & PT64_BASE_ADDR_MASK); 2652c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2653c50d8ae3SPaolo Bonzini return; 2654c50d8ae3SPaolo Bonzini 2655c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2656c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2657c50d8ae3SPaolo Bonzini } 2658c50d8ae3SPaolo Bonzini } 2659c50d8ae3SPaolo Bonzini 2660c50d8ae3SPaolo Bonzini static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 2661c50d8ae3SPaolo Bonzini u64 *spte) 2662c50d8ae3SPaolo Bonzini { 2663c50d8ae3SPaolo Bonzini u64 pte; 2664c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2665c50d8ae3SPaolo Bonzini 2666c50d8ae3SPaolo Bonzini pte = *spte; 2667c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2668c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2669c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2670c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2671c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2672c50d8ae3SPaolo Bonzini } else { 2673c50d8ae3SPaolo Bonzini child = page_header(pte & PT64_BASE_ADDR_MASK); 2674c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 2675c50d8ae3SPaolo Bonzini } 2676c50d8ae3SPaolo Bonzini return true; 2677c50d8ae3SPaolo Bonzini } 2678c50d8ae3SPaolo Bonzini 2679c50d8ae3SPaolo Bonzini if (is_mmio_spte(pte)) 2680c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2681c50d8ae3SPaolo Bonzini 2682c50d8ae3SPaolo Bonzini return false; 2683c50d8ae3SPaolo Bonzini } 2684c50d8ae3SPaolo Bonzini 2685c50d8ae3SPaolo Bonzini static void kvm_mmu_page_unlink_children(struct kvm *kvm, 2686c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2687c50d8ae3SPaolo Bonzini { 2688c50d8ae3SPaolo Bonzini unsigned i; 2689c50d8ae3SPaolo Bonzini 2690c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 2691c50d8ae3SPaolo Bonzini mmu_page_zap_pte(kvm, sp, sp->spt + i); 2692c50d8ae3SPaolo Bonzini } 2693c50d8ae3SPaolo Bonzini 2694c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2695c50d8ae3SPaolo Bonzini { 2696c50d8ae3SPaolo Bonzini u64 *sptep; 2697c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2698c50d8ae3SPaolo Bonzini 2699c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2700c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2701c50d8ae3SPaolo Bonzini } 2702c50d8ae3SPaolo Bonzini 2703c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2704c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2705c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2706c50d8ae3SPaolo Bonzini { 2707c50d8ae3SPaolo Bonzini int i, zapped = 0; 2708c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2709c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2710c50d8ae3SPaolo Bonzini 27113bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2712c50d8ae3SPaolo Bonzini return 0; 2713c50d8ae3SPaolo Bonzini 2714c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2715c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2716c50d8ae3SPaolo Bonzini 2717c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2718c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2719c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2720c50d8ae3SPaolo Bonzini zapped++; 2721c50d8ae3SPaolo Bonzini } 2722c50d8ae3SPaolo Bonzini } 2723c50d8ae3SPaolo Bonzini 2724c50d8ae3SPaolo Bonzini return zapped; 2725c50d8ae3SPaolo Bonzini } 2726c50d8ae3SPaolo Bonzini 2727c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2728c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2729c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2730c50d8ae3SPaolo Bonzini int *nr_zapped) 2731c50d8ae3SPaolo Bonzini { 2732c50d8ae3SPaolo Bonzini bool list_unstable; 2733c50d8ae3SPaolo Bonzini 2734c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2735c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2736c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 2737c50d8ae3SPaolo Bonzini kvm_mmu_page_unlink_children(kvm, sp); 2738c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2739c50d8ae3SPaolo Bonzini 2740c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2741c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2742c50d8ae3SPaolo Bonzini 2743c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2744c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2745c50d8ae3SPaolo Bonzini 2746c50d8ae3SPaolo Bonzini if (sp->unsync) 2747c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2748c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2749c50d8ae3SPaolo Bonzini /* Count self */ 2750c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2751f95eec9bSSean Christopherson 2752f95eec9bSSean Christopherson /* 2753f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2754f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2755f95eec9bSSean Christopherson * !sp->root_count. 2756f95eec9bSSean Christopherson */ 2757f95eec9bSSean Christopherson if (sp->role.invalid) 2758f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2759f95eec9bSSean Christopherson else 2760c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2761c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2762c50d8ae3SPaolo Bonzini } else { 2763f95eec9bSSean Christopherson /* 2764f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2765f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2766f95eec9bSSean Christopherson */ 2767f95eec9bSSean Christopherson list_del(&sp->link); 2768c50d8ae3SPaolo Bonzini 2769c50d8ae3SPaolo Bonzini /* 2770c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2771c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2772c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2773c50d8ae3SPaolo Bonzini */ 2774c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2775c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2776c50d8ae3SPaolo Bonzini } 2777c50d8ae3SPaolo Bonzini 2778c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2779c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2780c50d8ae3SPaolo Bonzini 2781c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2782c50d8ae3SPaolo Bonzini return list_unstable; 2783c50d8ae3SPaolo Bonzini } 2784c50d8ae3SPaolo Bonzini 2785c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2786c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2787c50d8ae3SPaolo Bonzini { 2788c50d8ae3SPaolo Bonzini int nr_zapped; 2789c50d8ae3SPaolo Bonzini 2790c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2791c50d8ae3SPaolo Bonzini return nr_zapped; 2792c50d8ae3SPaolo Bonzini } 2793c50d8ae3SPaolo Bonzini 2794c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2795c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2796c50d8ae3SPaolo Bonzini { 2797c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2798c50d8ae3SPaolo Bonzini 2799c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2800c50d8ae3SPaolo Bonzini return; 2801c50d8ae3SPaolo Bonzini 2802c50d8ae3SPaolo Bonzini /* 2803c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2804c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2805c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2806c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2807c50d8ae3SPaolo Bonzini * 2808c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2809c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2810c50d8ae3SPaolo Bonzini */ 2811c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2812c50d8ae3SPaolo Bonzini 2813c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2814c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2815c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2816c50d8ae3SPaolo Bonzini } 2817c50d8ae3SPaolo Bonzini } 2818c50d8ae3SPaolo Bonzini 28196b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 28206b82ef2cSSean Christopherson unsigned long nr_to_zap) 2821ba7888ddSSean Christopherson { 28226b82ef2cSSean Christopherson unsigned long total_zapped = 0; 28236b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2824ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 28256b82ef2cSSean Christopherson bool unstable; 28266b82ef2cSSean Christopherson int nr_zapped; 2827ba7888ddSSean Christopherson 28286b82ef2cSSean Christopherson if (list_empty(&kvm->arch.active_mmu_pages)) 2829ba7888ddSSean Christopherson return 0; 2830ba7888ddSSean Christopherson 28316b82ef2cSSean Christopherson restart: 28326b82ef2cSSean Christopherson list_for_each_entry_safe(sp, tmp, &kvm->arch.active_mmu_pages, link) { 28336b82ef2cSSean Christopherson /* 28346b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 28356b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 28366b82ef2cSSean Christopherson */ 28376b82ef2cSSean Christopherson if (sp->root_count) 28386b82ef2cSSean Christopherson continue; 28396b82ef2cSSean Christopherson 28406b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 28416b82ef2cSSean Christopherson &nr_zapped); 28426b82ef2cSSean Christopherson total_zapped += nr_zapped; 28436b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2844ba7888ddSSean Christopherson break; 2845ba7888ddSSean Christopherson 28466b82ef2cSSean Christopherson if (unstable) 28476b82ef2cSSean Christopherson goto restart; 2848ba7888ddSSean Christopherson } 28496b82ef2cSSean Christopherson 28506b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 28516b82ef2cSSean Christopherson 28526b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 28536b82ef2cSSean Christopherson return total_zapped; 28546b82ef2cSSean Christopherson } 28556b82ef2cSSean Christopherson 28566b82ef2cSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 28576b82ef2cSSean Christopherson { 28586b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 28596b82ef2cSSean Christopherson 28606b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 28616b82ef2cSSean Christopherson return 0; 28626b82ef2cSSean Christopherson 28636b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2864ba7888ddSSean Christopherson 2865ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2866ba7888ddSSean Christopherson return -ENOSPC; 2867ba7888ddSSean Christopherson return 0; 2868ba7888ddSSean Christopherson } 2869ba7888ddSSean Christopherson 2870c50d8ae3SPaolo Bonzini /* 2871c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2872c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2873c50d8ae3SPaolo Bonzini */ 2874c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2875c50d8ae3SPaolo Bonzini { 2876c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 2877c50d8ae3SPaolo Bonzini 2878c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 28796b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 28806b82ef2cSSean Christopherson goal_nr_mmu_pages); 2881c50d8ae3SPaolo Bonzini 2882c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2883c50d8ae3SPaolo Bonzini } 2884c50d8ae3SPaolo Bonzini 2885c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2886c50d8ae3SPaolo Bonzini 2887c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 2888c50d8ae3SPaolo Bonzini } 2889c50d8ae3SPaolo Bonzini 2890c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2891c50d8ae3SPaolo Bonzini { 2892c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2893c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2894c50d8ae3SPaolo Bonzini int r; 2895c50d8ae3SPaolo Bonzini 2896c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2897c50d8ae3SPaolo Bonzini r = 0; 2898c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 2899c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2900c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2901c50d8ae3SPaolo Bonzini sp->role.word); 2902c50d8ae3SPaolo Bonzini r = 1; 2903c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2904c50d8ae3SPaolo Bonzini } 2905c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2906c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 2907c50d8ae3SPaolo Bonzini 2908c50d8ae3SPaolo Bonzini return r; 2909c50d8ae3SPaolo Bonzini } 2910c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page); 2911c50d8ae3SPaolo Bonzini 2912c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2913c50d8ae3SPaolo Bonzini { 2914c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2915c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2916c50d8ae3SPaolo Bonzini sp->unsync = 1; 2917c50d8ae3SPaolo Bonzini 2918c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2919c50d8ae3SPaolo Bonzini } 2920c50d8ae3SPaolo Bonzini 2921c50d8ae3SPaolo Bonzini static bool mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, 2922c50d8ae3SPaolo Bonzini bool can_unsync) 2923c50d8ae3SPaolo Bonzini { 2924c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2925c50d8ae3SPaolo Bonzini 2926c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 2927c50d8ae3SPaolo Bonzini return true; 2928c50d8ae3SPaolo Bonzini 2929c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2930c50d8ae3SPaolo Bonzini if (!can_unsync) 2931c50d8ae3SPaolo Bonzini return true; 2932c50d8ae3SPaolo Bonzini 2933c50d8ae3SPaolo Bonzini if (sp->unsync) 2934c50d8ae3SPaolo Bonzini continue; 2935c50d8ae3SPaolo Bonzini 29363bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2937c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2938c50d8ae3SPaolo Bonzini } 2939c50d8ae3SPaolo Bonzini 2940c50d8ae3SPaolo Bonzini /* 2941c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2942c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2943c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2944c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2945c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2946c50d8ae3SPaolo Bonzini * following could happen: 2947c50d8ae3SPaolo Bonzini * 2948c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2949c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2950c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2951c50d8ae3SPaolo Bonzini * to be writable 2952c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2953c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2954c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2955c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2956c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2957c50d8ae3SPaolo Bonzini * fault. 2958c50d8ae3SPaolo Bonzini * 2959c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2960c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2961c50d8ae3SPaolo Bonzini * 2962c50d8ae3SPaolo Bonzini * 2.3 kvm_mmu_sync_pages() reads sp->unsync. 2963c50d8ae3SPaolo Bonzini * Since it is false, so it just returns. 2964c50d8ae3SPaolo Bonzini * 2965c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2966c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2967c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2968c50d8ae3SPaolo Bonzini * gets used. 2969c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2970c50d8ae3SPaolo Bonzini * as unsync 2971c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2972c50d8ae3SPaolo Bonzini * 2973c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2974c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2975c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2976c50d8ae3SPaolo Bonzini */ 2977c50d8ae3SPaolo Bonzini smp_wmb(); 2978c50d8ae3SPaolo Bonzini 2979c50d8ae3SPaolo Bonzini return false; 2980c50d8ae3SPaolo Bonzini } 2981c50d8ae3SPaolo Bonzini 2982c50d8ae3SPaolo Bonzini static bool kvm_is_mmio_pfn(kvm_pfn_t pfn) 2983c50d8ae3SPaolo Bonzini { 2984c50d8ae3SPaolo Bonzini if (pfn_valid(pfn)) 2985c50d8ae3SPaolo Bonzini return !is_zero_pfn(pfn) && PageReserved(pfn_to_page(pfn)) && 2986c50d8ae3SPaolo Bonzini /* 2987c50d8ae3SPaolo Bonzini * Some reserved pages, such as those from NVDIMM 2988c50d8ae3SPaolo Bonzini * DAX devices, are not for MMIO, and can be mapped 2989c50d8ae3SPaolo Bonzini * with cached memory type for better performance. 2990c50d8ae3SPaolo Bonzini * However, the above check misconceives those pages 2991c50d8ae3SPaolo Bonzini * as MMIO, and results in KVM mapping them with UC 2992c50d8ae3SPaolo Bonzini * memory type, which would hurt the performance. 2993c50d8ae3SPaolo Bonzini * Therefore, we check the host memory type in addition 2994c50d8ae3SPaolo Bonzini * and only treat UC/UC-/WC pages as MMIO. 2995c50d8ae3SPaolo Bonzini */ 2996c50d8ae3SPaolo Bonzini (!pat_enabled() || pat_pfn_immune_to_uc_mtrr(pfn)); 2997c50d8ae3SPaolo Bonzini 2998c50d8ae3SPaolo Bonzini return !e820__mapped_raw_any(pfn_to_hpa(pfn), 2999c50d8ae3SPaolo Bonzini pfn_to_hpa(pfn + 1) - 1, 3000c50d8ae3SPaolo Bonzini E820_TYPE_RAM); 3001c50d8ae3SPaolo Bonzini } 3002c50d8ae3SPaolo Bonzini 3003c50d8ae3SPaolo Bonzini /* Bits which may be returned by set_spte() */ 3004c50d8ae3SPaolo Bonzini #define SET_SPTE_WRITE_PROTECTED_PT BIT(0) 3005c50d8ae3SPaolo Bonzini #define SET_SPTE_NEED_REMOTE_TLB_FLUSH BIT(1) 3006c50d8ae3SPaolo Bonzini 3007c50d8ae3SPaolo Bonzini static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 30080a2b64c5SBen Gardon unsigned int pte_access, int level, 3009c50d8ae3SPaolo Bonzini gfn_t gfn, kvm_pfn_t pfn, bool speculative, 3010c50d8ae3SPaolo Bonzini bool can_unsync, bool host_writable) 3011c50d8ae3SPaolo Bonzini { 3012c50d8ae3SPaolo Bonzini u64 spte = 0; 3013c50d8ae3SPaolo Bonzini int ret = 0; 3014c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3015c50d8ae3SPaolo Bonzini 3016c50d8ae3SPaolo Bonzini if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access)) 3017c50d8ae3SPaolo Bonzini return 0; 3018c50d8ae3SPaolo Bonzini 3019c50d8ae3SPaolo Bonzini sp = page_header(__pa(sptep)); 3020c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 3021c50d8ae3SPaolo Bonzini spte |= SPTE_AD_DISABLED_MASK; 3022c50d8ae3SPaolo Bonzini else if (kvm_vcpu_ad_need_write_protect(vcpu)) 3023c50d8ae3SPaolo Bonzini spte |= SPTE_AD_WRPROT_ONLY_MASK; 3024c50d8ae3SPaolo Bonzini 3025c50d8ae3SPaolo Bonzini /* 3026c50d8ae3SPaolo Bonzini * For the EPT case, shadow_present_mask is 0 if hardware 3027c50d8ae3SPaolo Bonzini * supports exec-only page table entries. In that case, 3028c50d8ae3SPaolo Bonzini * ACC_USER_MASK and shadow_user_mask are used to represent 3029c50d8ae3SPaolo Bonzini * read access. See FNAME(gpte_access) in paging_tmpl.h. 3030c50d8ae3SPaolo Bonzini */ 3031c50d8ae3SPaolo Bonzini spte |= shadow_present_mask; 3032c50d8ae3SPaolo Bonzini if (!speculative) 3033c50d8ae3SPaolo Bonzini spte |= spte_shadow_accessed_mask(spte); 3034c50d8ae3SPaolo Bonzini 30353bae0459SSean Christopherson if (level > PG_LEVEL_4K && (pte_access & ACC_EXEC_MASK) && 3036c50d8ae3SPaolo Bonzini is_nx_huge_page_enabled()) { 3037c50d8ae3SPaolo Bonzini pte_access &= ~ACC_EXEC_MASK; 3038c50d8ae3SPaolo Bonzini } 3039c50d8ae3SPaolo Bonzini 3040c50d8ae3SPaolo Bonzini if (pte_access & ACC_EXEC_MASK) 3041c50d8ae3SPaolo Bonzini spte |= shadow_x_mask; 3042c50d8ae3SPaolo Bonzini else 3043c50d8ae3SPaolo Bonzini spte |= shadow_nx_mask; 3044c50d8ae3SPaolo Bonzini 3045c50d8ae3SPaolo Bonzini if (pte_access & ACC_USER_MASK) 3046c50d8ae3SPaolo Bonzini spte |= shadow_user_mask; 3047c50d8ae3SPaolo Bonzini 30483bae0459SSean Christopherson if (level > PG_LEVEL_4K) 3049c50d8ae3SPaolo Bonzini spte |= PT_PAGE_SIZE_MASK; 3050c50d8ae3SPaolo Bonzini if (tdp_enabled) 3051afaf0b2fSSean Christopherson spte |= kvm_x86_ops.get_mt_mask(vcpu, gfn, 3052c50d8ae3SPaolo Bonzini kvm_is_mmio_pfn(pfn)); 3053c50d8ae3SPaolo Bonzini 3054c50d8ae3SPaolo Bonzini if (host_writable) 3055c50d8ae3SPaolo Bonzini spte |= SPTE_HOST_WRITEABLE; 3056c50d8ae3SPaolo Bonzini else 3057c50d8ae3SPaolo Bonzini pte_access &= ~ACC_WRITE_MASK; 3058c50d8ae3SPaolo Bonzini 3059c50d8ae3SPaolo Bonzini if (!kvm_is_mmio_pfn(pfn)) 3060c50d8ae3SPaolo Bonzini spte |= shadow_me_mask; 3061c50d8ae3SPaolo Bonzini 3062c50d8ae3SPaolo Bonzini spte |= (u64)pfn << PAGE_SHIFT; 3063c50d8ae3SPaolo Bonzini 3064c50d8ae3SPaolo Bonzini if (pte_access & ACC_WRITE_MASK) { 3065c50d8ae3SPaolo Bonzini spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE; 3066c50d8ae3SPaolo Bonzini 3067c50d8ae3SPaolo Bonzini /* 3068c50d8ae3SPaolo Bonzini * Optimization: for pte sync, if spte was writable the hash 3069c50d8ae3SPaolo Bonzini * lookup is unnecessary (and expensive). Write protection 3070c50d8ae3SPaolo Bonzini * is responsibility of mmu_get_page / kvm_sync_page. 3071c50d8ae3SPaolo Bonzini * Same reasoning can be applied to dirty page accounting. 3072c50d8ae3SPaolo Bonzini */ 3073c50d8ae3SPaolo Bonzini if (!can_unsync && is_writable_pte(*sptep)) 3074c50d8ae3SPaolo Bonzini goto set_pte; 3075c50d8ae3SPaolo Bonzini 3076c50d8ae3SPaolo Bonzini if (mmu_need_write_protect(vcpu, gfn, can_unsync)) { 3077c50d8ae3SPaolo Bonzini pgprintk("%s: found shadow page for %llx, marking ro\n", 3078c50d8ae3SPaolo Bonzini __func__, gfn); 3079c50d8ae3SPaolo Bonzini ret |= SET_SPTE_WRITE_PROTECTED_PT; 3080c50d8ae3SPaolo Bonzini pte_access &= ~ACC_WRITE_MASK; 3081c50d8ae3SPaolo Bonzini spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE); 3082c50d8ae3SPaolo Bonzini } 3083c50d8ae3SPaolo Bonzini } 3084c50d8ae3SPaolo Bonzini 3085c50d8ae3SPaolo Bonzini if (pte_access & ACC_WRITE_MASK) { 3086c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3087c50d8ae3SPaolo Bonzini spte |= spte_shadow_dirty_mask(spte); 3088c50d8ae3SPaolo Bonzini } 3089c50d8ae3SPaolo Bonzini 3090c50d8ae3SPaolo Bonzini if (speculative) 3091c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 3092c50d8ae3SPaolo Bonzini 3093c50d8ae3SPaolo Bonzini set_pte: 3094c50d8ae3SPaolo Bonzini if (mmu_spte_update(sptep, spte)) 3095c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 3096c50d8ae3SPaolo Bonzini return ret; 3097c50d8ae3SPaolo Bonzini } 3098c50d8ae3SPaolo Bonzini 30990a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 31000a2b64c5SBen Gardon unsigned int pte_access, int write_fault, int level, 31010a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 31020a2b64c5SBen Gardon bool host_writable) 3103c50d8ae3SPaolo Bonzini { 3104c50d8ae3SPaolo Bonzini int was_rmapped = 0; 3105c50d8ae3SPaolo Bonzini int rmap_count; 3106c50d8ae3SPaolo Bonzini int set_spte_ret; 3107c50d8ae3SPaolo Bonzini int ret = RET_PF_RETRY; 3108c50d8ae3SPaolo Bonzini bool flush = false; 3109c50d8ae3SPaolo Bonzini 3110c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 3111c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 3112c50d8ae3SPaolo Bonzini 3113c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 3114c50d8ae3SPaolo Bonzini /* 3115c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 3116c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 3117c50d8ae3SPaolo Bonzini */ 31183bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 3119c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 3120c50d8ae3SPaolo Bonzini u64 pte = *sptep; 3121c50d8ae3SPaolo Bonzini 3122c50d8ae3SPaolo Bonzini child = page_header(pte & PT64_BASE_ADDR_MASK); 3123c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 3124c50d8ae3SPaolo Bonzini flush = true; 3125c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 3126c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 3127c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 3128c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 3129c50d8ae3SPaolo Bonzini flush = true; 3130c50d8ae3SPaolo Bonzini } else 3131c50d8ae3SPaolo Bonzini was_rmapped = 1; 3132c50d8ae3SPaolo Bonzini } 3133c50d8ae3SPaolo Bonzini 3134c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 3135c50d8ae3SPaolo Bonzini speculative, true, host_writable); 3136c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 3137c50d8ae3SPaolo Bonzini if (write_fault) 3138c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 31398c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 3140c50d8ae3SPaolo Bonzini } 3141c50d8ae3SPaolo Bonzini 3142c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 3143c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 3144c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 3145c50d8ae3SPaolo Bonzini 3146c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) 3147c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 3148c50d8ae3SPaolo Bonzini 3149c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 3150c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 3151c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 3152c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 3153c50d8ae3SPaolo Bonzini 3154c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 3155c50d8ae3SPaolo Bonzini if (!was_rmapped) { 3156c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 3157c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 3158c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 3159c50d8ae3SPaolo Bonzini } 3160c50d8ae3SPaolo Bonzini } 3161c50d8ae3SPaolo Bonzini 3162c50d8ae3SPaolo Bonzini return ret; 3163c50d8ae3SPaolo Bonzini } 3164c50d8ae3SPaolo Bonzini 3165c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 3166c50d8ae3SPaolo Bonzini bool no_dirty_log) 3167c50d8ae3SPaolo Bonzini { 3168c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 3169c50d8ae3SPaolo Bonzini 3170c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 3171c50d8ae3SPaolo Bonzini if (!slot) 3172c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 3173c50d8ae3SPaolo Bonzini 3174c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 3175c50d8ae3SPaolo Bonzini } 3176c50d8ae3SPaolo Bonzini 3177c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 3178c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 3179c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 3180c50d8ae3SPaolo Bonzini { 3181c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 3182c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 31830a2b64c5SBen Gardon unsigned int access = sp->role.access; 3184c50d8ae3SPaolo Bonzini int i, ret; 3185c50d8ae3SPaolo Bonzini gfn_t gfn; 3186c50d8ae3SPaolo Bonzini 3187c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 3188c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 3189c50d8ae3SPaolo Bonzini if (!slot) 3190c50d8ae3SPaolo Bonzini return -1; 3191c50d8ae3SPaolo Bonzini 3192c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 3193c50d8ae3SPaolo Bonzini if (ret <= 0) 3194c50d8ae3SPaolo Bonzini return -1; 3195c50d8ae3SPaolo Bonzini 3196c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 3197c50d8ae3SPaolo Bonzini mmu_set_spte(vcpu, start, access, 0, sp->role.level, gfn, 3198c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 3199c50d8ae3SPaolo Bonzini put_page(pages[i]); 3200c50d8ae3SPaolo Bonzini } 3201c50d8ae3SPaolo Bonzini 3202c50d8ae3SPaolo Bonzini return 0; 3203c50d8ae3SPaolo Bonzini } 3204c50d8ae3SPaolo Bonzini 3205c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 3206c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 3207c50d8ae3SPaolo Bonzini { 3208c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 3209c50d8ae3SPaolo Bonzini int i; 3210c50d8ae3SPaolo Bonzini 3211c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3212c50d8ae3SPaolo Bonzini 3213c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 3214c50d8ae3SPaolo Bonzini spte = sp->spt + i; 3215c50d8ae3SPaolo Bonzini 3216c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 3217c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 3218c50d8ae3SPaolo Bonzini if (!start) 3219c50d8ae3SPaolo Bonzini continue; 3220c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 3221c50d8ae3SPaolo Bonzini break; 3222c50d8ae3SPaolo Bonzini start = NULL; 3223c50d8ae3SPaolo Bonzini } else if (!start) 3224c50d8ae3SPaolo Bonzini start = spte; 3225c50d8ae3SPaolo Bonzini } 3226c50d8ae3SPaolo Bonzini } 3227c50d8ae3SPaolo Bonzini 3228c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 3229c50d8ae3SPaolo Bonzini { 3230c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3231c50d8ae3SPaolo Bonzini 3232c50d8ae3SPaolo Bonzini sp = page_header(__pa(sptep)); 3233c50d8ae3SPaolo Bonzini 3234c50d8ae3SPaolo Bonzini /* 3235c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 3236c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 3237c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 3238c50d8ae3SPaolo Bonzini */ 3239c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 3240c50d8ae3SPaolo Bonzini return; 3241c50d8ae3SPaolo Bonzini 32423bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3243c50d8ae3SPaolo Bonzini return; 3244c50d8ae3SPaolo Bonzini 3245c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 3246c50d8ae3SPaolo Bonzini } 3247c50d8ae3SPaolo Bonzini 3248db543216SSean Christopherson static int host_pfn_mapping_level(struct kvm_vcpu *vcpu, gfn_t gfn, 3249293e306eSSean Christopherson kvm_pfn_t pfn, struct kvm_memory_slot *slot) 3250db543216SSean Christopherson { 3251db543216SSean Christopherson unsigned long hva; 3252db543216SSean Christopherson pte_t *pte; 3253db543216SSean Christopherson int level; 3254db543216SSean Christopherson 3255e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 32563bae0459SSean Christopherson return PG_LEVEL_4K; 3257db543216SSean Christopherson 3258293e306eSSean Christopherson /* 3259293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 3260293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 3261293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 3262293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 3263293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 3264293e306eSSean Christopherson * read-only memslot. 3265293e306eSSean Christopherson */ 3266db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 3267db543216SSean Christopherson 3268db543216SSean Christopherson pte = lookup_address_in_mm(vcpu->kvm->mm, hva, &level); 3269db543216SSean Christopherson if (unlikely(!pte)) 32703bae0459SSean Christopherson return PG_LEVEL_4K; 3271db543216SSean Christopherson 3272db543216SSean Christopherson return level; 3273db543216SSean Christopherson } 3274db543216SSean Christopherson 327583f06fa7SSean Christopherson static int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 327683f06fa7SSean Christopherson int max_level, kvm_pfn_t *pfnp) 32770885904dSSean Christopherson { 3278293e306eSSean Christopherson struct kvm_memory_slot *slot; 32792c0629f4SSean Christopherson struct kvm_lpage_info *linfo; 32800885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 328117eff019SSean Christopherson kvm_pfn_t mask; 328283f06fa7SSean Christopherson int level; 32830885904dSSean Christopherson 32843bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 32853bae0459SSean Christopherson return PG_LEVEL_4K; 328617eff019SSean Christopherson 3287e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 32883bae0459SSean Christopherson return PG_LEVEL_4K; 328917eff019SSean Christopherson 3290293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 3291293e306eSSean Christopherson if (!slot) 32923bae0459SSean Christopherson return PG_LEVEL_4K; 3293293e306eSSean Christopherson 3294703c335dSSean Christopherson max_level = min(max_level, max_page_level); 32953bae0459SSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 32962c0629f4SSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 32972c0629f4SSean Christopherson if (!linfo->disallow_lpage) 3298293e306eSSean Christopherson break; 3299293e306eSSean Christopherson } 3300293e306eSSean Christopherson 33013bae0459SSean Christopherson if (max_level == PG_LEVEL_4K) 33023bae0459SSean Christopherson return PG_LEVEL_4K; 3303293e306eSSean Christopherson 3304293e306eSSean Christopherson level = host_pfn_mapping_level(vcpu, gfn, pfn, slot); 33053bae0459SSean Christopherson if (level == PG_LEVEL_4K) 330683f06fa7SSean Christopherson return level; 330717eff019SSean Christopherson 3308db543216SSean Christopherson level = min(level, max_level); 33094cd071d1SSean Christopherson 33100885904dSSean Christopherson /* 33114cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 33124cd071d1SSean Christopherson * the pmd can't be split from under us. 33130885904dSSean Christopherson */ 33140885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 33150885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 33164cd071d1SSean Christopherson *pfnp = pfn & ~mask; 331783f06fa7SSean Christopherson 331883f06fa7SSean Christopherson return level; 33190885904dSSean Christopherson } 33200885904dSSean Christopherson 3321c50d8ae3SPaolo Bonzini static void disallowed_hugepage_adjust(struct kvm_shadow_walk_iterator it, 3322c50d8ae3SPaolo Bonzini gfn_t gfn, kvm_pfn_t *pfnp, int *levelp) 3323c50d8ae3SPaolo Bonzini { 3324c50d8ae3SPaolo Bonzini int level = *levelp; 3325c50d8ae3SPaolo Bonzini u64 spte = *it.sptep; 3326c50d8ae3SPaolo Bonzini 33273bae0459SSean Christopherson if (it.level == level && level > PG_LEVEL_4K && 3328c50d8ae3SPaolo Bonzini is_nx_huge_page_enabled() && 3329c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 3330c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 3331c50d8ae3SPaolo Bonzini /* 3332c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 3333c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 3334c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 3335c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 3336c50d8ae3SPaolo Bonzini * the address. 3337c50d8ae3SPaolo Bonzini */ 3338c50d8ae3SPaolo Bonzini u64 page_mask = KVM_PAGES_PER_HPAGE(level) - KVM_PAGES_PER_HPAGE(level - 1); 3339c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 3340c50d8ae3SPaolo Bonzini (*levelp)--; 3341c50d8ae3SPaolo Bonzini } 3342c50d8ae3SPaolo Bonzini } 3343c50d8ae3SPaolo Bonzini 3344c50d8ae3SPaolo Bonzini static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, int write, 334583f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 334683f06fa7SSean Christopherson bool prefault, bool account_disallowed_nx_lpage) 3347c50d8ae3SPaolo Bonzini { 3348c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 3349c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 335083f06fa7SSean Christopherson int level, ret; 3351c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 3352c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 3353c50d8ae3SPaolo Bonzini 33540c7a98e3SSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 3355c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3356c50d8ae3SPaolo Bonzini 335783f06fa7SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn); 33584cd071d1SSean Christopherson 3359c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 3360c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 3361c50d8ae3SPaolo Bonzini /* 3362c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 3363c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 3364c50d8ae3SPaolo Bonzini */ 3365c50d8ae3SPaolo Bonzini disallowed_hugepage_adjust(it, gfn, &pfn, &level); 3366c50d8ae3SPaolo Bonzini 3367c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 3368c50d8ae3SPaolo Bonzini if (it.level == level) 3369c50d8ae3SPaolo Bonzini break; 3370c50d8ae3SPaolo Bonzini 3371c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 3372c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(*it.sptep)) { 3373c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 3374c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 3375c50d8ae3SPaolo Bonzini 3376c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 33772cb70fd4SSean Christopherson if (account_disallowed_nx_lpage) 3378c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 3379c50d8ae3SPaolo Bonzini } 3380c50d8ae3SPaolo Bonzini } 3381c50d8ae3SPaolo Bonzini 3382c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 3383c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 3384c50d8ae3SPaolo Bonzini map_writable); 3385c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 3386c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 3387c50d8ae3SPaolo Bonzini return ret; 3388c50d8ae3SPaolo Bonzini } 3389c50d8ae3SPaolo Bonzini 3390c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 3391c50d8ae3SPaolo Bonzini { 3392c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 3393c50d8ae3SPaolo Bonzini } 3394c50d8ae3SPaolo Bonzini 3395c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 3396c50d8ae3SPaolo Bonzini { 3397c50d8ae3SPaolo Bonzini /* 3398c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 3399c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 3400c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 3401c50d8ae3SPaolo Bonzini */ 3402c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 3403c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3404c50d8ae3SPaolo Bonzini 3405c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 3406c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 3407c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3408c50d8ae3SPaolo Bonzini } 3409c50d8ae3SPaolo Bonzini 3410c50d8ae3SPaolo Bonzini return -EFAULT; 3411c50d8ae3SPaolo Bonzini } 3412c50d8ae3SPaolo Bonzini 3413c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 34140a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 34150a2b64c5SBen Gardon int *ret_val) 3416c50d8ae3SPaolo Bonzini { 3417c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 3418c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 3419c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 3420c50d8ae3SPaolo Bonzini return true; 3421c50d8ae3SPaolo Bonzini } 3422c50d8ae3SPaolo Bonzini 3423c50d8ae3SPaolo Bonzini if (unlikely(is_noslot_pfn(pfn))) 3424c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 3425c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 3426c50d8ae3SPaolo Bonzini 3427c50d8ae3SPaolo Bonzini return false; 3428c50d8ae3SPaolo Bonzini } 3429c50d8ae3SPaolo Bonzini 3430c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 3431c50d8ae3SPaolo Bonzini { 3432c50d8ae3SPaolo Bonzini /* 3433c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3434c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3435c50d8ae3SPaolo Bonzini */ 3436c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3437c50d8ae3SPaolo Bonzini return false; 3438c50d8ae3SPaolo Bonzini 3439c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 3440c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 3441c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 3442c50d8ae3SPaolo Bonzini return false; 3443c50d8ae3SPaolo Bonzini 3444c50d8ae3SPaolo Bonzini /* 3445c50d8ae3SPaolo Bonzini * #PF can be fast if: 3446c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3447c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3448c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3449c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3450c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3451c50d8ae3SPaolo Bonzini * 3452c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3453c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3454c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3455c50d8ae3SPaolo Bonzini * accesses to a present page. 3456c50d8ae3SPaolo Bonzini */ 3457c50d8ae3SPaolo Bonzini 3458c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 3459c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 3460c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 3461c50d8ae3SPaolo Bonzini } 3462c50d8ae3SPaolo Bonzini 3463c50d8ae3SPaolo Bonzini /* 3464c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3465c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3466c50d8ae3SPaolo Bonzini */ 3467c50d8ae3SPaolo Bonzini static bool 3468c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 3469c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3470c50d8ae3SPaolo Bonzini { 3471c50d8ae3SPaolo Bonzini gfn_t gfn; 3472c50d8ae3SPaolo Bonzini 3473c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3474c50d8ae3SPaolo Bonzini 3475c50d8ae3SPaolo Bonzini /* 3476c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3477c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3478c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3479c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3480c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3481c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3482c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3483c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3484c50d8ae3SPaolo Bonzini * 3485c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3486c50d8ae3SPaolo Bonzini */ 3487c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3488c50d8ae3SPaolo Bonzini return false; 3489c50d8ae3SPaolo Bonzini 3490c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3491c50d8ae3SPaolo Bonzini /* 3492c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3493c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3494c50d8ae3SPaolo Bonzini */ 3495c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3496c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3497c50d8ae3SPaolo Bonzini } 3498c50d8ae3SPaolo Bonzini 3499c50d8ae3SPaolo Bonzini return true; 3500c50d8ae3SPaolo Bonzini } 3501c50d8ae3SPaolo Bonzini 3502c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3503c50d8ae3SPaolo Bonzini { 3504c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3505c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3506c50d8ae3SPaolo Bonzini 3507c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3508c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3509c50d8ae3SPaolo Bonzini 3510c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3511c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3512c50d8ae3SPaolo Bonzini } 3513c50d8ae3SPaolo Bonzini 3514c50d8ae3SPaolo Bonzini /* 3515c50d8ae3SPaolo Bonzini * Return value: 3516c50d8ae3SPaolo Bonzini * - true: let the vcpu to access on the same address again. 3517c50d8ae3SPaolo Bonzini * - false: let the real page fault path to fix it. 3518c50d8ae3SPaolo Bonzini */ 3519f9fa2509SSean Christopherson static bool fast_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 3520c50d8ae3SPaolo Bonzini u32 error_code) 3521c50d8ae3SPaolo Bonzini { 3522c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3523c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3524c50d8ae3SPaolo Bonzini bool fault_handled = false; 3525c50d8ae3SPaolo Bonzini u64 spte = 0ull; 3526c50d8ae3SPaolo Bonzini uint retry_count = 0; 3527c50d8ae3SPaolo Bonzini 3528c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3529c50d8ae3SPaolo Bonzini return false; 3530c50d8ae3SPaolo Bonzini 3531c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3532c50d8ae3SPaolo Bonzini 3533c50d8ae3SPaolo Bonzini do { 3534c50d8ae3SPaolo Bonzini u64 new_spte; 3535c50d8ae3SPaolo Bonzini 3536736c291cSSean Christopherson for_each_shadow_entry_lockless(vcpu, cr2_or_gpa, iterator, spte) 3537f9fa2509SSean Christopherson if (!is_shadow_present_pte(spte)) 3538c50d8ae3SPaolo Bonzini break; 3539c50d8ae3SPaolo Bonzini 3540c50d8ae3SPaolo Bonzini sp = page_header(__pa(iterator.sptep)); 3541c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3542c50d8ae3SPaolo Bonzini break; 3543c50d8ae3SPaolo Bonzini 3544c50d8ae3SPaolo Bonzini /* 3545c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3546c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3547c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3548c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3549c50d8ae3SPaolo Bonzini * current CPU took the fault. 3550c50d8ae3SPaolo Bonzini * 3551c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3552c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3553c50d8ae3SPaolo Bonzini */ 3554c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3555c50d8ae3SPaolo Bonzini fault_handled = true; 3556c50d8ae3SPaolo Bonzini break; 3557c50d8ae3SPaolo Bonzini } 3558c50d8ae3SPaolo Bonzini 3559c50d8ae3SPaolo Bonzini new_spte = spte; 3560c50d8ae3SPaolo Bonzini 3561c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3562c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3563c50d8ae3SPaolo Bonzini 3564c50d8ae3SPaolo Bonzini /* 3565c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3566c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3567c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3568c50d8ae3SPaolo Bonzini */ 3569c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3570e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3571c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3572c50d8ae3SPaolo Bonzini 3573c50d8ae3SPaolo Bonzini /* 3574c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3575c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3576c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3577c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3578c50d8ae3SPaolo Bonzini * 3579c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3580c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3581c50d8ae3SPaolo Bonzini * 3582c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3583c50d8ae3SPaolo Bonzini */ 35843bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3585c50d8ae3SPaolo Bonzini break; 3586c50d8ae3SPaolo Bonzini } 3587c50d8ae3SPaolo Bonzini 3588c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3589c50d8ae3SPaolo Bonzini if (new_spte == spte || 3590c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3591c50d8ae3SPaolo Bonzini break; 3592c50d8ae3SPaolo Bonzini 3593c50d8ae3SPaolo Bonzini /* 3594c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3595c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 35963ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3597c50d8ae3SPaolo Bonzini */ 3598c50d8ae3SPaolo Bonzini fault_handled = fast_pf_fix_direct_spte(vcpu, sp, 3599c50d8ae3SPaolo Bonzini iterator.sptep, spte, 3600c50d8ae3SPaolo Bonzini new_spte); 3601c50d8ae3SPaolo Bonzini if (fault_handled) 3602c50d8ae3SPaolo Bonzini break; 3603c50d8ae3SPaolo Bonzini 3604c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3605c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3606c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3607c50d8ae3SPaolo Bonzini break; 3608c50d8ae3SPaolo Bonzini } 3609c50d8ae3SPaolo Bonzini 3610c50d8ae3SPaolo Bonzini } while (true); 3611c50d8ae3SPaolo Bonzini 3612736c291cSSean Christopherson trace_fast_page_fault(vcpu, cr2_or_gpa, error_code, iterator.sptep, 3613c50d8ae3SPaolo Bonzini spte, fault_handled); 3614c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3615c50d8ae3SPaolo Bonzini 3616c50d8ae3SPaolo Bonzini return fault_handled; 3617c50d8ae3SPaolo Bonzini } 3618c50d8ae3SPaolo Bonzini 3619c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3620c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3621c50d8ae3SPaolo Bonzini { 3622c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3623c50d8ae3SPaolo Bonzini 3624c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3625c50d8ae3SPaolo Bonzini return; 3626c50d8ae3SPaolo Bonzini 3627c50d8ae3SPaolo Bonzini sp = page_header(*root_hpa & PT64_BASE_ADDR_MASK); 3628c50d8ae3SPaolo Bonzini --sp->root_count; 3629c50d8ae3SPaolo Bonzini if (!sp->root_count && sp->role.invalid) 3630c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3631c50d8ae3SPaolo Bonzini 3632c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3633c50d8ae3SPaolo Bonzini } 3634c50d8ae3SPaolo Bonzini 3635c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3636c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3637c50d8ae3SPaolo Bonzini ulong roots_to_free) 3638c50d8ae3SPaolo Bonzini { 3639c50d8ae3SPaolo Bonzini int i; 3640c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3641c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3642c50d8ae3SPaolo Bonzini 3643c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3644c50d8ae3SPaolo Bonzini 3645c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3646c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3647c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3648c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3649c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3650c50d8ae3SPaolo Bonzini break; 3651c50d8ae3SPaolo Bonzini 3652c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3653c50d8ae3SPaolo Bonzini return; 3654c50d8ae3SPaolo Bonzini } 3655c50d8ae3SPaolo Bonzini 3656c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 3657c50d8ae3SPaolo Bonzini 3658c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3659c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 3660c50d8ae3SPaolo Bonzini mmu_free_root_page(vcpu->kvm, &mmu->prev_roots[i].hpa, 3661c50d8ae3SPaolo Bonzini &invalid_list); 3662c50d8ae3SPaolo Bonzini 3663c50d8ae3SPaolo Bonzini if (free_active_root) { 3664c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3665c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 3666c50d8ae3SPaolo Bonzini mmu_free_root_page(vcpu->kvm, &mmu->root_hpa, 3667c50d8ae3SPaolo Bonzini &invalid_list); 3668c50d8ae3SPaolo Bonzini } else { 3669c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 3670c50d8ae3SPaolo Bonzini if (mmu->pae_root[i] != 0) 3671c50d8ae3SPaolo Bonzini mmu_free_root_page(vcpu->kvm, 3672c50d8ae3SPaolo Bonzini &mmu->pae_root[i], 3673c50d8ae3SPaolo Bonzini &invalid_list); 3674c50d8ae3SPaolo Bonzini mmu->root_hpa = INVALID_PAGE; 3675c50d8ae3SPaolo Bonzini } 3676be01e8e2SSean Christopherson mmu->root_pgd = 0; 3677c50d8ae3SPaolo Bonzini } 3678c50d8ae3SPaolo Bonzini 3679c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 3680c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 3681c50d8ae3SPaolo Bonzini } 3682c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3683c50d8ae3SPaolo Bonzini 3684c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3685c50d8ae3SPaolo Bonzini { 3686c50d8ae3SPaolo Bonzini int ret = 0; 3687c50d8ae3SPaolo Bonzini 3688c50d8ae3SPaolo Bonzini if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) { 3689c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3690c50d8ae3SPaolo Bonzini ret = 1; 3691c50d8ae3SPaolo Bonzini } 3692c50d8ae3SPaolo Bonzini 3693c50d8ae3SPaolo Bonzini return ret; 3694c50d8ae3SPaolo Bonzini } 3695c50d8ae3SPaolo Bonzini 36968123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 36978123f265SSean Christopherson u8 level, bool direct) 3698c50d8ae3SPaolo Bonzini { 3699c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 37008123f265SSean Christopherson 37018123f265SSean Christopherson spin_lock(&vcpu->kvm->mmu_lock); 37028123f265SSean Christopherson 37038123f265SSean Christopherson if (make_mmu_pages_available(vcpu)) { 37048123f265SSean Christopherson spin_unlock(&vcpu->kvm->mmu_lock); 37058123f265SSean Christopherson return INVALID_PAGE; 37068123f265SSean Christopherson } 37078123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 37088123f265SSean Christopherson ++sp->root_count; 37098123f265SSean Christopherson 37108123f265SSean Christopherson spin_unlock(&vcpu->kvm->mmu_lock); 37118123f265SSean Christopherson return __pa(sp->spt); 37128123f265SSean Christopherson } 37138123f265SSean Christopherson 37148123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 37158123f265SSean Christopherson { 37168123f265SSean Christopherson u8 shadow_root_level = vcpu->arch.mmu->shadow_root_level; 37178123f265SSean Christopherson hpa_t root; 3718c50d8ae3SPaolo Bonzini unsigned i; 3719c50d8ae3SPaolo Bonzini 37208123f265SSean Christopherson if (shadow_root_level >= PT64_ROOT_4LEVEL) { 37218123f265SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 37228123f265SSean Christopherson if (!VALID_PAGE(root)) 3723c50d8ae3SPaolo Bonzini return -ENOSPC; 37248123f265SSean Christopherson vcpu->arch.mmu->root_hpa = root; 37258123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 3726c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 37278123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); 3728c50d8ae3SPaolo Bonzini 37298123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 37308123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 37318123f265SSean Christopherson if (!VALID_PAGE(root)) 3732c50d8ae3SPaolo Bonzini return -ENOSPC; 3733c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = root | PT_PRESENT_MASK; 3734c50d8ae3SPaolo Bonzini } 3735c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); 3736c50d8ae3SPaolo Bonzini } else 3737c50d8ae3SPaolo Bonzini BUG(); 37383651c7fcSSean Christopherson 3739be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3740be01e8e2SSean Christopherson vcpu->arch.mmu->root_pgd = 0; 3741c50d8ae3SPaolo Bonzini 3742c50d8ae3SPaolo Bonzini return 0; 3743c50d8ae3SPaolo Bonzini } 3744c50d8ae3SPaolo Bonzini 3745c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3746c50d8ae3SPaolo Bonzini { 3747c50d8ae3SPaolo Bonzini u64 pdptr, pm_mask; 3748be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 37498123f265SSean Christopherson hpa_t root; 3750c50d8ae3SPaolo Bonzini int i; 3751c50d8ae3SPaolo Bonzini 3752be01e8e2SSean Christopherson root_pgd = vcpu->arch.mmu->get_guest_pgd(vcpu); 3753be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3754c50d8ae3SPaolo Bonzini 3755c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3756c50d8ae3SPaolo Bonzini return 1; 3757c50d8ae3SPaolo Bonzini 3758c50d8ae3SPaolo Bonzini /* 3759c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3760c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3761c50d8ae3SPaolo Bonzini */ 3762c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 37638123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->root_hpa)); 3764c50d8ae3SPaolo Bonzini 37658123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 37668123f265SSean Christopherson vcpu->arch.mmu->shadow_root_level, false); 37678123f265SSean Christopherson if (!VALID_PAGE(root)) 3768c50d8ae3SPaolo Bonzini return -ENOSPC; 3769c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = root; 3770be01e8e2SSean Christopherson goto set_root_pgd; 3771c50d8ae3SPaolo Bonzini } 3772c50d8ae3SPaolo Bonzini 3773c50d8ae3SPaolo Bonzini /* 3774c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3775c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3776c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3777c50d8ae3SPaolo Bonzini */ 3778c50d8ae3SPaolo Bonzini pm_mask = PT_PRESENT_MASK; 3779c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) 3780c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3781c50d8ae3SPaolo Bonzini 3782c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 37838123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); 3784c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level == PT32E_ROOT_LEVEL) { 3785c50d8ae3SPaolo Bonzini pdptr = vcpu->arch.mmu->get_pdptr(vcpu, i); 3786c50d8ae3SPaolo Bonzini if (!(pdptr & PT_PRESENT_MASK)) { 3787c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = 0; 3788c50d8ae3SPaolo Bonzini continue; 3789c50d8ae3SPaolo Bonzini } 3790c50d8ae3SPaolo Bonzini root_gfn = pdptr >> PAGE_SHIFT; 3791c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3792c50d8ae3SPaolo Bonzini return 1; 3793c50d8ae3SPaolo Bonzini } 3794c50d8ae3SPaolo Bonzini 37958123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 37968123f265SSean Christopherson PT32_ROOT_LEVEL, false); 37978123f265SSean Christopherson if (!VALID_PAGE(root)) 37988123f265SSean Christopherson return -ENOSPC; 3799c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = root | pm_mask; 3800c50d8ae3SPaolo Bonzini } 3801c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); 3802c50d8ae3SPaolo Bonzini 3803c50d8ae3SPaolo Bonzini /* 3804c50d8ae3SPaolo Bonzini * If we shadow a 32 bit page table with a long mode page 3805c50d8ae3SPaolo Bonzini * table we enter this path. 3806c50d8ae3SPaolo Bonzini */ 3807c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3808c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->lm_root == NULL) { 3809c50d8ae3SPaolo Bonzini /* 3810c50d8ae3SPaolo Bonzini * The additional page necessary for this is only 3811c50d8ae3SPaolo Bonzini * allocated on demand. 3812c50d8ae3SPaolo Bonzini */ 3813c50d8ae3SPaolo Bonzini 3814c50d8ae3SPaolo Bonzini u64 *lm_root; 3815c50d8ae3SPaolo Bonzini 3816c50d8ae3SPaolo Bonzini lm_root = (void*)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3817c50d8ae3SPaolo Bonzini if (lm_root == NULL) 3818c50d8ae3SPaolo Bonzini return 1; 3819c50d8ae3SPaolo Bonzini 3820c50d8ae3SPaolo Bonzini lm_root[0] = __pa(vcpu->arch.mmu->pae_root) | pm_mask; 3821c50d8ae3SPaolo Bonzini 3822c50d8ae3SPaolo Bonzini vcpu->arch.mmu->lm_root = lm_root; 3823c50d8ae3SPaolo Bonzini } 3824c50d8ae3SPaolo Bonzini 3825c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->lm_root); 3826c50d8ae3SPaolo Bonzini } 3827c50d8ae3SPaolo Bonzini 3828be01e8e2SSean Christopherson set_root_pgd: 3829be01e8e2SSean Christopherson vcpu->arch.mmu->root_pgd = root_pgd; 3830c50d8ae3SPaolo Bonzini 3831c50d8ae3SPaolo Bonzini return 0; 3832c50d8ae3SPaolo Bonzini } 3833c50d8ae3SPaolo Bonzini 3834c50d8ae3SPaolo Bonzini static int mmu_alloc_roots(struct kvm_vcpu *vcpu) 3835c50d8ae3SPaolo Bonzini { 3836c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3837c50d8ae3SPaolo Bonzini return mmu_alloc_direct_roots(vcpu); 3838c50d8ae3SPaolo Bonzini else 3839c50d8ae3SPaolo Bonzini return mmu_alloc_shadow_roots(vcpu); 3840c50d8ae3SPaolo Bonzini } 3841c50d8ae3SPaolo Bonzini 3842c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3843c50d8ae3SPaolo Bonzini { 3844c50d8ae3SPaolo Bonzini int i; 3845c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3846c50d8ae3SPaolo Bonzini 3847c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3848c50d8ae3SPaolo Bonzini return; 3849c50d8ae3SPaolo Bonzini 3850c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3851c50d8ae3SPaolo Bonzini return; 3852c50d8ae3SPaolo Bonzini 3853c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3854c50d8ae3SPaolo Bonzini 3855c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3856c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3857c50d8ae3SPaolo Bonzini sp = page_header(root); 3858c50d8ae3SPaolo Bonzini 3859c50d8ae3SPaolo Bonzini /* 3860c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3861c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3862c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3863c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3864c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3865c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 3866c50d8ae3SPaolo Bonzini * mmu_need_write_protect() describe what could go wrong if this 3867c50d8ae3SPaolo Bonzini * requirement isn't satisfied. 3868c50d8ae3SPaolo Bonzini */ 3869c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3870c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3871c50d8ae3SPaolo Bonzini return; 3872c50d8ae3SPaolo Bonzini 3873c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 3874c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3875c50d8ae3SPaolo Bonzini 3876c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3877c50d8ae3SPaolo Bonzini 3878c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3879c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 3880c50d8ae3SPaolo Bonzini return; 3881c50d8ae3SPaolo Bonzini } 3882c50d8ae3SPaolo Bonzini 3883c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 3884c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3885c50d8ae3SPaolo Bonzini 3886c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3887c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3888c50d8ae3SPaolo Bonzini 3889c50d8ae3SPaolo Bonzini if (root && VALID_PAGE(root)) { 3890c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3891c50d8ae3SPaolo Bonzini sp = page_header(root); 3892c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3893c50d8ae3SPaolo Bonzini } 3894c50d8ae3SPaolo Bonzini } 3895c50d8ae3SPaolo Bonzini 3896c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3897c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 3898c50d8ae3SPaolo Bonzini } 3899c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots); 3900c50d8ae3SPaolo Bonzini 3901736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3902c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3903c50d8ae3SPaolo Bonzini { 3904c50d8ae3SPaolo Bonzini if (exception) 3905c50d8ae3SPaolo Bonzini exception->error_code = 0; 3906c50d8ae3SPaolo Bonzini return vaddr; 3907c50d8ae3SPaolo Bonzini } 3908c50d8ae3SPaolo Bonzini 3909736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3910c50d8ae3SPaolo Bonzini u32 access, 3911c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3912c50d8ae3SPaolo Bonzini { 3913c50d8ae3SPaolo Bonzini if (exception) 3914c50d8ae3SPaolo Bonzini exception->error_code = 0; 3915c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3916c50d8ae3SPaolo Bonzini } 3917c50d8ae3SPaolo Bonzini 3918c50d8ae3SPaolo Bonzini static bool 3919c50d8ae3SPaolo Bonzini __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) 3920c50d8ae3SPaolo Bonzini { 3921b5c3c1b3SSean Christopherson int bit7 = (pte >> 7) & 1; 3922c50d8ae3SPaolo Bonzini 3923b5c3c1b3SSean Christopherson return pte & rsvd_check->rsvd_bits_mask[bit7][level-1]; 3924c50d8ae3SPaolo Bonzini } 3925c50d8ae3SPaolo Bonzini 3926b5c3c1b3SSean Christopherson static bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, u64 pte) 3927c50d8ae3SPaolo Bonzini { 3928b5c3c1b3SSean Christopherson return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f); 3929c50d8ae3SPaolo Bonzini } 3930c50d8ae3SPaolo Bonzini 3931c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3932c50d8ae3SPaolo Bonzini { 3933c50d8ae3SPaolo Bonzini /* 3934c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3935c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3936c50d8ae3SPaolo Bonzini */ 3937c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3938c50d8ae3SPaolo Bonzini return false; 3939c50d8ae3SPaolo Bonzini 3940c50d8ae3SPaolo Bonzini if (direct) 3941c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3942c50d8ae3SPaolo Bonzini 3943c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3944c50d8ae3SPaolo Bonzini } 3945c50d8ae3SPaolo Bonzini 3946c50d8ae3SPaolo Bonzini /* return true if reserved bit is detected on spte. */ 3947c50d8ae3SPaolo Bonzini static bool 3948c50d8ae3SPaolo Bonzini walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 3949c50d8ae3SPaolo Bonzini { 3950c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3951c50d8ae3SPaolo Bonzini u64 sptes[PT64_ROOT_MAX_LEVEL], spte = 0ull; 3952b5c3c1b3SSean Christopherson struct rsvd_bits_validate *rsvd_check; 3953c50d8ae3SPaolo Bonzini int root, leaf; 3954c50d8ae3SPaolo Bonzini bool reserved = false; 3955c50d8ae3SPaolo Bonzini 3956b5c3c1b3SSean Christopherson rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 3957c50d8ae3SPaolo Bonzini 3958c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3959c50d8ae3SPaolo Bonzini 3960c50d8ae3SPaolo Bonzini for (shadow_walk_init(&iterator, vcpu, addr), 3961c50d8ae3SPaolo Bonzini leaf = root = iterator.level; 3962c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3963c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 3964c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3965c50d8ae3SPaolo Bonzini 3966c50d8ae3SPaolo Bonzini sptes[leaf - 1] = spte; 3967c50d8ae3SPaolo Bonzini leaf--; 3968c50d8ae3SPaolo Bonzini 3969c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3970c50d8ae3SPaolo Bonzini break; 3971c50d8ae3SPaolo Bonzini 3972b5c3c1b3SSean Christopherson /* 3973b5c3c1b3SSean Christopherson * Use a bitwise-OR instead of a logical-OR to aggregate the 3974b5c3c1b3SSean Christopherson * reserved bit and EPT's invalid memtype/XWR checks to avoid 3975b5c3c1b3SSean Christopherson * adding a Jcc in the loop. 3976b5c3c1b3SSean Christopherson */ 3977b5c3c1b3SSean Christopherson reserved |= __is_bad_mt_xwr(rsvd_check, spte) | 3978b5c3c1b3SSean Christopherson __is_rsvd_bits_set(rsvd_check, spte, iterator.level); 3979c50d8ae3SPaolo Bonzini } 3980c50d8ae3SPaolo Bonzini 3981c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3982c50d8ae3SPaolo Bonzini 3983c50d8ae3SPaolo Bonzini if (reserved) { 3984c50d8ae3SPaolo Bonzini pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n", 3985c50d8ae3SPaolo Bonzini __func__, addr); 3986c50d8ae3SPaolo Bonzini while (root > leaf) { 3987c50d8ae3SPaolo Bonzini pr_err("------ spte 0x%llx level %d.\n", 3988c50d8ae3SPaolo Bonzini sptes[root - 1], root); 3989c50d8ae3SPaolo Bonzini root--; 3990c50d8ae3SPaolo Bonzini } 3991c50d8ae3SPaolo Bonzini } 3992ddce6208SSean Christopherson 3993c50d8ae3SPaolo Bonzini *sptep = spte; 3994c50d8ae3SPaolo Bonzini return reserved; 3995c50d8ae3SPaolo Bonzini } 3996c50d8ae3SPaolo Bonzini 3997c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3998c50d8ae3SPaolo Bonzini { 3999c50d8ae3SPaolo Bonzini u64 spte; 4000c50d8ae3SPaolo Bonzini bool reserved; 4001c50d8ae3SPaolo Bonzini 4002c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 4003c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4004c50d8ae3SPaolo Bonzini 4005c50d8ae3SPaolo Bonzini reserved = walk_shadow_page_get_mmio_spte(vcpu, addr, &spte); 4006c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 4007c50d8ae3SPaolo Bonzini return -EINVAL; 4008c50d8ae3SPaolo Bonzini 4009c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 4010c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 40110a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 4012c50d8ae3SPaolo Bonzini 4013c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 4014c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 4015c50d8ae3SPaolo Bonzini 4016c50d8ae3SPaolo Bonzini if (direct) 4017c50d8ae3SPaolo Bonzini addr = 0; 4018c50d8ae3SPaolo Bonzini 4019c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 4020c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 4021c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4022c50d8ae3SPaolo Bonzini } 4023c50d8ae3SPaolo Bonzini 4024c50d8ae3SPaolo Bonzini /* 4025c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 4026c50d8ae3SPaolo Bonzini * the address. 4027c50d8ae3SPaolo Bonzini */ 4028c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 4029c50d8ae3SPaolo Bonzini } 4030c50d8ae3SPaolo Bonzini 4031c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 4032c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 4033c50d8ae3SPaolo Bonzini { 4034c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 4035c50d8ae3SPaolo Bonzini return false; 4036c50d8ae3SPaolo Bonzini 4037c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 4038c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 4039c50d8ae3SPaolo Bonzini return false; 4040c50d8ae3SPaolo Bonzini 4041c50d8ae3SPaolo Bonzini /* 4042c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 4043c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 4044c50d8ae3SPaolo Bonzini */ 4045c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 4046c50d8ae3SPaolo Bonzini return true; 4047c50d8ae3SPaolo Bonzini 4048c50d8ae3SPaolo Bonzini return false; 4049c50d8ae3SPaolo Bonzini } 4050c50d8ae3SPaolo Bonzini 4051c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 4052c50d8ae3SPaolo Bonzini { 4053c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 4054c50d8ae3SPaolo Bonzini u64 spte; 4055c50d8ae3SPaolo Bonzini 4056c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 4057c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 4058c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 4059c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 4060c50d8ae3SPaolo Bonzini break; 4061c50d8ae3SPaolo Bonzini } 4062c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 4063c50d8ae3SPaolo Bonzini } 4064c50d8ae3SPaolo Bonzini 4065e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 40669f1a8526SSean Christopherson gfn_t gfn) 4067c50d8ae3SPaolo Bonzini { 4068c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 4069c50d8ae3SPaolo Bonzini 4070c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 4071c50d8ae3SPaolo Bonzini arch.gfn = gfn; 4072c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 4073d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 4074c50d8ae3SPaolo Bonzini 40759f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 40769f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 4077c50d8ae3SPaolo Bonzini } 4078c50d8ae3SPaolo Bonzini 4079c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 40809f1a8526SSean Christopherson gpa_t cr2_or_gpa, kvm_pfn_t *pfn, bool write, 40819f1a8526SSean Christopherson bool *writable) 4082c50d8ae3SPaolo Bonzini { 4083c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 4084c50d8ae3SPaolo Bonzini bool async; 4085c50d8ae3SPaolo Bonzini 4086c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 4087c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 4088c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 4089c583eed6SSean Christopherson *writable = false; 4090c50d8ae3SPaolo Bonzini return false; 4091c50d8ae3SPaolo Bonzini } 4092c50d8ae3SPaolo Bonzini 4093c50d8ae3SPaolo Bonzini async = false; 4094c50d8ae3SPaolo Bonzini *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable); 4095c50d8ae3SPaolo Bonzini if (!async) 4096c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 4097c50d8ae3SPaolo Bonzini 4098c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 40999f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 4100c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 41019f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 4102c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 4103c50d8ae3SPaolo Bonzini return true; 41049f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 4105c50d8ae3SPaolo Bonzini return true; 4106c50d8ae3SPaolo Bonzini } 4107c50d8ae3SPaolo Bonzini 4108c50d8ae3SPaolo Bonzini *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable); 4109c50d8ae3SPaolo Bonzini return false; 4110c50d8ae3SPaolo Bonzini } 4111c50d8ae3SPaolo Bonzini 41120f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 41130f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 4114c50d8ae3SPaolo Bonzini { 4115367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 4116367fd790SSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 4117367fd790SSean Christopherson bool lpage_disallowed = exec && is_nx_huge_page_enabled(); 41180f90e1c1SSean Christopherson bool map_writable; 4119c50d8ae3SPaolo Bonzini 41200f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 41210f90e1c1SSean Christopherson unsigned long mmu_seq; 41220f90e1c1SSean Christopherson kvm_pfn_t pfn; 412383f06fa7SSean Christopherson int r; 4124c50d8ae3SPaolo Bonzini 4125c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 4126c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4127c50d8ae3SPaolo Bonzini 4128c50d8ae3SPaolo Bonzini r = mmu_topup_memory_caches(vcpu); 4129c50d8ae3SPaolo Bonzini if (r) 4130c50d8ae3SPaolo Bonzini return r; 4131c50d8ae3SPaolo Bonzini 41320f90e1c1SSean Christopherson if (lpage_disallowed) 41333bae0459SSean Christopherson max_level = PG_LEVEL_4K; 4134c50d8ae3SPaolo Bonzini 4135f9fa2509SSean Christopherson if (fast_page_fault(vcpu, gpa, error_code)) 4136367fd790SSean Christopherson return RET_PF_RETRY; 4137367fd790SSean Christopherson 4138367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 4139367fd790SSean Christopherson smp_rmb(); 4140367fd790SSean Christopherson 4141367fd790SSean Christopherson if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable)) 4142367fd790SSean Christopherson return RET_PF_RETRY; 4143367fd790SSean Christopherson 41440f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 4145367fd790SSean Christopherson return r; 4146367fd790SSean Christopherson 4147367fd790SSean Christopherson r = RET_PF_RETRY; 4148367fd790SSean Christopherson spin_lock(&vcpu->kvm->mmu_lock); 4149367fd790SSean Christopherson if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) 4150367fd790SSean Christopherson goto out_unlock; 4151367fd790SSean Christopherson if (make_mmu_pages_available(vcpu) < 0) 4152367fd790SSean Christopherson goto out_unlock; 415383f06fa7SSean Christopherson r = __direct_map(vcpu, gpa, write, map_writable, max_level, pfn, 41544cd071d1SSean Christopherson prefault, is_tdp && lpage_disallowed); 41550f90e1c1SSean Christopherson 4156367fd790SSean Christopherson out_unlock: 4157367fd790SSean Christopherson spin_unlock(&vcpu->kvm->mmu_lock); 4158367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 4159367fd790SSean Christopherson return r; 4160c50d8ae3SPaolo Bonzini } 4161c50d8ae3SPaolo Bonzini 41620f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 41630f90e1c1SSean Christopherson u32 error_code, bool prefault) 41640f90e1c1SSean Christopherson { 41650f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 41660f90e1c1SSean Christopherson 41670f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 41680f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 41693bae0459SSean Christopherson PG_LEVEL_2M, false); 41700f90e1c1SSean Christopherson } 41710f90e1c1SSean Christopherson 4172c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 4173c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 4174c50d8ae3SPaolo Bonzini { 4175c50d8ae3SPaolo Bonzini int r = 1; 41769ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 4177c50d8ae3SPaolo Bonzini 4178736c291cSSean Christopherson #ifndef CONFIG_X86_64 4179736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 4180736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 4181736c291cSSean Christopherson return -EFAULT; 4182736c291cSSean Christopherson #endif 4183736c291cSSean Christopherson 4184c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 41859ce372b3SVitaly Kuznetsov if (!flags) { 4186c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 4187c50d8ae3SPaolo Bonzini 4188c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 4189c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 4190c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 4191c50d8ae3SPaolo Bonzini insn_len); 41929ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 419368fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 4194c50d8ae3SPaolo Bonzini local_irq_disable(); 41956bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 4196c50d8ae3SPaolo Bonzini local_irq_enable(); 41979ce372b3SVitaly Kuznetsov } else { 41989ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 4199c50d8ae3SPaolo Bonzini } 42009ce372b3SVitaly Kuznetsov 4201c50d8ae3SPaolo Bonzini return r; 4202c50d8ae3SPaolo Bonzini } 4203c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 4204c50d8ae3SPaolo Bonzini 42057a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 4206c50d8ae3SPaolo Bonzini bool prefault) 4207c50d8ae3SPaolo Bonzini { 4208cb9b88c6SSean Christopherson int max_level; 4209c50d8ae3SPaolo Bonzini 4210e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 42113bae0459SSean Christopherson max_level > PG_LEVEL_4K; 4212cb9b88c6SSean Christopherson max_level--) { 4213cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 42140f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 4215c50d8ae3SPaolo Bonzini 4216cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 4217cb9b88c6SSean Christopherson break; 4218c50d8ae3SPaolo Bonzini } 4219c50d8ae3SPaolo Bonzini 42200f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 42210f90e1c1SSean Christopherson max_level, true); 4222c50d8ae3SPaolo Bonzini } 4223c50d8ae3SPaolo Bonzini 4224c50d8ae3SPaolo Bonzini static void nonpaging_init_context(struct kvm_vcpu *vcpu, 4225c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4226c50d8ae3SPaolo Bonzini { 4227c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 4228c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4229c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 42305efac074SPaolo Bonzini context->invlpg = NULL; 4231c50d8ae3SPaolo Bonzini context->update_pte = nonpaging_update_pte; 4232c50d8ae3SPaolo Bonzini context->root_level = 0; 4233c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4234c50d8ae3SPaolo Bonzini context->direct_map = true; 4235c50d8ae3SPaolo Bonzini context->nx = false; 4236c50d8ae3SPaolo Bonzini } 4237c50d8ae3SPaolo Bonzini 4238be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 42390be44352SSean Christopherson union kvm_mmu_page_role role) 42400be44352SSean Christopherson { 4241be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 42420be44352SSean Christopherson VALID_PAGE(root->hpa) && page_header(root->hpa) && 42430be44352SSean Christopherson role.word == page_header(root->hpa)->role.word; 42440be44352SSean Christopherson } 42450be44352SSean Christopherson 4246c50d8ae3SPaolo Bonzini /* 4247be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 4248c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 4249c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 4250c50d8ae3SPaolo Bonzini * returned. 4251c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 4252c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4253c50d8ae3SPaolo Bonzini */ 4254be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4255c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4256c50d8ae3SPaolo Bonzini { 4257c50d8ae3SPaolo Bonzini uint i; 4258c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 4259c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4260c50d8ae3SPaolo Bonzini 4261be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 4262c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 4263c50d8ae3SPaolo Bonzini 4264be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 42650be44352SSean Christopherson return true; 42660be44352SSean Christopherson 4267c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4268c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 4269c50d8ae3SPaolo Bonzini 4270be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 4271c50d8ae3SPaolo Bonzini break; 4272c50d8ae3SPaolo Bonzini } 4273c50d8ae3SPaolo Bonzini 4274c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 4275be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 4276c50d8ae3SPaolo Bonzini 4277c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4278c50d8ae3SPaolo Bonzini } 4279c50d8ae3SPaolo Bonzini 4280be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4281b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4282c50d8ae3SPaolo Bonzini { 4283c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4284c50d8ae3SPaolo Bonzini 4285c50d8ae3SPaolo Bonzini /* 4286c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4287c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4288c50d8ae3SPaolo Bonzini * later if necessary. 4289c50d8ae3SPaolo Bonzini */ 4290c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4291b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4292be01e8e2SSean Christopherson return !mmu_check_root(vcpu, new_pgd >> PAGE_SHIFT) && 4293be01e8e2SSean Christopherson cached_root_available(vcpu, new_pgd, new_role); 4294c50d8ae3SPaolo Bonzini 4295c50d8ae3SPaolo Bonzini return false; 4296c50d8ae3SPaolo Bonzini } 4297c50d8ae3SPaolo Bonzini 4298be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4299c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role, 43004a632ac6SSean Christopherson bool skip_tlb_flush, bool skip_mmu_sync) 4301c50d8ae3SPaolo Bonzini { 4302be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4303b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4304b869855bSSean Christopherson return; 4305c50d8ae3SPaolo Bonzini } 4306c50d8ae3SPaolo Bonzini 4307c50d8ae3SPaolo Bonzini /* 4308b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4309b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4310b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4311b869855bSSean Christopherson * free the root set here and allocate a new one. 4312b869855bSSean Christopherson */ 4313b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4314b869855bSSean Christopherson 431571fe7013SSean Christopherson if (!skip_mmu_sync || force_flush_and_sync_on_reuse) 4316b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 431771fe7013SSean Christopherson if (!skip_tlb_flush || force_flush_and_sync_on_reuse) 4318b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4319b869855bSSean Christopherson 4320b869855bSSean Christopherson /* 4321b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4322b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4323b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4324b869855bSSean Christopherson * the shadow page tables. 4325c50d8ae3SPaolo Bonzini */ 4326c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4327c50d8ae3SPaolo Bonzini 4328b869855bSSean Christopherson __clear_sp_write_flooding_count(page_header(vcpu->arch.mmu->root_hpa)); 4329c50d8ae3SPaolo Bonzini } 4330c50d8ae3SPaolo Bonzini 4331be01e8e2SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 43324a632ac6SSean Christopherson bool skip_mmu_sync) 4333c50d8ae3SPaolo Bonzini { 4334be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu), 43354a632ac6SSean Christopherson skip_tlb_flush, skip_mmu_sync); 4336c50d8ae3SPaolo Bonzini } 4337be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4338c50d8ae3SPaolo Bonzini 4339c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4340c50d8ae3SPaolo Bonzini { 4341c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4342c50d8ae3SPaolo Bonzini } 4343c50d8ae3SPaolo Bonzini 4344c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 43450a2b64c5SBen Gardon unsigned int access, int *nr_present) 4346c50d8ae3SPaolo Bonzini { 4347c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4348c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4349c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4350c50d8ae3SPaolo Bonzini return true; 4351c50d8ae3SPaolo Bonzini } 4352c50d8ae3SPaolo Bonzini 4353c50d8ae3SPaolo Bonzini (*nr_present)++; 4354c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4355c50d8ae3SPaolo Bonzini return true; 4356c50d8ae3SPaolo Bonzini } 4357c50d8ae3SPaolo Bonzini 4358c50d8ae3SPaolo Bonzini return false; 4359c50d8ae3SPaolo Bonzini } 4360c50d8ae3SPaolo Bonzini 4361c50d8ae3SPaolo Bonzini static inline bool is_last_gpte(struct kvm_mmu *mmu, 4362c50d8ae3SPaolo Bonzini unsigned level, unsigned gpte) 4363c50d8ae3SPaolo Bonzini { 4364c50d8ae3SPaolo Bonzini /* 4365c50d8ae3SPaolo Bonzini * The RHS has bit 7 set iff level < mmu->last_nonleaf_level. 4366c50d8ae3SPaolo Bonzini * If it is clear, there are no large pages at this level, so clear 4367c50d8ae3SPaolo Bonzini * PT_PAGE_SIZE_MASK in gpte if that is the case. 4368c50d8ae3SPaolo Bonzini */ 4369c50d8ae3SPaolo Bonzini gpte &= level - mmu->last_nonleaf_level; 4370c50d8ae3SPaolo Bonzini 4371c50d8ae3SPaolo Bonzini /* 43723bae0459SSean Christopherson * PG_LEVEL_4K always terminates. The RHS has bit 7 set 43733bae0459SSean Christopherson * iff level <= PG_LEVEL_4K, which for our purpose means 43743bae0459SSean Christopherson * level == PG_LEVEL_4K; set PT_PAGE_SIZE_MASK in gpte then. 4375c50d8ae3SPaolo Bonzini */ 43763bae0459SSean Christopherson gpte |= level - PG_LEVEL_4K - 1; 4377c50d8ae3SPaolo Bonzini 4378c50d8ae3SPaolo Bonzini return gpte & PT_PAGE_SIZE_MASK; 4379c50d8ae3SPaolo Bonzini } 4380c50d8ae3SPaolo Bonzini 4381c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4382c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4383c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4384c50d8ae3SPaolo Bonzini #undef PTTYPE 4385c50d8ae3SPaolo Bonzini 4386c50d8ae3SPaolo Bonzini #define PTTYPE 64 4387c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4388c50d8ae3SPaolo Bonzini #undef PTTYPE 4389c50d8ae3SPaolo Bonzini 4390c50d8ae3SPaolo Bonzini #define PTTYPE 32 4391c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4392c50d8ae3SPaolo Bonzini #undef PTTYPE 4393c50d8ae3SPaolo Bonzini 4394c50d8ae3SPaolo Bonzini static void 4395c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4396c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *rsvd_check, 4397c50d8ae3SPaolo Bonzini int maxphyaddr, int level, bool nx, bool gbpages, 4398c50d8ae3SPaolo Bonzini bool pse, bool amd) 4399c50d8ae3SPaolo Bonzini { 4400c50d8ae3SPaolo Bonzini u64 exb_bit_rsvd = 0; 4401c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4402c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 4403c50d8ae3SPaolo Bonzini 4404c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4405c50d8ae3SPaolo Bonzini 4406c50d8ae3SPaolo Bonzini if (!nx) 4407c50d8ae3SPaolo Bonzini exb_bit_rsvd = rsvd_bits(63, 63); 4408c50d8ae3SPaolo Bonzini if (!gbpages) 4409c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4410c50d8ae3SPaolo Bonzini 4411c50d8ae3SPaolo Bonzini /* 4412c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4413c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4414c50d8ae3SPaolo Bonzini */ 4415c50d8ae3SPaolo Bonzini if (amd) 4416c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4417c50d8ae3SPaolo Bonzini 4418c50d8ae3SPaolo Bonzini switch (level) { 4419c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4420c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4421c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4422c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4423c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4424c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4425c50d8ae3SPaolo Bonzini 4426c50d8ae3SPaolo Bonzini if (!pse) { 4427c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4428c50d8ae3SPaolo Bonzini break; 4429c50d8ae3SPaolo Bonzini } 4430c50d8ae3SPaolo Bonzini 4431c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4432c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4433c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4434c50d8ae3SPaolo Bonzini else 4435c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4436c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4437c50d8ae3SPaolo Bonzini break; 4438c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 4439c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][2] = 4440c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 63) | 4441c50d8ae3SPaolo Bonzini rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */ 4442c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | 4443c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 62); /* PDE */ 4444c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd | 4445c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 62); /* PTE */ 4446c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd | 4447c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 62) | 4448c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4449c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4450c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4451c50d8ae3SPaolo Bonzini break; 4452c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 4453c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4] = exb_bit_rsvd | 4454c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd | rsvd_bits(7, 7) | 4455c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4456c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4457c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4458c50d8ae3SPaolo Bonzini /* fall through */ 4459c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 4460c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd | 4461c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd | rsvd_bits(7, 7) | 4462c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4463c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd | 44645ecad245SPaolo Bonzini gbpages_bit_rsvd | 4465c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4466c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | 4467c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4468c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd | 4469c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4470c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4471c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 4472c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][2] = exb_bit_rsvd | 4473c50d8ae3SPaolo Bonzini gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) | 4474c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 4475c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd | 4476c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | 4477c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4478c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4479c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4480c50d8ae3SPaolo Bonzini break; 4481c50d8ae3SPaolo Bonzini } 4482c50d8ae3SPaolo Bonzini } 4483c50d8ae3SPaolo Bonzini 4484c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4485c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4486c50d8ae3SPaolo Bonzini { 4487c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, 4488c50d8ae3SPaolo Bonzini cpuid_maxphyaddr(vcpu), context->root_level, 4489c50d8ae3SPaolo Bonzini context->nx, 4490c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 449123493d0aSSean Christopherson is_pse(vcpu), 449223493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4493c50d8ae3SPaolo Bonzini } 4494c50d8ae3SPaolo Bonzini 4495c50d8ae3SPaolo Bonzini static void 4496c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 4497c50d8ae3SPaolo Bonzini int maxphyaddr, bool execonly) 4498c50d8ae3SPaolo Bonzini { 4499c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4500c50d8ae3SPaolo Bonzini 4501c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4] = 4502c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7); 4503c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3] = 4504c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7); 4505c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][2] = 4506c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6); 4507c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 4508c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6); 4509c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51); 4510c50d8ae3SPaolo Bonzini 4511c50d8ae3SPaolo Bonzini /* large page */ 4512c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4513c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 4514c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][2] = 4515c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29); 4516c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 4517c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20); 4518c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4519c50d8ae3SPaolo Bonzini 4520c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4521c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4522c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4523c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4524c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4525c50d8ae3SPaolo Bonzini if (!execonly) { 4526c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4527c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4528c50d8ae3SPaolo Bonzini } 4529c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4530c50d8ae3SPaolo Bonzini } 4531c50d8ae3SPaolo Bonzini 4532c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4533c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4534c50d8ae3SPaolo Bonzini { 4535c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 4536c50d8ae3SPaolo Bonzini cpuid_maxphyaddr(vcpu), execonly); 4537c50d8ae3SPaolo Bonzini } 4538c50d8ae3SPaolo Bonzini 4539c50d8ae3SPaolo Bonzini /* 4540c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4541c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4542c50d8ae3SPaolo Bonzini * follow the features in guest. 4543c50d8ae3SPaolo Bonzini */ 4544c50d8ae3SPaolo Bonzini void 4545c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) 4546c50d8ae3SPaolo Bonzini { 4547c50d8ae3SPaolo Bonzini bool uses_nx = context->nx || 4548c50d8ae3SPaolo Bonzini context->mmu_role.base.smep_andnot_wp; 4549c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4550c50d8ae3SPaolo Bonzini int i; 4551c50d8ae3SPaolo Bonzini 4552c50d8ae3SPaolo Bonzini /* 4553c50d8ae3SPaolo Bonzini * Passing "true" to the last argument is okay; it adds a check 4554c50d8ae3SPaolo Bonzini * on bit 8 of the SPTEs which KVM doesn't use anyway. 4555c50d8ae3SPaolo Bonzini */ 4556c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4557c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 4558c50d8ae3SPaolo Bonzini shadow_phys_bits, 4559c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 4560c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 4561c50d8ae3SPaolo Bonzini is_pse(vcpu), true); 4562c50d8ae3SPaolo Bonzini 4563c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4564c50d8ae3SPaolo Bonzini return; 4565c50d8ae3SPaolo Bonzini 4566c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4567c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4568c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4569c50d8ae3SPaolo Bonzini } 4570c50d8ae3SPaolo Bonzini 4571c50d8ae3SPaolo Bonzini } 4572c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); 4573c50d8ae3SPaolo Bonzini 4574c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4575c50d8ae3SPaolo Bonzini { 4576c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4577c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4578c50d8ae3SPaolo Bonzini } 4579c50d8ae3SPaolo Bonzini 4580c50d8ae3SPaolo Bonzini /* 4581c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4582c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4583c50d8ae3SPaolo Bonzini */ 4584c50d8ae3SPaolo Bonzini static void 4585c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4586c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4587c50d8ae3SPaolo Bonzini { 4588c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4589c50d8ae3SPaolo Bonzini int i; 4590c50d8ae3SPaolo Bonzini 4591c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4592c50d8ae3SPaolo Bonzini 4593c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4594c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 4595c50d8ae3SPaolo Bonzini shadow_phys_bits, 4596c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4597c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 4598c50d8ae3SPaolo Bonzini true, true); 4599c50d8ae3SPaolo Bonzini else 4600c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 4601c50d8ae3SPaolo Bonzini shadow_phys_bits, 4602c50d8ae3SPaolo Bonzini false); 4603c50d8ae3SPaolo Bonzini 4604c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4605c50d8ae3SPaolo Bonzini return; 4606c50d8ae3SPaolo Bonzini 4607c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4608c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4609c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4610c50d8ae3SPaolo Bonzini } 4611c50d8ae3SPaolo Bonzini } 4612c50d8ae3SPaolo Bonzini 4613c50d8ae3SPaolo Bonzini /* 4614c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4615c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4616c50d8ae3SPaolo Bonzini */ 4617c50d8ae3SPaolo Bonzini static void 4618c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4619c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4620c50d8ae3SPaolo Bonzini { 4621c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 4622c50d8ae3SPaolo Bonzini shadow_phys_bits, execonly); 4623c50d8ae3SPaolo Bonzini } 4624c50d8ae3SPaolo Bonzini 4625c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4626c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4627c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4628c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4629c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4630c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4631c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4632c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4633c50d8ae3SPaolo Bonzini 4634c50d8ae3SPaolo Bonzini 4635c50d8ae3SPaolo Bonzini static void update_permission_bitmask(struct kvm_vcpu *vcpu, 4636c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu, bool ept) 4637c50d8ae3SPaolo Bonzini { 4638c50d8ae3SPaolo Bonzini unsigned byte; 4639c50d8ae3SPaolo Bonzini 4640c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4641c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4642c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4643c50d8ae3SPaolo Bonzini 4644c50d8ae3SPaolo Bonzini bool cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP) != 0; 4645c50d8ae3SPaolo Bonzini bool cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP) != 0; 4646c50d8ae3SPaolo Bonzini bool cr0_wp = is_write_protection(vcpu); 4647c50d8ae3SPaolo Bonzini 4648c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4649c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4650c50d8ae3SPaolo Bonzini 4651c50d8ae3SPaolo Bonzini /* 4652c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4653c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4654c50d8ae3SPaolo Bonzini */ 4655c50d8ae3SPaolo Bonzini 4656c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4657c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4658c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4659c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4660c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4661c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4662c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4663c50d8ae3SPaolo Bonzini u8 smepf = 0; 4664c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4665c50d8ae3SPaolo Bonzini u8 smapf = 0; 4666c50d8ae3SPaolo Bonzini 4667c50d8ae3SPaolo Bonzini if (!ept) { 4668c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4669c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4670c50d8ae3SPaolo Bonzini 4671c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 4672c50d8ae3SPaolo Bonzini if (!mmu->nx) 4673c50d8ae3SPaolo Bonzini ff = 0; 4674c50d8ae3SPaolo Bonzini 4675c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4676c50d8ae3SPaolo Bonzini if (!cr0_wp) 4677c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4678c50d8ae3SPaolo Bonzini 4679c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4680c50d8ae3SPaolo Bonzini if (cr4_smep) 4681c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4682c50d8ae3SPaolo Bonzini 4683c50d8ae3SPaolo Bonzini /* 4684c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4685c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4686c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4687c50d8ae3SPaolo Bonzini * conditions are true: 4688c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4689c50d8ae3SPaolo Bonzini * - A user page is accessed 4690c50d8ae3SPaolo Bonzini * - The access is not a fetch 4691c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4692c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4693c50d8ae3SPaolo Bonzini * 4694c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4695c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4696c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4697c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4698c50d8ae3SPaolo Bonzini */ 4699c50d8ae3SPaolo Bonzini if (cr4_smap) 4700c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4701c50d8ae3SPaolo Bonzini } 4702c50d8ae3SPaolo Bonzini 4703c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4704c50d8ae3SPaolo Bonzini } 4705c50d8ae3SPaolo Bonzini } 4706c50d8ae3SPaolo Bonzini 4707c50d8ae3SPaolo Bonzini /* 4708c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4709c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4710c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4711c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4712c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4713c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4714c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4715c50d8ae3SPaolo Bonzini * 4716c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4717c50d8ae3SPaolo Bonzini * page tables and the machine state: 4718c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4719c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4720c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4721c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4722c50d8ae3SPaolo Bonzini * 4723c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4724c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4725c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4726c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4727c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4728c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4729c50d8ae3SPaolo Bonzini * only will be masked away. 4730c50d8ae3SPaolo Bonzini */ 4731c50d8ae3SPaolo Bonzini static void update_pkru_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 4732c50d8ae3SPaolo Bonzini bool ept) 4733c50d8ae3SPaolo Bonzini { 4734c50d8ae3SPaolo Bonzini unsigned bit; 4735c50d8ae3SPaolo Bonzini bool wp; 4736c50d8ae3SPaolo Bonzini 4737c50d8ae3SPaolo Bonzini if (ept) { 4738c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4739c50d8ae3SPaolo Bonzini return; 4740c50d8ae3SPaolo Bonzini } 4741c50d8ae3SPaolo Bonzini 4742c50d8ae3SPaolo Bonzini /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */ 4743c50d8ae3SPaolo Bonzini if (!kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || !is_long_mode(vcpu)) { 4744c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4745c50d8ae3SPaolo Bonzini return; 4746c50d8ae3SPaolo Bonzini } 4747c50d8ae3SPaolo Bonzini 4748c50d8ae3SPaolo Bonzini wp = is_write_protection(vcpu); 4749c50d8ae3SPaolo Bonzini 4750c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4751c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4752c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4753c50d8ae3SPaolo Bonzini 4754c50d8ae3SPaolo Bonzini pfec = bit << 1; 4755c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4756c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4757c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4758c50d8ae3SPaolo Bonzini 4759c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4760c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4761c50d8ae3SPaolo Bonzini 4762c50d8ae3SPaolo Bonzini /* 4763c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4764c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4765c50d8ae3SPaolo Bonzini */ 4766c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4767c50d8ae3SPaolo Bonzini /* 4768c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4769c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4770c50d8ae3SPaolo Bonzini */ 4771c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4772c50d8ae3SPaolo Bonzini 4773c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4774c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4775c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4776c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4777c50d8ae3SPaolo Bonzini 4778c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4779c50d8ae3SPaolo Bonzini } 4780c50d8ae3SPaolo Bonzini } 4781c50d8ae3SPaolo Bonzini 4782c50d8ae3SPaolo Bonzini static void update_last_nonleaf_level(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 4783c50d8ae3SPaolo Bonzini { 4784c50d8ae3SPaolo Bonzini unsigned root_level = mmu->root_level; 4785c50d8ae3SPaolo Bonzini 4786c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level = root_level; 4787c50d8ae3SPaolo Bonzini if (root_level == PT32_ROOT_LEVEL && is_pse(vcpu)) 4788c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level++; 4789c50d8ae3SPaolo Bonzini } 4790c50d8ae3SPaolo Bonzini 4791c50d8ae3SPaolo Bonzini static void paging64_init_context_common(struct kvm_vcpu *vcpu, 4792c50d8ae3SPaolo Bonzini struct kvm_mmu *context, 4793c50d8ae3SPaolo Bonzini int level) 4794c50d8ae3SPaolo Bonzini { 4795c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4796c50d8ae3SPaolo Bonzini context->root_level = level; 4797c50d8ae3SPaolo Bonzini 4798c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4799c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4800c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4801c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4802c50d8ae3SPaolo Bonzini 4803c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_pae(vcpu)); 4804c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4805c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4806c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4807c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4808c50d8ae3SPaolo Bonzini context->update_pte = paging64_update_pte; 4809c50d8ae3SPaolo Bonzini context->shadow_root_level = level; 4810c50d8ae3SPaolo Bonzini context->direct_map = false; 4811c50d8ae3SPaolo Bonzini } 4812c50d8ae3SPaolo Bonzini 4813c50d8ae3SPaolo Bonzini static void paging64_init_context(struct kvm_vcpu *vcpu, 4814c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4815c50d8ae3SPaolo Bonzini { 4816c50d8ae3SPaolo Bonzini int root_level = is_la57_mode(vcpu) ? 4817c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4818c50d8ae3SPaolo Bonzini 4819c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, root_level); 4820c50d8ae3SPaolo Bonzini } 4821c50d8ae3SPaolo Bonzini 4822c50d8ae3SPaolo Bonzini static void paging32_init_context(struct kvm_vcpu *vcpu, 4823c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4824c50d8ae3SPaolo Bonzini { 4825c50d8ae3SPaolo Bonzini context->nx = false; 4826c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4827c50d8ae3SPaolo Bonzini 4828c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4829c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4830c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4831c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4832c50d8ae3SPaolo Bonzini 4833c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4834c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4835c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4836c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4837c50d8ae3SPaolo Bonzini context->update_pte = paging32_update_pte; 4838c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4839c50d8ae3SPaolo Bonzini context->direct_map = false; 4840c50d8ae3SPaolo Bonzini } 4841c50d8ae3SPaolo Bonzini 4842c50d8ae3SPaolo Bonzini static void paging32E_init_context(struct kvm_vcpu *vcpu, 4843c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4844c50d8ae3SPaolo Bonzini { 4845c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL); 4846c50d8ae3SPaolo Bonzini } 4847c50d8ae3SPaolo Bonzini 4848c50d8ae3SPaolo Bonzini static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu) 4849c50d8ae3SPaolo Bonzini { 4850c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4851c50d8ae3SPaolo Bonzini 4852c50d8ae3SPaolo Bonzini ext.cr0_pg = !!is_paging(vcpu); 4853c50d8ae3SPaolo Bonzini ext.cr4_pae = !!is_pae(vcpu); 4854c50d8ae3SPaolo Bonzini ext.cr4_smep = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); 4855c50d8ae3SPaolo Bonzini ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); 4856c50d8ae3SPaolo Bonzini ext.cr4_pse = !!is_pse(vcpu); 4857c50d8ae3SPaolo Bonzini ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE); 4858c50d8ae3SPaolo Bonzini ext.maxphyaddr = cpuid_maxphyaddr(vcpu); 4859c50d8ae3SPaolo Bonzini 4860c50d8ae3SPaolo Bonzini ext.valid = 1; 4861c50d8ae3SPaolo Bonzini 4862c50d8ae3SPaolo Bonzini return ext; 4863c50d8ae3SPaolo Bonzini } 4864c50d8ae3SPaolo Bonzini 4865c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 4866c50d8ae3SPaolo Bonzini bool base_only) 4867c50d8ae3SPaolo Bonzini { 4868c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4869c50d8ae3SPaolo Bonzini 4870c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4871c50d8ae3SPaolo Bonzini role.base.nxe = !!is_nx(vcpu); 4872c50d8ae3SPaolo Bonzini role.base.cr0_wp = is_write_protection(vcpu); 4873c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4874c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4875c50d8ae3SPaolo Bonzini 4876c50d8ae3SPaolo Bonzini if (base_only) 4877c50d8ae3SPaolo Bonzini return role; 4878c50d8ae3SPaolo Bonzini 4879c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4880c50d8ae3SPaolo Bonzini 4881c50d8ae3SPaolo Bonzini return role; 4882c50d8ae3SPaolo Bonzini } 4883c50d8ae3SPaolo Bonzini 4884c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4885c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 4886c50d8ae3SPaolo Bonzini { 4887c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4888c50d8ae3SPaolo Bonzini 4889c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4890e93fd3b3SSean Christopherson role.base.level = vcpu->arch.tdp_level; 4891c50d8ae3SPaolo Bonzini role.base.direct = true; 4892c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4893c50d8ae3SPaolo Bonzini 4894c50d8ae3SPaolo Bonzini return role; 4895c50d8ae3SPaolo Bonzini } 4896c50d8ae3SPaolo Bonzini 4897c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4898c50d8ae3SPaolo Bonzini { 4899c50d8ae3SPaolo Bonzini struct kvm_mmu *context = vcpu->arch.mmu; 4900c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4901c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(vcpu, false); 4902c50d8ae3SPaolo Bonzini 4903c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4904c50d8ae3SPaolo Bonzini return; 4905c50d8ae3SPaolo Bonzini 4906c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 49077a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4908c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 49095efac074SPaolo Bonzini context->invlpg = NULL; 4910c50d8ae3SPaolo Bonzini context->update_pte = nonpaging_update_pte; 4911e93fd3b3SSean Christopherson context->shadow_root_level = vcpu->arch.tdp_level; 4912c50d8ae3SPaolo Bonzini context->direct_map = true; 4913d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4914c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4915c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4916c50d8ae3SPaolo Bonzini 4917c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4918c50d8ae3SPaolo Bonzini context->nx = false; 4919c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4920c50d8ae3SPaolo Bonzini context->root_level = 0; 4921c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4922c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4923c50d8ae3SPaolo Bonzini context->root_level = is_la57_mode(vcpu) ? 4924c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4925c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4926c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4927c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4928c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4929c50d8ae3SPaolo Bonzini context->root_level = PT32E_ROOT_LEVEL; 4930c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4931c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4932c50d8ae3SPaolo Bonzini } else { 4933c50d8ae3SPaolo Bonzini context->nx = false; 4934c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4935c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4936c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4937c50d8ae3SPaolo Bonzini } 4938c50d8ae3SPaolo Bonzini 4939c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4940c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4941c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4942c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4943c50d8ae3SPaolo Bonzini } 4944c50d8ae3SPaolo Bonzini 4945c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4946c50d8ae3SPaolo Bonzini kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 4947c50d8ae3SPaolo Bonzini { 4948c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4949c50d8ae3SPaolo Bonzini 4950c50d8ae3SPaolo Bonzini role.base.smep_andnot_wp = role.ext.cr4_smep && 4951c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4952c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = role.ext.cr4_smap && 4953c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4954c50d8ae3SPaolo Bonzini role.base.direct = !is_paging(vcpu); 4955c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = !!is_pae(vcpu); 4956c50d8ae3SPaolo Bonzini 4957c50d8ae3SPaolo Bonzini if (!is_long_mode(vcpu)) 4958c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 4959c50d8ae3SPaolo Bonzini else if (is_la57_mode(vcpu)) 4960c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4961c50d8ae3SPaolo Bonzini else 4962c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4963c50d8ae3SPaolo Bonzini 4964c50d8ae3SPaolo Bonzini return role; 4965c50d8ae3SPaolo Bonzini } 4966c50d8ae3SPaolo Bonzini 4967929d1cfaSPaolo Bonzini void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer) 4968c50d8ae3SPaolo Bonzini { 4969c50d8ae3SPaolo Bonzini struct kvm_mmu *context = vcpu->arch.mmu; 4970c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4971c50d8ae3SPaolo Bonzini kvm_calc_shadow_mmu_root_page_role(vcpu, false); 4972c50d8ae3SPaolo Bonzini 4973c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4974c50d8ae3SPaolo Bonzini return; 4975c50d8ae3SPaolo Bonzini 4976929d1cfaSPaolo Bonzini if (!(cr0 & X86_CR0_PG)) 4977c50d8ae3SPaolo Bonzini nonpaging_init_context(vcpu, context); 4978929d1cfaSPaolo Bonzini else if (efer & EFER_LMA) 4979c50d8ae3SPaolo Bonzini paging64_init_context(vcpu, context); 4980929d1cfaSPaolo Bonzini else if (cr4 & X86_CR4_PAE) 4981c50d8ae3SPaolo Bonzini paging32E_init_context(vcpu, context); 4982c50d8ae3SPaolo Bonzini else 4983c50d8ae3SPaolo Bonzini paging32_init_context(vcpu, context); 4984c50d8ae3SPaolo Bonzini 4985c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4986c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4987c50d8ae3SPaolo Bonzini } 4988c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu); 4989c50d8ae3SPaolo Bonzini 4990c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4991c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4992bb1fcc70SSean Christopherson bool execonly, u8 level) 4993c50d8ae3SPaolo Bonzini { 4994c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4995c50d8ae3SPaolo Bonzini 4996c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4997c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4998c50d8ae3SPaolo Bonzini 4999bb1fcc70SSean Christopherson role.base.level = level; 5000c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 5001c50d8ae3SPaolo Bonzini role.base.direct = false; 5002c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 5003c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 5004c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 5005c50d8ae3SPaolo Bonzini 5006c50d8ae3SPaolo Bonzini /* 5007c50d8ae3SPaolo Bonzini * WP=1 and NOT_WP=1 is an impossible combination, use WP and the 5008c50d8ae3SPaolo Bonzini * SMAP variation to denote shadow EPT entries. 5009c50d8ae3SPaolo Bonzini */ 5010c50d8ae3SPaolo Bonzini role.base.cr0_wp = true; 5011c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = true; 5012c50d8ae3SPaolo Bonzini 5013c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 5014c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 5015c50d8ae3SPaolo Bonzini 5016c50d8ae3SPaolo Bonzini return role; 5017c50d8ae3SPaolo Bonzini } 5018c50d8ae3SPaolo Bonzini 5019c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 5020c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 5021c50d8ae3SPaolo Bonzini { 5022c50d8ae3SPaolo Bonzini struct kvm_mmu *context = vcpu->arch.mmu; 5023bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 5024c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 5025c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 5026bb1fcc70SSean Christopherson execonly, level); 5027c50d8ae3SPaolo Bonzini 5028be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base, true, true); 5029c50d8ae3SPaolo Bonzini 5030c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 5031c50d8ae3SPaolo Bonzini return; 5032c50d8ae3SPaolo Bonzini 5033bb1fcc70SSean Christopherson context->shadow_root_level = level; 5034c50d8ae3SPaolo Bonzini 5035c50d8ae3SPaolo Bonzini context->nx = true; 5036c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 5037c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 5038c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 5039c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 5040c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 5041c50d8ae3SPaolo Bonzini context->update_pte = ept_update_pte; 5042bb1fcc70SSean Christopherson context->root_level = level; 5043c50d8ae3SPaolo Bonzini context->direct_map = false; 5044c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 5045c50d8ae3SPaolo Bonzini 5046c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, true); 5047c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, true); 5048c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 5049c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 5050c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 5051c50d8ae3SPaolo Bonzini } 5052c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 5053c50d8ae3SPaolo Bonzini 5054c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 5055c50d8ae3SPaolo Bonzini { 5056c50d8ae3SPaolo Bonzini struct kvm_mmu *context = vcpu->arch.mmu; 5057c50d8ae3SPaolo Bonzini 5058929d1cfaSPaolo Bonzini kvm_init_shadow_mmu(vcpu, 5059929d1cfaSPaolo Bonzini kvm_read_cr0_bits(vcpu, X86_CR0_PG), 5060929d1cfaSPaolo Bonzini kvm_read_cr4_bits(vcpu, X86_CR4_PAE), 5061929d1cfaSPaolo Bonzini vcpu->arch.efer); 5062929d1cfaSPaolo Bonzini 5063d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 5064c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 5065c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 5066c50d8ae3SPaolo Bonzini } 5067c50d8ae3SPaolo Bonzini 5068c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 5069c50d8ae3SPaolo Bonzini { 5070c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = kvm_calc_mmu_role_common(vcpu, false); 5071c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 5072c50d8ae3SPaolo Bonzini 5073c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 5074c50d8ae3SPaolo Bonzini return; 5075c50d8ae3SPaolo Bonzini 5076c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 5077d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 5078c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 5079c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 5080c50d8ae3SPaolo Bonzini 5081c50d8ae3SPaolo Bonzini /* 50825efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 50835efac074SPaolo Bonzini * SPTEs. 50845efac074SPaolo Bonzini */ 50855efac074SPaolo Bonzini g_context->invlpg = NULL; 50865efac074SPaolo Bonzini 50875efac074SPaolo Bonzini /* 5088c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 5089c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 5090c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 5091c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 5092c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 5093c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 5094c50d8ae3SPaolo Bonzini */ 5095c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 5096c50d8ae3SPaolo Bonzini g_context->nx = false; 5097c50d8ae3SPaolo Bonzini g_context->root_level = 0; 5098c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 5099c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 5100c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 5101c50d8ae3SPaolo Bonzini g_context->root_level = is_la57_mode(vcpu) ? 5102c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 5103c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 5104c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 5105c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 5106c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 5107c50d8ae3SPaolo Bonzini g_context->root_level = PT32E_ROOT_LEVEL; 5108c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 5109c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 5110c50d8ae3SPaolo Bonzini } else { 5111c50d8ae3SPaolo Bonzini g_context->nx = false; 5112c50d8ae3SPaolo Bonzini g_context->root_level = PT32_ROOT_LEVEL; 5113c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 5114c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 5115c50d8ae3SPaolo Bonzini } 5116c50d8ae3SPaolo Bonzini 5117c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, g_context, false); 5118c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, g_context, false); 5119c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, g_context); 5120c50d8ae3SPaolo Bonzini } 5121c50d8ae3SPaolo Bonzini 5122c50d8ae3SPaolo Bonzini void kvm_init_mmu(struct kvm_vcpu *vcpu, bool reset_roots) 5123c50d8ae3SPaolo Bonzini { 5124c50d8ae3SPaolo Bonzini if (reset_roots) { 5125c50d8ae3SPaolo Bonzini uint i; 5126c50d8ae3SPaolo Bonzini 5127c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = INVALID_PAGE; 5128c50d8ae3SPaolo Bonzini 5129c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5130c50d8ae3SPaolo Bonzini vcpu->arch.mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 5131c50d8ae3SPaolo Bonzini } 5132c50d8ae3SPaolo Bonzini 5133c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 5134c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 5135c50d8ae3SPaolo Bonzini else if (tdp_enabled) 5136c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 5137c50d8ae3SPaolo Bonzini else 5138c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 5139c50d8ae3SPaolo Bonzini } 5140c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 5141c50d8ae3SPaolo Bonzini 5142c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 5143c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 5144c50d8ae3SPaolo Bonzini { 5145c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 5146c50d8ae3SPaolo Bonzini 5147c50d8ae3SPaolo Bonzini if (tdp_enabled) 5148c50d8ae3SPaolo Bonzini role = kvm_calc_tdp_mmu_root_page_role(vcpu, true); 5149c50d8ae3SPaolo Bonzini else 5150c50d8ae3SPaolo Bonzini role = kvm_calc_shadow_mmu_root_page_role(vcpu, true); 5151c50d8ae3SPaolo Bonzini 5152c50d8ae3SPaolo Bonzini return role.base; 5153c50d8ae3SPaolo Bonzini } 5154c50d8ae3SPaolo Bonzini 5155c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 5156c50d8ae3SPaolo Bonzini { 5157c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5158c50d8ae3SPaolo Bonzini kvm_init_mmu(vcpu, true); 5159c50d8ae3SPaolo Bonzini } 5160c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 5161c50d8ae3SPaolo Bonzini 5162c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 5163c50d8ae3SPaolo Bonzini { 5164c50d8ae3SPaolo Bonzini int r; 5165c50d8ae3SPaolo Bonzini 5166c50d8ae3SPaolo Bonzini r = mmu_topup_memory_caches(vcpu); 5167c50d8ae3SPaolo Bonzini if (r) 5168c50d8ae3SPaolo Bonzini goto out; 5169c50d8ae3SPaolo Bonzini r = mmu_alloc_roots(vcpu); 5170c50d8ae3SPaolo Bonzini kvm_mmu_sync_roots(vcpu); 5171c50d8ae3SPaolo Bonzini if (r) 5172c50d8ae3SPaolo Bonzini goto out; 5173727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 51748c8560b8SSean Christopherson kvm_x86_ops.tlb_flush_current(vcpu); 5175c50d8ae3SPaolo Bonzini out: 5176c50d8ae3SPaolo Bonzini return r; 5177c50d8ae3SPaolo Bonzini } 5178c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_load); 5179c50d8ae3SPaolo Bonzini 5180c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 5181c50d8ae3SPaolo Bonzini { 5182c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 5183c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 5184c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 5185c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 5186c50d8ae3SPaolo Bonzini } 5187c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unload); 5188c50d8ae3SPaolo Bonzini 5189c50d8ae3SPaolo Bonzini static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, 5190c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *spte, 5191c50d8ae3SPaolo Bonzini const void *new) 5192c50d8ae3SPaolo Bonzini { 51933bae0459SSean Christopherson if (sp->role.level != PG_LEVEL_4K) { 5194c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pde_zapped; 5195c50d8ae3SPaolo Bonzini return; 5196c50d8ae3SPaolo Bonzini } 5197c50d8ae3SPaolo Bonzini 5198c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_updated; 5199c50d8ae3SPaolo Bonzini vcpu->arch.mmu->update_pte(vcpu, sp, spte, new); 5200c50d8ae3SPaolo Bonzini } 5201c50d8ae3SPaolo Bonzini 5202c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 5203c50d8ae3SPaolo Bonzini { 5204c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 5205c50d8ae3SPaolo Bonzini return false; 5206c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 5207c50d8ae3SPaolo Bonzini return true; 5208c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 5209c50d8ae3SPaolo Bonzini return true; 5210c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 5211c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 5212c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 5213c50d8ae3SPaolo Bonzini } 5214c50d8ae3SPaolo Bonzini 5215c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 5216c50d8ae3SPaolo Bonzini int *bytes) 5217c50d8ae3SPaolo Bonzini { 5218c50d8ae3SPaolo Bonzini u64 gentry = 0; 5219c50d8ae3SPaolo Bonzini int r; 5220c50d8ae3SPaolo Bonzini 5221c50d8ae3SPaolo Bonzini /* 5222c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 5223c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 5224c50d8ae3SPaolo Bonzini * when they have the same mode. 5225c50d8ae3SPaolo Bonzini */ 5226c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5227c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5228c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5229c50d8ae3SPaolo Bonzini *bytes = 8; 5230c50d8ae3SPaolo Bonzini } 5231c50d8ae3SPaolo Bonzini 5232c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5233c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5234c50d8ae3SPaolo Bonzini if (r) 5235c50d8ae3SPaolo Bonzini gentry = 0; 5236c50d8ae3SPaolo Bonzini } 5237c50d8ae3SPaolo Bonzini 5238c50d8ae3SPaolo Bonzini return gentry; 5239c50d8ae3SPaolo Bonzini } 5240c50d8ae3SPaolo Bonzini 5241c50d8ae3SPaolo Bonzini /* 5242c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5243c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5244c50d8ae3SPaolo Bonzini */ 5245c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5246c50d8ae3SPaolo Bonzini { 5247c50d8ae3SPaolo Bonzini /* 5248c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5249c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5250c50d8ae3SPaolo Bonzini */ 52513bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5252c50d8ae3SPaolo Bonzini return false; 5253c50d8ae3SPaolo Bonzini 5254c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5255c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5256c50d8ae3SPaolo Bonzini } 5257c50d8ae3SPaolo Bonzini 5258c50d8ae3SPaolo Bonzini /* 5259c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5260c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5261c50d8ae3SPaolo Bonzini */ 5262c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5263c50d8ae3SPaolo Bonzini int bytes) 5264c50d8ae3SPaolo Bonzini { 5265c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5266c50d8ae3SPaolo Bonzini 5267c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5268c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5269c50d8ae3SPaolo Bonzini 5270c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5271c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 5272c50d8ae3SPaolo Bonzini 5273c50d8ae3SPaolo Bonzini /* 5274c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5275c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5276c50d8ae3SPaolo Bonzini */ 5277c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5278c50d8ae3SPaolo Bonzini return false; 5279c50d8ae3SPaolo Bonzini 5280c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5281c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5282c50d8ae3SPaolo Bonzini 5283c50d8ae3SPaolo Bonzini return misaligned; 5284c50d8ae3SPaolo Bonzini } 5285c50d8ae3SPaolo Bonzini 5286c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5287c50d8ae3SPaolo Bonzini { 5288c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5289c50d8ae3SPaolo Bonzini u64 *spte; 5290c50d8ae3SPaolo Bonzini int level; 5291c50d8ae3SPaolo Bonzini 5292c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5293c50d8ae3SPaolo Bonzini level = sp->role.level; 5294c50d8ae3SPaolo Bonzini *nspte = 1; 5295c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 5296c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5297c50d8ae3SPaolo Bonzini /* 5298c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5299c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5300c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5301c50d8ae3SPaolo Bonzini */ 5302c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5303c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5304c50d8ae3SPaolo Bonzini page_offset <<= 1; 5305c50d8ae3SPaolo Bonzini *nspte = 2; 5306c50d8ae3SPaolo Bonzini } 5307c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5308c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5309c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5310c50d8ae3SPaolo Bonzini return NULL; 5311c50d8ae3SPaolo Bonzini } 5312c50d8ae3SPaolo Bonzini 5313c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5314c50d8ae3SPaolo Bonzini return spte; 5315c50d8ae3SPaolo Bonzini } 5316c50d8ae3SPaolo Bonzini 5317a102a674SSean Christopherson /* 5318a102a674SSean Christopherson * Ignore various flags when determining if a SPTE can be immediately 5319a102a674SSean Christopherson * overwritten for the current MMU. 5320a102a674SSean Christopherson * - level: explicitly checked in mmu_pte_write_new_pte(), and will never 5321a102a674SSean Christopherson * match the current MMU role, as MMU's level tracks the root level. 5322a102a674SSean Christopherson * - access: updated based on the new guest PTE 5323a102a674SSean Christopherson * - quadrant: handled by get_written_sptes() 5324a102a674SSean Christopherson * - invalid: always false (loop only walks valid shadow pages) 5325a102a674SSean Christopherson */ 5326a102a674SSean Christopherson static const union kvm_mmu_page_role role_ign = { 5327a102a674SSean Christopherson .level = 0xf, 5328a102a674SSean Christopherson .access = 0x7, 5329a102a674SSean Christopherson .quadrant = 0x3, 5330a102a674SSean Christopherson .invalid = 0x1, 5331a102a674SSean Christopherson }; 5332a102a674SSean Christopherson 5333c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5334c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5335c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5336c50d8ae3SPaolo Bonzini { 5337c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5338c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5339c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5340c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5341c50d8ae3SPaolo Bonzini int npte; 5342c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 5343c50d8ae3SPaolo Bonzini 5344c50d8ae3SPaolo Bonzini /* 5345c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5346c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5347c50d8ae3SPaolo Bonzini */ 5348c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5349c50d8ae3SPaolo Bonzini return; 5350c50d8ae3SPaolo Bonzini 5351c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 5352c50d8ae3SPaolo Bonzini 5353c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5354c50d8ae3SPaolo Bonzini 5355c50d8ae3SPaolo Bonzini /* 5356c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5357c50d8ae3SPaolo Bonzini * or not since pte prefetch is skiped if it does not have 5358c50d8ae3SPaolo Bonzini * enough objects in the cache. 5359c50d8ae3SPaolo Bonzini */ 5360c50d8ae3SPaolo Bonzini mmu_topup_memory_caches(vcpu); 5361c50d8ae3SPaolo Bonzini 5362c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 5363c50d8ae3SPaolo Bonzini 5364c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5365c50d8ae3SPaolo Bonzini 5366c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5367c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5368c50d8ae3SPaolo Bonzini 5369c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5370c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5371c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5372c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5373c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5374c50d8ae3SPaolo Bonzini continue; 5375c50d8ae3SPaolo Bonzini } 5376c50d8ae3SPaolo Bonzini 5377c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5378c50d8ae3SPaolo Bonzini if (!spte) 5379c50d8ae3SPaolo Bonzini continue; 5380c50d8ae3SPaolo Bonzini 5381c50d8ae3SPaolo Bonzini local_flush = true; 5382c50d8ae3SPaolo Bonzini while (npte--) { 5383c50d8ae3SPaolo Bonzini u32 base_role = vcpu->arch.mmu->mmu_role.base.word; 5384c50d8ae3SPaolo Bonzini 5385c50d8ae3SPaolo Bonzini entry = *spte; 5386c50d8ae3SPaolo Bonzini mmu_page_zap_pte(vcpu->kvm, sp, spte); 5387c50d8ae3SPaolo Bonzini if (gentry && 5388a102a674SSean Christopherson !((sp->role.word ^ base_role) & ~role_ign.word) && 5389a102a674SSean Christopherson rmap_can_add(vcpu)) 5390c50d8ae3SPaolo Bonzini mmu_pte_write_new_pte(vcpu, sp, spte, &gentry); 5391c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5392c50d8ae3SPaolo Bonzini remote_flush = true; 5393c50d8ae3SPaolo Bonzini ++spte; 5394c50d8ae3SPaolo Bonzini } 5395c50d8ae3SPaolo Bonzini } 5396c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5397c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5398c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 5399c50d8ae3SPaolo Bonzini } 5400c50d8ae3SPaolo Bonzini 5401c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 5402c50d8ae3SPaolo Bonzini { 5403c50d8ae3SPaolo Bonzini gpa_t gpa; 5404c50d8ae3SPaolo Bonzini int r; 5405c50d8ae3SPaolo Bonzini 5406c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 5407c50d8ae3SPaolo Bonzini return 0; 5408c50d8ae3SPaolo Bonzini 5409c50d8ae3SPaolo Bonzini gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 5410c50d8ae3SPaolo Bonzini 5411c50d8ae3SPaolo Bonzini r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 5412c50d8ae3SPaolo Bonzini 5413c50d8ae3SPaolo Bonzini return r; 5414c50d8ae3SPaolo Bonzini } 5415c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); 5416c50d8ae3SPaolo Bonzini 5417736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5418c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5419c50d8ae3SPaolo Bonzini { 542092daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5421c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5422c50d8ae3SPaolo Bonzini 54236948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5424ddce6208SSean Christopherson return RET_PF_RETRY; 5425ddce6208SSean Christopherson 5426c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5427c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5428736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5429c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5430c50d8ae3SPaolo Bonzini goto emulate; 5431c50d8ae3SPaolo Bonzini } 5432c50d8ae3SPaolo Bonzini 5433c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 54347a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 54357a02674dSSean Christopherson lower_32_bits(error_code), false); 5436c50d8ae3SPaolo Bonzini WARN_ON(r == RET_PF_INVALID); 5437c50d8ae3SPaolo Bonzini } 5438c50d8ae3SPaolo Bonzini 5439c50d8ae3SPaolo Bonzini if (r == RET_PF_RETRY) 5440c50d8ae3SPaolo Bonzini return 1; 5441c50d8ae3SPaolo Bonzini if (r < 0) 5442c50d8ae3SPaolo Bonzini return r; 5443c50d8ae3SPaolo Bonzini 5444c50d8ae3SPaolo Bonzini /* 5445c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5446c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5447c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5448c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5449c50d8ae3SPaolo Bonzini * and resume the guest. 5450c50d8ae3SPaolo Bonzini */ 5451c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5452c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5453736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5454c50d8ae3SPaolo Bonzini return 1; 5455c50d8ae3SPaolo Bonzini } 5456c50d8ae3SPaolo Bonzini 5457c50d8ae3SPaolo Bonzini /* 5458c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5459c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5460c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5461c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5462c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5463c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5464c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5465c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5466c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5467c50d8ae3SPaolo Bonzini */ 5468736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 546992daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5470c50d8ae3SPaolo Bonzini emulate: 5471c50d8ae3SPaolo Bonzini /* 5472c50d8ae3SPaolo Bonzini * On AMD platforms, under certain conditions insn_len may be zero on #NPF. 5473c50d8ae3SPaolo Bonzini * This can happen if a guest gets a page-fault on data access but the HW 5474c50d8ae3SPaolo Bonzini * table walker is not able to read the instruction page (e.g instruction 5475c50d8ae3SPaolo Bonzini * page is not present in memory). In those cases we simply restart the 5476c50d8ae3SPaolo Bonzini * guest, with the exception of AMD Erratum 1096 which is unrecoverable. 5477c50d8ae3SPaolo Bonzini */ 5478c50d8ae3SPaolo Bonzini if (unlikely(insn && !insn_len)) { 5479afaf0b2fSSean Christopherson if (!kvm_x86_ops.need_emulation_on_page_fault(vcpu)) 5480c50d8ae3SPaolo Bonzini return 1; 5481c50d8ae3SPaolo Bonzini } 5482c50d8ae3SPaolo Bonzini 5483736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5484c50d8ae3SPaolo Bonzini insn_len); 5485c50d8ae3SPaolo Bonzini } 5486c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5487c50d8ae3SPaolo Bonzini 54885efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 54895efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5490c50d8ae3SPaolo Bonzini { 5491c50d8ae3SPaolo Bonzini int i; 5492c50d8ae3SPaolo Bonzini 54935efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 54945efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 54955efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5496c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5497c50d8ae3SPaolo Bonzini return; 5498c50d8ae3SPaolo Bonzini 54995efac074SPaolo Bonzini kvm_x86_ops.tlb_flush_gva(vcpu, gva); 55005efac074SPaolo Bonzini } 55015efac074SPaolo Bonzini 55025efac074SPaolo Bonzini if (!mmu->invlpg) 55035efac074SPaolo Bonzini return; 55045efac074SPaolo Bonzini 55055efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5506c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5507c50d8ae3SPaolo Bonzini 5508c50d8ae3SPaolo Bonzini /* 5509c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5510c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5511c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5512c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5513c50d8ae3SPaolo Bonzini * just always sync it. 5514c50d8ae3SPaolo Bonzini * 5515c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5516c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5517c50d8ae3SPaolo Bonzini * for them. 5518c50d8ae3SPaolo Bonzini */ 5519c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5520c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5521c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 55225efac074SPaolo Bonzini } else { 55235efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 55245efac074SPaolo Bonzini } 55255efac074SPaolo Bonzini } 55265efac074SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invalidate_gva); 5527c50d8ae3SPaolo Bonzini 55285efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 55295efac074SPaolo Bonzini { 55305efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5531c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5532c50d8ae3SPaolo Bonzini } 5533c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5534c50d8ae3SPaolo Bonzini 55355efac074SPaolo Bonzini 5536c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5537c50d8ae3SPaolo Bonzini { 5538c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5539c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5540c50d8ae3SPaolo Bonzini uint i; 5541c50d8ae3SPaolo Bonzini 5542c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5543c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5544c50d8ae3SPaolo Bonzini tlb_flush = true; 5545c50d8ae3SPaolo Bonzini } 5546c50d8ae3SPaolo Bonzini 5547c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5548c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5549be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5550c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5551c50d8ae3SPaolo Bonzini tlb_flush = true; 5552c50d8ae3SPaolo Bonzini } 5553c50d8ae3SPaolo Bonzini } 5554c50d8ae3SPaolo Bonzini 5555c50d8ae3SPaolo Bonzini if (tlb_flush) 5556afaf0b2fSSean Christopherson kvm_x86_ops.tlb_flush_gva(vcpu, gva); 5557c50d8ae3SPaolo Bonzini 5558c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5559c50d8ae3SPaolo Bonzini 5560c50d8ae3SPaolo Bonzini /* 5561c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5562c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5563c50d8ae3SPaolo Bonzini * for them. 5564c50d8ae3SPaolo Bonzini */ 5565c50d8ae3SPaolo Bonzini } 5566c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invpcid_gva); 5567c50d8ae3SPaolo Bonzini 5568703c335dSSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_page_level) 5569c50d8ae3SPaolo Bonzini { 5570bde77235SSean Christopherson tdp_enabled = enable_tdp; 5571703c335dSSean Christopherson 5572703c335dSSean Christopherson /* 5573703c335dSSean Christopherson * max_page_level reflects the capabilities of KVM's MMU irrespective 5574703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5575703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5576703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5577703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5578703c335dSSean Christopherson */ 5579703c335dSSean Christopherson if (tdp_enabled) 5580703c335dSSean Christopherson max_page_level = tdp_page_level; 5581703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 55823bae0459SSean Christopherson max_page_level = PG_LEVEL_1G; 5583703c335dSSean Christopherson else 55843bae0459SSean Christopherson max_page_level = PG_LEVEL_2M; 5585c50d8ae3SPaolo Bonzini } 5586bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5587c50d8ae3SPaolo Bonzini 5588c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5589c50d8ae3SPaolo Bonzini typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head); 5590c50d8ae3SPaolo Bonzini 5591c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5592c50d8ae3SPaolo Bonzini static __always_inline bool 5593c50d8ae3SPaolo Bonzini slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot, 5594c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5595c50d8ae3SPaolo Bonzini gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb) 5596c50d8ae3SPaolo Bonzini { 5597c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5598c50d8ae3SPaolo Bonzini bool flush = false; 5599c50d8ae3SPaolo Bonzini 5600c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5601c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5602c50d8ae3SPaolo Bonzini if (iterator.rmap) 5603c50d8ae3SPaolo Bonzini flush |= fn(kvm, iterator.rmap); 5604c50d8ae3SPaolo Bonzini 5605c50d8ae3SPaolo Bonzini if (need_resched() || spin_needbreak(&kvm->mmu_lock)) { 5606c50d8ae3SPaolo Bonzini if (flush && lock_flush_tlb) { 5607c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5608c50d8ae3SPaolo Bonzini start_gfn, 5609c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5610c50d8ae3SPaolo Bonzini flush = false; 5611c50d8ae3SPaolo Bonzini } 5612c50d8ae3SPaolo Bonzini cond_resched_lock(&kvm->mmu_lock); 5613c50d8ae3SPaolo Bonzini } 5614c50d8ae3SPaolo Bonzini } 5615c50d8ae3SPaolo Bonzini 5616c50d8ae3SPaolo Bonzini if (flush && lock_flush_tlb) { 5617c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, start_gfn, 5618c50d8ae3SPaolo Bonzini end_gfn - start_gfn + 1); 5619c50d8ae3SPaolo Bonzini flush = false; 5620c50d8ae3SPaolo Bonzini } 5621c50d8ae3SPaolo Bonzini 5622c50d8ae3SPaolo Bonzini return flush; 5623c50d8ae3SPaolo Bonzini } 5624c50d8ae3SPaolo Bonzini 5625c50d8ae3SPaolo Bonzini static __always_inline bool 5626c50d8ae3SPaolo Bonzini slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5627c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5628c50d8ae3SPaolo Bonzini bool lock_flush_tlb) 5629c50d8ae3SPaolo Bonzini { 5630c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5631c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5632c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 5633c50d8ae3SPaolo Bonzini lock_flush_tlb); 5634c50d8ae3SPaolo Bonzini } 5635c50d8ae3SPaolo Bonzini 5636c50d8ae3SPaolo Bonzini static __always_inline bool 5637c50d8ae3SPaolo Bonzini slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5638c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5639c50d8ae3SPaolo Bonzini { 56403bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5641e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); 5642c50d8ae3SPaolo Bonzini } 5643c50d8ae3SPaolo Bonzini 5644c50d8ae3SPaolo Bonzini static __always_inline bool 5645c50d8ae3SPaolo Bonzini slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5646c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5647c50d8ae3SPaolo Bonzini { 56483bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K + 1, 5649e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); 5650c50d8ae3SPaolo Bonzini } 5651c50d8ae3SPaolo Bonzini 5652c50d8ae3SPaolo Bonzini static __always_inline bool 5653c50d8ae3SPaolo Bonzini slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, 5654c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5655c50d8ae3SPaolo Bonzini { 56563bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 56573bae0459SSean Christopherson PG_LEVEL_4K, lock_flush_tlb); 5658c50d8ae3SPaolo Bonzini } 5659c50d8ae3SPaolo Bonzini 5660c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5661c50d8ae3SPaolo Bonzini { 5662c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 5663c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->lm_root); 5664c50d8ae3SPaolo Bonzini } 5665c50d8ae3SPaolo Bonzini 5666c50d8ae3SPaolo Bonzini static int alloc_mmu_pages(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5667c50d8ae3SPaolo Bonzini { 5668c50d8ae3SPaolo Bonzini struct page *page; 5669c50d8ae3SPaolo Bonzini int i; 5670c50d8ae3SPaolo Bonzini 5671c50d8ae3SPaolo Bonzini /* 5672c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5673c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5674c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5675c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 5676c50d8ae3SPaolo Bonzini * 4GB of memory, which happens to fit the DMA32 zone. Except for 5677c50d8ae3SPaolo Bonzini * SVM's 32-bit NPT support, TDP paging doesn't use PAE paging and can 5678c50d8ae3SPaolo Bonzini * skip allocating the PDP table. 5679c50d8ae3SPaolo Bonzini */ 5680e93fd3b3SSean Christopherson if (tdp_enabled && vcpu->arch.tdp_level > PT32E_ROOT_LEVEL) 5681c50d8ae3SPaolo Bonzini return 0; 5682c50d8ae3SPaolo Bonzini 5683c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5684c50d8ae3SPaolo Bonzini if (!page) 5685c50d8ae3SPaolo Bonzini return -ENOMEM; 5686c50d8ae3SPaolo Bonzini 5687c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 5688c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5689c50d8ae3SPaolo Bonzini mmu->pae_root[i] = INVALID_PAGE; 5690c50d8ae3SPaolo Bonzini 5691c50d8ae3SPaolo Bonzini return 0; 5692c50d8ae3SPaolo Bonzini } 5693c50d8ae3SPaolo Bonzini 5694c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5695c50d8ae3SPaolo Bonzini { 5696c50d8ae3SPaolo Bonzini uint i; 5697c50d8ae3SPaolo Bonzini int ret; 5698c50d8ae3SPaolo Bonzini 5699c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5700c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5701c50d8ae3SPaolo Bonzini 5702c50d8ae3SPaolo Bonzini vcpu->arch.root_mmu.root_hpa = INVALID_PAGE; 5703be01e8e2SSean Christopherson vcpu->arch.root_mmu.root_pgd = 0; 5704c50d8ae3SPaolo Bonzini vcpu->arch.root_mmu.translate_gpa = translate_gpa; 5705c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5706c50d8ae3SPaolo Bonzini vcpu->arch.root_mmu.prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 5707c50d8ae3SPaolo Bonzini 5708c50d8ae3SPaolo Bonzini vcpu->arch.guest_mmu.root_hpa = INVALID_PAGE; 5709be01e8e2SSean Christopherson vcpu->arch.guest_mmu.root_pgd = 0; 5710c50d8ae3SPaolo Bonzini vcpu->arch.guest_mmu.translate_gpa = translate_gpa; 5711c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5712c50d8ae3SPaolo Bonzini vcpu->arch.guest_mmu.prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 5713c50d8ae3SPaolo Bonzini 5714c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5715c50d8ae3SPaolo Bonzini 5716c50d8ae3SPaolo Bonzini ret = alloc_mmu_pages(vcpu, &vcpu->arch.guest_mmu); 5717c50d8ae3SPaolo Bonzini if (ret) 5718c50d8ae3SPaolo Bonzini return ret; 5719c50d8ae3SPaolo Bonzini 5720c50d8ae3SPaolo Bonzini ret = alloc_mmu_pages(vcpu, &vcpu->arch.root_mmu); 5721c50d8ae3SPaolo Bonzini if (ret) 5722c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5723c50d8ae3SPaolo Bonzini 5724c50d8ae3SPaolo Bonzini return ret; 5725c50d8ae3SPaolo Bonzini fail_allocate_root: 5726c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5727c50d8ae3SPaolo Bonzini return ret; 5728c50d8ae3SPaolo Bonzini } 5729c50d8ae3SPaolo Bonzini 5730c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5731c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5732c50d8ae3SPaolo Bonzini { 5733c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5734c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5735c50d8ae3SPaolo Bonzini 5736c50d8ae3SPaolo Bonzini restart: 5737c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5738c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5739c50d8ae3SPaolo Bonzini /* 5740c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5741c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5742c50d8ae3SPaolo Bonzini */ 5743c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5744c50d8ae3SPaolo Bonzini break; 5745c50d8ae3SPaolo Bonzini 5746c50d8ae3SPaolo Bonzini /* 5747f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5748f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5749f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5750c50d8ae3SPaolo Bonzini */ 5751f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5752c50d8ae3SPaolo Bonzini continue; 5753c50d8ae3SPaolo Bonzini 5754c50d8ae3SPaolo Bonzini /* 5755c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5756c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5757c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5758c50d8ae3SPaolo Bonzini * be in active use by the guest. 5759c50d8ae3SPaolo Bonzini */ 5760c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5761c50d8ae3SPaolo Bonzini cond_resched_lock(&kvm->mmu_lock)) { 5762c50d8ae3SPaolo Bonzini batch = 0; 5763c50d8ae3SPaolo Bonzini goto restart; 5764c50d8ae3SPaolo Bonzini } 5765c50d8ae3SPaolo Bonzini 5766c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5767c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5768c50d8ae3SPaolo Bonzini batch += nr_zapped; 5769c50d8ae3SPaolo Bonzini goto restart; 5770c50d8ae3SPaolo Bonzini } 5771c50d8ae3SPaolo Bonzini } 5772c50d8ae3SPaolo Bonzini 5773c50d8ae3SPaolo Bonzini /* 5774c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5775c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5776c50d8ae3SPaolo Bonzini * may reference the pages. 5777c50d8ae3SPaolo Bonzini */ 5778c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5779c50d8ae3SPaolo Bonzini } 5780c50d8ae3SPaolo Bonzini 5781c50d8ae3SPaolo Bonzini /* 5782c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5783c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5784c50d8ae3SPaolo Bonzini * 5785c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5786c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5787c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5788c50d8ae3SPaolo Bonzini * after calling the function. 5789c50d8ae3SPaolo Bonzini */ 5790c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5791c50d8ae3SPaolo Bonzini { 5792c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5793c50d8ae3SPaolo Bonzini 5794c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5795c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5796c50d8ae3SPaolo Bonzini 5797c50d8ae3SPaolo Bonzini /* 5798c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5799c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5800c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5801c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5802c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5803c50d8ae3SPaolo Bonzini */ 5804c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5805c50d8ae3SPaolo Bonzini 5806c50d8ae3SPaolo Bonzini /* 5807c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5808c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5809c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5810c50d8ae3SPaolo Bonzini * 5811c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5812c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5813c50d8ae3SPaolo Bonzini */ 5814c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5815c50d8ae3SPaolo Bonzini 5816c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5817c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5818c50d8ae3SPaolo Bonzini } 5819c50d8ae3SPaolo Bonzini 5820c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5821c50d8ae3SPaolo Bonzini { 5822c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5823c50d8ae3SPaolo Bonzini } 5824c50d8ae3SPaolo Bonzini 5825c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5826c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5827c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5828c50d8ae3SPaolo Bonzini { 5829c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5830c50d8ae3SPaolo Bonzini } 5831c50d8ae3SPaolo Bonzini 5832c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5833c50d8ae3SPaolo Bonzini { 5834c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5835c50d8ae3SPaolo Bonzini 5836c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5837c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5838c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5839c50d8ae3SPaolo Bonzini } 5840c50d8ae3SPaolo Bonzini 5841c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5842c50d8ae3SPaolo Bonzini { 5843c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5844c50d8ae3SPaolo Bonzini 5845c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5846c50d8ae3SPaolo Bonzini } 5847c50d8ae3SPaolo Bonzini 5848c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5849c50d8ae3SPaolo Bonzini { 5850c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5851c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5852c50d8ae3SPaolo Bonzini int i; 5853c50d8ae3SPaolo Bonzini 5854c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5855c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5856c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5857c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5858c50d8ae3SPaolo Bonzini gfn_t start, end; 5859c50d8ae3SPaolo Bonzini 5860c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5861c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5862c50d8ae3SPaolo Bonzini if (start >= end) 5863c50d8ae3SPaolo Bonzini continue; 5864c50d8ae3SPaolo Bonzini 5865c50d8ae3SPaolo Bonzini slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, 58663bae0459SSean Christopherson PG_LEVEL_4K, 5867e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 5868c50d8ae3SPaolo Bonzini start, end - 1, true); 5869c50d8ae3SPaolo Bonzini } 5870c50d8ae3SPaolo Bonzini } 5871c50d8ae3SPaolo Bonzini 5872c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5873c50d8ae3SPaolo Bonzini } 5874c50d8ae3SPaolo Bonzini 5875c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 5876c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 5877c50d8ae3SPaolo Bonzini { 5878c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5879c50d8ae3SPaolo Bonzini } 5880c50d8ae3SPaolo Bonzini 5881c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 58823c9bd400SJay Zhou struct kvm_memory_slot *memslot, 58833c9bd400SJay Zhou int start_level) 5884c50d8ae3SPaolo Bonzini { 5885c50d8ae3SPaolo Bonzini bool flush; 5886c50d8ae3SPaolo Bonzini 5887c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 58883c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5889e662ec3eSSean Christopherson start_level, KVM_MAX_HUGEPAGE_LEVEL, false); 5890c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5891c50d8ae3SPaolo Bonzini 5892c50d8ae3SPaolo Bonzini /* 5893c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5894c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5895c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5896c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5897c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5898c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 5899c50d8ae3SPaolo Bonzini * have checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE 5900c50d8ae3SPaolo Bonzini * instead of PT_WRITABLE_MASK, that means it does not depend 5901c50d8ae3SPaolo Bonzini * on PT_WRITABLE_MASK anymore. 5902c50d8ae3SPaolo Bonzini */ 5903c50d8ae3SPaolo Bonzini if (flush) 59047f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5905c50d8ae3SPaolo Bonzini } 5906c50d8ae3SPaolo Bonzini 5907c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 5908c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 5909c50d8ae3SPaolo Bonzini { 5910c50d8ae3SPaolo Bonzini u64 *sptep; 5911c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5912c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5913c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5914c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5915c50d8ae3SPaolo Bonzini 5916c50d8ae3SPaolo Bonzini restart: 5917c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 5918c50d8ae3SPaolo Bonzini sp = page_header(__pa(sptep)); 5919c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5920c50d8ae3SPaolo Bonzini 5921c50d8ae3SPaolo Bonzini /* 5922c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5923c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5924c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5925c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5926c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5927c50d8ae3SPaolo Bonzini */ 5928c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 5929e851265aSSean Christopherson (kvm_is_zone_device_pfn(pfn) || 5930e851265aSSean Christopherson PageCompound(pfn_to_page(pfn)))) { 5931c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 5932c50d8ae3SPaolo Bonzini 5933c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5934c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5935c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5936c50d8ae3SPaolo Bonzini else 5937c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5938c50d8ae3SPaolo Bonzini 5939c50d8ae3SPaolo Bonzini goto restart; 5940c50d8ae3SPaolo Bonzini } 5941c50d8ae3SPaolo Bonzini } 5942c50d8ae3SPaolo Bonzini 5943c50d8ae3SPaolo Bonzini return need_tlb_flush; 5944c50d8ae3SPaolo Bonzini } 5945c50d8ae3SPaolo Bonzini 5946c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5947c50d8ae3SPaolo Bonzini const struct kvm_memory_slot *memslot) 5948c50d8ae3SPaolo Bonzini { 5949c50d8ae3SPaolo Bonzini /* FIXME: const-ify all uses of struct kvm_memory_slot. */ 5950c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5951c50d8ae3SPaolo Bonzini slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot, 5952c50d8ae3SPaolo Bonzini kvm_mmu_zap_collapsible_spte, true); 5953c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5954c50d8ae3SPaolo Bonzini } 5955c50d8ae3SPaolo Bonzini 5956b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 5957b3594ffbSSean Christopherson struct kvm_memory_slot *memslot) 5958b3594ffbSSean Christopherson { 5959b3594ffbSSean Christopherson /* 59607f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 59617f42aa76SSean Christopherson * are related to dirty logging, and do the TLB flush out of mmu_lock. 59627f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 59637f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 59647f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5965b3594ffbSSean Christopherson */ 5966b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5967cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5968cec37648SSean Christopherson memslot->npages); 5969b3594ffbSSean Christopherson } 5970b3594ffbSSean Christopherson 5971c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5972c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5973c50d8ae3SPaolo Bonzini { 5974c50d8ae3SPaolo Bonzini bool flush; 5975c50d8ae3SPaolo Bonzini 5976c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5977c50d8ae3SPaolo Bonzini flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false); 5978c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5979c50d8ae3SPaolo Bonzini 5980c50d8ae3SPaolo Bonzini /* 5981c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5982c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5983c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5984c50d8ae3SPaolo Bonzini * dirty_bitmap. 5985c50d8ae3SPaolo Bonzini */ 5986c50d8ae3SPaolo Bonzini if (flush) 59877f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5988c50d8ae3SPaolo Bonzini } 5989c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty); 5990c50d8ae3SPaolo Bonzini 5991c50d8ae3SPaolo Bonzini void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 5992c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5993c50d8ae3SPaolo Bonzini { 5994c50d8ae3SPaolo Bonzini bool flush; 5995c50d8ae3SPaolo Bonzini 5996c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5997c50d8ae3SPaolo Bonzini flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect, 5998c50d8ae3SPaolo Bonzini false); 5999c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6000c50d8ae3SPaolo Bonzini 6001c50d8ae3SPaolo Bonzini if (flush) 60027f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 6003c50d8ae3SPaolo Bonzini } 6004c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access); 6005c50d8ae3SPaolo Bonzini 6006c50d8ae3SPaolo Bonzini void kvm_mmu_slot_set_dirty(struct kvm *kvm, 6007c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 6008c50d8ae3SPaolo Bonzini { 6009c50d8ae3SPaolo Bonzini bool flush; 6010c50d8ae3SPaolo Bonzini 6011c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6012c50d8ae3SPaolo Bonzini flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false); 6013c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6014c50d8ae3SPaolo Bonzini 6015c50d8ae3SPaolo Bonzini if (flush) 60167f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 6017c50d8ae3SPaolo Bonzini } 6018c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty); 6019c50d8ae3SPaolo Bonzini 6020c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 6021c50d8ae3SPaolo Bonzini { 6022c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 6023c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6024c50d8ae3SPaolo Bonzini int ign; 6025c50d8ae3SPaolo Bonzini 6026c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6027c50d8ae3SPaolo Bonzini restart: 6028c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 6029f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 6030c50d8ae3SPaolo Bonzini continue; 6031c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 6032c50d8ae3SPaolo Bonzini goto restart; 6033c50d8ae3SPaolo Bonzini if (cond_resched_lock(&kvm->mmu_lock)) 6034c50d8ae3SPaolo Bonzini goto restart; 6035c50d8ae3SPaolo Bonzini } 6036c50d8ae3SPaolo Bonzini 6037c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 6038c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6039c50d8ae3SPaolo Bonzini } 6040c50d8ae3SPaolo Bonzini 6041c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 6042c50d8ae3SPaolo Bonzini { 6043c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 6044c50d8ae3SPaolo Bonzini 6045c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 6046c50d8ae3SPaolo Bonzini 6047c50d8ae3SPaolo Bonzini /* 6048c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 6049c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 6050c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 6051c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 6052c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 6053c50d8ae3SPaolo Bonzini */ 6054c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 6055c50d8ae3SPaolo Bonzini 6056c50d8ae3SPaolo Bonzini /* 6057c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 6058c50d8ae3SPaolo Bonzini * zap all shadow pages. 6059c50d8ae3SPaolo Bonzini */ 6060c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 6061c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 6062c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6063c50d8ae3SPaolo Bonzini } 6064c50d8ae3SPaolo Bonzini } 6065c50d8ae3SPaolo Bonzini 6066c50d8ae3SPaolo Bonzini static unsigned long 6067c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 6068c50d8ae3SPaolo Bonzini { 6069c50d8ae3SPaolo Bonzini struct kvm *kvm; 6070c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 6071c50d8ae3SPaolo Bonzini unsigned long freed = 0; 6072c50d8ae3SPaolo Bonzini 6073c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6074c50d8ae3SPaolo Bonzini 6075c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6076c50d8ae3SPaolo Bonzini int idx; 6077c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6078c50d8ae3SPaolo Bonzini 6079c50d8ae3SPaolo Bonzini /* 6080c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 6081c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 6082c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 6083c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 6084c50d8ae3SPaolo Bonzini */ 6085c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 6086c50d8ae3SPaolo Bonzini break; 6087c50d8ae3SPaolo Bonzini /* 6088c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 6089c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 6090c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 6091c50d8ae3SPaolo Bonzini * anyway. 6092c50d8ae3SPaolo Bonzini */ 6093c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 6094c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 6095c50d8ae3SPaolo Bonzini continue; 6096c50d8ae3SPaolo Bonzini 6097c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 6098c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6099c50d8ae3SPaolo Bonzini 6100c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 6101c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 6102c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 6103c50d8ae3SPaolo Bonzini goto unlock; 6104c50d8ae3SPaolo Bonzini } 6105c50d8ae3SPaolo Bonzini 6106*ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 6107c50d8ae3SPaolo Bonzini 6108c50d8ae3SPaolo Bonzini unlock: 6109c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6110c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 6111c50d8ae3SPaolo Bonzini 6112c50d8ae3SPaolo Bonzini /* 6113c50d8ae3SPaolo Bonzini * unfair on small ones 6114c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 6115c50d8ae3SPaolo Bonzini * sadness comes quickly 6116c50d8ae3SPaolo Bonzini */ 6117c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 6118c50d8ae3SPaolo Bonzini break; 6119c50d8ae3SPaolo Bonzini } 6120c50d8ae3SPaolo Bonzini 6121c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6122c50d8ae3SPaolo Bonzini return freed; 6123c50d8ae3SPaolo Bonzini } 6124c50d8ae3SPaolo Bonzini 6125c50d8ae3SPaolo Bonzini static unsigned long 6126c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 6127c50d8ae3SPaolo Bonzini { 6128c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 6129c50d8ae3SPaolo Bonzini } 6130c50d8ae3SPaolo Bonzini 6131c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 6132c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 6133c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 6134c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 6135c50d8ae3SPaolo Bonzini }; 6136c50d8ae3SPaolo Bonzini 6137c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 6138c50d8ae3SPaolo Bonzini { 6139c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 6140c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 6141c50d8ae3SPaolo Bonzini } 6142c50d8ae3SPaolo Bonzini 6143c50d8ae3SPaolo Bonzini static void kvm_set_mmio_spte_mask(void) 6144c50d8ae3SPaolo Bonzini { 6145c50d8ae3SPaolo Bonzini u64 mask; 6146c50d8ae3SPaolo Bonzini 6147c50d8ae3SPaolo Bonzini /* 61486129ed87SSean Christopherson * Set a reserved PA bit in MMIO SPTEs to generate page faults with 61496129ed87SSean Christopherson * PFEC.RSVD=1 on MMIO accesses. 64-bit PTEs (PAE, x86-64, and EPT 61506129ed87SSean Christopherson * paging) support a maximum of 52 bits of PA, i.e. if the CPU supports 61516129ed87SSean Christopherson * 52-bit physical addresses then there are no reserved PA bits in the 61526129ed87SSean Christopherson * PTEs and so the reserved PA approach must be disabled. 6153c50d8ae3SPaolo Bonzini */ 61546129ed87SSean Christopherson if (shadow_phys_bits < 52) 61556129ed87SSean Christopherson mask = BIT_ULL(51) | PT_PRESENT_MASK; 61566129ed87SSean Christopherson else 61576129ed87SSean Christopherson mask = 0; 6158c50d8ae3SPaolo Bonzini 6159e7581cacSPaolo Bonzini kvm_mmu_set_mmio_spte_mask(mask, ACC_WRITE_MASK | ACC_USER_MASK); 6160c50d8ae3SPaolo Bonzini } 6161c50d8ae3SPaolo Bonzini 6162c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 6163c50d8ae3SPaolo Bonzini { 6164c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 6165c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 6166c50d8ae3SPaolo Bonzini } 6167c50d8ae3SPaolo Bonzini 6168c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 6169c50d8ae3SPaolo Bonzini { 6170c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 6171c50d8ae3SPaolo Bonzini } 6172c50d8ae3SPaolo Bonzini 6173c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 6174c50d8ae3SPaolo Bonzini { 6175c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 6176c50d8ae3SPaolo Bonzini bool new_val; 6177c50d8ae3SPaolo Bonzini 6178c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 6179c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 6180c50d8ae3SPaolo Bonzini new_val = 0; 6181c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 6182c50d8ae3SPaolo Bonzini new_val = 1; 6183c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 6184c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 6185c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 6186c50d8ae3SPaolo Bonzini return -EINVAL; 6187c50d8ae3SPaolo Bonzini 6188c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 6189c50d8ae3SPaolo Bonzini 6190c50d8ae3SPaolo Bonzini if (new_val != old_val) { 6191c50d8ae3SPaolo Bonzini struct kvm *kvm; 6192c50d8ae3SPaolo Bonzini 6193c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6194c50d8ae3SPaolo Bonzini 6195c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6196c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 6197c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6198c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 6199c50d8ae3SPaolo Bonzini 6200c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6201c50d8ae3SPaolo Bonzini } 6202c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6203c50d8ae3SPaolo Bonzini } 6204c50d8ae3SPaolo Bonzini 6205c50d8ae3SPaolo Bonzini return 0; 6206c50d8ae3SPaolo Bonzini } 6207c50d8ae3SPaolo Bonzini 6208c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 6209c50d8ae3SPaolo Bonzini { 6210c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 6211c50d8ae3SPaolo Bonzini 6212c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 6213c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 6214c50d8ae3SPaolo Bonzini 6215c50d8ae3SPaolo Bonzini /* 6216c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 6217c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 6218c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 6219c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 6220c50d8ae3SPaolo Bonzini */ 6221c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 6222c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 6223c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 6224c50d8ae3SPaolo Bonzini 6225c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 6226c50d8ae3SPaolo Bonzini 6227c50d8ae3SPaolo Bonzini kvm_set_mmio_spte_mask(); 6228c50d8ae3SPaolo Bonzini 6229c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 6230c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 6231c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6232c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 6233c50d8ae3SPaolo Bonzini goto out; 6234c50d8ae3SPaolo Bonzini 6235c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 6236c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 6237c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6238c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 6239c50d8ae3SPaolo Bonzini goto out; 6240c50d8ae3SPaolo Bonzini 6241c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 6242c50d8ae3SPaolo Bonzini goto out; 6243c50d8ae3SPaolo Bonzini 6244c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6245c50d8ae3SPaolo Bonzini if (ret) 6246c50d8ae3SPaolo Bonzini goto out; 6247c50d8ae3SPaolo Bonzini 6248c50d8ae3SPaolo Bonzini return 0; 6249c50d8ae3SPaolo Bonzini 6250c50d8ae3SPaolo Bonzini out: 6251c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6252c50d8ae3SPaolo Bonzini return ret; 6253c50d8ae3SPaolo Bonzini } 6254c50d8ae3SPaolo Bonzini 6255c50d8ae3SPaolo Bonzini /* 6256c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 6257c50d8ae3SPaolo Bonzini */ 6258c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 6259c50d8ae3SPaolo Bonzini { 6260c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 6261c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 6262c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 6263c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 6264c50d8ae3SPaolo Bonzini int i; 6265c50d8ae3SPaolo Bonzini 6266c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 6267c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 6268c50d8ae3SPaolo Bonzini 6269c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 6270c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 6271c50d8ae3SPaolo Bonzini } 6272c50d8ae3SPaolo Bonzini 6273c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 6274c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 6275c50d8ae3SPaolo Bonzini 6276c50d8ae3SPaolo Bonzini return nr_mmu_pages; 6277c50d8ae3SPaolo Bonzini } 6278c50d8ae3SPaolo Bonzini 6279c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6280c50d8ae3SPaolo Bonzini { 6281c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6282c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6283c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6284c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6285c50d8ae3SPaolo Bonzini } 6286c50d8ae3SPaolo Bonzini 6287c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6288c50d8ae3SPaolo Bonzini { 6289c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6290c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6291c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6292c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6293c50d8ae3SPaolo Bonzini } 6294c50d8ae3SPaolo Bonzini 6295c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 6296c50d8ae3SPaolo Bonzini { 6297c50d8ae3SPaolo Bonzini unsigned int old_val; 6298c50d8ae3SPaolo Bonzini int err; 6299c50d8ae3SPaolo Bonzini 6300c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 6301c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6302c50d8ae3SPaolo Bonzini if (err) 6303c50d8ae3SPaolo Bonzini return err; 6304c50d8ae3SPaolo Bonzini 6305c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 6306c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 6307c50d8ae3SPaolo Bonzini struct kvm *kvm; 6308c50d8ae3SPaolo Bonzini 6309c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6310c50d8ae3SPaolo Bonzini 6311c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6312c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6313c50d8ae3SPaolo Bonzini 6314c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6315c50d8ae3SPaolo Bonzini } 6316c50d8ae3SPaolo Bonzini 6317c50d8ae3SPaolo Bonzini return err; 6318c50d8ae3SPaolo Bonzini } 6319c50d8ae3SPaolo Bonzini 6320c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6321c50d8ae3SPaolo Bonzini { 6322c50d8ae3SPaolo Bonzini int rcu_idx; 6323c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6324c50d8ae3SPaolo Bonzini unsigned int ratio; 6325c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6326c50d8ae3SPaolo Bonzini ulong to_zap; 6327c50d8ae3SPaolo Bonzini 6328c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6329c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6330c50d8ae3SPaolo Bonzini 6331c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6332c50d8ae3SPaolo Bonzini to_zap = ratio ? DIV_ROUND_UP(kvm->stat.nx_lpage_splits, ratio) : 0; 6333c50d8ae3SPaolo Bonzini while (to_zap && !list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) { 6334c50d8ae3SPaolo Bonzini /* 6335c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6336c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6337c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6338c50d8ae3SPaolo Bonzini */ 6339c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6340c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6341c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6342c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6343c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6344c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 6345c50d8ae3SPaolo Bonzini 6346c50d8ae3SPaolo Bonzini if (!--to_zap || need_resched() || spin_needbreak(&kvm->mmu_lock)) { 6347c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 6348c50d8ae3SPaolo Bonzini if (to_zap) 6349c50d8ae3SPaolo Bonzini cond_resched_lock(&kvm->mmu_lock); 6350c50d8ae3SPaolo Bonzini } 6351c50d8ae3SPaolo Bonzini } 6352c50d8ae3SPaolo Bonzini 6353c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6354c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6355c50d8ae3SPaolo Bonzini } 6356c50d8ae3SPaolo Bonzini 6357c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6358c50d8ae3SPaolo Bonzini { 6359c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6360c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6361c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6362c50d8ae3SPaolo Bonzini } 6363c50d8ae3SPaolo Bonzini 6364c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6365c50d8ae3SPaolo Bonzini { 6366c50d8ae3SPaolo Bonzini u64 start_time; 6367c50d8ae3SPaolo Bonzini long remaining_time; 6368c50d8ae3SPaolo Bonzini 6369c50d8ae3SPaolo Bonzini while (true) { 6370c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6371c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6372c50d8ae3SPaolo Bonzini 6373c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6374c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6375c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6376c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6377c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6378c50d8ae3SPaolo Bonzini } 6379c50d8ae3SPaolo Bonzini 6380c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6381c50d8ae3SPaolo Bonzini 6382c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6383c50d8ae3SPaolo Bonzini return 0; 6384c50d8ae3SPaolo Bonzini 6385c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6386c50d8ae3SPaolo Bonzini } 6387c50d8ae3SPaolo Bonzini } 6388c50d8ae3SPaolo Bonzini 6389c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6390c50d8ae3SPaolo Bonzini { 6391c50d8ae3SPaolo Bonzini int err; 6392c50d8ae3SPaolo Bonzini 6393c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6394c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6395c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6396c50d8ae3SPaolo Bonzini if (!err) 6397c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6398c50d8ae3SPaolo Bonzini 6399c50d8ae3SPaolo Bonzini return err; 6400c50d8ae3SPaolo Bonzini } 6401c50d8ae3SPaolo Bonzini 6402c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6403c50d8ae3SPaolo Bonzini { 6404c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6405c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6406c50d8ae3SPaolo Bonzini } 6407