1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 57c50d8ae3SPaolo Bonzini 58c50d8ae3SPaolo Bonzini static int __read_mostly nx_huge_pages = -1; 59c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 60c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 61c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 62c50d8ae3SPaolo Bonzini #else 63c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 64c50d8ae3SPaolo Bonzini #endif 65c50d8ae3SPaolo Bonzini 66c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 67c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 68c50d8ae3SPaolo Bonzini 69d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 70c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 71c50d8ae3SPaolo Bonzini .get = param_get_bool, 72c50d8ae3SPaolo Bonzini }; 73c50d8ae3SPaolo Bonzini 74d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 75c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 76c50d8ae3SPaolo Bonzini .get = param_get_uint, 77c50d8ae3SPaolo Bonzini }; 78c50d8ae3SPaolo Bonzini 79c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 80c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 81c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 82c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 83c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 84c50d8ae3SPaolo Bonzini 8571fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8671fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8771fe7013SSean Christopherson 88c50d8ae3SPaolo Bonzini /* 89c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 90c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 91c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 92c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 93c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 94c50d8ae3SPaolo Bonzini */ 95c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 96c50d8ae3SPaolo Bonzini 971d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 9883013059SSean Christopherson static int max_tdp_level __read_mostly; 99703c335dSSean Christopherson 100c50d8ae3SPaolo Bonzini enum { 101c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 102c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 103c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 104c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 105c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 106c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 107c50d8ae3SPaolo Bonzini }; 108c50d8ae3SPaolo Bonzini 109c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1105a9624afSPaolo Bonzini bool dbg = 0; 111c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 112c50d8ae3SPaolo Bonzini #endif 113c50d8ae3SPaolo Bonzini 114c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 115c50d8ae3SPaolo Bonzini 116c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 117c50d8ae3SPaolo Bonzini 118c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 119c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 120c50d8ae3SPaolo Bonzini 121c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 122c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 123c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 124c50d8ae3SPaolo Bonzini 125c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 126c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 127c50d8ae3SPaolo Bonzini 128c50d8ae3SPaolo Bonzini 129c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 130c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 131c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 132c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 133c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 134c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 135c50d8ae3SPaolo Bonzini 136c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 137c50d8ae3SPaolo Bonzini 138c50d8ae3SPaolo Bonzini /* make pte_list_desc fit well in cache line */ 139c50d8ae3SPaolo Bonzini #define PTE_LIST_EXT 3 140c50d8ae3SPaolo Bonzini 141c50d8ae3SPaolo Bonzini struct pte_list_desc { 142c50d8ae3SPaolo Bonzini u64 *sptes[PTE_LIST_EXT]; 143c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 144c50d8ae3SPaolo Bonzini }; 145c50d8ae3SPaolo Bonzini 146c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 147c50d8ae3SPaolo Bonzini u64 addr; 148c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 149c50d8ae3SPaolo Bonzini u64 *sptep; 150c50d8ae3SPaolo Bonzini int level; 151c50d8ae3SPaolo Bonzini unsigned index; 152c50d8ae3SPaolo Bonzini }; 153c50d8ae3SPaolo Bonzini 154c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 155c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 156c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 157c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 158c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 159c50d8ae3SPaolo Bonzini 160c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 161c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 162c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 163c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 164c50d8ae3SPaolo Bonzini 165c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 166c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 167c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 168c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 169c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 170c50d8ae3SPaolo Bonzini 171c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 17202c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 173c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 174c50d8ae3SPaolo Bonzini 175c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 176c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 177c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 178c50d8ae3SPaolo Bonzini 179c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 180c50d8ae3SPaolo Bonzini #include "mmutrace.h" 181c50d8ae3SPaolo Bonzini 182c50d8ae3SPaolo Bonzini 183c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 184c50d8ae3SPaolo Bonzini { 185afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 186c50d8ae3SPaolo Bonzini } 187c50d8ae3SPaolo Bonzini 188c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 189c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 190c50d8ae3SPaolo Bonzini { 191c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 192c50d8ae3SPaolo Bonzini 193afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 194b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 195c50d8ae3SPaolo Bonzini 196c50d8ae3SPaolo Bonzini if (ret) 197c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 198c50d8ae3SPaolo Bonzini } 199c50d8ae3SPaolo Bonzini 2002f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 201c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 202c50d8ae3SPaolo Bonzini { 203c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 204c50d8ae3SPaolo Bonzini 205c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 206c50d8ae3SPaolo Bonzini range.pages = pages; 207c50d8ae3SPaolo Bonzini 208c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 209c50d8ae3SPaolo Bonzini } 210c50d8ae3SPaolo Bonzini 2115a9624afSPaolo Bonzini bool is_nx_huge_page_enabled(void) 212c50d8ae3SPaolo Bonzini { 213c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages); 214c50d8ae3SPaolo Bonzini } 215c50d8ae3SPaolo Bonzini 2168f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2178f79b064SBen Gardon unsigned int access) 2188f79b064SBen Gardon { 219c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 2208f79b064SBen Gardon 221c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 222c236d962SSean Christopherson mmu_spte_set(sptep, spte); 223c50d8ae3SPaolo Bonzini } 224c50d8ae3SPaolo Bonzini 225c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 226c50d8ae3SPaolo Bonzini { 227c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 228c50d8ae3SPaolo Bonzini 2298a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 230c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 231c50d8ae3SPaolo Bonzini 232c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 233c50d8ae3SPaolo Bonzini } 234c50d8ae3SPaolo Bonzini 235c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 236c50d8ae3SPaolo Bonzini { 237c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 238c50d8ae3SPaolo Bonzini } 239c50d8ae3SPaolo Bonzini 240c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 241c50d8ae3SPaolo Bonzini { 242c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 243c50d8ae3SPaolo Bonzini 244c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 245c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 246c50d8ae3SPaolo Bonzini return false; 247c50d8ae3SPaolo Bonzini 248c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 249c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 250c50d8ae3SPaolo Bonzini 251c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 252c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 253c50d8ae3SPaolo Bonzini } 254c50d8ae3SPaolo Bonzini 255cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 256cd313569SMohammed Gamal struct x86_exception *exception) 257cd313569SMohammed Gamal { 258ec7771abSMohammed Gamal /* Check if guest physical address doesn't exceed guest maximum */ 259dc46515cSSean Christopherson if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) { 260ec7771abSMohammed Gamal exception->error_code |= PFERR_RSVD_MASK; 261ec7771abSMohammed Gamal return UNMAPPED_GVA; 262ec7771abSMohammed Gamal } 263ec7771abSMohammed Gamal 264cd313569SMohammed Gamal return gpa; 265cd313569SMohammed Gamal } 266cd313569SMohammed Gamal 267c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 268c50d8ae3SPaolo Bonzini { 269c50d8ae3SPaolo Bonzini return 1; 270c50d8ae3SPaolo Bonzini } 271c50d8ae3SPaolo Bonzini 272c50d8ae3SPaolo Bonzini static int is_nx(struct kvm_vcpu *vcpu) 273c50d8ae3SPaolo Bonzini { 274c50d8ae3SPaolo Bonzini return vcpu->arch.efer & EFER_NX; 275c50d8ae3SPaolo Bonzini } 276c50d8ae3SPaolo Bonzini 277c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 278c50d8ae3SPaolo Bonzini { 279c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 280c50d8ae3SPaolo Bonzini 281c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 282c50d8ae3SPaolo Bonzini } 283c50d8ae3SPaolo Bonzini 284c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 285c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 286c50d8ae3SPaolo Bonzini { 287c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 288c50d8ae3SPaolo Bonzini } 289c50d8ae3SPaolo Bonzini 290c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 291c50d8ae3SPaolo Bonzini { 292c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 293c50d8ae3SPaolo Bonzini } 294c50d8ae3SPaolo Bonzini 295c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 296c50d8ae3SPaolo Bonzini { 297c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 298c50d8ae3SPaolo Bonzini } 299c50d8ae3SPaolo Bonzini 300c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 301c50d8ae3SPaolo Bonzini { 302c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 303c50d8ae3SPaolo Bonzini } 304c50d8ae3SPaolo Bonzini #else 305c50d8ae3SPaolo Bonzini union split_spte { 306c50d8ae3SPaolo Bonzini struct { 307c50d8ae3SPaolo Bonzini u32 spte_low; 308c50d8ae3SPaolo Bonzini u32 spte_high; 309c50d8ae3SPaolo Bonzini }; 310c50d8ae3SPaolo Bonzini u64 spte; 311c50d8ae3SPaolo Bonzini }; 312c50d8ae3SPaolo Bonzini 313c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 314c50d8ae3SPaolo Bonzini { 31557354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 316c50d8ae3SPaolo Bonzini 317c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 318c50d8ae3SPaolo Bonzini return; 319c50d8ae3SPaolo Bonzini 320c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 321c50d8ae3SPaolo Bonzini smp_wmb(); 322c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 323c50d8ae3SPaolo Bonzini } 324c50d8ae3SPaolo Bonzini 325c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 326c50d8ae3SPaolo Bonzini { 327c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 328c50d8ae3SPaolo Bonzini 329c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 330c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 331c50d8ae3SPaolo Bonzini 332c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 333c50d8ae3SPaolo Bonzini 334c50d8ae3SPaolo Bonzini /* 335c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 336c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 337c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 338c50d8ae3SPaolo Bonzini */ 339c50d8ae3SPaolo Bonzini smp_wmb(); 340c50d8ae3SPaolo Bonzini 341c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 342c50d8ae3SPaolo Bonzini } 343c50d8ae3SPaolo Bonzini 344c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 345c50d8ae3SPaolo Bonzini { 346c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 347c50d8ae3SPaolo Bonzini 348c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 349c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 350c50d8ae3SPaolo Bonzini 351c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 352c50d8ae3SPaolo Bonzini 353c50d8ae3SPaolo Bonzini /* 354c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 355c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 356c50d8ae3SPaolo Bonzini */ 357c50d8ae3SPaolo Bonzini smp_wmb(); 358c50d8ae3SPaolo Bonzini 359c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 360c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 361c50d8ae3SPaolo Bonzini } 362c50d8ae3SPaolo Bonzini 363c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 364c50d8ae3SPaolo Bonzini { 365c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 366c50d8ae3SPaolo Bonzini 367c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 368c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 369c50d8ae3SPaolo Bonzini 370c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 371c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 372c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 373c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 374c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 375c50d8ae3SPaolo Bonzini 376c50d8ae3SPaolo Bonzini return orig.spte; 377c50d8ae3SPaolo Bonzini } 378c50d8ae3SPaolo Bonzini 379c50d8ae3SPaolo Bonzini /* 380c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 381c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 382c50d8ae3SPaolo Bonzini * 383c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 384c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 385c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 386c50d8ae3SPaolo Bonzini * 387c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 388c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 389c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 390c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 391c50d8ae3SPaolo Bonzini * 392c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 393c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 394c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 395c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 396c50d8ae3SPaolo Bonzini */ 397c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 398c50d8ae3SPaolo Bonzini { 39957354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 400c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 401c50d8ae3SPaolo Bonzini int count; 402c50d8ae3SPaolo Bonzini 403c50d8ae3SPaolo Bonzini retry: 404c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 405c50d8ae3SPaolo Bonzini smp_rmb(); 406c50d8ae3SPaolo Bonzini 407c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 408c50d8ae3SPaolo Bonzini smp_rmb(); 409c50d8ae3SPaolo Bonzini 410c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 411c50d8ae3SPaolo Bonzini smp_rmb(); 412c50d8ae3SPaolo Bonzini 413c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 414c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 415c50d8ae3SPaolo Bonzini goto retry; 416c50d8ae3SPaolo Bonzini 417c50d8ae3SPaolo Bonzini return spte.spte; 418c50d8ae3SPaolo Bonzini } 419c50d8ae3SPaolo Bonzini #endif 420c50d8ae3SPaolo Bonzini 421c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 422c50d8ae3SPaolo Bonzini { 423c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 424c50d8ae3SPaolo Bonzini return false; 425c50d8ae3SPaolo Bonzini 426c50d8ae3SPaolo Bonzini /* 427c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 428c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 429c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 430c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 431c50d8ae3SPaolo Bonzini */ 432c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 433c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 434c50d8ae3SPaolo Bonzini return true; 435c50d8ae3SPaolo Bonzini 436c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 437c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 438c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 439c50d8ae3SPaolo Bonzini return true; 440c50d8ae3SPaolo Bonzini } 441c50d8ae3SPaolo Bonzini 442c50d8ae3SPaolo Bonzini return false; 443c50d8ae3SPaolo Bonzini } 444c50d8ae3SPaolo Bonzini 445c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 446c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 447c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 448c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 449c50d8ae3SPaolo Bonzini * the spte. 450c50d8ae3SPaolo Bonzini */ 451c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 452c50d8ae3SPaolo Bonzini { 453c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 454c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 455c50d8ae3SPaolo Bonzini } 456c50d8ae3SPaolo Bonzini 457c50d8ae3SPaolo Bonzini /* 458c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 459c50d8ae3SPaolo Bonzini * accessed/dirty status. 460c50d8ae3SPaolo Bonzini */ 461c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 462c50d8ae3SPaolo Bonzini { 463c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 464c50d8ae3SPaolo Bonzini 465c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 466c50d8ae3SPaolo Bonzini 467c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 468c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 469c50d8ae3SPaolo Bonzini return old_spte; 470c50d8ae3SPaolo Bonzini } 471c50d8ae3SPaolo Bonzini 472c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 473c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 474c50d8ae3SPaolo Bonzini else 475c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 476c50d8ae3SPaolo Bonzini 477c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 478c50d8ae3SPaolo Bonzini 479c50d8ae3SPaolo Bonzini return old_spte; 480c50d8ae3SPaolo Bonzini } 481c50d8ae3SPaolo Bonzini 482c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 483c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 484c50d8ae3SPaolo Bonzini * 485c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 486c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 487c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 488c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 489c50d8ae3SPaolo Bonzini * case. 490c50d8ae3SPaolo Bonzini * 491c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 492c50d8ae3SPaolo Bonzini */ 493c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 494c50d8ae3SPaolo Bonzini { 495c50d8ae3SPaolo Bonzini bool flush = false; 496c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 497c50d8ae3SPaolo Bonzini 498c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 499c50d8ae3SPaolo Bonzini return false; 500c50d8ae3SPaolo Bonzini 501c50d8ae3SPaolo Bonzini /* 502c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 503c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 504c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 505c50d8ae3SPaolo Bonzini */ 506c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 507c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 508c50d8ae3SPaolo Bonzini flush = true; 509c50d8ae3SPaolo Bonzini 510c50d8ae3SPaolo Bonzini /* 511c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 512c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 513c50d8ae3SPaolo Bonzini */ 514c50d8ae3SPaolo Bonzini 515c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 516c50d8ae3SPaolo Bonzini flush = true; 517c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 518c50d8ae3SPaolo Bonzini } 519c50d8ae3SPaolo Bonzini 520c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 521c50d8ae3SPaolo Bonzini flush = true; 522c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 523c50d8ae3SPaolo Bonzini } 524c50d8ae3SPaolo Bonzini 525c50d8ae3SPaolo Bonzini return flush; 526c50d8ae3SPaolo Bonzini } 527c50d8ae3SPaolo Bonzini 528c50d8ae3SPaolo Bonzini /* 529c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 530c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 531c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 532c50d8ae3SPaolo Bonzini * Returns non-zero if the PTE was previously valid. 533c50d8ae3SPaolo Bonzini */ 534c50d8ae3SPaolo Bonzini static int mmu_spte_clear_track_bits(u64 *sptep) 535c50d8ae3SPaolo Bonzini { 536c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 537c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 538c50d8ae3SPaolo Bonzini 539c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 540c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 541c50d8ae3SPaolo Bonzini else 542c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 543c50d8ae3SPaolo Bonzini 544c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 545c50d8ae3SPaolo Bonzini return 0; 546c50d8ae3SPaolo Bonzini 547c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 548c50d8ae3SPaolo Bonzini 549c50d8ae3SPaolo Bonzini /* 550c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 551c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 552c50d8ae3SPaolo Bonzini * unmap it from mmu first. 553c50d8ae3SPaolo Bonzini */ 554c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 555c50d8ae3SPaolo Bonzini 556c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 557c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 558c50d8ae3SPaolo Bonzini 559c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 560c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 561c50d8ae3SPaolo Bonzini 562c50d8ae3SPaolo Bonzini return 1; 563c50d8ae3SPaolo Bonzini } 564c50d8ae3SPaolo Bonzini 565c50d8ae3SPaolo Bonzini /* 566c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 567c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 568c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 569c50d8ae3SPaolo Bonzini */ 570c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 571c50d8ae3SPaolo Bonzini { 572c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 573c50d8ae3SPaolo Bonzini } 574c50d8ae3SPaolo Bonzini 575c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 576c50d8ae3SPaolo Bonzini { 577c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 578c50d8ae3SPaolo Bonzini } 579c50d8ae3SPaolo Bonzini 580c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 581c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 582c50d8ae3SPaolo Bonzini { 583c50d8ae3SPaolo Bonzini u64 new_spte = spte; 5848a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 5858a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 586c50d8ae3SPaolo Bonzini 587c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 588c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 589c50d8ae3SPaolo Bonzini 590c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 5918a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 5928a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 593c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 594c50d8ae3SPaolo Bonzini 595c50d8ae3SPaolo Bonzini return new_spte; 596c50d8ae3SPaolo Bonzini } 597c50d8ae3SPaolo Bonzini 598c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 599c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 600c50d8ae3SPaolo Bonzini { 601c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 602c50d8ae3SPaolo Bonzini 603c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 604c50d8ae3SPaolo Bonzini return false; 605c50d8ae3SPaolo Bonzini 606c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 607c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 608c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 609c50d8ae3SPaolo Bonzini } else { 610c50d8ae3SPaolo Bonzini /* 611c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 612c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 613c50d8ae3SPaolo Bonzini */ 614c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 615c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 616c50d8ae3SPaolo Bonzini 617c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 618c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 619c50d8ae3SPaolo Bonzini } 620c50d8ae3SPaolo Bonzini 621c50d8ae3SPaolo Bonzini return true; 622c50d8ae3SPaolo Bonzini } 623c50d8ae3SPaolo Bonzini 624c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 625c50d8ae3SPaolo Bonzini { 626c50d8ae3SPaolo Bonzini /* 627c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 628c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 629c50d8ae3SPaolo Bonzini */ 630c50d8ae3SPaolo Bonzini local_irq_disable(); 631c50d8ae3SPaolo Bonzini 632c50d8ae3SPaolo Bonzini /* 633c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 634c50d8ae3SPaolo Bonzini * to vcpu->mode. 635c50d8ae3SPaolo Bonzini */ 636c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 637c50d8ae3SPaolo Bonzini } 638c50d8ae3SPaolo Bonzini 639c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 640c50d8ae3SPaolo Bonzini { 641c50d8ae3SPaolo Bonzini /* 642c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 643c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 644c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 645c50d8ae3SPaolo Bonzini */ 646c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 647c50d8ae3SPaolo Bonzini local_irq_enable(); 648c50d8ae3SPaolo Bonzini } 649c50d8ae3SPaolo Bonzini 650378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 651c50d8ae3SPaolo Bonzini { 652c50d8ae3SPaolo Bonzini int r; 653c50d8ae3SPaolo Bonzini 654531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 65594ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 656531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 657c50d8ae3SPaolo Bonzini if (r) 658c50d8ae3SPaolo Bonzini return r; 65994ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 660171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 661171a90d7SSean Christopherson if (r) 662171a90d7SSean Christopherson return r; 663378f5cd6SSean Christopherson if (maybe_indirect) { 66494ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 665171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 666c50d8ae3SPaolo Bonzini if (r) 667c50d8ae3SPaolo Bonzini return r; 668378f5cd6SSean Christopherson } 66994ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 670531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 671c50d8ae3SPaolo Bonzini } 672c50d8ae3SPaolo Bonzini 673c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 674c50d8ae3SPaolo Bonzini { 67594ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 67694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 67794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 67894ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 679c50d8ae3SPaolo Bonzini } 680c50d8ae3SPaolo Bonzini 681c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 682c50d8ae3SPaolo Bonzini { 68394ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 684c50d8ae3SPaolo Bonzini } 685c50d8ae3SPaolo Bonzini 686c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 687c50d8ae3SPaolo Bonzini { 688c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 689c50d8ae3SPaolo Bonzini } 690c50d8ae3SPaolo Bonzini 691c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 692c50d8ae3SPaolo Bonzini { 693c50d8ae3SPaolo Bonzini if (!sp->role.direct) 694c50d8ae3SPaolo Bonzini return sp->gfns[index]; 695c50d8ae3SPaolo Bonzini 696c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 697c50d8ae3SPaolo Bonzini } 698c50d8ae3SPaolo Bonzini 699c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 700c50d8ae3SPaolo Bonzini { 701c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 702c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 703c50d8ae3SPaolo Bonzini return; 704c50d8ae3SPaolo Bonzini } 705c50d8ae3SPaolo Bonzini 706c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 707c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 708c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 709c50d8ae3SPaolo Bonzini sp->gfn, 710c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 711c50d8ae3SPaolo Bonzini } 712c50d8ae3SPaolo Bonzini 713c50d8ae3SPaolo Bonzini /* 714c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 715c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 716c50d8ae3SPaolo Bonzini */ 717c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 718c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 719c50d8ae3SPaolo Bonzini int level) 720c50d8ae3SPaolo Bonzini { 721c50d8ae3SPaolo Bonzini unsigned long idx; 722c50d8ae3SPaolo Bonzini 723c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 724c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 725c50d8ae3SPaolo Bonzini } 726c50d8ae3SPaolo Bonzini 727c50d8ae3SPaolo Bonzini static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot, 728c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 729c50d8ae3SPaolo Bonzini { 730c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 731c50d8ae3SPaolo Bonzini int i; 732c50d8ae3SPaolo Bonzini 7333bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 734c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 735c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 736c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 737c50d8ae3SPaolo Bonzini } 738c50d8ae3SPaolo Bonzini } 739c50d8ae3SPaolo Bonzini 740c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 741c50d8ae3SPaolo Bonzini { 742c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 743c50d8ae3SPaolo Bonzini } 744c50d8ae3SPaolo Bonzini 745c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 746c50d8ae3SPaolo Bonzini { 747c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 748c50d8ae3SPaolo Bonzini } 749c50d8ae3SPaolo Bonzini 750c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 751c50d8ae3SPaolo Bonzini { 752c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 753c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 754c50d8ae3SPaolo Bonzini gfn_t gfn; 755c50d8ae3SPaolo Bonzini 756c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 757c50d8ae3SPaolo Bonzini gfn = sp->gfn; 758c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 759c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 760c50d8ae3SPaolo Bonzini 761c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 7623bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 763c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 764c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 765c50d8ae3SPaolo Bonzini 766c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 767c50d8ae3SPaolo Bonzini } 768c50d8ae3SPaolo Bonzini 76929cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 770c50d8ae3SPaolo Bonzini { 771c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 772c50d8ae3SPaolo Bonzini return; 773c50d8ae3SPaolo Bonzini 774c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 775c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 776c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 777c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 778c50d8ae3SPaolo Bonzini } 779c50d8ae3SPaolo Bonzini 780c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 781c50d8ae3SPaolo Bonzini { 782c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 783c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 784c50d8ae3SPaolo Bonzini gfn_t gfn; 785c50d8ae3SPaolo Bonzini 786c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 787c50d8ae3SPaolo Bonzini gfn = sp->gfn; 788c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 789c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 7903bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 791c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 792c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 793c50d8ae3SPaolo Bonzini 794c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 795c50d8ae3SPaolo Bonzini } 796c50d8ae3SPaolo Bonzini 79729cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 798c50d8ae3SPaolo Bonzini { 799c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 800c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 801c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 802c50d8ae3SPaolo Bonzini } 803c50d8ae3SPaolo Bonzini 804c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 805c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 806c50d8ae3SPaolo Bonzini bool no_dirty_log) 807c50d8ae3SPaolo Bonzini { 808c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 809c50d8ae3SPaolo Bonzini 810c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 81191b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 81291b0d268SPaolo Bonzini return NULL; 813044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 81491b0d268SPaolo Bonzini return NULL; 815c50d8ae3SPaolo Bonzini 816c50d8ae3SPaolo Bonzini return slot; 817c50d8ae3SPaolo Bonzini } 818c50d8ae3SPaolo Bonzini 819c50d8ae3SPaolo Bonzini /* 820c50d8ae3SPaolo Bonzini * About rmap_head encoding: 821c50d8ae3SPaolo Bonzini * 822c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 823c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 824c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 825c50d8ae3SPaolo Bonzini */ 826c50d8ae3SPaolo Bonzini 827c50d8ae3SPaolo Bonzini /* 828c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 829c50d8ae3SPaolo Bonzini */ 830c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 831c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 832c50d8ae3SPaolo Bonzini { 833c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 834c50d8ae3SPaolo Bonzini int i, count = 0; 835c50d8ae3SPaolo Bonzini 836c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 837805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 838c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 839c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 840805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 841c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 842c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 843c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 844c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 845c50d8ae3SPaolo Bonzini ++count; 846c50d8ae3SPaolo Bonzini } else { 847805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 848c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 849c6c4f961SLi RongQing while (desc->sptes[PTE_LIST_EXT-1]) { 850c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 851c6c4f961SLi RongQing 852c6c4f961SLi RongQing if (!desc->more) { 853c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 854c50d8ae3SPaolo Bonzini desc = desc->more; 855c6c4f961SLi RongQing break; 856c6c4f961SLi RongQing } 857c6c4f961SLi RongQing desc = desc->more; 858c50d8ae3SPaolo Bonzini } 859c50d8ae3SPaolo Bonzini for (i = 0; desc->sptes[i]; ++i) 860c50d8ae3SPaolo Bonzini ++count; 861c50d8ae3SPaolo Bonzini desc->sptes[i] = spte; 862c50d8ae3SPaolo Bonzini } 863c50d8ae3SPaolo Bonzini return count; 864c50d8ae3SPaolo Bonzini } 865c50d8ae3SPaolo Bonzini 866c50d8ae3SPaolo Bonzini static void 867c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 868c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 869c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 870c50d8ae3SPaolo Bonzini { 871c50d8ae3SPaolo Bonzini int j; 872c50d8ae3SPaolo Bonzini 873c50d8ae3SPaolo Bonzini for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) 874c50d8ae3SPaolo Bonzini ; 875c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 876c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 877c50d8ae3SPaolo Bonzini if (j != 0) 878c50d8ae3SPaolo Bonzini return; 879c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 880fe3c2b4cSMiaohe Lin rmap_head->val = 0; 881c50d8ae3SPaolo Bonzini else 882c50d8ae3SPaolo Bonzini if (prev_desc) 883c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 884c50d8ae3SPaolo Bonzini else 885c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 886c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 887c50d8ae3SPaolo Bonzini } 888c50d8ae3SPaolo Bonzini 889c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 890c50d8ae3SPaolo Bonzini { 891c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 892c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 893c50d8ae3SPaolo Bonzini int i; 894c50d8ae3SPaolo Bonzini 895c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 896c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 897c50d8ae3SPaolo Bonzini BUG(); 898c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 899805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 900c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 901c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 902c50d8ae3SPaolo Bonzini BUG(); 903c50d8ae3SPaolo Bonzini } 904c50d8ae3SPaolo Bonzini rmap_head->val = 0; 905c50d8ae3SPaolo Bonzini } else { 906805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 907c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 908c50d8ae3SPaolo Bonzini prev_desc = NULL; 909c50d8ae3SPaolo Bonzini while (desc) { 910c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { 911c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 912c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 913c50d8ae3SPaolo Bonzini desc, i, prev_desc); 914c50d8ae3SPaolo Bonzini return; 915c50d8ae3SPaolo Bonzini } 916c50d8ae3SPaolo Bonzini } 917c50d8ae3SPaolo Bonzini prev_desc = desc; 918c50d8ae3SPaolo Bonzini desc = desc->more; 919c50d8ae3SPaolo Bonzini } 920c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 921c50d8ae3SPaolo Bonzini BUG(); 922c50d8ae3SPaolo Bonzini } 923c50d8ae3SPaolo Bonzini } 924c50d8ae3SPaolo Bonzini 925c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 926c50d8ae3SPaolo Bonzini { 927c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 928c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 929c50d8ae3SPaolo Bonzini } 930c50d8ae3SPaolo Bonzini 931c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 932c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot) 933c50d8ae3SPaolo Bonzini { 934c50d8ae3SPaolo Bonzini unsigned long idx; 935c50d8ae3SPaolo Bonzini 936c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 9373bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 938c50d8ae3SPaolo Bonzini } 939c50d8ae3SPaolo Bonzini 940c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 941c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 942c50d8ae3SPaolo Bonzini { 943c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 944c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 945c50d8ae3SPaolo Bonzini 946c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 947c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 948c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 949c50d8ae3SPaolo Bonzini } 950c50d8ae3SPaolo Bonzini 951c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 952c50d8ae3SPaolo Bonzini { 953356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 954c50d8ae3SPaolo Bonzini 955356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 95694ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 957c50d8ae3SPaolo Bonzini } 958c50d8ae3SPaolo Bonzini 959c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 960c50d8ae3SPaolo Bonzini { 961c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 962c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 963c50d8ae3SPaolo Bonzini 96457354682SSean Christopherson sp = sptep_to_sp(spte); 965c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 966c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 967c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 968c50d8ae3SPaolo Bonzini } 969c50d8ae3SPaolo Bonzini 970c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 971c50d8ae3SPaolo Bonzini { 972c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 973c50d8ae3SPaolo Bonzini gfn_t gfn; 974c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 975c50d8ae3SPaolo Bonzini 97657354682SSean Christopherson sp = sptep_to_sp(spte); 977c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 978c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 979c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 980c50d8ae3SPaolo Bonzini } 981c50d8ae3SPaolo Bonzini 982c50d8ae3SPaolo Bonzini /* 983c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 984c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 985c50d8ae3SPaolo Bonzini */ 986c50d8ae3SPaolo Bonzini struct rmap_iterator { 987c50d8ae3SPaolo Bonzini /* private fields */ 988c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 989c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 990c50d8ae3SPaolo Bonzini }; 991c50d8ae3SPaolo Bonzini 992c50d8ae3SPaolo Bonzini /* 993c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 994c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 9950a03cbdaSMiaohe Lin * information in the iterator may not be valid. 996c50d8ae3SPaolo Bonzini * 997c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 998c50d8ae3SPaolo Bonzini */ 999c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1000c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1001c50d8ae3SPaolo Bonzini { 1002c50d8ae3SPaolo Bonzini u64 *sptep; 1003c50d8ae3SPaolo Bonzini 1004c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1005c50d8ae3SPaolo Bonzini return NULL; 1006c50d8ae3SPaolo Bonzini 1007c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1008c50d8ae3SPaolo Bonzini iter->desc = NULL; 1009c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1010c50d8ae3SPaolo Bonzini goto out; 1011c50d8ae3SPaolo Bonzini } 1012c50d8ae3SPaolo Bonzini 1013c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1014c50d8ae3SPaolo Bonzini iter->pos = 0; 1015c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1016c50d8ae3SPaolo Bonzini out: 1017c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1018c50d8ae3SPaolo Bonzini return sptep; 1019c50d8ae3SPaolo Bonzini } 1020c50d8ae3SPaolo Bonzini 1021c50d8ae3SPaolo Bonzini /* 1022c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1023c50d8ae3SPaolo Bonzini * 1024c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1025c50d8ae3SPaolo Bonzini */ 1026c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1027c50d8ae3SPaolo Bonzini { 1028c50d8ae3SPaolo Bonzini u64 *sptep; 1029c50d8ae3SPaolo Bonzini 1030c50d8ae3SPaolo Bonzini if (iter->desc) { 1031c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1032c50d8ae3SPaolo Bonzini ++iter->pos; 1033c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1034c50d8ae3SPaolo Bonzini if (sptep) 1035c50d8ae3SPaolo Bonzini goto out; 1036c50d8ae3SPaolo Bonzini } 1037c50d8ae3SPaolo Bonzini 1038c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1039c50d8ae3SPaolo Bonzini 1040c50d8ae3SPaolo Bonzini if (iter->desc) { 1041c50d8ae3SPaolo Bonzini iter->pos = 0; 1042c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1043c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1044c50d8ae3SPaolo Bonzini goto out; 1045c50d8ae3SPaolo Bonzini } 1046c50d8ae3SPaolo Bonzini } 1047c50d8ae3SPaolo Bonzini 1048c50d8ae3SPaolo Bonzini return NULL; 1049c50d8ae3SPaolo Bonzini out: 1050c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1051c50d8ae3SPaolo Bonzini return sptep; 1052c50d8ae3SPaolo Bonzini } 1053c50d8ae3SPaolo Bonzini 1054c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1055c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1056c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1057c50d8ae3SPaolo Bonzini 1058c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1059c50d8ae3SPaolo Bonzini { 1060c50d8ae3SPaolo Bonzini if (mmu_spte_clear_track_bits(sptep)) 1061c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1062c50d8ae3SPaolo Bonzini } 1063c50d8ae3SPaolo Bonzini 1064c50d8ae3SPaolo Bonzini 1065c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1066c50d8ae3SPaolo Bonzini { 1067c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 106857354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1069c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1070c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1071c50d8ae3SPaolo Bonzini return true; 1072c50d8ae3SPaolo Bonzini } 1073c50d8ae3SPaolo Bonzini 1074c50d8ae3SPaolo Bonzini return false; 1075c50d8ae3SPaolo Bonzini } 1076c50d8ae3SPaolo Bonzini 1077c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1078c50d8ae3SPaolo Bonzini { 1079c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 108057354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1081c50d8ae3SPaolo Bonzini 1082c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1083c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1084c50d8ae3SPaolo Bonzini } 1085c50d8ae3SPaolo Bonzini } 1086c50d8ae3SPaolo Bonzini 1087c50d8ae3SPaolo Bonzini /* 1088c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1089c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1090c50d8ae3SPaolo Bonzini * 1091c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1092c50d8ae3SPaolo Bonzini * protection: 1093c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1094c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1095c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1096c50d8ae3SPaolo Bonzini * shadow page. 1097c50d8ae3SPaolo Bonzini * 1098c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1099c50d8ae3SPaolo Bonzini */ 1100c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1101c50d8ae3SPaolo Bonzini { 1102c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1103c50d8ae3SPaolo Bonzini 1104c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1105c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1106c50d8ae3SPaolo Bonzini return false; 1107c50d8ae3SPaolo Bonzini 1108805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1109c50d8ae3SPaolo Bonzini 1110c50d8ae3SPaolo Bonzini if (pt_protect) 11115fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1112c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1113c50d8ae3SPaolo Bonzini 1114c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1115c50d8ae3SPaolo Bonzini } 1116c50d8ae3SPaolo Bonzini 1117c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1118c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1119c50d8ae3SPaolo Bonzini bool pt_protect) 1120c50d8ae3SPaolo Bonzini { 1121c50d8ae3SPaolo Bonzini u64 *sptep; 1122c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1123c50d8ae3SPaolo Bonzini bool flush = false; 1124c50d8ae3SPaolo Bonzini 1125c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1126c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1127c50d8ae3SPaolo Bonzini 1128c50d8ae3SPaolo Bonzini return flush; 1129c50d8ae3SPaolo Bonzini } 1130c50d8ae3SPaolo Bonzini 1131c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1132c50d8ae3SPaolo Bonzini { 1133c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1134c50d8ae3SPaolo Bonzini 1135805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1136c50d8ae3SPaolo Bonzini 1137c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1138c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1139c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1140c50d8ae3SPaolo Bonzini } 1141c50d8ae3SPaolo Bonzini 1142c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1143c50d8ae3SPaolo Bonzini { 1144c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1145c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1146c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1147c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1148c50d8ae3SPaolo Bonzini 1149c50d8ae3SPaolo Bonzini return was_writable; 1150c50d8ae3SPaolo Bonzini } 1151c50d8ae3SPaolo Bonzini 1152c50d8ae3SPaolo Bonzini /* 1153c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1154c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1155c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1156c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1157c50d8ae3SPaolo Bonzini */ 11580a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 11590a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1160c50d8ae3SPaolo Bonzini { 1161c50d8ae3SPaolo Bonzini u64 *sptep; 1162c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1163c50d8ae3SPaolo Bonzini bool flush = false; 1164c50d8ae3SPaolo Bonzini 1165c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1166c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1167c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1168c50d8ae3SPaolo Bonzini else 1169c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1170c50d8ae3SPaolo Bonzini 1171c50d8ae3SPaolo Bonzini return flush; 1172c50d8ae3SPaolo Bonzini } 1173c50d8ae3SPaolo Bonzini 1174c50d8ae3SPaolo Bonzini /** 1175c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1176c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1177c50d8ae3SPaolo Bonzini * @slot: slot to protect 1178c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1179c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1180c50d8ae3SPaolo Bonzini * 1181c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1182c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1183c50d8ae3SPaolo Bonzini */ 1184c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1185c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1186c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1187c50d8ae3SPaolo Bonzini { 1188c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1189c50d8ae3SPaolo Bonzini 1190897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1191a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1192a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1193c50d8ae3SPaolo Bonzini while (mask) { 1194c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 11953bae0459SSean Christopherson PG_LEVEL_4K, slot); 1196c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1197c50d8ae3SPaolo Bonzini 1198c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1199c50d8ae3SPaolo Bonzini mask &= mask - 1; 1200c50d8ae3SPaolo Bonzini } 1201c50d8ae3SPaolo Bonzini } 1202c50d8ae3SPaolo Bonzini 1203c50d8ae3SPaolo Bonzini /** 1204c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1205c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1206c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1207c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1208c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1209c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1210c50d8ae3SPaolo Bonzini * 1211c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1212c50d8ae3SPaolo Bonzini */ 1213a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1214c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1215c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1216c50d8ae3SPaolo Bonzini { 1217c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1218c50d8ae3SPaolo Bonzini 1219897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1220a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1221a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1222c50d8ae3SPaolo Bonzini while (mask) { 1223c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12243bae0459SSean Christopherson PG_LEVEL_4K, slot); 12250a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1226c50d8ae3SPaolo Bonzini 1227c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1228c50d8ae3SPaolo Bonzini mask &= mask - 1; 1229c50d8ae3SPaolo Bonzini } 1230c50d8ae3SPaolo Bonzini } 1231c50d8ae3SPaolo Bonzini 1232c50d8ae3SPaolo Bonzini /** 1233c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1234c50d8ae3SPaolo Bonzini * PT level pages. 1235c50d8ae3SPaolo Bonzini * 1236c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1237c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1238c50d8ae3SPaolo Bonzini * 1239c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1240c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1241c50d8ae3SPaolo Bonzini */ 1242c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1243c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1244c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1245c50d8ae3SPaolo Bonzini { 1246a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1247a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1248c50d8ae3SPaolo Bonzini else 1249c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1250c50d8ae3SPaolo Bonzini } 1251c50d8ae3SPaolo Bonzini 1252fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1253fb04a1edSPeter Xu { 12546dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1255fb04a1edSPeter Xu } 1256fb04a1edSPeter Xu 1257c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 1258c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, u64 gfn) 1259c50d8ae3SPaolo Bonzini { 1260c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1261c50d8ae3SPaolo Bonzini int i; 1262c50d8ae3SPaolo Bonzini bool write_protected = false; 1263c50d8ae3SPaolo Bonzini 12643bae0459SSean Christopherson for (i = PG_LEVEL_4K; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1265c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1266c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1267c50d8ae3SPaolo Bonzini } 1268c50d8ae3SPaolo Bonzini 1269897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 127046044f72SBen Gardon write_protected |= 127146044f72SBen Gardon kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn); 127246044f72SBen Gardon 1273c50d8ae3SPaolo Bonzini return write_protected; 1274c50d8ae3SPaolo Bonzini } 1275c50d8ae3SPaolo Bonzini 1276c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1277c50d8ae3SPaolo Bonzini { 1278c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1279c50d8ae3SPaolo Bonzini 1280c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 1281c50d8ae3SPaolo Bonzini return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn); 1282c50d8ae3SPaolo Bonzini } 1283c50d8ae3SPaolo Bonzini 12840a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 12850a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1286c50d8ae3SPaolo Bonzini { 1287c50d8ae3SPaolo Bonzini u64 *sptep; 1288c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1289c50d8ae3SPaolo Bonzini bool flush = false; 1290c50d8ae3SPaolo Bonzini 1291c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1292805a0f83SStephen Zhang rmap_printk("spte %p %llx.\n", sptep, *sptep); 1293c50d8ae3SPaolo Bonzini 1294c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1295c50d8ae3SPaolo Bonzini flush = true; 1296c50d8ae3SPaolo Bonzini } 1297c50d8ae3SPaolo Bonzini 1298c50d8ae3SPaolo Bonzini return flush; 1299c50d8ae3SPaolo Bonzini } 1300c50d8ae3SPaolo Bonzini 1301c50d8ae3SPaolo Bonzini static int kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1302c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1303c50d8ae3SPaolo Bonzini unsigned long data) 1304c50d8ae3SPaolo Bonzini { 13050a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1306c50d8ae3SPaolo Bonzini } 1307c50d8ae3SPaolo Bonzini 1308c50d8ae3SPaolo Bonzini static int kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1309c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1310c50d8ae3SPaolo Bonzini unsigned long data) 1311c50d8ae3SPaolo Bonzini { 1312c50d8ae3SPaolo Bonzini u64 *sptep; 1313c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1314c50d8ae3SPaolo Bonzini int need_flush = 0; 1315c50d8ae3SPaolo Bonzini u64 new_spte; 1316c50d8ae3SPaolo Bonzini pte_t *ptep = (pte_t *)data; 1317c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1318c50d8ae3SPaolo Bonzini 1319c50d8ae3SPaolo Bonzini WARN_ON(pte_huge(*ptep)); 1320c50d8ae3SPaolo Bonzini new_pfn = pte_pfn(*ptep); 1321c50d8ae3SPaolo Bonzini 1322c50d8ae3SPaolo Bonzini restart: 1323c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1324805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1325c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1326c50d8ae3SPaolo Bonzini 1327c50d8ae3SPaolo Bonzini need_flush = 1; 1328c50d8ae3SPaolo Bonzini 1329c50d8ae3SPaolo Bonzini if (pte_write(*ptep)) { 1330c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1331c50d8ae3SPaolo Bonzini goto restart; 1332c50d8ae3SPaolo Bonzini } else { 1333cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1334cb3eedabSPaolo Bonzini *sptep, new_pfn); 1335c50d8ae3SPaolo Bonzini 1336c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1337c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1338c50d8ae3SPaolo Bonzini } 1339c50d8ae3SPaolo Bonzini } 1340c50d8ae3SPaolo Bonzini 1341c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1342c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1343c50d8ae3SPaolo Bonzini return 0; 1344c50d8ae3SPaolo Bonzini } 1345c50d8ae3SPaolo Bonzini 1346c50d8ae3SPaolo Bonzini return need_flush; 1347c50d8ae3SPaolo Bonzini } 1348c50d8ae3SPaolo Bonzini 1349c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1350c50d8ae3SPaolo Bonzini /* input fields. */ 1351c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1352c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1353c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1354c50d8ae3SPaolo Bonzini int start_level; 1355c50d8ae3SPaolo Bonzini int end_level; 1356c50d8ae3SPaolo Bonzini 1357c50d8ae3SPaolo Bonzini /* output fields. */ 1358c50d8ae3SPaolo Bonzini gfn_t gfn; 1359c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1360c50d8ae3SPaolo Bonzini int level; 1361c50d8ae3SPaolo Bonzini 1362c50d8ae3SPaolo Bonzini /* private field. */ 1363c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1364c50d8ae3SPaolo Bonzini }; 1365c50d8ae3SPaolo Bonzini 1366c50d8ae3SPaolo Bonzini static void 1367c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1368c50d8ae3SPaolo Bonzini { 1369c50d8ae3SPaolo Bonzini iterator->level = level; 1370c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1371c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1372c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1373c50d8ae3SPaolo Bonzini iterator->slot); 1374c50d8ae3SPaolo Bonzini } 1375c50d8ae3SPaolo Bonzini 1376c50d8ae3SPaolo Bonzini static void 1377c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1378c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, int start_level, 1379c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1380c50d8ae3SPaolo Bonzini { 1381c50d8ae3SPaolo Bonzini iterator->slot = slot; 1382c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1383c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1384c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1385c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1386c50d8ae3SPaolo Bonzini 1387c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1388c50d8ae3SPaolo Bonzini } 1389c50d8ae3SPaolo Bonzini 1390c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1391c50d8ae3SPaolo Bonzini { 1392c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1393c50d8ae3SPaolo Bonzini } 1394c50d8ae3SPaolo Bonzini 1395c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1396c50d8ae3SPaolo Bonzini { 1397c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1398c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1399c50d8ae3SPaolo Bonzini return; 1400c50d8ae3SPaolo Bonzini } 1401c50d8ae3SPaolo Bonzini 1402c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1403c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1404c50d8ae3SPaolo Bonzini return; 1405c50d8ae3SPaolo Bonzini } 1406c50d8ae3SPaolo Bonzini 1407c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1408c50d8ae3SPaolo Bonzini } 1409c50d8ae3SPaolo Bonzini 1410c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1411c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1412c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1413c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1414c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1415c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1416c50d8ae3SPaolo Bonzini 1417c1b91493SSean Christopherson typedef int (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1418c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 1419c1b91493SSean Christopherson int level, unsigned long data); 1420c1b91493SSean Christopherson 1421c1b91493SSean Christopherson static __always_inline int kvm_handle_hva_range(struct kvm *kvm, 1422c50d8ae3SPaolo Bonzini unsigned long start, 1423c50d8ae3SPaolo Bonzini unsigned long end, 1424c50d8ae3SPaolo Bonzini unsigned long data, 1425c1b91493SSean Christopherson rmap_handler_t handler) 1426c50d8ae3SPaolo Bonzini { 1427c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1428c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 1429c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 1430c50d8ae3SPaolo Bonzini int ret = 0; 1431c50d8ae3SPaolo Bonzini int i; 1432c50d8ae3SPaolo Bonzini 1433c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 1434c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 1435c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 1436c50d8ae3SPaolo Bonzini unsigned long hva_start, hva_end; 1437c50d8ae3SPaolo Bonzini gfn_t gfn_start, gfn_end; 1438c50d8ae3SPaolo Bonzini 1439c50d8ae3SPaolo Bonzini hva_start = max(start, memslot->userspace_addr); 1440c50d8ae3SPaolo Bonzini hva_end = min(end, memslot->userspace_addr + 1441c50d8ae3SPaolo Bonzini (memslot->npages << PAGE_SHIFT)); 1442c50d8ae3SPaolo Bonzini if (hva_start >= hva_end) 1443c50d8ae3SPaolo Bonzini continue; 1444c50d8ae3SPaolo Bonzini /* 1445c50d8ae3SPaolo Bonzini * {gfn(page) | page intersects with [hva_start, hva_end)} = 1446c50d8ae3SPaolo Bonzini * {gfn_start, gfn_start+1, ..., gfn_end-1}. 1447c50d8ae3SPaolo Bonzini */ 1448c50d8ae3SPaolo Bonzini gfn_start = hva_to_gfn_memslot(hva_start, memslot); 1449c50d8ae3SPaolo Bonzini gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); 1450c50d8ae3SPaolo Bonzini 14513bae0459SSean Christopherson for_each_slot_rmap_range(memslot, PG_LEVEL_4K, 1452e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 1453c50d8ae3SPaolo Bonzini gfn_start, gfn_end - 1, 1454c50d8ae3SPaolo Bonzini &iterator) 1455c50d8ae3SPaolo Bonzini ret |= handler(kvm, iterator.rmap, memslot, 1456c50d8ae3SPaolo Bonzini iterator.gfn, iterator.level, data); 1457c50d8ae3SPaolo Bonzini } 1458c50d8ae3SPaolo Bonzini } 1459c50d8ae3SPaolo Bonzini 1460c50d8ae3SPaolo Bonzini return ret; 1461c50d8ae3SPaolo Bonzini } 1462c50d8ae3SPaolo Bonzini 1463c50d8ae3SPaolo Bonzini static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, 1464c1b91493SSean Christopherson unsigned long data, rmap_handler_t handler) 1465c50d8ae3SPaolo Bonzini { 1466c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler); 1467c50d8ae3SPaolo Bonzini } 1468c50d8ae3SPaolo Bonzini 1469fdfe7cbdSWill Deacon int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1470fdfe7cbdSWill Deacon unsigned flags) 1471c50d8ae3SPaolo Bonzini { 1472063afacdSBen Gardon int r; 1473063afacdSBen Gardon 1474063afacdSBen Gardon r = kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp); 1475063afacdSBen Gardon 1476897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1477063afacdSBen Gardon r |= kvm_tdp_mmu_zap_hva_range(kvm, start, end); 1478063afacdSBen Gardon 1479063afacdSBen Gardon return r; 1480c50d8ae3SPaolo Bonzini } 1481c50d8ae3SPaolo Bonzini 1482c50d8ae3SPaolo Bonzini int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 1483c50d8ae3SPaolo Bonzini { 14841d8dd6b3SBen Gardon int r; 14851d8dd6b3SBen Gardon 14861d8dd6b3SBen Gardon r = kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); 14871d8dd6b3SBen Gardon 1488897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 14891d8dd6b3SBen Gardon r |= kvm_tdp_mmu_set_spte_hva(kvm, hva, &pte); 14901d8dd6b3SBen Gardon 14911d8dd6b3SBen Gardon return r; 1492c50d8ae3SPaolo Bonzini } 1493c50d8ae3SPaolo Bonzini 1494c50d8ae3SPaolo Bonzini static int kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1495c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1496c50d8ae3SPaolo Bonzini unsigned long data) 1497c50d8ae3SPaolo Bonzini { 1498c50d8ae3SPaolo Bonzini u64 *sptep; 14993f649ab7SKees Cook struct rmap_iterator iter; 1500c50d8ae3SPaolo Bonzini int young = 0; 1501c50d8ae3SPaolo Bonzini 1502c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1503c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1504c50d8ae3SPaolo Bonzini 1505c50d8ae3SPaolo Bonzini return young; 1506c50d8ae3SPaolo Bonzini } 1507c50d8ae3SPaolo Bonzini 1508c50d8ae3SPaolo Bonzini static int kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1509c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 1510c50d8ae3SPaolo Bonzini int level, unsigned long data) 1511c50d8ae3SPaolo Bonzini { 1512c50d8ae3SPaolo Bonzini u64 *sptep; 1513c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1514c50d8ae3SPaolo Bonzini 1515c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1516c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1517c50d8ae3SPaolo Bonzini return 1; 1518c50d8ae3SPaolo Bonzini return 0; 1519c50d8ae3SPaolo Bonzini } 1520c50d8ae3SPaolo Bonzini 1521c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1522c50d8ae3SPaolo Bonzini 1523c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1524c50d8ae3SPaolo Bonzini { 1525c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1526c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1527c50d8ae3SPaolo Bonzini 152857354682SSean Christopherson sp = sptep_to_sp(spte); 1529c50d8ae3SPaolo Bonzini 1530c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1531c50d8ae3SPaolo Bonzini 1532c50d8ae3SPaolo Bonzini kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, 0); 1533c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1534c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1535c50d8ae3SPaolo Bonzini } 1536c50d8ae3SPaolo Bonzini 1537c50d8ae3SPaolo Bonzini int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 1538c50d8ae3SPaolo Bonzini { 1539f8e14497SBen Gardon int young = false; 1540f8e14497SBen Gardon 1541f8e14497SBen Gardon young = kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp); 1542897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1543f8e14497SBen Gardon young |= kvm_tdp_mmu_age_hva_range(kvm, start, end); 1544f8e14497SBen Gardon 1545f8e14497SBen Gardon return young; 1546c50d8ae3SPaolo Bonzini } 1547c50d8ae3SPaolo Bonzini 1548c50d8ae3SPaolo Bonzini int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 1549c50d8ae3SPaolo Bonzini { 1550f8e14497SBen Gardon int young = false; 1551f8e14497SBen Gardon 1552f8e14497SBen Gardon young = kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp); 1553897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1554f8e14497SBen Gardon young |= kvm_tdp_mmu_test_age_hva(kvm, hva); 1555f8e14497SBen Gardon 1556f8e14497SBen Gardon return young; 1557c50d8ae3SPaolo Bonzini } 1558c50d8ae3SPaolo Bonzini 1559c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1560c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1561c50d8ae3SPaolo Bonzini { 1562c50d8ae3SPaolo Bonzini u64 *pos; 1563c50d8ae3SPaolo Bonzini u64 *end; 1564c50d8ae3SPaolo Bonzini 1565c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1566c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1567c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1568c50d8ae3SPaolo Bonzini pos, *pos); 1569c50d8ae3SPaolo Bonzini return 0; 1570c50d8ae3SPaolo Bonzini } 1571c50d8ae3SPaolo Bonzini return 1; 1572c50d8ae3SPaolo Bonzini } 1573c50d8ae3SPaolo Bonzini #endif 1574c50d8ae3SPaolo Bonzini 1575c50d8ae3SPaolo Bonzini /* 1576c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1577c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1578c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1579c50d8ae3SPaolo Bonzini * faster 1580c50d8ae3SPaolo Bonzini */ 1581c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 1582c50d8ae3SPaolo Bonzini { 1583c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1584c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1585c50d8ae3SPaolo Bonzini } 1586c50d8ae3SPaolo Bonzini 1587c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1588c50d8ae3SPaolo Bonzini { 1589c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1590c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1591c50d8ae3SPaolo Bonzini list_del(&sp->link); 1592c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1593c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1594c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1595c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1596c50d8ae3SPaolo Bonzini } 1597c50d8ae3SPaolo Bonzini 1598c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1599c50d8ae3SPaolo Bonzini { 1600c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1601c50d8ae3SPaolo Bonzini } 1602c50d8ae3SPaolo Bonzini 1603c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1604c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1605c50d8ae3SPaolo Bonzini { 1606c50d8ae3SPaolo Bonzini if (!parent_pte) 1607c50d8ae3SPaolo Bonzini return; 1608c50d8ae3SPaolo Bonzini 1609c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1610c50d8ae3SPaolo Bonzini } 1611c50d8ae3SPaolo Bonzini 1612c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1613c50d8ae3SPaolo Bonzini u64 *parent_pte) 1614c50d8ae3SPaolo Bonzini { 1615c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1616c50d8ae3SPaolo Bonzini } 1617c50d8ae3SPaolo Bonzini 1618c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1619c50d8ae3SPaolo Bonzini u64 *parent_pte) 1620c50d8ae3SPaolo Bonzini { 1621c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1622c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1623c50d8ae3SPaolo Bonzini } 1624c50d8ae3SPaolo Bonzini 1625c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1626c50d8ae3SPaolo Bonzini { 1627c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1628c50d8ae3SPaolo Bonzini 162994ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 163094ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1631c50d8ae3SPaolo Bonzini if (!direct) 163294ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1633c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1634c50d8ae3SPaolo Bonzini 1635c50d8ae3SPaolo Bonzini /* 1636c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1637c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1638c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1639c50d8ae3SPaolo Bonzini */ 1640c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1641c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1642c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1643c50d8ae3SPaolo Bonzini return sp; 1644c50d8ae3SPaolo Bonzini } 1645c50d8ae3SPaolo Bonzini 1646c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1647c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1648c50d8ae3SPaolo Bonzini { 1649c50d8ae3SPaolo Bonzini u64 *sptep; 1650c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1651c50d8ae3SPaolo Bonzini 1652c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1653c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1654c50d8ae3SPaolo Bonzini } 1655c50d8ae3SPaolo Bonzini } 1656c50d8ae3SPaolo Bonzini 1657c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1658c50d8ae3SPaolo Bonzini { 1659c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1660c50d8ae3SPaolo Bonzini unsigned int index; 1661c50d8ae3SPaolo Bonzini 166257354682SSean Christopherson sp = sptep_to_sp(spte); 1663c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1664c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1665c50d8ae3SPaolo Bonzini return; 1666c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1667c50d8ae3SPaolo Bonzini return; 1668c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1669c50d8ae3SPaolo Bonzini } 1670c50d8ae3SPaolo Bonzini 1671c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1672c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1673c50d8ae3SPaolo Bonzini { 1674c50d8ae3SPaolo Bonzini return 0; 1675c50d8ae3SPaolo Bonzini } 1676c50d8ae3SPaolo Bonzini 1677c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1678c50d8ae3SPaolo Bonzini 1679c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1680c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1681c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1682c50d8ae3SPaolo Bonzini unsigned int idx; 1683c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1684c50d8ae3SPaolo Bonzini unsigned int nr; 1685c50d8ae3SPaolo Bonzini }; 1686c50d8ae3SPaolo Bonzini 1687c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1688c50d8ae3SPaolo Bonzini int idx) 1689c50d8ae3SPaolo Bonzini { 1690c50d8ae3SPaolo Bonzini int i; 1691c50d8ae3SPaolo Bonzini 1692c50d8ae3SPaolo Bonzini if (sp->unsync) 1693c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1694c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1695c50d8ae3SPaolo Bonzini return 0; 1696c50d8ae3SPaolo Bonzini 1697c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1698c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1699c50d8ae3SPaolo Bonzini pvec->nr++; 1700c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1701c50d8ae3SPaolo Bonzini } 1702c50d8ae3SPaolo Bonzini 1703c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1704c50d8ae3SPaolo Bonzini { 1705c50d8ae3SPaolo Bonzini --sp->unsync_children; 1706c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1707c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1708c50d8ae3SPaolo Bonzini } 1709c50d8ae3SPaolo Bonzini 1710c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1711c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1712c50d8ae3SPaolo Bonzini { 1713c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1714c50d8ae3SPaolo Bonzini 1715c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1716c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1717c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1718c50d8ae3SPaolo Bonzini 1719c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1720c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1721c50d8ae3SPaolo Bonzini continue; 1722c50d8ae3SPaolo Bonzini } 1723c50d8ae3SPaolo Bonzini 1724e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1725c50d8ae3SPaolo Bonzini 1726c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1727c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1728c50d8ae3SPaolo Bonzini return -ENOSPC; 1729c50d8ae3SPaolo Bonzini 1730c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1731c50d8ae3SPaolo Bonzini if (!ret) { 1732c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1733c50d8ae3SPaolo Bonzini continue; 1734c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1735c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1736c50d8ae3SPaolo Bonzini } else 1737c50d8ae3SPaolo Bonzini return ret; 1738c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1739c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1740c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1741c50d8ae3SPaolo Bonzini return -ENOSPC; 1742c50d8ae3SPaolo Bonzini } else 1743c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1744c50d8ae3SPaolo Bonzini } 1745c50d8ae3SPaolo Bonzini 1746c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1747c50d8ae3SPaolo Bonzini } 1748c50d8ae3SPaolo Bonzini 1749c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1750c50d8ae3SPaolo Bonzini 1751c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1752c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1753c50d8ae3SPaolo Bonzini { 1754c50d8ae3SPaolo Bonzini pvec->nr = 0; 1755c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1756c50d8ae3SPaolo Bonzini return 0; 1757c50d8ae3SPaolo Bonzini 1758c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1759c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1760c50d8ae3SPaolo Bonzini } 1761c50d8ae3SPaolo Bonzini 1762c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1763c50d8ae3SPaolo Bonzini { 1764c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1765c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1766c50d8ae3SPaolo Bonzini sp->unsync = 0; 1767c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1768c50d8ae3SPaolo Bonzini } 1769c50d8ae3SPaolo Bonzini 1770c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1771c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1772c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1773c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1774c50d8ae3SPaolo Bonzini 1775ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1776ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1777c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1778c50d8ae3SPaolo Bonzini } else 1779c50d8ae3SPaolo Bonzini 1780c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1781ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1782ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1783c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1784c50d8ae3SPaolo Bonzini 1785c50d8ae3SPaolo Bonzini static inline bool is_ept_sp(struct kvm_mmu_page *sp) 1786c50d8ae3SPaolo Bonzini { 1787c50d8ae3SPaolo Bonzini return sp->role.cr0_wp && sp->role.smap_andnot_wp; 1788c50d8ae3SPaolo Bonzini } 1789c50d8ae3SPaolo Bonzini 1790c50d8ae3SPaolo Bonzini /* @sp->gfn should be write-protected at the call site */ 1791c50d8ae3SPaolo Bonzini static bool __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1792c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1793c50d8ae3SPaolo Bonzini { 1794c50d8ae3SPaolo Bonzini if ((!is_ept_sp(sp) && sp->role.gpte_is_8_bytes != !!is_pae(vcpu)) || 1795c50d8ae3SPaolo Bonzini vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 1796c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1797c50d8ae3SPaolo Bonzini return false; 1798c50d8ae3SPaolo Bonzini } 1799c50d8ae3SPaolo Bonzini 1800c50d8ae3SPaolo Bonzini return true; 1801c50d8ae3SPaolo Bonzini } 1802c50d8ae3SPaolo Bonzini 1803c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1804c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1805c50d8ae3SPaolo Bonzini bool remote_flush) 1806c50d8ae3SPaolo Bonzini { 1807c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1808c50d8ae3SPaolo Bonzini return false; 1809c50d8ae3SPaolo Bonzini 1810c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1811c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1812c50d8ae3SPaolo Bonzini else 1813c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1814c50d8ae3SPaolo Bonzini return true; 1815c50d8ae3SPaolo Bonzini } 1816c50d8ae3SPaolo Bonzini 1817c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 1818c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1819c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 1820c50d8ae3SPaolo Bonzini { 1821c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 1822c50d8ae3SPaolo Bonzini return; 1823c50d8ae3SPaolo Bonzini 1824c50d8ae3SPaolo Bonzini if (local_flush) 18258c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 1826c50d8ae3SPaolo Bonzini } 1827c50d8ae3SPaolo Bonzini 1828c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1829c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1830c50d8ae3SPaolo Bonzini #else 1831c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1832c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1833c50d8ae3SPaolo Bonzini #endif 1834c50d8ae3SPaolo Bonzini 1835c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1836c50d8ae3SPaolo Bonzini { 1837c50d8ae3SPaolo Bonzini return sp->role.invalid || 1838c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1839c50d8ae3SPaolo Bonzini } 1840c50d8ae3SPaolo Bonzini 1841c50d8ae3SPaolo Bonzini static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1842c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1843c50d8ae3SPaolo Bonzini { 1844c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(vcpu->kvm, sp); 1845c50d8ae3SPaolo Bonzini return __kvm_sync_page(vcpu, sp, invalid_list); 1846c50d8ae3SPaolo Bonzini } 1847c50d8ae3SPaolo Bonzini 1848c50d8ae3SPaolo Bonzini /* @gfn should be write-protected at the call site */ 1849c50d8ae3SPaolo Bonzini static bool kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, 1850c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1851c50d8ae3SPaolo Bonzini { 1852c50d8ae3SPaolo Bonzini struct kvm_mmu_page *s; 1853c50d8ae3SPaolo Bonzini bool ret = false; 1854c50d8ae3SPaolo Bonzini 1855c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) { 1856c50d8ae3SPaolo Bonzini if (!s->unsync) 1857c50d8ae3SPaolo Bonzini continue; 1858c50d8ae3SPaolo Bonzini 18593bae0459SSean Christopherson WARN_ON(s->role.level != PG_LEVEL_4K); 1860c50d8ae3SPaolo Bonzini ret |= kvm_sync_page(vcpu, s, invalid_list); 1861c50d8ae3SPaolo Bonzini } 1862c50d8ae3SPaolo Bonzini 1863c50d8ae3SPaolo Bonzini return ret; 1864c50d8ae3SPaolo Bonzini } 1865c50d8ae3SPaolo Bonzini 1866c50d8ae3SPaolo Bonzini struct mmu_page_path { 1867c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1868c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1869c50d8ae3SPaolo Bonzini }; 1870c50d8ae3SPaolo Bonzini 1871c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1872c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1873c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1874c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1875c50d8ae3SPaolo Bonzini 1876c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1877c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1878c50d8ae3SPaolo Bonzini int i) 1879c50d8ae3SPaolo Bonzini { 1880c50d8ae3SPaolo Bonzini int n; 1881c50d8ae3SPaolo Bonzini 1882c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1883c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1884c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1885c50d8ae3SPaolo Bonzini int level = sp->role.level; 1886c50d8ae3SPaolo Bonzini 1887c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 18883bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1889c50d8ae3SPaolo Bonzini break; 1890c50d8ae3SPaolo Bonzini 1891c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1892c50d8ae3SPaolo Bonzini } 1893c50d8ae3SPaolo Bonzini 1894c50d8ae3SPaolo Bonzini return n; 1895c50d8ae3SPaolo Bonzini } 1896c50d8ae3SPaolo Bonzini 1897c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1898c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1899c50d8ae3SPaolo Bonzini { 1900c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1901c50d8ae3SPaolo Bonzini int level; 1902c50d8ae3SPaolo Bonzini 1903c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1904c50d8ae3SPaolo Bonzini return 0; 1905c50d8ae3SPaolo Bonzini 1906c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1907c50d8ae3SPaolo Bonzini 1908c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1909c50d8ae3SPaolo Bonzini level = sp->role.level; 19103bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1911c50d8ae3SPaolo Bonzini 1912c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1913c50d8ae3SPaolo Bonzini 1914c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1915c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1916c50d8ae3SPaolo Bonzini */ 1917c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1918c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1919c50d8ae3SPaolo Bonzini } 1920c50d8ae3SPaolo Bonzini 1921c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1922c50d8ae3SPaolo Bonzini { 1923c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1924c50d8ae3SPaolo Bonzini unsigned int level = 0; 1925c50d8ae3SPaolo Bonzini 1926c50d8ae3SPaolo Bonzini do { 1927c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 1928c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 1929c50d8ae3SPaolo Bonzini if (!sp) 1930c50d8ae3SPaolo Bonzini return; 1931c50d8ae3SPaolo Bonzini 1932c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 1933c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 1934c50d8ae3SPaolo Bonzini level++; 1935c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 1936c50d8ae3SPaolo Bonzini } 1937c50d8ae3SPaolo Bonzini 1938c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 1939c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 1940c50d8ae3SPaolo Bonzini { 1941c50d8ae3SPaolo Bonzini int i; 1942c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1943c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 1944c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 1945c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1946c50d8ae3SPaolo Bonzini bool flush = false; 1947c50d8ae3SPaolo Bonzini 1948c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 1949c50d8ae3SPaolo Bonzini bool protected = false; 1950c50d8ae3SPaolo Bonzini 1951c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 1952c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 1953c50d8ae3SPaolo Bonzini 1954c50d8ae3SPaolo Bonzini if (protected) { 1955c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 1956c50d8ae3SPaolo Bonzini flush = false; 1957c50d8ae3SPaolo Bonzini } 1958c50d8ae3SPaolo Bonzini 1959c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 1960c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 1961c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 1962c50d8ae3SPaolo Bonzini } 1963531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 1964c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 1965531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 1966c50d8ae3SPaolo Bonzini flush = false; 1967c50d8ae3SPaolo Bonzini } 1968c50d8ae3SPaolo Bonzini } 1969c50d8ae3SPaolo Bonzini 1970c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 1971c50d8ae3SPaolo Bonzini } 1972c50d8ae3SPaolo Bonzini 1973c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 1974c50d8ae3SPaolo Bonzini { 1975c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 1976c50d8ae3SPaolo Bonzini } 1977c50d8ae3SPaolo Bonzini 1978c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 1979c50d8ae3SPaolo Bonzini { 198057354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 1981c50d8ae3SPaolo Bonzini } 1982c50d8ae3SPaolo Bonzini 1983c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 1984c50d8ae3SPaolo Bonzini gfn_t gfn, 1985c50d8ae3SPaolo Bonzini gva_t gaddr, 1986c50d8ae3SPaolo Bonzini unsigned level, 1987c50d8ae3SPaolo Bonzini int direct, 19880a2b64c5SBen Gardon unsigned int access) 1989c50d8ae3SPaolo Bonzini { 1990fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 1991c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 1992ac101b7cSSean Christopherson struct hlist_head *sp_list; 1993c50d8ae3SPaolo Bonzini unsigned quadrant; 1994c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1995c50d8ae3SPaolo Bonzini bool need_sync = false; 1996c50d8ae3SPaolo Bonzini bool flush = false; 1997c50d8ae3SPaolo Bonzini int collisions = 0; 1998c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1999c50d8ae3SPaolo Bonzini 2000c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2001c50d8ae3SPaolo Bonzini role.level = level; 2002c50d8ae3SPaolo Bonzini role.direct = direct; 2003c50d8ae3SPaolo Bonzini if (role.direct) 2004c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2005c50d8ae3SPaolo Bonzini role.access = access; 2006fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2007c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2008c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2009c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2010c50d8ae3SPaolo Bonzini } 2011ac101b7cSSean Christopherson 2012ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2013ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2014c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2015c50d8ae3SPaolo Bonzini collisions++; 2016c50d8ae3SPaolo Bonzini continue; 2017c50d8ae3SPaolo Bonzini } 2018c50d8ae3SPaolo Bonzini 2019c50d8ae3SPaolo Bonzini if (!need_sync && sp->unsync) 2020c50d8ae3SPaolo Bonzini need_sync = true; 2021c50d8ae3SPaolo Bonzini 2022c50d8ae3SPaolo Bonzini if (sp->role.word != role.word) 2023c50d8ae3SPaolo Bonzini continue; 2024c50d8ae3SPaolo Bonzini 2025fb58a9c3SSean Christopherson if (direct_mmu) 2026fb58a9c3SSean Christopherson goto trace_get_page; 2027fb58a9c3SSean Christopherson 2028c50d8ae3SPaolo Bonzini if (sp->unsync) { 2029c50d8ae3SPaolo Bonzini /* The page is good, but __kvm_sync_page might still end 2030c50d8ae3SPaolo Bonzini * up zapping it. If so, break in order to rebuild it. 2031c50d8ae3SPaolo Bonzini */ 2032c50d8ae3SPaolo Bonzini if (!__kvm_sync_page(vcpu, sp, &invalid_list)) 2033c50d8ae3SPaolo Bonzini break; 2034c50d8ae3SPaolo Bonzini 2035c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 20368c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2037c50d8ae3SPaolo Bonzini } 2038c50d8ae3SPaolo Bonzini 2039c50d8ae3SPaolo Bonzini if (sp->unsync_children) 2040f6f6195bSLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 2041c50d8ae3SPaolo Bonzini 2042c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2043fb58a9c3SSean Christopherson 2044fb58a9c3SSean Christopherson trace_get_page: 2045c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2046c50d8ae3SPaolo Bonzini goto out; 2047c50d8ae3SPaolo Bonzini } 2048c50d8ae3SPaolo Bonzini 2049c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2050c50d8ae3SPaolo Bonzini 2051c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2052c50d8ae3SPaolo Bonzini 2053c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2054c50d8ae3SPaolo Bonzini sp->role = role; 2055ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2056c50d8ae3SPaolo Bonzini if (!direct) { 2057c50d8ae3SPaolo Bonzini /* 2058c50d8ae3SPaolo Bonzini * we should do write protection before syncing pages 2059c50d8ae3SPaolo Bonzini * otherwise the content of the synced shadow page may 2060c50d8ae3SPaolo Bonzini * be inconsistent with guest page table. 2061c50d8ae3SPaolo Bonzini */ 2062c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 20633bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2064c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2065c50d8ae3SPaolo Bonzini 20663bae0459SSean Christopherson if (level > PG_LEVEL_4K && need_sync) 2067c50d8ae3SPaolo Bonzini flush |= kvm_sync_pages(vcpu, gfn, &invalid_list); 2068c50d8ae3SPaolo Bonzini } 2069c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2070c50d8ae3SPaolo Bonzini 2071c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2072c50d8ae3SPaolo Bonzini out: 2073c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2074c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2075c50d8ae3SPaolo Bonzini return sp; 2076c50d8ae3SPaolo Bonzini } 2077c50d8ae3SPaolo Bonzini 2078c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2079c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2080c50d8ae3SPaolo Bonzini u64 addr) 2081c50d8ae3SPaolo Bonzini { 2082c50d8ae3SPaolo Bonzini iterator->addr = addr; 2083c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2084c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2085c50d8ae3SPaolo Bonzini 2086c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2087c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2088c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2089c50d8ae3SPaolo Bonzini --iterator->level; 2090c50d8ae3SPaolo Bonzini 2091c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2092c50d8ae3SPaolo Bonzini /* 2093c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2094c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2095c50d8ae3SPaolo Bonzini */ 2096c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2097c50d8ae3SPaolo Bonzini 2098c50d8ae3SPaolo Bonzini iterator->shadow_addr 2099c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2100c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2101c50d8ae3SPaolo Bonzini --iterator->level; 2102c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2103c50d8ae3SPaolo Bonzini iterator->level = 0; 2104c50d8ae3SPaolo Bonzini } 2105c50d8ae3SPaolo Bonzini } 2106c50d8ae3SPaolo Bonzini 2107c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2108c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2109c50d8ae3SPaolo Bonzini { 2110c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2111c50d8ae3SPaolo Bonzini addr); 2112c50d8ae3SPaolo Bonzini } 2113c50d8ae3SPaolo Bonzini 2114c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2115c50d8ae3SPaolo Bonzini { 21163bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2117c50d8ae3SPaolo Bonzini return false; 2118c50d8ae3SPaolo Bonzini 2119c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2120c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2121c50d8ae3SPaolo Bonzini return true; 2122c50d8ae3SPaolo Bonzini } 2123c50d8ae3SPaolo Bonzini 2124c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2125c50d8ae3SPaolo Bonzini u64 spte) 2126c50d8ae3SPaolo Bonzini { 2127c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2128c50d8ae3SPaolo Bonzini iterator->level = 0; 2129c50d8ae3SPaolo Bonzini return; 2130c50d8ae3SPaolo Bonzini } 2131c50d8ae3SPaolo Bonzini 2132c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2133c50d8ae3SPaolo Bonzini --iterator->level; 2134c50d8ae3SPaolo Bonzini } 2135c50d8ae3SPaolo Bonzini 2136c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2137c50d8ae3SPaolo Bonzini { 2138c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2139c50d8ae3SPaolo Bonzini } 2140c50d8ae3SPaolo Bonzini 2141c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2142c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2143c50d8ae3SPaolo Bonzini { 2144c50d8ae3SPaolo Bonzini u64 spte; 2145c50d8ae3SPaolo Bonzini 2146c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2147c50d8ae3SPaolo Bonzini 2148cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2149c50d8ae3SPaolo Bonzini 2150c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2151c50d8ae3SPaolo Bonzini 2152c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2153c50d8ae3SPaolo Bonzini 2154c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2155c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2156c50d8ae3SPaolo Bonzini } 2157c50d8ae3SPaolo Bonzini 2158c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2159c50d8ae3SPaolo Bonzini unsigned direct_access) 2160c50d8ae3SPaolo Bonzini { 2161c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2162c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2163c50d8ae3SPaolo Bonzini 2164c50d8ae3SPaolo Bonzini /* 2165c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2166c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2167c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2168c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2169c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2170c50d8ae3SPaolo Bonzini */ 2171e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2172c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2173c50d8ae3SPaolo Bonzini return; 2174c50d8ae3SPaolo Bonzini 2175c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2176c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2177c50d8ae3SPaolo Bonzini } 2178c50d8ae3SPaolo Bonzini } 2179c50d8ae3SPaolo Bonzini 21802de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 21812de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 21822de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2183c50d8ae3SPaolo Bonzini { 2184c50d8ae3SPaolo Bonzini u64 pte; 2185c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2186c50d8ae3SPaolo Bonzini 2187c50d8ae3SPaolo Bonzini pte = *spte; 2188c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2189c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2190c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2191c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2192c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2193c50d8ae3SPaolo Bonzini } else { 2194e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2195c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 21962de4085cSBen Gardon 21972de4085cSBen Gardon /* 21982de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 21992de4085cSBen Gardon * unlikely to be used again in the near future. This 22002de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22012de4085cSBen Gardon */ 22022de4085cSBen Gardon if (tdp_enabled && invalid_list && 22032de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22042de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22052de4085cSBen Gardon invalid_list); 2206c50d8ae3SPaolo Bonzini } 2207ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2208c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2209ace569e0SSean Christopherson } 22102de4085cSBen Gardon return 0; 2211c50d8ae3SPaolo Bonzini } 2212c50d8ae3SPaolo Bonzini 22132de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 22142de4085cSBen Gardon struct kvm_mmu_page *sp, 22152de4085cSBen Gardon struct list_head *invalid_list) 2216c50d8ae3SPaolo Bonzini { 22172de4085cSBen Gardon int zapped = 0; 2218c50d8ae3SPaolo Bonzini unsigned i; 2219c50d8ae3SPaolo Bonzini 2220c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 22212de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 22222de4085cSBen Gardon 22232de4085cSBen Gardon return zapped; 2224c50d8ae3SPaolo Bonzini } 2225c50d8ae3SPaolo Bonzini 2226c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2227c50d8ae3SPaolo Bonzini { 2228c50d8ae3SPaolo Bonzini u64 *sptep; 2229c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2230c50d8ae3SPaolo Bonzini 2231c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2232c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2233c50d8ae3SPaolo Bonzini } 2234c50d8ae3SPaolo Bonzini 2235c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2236c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2237c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2238c50d8ae3SPaolo Bonzini { 2239c50d8ae3SPaolo Bonzini int i, zapped = 0; 2240c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2241c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2242c50d8ae3SPaolo Bonzini 22433bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2244c50d8ae3SPaolo Bonzini return 0; 2245c50d8ae3SPaolo Bonzini 2246c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2247c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2248c50d8ae3SPaolo Bonzini 2249c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2250c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2251c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2252c50d8ae3SPaolo Bonzini zapped++; 2253c50d8ae3SPaolo Bonzini } 2254c50d8ae3SPaolo Bonzini } 2255c50d8ae3SPaolo Bonzini 2256c50d8ae3SPaolo Bonzini return zapped; 2257c50d8ae3SPaolo Bonzini } 2258c50d8ae3SPaolo Bonzini 2259c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2260c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2261c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2262c50d8ae3SPaolo Bonzini int *nr_zapped) 2263c50d8ae3SPaolo Bonzini { 2264c50d8ae3SPaolo Bonzini bool list_unstable; 2265c50d8ae3SPaolo Bonzini 2266c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2267c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2268c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 22692de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2270c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2271c50d8ae3SPaolo Bonzini 2272c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2273c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2274c50d8ae3SPaolo Bonzini 2275c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2276c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2277c50d8ae3SPaolo Bonzini 2278c50d8ae3SPaolo Bonzini if (sp->unsync) 2279c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2280c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2281c50d8ae3SPaolo Bonzini /* Count self */ 2282c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2283f95eec9bSSean Christopherson 2284f95eec9bSSean Christopherson /* 2285f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2286f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2287f95eec9bSSean Christopherson * !sp->root_count. 2288f95eec9bSSean Christopherson */ 2289f95eec9bSSean Christopherson if (sp->role.invalid) 2290f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2291f95eec9bSSean Christopherson else 2292c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2293c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2294c50d8ae3SPaolo Bonzini } else { 2295f95eec9bSSean Christopherson /* 2296f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2297f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2298f95eec9bSSean Christopherson */ 2299f95eec9bSSean Christopherson list_del(&sp->link); 2300c50d8ae3SPaolo Bonzini 2301c50d8ae3SPaolo Bonzini /* 2302c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2303c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2304c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2305c50d8ae3SPaolo Bonzini */ 2306c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2307c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2308c50d8ae3SPaolo Bonzini } 2309c50d8ae3SPaolo Bonzini 2310c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2311c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2312c50d8ae3SPaolo Bonzini 2313c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2314c50d8ae3SPaolo Bonzini return list_unstable; 2315c50d8ae3SPaolo Bonzini } 2316c50d8ae3SPaolo Bonzini 2317c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2318c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2319c50d8ae3SPaolo Bonzini { 2320c50d8ae3SPaolo Bonzini int nr_zapped; 2321c50d8ae3SPaolo Bonzini 2322c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2323c50d8ae3SPaolo Bonzini return nr_zapped; 2324c50d8ae3SPaolo Bonzini } 2325c50d8ae3SPaolo Bonzini 2326c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2327c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2328c50d8ae3SPaolo Bonzini { 2329c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2330c50d8ae3SPaolo Bonzini 2331c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2332c50d8ae3SPaolo Bonzini return; 2333c50d8ae3SPaolo Bonzini 2334c50d8ae3SPaolo Bonzini /* 2335c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2336c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2337c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2338c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2339c50d8ae3SPaolo Bonzini * 2340c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2341c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2342c50d8ae3SPaolo Bonzini */ 2343c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2344c50d8ae3SPaolo Bonzini 2345c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2346c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2347c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2348c50d8ae3SPaolo Bonzini } 2349c50d8ae3SPaolo Bonzini } 2350c50d8ae3SPaolo Bonzini 23516b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 23526b82ef2cSSean Christopherson unsigned long nr_to_zap) 2353c50d8ae3SPaolo Bonzini { 23546b82ef2cSSean Christopherson unsigned long total_zapped = 0; 23556b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2356ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 23576b82ef2cSSean Christopherson bool unstable; 23586b82ef2cSSean Christopherson int nr_zapped; 2359c50d8ae3SPaolo Bonzini 2360c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2361ba7888ddSSean Christopherson return 0; 2362c50d8ae3SPaolo Bonzini 23636b82ef2cSSean Christopherson restart: 23648fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 23656b82ef2cSSean Christopherson /* 23666b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 23676b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 23686b82ef2cSSean Christopherson */ 23696b82ef2cSSean Christopherson if (sp->root_count) 23706b82ef2cSSean Christopherson continue; 23716b82ef2cSSean Christopherson 23726b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 23736b82ef2cSSean Christopherson &nr_zapped); 23746b82ef2cSSean Christopherson total_zapped += nr_zapped; 23756b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2376ba7888ddSSean Christopherson break; 2377ba7888ddSSean Christopherson 23786b82ef2cSSean Christopherson if (unstable) 23796b82ef2cSSean Christopherson goto restart; 2380ba7888ddSSean Christopherson } 23816b82ef2cSSean Christopherson 23826b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 23836b82ef2cSSean Christopherson 23846b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 23856b82ef2cSSean Christopherson return total_zapped; 23866b82ef2cSSean Christopherson } 23876b82ef2cSSean Christopherson 2388afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2389afe8d7e6SSean Christopherson { 2390afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2391afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2392afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2393afe8d7e6SSean Christopherson 2394afe8d7e6SSean Christopherson return 0; 2395c50d8ae3SPaolo Bonzini } 2396c50d8ae3SPaolo Bonzini 2397ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2398ba7888ddSSean Christopherson { 23996b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2400ba7888ddSSean Christopherson 24016b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2402ba7888ddSSean Christopherson return 0; 2403ba7888ddSSean Christopherson 24046b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2405ba7888ddSSean Christopherson 24066e6ec584SSean Christopherson /* 24076e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 24086e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 24096e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 24106e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 24116e6ec584SSean Christopherson * being too agressive may unnecessarily kill the guest, and getting an 24126e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 24136e6ec584SSean Christopherson * page fault paths. 24146e6ec584SSean Christopherson */ 2415ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2416ba7888ddSSean Christopherson return -ENOSPC; 2417ba7888ddSSean Christopherson return 0; 2418ba7888ddSSean Christopherson } 2419ba7888ddSSean Christopherson 2420c50d8ae3SPaolo Bonzini /* 2421c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2422c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2423c50d8ae3SPaolo Bonzini */ 2424c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2425c50d8ae3SPaolo Bonzini { 2426531810caSBen Gardon write_lock(&kvm->mmu_lock); 2427c50d8ae3SPaolo Bonzini 2428c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 24296b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 24306b82ef2cSSean Christopherson goal_nr_mmu_pages); 2431c50d8ae3SPaolo Bonzini 2432c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2433c50d8ae3SPaolo Bonzini } 2434c50d8ae3SPaolo Bonzini 2435c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2436c50d8ae3SPaolo Bonzini 2437531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2438c50d8ae3SPaolo Bonzini } 2439c50d8ae3SPaolo Bonzini 2440c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2441c50d8ae3SPaolo Bonzini { 2442c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2443c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2444c50d8ae3SPaolo Bonzini int r; 2445c50d8ae3SPaolo Bonzini 2446c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2447c50d8ae3SPaolo Bonzini r = 0; 2448531810caSBen Gardon write_lock(&kvm->mmu_lock); 2449c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2450c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2451c50d8ae3SPaolo Bonzini sp->role.word); 2452c50d8ae3SPaolo Bonzini r = 1; 2453c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2454c50d8ae3SPaolo Bonzini } 2455c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2456531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2457c50d8ae3SPaolo Bonzini 2458c50d8ae3SPaolo Bonzini return r; 2459c50d8ae3SPaolo Bonzini } 246096ad91aeSSean Christopherson 246196ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 246296ad91aeSSean Christopherson { 246396ad91aeSSean Christopherson gpa_t gpa; 246496ad91aeSSean Christopherson int r; 246596ad91aeSSean Christopherson 246696ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 246796ad91aeSSean Christopherson return 0; 246896ad91aeSSean Christopherson 246996ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 247096ad91aeSSean Christopherson 247196ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 247296ad91aeSSean Christopherson 247396ad91aeSSean Christopherson return r; 247496ad91aeSSean Christopherson } 2475c50d8ae3SPaolo Bonzini 2476c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2477c50d8ae3SPaolo Bonzini { 2478c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2479c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2480c50d8ae3SPaolo Bonzini sp->unsync = 1; 2481c50d8ae3SPaolo Bonzini 2482c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2483c50d8ae3SPaolo Bonzini } 2484c50d8ae3SPaolo Bonzini 24855a9624afSPaolo Bonzini bool mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, 2486c50d8ae3SPaolo Bonzini bool can_unsync) 2487c50d8ae3SPaolo Bonzini { 2488c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2489c50d8ae3SPaolo Bonzini 2490c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 2491c50d8ae3SPaolo Bonzini return true; 2492c50d8ae3SPaolo Bonzini 2493c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2494c50d8ae3SPaolo Bonzini if (!can_unsync) 2495c50d8ae3SPaolo Bonzini return true; 2496c50d8ae3SPaolo Bonzini 2497c50d8ae3SPaolo Bonzini if (sp->unsync) 2498c50d8ae3SPaolo Bonzini continue; 2499c50d8ae3SPaolo Bonzini 25003bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2501c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2502c50d8ae3SPaolo Bonzini } 2503c50d8ae3SPaolo Bonzini 2504c50d8ae3SPaolo Bonzini /* 2505c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2506c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2507c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2508c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2509c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2510c50d8ae3SPaolo Bonzini * following could happen: 2511c50d8ae3SPaolo Bonzini * 2512c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2513c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2514c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2515c50d8ae3SPaolo Bonzini * to be writable 2516c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2517c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2518c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2519c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2520c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2521c50d8ae3SPaolo Bonzini * fault. 2522c50d8ae3SPaolo Bonzini * 2523c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2524c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2525c50d8ae3SPaolo Bonzini * 2526c50d8ae3SPaolo Bonzini * 2.3 kvm_mmu_sync_pages() reads sp->unsync. 2527c50d8ae3SPaolo Bonzini * Since it is false, so it just returns. 2528c50d8ae3SPaolo Bonzini * 2529c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2530c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2531c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2532c50d8ae3SPaolo Bonzini * gets used. 2533c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2534c50d8ae3SPaolo Bonzini * as unsync 2535c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2536c50d8ae3SPaolo Bonzini * 2537c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2538c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2539c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2540c50d8ae3SPaolo Bonzini */ 2541c50d8ae3SPaolo Bonzini smp_wmb(); 2542c50d8ae3SPaolo Bonzini 2543c50d8ae3SPaolo Bonzini return false; 2544c50d8ae3SPaolo Bonzini } 2545c50d8ae3SPaolo Bonzini 2546799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2547799a4190SBen Gardon unsigned int pte_access, int level, 2548799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 2549799a4190SBen Gardon bool can_unsync, bool host_writable) 2550799a4190SBen Gardon { 2551799a4190SBen Gardon u64 spte; 2552799a4190SBen Gardon struct kvm_mmu_page *sp; 2553799a4190SBen Gardon int ret; 2554799a4190SBen Gardon 2555799a4190SBen Gardon sp = sptep_to_sp(sptep); 2556799a4190SBen Gardon 2557799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 2558799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 2559799a4190SBen Gardon 2560799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 2561799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 2562799a4190SBen Gardon 256312703759SSean Christopherson if (*sptep == spte) 256412703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 256512703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 2566c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 2567c50d8ae3SPaolo Bonzini return ret; 2568c50d8ae3SPaolo Bonzini } 2569c50d8ae3SPaolo Bonzini 25700a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2571e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 25720a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 25730a2b64c5SBen Gardon bool host_writable) 2574c50d8ae3SPaolo Bonzini { 2575c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2576c50d8ae3SPaolo Bonzini int rmap_count; 2577c50d8ae3SPaolo Bonzini int set_spte_ret; 2578c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2579c50d8ae3SPaolo Bonzini bool flush = false; 2580c50d8ae3SPaolo Bonzini 2581c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2582c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2583c50d8ae3SPaolo Bonzini 2584a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2585a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2586a54aa15cSSean Christopherson return RET_PF_EMULATE; 2587a54aa15cSSean Christopherson } 2588a54aa15cSSean Christopherson 2589c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2590c50d8ae3SPaolo Bonzini /* 2591c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2592c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2593c50d8ae3SPaolo Bonzini */ 25943bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2595c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2596c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2597c50d8ae3SPaolo Bonzini 2598e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2599c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2600c50d8ae3SPaolo Bonzini flush = true; 2601c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2602c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2603c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2604c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2605c50d8ae3SPaolo Bonzini flush = true; 2606c50d8ae3SPaolo Bonzini } else 2607c50d8ae3SPaolo Bonzini was_rmapped = 1; 2608c50d8ae3SPaolo Bonzini } 2609c50d8ae3SPaolo Bonzini 2610c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 2611c50d8ae3SPaolo Bonzini speculative, true, host_writable); 2612c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 2613c50d8ae3SPaolo Bonzini if (write_fault) 2614c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 26158c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2616c50d8ae3SPaolo Bonzini } 2617c50d8ae3SPaolo Bonzini 2618c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 2619c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2620c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2621c50d8ae3SPaolo Bonzini 262212703759SSean Christopherson /* 262312703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 262412703759SSean Christopherson * are identical, and emulation is not required. 262512703759SSean Christopherson */ 262612703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 262712703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 262812703759SSean Christopherson return RET_PF_SPURIOUS; 262912703759SSean Christopherson } 263012703759SSean Christopherson 2631c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2632c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2633c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 2634c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 2635c50d8ae3SPaolo Bonzini 2636c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2637c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2638c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 2639c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 2640c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 2641c50d8ae3SPaolo Bonzini } 2642c50d8ae3SPaolo Bonzini } 2643c50d8ae3SPaolo Bonzini 2644c50d8ae3SPaolo Bonzini return ret; 2645c50d8ae3SPaolo Bonzini } 2646c50d8ae3SPaolo Bonzini 2647c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 2648c50d8ae3SPaolo Bonzini bool no_dirty_log) 2649c50d8ae3SPaolo Bonzini { 2650c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 2651c50d8ae3SPaolo Bonzini 2652c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 2653c50d8ae3SPaolo Bonzini if (!slot) 2654c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 2655c50d8ae3SPaolo Bonzini 2656c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 2657c50d8ae3SPaolo Bonzini } 2658c50d8ae3SPaolo Bonzini 2659c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2660c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2661c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2662c50d8ae3SPaolo Bonzini { 2663c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2664c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 26650a2b64c5SBen Gardon unsigned int access = sp->role.access; 2666c50d8ae3SPaolo Bonzini int i, ret; 2667c50d8ae3SPaolo Bonzini gfn_t gfn; 2668c50d8ae3SPaolo Bonzini 2669c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2670c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2671c50d8ae3SPaolo Bonzini if (!slot) 2672c50d8ae3SPaolo Bonzini return -1; 2673c50d8ae3SPaolo Bonzini 2674c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2675c50d8ae3SPaolo Bonzini if (ret <= 0) 2676c50d8ae3SPaolo Bonzini return -1; 2677c50d8ae3SPaolo Bonzini 2678c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 2679e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 2680c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 2681c50d8ae3SPaolo Bonzini put_page(pages[i]); 2682c50d8ae3SPaolo Bonzini } 2683c50d8ae3SPaolo Bonzini 2684c50d8ae3SPaolo Bonzini return 0; 2685c50d8ae3SPaolo Bonzini } 2686c50d8ae3SPaolo Bonzini 2687c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2688c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2689c50d8ae3SPaolo Bonzini { 2690c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2691c50d8ae3SPaolo Bonzini int i; 2692c50d8ae3SPaolo Bonzini 2693c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2694c50d8ae3SPaolo Bonzini 2695c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2696c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2697c50d8ae3SPaolo Bonzini 2698c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2699c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2700c50d8ae3SPaolo Bonzini if (!start) 2701c50d8ae3SPaolo Bonzini continue; 2702c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2703c50d8ae3SPaolo Bonzini break; 2704c50d8ae3SPaolo Bonzini start = NULL; 2705c50d8ae3SPaolo Bonzini } else if (!start) 2706c50d8ae3SPaolo Bonzini start = spte; 2707c50d8ae3SPaolo Bonzini } 2708c50d8ae3SPaolo Bonzini } 2709c50d8ae3SPaolo Bonzini 2710c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2711c50d8ae3SPaolo Bonzini { 2712c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2713c50d8ae3SPaolo Bonzini 271457354682SSean Christopherson sp = sptep_to_sp(sptep); 2715c50d8ae3SPaolo Bonzini 2716c50d8ae3SPaolo Bonzini /* 2717c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2718c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2719c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2720c50d8ae3SPaolo Bonzini */ 2721c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2722c50d8ae3SPaolo Bonzini return; 2723c50d8ae3SPaolo Bonzini 27243bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2725c50d8ae3SPaolo Bonzini return; 2726c50d8ae3SPaolo Bonzini 27274a42d848SDavid Stevens /* 27284a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 27294a42d848SDavid Stevens * accidentally prefetching those addresses. 27304a42d848SDavid Stevens */ 27314a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 27324a42d848SDavid Stevens return; 27334a42d848SDavid Stevens 2734c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2735c50d8ae3SPaolo Bonzini } 2736c50d8ae3SPaolo Bonzini 27371b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 27381b6d9d9eSSean Christopherson struct kvm_memory_slot *slot) 2739db543216SSean Christopherson { 2740db543216SSean Christopherson unsigned long hva; 2741db543216SSean Christopherson pte_t *pte; 2742db543216SSean Christopherson int level; 2743db543216SSean Christopherson 2744e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 27453bae0459SSean Christopherson return PG_LEVEL_4K; 2746db543216SSean Christopherson 2747293e306eSSean Christopherson /* 2748293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2749293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2750293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2751293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2752293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2753293e306eSSean Christopherson * read-only memslot. 2754293e306eSSean Christopherson */ 2755db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2756db543216SSean Christopherson 27571b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2758db543216SSean Christopherson if (unlikely(!pte)) 27593bae0459SSean Christopherson return PG_LEVEL_4K; 2760db543216SSean Christopherson 2761db543216SSean Christopherson return level; 2762db543216SSean Christopherson } 2763db543216SSean Christopherson 27641b6d9d9eSSean Christopherson int kvm_mmu_max_mapping_level(struct kvm *kvm, struct kvm_memory_slot *slot, 27651b6d9d9eSSean Christopherson gfn_t gfn, kvm_pfn_t pfn, int max_level) 27661b6d9d9eSSean Christopherson { 27671b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 27681b6d9d9eSSean Christopherson 27691b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 27701b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 27711b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 27721b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 27731b6d9d9eSSean Christopherson break; 27741b6d9d9eSSean Christopherson } 27751b6d9d9eSSean Christopherson 27761b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 27771b6d9d9eSSean Christopherson return PG_LEVEL_4K; 27781b6d9d9eSSean Christopherson 27791b6d9d9eSSean Christopherson return host_pfn_mapping_level(kvm, gfn, pfn, slot); 27801b6d9d9eSSean Christopherson } 27811b6d9d9eSSean Christopherson 2782bb18842eSBen Gardon int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 27833cf06612SSean Christopherson int max_level, kvm_pfn_t *pfnp, 27843cf06612SSean Christopherson bool huge_page_disallowed, int *req_level) 27850885904dSSean Christopherson { 2786293e306eSSean Christopherson struct kvm_memory_slot *slot; 27870885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 278817eff019SSean Christopherson kvm_pfn_t mask; 278983f06fa7SSean Christopherson int level; 27900885904dSSean Christopherson 27913cf06612SSean Christopherson *req_level = PG_LEVEL_4K; 27923cf06612SSean Christopherson 27933bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 27943bae0459SSean Christopherson return PG_LEVEL_4K; 279517eff019SSean Christopherson 2796e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 27973bae0459SSean Christopherson return PG_LEVEL_4K; 279817eff019SSean Christopherson 2799293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 2800293e306eSSean Christopherson if (!slot) 28013bae0459SSean Christopherson return PG_LEVEL_4K; 2802293e306eSSean Christopherson 28031b6d9d9eSSean Christopherson level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, gfn, pfn, max_level); 28043bae0459SSean Christopherson if (level == PG_LEVEL_4K) 280583f06fa7SSean Christopherson return level; 280617eff019SSean Christopherson 28073cf06612SSean Christopherson *req_level = level = min(level, max_level); 28083cf06612SSean Christopherson 28093cf06612SSean Christopherson /* 28103cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28113cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28123cf06612SSean Christopherson */ 28133cf06612SSean Christopherson if (huge_page_disallowed) 28143cf06612SSean Christopherson return PG_LEVEL_4K; 28154cd071d1SSean Christopherson 28160885904dSSean Christopherson /* 28174cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 28184cd071d1SSean Christopherson * the pmd can't be split from under us. 28190885904dSSean Christopherson */ 28200885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 28210885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 28224cd071d1SSean Christopherson *pfnp = pfn & ~mask; 282383f06fa7SSean Christopherson 282483f06fa7SSean Christopherson return level; 28250885904dSSean Christopherson } 28260885904dSSean Christopherson 2827bb18842eSBen Gardon void disallowed_hugepage_adjust(u64 spte, gfn_t gfn, int cur_level, 2828bb18842eSBen Gardon kvm_pfn_t *pfnp, int *goal_levelp) 2829c50d8ae3SPaolo Bonzini { 2830bb18842eSBen Gardon int level = *goal_levelp; 2831c50d8ae3SPaolo Bonzini 28327d945312SBen Gardon if (cur_level == level && level > PG_LEVEL_4K && 2833c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2834c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2835c50d8ae3SPaolo Bonzini /* 2836c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2837c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2838c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2839c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2840c50d8ae3SPaolo Bonzini * the address. 2841c50d8ae3SPaolo Bonzini */ 28427d945312SBen Gardon u64 page_mask = KVM_PAGES_PER_HPAGE(level) - 28437d945312SBen Gardon KVM_PAGES_PER_HPAGE(level - 1); 2844c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 2845bb18842eSBen Gardon (*goal_levelp)--; 2846c50d8ae3SPaolo Bonzini } 2847c50d8ae3SPaolo Bonzini } 2848c50d8ae3SPaolo Bonzini 28496c2fd34fSSean Christopherson static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 285083f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 28516c2fd34fSSean Christopherson bool prefault, bool is_tdp) 2852c50d8ae3SPaolo Bonzini { 28536c2fd34fSSean Christopherson bool nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(); 28546c2fd34fSSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 28556c2fd34fSSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 28566c2fd34fSSean Christopherson bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled; 2857c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2858c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 28593cf06612SSean Christopherson int level, req_level, ret; 2860c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 2861c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 2862c50d8ae3SPaolo Bonzini 28630c7a98e3SSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 2864c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2865c50d8ae3SPaolo Bonzini 28663cf06612SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn, 28673cf06612SSean Christopherson huge_page_disallowed, &req_level); 28684cd071d1SSean Christopherson 2869c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 2870c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 2871c50d8ae3SPaolo Bonzini /* 2872c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2873c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2874c50d8ae3SPaolo Bonzini */ 2875dcc70651SSean Christopherson if (nx_huge_page_workaround_enabled) 28767d945312SBen Gardon disallowed_hugepage_adjust(*it.sptep, gfn, it.level, 28777d945312SBen Gardon &pfn, &level); 2878c50d8ae3SPaolo Bonzini 2879c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 2880c50d8ae3SPaolo Bonzini if (it.level == level) 2881c50d8ae3SPaolo Bonzini break; 2882c50d8ae3SPaolo Bonzini 2883c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 2884c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(*it.sptep)) { 2885c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2886c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2887c50d8ae3SPaolo Bonzini 2888c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 28895bcaf3e1SSean Christopherson if (is_tdp && huge_page_disallowed && 28905bcaf3e1SSean Christopherson req_level >= it.level) 2891c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2892c50d8ae3SPaolo Bonzini } 2893c50d8ae3SPaolo Bonzini } 2894c50d8ae3SPaolo Bonzini 2895c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 2896c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 2897c50d8ae3SPaolo Bonzini map_writable); 289812703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 289912703759SSean Christopherson return ret; 290012703759SSean Christopherson 2901c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2902c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2903c50d8ae3SPaolo Bonzini return ret; 2904c50d8ae3SPaolo Bonzini } 2905c50d8ae3SPaolo Bonzini 2906c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2907c50d8ae3SPaolo Bonzini { 2908c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2909c50d8ae3SPaolo Bonzini } 2910c50d8ae3SPaolo Bonzini 2911c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2912c50d8ae3SPaolo Bonzini { 2913c50d8ae3SPaolo Bonzini /* 2914c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2915c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2916c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2917c50d8ae3SPaolo Bonzini */ 2918c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2919c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 2920c50d8ae3SPaolo Bonzini 2921c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 2922c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 2923c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2924c50d8ae3SPaolo Bonzini } 2925c50d8ae3SPaolo Bonzini 2926c50d8ae3SPaolo Bonzini return -EFAULT; 2927c50d8ae3SPaolo Bonzini } 2928c50d8ae3SPaolo Bonzini 2929c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 29300a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 29310a2b64c5SBen Gardon int *ret_val) 2932c50d8ae3SPaolo Bonzini { 2933c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 2934c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 2935c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 2936c50d8ae3SPaolo Bonzini return true; 2937c50d8ae3SPaolo Bonzini } 2938c50d8ae3SPaolo Bonzini 293930ab5901SSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2940c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 2941c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 294230ab5901SSean Christopherson /* 294330ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 294430ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 294530ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 294630ab5901SSean Christopherson */ 294730ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 294830ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 294930ab5901SSean Christopherson return true; 295030ab5901SSean Christopherson } 295130ab5901SSean Christopherson } 2952c50d8ae3SPaolo Bonzini 2953c50d8ae3SPaolo Bonzini return false; 2954c50d8ae3SPaolo Bonzini } 2955c50d8ae3SPaolo Bonzini 2956c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 2957c50d8ae3SPaolo Bonzini { 2958c50d8ae3SPaolo Bonzini /* 2959c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 2960c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 2961c50d8ae3SPaolo Bonzini */ 2962c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 2963c50d8ae3SPaolo Bonzini return false; 2964c50d8ae3SPaolo Bonzini 2965c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 2966c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 2967c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 2968c50d8ae3SPaolo Bonzini return false; 2969c50d8ae3SPaolo Bonzini 2970c50d8ae3SPaolo Bonzini /* 2971c50d8ae3SPaolo Bonzini * #PF can be fast if: 2972c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 2973c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 2974c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 2975c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 2976c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 2977c50d8ae3SPaolo Bonzini * 2978c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 2979c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 2980c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 2981c50d8ae3SPaolo Bonzini * accesses to a present page. 2982c50d8ae3SPaolo Bonzini */ 2983c50d8ae3SPaolo Bonzini 2984c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 2985c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 2986c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 2987c50d8ae3SPaolo Bonzini } 2988c50d8ae3SPaolo Bonzini 2989c50d8ae3SPaolo Bonzini /* 2990c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 2991c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 2992c50d8ae3SPaolo Bonzini */ 2993c50d8ae3SPaolo Bonzini static bool 2994c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 2995c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 2996c50d8ae3SPaolo Bonzini { 2997c50d8ae3SPaolo Bonzini gfn_t gfn; 2998c50d8ae3SPaolo Bonzini 2999c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3000c50d8ae3SPaolo Bonzini 3001c50d8ae3SPaolo Bonzini /* 3002c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3003c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3004c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3005c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3006c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3007c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3008c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3009c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3010c50d8ae3SPaolo Bonzini * 3011c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3012c50d8ae3SPaolo Bonzini */ 3013c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3014c50d8ae3SPaolo Bonzini return false; 3015c50d8ae3SPaolo Bonzini 3016c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3017c50d8ae3SPaolo Bonzini /* 3018c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3019c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3020c50d8ae3SPaolo Bonzini */ 3021c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3022c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3023c50d8ae3SPaolo Bonzini } 3024c50d8ae3SPaolo Bonzini 3025c50d8ae3SPaolo Bonzini return true; 3026c50d8ae3SPaolo Bonzini } 3027c50d8ae3SPaolo Bonzini 3028c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3029c50d8ae3SPaolo Bonzini { 3030c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3031c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3032c50d8ae3SPaolo Bonzini 3033c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3034c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3035c50d8ae3SPaolo Bonzini 3036c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3037c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3038c50d8ae3SPaolo Bonzini } 3039c50d8ae3SPaolo Bonzini 3040c50d8ae3SPaolo Bonzini /* 3041c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3042c50d8ae3SPaolo Bonzini */ 3043c4371c2aSSean Christopherson static int fast_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 3044c50d8ae3SPaolo Bonzini u32 error_code) 3045c50d8ae3SPaolo Bonzini { 3046c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3047c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3048c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3049c50d8ae3SPaolo Bonzini u64 spte = 0ull; 3050c50d8ae3SPaolo Bonzini uint retry_count = 0; 3051c50d8ae3SPaolo Bonzini 3052c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3053c4371c2aSSean Christopherson return ret; 3054c50d8ae3SPaolo Bonzini 3055c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3056c50d8ae3SPaolo Bonzini 3057c50d8ae3SPaolo Bonzini do { 3058c50d8ae3SPaolo Bonzini u64 new_spte; 3059c50d8ae3SPaolo Bonzini 3060736c291cSSean Christopherson for_each_shadow_entry_lockless(vcpu, cr2_or_gpa, iterator, spte) 3061f9fa2509SSean Christopherson if (!is_shadow_present_pte(spte)) 3062c50d8ae3SPaolo Bonzini break; 3063c50d8ae3SPaolo Bonzini 3064ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3065ec89e643SSean Christopherson break; 3066ec89e643SSean Christopherson 306757354682SSean Christopherson sp = sptep_to_sp(iterator.sptep); 3068c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3069c50d8ae3SPaolo Bonzini break; 3070c50d8ae3SPaolo Bonzini 3071c50d8ae3SPaolo Bonzini /* 3072c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3073c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3074c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3075c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3076c50d8ae3SPaolo Bonzini * current CPU took the fault. 3077c50d8ae3SPaolo Bonzini * 3078c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3079c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3080c50d8ae3SPaolo Bonzini */ 3081c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3082c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3083c50d8ae3SPaolo Bonzini break; 3084c50d8ae3SPaolo Bonzini } 3085c50d8ae3SPaolo Bonzini 3086c50d8ae3SPaolo Bonzini new_spte = spte; 3087c50d8ae3SPaolo Bonzini 3088c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3089c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3090c50d8ae3SPaolo Bonzini 3091c50d8ae3SPaolo Bonzini /* 3092c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3093c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3094c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3095c50d8ae3SPaolo Bonzini */ 3096c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3097e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3098c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3099c50d8ae3SPaolo Bonzini 3100c50d8ae3SPaolo Bonzini /* 3101c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3102c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3103c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3104c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3105c50d8ae3SPaolo Bonzini * 3106c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3107c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3108c50d8ae3SPaolo Bonzini * 3109c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3110c50d8ae3SPaolo Bonzini */ 31113bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3112c50d8ae3SPaolo Bonzini break; 3113c50d8ae3SPaolo Bonzini } 3114c50d8ae3SPaolo Bonzini 3115c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3116c50d8ae3SPaolo Bonzini if (new_spte == spte || 3117c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3118c50d8ae3SPaolo Bonzini break; 3119c50d8ae3SPaolo Bonzini 3120c50d8ae3SPaolo Bonzini /* 3121c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3122c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 31233ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3124c50d8ae3SPaolo Bonzini */ 3125c4371c2aSSean Christopherson if (fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte, 3126c4371c2aSSean Christopherson new_spte)) { 3127c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3128c50d8ae3SPaolo Bonzini break; 3129c4371c2aSSean Christopherson } 3130c50d8ae3SPaolo Bonzini 3131c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3132c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3133c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3134c50d8ae3SPaolo Bonzini break; 3135c50d8ae3SPaolo Bonzini } 3136c50d8ae3SPaolo Bonzini 3137c50d8ae3SPaolo Bonzini } while (true); 3138c50d8ae3SPaolo Bonzini 3139736c291cSSean Christopherson trace_fast_page_fault(vcpu, cr2_or_gpa, error_code, iterator.sptep, 3140c4371c2aSSean Christopherson spte, ret); 3141c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3142c50d8ae3SPaolo Bonzini 3143c4371c2aSSean Christopherson return ret; 3144c50d8ae3SPaolo Bonzini } 3145c50d8ae3SPaolo Bonzini 3146c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3147c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3148c50d8ae3SPaolo Bonzini { 3149c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3150c50d8ae3SPaolo Bonzini 3151c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3152c50d8ae3SPaolo Bonzini return; 3153c50d8ae3SPaolo Bonzini 3154e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 315502c00b3aSBen Gardon 315602c00b3aSBen Gardon if (kvm_mmu_put_root(kvm, sp)) { 3157897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 315802c00b3aSBen Gardon kvm_tdp_mmu_free_root(kvm, sp); 315902c00b3aSBen Gardon else if (sp->role.invalid) 3160c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 316102c00b3aSBen Gardon } 3162c50d8ae3SPaolo Bonzini 3163c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3164c50d8ae3SPaolo Bonzini } 3165c50d8ae3SPaolo Bonzini 3166c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3167c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3168c50d8ae3SPaolo Bonzini ulong roots_to_free) 3169c50d8ae3SPaolo Bonzini { 31704d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3171c50d8ae3SPaolo Bonzini int i; 3172c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3173c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3174c50d8ae3SPaolo Bonzini 3175c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3176c50d8ae3SPaolo Bonzini 3177c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3178c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3179c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3180c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3181c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3182c50d8ae3SPaolo Bonzini break; 3183c50d8ae3SPaolo Bonzini 3184c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3185c50d8ae3SPaolo Bonzini return; 3186c50d8ae3SPaolo Bonzini } 3187c50d8ae3SPaolo Bonzini 3188531810caSBen Gardon write_lock(&kvm->mmu_lock); 3189c50d8ae3SPaolo Bonzini 3190c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3191c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 31924d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3193c50d8ae3SPaolo Bonzini &invalid_list); 3194c50d8ae3SPaolo Bonzini 3195c50d8ae3SPaolo Bonzini if (free_active_root) { 3196c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3197c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 31984d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 319904d45551SSean Christopherson } else if (mmu->pae_root) { 3200c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3201c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3202c834e5e4SSean Christopherson continue; 3203c834e5e4SSean Christopherson 3204c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3205c50d8ae3SPaolo Bonzini &invalid_list); 3206c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3207c834e5e4SSean Christopherson } 3208c50d8ae3SPaolo Bonzini } 320904d45551SSean Christopherson mmu->root_hpa = INVALID_PAGE; 3210be01e8e2SSean Christopherson mmu->root_pgd = 0; 3211c50d8ae3SPaolo Bonzini } 3212c50d8ae3SPaolo Bonzini 32134d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3214531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3215c50d8ae3SPaolo Bonzini } 3216c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3217c50d8ae3SPaolo Bonzini 3218c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3219c50d8ae3SPaolo Bonzini { 3220c50d8ae3SPaolo Bonzini int ret = 0; 3221c50d8ae3SPaolo Bonzini 3222995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3223c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3224c50d8ae3SPaolo Bonzini ret = 1; 3225c50d8ae3SPaolo Bonzini } 3226c50d8ae3SPaolo Bonzini 3227c50d8ae3SPaolo Bonzini return ret; 3228c50d8ae3SPaolo Bonzini } 3229c50d8ae3SPaolo Bonzini 32308123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 32318123f265SSean Christopherson u8 level, bool direct) 3232c50d8ae3SPaolo Bonzini { 3233c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 32348123f265SSean Christopherson 32358123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 32368123f265SSean Christopherson ++sp->root_count; 32378123f265SSean Christopherson 32388123f265SSean Christopherson return __pa(sp->spt); 32398123f265SSean Christopherson } 32408123f265SSean Christopherson 32418123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 32428123f265SSean Christopherson { 3243b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3244b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 32458123f265SSean Christopherson hpa_t root; 3246c50d8ae3SPaolo Bonzini unsigned i; 32474a38162eSPaolo Bonzini int r; 32484a38162eSPaolo Bonzini 32494a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 32504a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 32514a38162eSPaolo Bonzini if (r < 0) 32524a38162eSPaolo Bonzini goto out_unlock; 3253c50d8ae3SPaolo Bonzini 3254897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 325502c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3256b37233c9SSean Christopherson mmu->root_hpa = root; 325702c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 32586e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3259b37233c9SSean Christopherson mmu->root_hpa = root; 32608123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 32614a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 32624a38162eSPaolo Bonzini r = -EIO; 32634a38162eSPaolo Bonzini goto out_unlock; 32644a38162eSPaolo Bonzini } 326573ad1606SSean Christopherson 3266c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3267c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3268c50d8ae3SPaolo Bonzini 32698123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 32708123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 327117e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 327217e368d9SSean Christopherson shadow_me_mask; 3273c50d8ae3SPaolo Bonzini } 3274b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 327573ad1606SSean Christopherson } else { 327673ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 32774a38162eSPaolo Bonzini r = -EIO; 32784a38162eSPaolo Bonzini goto out_unlock; 327973ad1606SSean Christopherson } 32803651c7fcSSean Christopherson 3281be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3282b37233c9SSean Christopherson mmu->root_pgd = 0; 32834a38162eSPaolo Bonzini out_unlock: 32844a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 32854a38162eSPaolo Bonzini return r; 3286c50d8ae3SPaolo Bonzini } 3287c50d8ae3SPaolo Bonzini 3288c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3289c50d8ae3SPaolo Bonzini { 3290b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 32916e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3292be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 32938123f265SSean Christopherson hpa_t root; 32944a38162eSPaolo Bonzini unsigned i; 32954a38162eSPaolo Bonzini int r; 3296c50d8ae3SPaolo Bonzini 3297b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3298be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3299c50d8ae3SPaolo Bonzini 3300c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3301c50d8ae3SPaolo Bonzini return 1; 3302c50d8ae3SPaolo Bonzini 33034a38162eSPaolo Bonzini /* 33044a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 33054a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 33064a38162eSPaolo Bonzini */ 33076e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 33086e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 33096e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 33106e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 33116e0918aeSSean Christopherson continue; 33126e0918aeSSean Christopherson 33136e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 33146e0918aeSSean Christopherson return 1; 33156e0918aeSSean Christopherson } 33166e0918aeSSean Christopherson } 33176e0918aeSSean Christopherson 33184a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 33194a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 33204a38162eSPaolo Bonzini if (r < 0) 33214a38162eSPaolo Bonzini goto out_unlock; 33224a38162eSPaolo Bonzini 3323c50d8ae3SPaolo Bonzini /* 3324c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3325c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3326c50d8ae3SPaolo Bonzini */ 3327b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 33288123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3329b37233c9SSean Christopherson mmu->shadow_root_level, false); 3330b37233c9SSean Christopherson mmu->root_hpa = root; 3331be01e8e2SSean Christopherson goto set_root_pgd; 3332c50d8ae3SPaolo Bonzini } 3333c50d8ae3SPaolo Bonzini 33344a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 33354a38162eSPaolo Bonzini r = -EIO; 33364a38162eSPaolo Bonzini goto out_unlock; 33374a38162eSPaolo Bonzini } 333873ad1606SSean Christopherson 3339c50d8ae3SPaolo Bonzini /* 3340c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3341c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3342c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3343c50d8ae3SPaolo Bonzini */ 334417e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3345748e52b9SSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3346c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3347c50d8ae3SPaolo Bonzini 33484a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->lm_root)) { 33494a38162eSPaolo Bonzini r = -EIO; 33504a38162eSPaolo Bonzini goto out_unlock; 33514a38162eSPaolo Bonzini } 335273ad1606SSean Christopherson 3353748e52b9SSean Christopherson mmu->lm_root[0] = __pa(mmu->pae_root) | pm_mask; 335404d45551SSean Christopherson } 335504d45551SSean Christopherson 3356c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3357c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 33586e6ec584SSean Christopherson 3359b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 33606e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3361c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3362c50d8ae3SPaolo Bonzini continue; 3363c50d8ae3SPaolo Bonzini } 33646e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3365c50d8ae3SPaolo Bonzini } 3366c50d8ae3SPaolo Bonzini 33678123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 33688123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3369b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3370c50d8ae3SPaolo Bonzini } 3371c50d8ae3SPaolo Bonzini 3372ba0a194fSSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 3373b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->lm_root); 3374ba0a194fSSean Christopherson else 3375ba0a194fSSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 3376c50d8ae3SPaolo Bonzini 3377be01e8e2SSean Christopherson set_root_pgd: 3378b37233c9SSean Christopherson mmu->root_pgd = root_pgd; 33794a38162eSPaolo Bonzini out_unlock: 33804a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3381c50d8ae3SPaolo Bonzini 3382c50d8ae3SPaolo Bonzini return 0; 3383c50d8ae3SPaolo Bonzini } 3384c50d8ae3SPaolo Bonzini 3385748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3386748e52b9SSean Christopherson { 3387748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3388748e52b9SSean Christopherson u64 *lm_root, *pae_root; 3389748e52b9SSean Christopherson 3390748e52b9SSean Christopherson /* 3391748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3392748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3393748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3394748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3395748e52b9SSean Christopherson */ 3396748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3397748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3398748e52b9SSean Christopherson return 0; 3399748e52b9SSean Christopherson 3400748e52b9SSean Christopherson /* 3401748e52b9SSean Christopherson * This mess only works with 4-level paging and needs to be updated to 3402748e52b9SSean Christopherson * work with 5-level paging. 3403748e52b9SSean Christopherson */ 3404748e52b9SSean Christopherson if (WARN_ON_ONCE(mmu->shadow_root_level != PT64_ROOT_4LEVEL)) 3405748e52b9SSean Christopherson return -EIO; 3406748e52b9SSean Christopherson 3407748e52b9SSean Christopherson if (mmu->pae_root && mmu->lm_root) 3408748e52b9SSean Christopherson return 0; 3409748e52b9SSean Christopherson 3410748e52b9SSean Christopherson /* 3411748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3412748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3413748e52b9SSean Christopherson */ 3414748e52b9SSean Christopherson if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->lm_root)) 3415748e52b9SSean Christopherson return -EIO; 3416748e52b9SSean Christopherson 34174a98623dSSean Christopherson /* 34184a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 34194a98623dSSean Christopherson * doesn't need to be decrypted. 34204a98623dSSean Christopherson */ 3421748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3422748e52b9SSean Christopherson if (!pae_root) 3423748e52b9SSean Christopherson return -ENOMEM; 3424748e52b9SSean Christopherson 3425748e52b9SSean Christopherson lm_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3426748e52b9SSean Christopherson if (!lm_root) { 3427748e52b9SSean Christopherson free_page((unsigned long)pae_root); 3428748e52b9SSean Christopherson return -ENOMEM; 3429748e52b9SSean Christopherson } 3430748e52b9SSean Christopherson 3431748e52b9SSean Christopherson mmu->pae_root = pae_root; 3432748e52b9SSean Christopherson mmu->lm_root = lm_root; 3433748e52b9SSean Christopherson 3434748e52b9SSean Christopherson return 0; 3435748e52b9SSean Christopherson } 3436748e52b9SSean Christopherson 3437c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3438c50d8ae3SPaolo Bonzini { 3439c50d8ae3SPaolo Bonzini int i; 3440c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3441c50d8ae3SPaolo Bonzini 3442c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3443c50d8ae3SPaolo Bonzini return; 3444c50d8ae3SPaolo Bonzini 3445c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3446c50d8ae3SPaolo Bonzini return; 3447c50d8ae3SPaolo Bonzini 3448c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3449c50d8ae3SPaolo Bonzini 3450c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3451c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3452e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3453c50d8ae3SPaolo Bonzini 3454c50d8ae3SPaolo Bonzini /* 3455c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3456c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3457c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3458c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3459c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3460c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 3461c50d8ae3SPaolo Bonzini * mmu_need_write_protect() describe what could go wrong if this 3462c50d8ae3SPaolo Bonzini * requirement isn't satisfied. 3463c50d8ae3SPaolo Bonzini */ 3464c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3465c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3466c50d8ae3SPaolo Bonzini return; 3467c50d8ae3SPaolo Bonzini 3468531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3469c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3470c50d8ae3SPaolo Bonzini 3471c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3472c50d8ae3SPaolo Bonzini 3473c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3474531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3475c50d8ae3SPaolo Bonzini return; 3476c50d8ae3SPaolo Bonzini } 3477c50d8ae3SPaolo Bonzini 3478531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3479c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3480c50d8ae3SPaolo Bonzini 3481c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3482c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3483c50d8ae3SPaolo Bonzini 3484c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3485c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3486e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3487c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3488c50d8ae3SPaolo Bonzini } 3489c50d8ae3SPaolo Bonzini } 3490c50d8ae3SPaolo Bonzini 3491c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3492531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3493c50d8ae3SPaolo Bonzini } 3494c50d8ae3SPaolo Bonzini 3495736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3496c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3497c50d8ae3SPaolo Bonzini { 3498c50d8ae3SPaolo Bonzini if (exception) 3499c50d8ae3SPaolo Bonzini exception->error_code = 0; 3500c50d8ae3SPaolo Bonzini return vaddr; 3501c50d8ae3SPaolo Bonzini } 3502c50d8ae3SPaolo Bonzini 3503736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3504c50d8ae3SPaolo Bonzini u32 access, 3505c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3506c50d8ae3SPaolo Bonzini { 3507c50d8ae3SPaolo Bonzini if (exception) 3508c50d8ae3SPaolo Bonzini exception->error_code = 0; 3509c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3510c50d8ae3SPaolo Bonzini } 3511c50d8ae3SPaolo Bonzini 3512c50d8ae3SPaolo Bonzini static bool 3513c50d8ae3SPaolo Bonzini __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) 3514c50d8ae3SPaolo Bonzini { 3515b5c3c1b3SSean Christopherson int bit7 = (pte >> 7) & 1; 3516c50d8ae3SPaolo Bonzini 3517b5c3c1b3SSean Christopherson return pte & rsvd_check->rsvd_bits_mask[bit7][level-1]; 3518c50d8ae3SPaolo Bonzini } 3519c50d8ae3SPaolo Bonzini 3520b5c3c1b3SSean Christopherson static bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, u64 pte) 3521c50d8ae3SPaolo Bonzini { 3522b5c3c1b3SSean Christopherson return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f); 3523c50d8ae3SPaolo Bonzini } 3524c50d8ae3SPaolo Bonzini 3525c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3526c50d8ae3SPaolo Bonzini { 3527c50d8ae3SPaolo Bonzini /* 3528c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3529c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3530c50d8ae3SPaolo Bonzini */ 3531c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3532c50d8ae3SPaolo Bonzini return false; 3533c50d8ae3SPaolo Bonzini 3534c50d8ae3SPaolo Bonzini if (direct) 3535c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3536c50d8ae3SPaolo Bonzini 3537c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3538c50d8ae3SPaolo Bonzini } 3539c50d8ae3SPaolo Bonzini 354095fb5b02SBen Gardon /* 354195fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 354295fb5b02SBen Gardon * That SPTE may be non-present. 354395fb5b02SBen Gardon */ 354439b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3545c50d8ae3SPaolo Bonzini { 3546c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 35472aa07893SSean Christopherson int leaf = -1; 354895fb5b02SBen Gardon u64 spte; 3549c50d8ae3SPaolo Bonzini 3550c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3551c50d8ae3SPaolo Bonzini 355239b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 355339b4d43eSSean Christopherson *root_level = iterator.level; 3554c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3555c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 355695fb5b02SBen Gardon leaf = iterator.level; 3557c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3558c50d8ae3SPaolo Bonzini 3559dde81f94SSean Christopherson sptes[leaf] = spte; 3560c50d8ae3SPaolo Bonzini 3561c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3562c50d8ae3SPaolo Bonzini break; 356395fb5b02SBen Gardon } 356495fb5b02SBen Gardon 356595fb5b02SBen Gardon walk_shadow_page_lockless_end(vcpu); 356695fb5b02SBen Gardon 356795fb5b02SBen Gardon return leaf; 356895fb5b02SBen Gardon } 356995fb5b02SBen Gardon 35709aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 357195fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 357295fb5b02SBen Gardon { 3573dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 357495fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 357539b4d43eSSean Christopherson int root, leaf, level; 357695fb5b02SBen Gardon bool reserved = false; 357795fb5b02SBen Gardon 357895fb5b02SBen Gardon if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) { 357995fb5b02SBen Gardon *sptep = 0ull; 358095fb5b02SBen Gardon return reserved; 358195fb5b02SBen Gardon } 358295fb5b02SBen Gardon 358395fb5b02SBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 358439b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 358595fb5b02SBen Gardon else 358639b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 358795fb5b02SBen Gardon 35882aa07893SSean Christopherson if (unlikely(leaf < 0)) { 35892aa07893SSean Christopherson *sptep = 0ull; 35902aa07893SSean Christopherson return reserved; 35912aa07893SSean Christopherson } 35922aa07893SSean Christopherson 35939aa41879SSean Christopherson *sptep = sptes[leaf]; 35949aa41879SSean Christopherson 35959aa41879SSean Christopherson /* 35969aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 35979aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 35989aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 35999aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 36009aa41879SSean Christopherson */ 36019aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 36029aa41879SSean Christopherson leaf++; 360395fb5b02SBen Gardon 360495fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 360595fb5b02SBen Gardon 36069aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3607b5c3c1b3SSean Christopherson /* 3608b5c3c1b3SSean Christopherson * Use a bitwise-OR instead of a logical-OR to aggregate the 3609b5c3c1b3SSean Christopherson * reserved bit and EPT's invalid memtype/XWR checks to avoid 3610b5c3c1b3SSean Christopherson * adding a Jcc in the loop. 3611b5c3c1b3SSean Christopherson */ 3612dde81f94SSean Christopherson reserved |= __is_bad_mt_xwr(rsvd_check, sptes[level]) | 3613dde81f94SSean Christopherson __is_rsvd_bits_set(rsvd_check, sptes[level], level); 3614c50d8ae3SPaolo Bonzini 3615c50d8ae3SPaolo Bonzini if (reserved) { 3616bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3617c50d8ae3SPaolo Bonzini __func__, addr); 361895fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3619bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3620bb4cdf3aSSean Christopherson sptes[level], level, 3621bb4cdf3aSSean Christopherson rsvd_check->rsvd_bits_mask[(sptes[level] >> 7) & 1][level-1]); 3622c50d8ae3SPaolo Bonzini } 3623ddce6208SSean Christopherson 3624c50d8ae3SPaolo Bonzini return reserved; 3625c50d8ae3SPaolo Bonzini } 3626c50d8ae3SPaolo Bonzini 3627c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3628c50d8ae3SPaolo Bonzini { 3629c50d8ae3SPaolo Bonzini u64 spte; 3630c50d8ae3SPaolo Bonzini bool reserved; 3631c50d8ae3SPaolo Bonzini 3632c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3633c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3634c50d8ae3SPaolo Bonzini 363595fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3636c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3637c50d8ae3SPaolo Bonzini return -EINVAL; 3638c50d8ae3SPaolo Bonzini 3639c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3640c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 36410a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3642c50d8ae3SPaolo Bonzini 3643c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3644c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3645c50d8ae3SPaolo Bonzini 3646c50d8ae3SPaolo Bonzini if (direct) 3647c50d8ae3SPaolo Bonzini addr = 0; 3648c50d8ae3SPaolo Bonzini 3649c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3650c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3651c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3652c50d8ae3SPaolo Bonzini } 3653c50d8ae3SPaolo Bonzini 3654c50d8ae3SPaolo Bonzini /* 3655c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3656c50d8ae3SPaolo Bonzini * the address. 3657c50d8ae3SPaolo Bonzini */ 3658c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3659c50d8ae3SPaolo Bonzini } 3660c50d8ae3SPaolo Bonzini 3661c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3662c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 3663c50d8ae3SPaolo Bonzini { 3664c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3665c50d8ae3SPaolo Bonzini return false; 3666c50d8ae3SPaolo Bonzini 3667c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 3668c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 3669c50d8ae3SPaolo Bonzini return false; 3670c50d8ae3SPaolo Bonzini 3671c50d8ae3SPaolo Bonzini /* 3672c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3673c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3674c50d8ae3SPaolo Bonzini */ 3675c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 3676c50d8ae3SPaolo Bonzini return true; 3677c50d8ae3SPaolo Bonzini 3678c50d8ae3SPaolo Bonzini return false; 3679c50d8ae3SPaolo Bonzini } 3680c50d8ae3SPaolo Bonzini 3681c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3682c50d8ae3SPaolo Bonzini { 3683c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3684c50d8ae3SPaolo Bonzini u64 spte; 3685c50d8ae3SPaolo Bonzini 3686c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3687c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 3688c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3689c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3690c50d8ae3SPaolo Bonzini break; 3691c50d8ae3SPaolo Bonzini } 3692c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3693c50d8ae3SPaolo Bonzini } 3694c50d8ae3SPaolo Bonzini 3695e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 36969f1a8526SSean Christopherson gfn_t gfn) 3697c50d8ae3SPaolo Bonzini { 3698c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3699c50d8ae3SPaolo Bonzini 3700c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3701c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3702c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3703d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3704c50d8ae3SPaolo Bonzini 37059f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 37069f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3707c50d8ae3SPaolo Bonzini } 3708c50d8ae3SPaolo Bonzini 3709c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 37104a42d848SDavid Stevens gpa_t cr2_or_gpa, kvm_pfn_t *pfn, hva_t *hva, 37114a42d848SDavid Stevens bool write, bool *writable) 3712c50d8ae3SPaolo Bonzini { 3713c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 3714c50d8ae3SPaolo Bonzini bool async; 3715c50d8ae3SPaolo Bonzini 3716e0c37868SSean Christopherson /* 3717e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3718e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3719e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3720e0c37868SSean Christopherson */ 3721e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 3722e0c37868SSean Christopherson return true; 3723e0c37868SSean Christopherson 3724c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 3725c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 3726c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 3727c583eed6SSean Christopherson *writable = false; 3728c50d8ae3SPaolo Bonzini return false; 3729c50d8ae3SPaolo Bonzini } 3730c50d8ae3SPaolo Bonzini 3731c50d8ae3SPaolo Bonzini async = false; 37324a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, 37334a42d848SDavid Stevens write, writable, hva); 3734c50d8ae3SPaolo Bonzini if (!async) 3735c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3736c50d8ae3SPaolo Bonzini 3737c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 37389f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 3739c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 37409f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 3741c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 3742c50d8ae3SPaolo Bonzini return true; 37439f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 3744c50d8ae3SPaolo Bonzini return true; 3745c50d8ae3SPaolo Bonzini } 3746c50d8ae3SPaolo Bonzini 37474a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, 37484a42d848SDavid Stevens write, writable, hva); 3749c50d8ae3SPaolo Bonzini return false; 3750c50d8ae3SPaolo Bonzini } 3751c50d8ae3SPaolo Bonzini 37520f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 37530f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 3754c50d8ae3SPaolo Bonzini { 3755367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 37560f90e1c1SSean Christopherson bool map_writable; 3757c50d8ae3SPaolo Bonzini 37580f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 37590f90e1c1SSean Christopherson unsigned long mmu_seq; 37600f90e1c1SSean Christopherson kvm_pfn_t pfn; 37614a42d848SDavid Stevens hva_t hva; 376283f06fa7SSean Christopherson int r; 3763c50d8ae3SPaolo Bonzini 3764c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 3765c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3766c50d8ae3SPaolo Bonzini 3767bb18842eSBen Gardon if (!is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) { 3768c4371c2aSSean Christopherson r = fast_page_fault(vcpu, gpa, error_code); 3769c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3770c4371c2aSSean Christopherson return r; 3771bb18842eSBen Gardon } 377283291445SSean Christopherson 3773378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3774c50d8ae3SPaolo Bonzini if (r) 3775c50d8ae3SPaolo Bonzini return r; 3776c50d8ae3SPaolo Bonzini 3777367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3778367fd790SSean Christopherson smp_rmb(); 3779367fd790SSean Christopherson 37804a42d848SDavid Stevens if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, &hva, 37814a42d848SDavid Stevens write, &map_writable)) 3782367fd790SSean Christopherson return RET_PF_RETRY; 3783367fd790SSean Christopherson 37840f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 3785367fd790SSean Christopherson return r; 3786367fd790SSean Christopherson 3787367fd790SSean Christopherson r = RET_PF_RETRY; 3788a2855afcSBen Gardon 3789a2855afcSBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 3790a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3791a2855afcSBen Gardon else 3792531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3793a2855afcSBen Gardon 37944a42d848SDavid Stevens if (!is_noslot_pfn(pfn) && mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, hva)) 3795367fd790SSean Christopherson goto out_unlock; 37967bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 37977bd7ded6SSean Christopherson if (r) 3798367fd790SSean Christopherson goto out_unlock; 3799bb18842eSBen Gardon 3800bb18842eSBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 3801bb18842eSBen Gardon r = kvm_tdp_mmu_map(vcpu, gpa, error_code, map_writable, max_level, 3802bb18842eSBen Gardon pfn, prefault); 3803bb18842eSBen Gardon else 38046c2fd34fSSean Christopherson r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, 38056c2fd34fSSean Christopherson prefault, is_tdp); 38060f90e1c1SSean Christopherson 3807367fd790SSean Christopherson out_unlock: 3808a2855afcSBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 3809a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 3810a2855afcSBen Gardon else 3811531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3812367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 3813367fd790SSean Christopherson return r; 3814c50d8ae3SPaolo Bonzini } 3815c50d8ae3SPaolo Bonzini 38160f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 38170f90e1c1SSean Christopherson u32 error_code, bool prefault) 38180f90e1c1SSean Christopherson { 38190f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 38200f90e1c1SSean Christopherson 38210f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 38220f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 38233bae0459SSean Christopherson PG_LEVEL_2M, false); 38240f90e1c1SSean Christopherson } 38250f90e1c1SSean Christopherson 3826c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 3827c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 3828c50d8ae3SPaolo Bonzini { 3829c50d8ae3SPaolo Bonzini int r = 1; 38309ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 3831c50d8ae3SPaolo Bonzini 3832736c291cSSean Christopherson #ifndef CONFIG_X86_64 3833736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 3834736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 3835736c291cSSean Christopherson return -EFAULT; 3836736c291cSSean Christopherson #endif 3837736c291cSSean Christopherson 3838c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 38399ce372b3SVitaly Kuznetsov if (!flags) { 3840c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 3841c50d8ae3SPaolo Bonzini 3842c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 3843c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 3844c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 3845c50d8ae3SPaolo Bonzini insn_len); 38469ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 384768fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 3848c50d8ae3SPaolo Bonzini local_irq_disable(); 38496bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 3850c50d8ae3SPaolo Bonzini local_irq_enable(); 38519ce372b3SVitaly Kuznetsov } else { 38529ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 3853c50d8ae3SPaolo Bonzini } 38549ce372b3SVitaly Kuznetsov 3855c50d8ae3SPaolo Bonzini return r; 3856c50d8ae3SPaolo Bonzini } 3857c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 3858c50d8ae3SPaolo Bonzini 38597a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 3860c50d8ae3SPaolo Bonzini bool prefault) 3861c50d8ae3SPaolo Bonzini { 3862cb9b88c6SSean Christopherson int max_level; 3863c50d8ae3SPaolo Bonzini 3864e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 38653bae0459SSean Christopherson max_level > PG_LEVEL_4K; 3866cb9b88c6SSean Christopherson max_level--) { 3867cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 38680f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 3869c50d8ae3SPaolo Bonzini 3870cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 3871cb9b88c6SSean Christopherson break; 3872c50d8ae3SPaolo Bonzini } 3873c50d8ae3SPaolo Bonzini 38740f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 38750f90e1c1SSean Christopherson max_level, true); 3876c50d8ae3SPaolo Bonzini } 3877c50d8ae3SPaolo Bonzini 3878c50d8ae3SPaolo Bonzini static void nonpaging_init_context(struct kvm_vcpu *vcpu, 3879c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 3880c50d8ae3SPaolo Bonzini { 3881c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 3882c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 3883c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 38845efac074SPaolo Bonzini context->invlpg = NULL; 3885c50d8ae3SPaolo Bonzini context->root_level = 0; 3886c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 3887c50d8ae3SPaolo Bonzini context->direct_map = true; 3888c50d8ae3SPaolo Bonzini context->nx = false; 3889c50d8ae3SPaolo Bonzini } 3890c50d8ae3SPaolo Bonzini 3891be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 38920be44352SSean Christopherson union kvm_mmu_page_role role) 38930be44352SSean Christopherson { 3894be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 3895e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 3896e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 38970be44352SSean Christopherson } 38980be44352SSean Christopherson 3899c50d8ae3SPaolo Bonzini /* 3900be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 3901c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 3902c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 3903c50d8ae3SPaolo Bonzini * returned. 3904c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 3905c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 3906c50d8ae3SPaolo Bonzini */ 3907be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3908c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 3909c50d8ae3SPaolo Bonzini { 3910c50d8ae3SPaolo Bonzini uint i; 3911c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 3912c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 3913c50d8ae3SPaolo Bonzini 3914be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 3915c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 3916c50d8ae3SPaolo Bonzini 3917be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 39180be44352SSean Christopherson return true; 39190be44352SSean Christopherson 3920c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 3921c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 3922c50d8ae3SPaolo Bonzini 3923be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 3924c50d8ae3SPaolo Bonzini break; 3925c50d8ae3SPaolo Bonzini } 3926c50d8ae3SPaolo Bonzini 3927c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 3928be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 3929c50d8ae3SPaolo Bonzini 3930c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 3931c50d8ae3SPaolo Bonzini } 3932c50d8ae3SPaolo Bonzini 3933be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3934b869855bSSean Christopherson union kvm_mmu_page_role new_role) 3935c50d8ae3SPaolo Bonzini { 3936c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 3937c50d8ae3SPaolo Bonzini 3938c50d8ae3SPaolo Bonzini /* 3939c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 3940c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 3941c50d8ae3SPaolo Bonzini * later if necessary. 3942c50d8ae3SPaolo Bonzini */ 3943c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3944b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 3945fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 3946c50d8ae3SPaolo Bonzini 3947c50d8ae3SPaolo Bonzini return false; 3948c50d8ae3SPaolo Bonzini } 3949c50d8ae3SPaolo Bonzini 3950be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3951c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role, 39524a632ac6SSean Christopherson bool skip_tlb_flush, bool skip_mmu_sync) 3953c50d8ae3SPaolo Bonzini { 3954be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 3955b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 3956b869855bSSean Christopherson return; 3957c50d8ae3SPaolo Bonzini } 3958c50d8ae3SPaolo Bonzini 3959c50d8ae3SPaolo Bonzini /* 3960b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 3961b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 3962b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 3963b869855bSSean Christopherson * free the root set here and allocate a new one. 3964b869855bSSean Christopherson */ 3965b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 3966b869855bSSean Christopherson 396771fe7013SSean Christopherson if (!skip_mmu_sync || force_flush_and_sync_on_reuse) 3968b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 396971fe7013SSean Christopherson if (!skip_tlb_flush || force_flush_and_sync_on_reuse) 3970b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 3971b869855bSSean Christopherson 3972b869855bSSean Christopherson /* 3973b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 3974b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 3975b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 3976b869855bSSean Christopherson * the shadow page tables. 3977c50d8ae3SPaolo Bonzini */ 3978c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3979c50d8ae3SPaolo Bonzini 3980daa5b6c1SBen Gardon /* 3981daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 3982daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 3983daa5b6c1SBen Gardon */ 3984daa5b6c1SBen Gardon if (!new_role.direct) 3985daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 3986daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 3987c50d8ae3SPaolo Bonzini } 3988c50d8ae3SPaolo Bonzini 3989be01e8e2SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 39904a632ac6SSean Christopherson bool skip_mmu_sync) 3991c50d8ae3SPaolo Bonzini { 3992be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu), 39934a632ac6SSean Christopherson skip_tlb_flush, skip_mmu_sync); 3994c50d8ae3SPaolo Bonzini } 3995be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 3996c50d8ae3SPaolo Bonzini 3997c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 3998c50d8ae3SPaolo Bonzini { 3999c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4000c50d8ae3SPaolo Bonzini } 4001c50d8ae3SPaolo Bonzini 4002c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 40030a2b64c5SBen Gardon unsigned int access, int *nr_present) 4004c50d8ae3SPaolo Bonzini { 4005c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4006c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4007c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4008c50d8ae3SPaolo Bonzini return true; 4009c50d8ae3SPaolo Bonzini } 4010c50d8ae3SPaolo Bonzini 4011c50d8ae3SPaolo Bonzini (*nr_present)++; 4012c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4013c50d8ae3SPaolo Bonzini return true; 4014c50d8ae3SPaolo Bonzini } 4015c50d8ae3SPaolo Bonzini 4016c50d8ae3SPaolo Bonzini return false; 4017c50d8ae3SPaolo Bonzini } 4018c50d8ae3SPaolo Bonzini 4019c50d8ae3SPaolo Bonzini static inline bool is_last_gpte(struct kvm_mmu *mmu, 4020c50d8ae3SPaolo Bonzini unsigned level, unsigned gpte) 4021c50d8ae3SPaolo Bonzini { 4022c50d8ae3SPaolo Bonzini /* 4023c50d8ae3SPaolo Bonzini * The RHS has bit 7 set iff level < mmu->last_nonleaf_level. 4024c50d8ae3SPaolo Bonzini * If it is clear, there are no large pages at this level, so clear 4025c50d8ae3SPaolo Bonzini * PT_PAGE_SIZE_MASK in gpte if that is the case. 4026c50d8ae3SPaolo Bonzini */ 4027c50d8ae3SPaolo Bonzini gpte &= level - mmu->last_nonleaf_level; 4028c50d8ae3SPaolo Bonzini 4029c50d8ae3SPaolo Bonzini /* 40303bae0459SSean Christopherson * PG_LEVEL_4K always terminates. The RHS has bit 7 set 40313bae0459SSean Christopherson * iff level <= PG_LEVEL_4K, which for our purpose means 40323bae0459SSean Christopherson * level == PG_LEVEL_4K; set PT_PAGE_SIZE_MASK in gpte then. 4033c50d8ae3SPaolo Bonzini */ 40343bae0459SSean Christopherson gpte |= level - PG_LEVEL_4K - 1; 4035c50d8ae3SPaolo Bonzini 4036c50d8ae3SPaolo Bonzini return gpte & PT_PAGE_SIZE_MASK; 4037c50d8ae3SPaolo Bonzini } 4038c50d8ae3SPaolo Bonzini 4039c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4040c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4041c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4042c50d8ae3SPaolo Bonzini #undef PTTYPE 4043c50d8ae3SPaolo Bonzini 4044c50d8ae3SPaolo Bonzini #define PTTYPE 64 4045c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4046c50d8ae3SPaolo Bonzini #undef PTTYPE 4047c50d8ae3SPaolo Bonzini 4048c50d8ae3SPaolo Bonzini #define PTTYPE 32 4049c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4050c50d8ae3SPaolo Bonzini #undef PTTYPE 4051c50d8ae3SPaolo Bonzini 4052c50d8ae3SPaolo Bonzini static void 4053c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4054c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *rsvd_check, 40555b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4056c50d8ae3SPaolo Bonzini bool pse, bool amd) 4057c50d8ae3SPaolo Bonzini { 4058c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4059c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 40605b7f575cSSean Christopherson u64 high_bits_rsvd; 4061c50d8ae3SPaolo Bonzini 4062c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4063c50d8ae3SPaolo Bonzini 4064c50d8ae3SPaolo Bonzini if (!gbpages) 4065c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4066c50d8ae3SPaolo Bonzini 40675b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 40685b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 40695b7f575cSSean Christopherson else 40705b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 40715b7f575cSSean Christopherson 40725b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 40735b7f575cSSean Christopherson if (!nx) 40745b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 40755b7f575cSSean Christopherson 4076c50d8ae3SPaolo Bonzini /* 4077c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4078c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4079c50d8ae3SPaolo Bonzini */ 4080c50d8ae3SPaolo Bonzini if (amd) 4081c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4082c50d8ae3SPaolo Bonzini 4083c50d8ae3SPaolo Bonzini switch (level) { 4084c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4085c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4086c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4087c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4088c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4089c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4090c50d8ae3SPaolo Bonzini 4091c50d8ae3SPaolo Bonzini if (!pse) { 4092c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4093c50d8ae3SPaolo Bonzini break; 4094c50d8ae3SPaolo Bonzini } 4095c50d8ae3SPaolo Bonzini 4096c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4097c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4098c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4099c50d8ae3SPaolo Bonzini else 4100c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4101c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4102c50d8ae3SPaolo Bonzini break; 4103c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 41045b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 41055b7f575cSSean Christopherson high_bits_rsvd | 41065b7f575cSSean Christopherson rsvd_bits(5, 8) | 41075b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 41085b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 41095b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 41105b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4111c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4112c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4113c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4114c50d8ae3SPaolo Bonzini break; 4115c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 41165b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 41175b7f575cSSean Christopherson nonleaf_bit8_rsvd | 41185b7f575cSSean Christopherson rsvd_bits(7, 7); 4119c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4120c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4121df561f66SGustavo A. R. Silva fallthrough; 4122c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 41235b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 41245b7f575cSSean Christopherson nonleaf_bit8_rsvd | 41255b7f575cSSean Christopherson rsvd_bits(7, 7); 41265b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 41275b7f575cSSean Christopherson gbpages_bit_rsvd; 41285b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 41295b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4130c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4131c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 41325b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 41335b7f575cSSean Christopherson gbpages_bit_rsvd | 4134c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 41355b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4136c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4137c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4138c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4139c50d8ae3SPaolo Bonzini break; 4140c50d8ae3SPaolo Bonzini } 4141c50d8ae3SPaolo Bonzini } 4142c50d8ae3SPaolo Bonzini 4143c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4144c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4145c50d8ae3SPaolo Bonzini { 4146c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, 41475b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 41485b7f575cSSean Christopherson context->root_level, context->nx, 4149c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 415023493d0aSSean Christopherson is_pse(vcpu), 415123493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4152c50d8ae3SPaolo Bonzini } 4153c50d8ae3SPaolo Bonzini 4154c50d8ae3SPaolo Bonzini static void 4155c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 41565b7f575cSSean Christopherson u64 pa_bits_rsvd, bool execonly) 4157c50d8ae3SPaolo Bonzini { 41585b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 4159c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4160c50d8ae3SPaolo Bonzini 41615b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 41625b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 41635b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6); 41645b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6); 41655b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4166c50d8ae3SPaolo Bonzini 4167c50d8ae3SPaolo Bonzini /* large page */ 4168c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4169c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 41705b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29); 41715b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20); 4172c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4173c50d8ae3SPaolo Bonzini 4174c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4175c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4176c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4177c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4178c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4179c50d8ae3SPaolo Bonzini if (!execonly) { 4180c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4181c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4182c50d8ae3SPaolo Bonzini } 4183c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4184c50d8ae3SPaolo Bonzini } 4185c50d8ae3SPaolo Bonzini 4186c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4187c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4188c50d8ae3SPaolo Bonzini { 4189c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 41905b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, execonly); 4191c50d8ae3SPaolo Bonzini } 4192c50d8ae3SPaolo Bonzini 41936f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 41946f8e65a6SSean Christopherson { 41956f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 41966f8e65a6SSean Christopherson } 41976f8e65a6SSean Christopherson 4198c50d8ae3SPaolo Bonzini /* 4199c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4200c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4201c50d8ae3SPaolo Bonzini * follow the features in guest. 4202c50d8ae3SPaolo Bonzini */ 4203c50d8ae3SPaolo Bonzini void 4204c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) 4205c50d8ae3SPaolo Bonzini { 4206c50d8ae3SPaolo Bonzini bool uses_nx = context->nx || 4207c50d8ae3SPaolo Bonzini context->mmu_role.base.smep_andnot_wp; 4208c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4209c50d8ae3SPaolo Bonzini int i; 4210c50d8ae3SPaolo Bonzini 4211c50d8ae3SPaolo Bonzini /* 4212c50d8ae3SPaolo Bonzini * Passing "true" to the last argument is okay; it adds a check 4213c50d8ae3SPaolo Bonzini * on bit 8 of the SPTEs which KVM doesn't use anyway. 4214c50d8ae3SPaolo Bonzini */ 4215c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4216c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 42176f8e65a6SSean Christopherson reserved_hpa_bits(), 4218c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 4219c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 4220c50d8ae3SPaolo Bonzini is_pse(vcpu), true); 4221c50d8ae3SPaolo Bonzini 4222c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4223c50d8ae3SPaolo Bonzini return; 4224c50d8ae3SPaolo Bonzini 4225c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4226c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4227c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4228c50d8ae3SPaolo Bonzini } 4229c50d8ae3SPaolo Bonzini 4230c50d8ae3SPaolo Bonzini } 4231c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); 4232c50d8ae3SPaolo Bonzini 4233c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4234c50d8ae3SPaolo Bonzini { 4235c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4236c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4237c50d8ae3SPaolo Bonzini } 4238c50d8ae3SPaolo Bonzini 4239c50d8ae3SPaolo Bonzini /* 4240c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4241c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4242c50d8ae3SPaolo Bonzini */ 4243c50d8ae3SPaolo Bonzini static void 4244c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4245c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4246c50d8ae3SPaolo Bonzini { 4247c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4248c50d8ae3SPaolo Bonzini int i; 4249c50d8ae3SPaolo Bonzini 4250c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4251c50d8ae3SPaolo Bonzini 4252c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4253c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 42546f8e65a6SSean Christopherson reserved_hpa_bits(), 4255c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4256c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 4257c50d8ae3SPaolo Bonzini true, true); 4258c50d8ae3SPaolo Bonzini else 4259c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 42606f8e65a6SSean Christopherson reserved_hpa_bits(), false); 4261c50d8ae3SPaolo Bonzini 4262c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4263c50d8ae3SPaolo Bonzini return; 4264c50d8ae3SPaolo Bonzini 4265c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4266c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4267c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4268c50d8ae3SPaolo Bonzini } 4269c50d8ae3SPaolo Bonzini } 4270c50d8ae3SPaolo Bonzini 4271c50d8ae3SPaolo Bonzini /* 4272c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4273c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4274c50d8ae3SPaolo Bonzini */ 4275c50d8ae3SPaolo Bonzini static void 4276c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4277c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4278c50d8ae3SPaolo Bonzini { 4279c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 42806f8e65a6SSean Christopherson reserved_hpa_bits(), execonly); 4281c50d8ae3SPaolo Bonzini } 4282c50d8ae3SPaolo Bonzini 4283c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4284c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4285c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4286c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4287c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4288c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4289c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4290c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4291c50d8ae3SPaolo Bonzini 4292c50d8ae3SPaolo Bonzini 4293c50d8ae3SPaolo Bonzini static void update_permission_bitmask(struct kvm_vcpu *vcpu, 4294c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu, bool ept) 4295c50d8ae3SPaolo Bonzini { 4296c50d8ae3SPaolo Bonzini unsigned byte; 4297c50d8ae3SPaolo Bonzini 4298c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4299c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4300c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4301c50d8ae3SPaolo Bonzini 4302c50d8ae3SPaolo Bonzini bool cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP) != 0; 4303c50d8ae3SPaolo Bonzini bool cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP) != 0; 4304c50d8ae3SPaolo Bonzini bool cr0_wp = is_write_protection(vcpu); 4305c50d8ae3SPaolo Bonzini 4306c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4307c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4308c50d8ae3SPaolo Bonzini 4309c50d8ae3SPaolo Bonzini /* 4310c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4311c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4312c50d8ae3SPaolo Bonzini */ 4313c50d8ae3SPaolo Bonzini 4314c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4315c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4316c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4317c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4318c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4319c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4320c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4321c50d8ae3SPaolo Bonzini u8 smepf = 0; 4322c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4323c50d8ae3SPaolo Bonzini u8 smapf = 0; 4324c50d8ae3SPaolo Bonzini 4325c50d8ae3SPaolo Bonzini if (!ept) { 4326c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4327c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4328c50d8ae3SPaolo Bonzini 4329c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 4330c50d8ae3SPaolo Bonzini if (!mmu->nx) 4331c50d8ae3SPaolo Bonzini ff = 0; 4332c50d8ae3SPaolo Bonzini 4333c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4334c50d8ae3SPaolo Bonzini if (!cr0_wp) 4335c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4336c50d8ae3SPaolo Bonzini 4337c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4338c50d8ae3SPaolo Bonzini if (cr4_smep) 4339c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4340c50d8ae3SPaolo Bonzini 4341c50d8ae3SPaolo Bonzini /* 4342c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4343c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4344c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4345c50d8ae3SPaolo Bonzini * conditions are true: 4346c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4347c50d8ae3SPaolo Bonzini * - A user page is accessed 4348c50d8ae3SPaolo Bonzini * - The access is not a fetch 4349c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4350c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4351c50d8ae3SPaolo Bonzini * 4352c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4353c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4354c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4355c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4356c50d8ae3SPaolo Bonzini */ 4357c50d8ae3SPaolo Bonzini if (cr4_smap) 4358c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4359c50d8ae3SPaolo Bonzini } 4360c50d8ae3SPaolo Bonzini 4361c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4362c50d8ae3SPaolo Bonzini } 4363c50d8ae3SPaolo Bonzini } 4364c50d8ae3SPaolo Bonzini 4365c50d8ae3SPaolo Bonzini /* 4366c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4367c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4368c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4369c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4370c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4371c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4372c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4373c50d8ae3SPaolo Bonzini * 4374c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4375c50d8ae3SPaolo Bonzini * page tables and the machine state: 4376c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4377c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4378c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4379c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4380c50d8ae3SPaolo Bonzini * 4381c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4382c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4383c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4384c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4385c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4386c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4387c50d8ae3SPaolo Bonzini * only will be masked away. 4388c50d8ae3SPaolo Bonzini */ 4389c50d8ae3SPaolo Bonzini static void update_pkru_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 4390c50d8ae3SPaolo Bonzini bool ept) 4391c50d8ae3SPaolo Bonzini { 4392c50d8ae3SPaolo Bonzini unsigned bit; 4393c50d8ae3SPaolo Bonzini bool wp; 4394c50d8ae3SPaolo Bonzini 4395c50d8ae3SPaolo Bonzini if (ept) { 4396c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4397c50d8ae3SPaolo Bonzini return; 4398c50d8ae3SPaolo Bonzini } 4399c50d8ae3SPaolo Bonzini 4400c50d8ae3SPaolo Bonzini /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */ 4401c50d8ae3SPaolo Bonzini if (!kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || !is_long_mode(vcpu)) { 4402c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4403c50d8ae3SPaolo Bonzini return; 4404c50d8ae3SPaolo Bonzini } 4405c50d8ae3SPaolo Bonzini 4406c50d8ae3SPaolo Bonzini wp = is_write_protection(vcpu); 4407c50d8ae3SPaolo Bonzini 4408c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4409c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4410c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4411c50d8ae3SPaolo Bonzini 4412c50d8ae3SPaolo Bonzini pfec = bit << 1; 4413c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4414c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4415c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4416c50d8ae3SPaolo Bonzini 4417c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4418c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4419c50d8ae3SPaolo Bonzini 4420c50d8ae3SPaolo Bonzini /* 4421c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4422c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4423c50d8ae3SPaolo Bonzini */ 4424c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4425c50d8ae3SPaolo Bonzini /* 4426c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4427c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4428c50d8ae3SPaolo Bonzini */ 4429c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4430c50d8ae3SPaolo Bonzini 4431c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4432c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4433c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4434c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4435c50d8ae3SPaolo Bonzini 4436c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4437c50d8ae3SPaolo Bonzini } 4438c50d8ae3SPaolo Bonzini } 4439c50d8ae3SPaolo Bonzini 4440c50d8ae3SPaolo Bonzini static void update_last_nonleaf_level(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 4441c50d8ae3SPaolo Bonzini { 4442c50d8ae3SPaolo Bonzini unsigned root_level = mmu->root_level; 4443c50d8ae3SPaolo Bonzini 4444c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level = root_level; 4445c50d8ae3SPaolo Bonzini if (root_level == PT32_ROOT_LEVEL && is_pse(vcpu)) 4446c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level++; 4447c50d8ae3SPaolo Bonzini } 4448c50d8ae3SPaolo Bonzini 4449c50d8ae3SPaolo Bonzini static void paging64_init_context_common(struct kvm_vcpu *vcpu, 4450c50d8ae3SPaolo Bonzini struct kvm_mmu *context, 4451c50d8ae3SPaolo Bonzini int level) 4452c50d8ae3SPaolo Bonzini { 4453c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4454c50d8ae3SPaolo Bonzini context->root_level = level; 4455c50d8ae3SPaolo Bonzini 4456c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4457c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4458c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4459c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4460c50d8ae3SPaolo Bonzini 4461c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_pae(vcpu)); 4462c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4463c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4464c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4465c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4466c50d8ae3SPaolo Bonzini context->shadow_root_level = level; 4467c50d8ae3SPaolo Bonzini context->direct_map = false; 4468c50d8ae3SPaolo Bonzini } 4469c50d8ae3SPaolo Bonzini 4470c50d8ae3SPaolo Bonzini static void paging64_init_context(struct kvm_vcpu *vcpu, 4471c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4472c50d8ae3SPaolo Bonzini { 4473c50d8ae3SPaolo Bonzini int root_level = is_la57_mode(vcpu) ? 4474c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4475c50d8ae3SPaolo Bonzini 4476c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, root_level); 4477c50d8ae3SPaolo Bonzini } 4478c50d8ae3SPaolo Bonzini 4479c50d8ae3SPaolo Bonzini static void paging32_init_context(struct kvm_vcpu *vcpu, 4480c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4481c50d8ae3SPaolo Bonzini { 4482c50d8ae3SPaolo Bonzini context->nx = false; 4483c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4484c50d8ae3SPaolo Bonzini 4485c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4486c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4487c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4488c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4489c50d8ae3SPaolo Bonzini 4490c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4491c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4492c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4493c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4494c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4495c50d8ae3SPaolo Bonzini context->direct_map = false; 4496c50d8ae3SPaolo Bonzini } 4497c50d8ae3SPaolo Bonzini 4498c50d8ae3SPaolo Bonzini static void paging32E_init_context(struct kvm_vcpu *vcpu, 4499c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4500c50d8ae3SPaolo Bonzini { 4501c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL); 4502c50d8ae3SPaolo Bonzini } 4503c50d8ae3SPaolo Bonzini 4504c50d8ae3SPaolo Bonzini static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu) 4505c50d8ae3SPaolo Bonzini { 4506c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4507c50d8ae3SPaolo Bonzini 4508c50d8ae3SPaolo Bonzini ext.cr0_pg = !!is_paging(vcpu); 4509c50d8ae3SPaolo Bonzini ext.cr4_pae = !!is_pae(vcpu); 4510c50d8ae3SPaolo Bonzini ext.cr4_smep = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); 4511c50d8ae3SPaolo Bonzini ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); 4512c50d8ae3SPaolo Bonzini ext.cr4_pse = !!is_pse(vcpu); 4513c50d8ae3SPaolo Bonzini ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE); 4514c50d8ae3SPaolo Bonzini ext.maxphyaddr = cpuid_maxphyaddr(vcpu); 4515c50d8ae3SPaolo Bonzini 4516c50d8ae3SPaolo Bonzini ext.valid = 1; 4517c50d8ae3SPaolo Bonzini 4518c50d8ae3SPaolo Bonzini return ext; 4519c50d8ae3SPaolo Bonzini } 4520c50d8ae3SPaolo Bonzini 4521c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 4522c50d8ae3SPaolo Bonzini bool base_only) 4523c50d8ae3SPaolo Bonzini { 4524c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4525c50d8ae3SPaolo Bonzini 4526c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4527c50d8ae3SPaolo Bonzini role.base.nxe = !!is_nx(vcpu); 4528c50d8ae3SPaolo Bonzini role.base.cr0_wp = is_write_protection(vcpu); 4529c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4530c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4531c50d8ae3SPaolo Bonzini 4532c50d8ae3SPaolo Bonzini if (base_only) 4533c50d8ae3SPaolo Bonzini return role; 4534c50d8ae3SPaolo Bonzini 4535c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4536c50d8ae3SPaolo Bonzini 4537c50d8ae3SPaolo Bonzini return role; 4538c50d8ae3SPaolo Bonzini } 4539c50d8ae3SPaolo Bonzini 4540d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4541d468d94bSSean Christopherson { 4542d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 454383013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4544d468d94bSSean Christopherson return 4; 4545d468d94bSSean Christopherson 454683013059SSean Christopherson return max_tdp_level; 4547d468d94bSSean Christopherson } 4548d468d94bSSean Christopherson 4549c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4550c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 4551c50d8ae3SPaolo Bonzini { 4552c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4553c50d8ae3SPaolo Bonzini 4554c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4555d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4556c50d8ae3SPaolo Bonzini role.base.direct = true; 4557c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4558c50d8ae3SPaolo Bonzini 4559c50d8ae3SPaolo Bonzini return role; 4560c50d8ae3SPaolo Bonzini } 4561c50d8ae3SPaolo Bonzini 4562c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4563c50d8ae3SPaolo Bonzini { 45648c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4565c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4566c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(vcpu, false); 4567c50d8ae3SPaolo Bonzini 4568c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4569c50d8ae3SPaolo Bonzini return; 4570c50d8ae3SPaolo Bonzini 4571c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 45727a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4573c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 45745efac074SPaolo Bonzini context->invlpg = NULL; 4575d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4576c50d8ae3SPaolo Bonzini context->direct_map = true; 4577d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4578c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4579c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4580c50d8ae3SPaolo Bonzini 4581c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4582c50d8ae3SPaolo Bonzini context->nx = false; 4583c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4584c50d8ae3SPaolo Bonzini context->root_level = 0; 4585c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4586c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4587c50d8ae3SPaolo Bonzini context->root_level = is_la57_mode(vcpu) ? 4588c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4589c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4590c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4591c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4592c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4593c50d8ae3SPaolo Bonzini context->root_level = PT32E_ROOT_LEVEL; 4594c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4595c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4596c50d8ae3SPaolo Bonzini } else { 4597c50d8ae3SPaolo Bonzini context->nx = false; 4598c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4599c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4600c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4601c50d8ae3SPaolo Bonzini } 4602c50d8ae3SPaolo Bonzini 4603c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4604c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4605c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4606c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4607c50d8ae3SPaolo Bonzini } 4608c50d8ae3SPaolo Bonzini 4609c50d8ae3SPaolo Bonzini static union kvm_mmu_role 461059505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, bool base_only) 4611c50d8ae3SPaolo Bonzini { 4612c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4613c50d8ae3SPaolo Bonzini 4614c50d8ae3SPaolo Bonzini role.base.smep_andnot_wp = role.ext.cr4_smep && 4615c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4616c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = role.ext.cr4_smap && 4617c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4618c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = !!is_pae(vcpu); 4619c50d8ae3SPaolo Bonzini 462059505b55SSean Christopherson return role; 462159505b55SSean Christopherson } 462259505b55SSean Christopherson 462359505b55SSean Christopherson static union kvm_mmu_role 462459505b55SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 462559505b55SSean Christopherson { 462659505b55SSean Christopherson union kvm_mmu_role role = 462759505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, base_only); 462859505b55SSean Christopherson 462959505b55SSean Christopherson role.base.direct = !is_paging(vcpu); 463059505b55SSean Christopherson 4631c50d8ae3SPaolo Bonzini if (!is_long_mode(vcpu)) 4632c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 4633c50d8ae3SPaolo Bonzini else if (is_la57_mode(vcpu)) 4634c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4635c50d8ae3SPaolo Bonzini else 4636c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4637c50d8ae3SPaolo Bonzini 4638c50d8ae3SPaolo Bonzini return role; 4639c50d8ae3SPaolo Bonzini } 4640c50d8ae3SPaolo Bonzini 46418c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 46428c008659SPaolo Bonzini u32 cr0, u32 cr4, u32 efer, 46438c008659SPaolo Bonzini union kvm_mmu_role new_role) 4644c50d8ae3SPaolo Bonzini { 4645929d1cfaSPaolo Bonzini if (!(cr0 & X86_CR0_PG)) 4646c50d8ae3SPaolo Bonzini nonpaging_init_context(vcpu, context); 4647929d1cfaSPaolo Bonzini else if (efer & EFER_LMA) 4648c50d8ae3SPaolo Bonzini paging64_init_context(vcpu, context); 4649929d1cfaSPaolo Bonzini else if (cr4 & X86_CR4_PAE) 4650c50d8ae3SPaolo Bonzini paging32E_init_context(vcpu, context); 4651c50d8ae3SPaolo Bonzini else 4652c50d8ae3SPaolo Bonzini paging32_init_context(vcpu, context); 4653c50d8ae3SPaolo Bonzini 4654c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4655c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4656c50d8ae3SPaolo Bonzini } 46570f04a2acSVitaly Kuznetsov 46580f04a2acSVitaly Kuznetsov static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer) 46590f04a2acSVitaly Kuznetsov { 46608c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 46610f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 46620f04a2acSVitaly Kuznetsov kvm_calc_shadow_mmu_root_page_role(vcpu, false); 46630f04a2acSVitaly Kuznetsov 46640f04a2acSVitaly Kuznetsov if (new_role.as_u64 != context->mmu_role.as_u64) 46658c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 46660f04a2acSVitaly Kuznetsov } 46670f04a2acSVitaly Kuznetsov 466859505b55SSean Christopherson static union kvm_mmu_role 466959505b55SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu) 467059505b55SSean Christopherson { 467159505b55SSean Christopherson union kvm_mmu_role role = 467259505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, false); 467359505b55SSean Christopherson 467459505b55SSean Christopherson role.base.direct = false; 4675d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 467659505b55SSean Christopherson 467759505b55SSean Christopherson return role; 467859505b55SSean Christopherson } 467959505b55SSean Christopherson 46800f04a2acSVitaly Kuznetsov void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer, 46810f04a2acSVitaly Kuznetsov gpa_t nested_cr3) 46820f04a2acSVitaly Kuznetsov { 46838c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 468459505b55SSean Christopherson union kvm_mmu_role new_role = kvm_calc_shadow_npt_root_page_role(vcpu); 46850f04a2acSVitaly Kuznetsov 4686a506fdd2SVitaly Kuznetsov __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base, false, false); 4687a506fdd2SVitaly Kuznetsov 4688a3322d5cSSean Christopherson if (new_role.as_u64 != context->mmu_role.as_u64) { 46898c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 4690a3322d5cSSean Christopherson 4691a3322d5cSSean Christopherson /* 4692a3322d5cSSean Christopherson * Override the level set by the common init helper, nested TDP 4693a3322d5cSSean Christopherson * always uses the host's TDP configuration. 4694a3322d5cSSean Christopherson */ 4695a3322d5cSSean Christopherson context->shadow_root_level = new_role.base.level; 4696a3322d5cSSean Christopherson } 46970f04a2acSVitaly Kuznetsov } 46980f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4699c50d8ae3SPaolo Bonzini 4700c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4701c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4702bb1fcc70SSean Christopherson bool execonly, u8 level) 4703c50d8ae3SPaolo Bonzini { 4704c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4705c50d8ae3SPaolo Bonzini 4706c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4707c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4708c50d8ae3SPaolo Bonzini 4709bb1fcc70SSean Christopherson role.base.level = level; 4710c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4711c50d8ae3SPaolo Bonzini role.base.direct = false; 4712c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4713c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4714c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4715c50d8ae3SPaolo Bonzini 4716c50d8ae3SPaolo Bonzini /* 4717c50d8ae3SPaolo Bonzini * WP=1 and NOT_WP=1 is an impossible combination, use WP and the 4718c50d8ae3SPaolo Bonzini * SMAP variation to denote shadow EPT entries. 4719c50d8ae3SPaolo Bonzini */ 4720c50d8ae3SPaolo Bonzini role.base.cr0_wp = true; 4721c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = true; 4722c50d8ae3SPaolo Bonzini 4723c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4724c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4725c50d8ae3SPaolo Bonzini 4726c50d8ae3SPaolo Bonzini return role; 4727c50d8ae3SPaolo Bonzini } 4728c50d8ae3SPaolo Bonzini 4729c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4730c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 4731c50d8ae3SPaolo Bonzini { 47328c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4733bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4734c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4735c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4736bb1fcc70SSean Christopherson execonly, level); 4737c50d8ae3SPaolo Bonzini 4738be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base, true, true); 4739c50d8ae3SPaolo Bonzini 4740c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4741c50d8ae3SPaolo Bonzini return; 4742c50d8ae3SPaolo Bonzini 4743bb1fcc70SSean Christopherson context->shadow_root_level = level; 4744c50d8ae3SPaolo Bonzini 4745c50d8ae3SPaolo Bonzini context->nx = true; 4746c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4747c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4748c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4749c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4750c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4751bb1fcc70SSean Christopherson context->root_level = level; 4752c50d8ae3SPaolo Bonzini context->direct_map = false; 4753c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4754c50d8ae3SPaolo Bonzini 4755c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, true); 4756c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, true); 4757c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4758c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 4759c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4760c50d8ae3SPaolo Bonzini } 4761c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4762c50d8ae3SPaolo Bonzini 4763c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4764c50d8ae3SPaolo Bonzini { 47658c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4766c50d8ae3SPaolo Bonzini 4767929d1cfaSPaolo Bonzini kvm_init_shadow_mmu(vcpu, 4768929d1cfaSPaolo Bonzini kvm_read_cr0_bits(vcpu, X86_CR0_PG), 4769929d1cfaSPaolo Bonzini kvm_read_cr4_bits(vcpu, X86_CR4_PAE), 4770929d1cfaSPaolo Bonzini vcpu->arch.efer); 4771929d1cfaSPaolo Bonzini 4772d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4773c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4774c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4775c50d8ae3SPaolo Bonzini } 4776c50d8ae3SPaolo Bonzini 4777c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4778c50d8ae3SPaolo Bonzini { 4779c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = kvm_calc_mmu_role_common(vcpu, false); 4780c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4781c50d8ae3SPaolo Bonzini 4782c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4783c50d8ae3SPaolo Bonzini return; 4784c50d8ae3SPaolo Bonzini 4785c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4786d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4787c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4788c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 4789c50d8ae3SPaolo Bonzini 4790c50d8ae3SPaolo Bonzini /* 47915efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 47925efac074SPaolo Bonzini * SPTEs. 47935efac074SPaolo Bonzini */ 47945efac074SPaolo Bonzini g_context->invlpg = NULL; 47955efac074SPaolo Bonzini 47965efac074SPaolo Bonzini /* 4797c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4798c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4799c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4800c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4801c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4802c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4803c50d8ae3SPaolo Bonzini */ 4804c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4805c50d8ae3SPaolo Bonzini g_context->nx = false; 4806c50d8ae3SPaolo Bonzini g_context->root_level = 0; 4807c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 4808c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4809c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 4810c50d8ae3SPaolo Bonzini g_context->root_level = is_la57_mode(vcpu) ? 4811c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4812c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4813c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4814c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4815c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 4816c50d8ae3SPaolo Bonzini g_context->root_level = PT32E_ROOT_LEVEL; 4817c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4818c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4819c50d8ae3SPaolo Bonzini } else { 4820c50d8ae3SPaolo Bonzini g_context->nx = false; 4821c50d8ae3SPaolo Bonzini g_context->root_level = PT32_ROOT_LEVEL; 4822c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4823c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 4824c50d8ae3SPaolo Bonzini } 4825c50d8ae3SPaolo Bonzini 4826c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, g_context, false); 4827c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, g_context, false); 4828c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, g_context); 4829c50d8ae3SPaolo Bonzini } 4830c50d8ae3SPaolo Bonzini 4831c50d8ae3SPaolo Bonzini void kvm_init_mmu(struct kvm_vcpu *vcpu, bool reset_roots) 4832c50d8ae3SPaolo Bonzini { 4833c50d8ae3SPaolo Bonzini if (reset_roots) { 4834c50d8ae3SPaolo Bonzini uint i; 4835c50d8ae3SPaolo Bonzini 4836c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = INVALID_PAGE; 4837c50d8ae3SPaolo Bonzini 4838c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 4839c50d8ae3SPaolo Bonzini vcpu->arch.mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 4840c50d8ae3SPaolo Bonzini } 4841c50d8ae3SPaolo Bonzini 4842c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4843c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4844c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4845c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4846c50d8ae3SPaolo Bonzini else 4847c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4848c50d8ae3SPaolo Bonzini } 4849c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4850c50d8ae3SPaolo Bonzini 4851c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4852c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4853c50d8ae3SPaolo Bonzini { 4854c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4855c50d8ae3SPaolo Bonzini 4856c50d8ae3SPaolo Bonzini if (tdp_enabled) 4857c50d8ae3SPaolo Bonzini role = kvm_calc_tdp_mmu_root_page_role(vcpu, true); 4858c50d8ae3SPaolo Bonzini else 4859c50d8ae3SPaolo Bonzini role = kvm_calc_shadow_mmu_root_page_role(vcpu, true); 4860c50d8ae3SPaolo Bonzini 4861c50d8ae3SPaolo Bonzini return role.base; 4862c50d8ae3SPaolo Bonzini } 4863c50d8ae3SPaolo Bonzini 4864c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 4865c50d8ae3SPaolo Bonzini { 4866c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 4867c50d8ae3SPaolo Bonzini kvm_init_mmu(vcpu, true); 4868c50d8ae3SPaolo Bonzini } 4869c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 4870c50d8ae3SPaolo Bonzini 4871c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 4872c50d8ae3SPaolo Bonzini { 4873c50d8ae3SPaolo Bonzini int r; 4874c50d8ae3SPaolo Bonzini 4875378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 4876c50d8ae3SPaolo Bonzini if (r) 4877c50d8ae3SPaolo Bonzini goto out; 4878748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 4879748e52b9SSean Christopherson if (r) 4880748e52b9SSean Christopherson goto out; 48814a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 48826e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 48836e6ec584SSean Christopherson else 48846e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 4885c50d8ae3SPaolo Bonzini if (r) 4886c50d8ae3SPaolo Bonzini goto out; 4887a91f387bSSean Christopherson 4888a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 4889a91f387bSSean Christopherson 4890727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 4891b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 4892c50d8ae3SPaolo Bonzini out: 4893c50d8ae3SPaolo Bonzini return r; 4894c50d8ae3SPaolo Bonzini } 4895c50d8ae3SPaolo Bonzini 4896c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 4897c50d8ae3SPaolo Bonzini { 4898c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 4899c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 4900c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 4901c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 4902c50d8ae3SPaolo Bonzini } 4903c50d8ae3SPaolo Bonzini 4904c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 4905c50d8ae3SPaolo Bonzini { 4906c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 4907c50d8ae3SPaolo Bonzini return false; 4908c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 4909c50d8ae3SPaolo Bonzini return true; 4910c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 4911c50d8ae3SPaolo Bonzini return true; 4912c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 4913c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 4914c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 4915c50d8ae3SPaolo Bonzini } 4916c50d8ae3SPaolo Bonzini 4917c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 4918c50d8ae3SPaolo Bonzini int *bytes) 4919c50d8ae3SPaolo Bonzini { 4920c50d8ae3SPaolo Bonzini u64 gentry = 0; 4921c50d8ae3SPaolo Bonzini int r; 4922c50d8ae3SPaolo Bonzini 4923c50d8ae3SPaolo Bonzini /* 4924c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 4925c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 4926c50d8ae3SPaolo Bonzini * when they have the same mode. 4927c50d8ae3SPaolo Bonzini */ 4928c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 4929c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 4930c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 4931c50d8ae3SPaolo Bonzini *bytes = 8; 4932c50d8ae3SPaolo Bonzini } 4933c50d8ae3SPaolo Bonzini 4934c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 4935c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 4936c50d8ae3SPaolo Bonzini if (r) 4937c50d8ae3SPaolo Bonzini gentry = 0; 4938c50d8ae3SPaolo Bonzini } 4939c50d8ae3SPaolo Bonzini 4940c50d8ae3SPaolo Bonzini return gentry; 4941c50d8ae3SPaolo Bonzini } 4942c50d8ae3SPaolo Bonzini 4943c50d8ae3SPaolo Bonzini /* 4944c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 4945c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 4946c50d8ae3SPaolo Bonzini */ 4947c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 4948c50d8ae3SPaolo Bonzini { 4949c50d8ae3SPaolo Bonzini /* 4950c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 4951c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 4952c50d8ae3SPaolo Bonzini */ 49533bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 4954c50d8ae3SPaolo Bonzini return false; 4955c50d8ae3SPaolo Bonzini 4956c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 4957c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 4958c50d8ae3SPaolo Bonzini } 4959c50d8ae3SPaolo Bonzini 4960c50d8ae3SPaolo Bonzini /* 4961c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 4962c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 4963c50d8ae3SPaolo Bonzini */ 4964c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 4965c50d8ae3SPaolo Bonzini int bytes) 4966c50d8ae3SPaolo Bonzini { 4967c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 4968c50d8ae3SPaolo Bonzini 4969c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 4970c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 4971c50d8ae3SPaolo Bonzini 4972c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 4973c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 4974c50d8ae3SPaolo Bonzini 4975c50d8ae3SPaolo Bonzini /* 4976c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 4977c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 4978c50d8ae3SPaolo Bonzini */ 4979c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 4980c50d8ae3SPaolo Bonzini return false; 4981c50d8ae3SPaolo Bonzini 4982c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 4983c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 4984c50d8ae3SPaolo Bonzini 4985c50d8ae3SPaolo Bonzini return misaligned; 4986c50d8ae3SPaolo Bonzini } 4987c50d8ae3SPaolo Bonzini 4988c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 4989c50d8ae3SPaolo Bonzini { 4990c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 4991c50d8ae3SPaolo Bonzini u64 *spte; 4992c50d8ae3SPaolo Bonzini int level; 4993c50d8ae3SPaolo Bonzini 4994c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 4995c50d8ae3SPaolo Bonzini level = sp->role.level; 4996c50d8ae3SPaolo Bonzini *nspte = 1; 4997c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 4998c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 4999c50d8ae3SPaolo Bonzini /* 5000c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5001c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5002c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5003c50d8ae3SPaolo Bonzini */ 5004c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5005c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5006c50d8ae3SPaolo Bonzini page_offset <<= 1; 5007c50d8ae3SPaolo Bonzini *nspte = 2; 5008c50d8ae3SPaolo Bonzini } 5009c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5010c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5011c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5012c50d8ae3SPaolo Bonzini return NULL; 5013c50d8ae3SPaolo Bonzini } 5014c50d8ae3SPaolo Bonzini 5015c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5016c50d8ae3SPaolo Bonzini return spte; 5017c50d8ae3SPaolo Bonzini } 5018c50d8ae3SPaolo Bonzini 5019c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5020c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5021c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5022c50d8ae3SPaolo Bonzini { 5023c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5024c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5025c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5026c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5027c50d8ae3SPaolo Bonzini int npte; 5028c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 5029c50d8ae3SPaolo Bonzini 5030c50d8ae3SPaolo Bonzini /* 5031c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5032c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5033c50d8ae3SPaolo Bonzini */ 5034c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5035c50d8ae3SPaolo Bonzini return; 5036c50d8ae3SPaolo Bonzini 5037c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 5038c50d8ae3SPaolo Bonzini 5039c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5040c50d8ae3SPaolo Bonzini 5041c50d8ae3SPaolo Bonzini /* 5042c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5043c50d8ae3SPaolo Bonzini * or not since pte prefetch is skiped if it does not have 5044c50d8ae3SPaolo Bonzini * enough objects in the cache. 5045c50d8ae3SPaolo Bonzini */ 5046378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5047c50d8ae3SPaolo Bonzini 5048531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5049c50d8ae3SPaolo Bonzini 5050c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5051c50d8ae3SPaolo Bonzini 5052c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5053c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5054c50d8ae3SPaolo Bonzini 5055c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5056c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5057c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5058c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5059c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5060c50d8ae3SPaolo Bonzini continue; 5061c50d8ae3SPaolo Bonzini } 5062c50d8ae3SPaolo Bonzini 5063c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5064c50d8ae3SPaolo Bonzini if (!spte) 5065c50d8ae3SPaolo Bonzini continue; 5066c50d8ae3SPaolo Bonzini 5067c50d8ae3SPaolo Bonzini local_flush = true; 5068c50d8ae3SPaolo Bonzini while (npte--) { 5069c50d8ae3SPaolo Bonzini entry = *spte; 50702de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5071c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5072c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5073c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5074c50d8ae3SPaolo Bonzini remote_flush = true; 5075c50d8ae3SPaolo Bonzini ++spte; 5076c50d8ae3SPaolo Bonzini } 5077c50d8ae3SPaolo Bonzini } 5078c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5079c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5080531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5081c50d8ae3SPaolo Bonzini } 5082c50d8ae3SPaolo Bonzini 5083736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5084c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5085c50d8ae3SPaolo Bonzini { 508692daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5087c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5088c50d8ae3SPaolo Bonzini 50896948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5090ddce6208SSean Christopherson return RET_PF_RETRY; 5091ddce6208SSean Christopherson 5092c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5093c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5094736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5095c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5096c50d8ae3SPaolo Bonzini goto emulate; 5097c50d8ae3SPaolo Bonzini } 5098c50d8ae3SPaolo Bonzini 5099c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 51007a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 51017a02674dSSean Christopherson lower_32_bits(error_code), false); 51027b367bc9SSean Christopherson if (WARN_ON_ONCE(r == RET_PF_INVALID)) 51037b367bc9SSean Christopherson return -EIO; 5104c50d8ae3SPaolo Bonzini } 5105c50d8ae3SPaolo Bonzini 5106c50d8ae3SPaolo Bonzini if (r < 0) 5107c50d8ae3SPaolo Bonzini return r; 510883a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 510983a2ba4cSSean Christopherson return 1; 5110c50d8ae3SPaolo Bonzini 5111c50d8ae3SPaolo Bonzini /* 5112c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5113c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5114c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5115c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5116c50d8ae3SPaolo Bonzini * and resume the guest. 5117c50d8ae3SPaolo Bonzini */ 5118c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5119c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5120736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5121c50d8ae3SPaolo Bonzini return 1; 5122c50d8ae3SPaolo Bonzini } 5123c50d8ae3SPaolo Bonzini 5124c50d8ae3SPaolo Bonzini /* 5125c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5126c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5127c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5128c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5129c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5130c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5131c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5132c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5133c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5134c50d8ae3SPaolo Bonzini */ 5135736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 513692daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5137c50d8ae3SPaolo Bonzini emulate: 5138736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5139c50d8ae3SPaolo Bonzini insn_len); 5140c50d8ae3SPaolo Bonzini } 5141c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5142c50d8ae3SPaolo Bonzini 51435efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 51445efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5145c50d8ae3SPaolo Bonzini { 5146c50d8ae3SPaolo Bonzini int i; 5147c50d8ae3SPaolo Bonzini 51485efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 51495efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 51505efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5151c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5152c50d8ae3SPaolo Bonzini return; 5153c50d8ae3SPaolo Bonzini 5154b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 51555efac074SPaolo Bonzini } 51565efac074SPaolo Bonzini 51575efac074SPaolo Bonzini if (!mmu->invlpg) 51585efac074SPaolo Bonzini return; 51595efac074SPaolo Bonzini 51605efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5161c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5162c50d8ae3SPaolo Bonzini 5163c50d8ae3SPaolo Bonzini /* 5164c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5165c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5166c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5167c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5168c50d8ae3SPaolo Bonzini * just always sync it. 5169c50d8ae3SPaolo Bonzini * 5170c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5171c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5172c50d8ae3SPaolo Bonzini * for them. 5173c50d8ae3SPaolo Bonzini */ 5174c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5175c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5176c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 51775efac074SPaolo Bonzini } else { 51785efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 51795efac074SPaolo Bonzini } 51805efac074SPaolo Bonzini } 5181c50d8ae3SPaolo Bonzini 51825efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 51835efac074SPaolo Bonzini { 51845efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5185c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5186c50d8ae3SPaolo Bonzini } 5187c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5188c50d8ae3SPaolo Bonzini 51895efac074SPaolo Bonzini 5190c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5191c50d8ae3SPaolo Bonzini { 5192c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5193c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5194c50d8ae3SPaolo Bonzini uint i; 5195c50d8ae3SPaolo Bonzini 5196c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5197c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5198c50d8ae3SPaolo Bonzini tlb_flush = true; 5199c50d8ae3SPaolo Bonzini } 5200c50d8ae3SPaolo Bonzini 5201c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5202c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5203be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5204c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5205c50d8ae3SPaolo Bonzini tlb_flush = true; 5206c50d8ae3SPaolo Bonzini } 5207c50d8ae3SPaolo Bonzini } 5208c50d8ae3SPaolo Bonzini 5209c50d8ae3SPaolo Bonzini if (tlb_flush) 5210b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5211c50d8ae3SPaolo Bonzini 5212c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5213c50d8ae3SPaolo Bonzini 5214c50d8ae3SPaolo Bonzini /* 5215c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5216c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5217c50d8ae3SPaolo Bonzini * for them. 5218c50d8ae3SPaolo Bonzini */ 5219c50d8ae3SPaolo Bonzini } 5220c50d8ae3SPaolo Bonzini 522183013059SSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 522283013059SSean Christopherson int tdp_huge_page_level) 5223c50d8ae3SPaolo Bonzini { 5224bde77235SSean Christopherson tdp_enabled = enable_tdp; 522583013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5226703c335dSSean Christopherson 5227703c335dSSean Christopherson /* 52281d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5229703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5230703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5231703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5232703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5233703c335dSSean Christopherson */ 5234703c335dSSean Christopherson if (tdp_enabled) 52351d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5236703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 52371d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5238703c335dSSean Christopherson else 52391d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5240c50d8ae3SPaolo Bonzini } 5241bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5242c50d8ae3SPaolo Bonzini 5243c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 52440a234f5dSSean Christopherson typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head, 52450a234f5dSSean Christopherson struct kvm_memory_slot *slot); 5246c50d8ae3SPaolo Bonzini 5247c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5248c50d8ae3SPaolo Bonzini static __always_inline bool 5249c50d8ae3SPaolo Bonzini slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot, 5250c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 52511a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 52521a61b7dbSSean Christopherson bool flush) 5253c50d8ae3SPaolo Bonzini { 5254c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5255c50d8ae3SPaolo Bonzini 5256c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5257c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5258c50d8ae3SPaolo Bonzini if (iterator.rmap) 52590a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5260c50d8ae3SPaolo Bonzini 5261531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5262302695a5SSean Christopherson if (flush && flush_on_yield) { 5263c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5264c50d8ae3SPaolo Bonzini start_gfn, 5265c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5266c50d8ae3SPaolo Bonzini flush = false; 5267c50d8ae3SPaolo Bonzini } 5268531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5269c50d8ae3SPaolo Bonzini } 5270c50d8ae3SPaolo Bonzini } 5271c50d8ae3SPaolo Bonzini 5272c50d8ae3SPaolo Bonzini return flush; 5273c50d8ae3SPaolo Bonzini } 5274c50d8ae3SPaolo Bonzini 5275c50d8ae3SPaolo Bonzini static __always_inline bool 5276c50d8ae3SPaolo Bonzini slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5277c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5278302695a5SSean Christopherson bool flush_on_yield) 5279c50d8ae3SPaolo Bonzini { 5280c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5281c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5282c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 52831a61b7dbSSean Christopherson flush_on_yield, false); 5284c50d8ae3SPaolo Bonzini } 5285c50d8ae3SPaolo Bonzini 5286c50d8ae3SPaolo Bonzini static __always_inline bool 5287c50d8ae3SPaolo Bonzini slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, 5288302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5289c50d8ae3SPaolo Bonzini { 52903bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5291302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5292c50d8ae3SPaolo Bonzini } 5293c50d8ae3SPaolo Bonzini 5294c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5295c50d8ae3SPaolo Bonzini { 52964a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 52974a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5298c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 5299c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->lm_root); 5300c50d8ae3SPaolo Bonzini } 5301c50d8ae3SPaolo Bonzini 530204d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5303c50d8ae3SPaolo Bonzini { 5304c50d8ae3SPaolo Bonzini struct page *page; 5305c50d8ae3SPaolo Bonzini int i; 5306c50d8ae3SPaolo Bonzini 530704d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 530804d28e37SSean Christopherson mmu->root_pgd = 0; 530904d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 531004d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 531104d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 531204d28e37SSean Christopherson 5313c50d8ae3SPaolo Bonzini /* 5314c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5315c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5316c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5317c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 531804d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 531904d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 532004d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 532104d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 532204d45551SSean Christopherson * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots(). 5323c50d8ae3SPaolo Bonzini */ 5324d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5325c50d8ae3SPaolo Bonzini return 0; 5326c50d8ae3SPaolo Bonzini 5327c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5328c50d8ae3SPaolo Bonzini if (!page) 5329c50d8ae3SPaolo Bonzini return -ENOMEM; 5330c50d8ae3SPaolo Bonzini 5331c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 53324a98623dSSean Christopherson 53334a98623dSSean Christopherson /* 53344a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 53354a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 53364a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 53374a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 53384a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 53394a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 53404a98623dSSean Christopherson */ 53414a98623dSSean Christopherson if (!tdp_enabled) 53424a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 53434a98623dSSean Christopherson else 53444a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 53454a98623dSSean Christopherson 5346c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5347c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5348c50d8ae3SPaolo Bonzini 5349c50d8ae3SPaolo Bonzini return 0; 5350c50d8ae3SPaolo Bonzini } 5351c50d8ae3SPaolo Bonzini 5352c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5353c50d8ae3SPaolo Bonzini { 5354c50d8ae3SPaolo Bonzini int ret; 5355c50d8ae3SPaolo Bonzini 53565962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 53575f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 53585f6078f9SSean Christopherson 53595962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 53605f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 53615962bfb7SSean Christopherson 536296880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 536396880883SSean Christopherson 5364c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5365c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5366c50d8ae3SPaolo Bonzini 5367c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5368c50d8ae3SPaolo Bonzini 536904d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5370c50d8ae3SPaolo Bonzini if (ret) 5371c50d8ae3SPaolo Bonzini return ret; 5372c50d8ae3SPaolo Bonzini 537304d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5374c50d8ae3SPaolo Bonzini if (ret) 5375c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5376c50d8ae3SPaolo Bonzini 5377c50d8ae3SPaolo Bonzini return ret; 5378c50d8ae3SPaolo Bonzini fail_allocate_root: 5379c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5380c50d8ae3SPaolo Bonzini return ret; 5381c50d8ae3SPaolo Bonzini } 5382c50d8ae3SPaolo Bonzini 5383c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5384c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5385c50d8ae3SPaolo Bonzini { 5386c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5387c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5388c50d8ae3SPaolo Bonzini 5389c50d8ae3SPaolo Bonzini restart: 5390c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5391c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5392c50d8ae3SPaolo Bonzini /* 5393c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5394c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5395c50d8ae3SPaolo Bonzini */ 5396c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5397c50d8ae3SPaolo Bonzini break; 5398c50d8ae3SPaolo Bonzini 5399c50d8ae3SPaolo Bonzini /* 5400f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5401f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5402f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5403c50d8ae3SPaolo Bonzini */ 5404f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5405c50d8ae3SPaolo Bonzini continue; 5406c50d8ae3SPaolo Bonzini 5407c50d8ae3SPaolo Bonzini /* 5408c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5409c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5410c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5411c50d8ae3SPaolo Bonzini * be in active use by the guest. 5412c50d8ae3SPaolo Bonzini */ 5413c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5414531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5415c50d8ae3SPaolo Bonzini batch = 0; 5416c50d8ae3SPaolo Bonzini goto restart; 5417c50d8ae3SPaolo Bonzini } 5418c50d8ae3SPaolo Bonzini 5419c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5420c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5421c50d8ae3SPaolo Bonzini batch += nr_zapped; 5422c50d8ae3SPaolo Bonzini goto restart; 5423c50d8ae3SPaolo Bonzini } 5424c50d8ae3SPaolo Bonzini } 5425c50d8ae3SPaolo Bonzini 5426c50d8ae3SPaolo Bonzini /* 5427c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5428c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5429c50d8ae3SPaolo Bonzini * may reference the pages. 5430c50d8ae3SPaolo Bonzini */ 5431c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5432c50d8ae3SPaolo Bonzini } 5433c50d8ae3SPaolo Bonzini 5434c50d8ae3SPaolo Bonzini /* 5435c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5436c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5437c50d8ae3SPaolo Bonzini * 5438c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5439c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5440c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5441c50d8ae3SPaolo Bonzini * after calling the function. 5442c50d8ae3SPaolo Bonzini */ 5443c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5444c50d8ae3SPaolo Bonzini { 5445c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5446c50d8ae3SPaolo Bonzini 5447531810caSBen Gardon write_lock(&kvm->mmu_lock); 5448c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5449c50d8ae3SPaolo Bonzini 5450c50d8ae3SPaolo Bonzini /* 5451c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5452c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5453c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5454c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5455c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5456c50d8ae3SPaolo Bonzini */ 5457c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5458c50d8ae3SPaolo Bonzini 5459c50d8ae3SPaolo Bonzini /* 5460c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5461c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5462c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5463c50d8ae3SPaolo Bonzini * 5464c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5465c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5466c50d8ae3SPaolo Bonzini */ 5467c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5468c50d8ae3SPaolo Bonzini 5469c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5470faaf05b0SBen Gardon 5471897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5472faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5473faaf05b0SBen Gardon 5474531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5475c50d8ae3SPaolo Bonzini } 5476c50d8ae3SPaolo Bonzini 5477c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5478c50d8ae3SPaolo Bonzini { 5479c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5480c50d8ae3SPaolo Bonzini } 5481c50d8ae3SPaolo Bonzini 5482c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5483c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5484c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5485c50d8ae3SPaolo Bonzini { 5486c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5487c50d8ae3SPaolo Bonzini } 5488c50d8ae3SPaolo Bonzini 5489c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5490c50d8ae3SPaolo Bonzini { 5491c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5492c50d8ae3SPaolo Bonzini 5493fe5db27dSBen Gardon kvm_mmu_init_tdp_mmu(kvm); 5494fe5db27dSBen Gardon 5495c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5496c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5497c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5498c50d8ae3SPaolo Bonzini } 5499c50d8ae3SPaolo Bonzini 5500c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5501c50d8ae3SPaolo Bonzini { 5502c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5503c50d8ae3SPaolo Bonzini 5504c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5505fe5db27dSBen Gardon 5506fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5507c50d8ae3SPaolo Bonzini } 5508c50d8ae3SPaolo Bonzini 5509c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5510c50d8ae3SPaolo Bonzini { 5511c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5512c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5513c50d8ae3SPaolo Bonzini int i; 55141a61b7dbSSean Christopherson bool flush = false; 5515c50d8ae3SPaolo Bonzini 5516531810caSBen Gardon write_lock(&kvm->mmu_lock); 5517c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5518c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5519c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5520c50d8ae3SPaolo Bonzini gfn_t start, end; 5521c50d8ae3SPaolo Bonzini 5522c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5523c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5524c50d8ae3SPaolo Bonzini if (start >= end) 5525c50d8ae3SPaolo Bonzini continue; 5526c50d8ae3SPaolo Bonzini 5527302695a5SSean Christopherson flush = slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, 55283bae0459SSean Christopherson PG_LEVEL_4K, 5529e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 55301a61b7dbSSean Christopherson start, end - 1, true, flush); 55311a61b7dbSSean Christopherson } 55321a61b7dbSSean Christopherson } 5533302695a5SSean Christopherson 55342b9663d8SSean Christopherson if (is_tdp_mmu_enabled(kvm)) { 55352b9663d8SSean Christopherson for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 55362b9663d8SSean Christopherson flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 55372b9663d8SSean Christopherson gfn_end, flush); 55382b9663d8SSean Christopherson } 55392b9663d8SSean Christopherson 5540302695a5SSean Christopherson if (flush) 55411a61b7dbSSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, gfn_end); 5542c50d8ae3SPaolo Bonzini 5543531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5544c50d8ae3SPaolo Bonzini } 5545c50d8ae3SPaolo Bonzini 5546c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 55470a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 55480a234f5dSSean Christopherson struct kvm_memory_slot *slot) 5549c50d8ae3SPaolo Bonzini { 5550c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5551c50d8ae3SPaolo Bonzini } 5552c50d8ae3SPaolo Bonzini 5553c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 55543c9bd400SJay Zhou struct kvm_memory_slot *memslot, 55553c9bd400SJay Zhou int start_level) 5556c50d8ae3SPaolo Bonzini { 5557c50d8ae3SPaolo Bonzini bool flush; 5558c50d8ae3SPaolo Bonzini 5559531810caSBen Gardon write_lock(&kvm->mmu_lock); 55603c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5561e662ec3eSSean Christopherson start_level, KVM_MAX_HUGEPAGE_LEVEL, false); 5562897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5563*dbb6964eSPaolo Bonzini flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 5564531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5565c50d8ae3SPaolo Bonzini 5566c50d8ae3SPaolo Bonzini /* 5567c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5568c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5569c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5570c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5571c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5572c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 55735fc3424fSSean Christopherson * have checked Host-writable | MMU-writable instead of 55745fc3424fSSean Christopherson * PT_WRITABLE_MASK, that means it does not depend on PT_WRITABLE_MASK 55755fc3424fSSean Christopherson * anymore. 5576c50d8ae3SPaolo Bonzini */ 5577c50d8ae3SPaolo Bonzini if (flush) 55787f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5579c50d8ae3SPaolo Bonzini } 5580c50d8ae3SPaolo Bonzini 5581c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 55820a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 55830a234f5dSSean Christopherson struct kvm_memory_slot *slot) 5584c50d8ae3SPaolo Bonzini { 5585c50d8ae3SPaolo Bonzini u64 *sptep; 5586c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5587c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5588c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5589c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5590c50d8ae3SPaolo Bonzini 5591c50d8ae3SPaolo Bonzini restart: 5592c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 559357354682SSean Christopherson sp = sptep_to_sp(sptep); 5594c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5595c50d8ae3SPaolo Bonzini 5596c50d8ae3SPaolo Bonzini /* 5597c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5598c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5599c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5600c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5601c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5602c50d8ae3SPaolo Bonzini */ 5603c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 56049eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 56059eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 5606c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 5607c50d8ae3SPaolo Bonzini 5608c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5609c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5610c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5611c50d8ae3SPaolo Bonzini else 5612c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5613c50d8ae3SPaolo Bonzini 5614c50d8ae3SPaolo Bonzini goto restart; 5615c50d8ae3SPaolo Bonzini } 5616c50d8ae3SPaolo Bonzini } 5617c50d8ae3SPaolo Bonzini 5618c50d8ae3SPaolo Bonzini return need_tlb_flush; 5619c50d8ae3SPaolo Bonzini } 5620c50d8ae3SPaolo Bonzini 5621c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5622c50d8ae3SPaolo Bonzini const struct kvm_memory_slot *memslot) 5623c50d8ae3SPaolo Bonzini { 5624c50d8ae3SPaolo Bonzini /* FIXME: const-ify all uses of struct kvm_memory_slot. */ 56259eba50f8SSean Christopherson struct kvm_memory_slot *slot = (struct kvm_memory_slot *)memslot; 5626302695a5SSean Christopherson bool flush; 56279eba50f8SSean Christopherson 5628531810caSBen Gardon write_lock(&kvm->mmu_lock); 5629302695a5SSean Christopherson flush = slot_handle_leaf(kvm, slot, kvm_mmu_zap_collapsible_spte, true); 5630142ccde1SSean Christopherson 5631142ccde1SSean Christopherson if (is_tdp_mmu_enabled(kvm)) 5632142ccde1SSean Christopherson flush = kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot, flush); 5633142ccde1SSean Christopherson 5634302695a5SSean Christopherson if (flush) 5635302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 563614881998SBen Gardon 5637531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5638c50d8ae3SPaolo Bonzini } 5639c50d8ae3SPaolo Bonzini 5640b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 5641b3594ffbSSean Christopherson struct kvm_memory_slot *memslot) 5642b3594ffbSSean Christopherson { 5643b3594ffbSSean Christopherson /* 56447f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5645302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 56467f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 56477f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 56487f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5649b3594ffbSSean Christopherson */ 5650b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5651cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5652cec37648SSean Christopherson memslot->npages); 5653b3594ffbSSean Christopherson } 5654b3594ffbSSean Christopherson 5655c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5656c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5657c50d8ae3SPaolo Bonzini { 5658c50d8ae3SPaolo Bonzini bool flush; 5659c50d8ae3SPaolo Bonzini 5660531810caSBen Gardon write_lock(&kvm->mmu_lock); 5661c50d8ae3SPaolo Bonzini flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false); 5662897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5663a6a0b05dSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 5664531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5665c50d8ae3SPaolo Bonzini 5666c50d8ae3SPaolo Bonzini /* 5667c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5668c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5669c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5670c50d8ae3SPaolo Bonzini * dirty_bitmap. 5671c50d8ae3SPaolo Bonzini */ 5672c50d8ae3SPaolo Bonzini if (flush) 56737f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5674c50d8ae3SPaolo Bonzini } 5675c50d8ae3SPaolo Bonzini 5676c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5677c50d8ae3SPaolo Bonzini { 5678c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5679c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5680c50d8ae3SPaolo Bonzini int ign; 5681c50d8ae3SPaolo Bonzini 5682531810caSBen Gardon write_lock(&kvm->mmu_lock); 5683c50d8ae3SPaolo Bonzini restart: 5684c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5685f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5686c50d8ae3SPaolo Bonzini continue; 5687c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5688c50d8ae3SPaolo Bonzini goto restart; 5689531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5690c50d8ae3SPaolo Bonzini goto restart; 5691c50d8ae3SPaolo Bonzini } 5692c50d8ae3SPaolo Bonzini 5693c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5694faaf05b0SBen Gardon 5695897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5696faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5697faaf05b0SBen Gardon 5698531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5699c50d8ae3SPaolo Bonzini } 5700c50d8ae3SPaolo Bonzini 5701c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5702c50d8ae3SPaolo Bonzini { 5703c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5704c50d8ae3SPaolo Bonzini 5705c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5706c50d8ae3SPaolo Bonzini 5707c50d8ae3SPaolo Bonzini /* 5708c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5709c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5710c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5711c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5712c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5713c50d8ae3SPaolo Bonzini */ 5714c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5715c50d8ae3SPaolo Bonzini 5716c50d8ae3SPaolo Bonzini /* 5717c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5718c50d8ae3SPaolo Bonzini * zap all shadow pages. 5719c50d8ae3SPaolo Bonzini */ 5720c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 5721c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 5722c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5723c50d8ae3SPaolo Bonzini } 5724c50d8ae3SPaolo Bonzini } 5725c50d8ae3SPaolo Bonzini 5726c50d8ae3SPaolo Bonzini static unsigned long 5727c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 5728c50d8ae3SPaolo Bonzini { 5729c50d8ae3SPaolo Bonzini struct kvm *kvm; 5730c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 5731c50d8ae3SPaolo Bonzini unsigned long freed = 0; 5732c50d8ae3SPaolo Bonzini 5733c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5734c50d8ae3SPaolo Bonzini 5735c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5736c50d8ae3SPaolo Bonzini int idx; 5737c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5738c50d8ae3SPaolo Bonzini 5739c50d8ae3SPaolo Bonzini /* 5740c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 5741c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 5742c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 5743c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 5744c50d8ae3SPaolo Bonzini */ 5745c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 5746c50d8ae3SPaolo Bonzini break; 5747c50d8ae3SPaolo Bonzini /* 5748c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 5749c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 5750c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 5751c50d8ae3SPaolo Bonzini * anyway. 5752c50d8ae3SPaolo Bonzini */ 5753c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 5754c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 5755c50d8ae3SPaolo Bonzini continue; 5756c50d8ae3SPaolo Bonzini 5757c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 5758531810caSBen Gardon write_lock(&kvm->mmu_lock); 5759c50d8ae3SPaolo Bonzini 5760c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 5761c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 5762c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 5763c50d8ae3SPaolo Bonzini goto unlock; 5764c50d8ae3SPaolo Bonzini } 5765c50d8ae3SPaolo Bonzini 5766ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 5767c50d8ae3SPaolo Bonzini 5768c50d8ae3SPaolo Bonzini unlock: 5769531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5770c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 5771c50d8ae3SPaolo Bonzini 5772c50d8ae3SPaolo Bonzini /* 5773c50d8ae3SPaolo Bonzini * unfair on small ones 5774c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 5775c50d8ae3SPaolo Bonzini * sadness comes quickly 5776c50d8ae3SPaolo Bonzini */ 5777c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 5778c50d8ae3SPaolo Bonzini break; 5779c50d8ae3SPaolo Bonzini } 5780c50d8ae3SPaolo Bonzini 5781c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5782c50d8ae3SPaolo Bonzini return freed; 5783c50d8ae3SPaolo Bonzini } 5784c50d8ae3SPaolo Bonzini 5785c50d8ae3SPaolo Bonzini static unsigned long 5786c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 5787c50d8ae3SPaolo Bonzini { 5788c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 5789c50d8ae3SPaolo Bonzini } 5790c50d8ae3SPaolo Bonzini 5791c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 5792c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 5793c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 5794c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 5795c50d8ae3SPaolo Bonzini }; 5796c50d8ae3SPaolo Bonzini 5797c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 5798c50d8ae3SPaolo Bonzini { 5799c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 5800c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 5801c50d8ae3SPaolo Bonzini } 5802c50d8ae3SPaolo Bonzini 5803c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 5804c50d8ae3SPaolo Bonzini { 5805c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 5806c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 5807c50d8ae3SPaolo Bonzini } 5808c50d8ae3SPaolo Bonzini 5809c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 5810c50d8ae3SPaolo Bonzini { 5811c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 5812c50d8ae3SPaolo Bonzini } 5813c50d8ae3SPaolo Bonzini 5814c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 5815c50d8ae3SPaolo Bonzini { 5816c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 5817c50d8ae3SPaolo Bonzini bool new_val; 5818c50d8ae3SPaolo Bonzini 5819c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 5820c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 5821c50d8ae3SPaolo Bonzini new_val = 0; 5822c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 5823c50d8ae3SPaolo Bonzini new_val = 1; 5824c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 5825c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 5826c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 5827c50d8ae3SPaolo Bonzini return -EINVAL; 5828c50d8ae3SPaolo Bonzini 5829c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 5830c50d8ae3SPaolo Bonzini 5831c50d8ae3SPaolo Bonzini if (new_val != old_val) { 5832c50d8ae3SPaolo Bonzini struct kvm *kvm; 5833c50d8ae3SPaolo Bonzini 5834c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5835c50d8ae3SPaolo Bonzini 5836c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5837c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 5838c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5839c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 5840c50d8ae3SPaolo Bonzini 5841c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5842c50d8ae3SPaolo Bonzini } 5843c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5844c50d8ae3SPaolo Bonzini } 5845c50d8ae3SPaolo Bonzini 5846c50d8ae3SPaolo Bonzini return 0; 5847c50d8ae3SPaolo Bonzini } 5848c50d8ae3SPaolo Bonzini 5849c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 5850c50d8ae3SPaolo Bonzini { 5851c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 5852c50d8ae3SPaolo Bonzini 5853c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 5854c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 5855c50d8ae3SPaolo Bonzini 5856c50d8ae3SPaolo Bonzini /* 5857c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 5858c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 5859c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 5860c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 5861c50d8ae3SPaolo Bonzini */ 5862c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 5863c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 5864c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 5865c50d8ae3SPaolo Bonzini 5866c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 5867c50d8ae3SPaolo Bonzini 5868c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 5869c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 5870c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5871c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 5872c50d8ae3SPaolo Bonzini goto out; 5873c50d8ae3SPaolo Bonzini 5874c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 5875c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 5876c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5877c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 5878c50d8ae3SPaolo Bonzini goto out; 5879c50d8ae3SPaolo Bonzini 5880c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 5881c50d8ae3SPaolo Bonzini goto out; 5882c50d8ae3SPaolo Bonzini 5883c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 5884c50d8ae3SPaolo Bonzini if (ret) 5885c50d8ae3SPaolo Bonzini goto out; 5886c50d8ae3SPaolo Bonzini 5887c50d8ae3SPaolo Bonzini return 0; 5888c50d8ae3SPaolo Bonzini 5889c50d8ae3SPaolo Bonzini out: 5890c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 5891c50d8ae3SPaolo Bonzini return ret; 5892c50d8ae3SPaolo Bonzini } 5893c50d8ae3SPaolo Bonzini 5894c50d8ae3SPaolo Bonzini /* 5895c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 5896c50d8ae3SPaolo Bonzini */ 5897c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 5898c50d8ae3SPaolo Bonzini { 5899c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 5900c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 5901c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5902c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5903c50d8ae3SPaolo Bonzini int i; 5904c50d8ae3SPaolo Bonzini 5905c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5906c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5907c50d8ae3SPaolo Bonzini 5908c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 5909c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 5910c50d8ae3SPaolo Bonzini } 5911c50d8ae3SPaolo Bonzini 5912c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 5913c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 5914c50d8ae3SPaolo Bonzini 5915c50d8ae3SPaolo Bonzini return nr_mmu_pages; 5916c50d8ae3SPaolo Bonzini } 5917c50d8ae3SPaolo Bonzini 5918c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 5919c50d8ae3SPaolo Bonzini { 5920c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5921c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 5922c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5923c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 5924c50d8ae3SPaolo Bonzini } 5925c50d8ae3SPaolo Bonzini 5926c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 5927c50d8ae3SPaolo Bonzini { 5928c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 5929c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 5930c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 5931c50d8ae3SPaolo Bonzini mmu_audit_disable(); 5932c50d8ae3SPaolo Bonzini } 5933c50d8ae3SPaolo Bonzini 5934c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 5935c50d8ae3SPaolo Bonzini { 5936c50d8ae3SPaolo Bonzini unsigned int old_val; 5937c50d8ae3SPaolo Bonzini int err; 5938c50d8ae3SPaolo Bonzini 5939c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 5940c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 5941c50d8ae3SPaolo Bonzini if (err) 5942c50d8ae3SPaolo Bonzini return err; 5943c50d8ae3SPaolo Bonzini 5944c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 5945c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 5946c50d8ae3SPaolo Bonzini struct kvm *kvm; 5947c50d8ae3SPaolo Bonzini 5948c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5949c50d8ae3SPaolo Bonzini 5950c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 5951c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5952c50d8ae3SPaolo Bonzini 5953c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5954c50d8ae3SPaolo Bonzini } 5955c50d8ae3SPaolo Bonzini 5956c50d8ae3SPaolo Bonzini return err; 5957c50d8ae3SPaolo Bonzini } 5958c50d8ae3SPaolo Bonzini 5959c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 5960c50d8ae3SPaolo Bonzini { 5961c50d8ae3SPaolo Bonzini int rcu_idx; 5962c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5963c50d8ae3SPaolo Bonzini unsigned int ratio; 5964c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5965048f4980SSean Christopherson bool flush = false; 5966c50d8ae3SPaolo Bonzini ulong to_zap; 5967c50d8ae3SPaolo Bonzini 5968c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 5969531810caSBen Gardon write_lock(&kvm->mmu_lock); 5970c50d8ae3SPaolo Bonzini 5971c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 5972c50d8ae3SPaolo Bonzini to_zap = ratio ? DIV_ROUND_UP(kvm->stat.nx_lpage_splits, ratio) : 0; 59737d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 59747d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 59757d919c7aSSean Christopherson break; 59767d919c7aSSean Christopherson 5977c50d8ae3SPaolo Bonzini /* 5978c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 5979c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 5980c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 5981c50d8ae3SPaolo Bonzini */ 5982c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 5983c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 5984c50d8ae3SPaolo Bonzini lpage_disallowed_link); 5985c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 5986897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 598733a31641SSean Christopherson flush = kvm_tdp_mmu_zap_sp(kvm, sp); 59888d1a182eSBen Gardon } else { 5989c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 5990c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 599129cf0f50SBen Gardon } 5992c50d8ae3SPaolo Bonzini 5993531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5994048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 5995531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5996048f4980SSean Christopherson flush = false; 5997c50d8ae3SPaolo Bonzini } 5998c50d8ae3SPaolo Bonzini } 5999048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6000c50d8ae3SPaolo Bonzini 6001531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6002c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6003c50d8ae3SPaolo Bonzini } 6004c50d8ae3SPaolo Bonzini 6005c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6006c50d8ae3SPaolo Bonzini { 6007c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6008c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6009c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6010c50d8ae3SPaolo Bonzini } 6011c50d8ae3SPaolo Bonzini 6012c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6013c50d8ae3SPaolo Bonzini { 6014c50d8ae3SPaolo Bonzini u64 start_time; 6015c50d8ae3SPaolo Bonzini long remaining_time; 6016c50d8ae3SPaolo Bonzini 6017c50d8ae3SPaolo Bonzini while (true) { 6018c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6019c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6020c50d8ae3SPaolo Bonzini 6021c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6022c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6023c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6024c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6025c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6026c50d8ae3SPaolo Bonzini } 6027c50d8ae3SPaolo Bonzini 6028c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6029c50d8ae3SPaolo Bonzini 6030c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6031c50d8ae3SPaolo Bonzini return 0; 6032c50d8ae3SPaolo Bonzini 6033c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6034c50d8ae3SPaolo Bonzini } 6035c50d8ae3SPaolo Bonzini } 6036c50d8ae3SPaolo Bonzini 6037c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6038c50d8ae3SPaolo Bonzini { 6039c50d8ae3SPaolo Bonzini int err; 6040c50d8ae3SPaolo Bonzini 6041c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6042c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6043c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6044c50d8ae3SPaolo Bonzini if (!err) 6045c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6046c50d8ae3SPaolo Bonzini 6047c50d8ae3SPaolo Bonzini return err; 6048c50d8ae3SPaolo Bonzini } 6049c50d8ae3SPaolo Bonzini 6050c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6051c50d8ae3SPaolo Bonzini { 6052c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6053c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6054c50d8ae3SPaolo Bonzini } 6055