1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22c50d8ae3SPaolo Bonzini #include "x86.h" 23c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 242f728d66SSean Christopherson #include "kvm_emulate.h" 25c50d8ae3SPaolo Bonzini #include "cpuid.h" 26c50d8ae3SPaolo Bonzini 27c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 28c50d8ae3SPaolo Bonzini #include <linux/types.h> 29c50d8ae3SPaolo Bonzini #include <linux/string.h> 30c50d8ae3SPaolo Bonzini #include <linux/mm.h> 31c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 32c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 33c50d8ae3SPaolo Bonzini #include <linux/export.h> 34c50d8ae3SPaolo Bonzini #include <linux/swap.h> 35c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 36c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 37c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 38c50d8ae3SPaolo Bonzini #include <linux/slab.h> 39c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 40c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 41c50d8ae3SPaolo Bonzini #include <linux/hash.h> 42c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 43c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 44c50d8ae3SPaolo Bonzini 45c50d8ae3SPaolo Bonzini #include <asm/page.h> 46eb243d1dSIngo Molnar #include <asm/memtype.h> 47c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 48c50d8ae3SPaolo Bonzini #include <asm/e820/api.h> 49c50d8ae3SPaolo Bonzini #include <asm/io.h> 50c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 51c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 52c50d8ae3SPaolo Bonzini #include "trace.h" 53c50d8ae3SPaolo Bonzini 54c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 55c50d8ae3SPaolo Bonzini 56c50d8ae3SPaolo Bonzini static int __read_mostly nx_huge_pages = -1; 57c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 58c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 59c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 60c50d8ae3SPaolo Bonzini #else 61c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 62c50d8ae3SPaolo Bonzini #endif 63c50d8ae3SPaolo Bonzini 64c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 65c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 66c50d8ae3SPaolo Bonzini 67d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 68c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 69c50d8ae3SPaolo Bonzini .get = param_get_bool, 70c50d8ae3SPaolo Bonzini }; 71c50d8ae3SPaolo Bonzini 72d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 73c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 74c50d8ae3SPaolo Bonzini .get = param_get_uint, 75c50d8ae3SPaolo Bonzini }; 76c50d8ae3SPaolo Bonzini 77c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 78c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 79c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 80c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 81c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 82c50d8ae3SPaolo Bonzini 8371fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8471fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8571fe7013SSean Christopherson 86c50d8ae3SPaolo Bonzini /* 87c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 88c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 89c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 90c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 91c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 92c50d8ae3SPaolo Bonzini */ 93c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 94c50d8ae3SPaolo Bonzini 951d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 9683013059SSean Christopherson static int max_tdp_level __read_mostly; 97703c335dSSean Christopherson 98c50d8ae3SPaolo Bonzini enum { 99c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 100c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 101c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 102c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 103c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 104c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 105c50d8ae3SPaolo Bonzini }; 106c50d8ae3SPaolo Bonzini 107c50d8ae3SPaolo Bonzini #undef MMU_DEBUG 108c50d8ae3SPaolo Bonzini 109c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 110c50d8ae3SPaolo Bonzini static bool dbg = 0; 111c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 112c50d8ae3SPaolo Bonzini 113c50d8ae3SPaolo Bonzini #define pgprintk(x...) do { if (dbg) printk(x); } while (0) 114c50d8ae3SPaolo Bonzini #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) 115c50d8ae3SPaolo Bonzini #define MMU_WARN_ON(x) WARN_ON(x) 116c50d8ae3SPaolo Bonzini #else 117c50d8ae3SPaolo Bonzini #define pgprintk(x...) do { } while (0) 118c50d8ae3SPaolo Bonzini #define rmap_printk(x...) do { } while (0) 119c50d8ae3SPaolo Bonzini #define MMU_WARN_ON(x) do { } while (0) 120c50d8ae3SPaolo Bonzini #endif 121c50d8ae3SPaolo Bonzini 122c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 123c50d8ae3SPaolo Bonzini 124c50d8ae3SPaolo Bonzini #define PT_FIRST_AVAIL_BITS_SHIFT 10 125c50d8ae3SPaolo Bonzini #define PT64_SECOND_AVAIL_BITS_SHIFT 54 126c50d8ae3SPaolo Bonzini 127c50d8ae3SPaolo Bonzini /* 128c50d8ae3SPaolo Bonzini * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 129c50d8ae3SPaolo Bonzini * Access Tracking SPTEs. 130c50d8ae3SPaolo Bonzini */ 131c50d8ae3SPaolo Bonzini #define SPTE_SPECIAL_MASK (3ULL << 52) 132c50d8ae3SPaolo Bonzini #define SPTE_AD_ENABLED_MASK (0ULL << 52) 133c50d8ae3SPaolo Bonzini #define SPTE_AD_DISABLED_MASK (1ULL << 52) 134c50d8ae3SPaolo Bonzini #define SPTE_AD_WRPROT_ONLY_MASK (2ULL << 52) 135c50d8ae3SPaolo Bonzini #define SPTE_MMIO_MASK (3ULL << 52) 136c50d8ae3SPaolo Bonzini 137c50d8ae3SPaolo Bonzini #define PT64_LEVEL_BITS 9 138c50d8ae3SPaolo Bonzini 139c50d8ae3SPaolo Bonzini #define PT64_LEVEL_SHIFT(level) \ 140c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) 141c50d8ae3SPaolo Bonzini 142c50d8ae3SPaolo Bonzini #define PT64_INDEX(address, level)\ 143c50d8ae3SPaolo Bonzini (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) 144c50d8ae3SPaolo Bonzini 145c50d8ae3SPaolo Bonzini 146c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 147c50d8ae3SPaolo Bonzini 148c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 149c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 150c50d8ae3SPaolo Bonzini 151c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 152c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 153c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 154c50d8ae3SPaolo Bonzini 155c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 156c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 157c50d8ae3SPaolo Bonzini 158c50d8ae3SPaolo Bonzini 159c50d8ae3SPaolo Bonzini #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK 160c50d8ae3SPaolo Bonzini #define PT64_BASE_ADDR_MASK (physical_mask & ~(u64)(PAGE_SIZE-1)) 161c50d8ae3SPaolo Bonzini #else 162c50d8ae3SPaolo Bonzini #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) 163c50d8ae3SPaolo Bonzini #endif 164c50d8ae3SPaolo Bonzini #define PT64_LVL_ADDR_MASK(level) \ 165c50d8ae3SPaolo Bonzini (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 166c50d8ae3SPaolo Bonzini * PT64_LEVEL_BITS))) - 1)) 167c50d8ae3SPaolo Bonzini #define PT64_LVL_OFFSET_MASK(level) \ 168c50d8ae3SPaolo Bonzini (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 169c50d8ae3SPaolo Bonzini * PT64_LEVEL_BITS))) - 1)) 170c50d8ae3SPaolo Bonzini 171c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 172c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 173c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 174c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 175c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 176c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 177c50d8ae3SPaolo Bonzini 178c50d8ae3SPaolo Bonzini #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \ 179c50d8ae3SPaolo Bonzini | shadow_x_mask | shadow_nx_mask | shadow_me_mask) 180c50d8ae3SPaolo Bonzini 181c50d8ae3SPaolo Bonzini #define ACC_EXEC_MASK 1 182c50d8ae3SPaolo Bonzini #define ACC_WRITE_MASK PT_WRITABLE_MASK 183c50d8ae3SPaolo Bonzini #define ACC_USER_MASK PT_USER_MASK 184c50d8ae3SPaolo Bonzini #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) 185c50d8ae3SPaolo Bonzini 186c50d8ae3SPaolo Bonzini /* The mask for the R/X bits in EPT PTEs */ 187c50d8ae3SPaolo Bonzini #define PT64_EPT_READABLE_MASK 0x1ull 188c50d8ae3SPaolo Bonzini #define PT64_EPT_EXECUTABLE_MASK 0x4ull 189c50d8ae3SPaolo Bonzini 190c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 191c50d8ae3SPaolo Bonzini 192c50d8ae3SPaolo Bonzini #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) 193c50d8ae3SPaolo Bonzini #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1)) 194c50d8ae3SPaolo Bonzini 195c50d8ae3SPaolo Bonzini #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) 196c50d8ae3SPaolo Bonzini 197c50d8ae3SPaolo Bonzini /* make pte_list_desc fit well in cache line */ 198c50d8ae3SPaolo Bonzini #define PTE_LIST_EXT 3 199c50d8ae3SPaolo Bonzini 200c50d8ae3SPaolo Bonzini /* 201c4371c2aSSean Christopherson * Return values of handle_mmio_page_fault, mmu.page_fault, and fast_page_fault(). 202c4371c2aSSean Christopherson * 203c50d8ae3SPaolo Bonzini * RET_PF_RETRY: let CPU fault again on the address. 204c50d8ae3SPaolo Bonzini * RET_PF_EMULATE: mmio page fault, emulate the instruction directly. 205c50d8ae3SPaolo Bonzini * RET_PF_INVALID: the spte is invalid, let the real page fault path update it. 206c4371c2aSSean Christopherson * RET_PF_FIXED: The faulting entry has been fixed. 207c4371c2aSSean Christopherson * RET_PF_SPURIOUS: The faulting entry was already fixed, e.g. by another vCPU. 208c50d8ae3SPaolo Bonzini */ 209c50d8ae3SPaolo Bonzini enum { 210c50d8ae3SPaolo Bonzini RET_PF_RETRY = 0, 211c4371c2aSSean Christopherson RET_PF_EMULATE, 212c4371c2aSSean Christopherson RET_PF_INVALID, 213c4371c2aSSean Christopherson RET_PF_FIXED, 214c4371c2aSSean Christopherson RET_PF_SPURIOUS, 215c50d8ae3SPaolo Bonzini }; 216c50d8ae3SPaolo Bonzini 217c50d8ae3SPaolo Bonzini struct pte_list_desc { 218c50d8ae3SPaolo Bonzini u64 *sptes[PTE_LIST_EXT]; 219c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 220c50d8ae3SPaolo Bonzini }; 221c50d8ae3SPaolo Bonzini 222c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 223c50d8ae3SPaolo Bonzini u64 addr; 224c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 225c50d8ae3SPaolo Bonzini u64 *sptep; 226c50d8ae3SPaolo Bonzini int level; 227c50d8ae3SPaolo Bonzini unsigned index; 228c50d8ae3SPaolo Bonzini }; 229c50d8ae3SPaolo Bonzini 230c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 231c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 232c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 233c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 234c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 235c50d8ae3SPaolo Bonzini 236c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 237c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 238c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 239c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 240c50d8ae3SPaolo Bonzini 241c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 242c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 243c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 244c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 245c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 246c50d8ae3SPaolo Bonzini 247c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 248c50d8ae3SPaolo Bonzini static struct kmem_cache *mmu_page_header_cache; 249c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 250c50d8ae3SPaolo Bonzini 251c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_nx_mask; 252c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ 253c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_user_mask; 254c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_accessed_mask; 255c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_dirty_mask; 256c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_mmio_value; 257c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_mmio_access_mask; 258c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_present_mask; 259c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_me_mask; 260c50d8ae3SPaolo Bonzini 261c50d8ae3SPaolo Bonzini /* 262c50d8ae3SPaolo Bonzini * SPTEs used by MMUs without A/D bits are marked with SPTE_AD_DISABLED_MASK; 263c50d8ae3SPaolo Bonzini * shadow_acc_track_mask is the set of bits to be cleared in non-accessed 264c50d8ae3SPaolo Bonzini * pages. 265c50d8ae3SPaolo Bonzini */ 266c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_acc_track_mask; 267c50d8ae3SPaolo Bonzini 268c50d8ae3SPaolo Bonzini /* 269c50d8ae3SPaolo Bonzini * The mask/shift to use for saving the original R/X bits when marking the PTE 270c50d8ae3SPaolo Bonzini * as not-present for access tracking purposes. We do not save the W bit as the 271c50d8ae3SPaolo Bonzini * PTEs being access tracked also need to be dirty tracked, so the W bit will be 272c50d8ae3SPaolo Bonzini * restored only when a write is attempted to the page. 273c50d8ae3SPaolo Bonzini */ 274c50d8ae3SPaolo Bonzini static const u64 shadow_acc_track_saved_bits_mask = PT64_EPT_READABLE_MASK | 275c50d8ae3SPaolo Bonzini PT64_EPT_EXECUTABLE_MASK; 276c50d8ae3SPaolo Bonzini static const u64 shadow_acc_track_saved_bits_shift = PT64_SECOND_AVAIL_BITS_SHIFT; 277c50d8ae3SPaolo Bonzini 278c50d8ae3SPaolo Bonzini /* 279c50d8ae3SPaolo Bonzini * This mask must be set on all non-zero Non-Present or Reserved SPTEs in order 280c50d8ae3SPaolo Bonzini * to guard against L1TF attacks. 281c50d8ae3SPaolo Bonzini */ 282c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_nonpresent_or_rsvd_mask; 283c50d8ae3SPaolo Bonzini 284c50d8ae3SPaolo Bonzini /* 285c50d8ae3SPaolo Bonzini * The number of high-order 1 bits to use in the mask above. 286c50d8ae3SPaolo Bonzini */ 287c50d8ae3SPaolo Bonzini static const u64 shadow_nonpresent_or_rsvd_mask_len = 5; 288c50d8ae3SPaolo Bonzini 289c50d8ae3SPaolo Bonzini /* 290c50d8ae3SPaolo Bonzini * In some cases, we need to preserve the GFN of a non-present or reserved 291c50d8ae3SPaolo Bonzini * SPTE when we usurp the upper five bits of the physical address space to 292c50d8ae3SPaolo Bonzini * defend against L1TF, e.g. for MMIO SPTEs. To preserve the GFN, we'll 293c50d8ae3SPaolo Bonzini * shift bits of the GFN that overlap with shadow_nonpresent_or_rsvd_mask 294c50d8ae3SPaolo Bonzini * left into the reserved bits, i.e. the GFN in the SPTE will be split into 295c50d8ae3SPaolo Bonzini * high and low parts. This mask covers the lower bits of the GFN. 296c50d8ae3SPaolo Bonzini */ 297c50d8ae3SPaolo Bonzini static u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask; 298c50d8ae3SPaolo Bonzini 299c50d8ae3SPaolo Bonzini /* 300c50d8ae3SPaolo Bonzini * The number of non-reserved physical address bits irrespective of features 301c50d8ae3SPaolo Bonzini * that repurpose legal bits, e.g. MKTME. 302c50d8ae3SPaolo Bonzini */ 303c50d8ae3SPaolo Bonzini static u8 __read_mostly shadow_phys_bits; 304c50d8ae3SPaolo Bonzini 305c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 306c50d8ae3SPaolo Bonzini static bool is_executable_pte(u64 spte); 307c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 308c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 309c50d8ae3SPaolo Bonzini 310c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 311c50d8ae3SPaolo Bonzini #include "mmutrace.h" 312c50d8ae3SPaolo Bonzini 313c50d8ae3SPaolo Bonzini 314c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 315c50d8ae3SPaolo Bonzini { 316afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 317c50d8ae3SPaolo Bonzini } 318c50d8ae3SPaolo Bonzini 319c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 320c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 321c50d8ae3SPaolo Bonzini { 322c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 323c50d8ae3SPaolo Bonzini 324afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 325afaf0b2fSSean Christopherson ret = kvm_x86_ops.tlb_remote_flush_with_range(kvm, range); 326c50d8ae3SPaolo Bonzini 327c50d8ae3SPaolo Bonzini if (ret) 328c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 329c50d8ae3SPaolo Bonzini } 330c50d8ae3SPaolo Bonzini 331c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 332c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 333c50d8ae3SPaolo Bonzini { 334c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 335c50d8ae3SPaolo Bonzini 336c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 337c50d8ae3SPaolo Bonzini range.pages = pages; 338c50d8ae3SPaolo Bonzini 339c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 340c50d8ae3SPaolo Bonzini } 341c50d8ae3SPaolo Bonzini 342e7581cacSPaolo Bonzini void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 access_mask) 343c50d8ae3SPaolo Bonzini { 344c50d8ae3SPaolo Bonzini BUG_ON((u64)(unsigned)access_mask != access_mask); 345d43e2675SPaolo Bonzini WARN_ON(mmio_value & (shadow_nonpresent_or_rsvd_mask << shadow_nonpresent_or_rsvd_mask_len)); 346d43e2675SPaolo Bonzini WARN_ON(mmio_value & shadow_nonpresent_or_rsvd_lower_gfn_mask); 347c50d8ae3SPaolo Bonzini shadow_mmio_value = mmio_value | SPTE_MMIO_MASK; 348c50d8ae3SPaolo Bonzini shadow_mmio_access_mask = access_mask; 349c50d8ae3SPaolo Bonzini } 350c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask); 351c50d8ae3SPaolo Bonzini 352c50d8ae3SPaolo Bonzini static bool is_mmio_spte(u64 spte) 353c50d8ae3SPaolo Bonzini { 354e7581cacSPaolo Bonzini return (spte & SPTE_SPECIAL_MASK) == SPTE_MMIO_MASK; 355c50d8ae3SPaolo Bonzini } 356c50d8ae3SPaolo Bonzini 357c50d8ae3SPaolo Bonzini static inline bool sp_ad_disabled(struct kvm_mmu_page *sp) 358c50d8ae3SPaolo Bonzini { 359c50d8ae3SPaolo Bonzini return sp->role.ad_disabled; 360c50d8ae3SPaolo Bonzini } 361c50d8ae3SPaolo Bonzini 362c50d8ae3SPaolo Bonzini static inline bool kvm_vcpu_ad_need_write_protect(struct kvm_vcpu *vcpu) 363c50d8ae3SPaolo Bonzini { 364c50d8ae3SPaolo Bonzini /* 365c50d8ae3SPaolo Bonzini * When using the EPT page-modification log, the GPAs in the log 366c50d8ae3SPaolo Bonzini * would come from L2 rather than L1. Therefore, we need to rely 367c50d8ae3SPaolo Bonzini * on write protection to record dirty pages. This also bypasses 368c50d8ae3SPaolo Bonzini * PML, since writes now result in a vmexit. 369c50d8ae3SPaolo Bonzini */ 370c50d8ae3SPaolo Bonzini return vcpu->arch.mmu == &vcpu->arch.guest_mmu; 371c50d8ae3SPaolo Bonzini } 372c50d8ae3SPaolo Bonzini 373c50d8ae3SPaolo Bonzini static inline bool spte_ad_enabled(u64 spte) 374c50d8ae3SPaolo Bonzini { 375c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 376c50d8ae3SPaolo Bonzini return (spte & SPTE_SPECIAL_MASK) != SPTE_AD_DISABLED_MASK; 377c50d8ae3SPaolo Bonzini } 378c50d8ae3SPaolo Bonzini 379c50d8ae3SPaolo Bonzini static inline bool spte_ad_need_write_protect(u64 spte) 380c50d8ae3SPaolo Bonzini { 381c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 382c50d8ae3SPaolo Bonzini return (spte & SPTE_SPECIAL_MASK) != SPTE_AD_ENABLED_MASK; 383c50d8ae3SPaolo Bonzini } 384c50d8ae3SPaolo Bonzini 385c50d8ae3SPaolo Bonzini static bool is_nx_huge_page_enabled(void) 386c50d8ae3SPaolo Bonzini { 387c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages); 388c50d8ae3SPaolo Bonzini } 389c50d8ae3SPaolo Bonzini 390c50d8ae3SPaolo Bonzini static inline u64 spte_shadow_accessed_mask(u64 spte) 391c50d8ae3SPaolo Bonzini { 392c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 393c50d8ae3SPaolo Bonzini return spte_ad_enabled(spte) ? shadow_accessed_mask : 0; 394c50d8ae3SPaolo Bonzini } 395c50d8ae3SPaolo Bonzini 396c50d8ae3SPaolo Bonzini static inline u64 spte_shadow_dirty_mask(u64 spte) 397c50d8ae3SPaolo Bonzini { 398c50d8ae3SPaolo Bonzini MMU_WARN_ON(is_mmio_spte(spte)); 399c50d8ae3SPaolo Bonzini return spte_ad_enabled(spte) ? shadow_dirty_mask : 0; 400c50d8ae3SPaolo Bonzini } 401c50d8ae3SPaolo Bonzini 402c50d8ae3SPaolo Bonzini static inline bool is_access_track_spte(u64 spte) 403c50d8ae3SPaolo Bonzini { 404c50d8ae3SPaolo Bonzini return !spte_ad_enabled(spte) && (spte & shadow_acc_track_mask) == 0; 405c50d8ae3SPaolo Bonzini } 406c50d8ae3SPaolo Bonzini 407c50d8ae3SPaolo Bonzini /* 408c50d8ae3SPaolo Bonzini * Due to limited space in PTEs, the MMIO generation is a 19 bit subset of 409c50d8ae3SPaolo Bonzini * the memslots generation and is derived as follows: 410c50d8ae3SPaolo Bonzini * 411c50d8ae3SPaolo Bonzini * Bits 0-8 of the MMIO generation are propagated to spte bits 3-11 412c50d8ae3SPaolo Bonzini * Bits 9-18 of the MMIO generation are propagated to spte bits 52-61 413c50d8ae3SPaolo Bonzini * 414c50d8ae3SPaolo Bonzini * The KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS flag is intentionally not included in 415c50d8ae3SPaolo Bonzini * the MMIO generation number, as doing so would require stealing a bit from 416c50d8ae3SPaolo Bonzini * the "real" generation number and thus effectively halve the maximum number 417c50d8ae3SPaolo Bonzini * of MMIO generations that can be handled before encountering a wrap (which 418c50d8ae3SPaolo Bonzini * requires a full MMU zap). The flag is instead explicitly queried when 419c50d8ae3SPaolo Bonzini * checking for MMIO spte cache hits. 420c50d8ae3SPaolo Bonzini */ 42156871d44SPaolo Bonzini #define MMIO_SPTE_GEN_MASK GENMASK_ULL(17, 0) 422c50d8ae3SPaolo Bonzini 423c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_LOW_START 3 424c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_LOW_END 11 425c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_LOW_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_END, \ 426c50d8ae3SPaolo Bonzini MMIO_SPTE_GEN_LOW_START) 427c50d8ae3SPaolo Bonzini 42856871d44SPaolo Bonzini #define MMIO_SPTE_GEN_HIGH_START PT64_SECOND_AVAIL_BITS_SHIFT 42956871d44SPaolo Bonzini #define MMIO_SPTE_GEN_HIGH_END 62 430c50d8ae3SPaolo Bonzini #define MMIO_SPTE_GEN_HIGH_MASK GENMASK_ULL(MMIO_SPTE_GEN_HIGH_END, \ 431c50d8ae3SPaolo Bonzini MMIO_SPTE_GEN_HIGH_START) 43256871d44SPaolo Bonzini 433c50d8ae3SPaolo Bonzini static u64 generation_mmio_spte_mask(u64 gen) 434c50d8ae3SPaolo Bonzini { 435c50d8ae3SPaolo Bonzini u64 mask; 436c50d8ae3SPaolo Bonzini 437c50d8ae3SPaolo Bonzini WARN_ON(gen & ~MMIO_SPTE_GEN_MASK); 43856871d44SPaolo Bonzini BUILD_BUG_ON((MMIO_SPTE_GEN_HIGH_MASK | MMIO_SPTE_GEN_LOW_MASK) & SPTE_SPECIAL_MASK); 439c50d8ae3SPaolo Bonzini 440c50d8ae3SPaolo Bonzini mask = (gen << MMIO_SPTE_GEN_LOW_START) & MMIO_SPTE_GEN_LOW_MASK; 441c50d8ae3SPaolo Bonzini mask |= (gen << MMIO_SPTE_GEN_HIGH_START) & MMIO_SPTE_GEN_HIGH_MASK; 442c50d8ae3SPaolo Bonzini return mask; 443c50d8ae3SPaolo Bonzini } 444c50d8ae3SPaolo Bonzini 445c50d8ae3SPaolo Bonzini static u64 get_mmio_spte_generation(u64 spte) 446c50d8ae3SPaolo Bonzini { 447c50d8ae3SPaolo Bonzini u64 gen; 448c50d8ae3SPaolo Bonzini 449c50d8ae3SPaolo Bonzini gen = (spte & MMIO_SPTE_GEN_LOW_MASK) >> MMIO_SPTE_GEN_LOW_START; 450c50d8ae3SPaolo Bonzini gen |= (spte & MMIO_SPTE_GEN_HIGH_MASK) >> MMIO_SPTE_GEN_HIGH_START; 451c50d8ae3SPaolo Bonzini return gen; 452c50d8ae3SPaolo Bonzini } 453c50d8ae3SPaolo Bonzini 4548f79b064SBen Gardon static u64 make_mmio_spte(struct kvm_vcpu *vcpu, u64 gfn, unsigned int access) 455c50d8ae3SPaolo Bonzini { 4568f79b064SBen Gardon 457c50d8ae3SPaolo Bonzini u64 gen = kvm_vcpu_memslots(vcpu)->generation & MMIO_SPTE_GEN_MASK; 458c50d8ae3SPaolo Bonzini u64 mask = generation_mmio_spte_mask(gen); 459c50d8ae3SPaolo Bonzini u64 gpa = gfn << PAGE_SHIFT; 460c50d8ae3SPaolo Bonzini 461c50d8ae3SPaolo Bonzini access &= shadow_mmio_access_mask; 462c50d8ae3SPaolo Bonzini mask |= shadow_mmio_value | access; 463c50d8ae3SPaolo Bonzini mask |= gpa | shadow_nonpresent_or_rsvd_mask; 464c50d8ae3SPaolo Bonzini mask |= (gpa & shadow_nonpresent_or_rsvd_mask) 465c50d8ae3SPaolo Bonzini << shadow_nonpresent_or_rsvd_mask_len; 466c50d8ae3SPaolo Bonzini 4678f79b064SBen Gardon return mask; 4688f79b064SBen Gardon } 4698f79b064SBen Gardon 4708f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 4718f79b064SBen Gardon unsigned int access) 4728f79b064SBen Gardon { 4738f79b064SBen Gardon u64 mask = make_mmio_spte(vcpu, gfn, access); 4748f79b064SBen Gardon unsigned int gen = get_mmio_spte_generation(mask); 4758f79b064SBen Gardon 4768f79b064SBen Gardon access = mask & ACC_ALL; 4778f79b064SBen Gardon 478c50d8ae3SPaolo Bonzini trace_mark_mmio_spte(sptep, gfn, access, gen); 479c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, mask); 480c50d8ae3SPaolo Bonzini } 481c50d8ae3SPaolo Bonzini 482c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 483c50d8ae3SPaolo Bonzini { 484c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 485c50d8ae3SPaolo Bonzini 486c50d8ae3SPaolo Bonzini gpa |= (spte >> shadow_nonpresent_or_rsvd_mask_len) 487c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 488c50d8ae3SPaolo Bonzini 489c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 490c50d8ae3SPaolo Bonzini } 491c50d8ae3SPaolo Bonzini 492c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 493c50d8ae3SPaolo Bonzini { 494c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 495c50d8ae3SPaolo Bonzini } 496c50d8ae3SPaolo Bonzini 497c50d8ae3SPaolo Bonzini static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 4980a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access) 499c50d8ae3SPaolo Bonzini { 500c50d8ae3SPaolo Bonzini if (unlikely(is_noslot_pfn(pfn))) { 501c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 502c50d8ae3SPaolo Bonzini return true; 503c50d8ae3SPaolo Bonzini } 504c50d8ae3SPaolo Bonzini 505c50d8ae3SPaolo Bonzini return false; 506c50d8ae3SPaolo Bonzini } 507c50d8ae3SPaolo Bonzini 508c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 509c50d8ae3SPaolo Bonzini { 510c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 511c50d8ae3SPaolo Bonzini 512c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 513c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 514c50d8ae3SPaolo Bonzini return false; 515c50d8ae3SPaolo Bonzini 516c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 517c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 518c50d8ae3SPaolo Bonzini 519c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 520c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 521c50d8ae3SPaolo Bonzini } 522c50d8ae3SPaolo Bonzini 523cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 524cd313569SMohammed Gamal struct x86_exception *exception) 525cd313569SMohammed Gamal { 526ec7771abSMohammed Gamal /* Check if guest physical address doesn't exceed guest maximum */ 527dc46515cSSean Christopherson if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) { 528ec7771abSMohammed Gamal exception->error_code |= PFERR_RSVD_MASK; 529ec7771abSMohammed Gamal return UNMAPPED_GVA; 530ec7771abSMohammed Gamal } 531ec7771abSMohammed Gamal 532cd313569SMohammed Gamal return gpa; 533cd313569SMohammed Gamal } 534cd313569SMohammed Gamal 535c50d8ae3SPaolo Bonzini /* 536c50d8ae3SPaolo Bonzini * Sets the shadow PTE masks used by the MMU. 537c50d8ae3SPaolo Bonzini * 538c50d8ae3SPaolo Bonzini * Assumptions: 539c50d8ae3SPaolo Bonzini * - Setting either @accessed_mask or @dirty_mask requires setting both 540c50d8ae3SPaolo Bonzini * - At least one of @accessed_mask or @acc_track_mask must be set 541c50d8ae3SPaolo Bonzini */ 542c50d8ae3SPaolo Bonzini void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 543c50d8ae3SPaolo Bonzini u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 544c50d8ae3SPaolo Bonzini u64 acc_track_mask, u64 me_mask) 545c50d8ae3SPaolo Bonzini { 546c50d8ae3SPaolo Bonzini BUG_ON(!dirty_mask != !accessed_mask); 547c50d8ae3SPaolo Bonzini BUG_ON(!accessed_mask && !acc_track_mask); 548c50d8ae3SPaolo Bonzini BUG_ON(acc_track_mask & SPTE_SPECIAL_MASK); 549c50d8ae3SPaolo Bonzini 550c50d8ae3SPaolo Bonzini shadow_user_mask = user_mask; 551c50d8ae3SPaolo Bonzini shadow_accessed_mask = accessed_mask; 552c50d8ae3SPaolo Bonzini shadow_dirty_mask = dirty_mask; 553c50d8ae3SPaolo Bonzini shadow_nx_mask = nx_mask; 554c50d8ae3SPaolo Bonzini shadow_x_mask = x_mask; 555c50d8ae3SPaolo Bonzini shadow_present_mask = p_mask; 556c50d8ae3SPaolo Bonzini shadow_acc_track_mask = acc_track_mask; 557c50d8ae3SPaolo Bonzini shadow_me_mask = me_mask; 558c50d8ae3SPaolo Bonzini } 559c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); 560c50d8ae3SPaolo Bonzini 561c50d8ae3SPaolo Bonzini static u8 kvm_get_shadow_phys_bits(void) 562c50d8ae3SPaolo Bonzini { 563c50d8ae3SPaolo Bonzini /* 5647adacf5eSPaolo Bonzini * boot_cpu_data.x86_phys_bits is reduced when MKTME or SME are detected 5657adacf5eSPaolo Bonzini * in CPU detection code, but the processor treats those reduced bits as 5667adacf5eSPaolo Bonzini * 'keyID' thus they are not reserved bits. Therefore KVM needs to look at 5677adacf5eSPaolo Bonzini * the physical address bits reported by CPUID. 568c50d8ae3SPaolo Bonzini */ 5697adacf5eSPaolo Bonzini if (likely(boot_cpu_data.extended_cpuid_level >= 0x80000008)) 570c50d8ae3SPaolo Bonzini return cpuid_eax(0x80000008) & 0xff; 5717adacf5eSPaolo Bonzini 5727adacf5eSPaolo Bonzini /* 5737adacf5eSPaolo Bonzini * Quite weird to have VMX or SVM but not MAXPHYADDR; probably a VM with 5747adacf5eSPaolo Bonzini * custom CPUID. Proceed with whatever the kernel found since these features 5757adacf5eSPaolo Bonzini * aren't virtualizable (SME/SEV also require CPUIDs higher than 0x80000008). 5767adacf5eSPaolo Bonzini */ 5777adacf5eSPaolo Bonzini return boot_cpu_data.x86_phys_bits; 578c50d8ae3SPaolo Bonzini } 579c50d8ae3SPaolo Bonzini 580c50d8ae3SPaolo Bonzini static void kvm_mmu_reset_all_pte_masks(void) 581c50d8ae3SPaolo Bonzini { 582c50d8ae3SPaolo Bonzini u8 low_phys_bits; 583c50d8ae3SPaolo Bonzini 584c50d8ae3SPaolo Bonzini shadow_user_mask = 0; 585c50d8ae3SPaolo Bonzini shadow_accessed_mask = 0; 586c50d8ae3SPaolo Bonzini shadow_dirty_mask = 0; 587c50d8ae3SPaolo Bonzini shadow_nx_mask = 0; 588c50d8ae3SPaolo Bonzini shadow_x_mask = 0; 589c50d8ae3SPaolo Bonzini shadow_present_mask = 0; 590c50d8ae3SPaolo Bonzini shadow_acc_track_mask = 0; 591c50d8ae3SPaolo Bonzini 592c50d8ae3SPaolo Bonzini shadow_phys_bits = kvm_get_shadow_phys_bits(); 593c50d8ae3SPaolo Bonzini 594c50d8ae3SPaolo Bonzini /* 595c50d8ae3SPaolo Bonzini * If the CPU has 46 or less physical address bits, then set an 596c50d8ae3SPaolo Bonzini * appropriate mask to guard against L1TF attacks. Otherwise, it is 597c50d8ae3SPaolo Bonzini * assumed that the CPU is not vulnerable to L1TF. 598c50d8ae3SPaolo Bonzini * 599c50d8ae3SPaolo Bonzini * Some Intel CPUs address the L1 cache using more PA bits than are 600c50d8ae3SPaolo Bonzini * reported by CPUID. Use the PA width of the L1 cache when possible 601c50d8ae3SPaolo Bonzini * to achieve more effective mitigation, e.g. if system RAM overlaps 602c50d8ae3SPaolo Bonzini * the most significant bits of legal physical address space. 603c50d8ae3SPaolo Bonzini */ 604c50d8ae3SPaolo Bonzini shadow_nonpresent_or_rsvd_mask = 0; 605d43e2675SPaolo Bonzini low_phys_bits = boot_cpu_data.x86_phys_bits; 606d43e2675SPaolo Bonzini if (boot_cpu_has_bug(X86_BUG_L1TF) && 607d43e2675SPaolo Bonzini !WARN_ON_ONCE(boot_cpu_data.x86_cache_bits >= 608d43e2675SPaolo Bonzini 52 - shadow_nonpresent_or_rsvd_mask_len)) { 609d43e2675SPaolo Bonzini low_phys_bits = boot_cpu_data.x86_cache_bits 610d43e2675SPaolo Bonzini - shadow_nonpresent_or_rsvd_mask_len; 611c50d8ae3SPaolo Bonzini shadow_nonpresent_or_rsvd_mask = 612d43e2675SPaolo Bonzini rsvd_bits(low_phys_bits, boot_cpu_data.x86_cache_bits - 1); 613d43e2675SPaolo Bonzini } 614c50d8ae3SPaolo Bonzini 615c50d8ae3SPaolo Bonzini shadow_nonpresent_or_rsvd_lower_gfn_mask = 616c50d8ae3SPaolo Bonzini GENMASK_ULL(low_phys_bits - 1, PAGE_SHIFT); 617c50d8ae3SPaolo Bonzini } 618c50d8ae3SPaolo Bonzini 619c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 620c50d8ae3SPaolo Bonzini { 621c50d8ae3SPaolo Bonzini return 1; 622c50d8ae3SPaolo Bonzini } 623c50d8ae3SPaolo Bonzini 624c50d8ae3SPaolo Bonzini static int is_nx(struct kvm_vcpu *vcpu) 625c50d8ae3SPaolo Bonzini { 626c50d8ae3SPaolo Bonzini return vcpu->arch.efer & EFER_NX; 627c50d8ae3SPaolo Bonzini } 628c50d8ae3SPaolo Bonzini 629c50d8ae3SPaolo Bonzini static int is_shadow_present_pte(u64 pte) 630c50d8ae3SPaolo Bonzini { 631c50d8ae3SPaolo Bonzini return (pte != 0) && !is_mmio_spte(pte); 632c50d8ae3SPaolo Bonzini } 633c50d8ae3SPaolo Bonzini 634c50d8ae3SPaolo Bonzini static int is_large_pte(u64 pte) 635c50d8ae3SPaolo Bonzini { 636c50d8ae3SPaolo Bonzini return pte & PT_PAGE_SIZE_MASK; 637c50d8ae3SPaolo Bonzini } 638c50d8ae3SPaolo Bonzini 639c50d8ae3SPaolo Bonzini static int is_last_spte(u64 pte, int level) 640c50d8ae3SPaolo Bonzini { 6413bae0459SSean Christopherson if (level == PG_LEVEL_4K) 642c50d8ae3SPaolo Bonzini return 1; 643c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 644c50d8ae3SPaolo Bonzini return 1; 645c50d8ae3SPaolo Bonzini return 0; 646c50d8ae3SPaolo Bonzini } 647c50d8ae3SPaolo Bonzini 648c50d8ae3SPaolo Bonzini static bool is_executable_pte(u64 spte) 649c50d8ae3SPaolo Bonzini { 650c50d8ae3SPaolo Bonzini return (spte & (shadow_x_mask | shadow_nx_mask)) == shadow_x_mask; 651c50d8ae3SPaolo Bonzini } 652c50d8ae3SPaolo Bonzini 653c50d8ae3SPaolo Bonzini static kvm_pfn_t spte_to_pfn(u64 pte) 654c50d8ae3SPaolo Bonzini { 655c50d8ae3SPaolo Bonzini return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; 656c50d8ae3SPaolo Bonzini } 657c50d8ae3SPaolo Bonzini 658c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 659c50d8ae3SPaolo Bonzini { 660c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 661c50d8ae3SPaolo Bonzini 662c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 663c50d8ae3SPaolo Bonzini } 664c50d8ae3SPaolo Bonzini 665c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 666c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 667c50d8ae3SPaolo Bonzini { 668c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 669c50d8ae3SPaolo Bonzini } 670c50d8ae3SPaolo Bonzini 671c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 672c50d8ae3SPaolo Bonzini { 673c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 674c50d8ae3SPaolo Bonzini } 675c50d8ae3SPaolo Bonzini 676c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 677c50d8ae3SPaolo Bonzini { 678c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 679c50d8ae3SPaolo Bonzini } 680c50d8ae3SPaolo Bonzini 681c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 682c50d8ae3SPaolo Bonzini { 683c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 684c50d8ae3SPaolo Bonzini } 685c50d8ae3SPaolo Bonzini #else 686c50d8ae3SPaolo Bonzini union split_spte { 687c50d8ae3SPaolo Bonzini struct { 688c50d8ae3SPaolo Bonzini u32 spte_low; 689c50d8ae3SPaolo Bonzini u32 spte_high; 690c50d8ae3SPaolo Bonzini }; 691c50d8ae3SPaolo Bonzini u64 spte; 692c50d8ae3SPaolo Bonzini }; 693c50d8ae3SPaolo Bonzini 694c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 695c50d8ae3SPaolo Bonzini { 69657354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 697c50d8ae3SPaolo Bonzini 698c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 699c50d8ae3SPaolo Bonzini return; 700c50d8ae3SPaolo Bonzini 701c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 702c50d8ae3SPaolo Bonzini smp_wmb(); 703c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 704c50d8ae3SPaolo Bonzini } 705c50d8ae3SPaolo Bonzini 706c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 707c50d8ae3SPaolo Bonzini { 708c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 709c50d8ae3SPaolo Bonzini 710c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 711c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 712c50d8ae3SPaolo Bonzini 713c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 714c50d8ae3SPaolo Bonzini 715c50d8ae3SPaolo Bonzini /* 716c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 717c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 718c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 719c50d8ae3SPaolo Bonzini */ 720c50d8ae3SPaolo Bonzini smp_wmb(); 721c50d8ae3SPaolo Bonzini 722c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 723c50d8ae3SPaolo Bonzini } 724c50d8ae3SPaolo Bonzini 725c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 726c50d8ae3SPaolo Bonzini { 727c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 728c50d8ae3SPaolo Bonzini 729c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 730c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 731c50d8ae3SPaolo Bonzini 732c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 733c50d8ae3SPaolo Bonzini 734c50d8ae3SPaolo Bonzini /* 735c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 736c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 737c50d8ae3SPaolo Bonzini */ 738c50d8ae3SPaolo Bonzini smp_wmb(); 739c50d8ae3SPaolo Bonzini 740c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 741c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 742c50d8ae3SPaolo Bonzini } 743c50d8ae3SPaolo Bonzini 744c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 745c50d8ae3SPaolo Bonzini { 746c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 747c50d8ae3SPaolo Bonzini 748c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 749c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 750c50d8ae3SPaolo Bonzini 751c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 752c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 753c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 754c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 755c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 756c50d8ae3SPaolo Bonzini 757c50d8ae3SPaolo Bonzini return orig.spte; 758c50d8ae3SPaolo Bonzini } 759c50d8ae3SPaolo Bonzini 760c50d8ae3SPaolo Bonzini /* 761c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 762c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 763c50d8ae3SPaolo Bonzini * 764c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 765c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 766c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 767c50d8ae3SPaolo Bonzini * 768c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 769c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 770c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 771c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 772c50d8ae3SPaolo Bonzini * 773c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 774c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 775c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 776c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 777c50d8ae3SPaolo Bonzini */ 778c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 779c50d8ae3SPaolo Bonzini { 78057354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 781c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 782c50d8ae3SPaolo Bonzini int count; 783c50d8ae3SPaolo Bonzini 784c50d8ae3SPaolo Bonzini retry: 785c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 786c50d8ae3SPaolo Bonzini smp_rmb(); 787c50d8ae3SPaolo Bonzini 788c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 789c50d8ae3SPaolo Bonzini smp_rmb(); 790c50d8ae3SPaolo Bonzini 791c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 792c50d8ae3SPaolo Bonzini smp_rmb(); 793c50d8ae3SPaolo Bonzini 794c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 795c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 796c50d8ae3SPaolo Bonzini goto retry; 797c50d8ae3SPaolo Bonzini 798c50d8ae3SPaolo Bonzini return spte.spte; 799c50d8ae3SPaolo Bonzini } 800c50d8ae3SPaolo Bonzini #endif 801c50d8ae3SPaolo Bonzini 802c50d8ae3SPaolo Bonzini static bool spte_can_locklessly_be_made_writable(u64 spte) 803c50d8ae3SPaolo Bonzini { 804c50d8ae3SPaolo Bonzini return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) == 805c50d8ae3SPaolo Bonzini (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE); 806c50d8ae3SPaolo Bonzini } 807c50d8ae3SPaolo Bonzini 808c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 809c50d8ae3SPaolo Bonzini { 810c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 811c50d8ae3SPaolo Bonzini return false; 812c50d8ae3SPaolo Bonzini 813c50d8ae3SPaolo Bonzini /* 814c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 815c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 816c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 817c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 818c50d8ae3SPaolo Bonzini */ 819c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 820c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 821c50d8ae3SPaolo Bonzini return true; 822c50d8ae3SPaolo Bonzini 823c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 824c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 825c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 826c50d8ae3SPaolo Bonzini return true; 827c50d8ae3SPaolo Bonzini } 828c50d8ae3SPaolo Bonzini 829c50d8ae3SPaolo Bonzini return false; 830c50d8ae3SPaolo Bonzini } 831c50d8ae3SPaolo Bonzini 832c50d8ae3SPaolo Bonzini static bool is_accessed_spte(u64 spte) 833c50d8ae3SPaolo Bonzini { 834c50d8ae3SPaolo Bonzini u64 accessed_mask = spte_shadow_accessed_mask(spte); 835c50d8ae3SPaolo Bonzini 836c50d8ae3SPaolo Bonzini return accessed_mask ? spte & accessed_mask 837c50d8ae3SPaolo Bonzini : !is_access_track_spte(spte); 838c50d8ae3SPaolo Bonzini } 839c50d8ae3SPaolo Bonzini 840c50d8ae3SPaolo Bonzini static bool is_dirty_spte(u64 spte) 841c50d8ae3SPaolo Bonzini { 842c50d8ae3SPaolo Bonzini u64 dirty_mask = spte_shadow_dirty_mask(spte); 843c50d8ae3SPaolo Bonzini 844c50d8ae3SPaolo Bonzini return dirty_mask ? spte & dirty_mask : spte & PT_WRITABLE_MASK; 845c50d8ae3SPaolo Bonzini } 846c50d8ae3SPaolo Bonzini 847c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 848c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 849c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 850c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 851c50d8ae3SPaolo Bonzini * the spte. 852c50d8ae3SPaolo Bonzini */ 853c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 854c50d8ae3SPaolo Bonzini { 855c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 856c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 857c50d8ae3SPaolo Bonzini } 858c50d8ae3SPaolo Bonzini 859c50d8ae3SPaolo Bonzini /* 860c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 861c50d8ae3SPaolo Bonzini * accessed/dirty status. 862c50d8ae3SPaolo Bonzini */ 863c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 864c50d8ae3SPaolo Bonzini { 865c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 866c50d8ae3SPaolo Bonzini 867c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 868c50d8ae3SPaolo Bonzini 869c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 870c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 871c50d8ae3SPaolo Bonzini return old_spte; 872c50d8ae3SPaolo Bonzini } 873c50d8ae3SPaolo Bonzini 874c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 875c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 876c50d8ae3SPaolo Bonzini else 877c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 878c50d8ae3SPaolo Bonzini 879c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 880c50d8ae3SPaolo Bonzini 881c50d8ae3SPaolo Bonzini return old_spte; 882c50d8ae3SPaolo Bonzini } 883c50d8ae3SPaolo Bonzini 884c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 885c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 886c50d8ae3SPaolo Bonzini * 887c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 888c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 889c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 890c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 891c50d8ae3SPaolo Bonzini * case. 892c50d8ae3SPaolo Bonzini * 893c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 894c50d8ae3SPaolo Bonzini */ 895c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 896c50d8ae3SPaolo Bonzini { 897c50d8ae3SPaolo Bonzini bool flush = false; 898c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 899c50d8ae3SPaolo Bonzini 900c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 901c50d8ae3SPaolo Bonzini return false; 902c50d8ae3SPaolo Bonzini 903c50d8ae3SPaolo Bonzini /* 904c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 905c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 906c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 907c50d8ae3SPaolo Bonzini */ 908c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 909c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 910c50d8ae3SPaolo Bonzini flush = true; 911c50d8ae3SPaolo Bonzini 912c50d8ae3SPaolo Bonzini /* 913c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 914c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 915c50d8ae3SPaolo Bonzini */ 916c50d8ae3SPaolo Bonzini 917c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 918c50d8ae3SPaolo Bonzini flush = true; 919c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 920c50d8ae3SPaolo Bonzini } 921c50d8ae3SPaolo Bonzini 922c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 923c50d8ae3SPaolo Bonzini flush = true; 924c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 925c50d8ae3SPaolo Bonzini } 926c50d8ae3SPaolo Bonzini 927c50d8ae3SPaolo Bonzini return flush; 928c50d8ae3SPaolo Bonzini } 929c50d8ae3SPaolo Bonzini 930c50d8ae3SPaolo Bonzini /* 931c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 932c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 933c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 934c50d8ae3SPaolo Bonzini * Returns non-zero if the PTE was previously valid. 935c50d8ae3SPaolo Bonzini */ 936c50d8ae3SPaolo Bonzini static int mmu_spte_clear_track_bits(u64 *sptep) 937c50d8ae3SPaolo Bonzini { 938c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 939c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 940c50d8ae3SPaolo Bonzini 941c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 942c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 943c50d8ae3SPaolo Bonzini else 944c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 945c50d8ae3SPaolo Bonzini 946c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 947c50d8ae3SPaolo Bonzini return 0; 948c50d8ae3SPaolo Bonzini 949c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 950c50d8ae3SPaolo Bonzini 951c50d8ae3SPaolo Bonzini /* 952c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 953c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 954c50d8ae3SPaolo Bonzini * unmap it from mmu first. 955c50d8ae3SPaolo Bonzini */ 956c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 957c50d8ae3SPaolo Bonzini 958c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 959c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 960c50d8ae3SPaolo Bonzini 961c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 962c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 963c50d8ae3SPaolo Bonzini 964c50d8ae3SPaolo Bonzini return 1; 965c50d8ae3SPaolo Bonzini } 966c50d8ae3SPaolo Bonzini 967c50d8ae3SPaolo Bonzini /* 968c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 969c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 970c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 971c50d8ae3SPaolo Bonzini */ 972c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 973c50d8ae3SPaolo Bonzini { 974c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 975c50d8ae3SPaolo Bonzini } 976c50d8ae3SPaolo Bonzini 977c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 978c50d8ae3SPaolo Bonzini { 979c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 980c50d8ae3SPaolo Bonzini } 981c50d8ae3SPaolo Bonzini 982c50d8ae3SPaolo Bonzini static u64 mark_spte_for_access_track(u64 spte) 983c50d8ae3SPaolo Bonzini { 984c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) 985c50d8ae3SPaolo Bonzini return spte & ~shadow_accessed_mask; 986c50d8ae3SPaolo Bonzini 987c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 988c50d8ae3SPaolo Bonzini return spte; 989c50d8ae3SPaolo Bonzini 990c50d8ae3SPaolo Bonzini /* 991c50d8ae3SPaolo Bonzini * Making an Access Tracking PTE will result in removal of write access 992c50d8ae3SPaolo Bonzini * from the PTE. So, verify that we will be able to restore the write 993c50d8ae3SPaolo Bonzini * access in the fast page fault path later on. 994c50d8ae3SPaolo Bonzini */ 995c50d8ae3SPaolo Bonzini WARN_ONCE((spte & PT_WRITABLE_MASK) && 996c50d8ae3SPaolo Bonzini !spte_can_locklessly_be_made_writable(spte), 997c50d8ae3SPaolo Bonzini "kvm: Writable SPTE is not locklessly dirty-trackable\n"); 998c50d8ae3SPaolo Bonzini 999c50d8ae3SPaolo Bonzini WARN_ONCE(spte & (shadow_acc_track_saved_bits_mask << 1000c50d8ae3SPaolo Bonzini shadow_acc_track_saved_bits_shift), 1001c50d8ae3SPaolo Bonzini "kvm: Access Tracking saved bit locations are not zero\n"); 1002c50d8ae3SPaolo Bonzini 1003c50d8ae3SPaolo Bonzini spte |= (spte & shadow_acc_track_saved_bits_mask) << 1004c50d8ae3SPaolo Bonzini shadow_acc_track_saved_bits_shift; 1005c50d8ae3SPaolo Bonzini spte &= ~shadow_acc_track_mask; 1006c50d8ae3SPaolo Bonzini 1007c50d8ae3SPaolo Bonzini return spte; 1008c50d8ae3SPaolo Bonzini } 1009c50d8ae3SPaolo Bonzini 1010c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 1011c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 1012c50d8ae3SPaolo Bonzini { 1013c50d8ae3SPaolo Bonzini u64 new_spte = spte; 1014c50d8ae3SPaolo Bonzini u64 saved_bits = (spte >> shadow_acc_track_saved_bits_shift) 1015c50d8ae3SPaolo Bonzini & shadow_acc_track_saved_bits_mask; 1016c50d8ae3SPaolo Bonzini 1017c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 1018c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 1019c50d8ae3SPaolo Bonzini 1020c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 1021c50d8ae3SPaolo Bonzini new_spte &= ~(shadow_acc_track_saved_bits_mask << 1022c50d8ae3SPaolo Bonzini shadow_acc_track_saved_bits_shift); 1023c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 1024c50d8ae3SPaolo Bonzini 1025c50d8ae3SPaolo Bonzini return new_spte; 1026c50d8ae3SPaolo Bonzini } 1027c50d8ae3SPaolo Bonzini 1028c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 1029c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 1030c50d8ae3SPaolo Bonzini { 1031c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 1032c50d8ae3SPaolo Bonzini 1033c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 1034c50d8ae3SPaolo Bonzini return false; 1035c50d8ae3SPaolo Bonzini 1036c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 1037c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 1038c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1039c50d8ae3SPaolo Bonzini } else { 1040c50d8ae3SPaolo Bonzini /* 1041c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 1042c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 1043c50d8ae3SPaolo Bonzini */ 1044c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 1045c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 1046c50d8ae3SPaolo Bonzini 1047c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 1048c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 1049c50d8ae3SPaolo Bonzini } 1050c50d8ae3SPaolo Bonzini 1051c50d8ae3SPaolo Bonzini return true; 1052c50d8ae3SPaolo Bonzini } 1053c50d8ae3SPaolo Bonzini 1054c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 1055c50d8ae3SPaolo Bonzini { 1056c50d8ae3SPaolo Bonzini /* 1057c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 1058c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 1059c50d8ae3SPaolo Bonzini */ 1060c50d8ae3SPaolo Bonzini local_irq_disable(); 1061c50d8ae3SPaolo Bonzini 1062c50d8ae3SPaolo Bonzini /* 1063c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 1064c50d8ae3SPaolo Bonzini * to vcpu->mode. 1065c50d8ae3SPaolo Bonzini */ 1066c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 1067c50d8ae3SPaolo Bonzini } 1068c50d8ae3SPaolo Bonzini 1069c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 1070c50d8ae3SPaolo Bonzini { 1071c50d8ae3SPaolo Bonzini /* 1072c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 1073c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 1074c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 1075c50d8ae3SPaolo Bonzini */ 1076c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 1077c50d8ae3SPaolo Bonzini local_irq_enable(); 1078c50d8ae3SPaolo Bonzini } 1079c50d8ae3SPaolo Bonzini 1080378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 1081c50d8ae3SPaolo Bonzini { 1082c50d8ae3SPaolo Bonzini int r; 1083c50d8ae3SPaolo Bonzini 1084531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 108594ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 1086531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 1087c50d8ae3SPaolo Bonzini if (r) 1088c50d8ae3SPaolo Bonzini return r; 108994ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 1090171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 1091171a90d7SSean Christopherson if (r) 1092171a90d7SSean Christopherson return r; 1093378f5cd6SSean Christopherson if (maybe_indirect) { 109494ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 1095171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 1096c50d8ae3SPaolo Bonzini if (r) 1097c50d8ae3SPaolo Bonzini return r; 1098378f5cd6SSean Christopherson } 109994ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 1100531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 1101c50d8ae3SPaolo Bonzini } 1102c50d8ae3SPaolo Bonzini 1103c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 1104c50d8ae3SPaolo Bonzini { 110594ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 110694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 110794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 110894ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 1109c50d8ae3SPaolo Bonzini } 1110c50d8ae3SPaolo Bonzini 1111c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 1112c50d8ae3SPaolo Bonzini { 111394ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 1114c50d8ae3SPaolo Bonzini } 1115c50d8ae3SPaolo Bonzini 1116c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 1117c50d8ae3SPaolo Bonzini { 1118c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 1119c50d8ae3SPaolo Bonzini } 1120c50d8ae3SPaolo Bonzini 1121c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 1122c50d8ae3SPaolo Bonzini { 1123c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1124c50d8ae3SPaolo Bonzini return sp->gfns[index]; 1125c50d8ae3SPaolo Bonzini 1126c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 1127c50d8ae3SPaolo Bonzini } 1128c50d8ae3SPaolo Bonzini 1129c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 1130c50d8ae3SPaolo Bonzini { 1131c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 1132c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 1133c50d8ae3SPaolo Bonzini return; 1134c50d8ae3SPaolo Bonzini } 1135c50d8ae3SPaolo Bonzini 1136c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 1137c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 1138c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 1139c50d8ae3SPaolo Bonzini sp->gfn, 1140c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 1141c50d8ae3SPaolo Bonzini } 1142c50d8ae3SPaolo Bonzini 1143c50d8ae3SPaolo Bonzini /* 1144c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 1145c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 1146c50d8ae3SPaolo Bonzini */ 1147c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 1148c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1149c50d8ae3SPaolo Bonzini int level) 1150c50d8ae3SPaolo Bonzini { 1151c50d8ae3SPaolo Bonzini unsigned long idx; 1152c50d8ae3SPaolo Bonzini 1153c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 1154c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 1155c50d8ae3SPaolo Bonzini } 1156c50d8ae3SPaolo Bonzini 1157c50d8ae3SPaolo Bonzini static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot, 1158c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 1159c50d8ae3SPaolo Bonzini { 1160c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 1161c50d8ae3SPaolo Bonzini int i; 1162c50d8ae3SPaolo Bonzini 11633bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1164c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 1165c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 1166c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 1167c50d8ae3SPaolo Bonzini } 1168c50d8ae3SPaolo Bonzini } 1169c50d8ae3SPaolo Bonzini 1170c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 1171c50d8ae3SPaolo Bonzini { 1172c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 1173c50d8ae3SPaolo Bonzini } 1174c50d8ae3SPaolo Bonzini 1175c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 1176c50d8ae3SPaolo Bonzini { 1177c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 1178c50d8ae3SPaolo Bonzini } 1179c50d8ae3SPaolo Bonzini 1180c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 1181c50d8ae3SPaolo Bonzini { 1182c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1183c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1184c50d8ae3SPaolo Bonzini gfn_t gfn; 1185c50d8ae3SPaolo Bonzini 1186c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 1187c50d8ae3SPaolo Bonzini gfn = sp->gfn; 1188c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1189c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 1190c50d8ae3SPaolo Bonzini 1191c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 11923bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 1193c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 1194c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 1195c50d8ae3SPaolo Bonzini 1196c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 1197c50d8ae3SPaolo Bonzini } 1198c50d8ae3SPaolo Bonzini 1199c50d8ae3SPaolo Bonzini static void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1200c50d8ae3SPaolo Bonzini { 1201c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 1202c50d8ae3SPaolo Bonzini return; 1203c50d8ae3SPaolo Bonzini 1204c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 1205c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 1206c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 1207c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 1208c50d8ae3SPaolo Bonzini } 1209c50d8ae3SPaolo Bonzini 1210c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 1211c50d8ae3SPaolo Bonzini { 1212c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1213c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1214c50d8ae3SPaolo Bonzini gfn_t gfn; 1215c50d8ae3SPaolo Bonzini 1216c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 1217c50d8ae3SPaolo Bonzini gfn = sp->gfn; 1218c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1219c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 12203bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 1221c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 1222c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 1223c50d8ae3SPaolo Bonzini 1224c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 1225c50d8ae3SPaolo Bonzini } 1226c50d8ae3SPaolo Bonzini 1227c50d8ae3SPaolo Bonzini static void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1228c50d8ae3SPaolo Bonzini { 1229c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 1230c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 1231c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 1232c50d8ae3SPaolo Bonzini } 1233c50d8ae3SPaolo Bonzini 1234c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 1235c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 1236c50d8ae3SPaolo Bonzini bool no_dirty_log) 1237c50d8ae3SPaolo Bonzini { 1238c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1239c50d8ae3SPaolo Bonzini 1240c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 124191b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 124291b0d268SPaolo Bonzini return NULL; 124391b0d268SPaolo Bonzini if (no_dirty_log && slot->dirty_bitmap) 124491b0d268SPaolo Bonzini return NULL; 1245c50d8ae3SPaolo Bonzini 1246c50d8ae3SPaolo Bonzini return slot; 1247c50d8ae3SPaolo Bonzini } 1248c50d8ae3SPaolo Bonzini 1249c50d8ae3SPaolo Bonzini /* 1250c50d8ae3SPaolo Bonzini * About rmap_head encoding: 1251c50d8ae3SPaolo Bonzini * 1252c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 1253c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 1254c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 1255c50d8ae3SPaolo Bonzini */ 1256c50d8ae3SPaolo Bonzini 1257c50d8ae3SPaolo Bonzini /* 1258c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 1259c50d8ae3SPaolo Bonzini */ 1260c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 1261c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 1262c50d8ae3SPaolo Bonzini { 1263c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 1264c50d8ae3SPaolo Bonzini int i, count = 0; 1265c50d8ae3SPaolo Bonzini 1266c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 1267c50d8ae3SPaolo Bonzini rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte); 1268c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 1269c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 1270c50d8ae3SPaolo Bonzini rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte); 1271c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 1272c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 1273c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 1274c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 1275c50d8ae3SPaolo Bonzini ++count; 1276c50d8ae3SPaolo Bonzini } else { 1277c50d8ae3SPaolo Bonzini rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte); 1278c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1279c50d8ae3SPaolo Bonzini while (desc->sptes[PTE_LIST_EXT-1] && desc->more) { 1280c50d8ae3SPaolo Bonzini desc = desc->more; 1281c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 1282c50d8ae3SPaolo Bonzini } 1283c50d8ae3SPaolo Bonzini if (desc->sptes[PTE_LIST_EXT-1]) { 1284c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 1285c50d8ae3SPaolo Bonzini desc = desc->more; 1286c50d8ae3SPaolo Bonzini } 1287c50d8ae3SPaolo Bonzini for (i = 0; desc->sptes[i]; ++i) 1288c50d8ae3SPaolo Bonzini ++count; 1289c50d8ae3SPaolo Bonzini desc->sptes[i] = spte; 1290c50d8ae3SPaolo Bonzini } 1291c50d8ae3SPaolo Bonzini return count; 1292c50d8ae3SPaolo Bonzini } 1293c50d8ae3SPaolo Bonzini 1294c50d8ae3SPaolo Bonzini static void 1295c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 1296c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 1297c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 1298c50d8ae3SPaolo Bonzini { 1299c50d8ae3SPaolo Bonzini int j; 1300c50d8ae3SPaolo Bonzini 1301c50d8ae3SPaolo Bonzini for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) 1302c50d8ae3SPaolo Bonzini ; 1303c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 1304c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 1305c50d8ae3SPaolo Bonzini if (j != 0) 1306c50d8ae3SPaolo Bonzini return; 1307c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 1308fe3c2b4cSMiaohe Lin rmap_head->val = 0; 1309c50d8ae3SPaolo Bonzini else 1310c50d8ae3SPaolo Bonzini if (prev_desc) 1311c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 1312c50d8ae3SPaolo Bonzini else 1313c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 1314c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 1315c50d8ae3SPaolo Bonzini } 1316c50d8ae3SPaolo Bonzini 1317c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 1318c50d8ae3SPaolo Bonzini { 1319c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 1320c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 1321c50d8ae3SPaolo Bonzini int i; 1322c50d8ae3SPaolo Bonzini 1323c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 1324c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 1325c50d8ae3SPaolo Bonzini BUG(); 1326c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 1327c50d8ae3SPaolo Bonzini rmap_printk("%s: %p 1->0\n", __func__, spte); 1328c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 1329c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 1330c50d8ae3SPaolo Bonzini BUG(); 1331c50d8ae3SPaolo Bonzini } 1332c50d8ae3SPaolo Bonzini rmap_head->val = 0; 1333c50d8ae3SPaolo Bonzini } else { 1334c50d8ae3SPaolo Bonzini rmap_printk("%s: %p many->many\n", __func__, spte); 1335c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1336c50d8ae3SPaolo Bonzini prev_desc = NULL; 1337c50d8ae3SPaolo Bonzini while (desc) { 1338c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { 1339c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 1340c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 1341c50d8ae3SPaolo Bonzini desc, i, prev_desc); 1342c50d8ae3SPaolo Bonzini return; 1343c50d8ae3SPaolo Bonzini } 1344c50d8ae3SPaolo Bonzini } 1345c50d8ae3SPaolo Bonzini prev_desc = desc; 1346c50d8ae3SPaolo Bonzini desc = desc->more; 1347c50d8ae3SPaolo Bonzini } 1348c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 1349c50d8ae3SPaolo Bonzini BUG(); 1350c50d8ae3SPaolo Bonzini } 1351c50d8ae3SPaolo Bonzini } 1352c50d8ae3SPaolo Bonzini 1353c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 1354c50d8ae3SPaolo Bonzini { 1355c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1356c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 1357c50d8ae3SPaolo Bonzini } 1358c50d8ae3SPaolo Bonzini 1359c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 1360c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot) 1361c50d8ae3SPaolo Bonzini { 1362c50d8ae3SPaolo Bonzini unsigned long idx; 1363c50d8ae3SPaolo Bonzini 1364c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 13653bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1366c50d8ae3SPaolo Bonzini } 1367c50d8ae3SPaolo Bonzini 1368c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 1369c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1370c50d8ae3SPaolo Bonzini { 1371c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1372c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1373c50d8ae3SPaolo Bonzini 1374c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1375c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 1376c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 1377c50d8ae3SPaolo Bonzini } 1378c50d8ae3SPaolo Bonzini 1379c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1380c50d8ae3SPaolo Bonzini { 1381356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 1382c50d8ae3SPaolo Bonzini 1383356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 138494ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 1385c50d8ae3SPaolo Bonzini } 1386c50d8ae3SPaolo Bonzini 1387c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1388c50d8ae3SPaolo Bonzini { 1389c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1390c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1391c50d8ae3SPaolo Bonzini 139257354682SSean Christopherson sp = sptep_to_sp(spte); 1393c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 1394c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1395c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 1396c50d8ae3SPaolo Bonzini } 1397c50d8ae3SPaolo Bonzini 1398c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1399c50d8ae3SPaolo Bonzini { 1400c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1401c50d8ae3SPaolo Bonzini gfn_t gfn; 1402c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1403c50d8ae3SPaolo Bonzini 140457354682SSean Christopherson sp = sptep_to_sp(spte); 1405c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1406c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 1407c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1408c50d8ae3SPaolo Bonzini } 1409c50d8ae3SPaolo Bonzini 1410c50d8ae3SPaolo Bonzini /* 1411c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1412c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1413c50d8ae3SPaolo Bonzini */ 1414c50d8ae3SPaolo Bonzini struct rmap_iterator { 1415c50d8ae3SPaolo Bonzini /* private fields */ 1416c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1417c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1418c50d8ae3SPaolo Bonzini }; 1419c50d8ae3SPaolo Bonzini 1420c50d8ae3SPaolo Bonzini /* 1421c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1422c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 14230a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1424c50d8ae3SPaolo Bonzini * 1425c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1426c50d8ae3SPaolo Bonzini */ 1427c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1428c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1429c50d8ae3SPaolo Bonzini { 1430c50d8ae3SPaolo Bonzini u64 *sptep; 1431c50d8ae3SPaolo Bonzini 1432c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1433c50d8ae3SPaolo Bonzini return NULL; 1434c50d8ae3SPaolo Bonzini 1435c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1436c50d8ae3SPaolo Bonzini iter->desc = NULL; 1437c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1438c50d8ae3SPaolo Bonzini goto out; 1439c50d8ae3SPaolo Bonzini } 1440c50d8ae3SPaolo Bonzini 1441c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1442c50d8ae3SPaolo Bonzini iter->pos = 0; 1443c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1444c50d8ae3SPaolo Bonzini out: 1445c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1446c50d8ae3SPaolo Bonzini return sptep; 1447c50d8ae3SPaolo Bonzini } 1448c50d8ae3SPaolo Bonzini 1449c50d8ae3SPaolo Bonzini /* 1450c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1451c50d8ae3SPaolo Bonzini * 1452c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1453c50d8ae3SPaolo Bonzini */ 1454c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1455c50d8ae3SPaolo Bonzini { 1456c50d8ae3SPaolo Bonzini u64 *sptep; 1457c50d8ae3SPaolo Bonzini 1458c50d8ae3SPaolo Bonzini if (iter->desc) { 1459c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1460c50d8ae3SPaolo Bonzini ++iter->pos; 1461c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1462c50d8ae3SPaolo Bonzini if (sptep) 1463c50d8ae3SPaolo Bonzini goto out; 1464c50d8ae3SPaolo Bonzini } 1465c50d8ae3SPaolo Bonzini 1466c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1467c50d8ae3SPaolo Bonzini 1468c50d8ae3SPaolo Bonzini if (iter->desc) { 1469c50d8ae3SPaolo Bonzini iter->pos = 0; 1470c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1471c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1472c50d8ae3SPaolo Bonzini goto out; 1473c50d8ae3SPaolo Bonzini } 1474c50d8ae3SPaolo Bonzini } 1475c50d8ae3SPaolo Bonzini 1476c50d8ae3SPaolo Bonzini return NULL; 1477c50d8ae3SPaolo Bonzini out: 1478c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1479c50d8ae3SPaolo Bonzini return sptep; 1480c50d8ae3SPaolo Bonzini } 1481c50d8ae3SPaolo Bonzini 1482c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1483c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1484c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1485c50d8ae3SPaolo Bonzini 1486c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1487c50d8ae3SPaolo Bonzini { 1488c50d8ae3SPaolo Bonzini if (mmu_spte_clear_track_bits(sptep)) 1489c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1490c50d8ae3SPaolo Bonzini } 1491c50d8ae3SPaolo Bonzini 1492c50d8ae3SPaolo Bonzini 1493c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1494c50d8ae3SPaolo Bonzini { 1495c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 149657354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1497c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1498c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1499c50d8ae3SPaolo Bonzini return true; 1500c50d8ae3SPaolo Bonzini } 1501c50d8ae3SPaolo Bonzini 1502c50d8ae3SPaolo Bonzini return false; 1503c50d8ae3SPaolo Bonzini } 1504c50d8ae3SPaolo Bonzini 1505c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1506c50d8ae3SPaolo Bonzini { 1507c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 150857354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1509c50d8ae3SPaolo Bonzini 1510c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1511c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1512c50d8ae3SPaolo Bonzini } 1513c50d8ae3SPaolo Bonzini } 1514c50d8ae3SPaolo Bonzini 1515c50d8ae3SPaolo Bonzini /* 1516c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1517c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1518c50d8ae3SPaolo Bonzini * 1519c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1520c50d8ae3SPaolo Bonzini * protection: 1521c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1522c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1523c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1524c50d8ae3SPaolo Bonzini * shadow page. 1525c50d8ae3SPaolo Bonzini * 1526c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1527c50d8ae3SPaolo Bonzini */ 1528c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1529c50d8ae3SPaolo Bonzini { 1530c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1531c50d8ae3SPaolo Bonzini 1532c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1533c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1534c50d8ae3SPaolo Bonzini return false; 1535c50d8ae3SPaolo Bonzini 1536c50d8ae3SPaolo Bonzini rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep); 1537c50d8ae3SPaolo Bonzini 1538c50d8ae3SPaolo Bonzini if (pt_protect) 1539c50d8ae3SPaolo Bonzini spte &= ~SPTE_MMU_WRITEABLE; 1540c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1541c50d8ae3SPaolo Bonzini 1542c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1543c50d8ae3SPaolo Bonzini } 1544c50d8ae3SPaolo Bonzini 1545c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1546c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1547c50d8ae3SPaolo Bonzini bool pt_protect) 1548c50d8ae3SPaolo Bonzini { 1549c50d8ae3SPaolo Bonzini u64 *sptep; 1550c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1551c50d8ae3SPaolo Bonzini bool flush = false; 1552c50d8ae3SPaolo Bonzini 1553c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1554c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1555c50d8ae3SPaolo Bonzini 1556c50d8ae3SPaolo Bonzini return flush; 1557c50d8ae3SPaolo Bonzini } 1558c50d8ae3SPaolo Bonzini 1559c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1560c50d8ae3SPaolo Bonzini { 1561c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1562c50d8ae3SPaolo Bonzini 1563c50d8ae3SPaolo Bonzini rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep); 1564c50d8ae3SPaolo Bonzini 1565c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1566c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1567c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1568c50d8ae3SPaolo Bonzini } 1569c50d8ae3SPaolo Bonzini 1570c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1571c50d8ae3SPaolo Bonzini { 1572c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1573c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1574c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1575c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1576c50d8ae3SPaolo Bonzini 1577c50d8ae3SPaolo Bonzini return was_writable; 1578c50d8ae3SPaolo Bonzini } 1579c50d8ae3SPaolo Bonzini 1580c50d8ae3SPaolo Bonzini /* 1581c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1582c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1583c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1584c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1585c50d8ae3SPaolo Bonzini */ 1586c50d8ae3SPaolo Bonzini static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1587c50d8ae3SPaolo Bonzini { 1588c50d8ae3SPaolo Bonzini u64 *sptep; 1589c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1590c50d8ae3SPaolo Bonzini bool flush = false; 1591c50d8ae3SPaolo Bonzini 1592c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1593c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1594c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1595c50d8ae3SPaolo Bonzini else 1596c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1597c50d8ae3SPaolo Bonzini 1598c50d8ae3SPaolo Bonzini return flush; 1599c50d8ae3SPaolo Bonzini } 1600c50d8ae3SPaolo Bonzini 1601c50d8ae3SPaolo Bonzini static bool spte_set_dirty(u64 *sptep) 1602c50d8ae3SPaolo Bonzini { 1603c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1604c50d8ae3SPaolo Bonzini 1605c50d8ae3SPaolo Bonzini rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep); 1606c50d8ae3SPaolo Bonzini 1607c50d8ae3SPaolo Bonzini /* 1608afaf0b2fSSean Christopherson * Similar to the !kvm_x86_ops.slot_disable_log_dirty case, 1609c50d8ae3SPaolo Bonzini * do not bother adding back write access to pages marked 1610c50d8ae3SPaolo Bonzini * SPTE_AD_WRPROT_ONLY_MASK. 1611c50d8ae3SPaolo Bonzini */ 1612c50d8ae3SPaolo Bonzini spte |= shadow_dirty_mask; 1613c50d8ae3SPaolo Bonzini 1614c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1615c50d8ae3SPaolo Bonzini } 1616c50d8ae3SPaolo Bonzini 1617c50d8ae3SPaolo Bonzini static bool __rmap_set_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1618c50d8ae3SPaolo Bonzini { 1619c50d8ae3SPaolo Bonzini u64 *sptep; 1620c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1621c50d8ae3SPaolo Bonzini bool flush = false; 1622c50d8ae3SPaolo Bonzini 1623c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1624c50d8ae3SPaolo Bonzini if (spte_ad_enabled(*sptep)) 1625c50d8ae3SPaolo Bonzini flush |= spte_set_dirty(sptep); 1626c50d8ae3SPaolo Bonzini 1627c50d8ae3SPaolo Bonzini return flush; 1628c50d8ae3SPaolo Bonzini } 1629c50d8ae3SPaolo Bonzini 1630c50d8ae3SPaolo Bonzini /** 1631c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1632c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1633c50d8ae3SPaolo Bonzini * @slot: slot to protect 1634c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1635c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1636c50d8ae3SPaolo Bonzini * 1637c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1638c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1639c50d8ae3SPaolo Bonzini */ 1640c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1641c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1642c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1643c50d8ae3SPaolo Bonzini { 1644c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1645c50d8ae3SPaolo Bonzini 1646c50d8ae3SPaolo Bonzini while (mask) { 1647c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 16483bae0459SSean Christopherson PG_LEVEL_4K, slot); 1649c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1650c50d8ae3SPaolo Bonzini 1651c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1652c50d8ae3SPaolo Bonzini mask &= mask - 1; 1653c50d8ae3SPaolo Bonzini } 1654c50d8ae3SPaolo Bonzini } 1655c50d8ae3SPaolo Bonzini 1656c50d8ae3SPaolo Bonzini /** 1657c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1658c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1659c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1660c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1661c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1662c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1663c50d8ae3SPaolo Bonzini * 1664c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1665c50d8ae3SPaolo Bonzini */ 1666c50d8ae3SPaolo Bonzini void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1667c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1668c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1669c50d8ae3SPaolo Bonzini { 1670c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1671c50d8ae3SPaolo Bonzini 1672c50d8ae3SPaolo Bonzini while (mask) { 1673c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 16743bae0459SSean Christopherson PG_LEVEL_4K, slot); 1675c50d8ae3SPaolo Bonzini __rmap_clear_dirty(kvm, rmap_head); 1676c50d8ae3SPaolo Bonzini 1677c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1678c50d8ae3SPaolo Bonzini mask &= mask - 1; 1679c50d8ae3SPaolo Bonzini } 1680c50d8ae3SPaolo Bonzini } 1681c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked); 1682c50d8ae3SPaolo Bonzini 1683c50d8ae3SPaolo Bonzini /** 1684c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1685c50d8ae3SPaolo Bonzini * PT level pages. 1686c50d8ae3SPaolo Bonzini * 1687c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1688c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1689c50d8ae3SPaolo Bonzini * 1690c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1691c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1692c50d8ae3SPaolo Bonzini */ 1693c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1694c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1695c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1696c50d8ae3SPaolo Bonzini { 1697afaf0b2fSSean Christopherson if (kvm_x86_ops.enable_log_dirty_pt_masked) 1698afaf0b2fSSean Christopherson kvm_x86_ops.enable_log_dirty_pt_masked(kvm, slot, gfn_offset, 1699c50d8ae3SPaolo Bonzini mask); 1700c50d8ae3SPaolo Bonzini else 1701c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1702c50d8ae3SPaolo Bonzini } 1703c50d8ae3SPaolo Bonzini 1704c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 1705c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, u64 gfn) 1706c50d8ae3SPaolo Bonzini { 1707c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1708c50d8ae3SPaolo Bonzini int i; 1709c50d8ae3SPaolo Bonzini bool write_protected = false; 1710c50d8ae3SPaolo Bonzini 17113bae0459SSean Christopherson for (i = PG_LEVEL_4K; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1712c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1713c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1714c50d8ae3SPaolo Bonzini } 1715c50d8ae3SPaolo Bonzini 1716c50d8ae3SPaolo Bonzini return write_protected; 1717c50d8ae3SPaolo Bonzini } 1718c50d8ae3SPaolo Bonzini 1719c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1720c50d8ae3SPaolo Bonzini { 1721c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1722c50d8ae3SPaolo Bonzini 1723c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 1724c50d8ae3SPaolo Bonzini return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn); 1725c50d8ae3SPaolo Bonzini } 1726c50d8ae3SPaolo Bonzini 1727c50d8ae3SPaolo Bonzini static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1728c50d8ae3SPaolo Bonzini { 1729c50d8ae3SPaolo Bonzini u64 *sptep; 1730c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1731c50d8ae3SPaolo Bonzini bool flush = false; 1732c50d8ae3SPaolo Bonzini 1733c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1734c50d8ae3SPaolo Bonzini rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep); 1735c50d8ae3SPaolo Bonzini 1736c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1737c50d8ae3SPaolo Bonzini flush = true; 1738c50d8ae3SPaolo Bonzini } 1739c50d8ae3SPaolo Bonzini 1740c50d8ae3SPaolo Bonzini return flush; 1741c50d8ae3SPaolo Bonzini } 1742c50d8ae3SPaolo Bonzini 1743c50d8ae3SPaolo Bonzini static int kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1744c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1745c50d8ae3SPaolo Bonzini unsigned long data) 1746c50d8ae3SPaolo Bonzini { 1747c50d8ae3SPaolo Bonzini return kvm_zap_rmapp(kvm, rmap_head); 1748c50d8ae3SPaolo Bonzini } 1749c50d8ae3SPaolo Bonzini 1750*cb3eedabSPaolo Bonzini static u64 kvm_mmu_changed_pte_notifier_make_spte(u64 old_spte, kvm_pfn_t new_pfn) 1751*cb3eedabSPaolo Bonzini { 1752*cb3eedabSPaolo Bonzini u64 new_spte; 1753*cb3eedabSPaolo Bonzini 1754*cb3eedabSPaolo Bonzini new_spte = old_spte & ~PT64_BASE_ADDR_MASK; 1755*cb3eedabSPaolo Bonzini new_spte |= (u64)new_pfn << PAGE_SHIFT; 1756*cb3eedabSPaolo Bonzini 1757*cb3eedabSPaolo Bonzini new_spte &= ~PT_WRITABLE_MASK; 1758*cb3eedabSPaolo Bonzini new_spte &= ~SPTE_HOST_WRITEABLE; 1759*cb3eedabSPaolo Bonzini 1760*cb3eedabSPaolo Bonzini new_spte = mark_spte_for_access_track(new_spte); 1761*cb3eedabSPaolo Bonzini 1762*cb3eedabSPaolo Bonzini return new_spte; 1763*cb3eedabSPaolo Bonzini } 1764*cb3eedabSPaolo Bonzini 1765c50d8ae3SPaolo Bonzini static int kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1766c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1767c50d8ae3SPaolo Bonzini unsigned long data) 1768c50d8ae3SPaolo Bonzini { 1769c50d8ae3SPaolo Bonzini u64 *sptep; 1770c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1771c50d8ae3SPaolo Bonzini int need_flush = 0; 1772c50d8ae3SPaolo Bonzini u64 new_spte; 1773c50d8ae3SPaolo Bonzini pte_t *ptep = (pte_t *)data; 1774c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1775c50d8ae3SPaolo Bonzini 1776c50d8ae3SPaolo Bonzini WARN_ON(pte_huge(*ptep)); 1777c50d8ae3SPaolo Bonzini new_pfn = pte_pfn(*ptep); 1778c50d8ae3SPaolo Bonzini 1779c50d8ae3SPaolo Bonzini restart: 1780c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1781c50d8ae3SPaolo Bonzini rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n", 1782c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1783c50d8ae3SPaolo Bonzini 1784c50d8ae3SPaolo Bonzini need_flush = 1; 1785c50d8ae3SPaolo Bonzini 1786c50d8ae3SPaolo Bonzini if (pte_write(*ptep)) { 1787c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1788c50d8ae3SPaolo Bonzini goto restart; 1789c50d8ae3SPaolo Bonzini } else { 1790*cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1791*cb3eedabSPaolo Bonzini *sptep, new_pfn); 1792c50d8ae3SPaolo Bonzini 1793c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1794c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1795c50d8ae3SPaolo Bonzini } 1796c50d8ae3SPaolo Bonzini } 1797c50d8ae3SPaolo Bonzini 1798c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1799c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1800c50d8ae3SPaolo Bonzini return 0; 1801c50d8ae3SPaolo Bonzini } 1802c50d8ae3SPaolo Bonzini 1803c50d8ae3SPaolo Bonzini return need_flush; 1804c50d8ae3SPaolo Bonzini } 1805c50d8ae3SPaolo Bonzini 1806c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1807c50d8ae3SPaolo Bonzini /* input fields. */ 1808c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1809c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1810c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1811c50d8ae3SPaolo Bonzini int start_level; 1812c50d8ae3SPaolo Bonzini int end_level; 1813c50d8ae3SPaolo Bonzini 1814c50d8ae3SPaolo Bonzini /* output fields. */ 1815c50d8ae3SPaolo Bonzini gfn_t gfn; 1816c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1817c50d8ae3SPaolo Bonzini int level; 1818c50d8ae3SPaolo Bonzini 1819c50d8ae3SPaolo Bonzini /* private field. */ 1820c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1821c50d8ae3SPaolo Bonzini }; 1822c50d8ae3SPaolo Bonzini 1823c50d8ae3SPaolo Bonzini static void 1824c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1825c50d8ae3SPaolo Bonzini { 1826c50d8ae3SPaolo Bonzini iterator->level = level; 1827c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1828c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1829c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1830c50d8ae3SPaolo Bonzini iterator->slot); 1831c50d8ae3SPaolo Bonzini } 1832c50d8ae3SPaolo Bonzini 1833c50d8ae3SPaolo Bonzini static void 1834c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1835c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, int start_level, 1836c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1837c50d8ae3SPaolo Bonzini { 1838c50d8ae3SPaolo Bonzini iterator->slot = slot; 1839c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1840c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1841c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1842c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1843c50d8ae3SPaolo Bonzini 1844c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1845c50d8ae3SPaolo Bonzini } 1846c50d8ae3SPaolo Bonzini 1847c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1848c50d8ae3SPaolo Bonzini { 1849c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1850c50d8ae3SPaolo Bonzini } 1851c50d8ae3SPaolo Bonzini 1852c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1853c50d8ae3SPaolo Bonzini { 1854c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1855c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1856c50d8ae3SPaolo Bonzini return; 1857c50d8ae3SPaolo Bonzini } 1858c50d8ae3SPaolo Bonzini 1859c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1860c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1861c50d8ae3SPaolo Bonzini return; 1862c50d8ae3SPaolo Bonzini } 1863c50d8ae3SPaolo Bonzini 1864c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1865c50d8ae3SPaolo Bonzini } 1866c50d8ae3SPaolo Bonzini 1867c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1868c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1869c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1870c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1871c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1872c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1873c50d8ae3SPaolo Bonzini 1874c50d8ae3SPaolo Bonzini static int kvm_handle_hva_range(struct kvm *kvm, 1875c50d8ae3SPaolo Bonzini unsigned long start, 1876c50d8ae3SPaolo Bonzini unsigned long end, 1877c50d8ae3SPaolo Bonzini unsigned long data, 1878c50d8ae3SPaolo Bonzini int (*handler)(struct kvm *kvm, 1879c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1880c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1881c50d8ae3SPaolo Bonzini gfn_t gfn, 1882c50d8ae3SPaolo Bonzini int level, 1883c50d8ae3SPaolo Bonzini unsigned long data)) 1884c50d8ae3SPaolo Bonzini { 1885c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1886c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 1887c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 1888c50d8ae3SPaolo Bonzini int ret = 0; 1889c50d8ae3SPaolo Bonzini int i; 1890c50d8ae3SPaolo Bonzini 1891c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 1892c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 1893c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 1894c50d8ae3SPaolo Bonzini unsigned long hva_start, hva_end; 1895c50d8ae3SPaolo Bonzini gfn_t gfn_start, gfn_end; 1896c50d8ae3SPaolo Bonzini 1897c50d8ae3SPaolo Bonzini hva_start = max(start, memslot->userspace_addr); 1898c50d8ae3SPaolo Bonzini hva_end = min(end, memslot->userspace_addr + 1899c50d8ae3SPaolo Bonzini (memslot->npages << PAGE_SHIFT)); 1900c50d8ae3SPaolo Bonzini if (hva_start >= hva_end) 1901c50d8ae3SPaolo Bonzini continue; 1902c50d8ae3SPaolo Bonzini /* 1903c50d8ae3SPaolo Bonzini * {gfn(page) | page intersects with [hva_start, hva_end)} = 1904c50d8ae3SPaolo Bonzini * {gfn_start, gfn_start+1, ..., gfn_end-1}. 1905c50d8ae3SPaolo Bonzini */ 1906c50d8ae3SPaolo Bonzini gfn_start = hva_to_gfn_memslot(hva_start, memslot); 1907c50d8ae3SPaolo Bonzini gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); 1908c50d8ae3SPaolo Bonzini 19093bae0459SSean Christopherson for_each_slot_rmap_range(memslot, PG_LEVEL_4K, 1910e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 1911c50d8ae3SPaolo Bonzini gfn_start, gfn_end - 1, 1912c50d8ae3SPaolo Bonzini &iterator) 1913c50d8ae3SPaolo Bonzini ret |= handler(kvm, iterator.rmap, memslot, 1914c50d8ae3SPaolo Bonzini iterator.gfn, iterator.level, data); 1915c50d8ae3SPaolo Bonzini } 1916c50d8ae3SPaolo Bonzini } 1917c50d8ae3SPaolo Bonzini 1918c50d8ae3SPaolo Bonzini return ret; 1919c50d8ae3SPaolo Bonzini } 1920c50d8ae3SPaolo Bonzini 1921c50d8ae3SPaolo Bonzini static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, 1922c50d8ae3SPaolo Bonzini unsigned long data, 1923c50d8ae3SPaolo Bonzini int (*handler)(struct kvm *kvm, 1924c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1925c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1926c50d8ae3SPaolo Bonzini gfn_t gfn, int level, 1927c50d8ae3SPaolo Bonzini unsigned long data)) 1928c50d8ae3SPaolo Bonzini { 1929c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler); 1930c50d8ae3SPaolo Bonzini } 1931c50d8ae3SPaolo Bonzini 1932fdfe7cbdSWill Deacon int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1933fdfe7cbdSWill Deacon unsigned flags) 1934c50d8ae3SPaolo Bonzini { 1935c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp); 1936c50d8ae3SPaolo Bonzini } 1937c50d8ae3SPaolo Bonzini 1938c50d8ae3SPaolo Bonzini int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 1939c50d8ae3SPaolo Bonzini { 1940c50d8ae3SPaolo Bonzini return kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); 1941c50d8ae3SPaolo Bonzini } 1942c50d8ae3SPaolo Bonzini 1943c50d8ae3SPaolo Bonzini static int kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1944c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1945c50d8ae3SPaolo Bonzini unsigned long data) 1946c50d8ae3SPaolo Bonzini { 1947c50d8ae3SPaolo Bonzini u64 *sptep; 19483f649ab7SKees Cook struct rmap_iterator iter; 1949c50d8ae3SPaolo Bonzini int young = 0; 1950c50d8ae3SPaolo Bonzini 1951c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1952c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1953c50d8ae3SPaolo Bonzini 1954c50d8ae3SPaolo Bonzini trace_kvm_age_page(gfn, level, slot, young); 1955c50d8ae3SPaolo Bonzini return young; 1956c50d8ae3SPaolo Bonzini } 1957c50d8ae3SPaolo Bonzini 1958c50d8ae3SPaolo Bonzini static int kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1959c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 1960c50d8ae3SPaolo Bonzini int level, unsigned long data) 1961c50d8ae3SPaolo Bonzini { 1962c50d8ae3SPaolo Bonzini u64 *sptep; 1963c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1964c50d8ae3SPaolo Bonzini 1965c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1966c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1967c50d8ae3SPaolo Bonzini return 1; 1968c50d8ae3SPaolo Bonzini return 0; 1969c50d8ae3SPaolo Bonzini } 1970c50d8ae3SPaolo Bonzini 1971c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1972c50d8ae3SPaolo Bonzini 1973c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1974c50d8ae3SPaolo Bonzini { 1975c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1976c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1977c50d8ae3SPaolo Bonzini 197857354682SSean Christopherson sp = sptep_to_sp(spte); 1979c50d8ae3SPaolo Bonzini 1980c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1981c50d8ae3SPaolo Bonzini 1982c50d8ae3SPaolo Bonzini kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, 0); 1983c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1984c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1985c50d8ae3SPaolo Bonzini } 1986c50d8ae3SPaolo Bonzini 1987c50d8ae3SPaolo Bonzini int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 1988c50d8ae3SPaolo Bonzini { 1989c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp); 1990c50d8ae3SPaolo Bonzini } 1991c50d8ae3SPaolo Bonzini 1992c50d8ae3SPaolo Bonzini int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 1993c50d8ae3SPaolo Bonzini { 1994c50d8ae3SPaolo Bonzini return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp); 1995c50d8ae3SPaolo Bonzini } 1996c50d8ae3SPaolo Bonzini 1997c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1998c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1999c50d8ae3SPaolo Bonzini { 2000c50d8ae3SPaolo Bonzini u64 *pos; 2001c50d8ae3SPaolo Bonzini u64 *end; 2002c50d8ae3SPaolo Bonzini 2003c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 2004c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 2005c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 2006c50d8ae3SPaolo Bonzini pos, *pos); 2007c50d8ae3SPaolo Bonzini return 0; 2008c50d8ae3SPaolo Bonzini } 2009c50d8ae3SPaolo Bonzini return 1; 2010c50d8ae3SPaolo Bonzini } 2011c50d8ae3SPaolo Bonzini #endif 2012c50d8ae3SPaolo Bonzini 2013c50d8ae3SPaolo Bonzini /* 2014c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 2015c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 2016c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 2017c50d8ae3SPaolo Bonzini * faster 2018c50d8ae3SPaolo Bonzini */ 2019c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 2020c50d8ae3SPaolo Bonzini { 2021c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 2022c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 2023c50d8ae3SPaolo Bonzini } 2024c50d8ae3SPaolo Bonzini 2025c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 2026c50d8ae3SPaolo Bonzini { 2027c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 2028c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 2029c50d8ae3SPaolo Bonzini list_del(&sp->link); 2030c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 2031c50d8ae3SPaolo Bonzini if (!sp->role.direct) 2032c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 2033c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 2034c50d8ae3SPaolo Bonzini } 2035c50d8ae3SPaolo Bonzini 2036c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 2037c50d8ae3SPaolo Bonzini { 2038c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 2039c50d8ae3SPaolo Bonzini } 2040c50d8ae3SPaolo Bonzini 2041c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 2042c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 2043c50d8ae3SPaolo Bonzini { 2044c50d8ae3SPaolo Bonzini if (!parent_pte) 2045c50d8ae3SPaolo Bonzini return; 2046c50d8ae3SPaolo Bonzini 2047c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 2048c50d8ae3SPaolo Bonzini } 2049c50d8ae3SPaolo Bonzini 2050c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 2051c50d8ae3SPaolo Bonzini u64 *parent_pte) 2052c50d8ae3SPaolo Bonzini { 2053c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 2054c50d8ae3SPaolo Bonzini } 2055c50d8ae3SPaolo Bonzini 2056c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 2057c50d8ae3SPaolo Bonzini u64 *parent_pte) 2058c50d8ae3SPaolo Bonzini { 2059c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 2060c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 2061c50d8ae3SPaolo Bonzini } 2062c50d8ae3SPaolo Bonzini 2063c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 2064c50d8ae3SPaolo Bonzini { 2065c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2066c50d8ae3SPaolo Bonzini 206794ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 206894ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 2069c50d8ae3SPaolo Bonzini if (!direct) 207094ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 2071c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 2072c50d8ae3SPaolo Bonzini 2073c50d8ae3SPaolo Bonzini /* 2074c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 2075c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 2076c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 2077c50d8ae3SPaolo Bonzini */ 2078c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 2079c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 2080c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 2081c50d8ae3SPaolo Bonzini return sp; 2082c50d8ae3SPaolo Bonzini } 2083c50d8ae3SPaolo Bonzini 2084c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 2085c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 2086c50d8ae3SPaolo Bonzini { 2087c50d8ae3SPaolo Bonzini u64 *sptep; 2088c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2089c50d8ae3SPaolo Bonzini 2090c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 2091c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2092c50d8ae3SPaolo Bonzini } 2093c50d8ae3SPaolo Bonzini } 2094c50d8ae3SPaolo Bonzini 2095c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 2096c50d8ae3SPaolo Bonzini { 2097c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2098c50d8ae3SPaolo Bonzini unsigned int index; 2099c50d8ae3SPaolo Bonzini 210057354682SSean Christopherson sp = sptep_to_sp(spte); 2101c50d8ae3SPaolo Bonzini index = spte - sp->spt; 2102c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 2103c50d8ae3SPaolo Bonzini return; 2104c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 2105c50d8ae3SPaolo Bonzini return; 2106c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2107c50d8ae3SPaolo Bonzini } 2108c50d8ae3SPaolo Bonzini 2109c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 2110c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2111c50d8ae3SPaolo Bonzini { 2112c50d8ae3SPaolo Bonzini return 0; 2113c50d8ae3SPaolo Bonzini } 2114c50d8ae3SPaolo Bonzini 2115c50d8ae3SPaolo Bonzini static void nonpaging_update_pte(struct kvm_vcpu *vcpu, 2116c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *spte, 2117c50d8ae3SPaolo Bonzini const void *pte) 2118c50d8ae3SPaolo Bonzini { 2119c50d8ae3SPaolo Bonzini WARN_ON(1); 2120c50d8ae3SPaolo Bonzini } 2121c50d8ae3SPaolo Bonzini 2122c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 2123c50d8ae3SPaolo Bonzini 2124c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 2125c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 2126c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2127c50d8ae3SPaolo Bonzini unsigned int idx; 2128c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 2129c50d8ae3SPaolo Bonzini unsigned int nr; 2130c50d8ae3SPaolo Bonzini }; 2131c50d8ae3SPaolo Bonzini 2132c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 2133c50d8ae3SPaolo Bonzini int idx) 2134c50d8ae3SPaolo Bonzini { 2135c50d8ae3SPaolo Bonzini int i; 2136c50d8ae3SPaolo Bonzini 2137c50d8ae3SPaolo Bonzini if (sp->unsync) 2138c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 2139c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 2140c50d8ae3SPaolo Bonzini return 0; 2141c50d8ae3SPaolo Bonzini 2142c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 2143c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 2144c50d8ae3SPaolo Bonzini pvec->nr++; 2145c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 2146c50d8ae3SPaolo Bonzini } 2147c50d8ae3SPaolo Bonzini 2148c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 2149c50d8ae3SPaolo Bonzini { 2150c50d8ae3SPaolo Bonzini --sp->unsync_children; 2151c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 2152c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 2153c50d8ae3SPaolo Bonzini } 2154c50d8ae3SPaolo Bonzini 2155c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 2156c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 2157c50d8ae3SPaolo Bonzini { 2158c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 2159c50d8ae3SPaolo Bonzini 2160c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 2161c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2162c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 2163c50d8ae3SPaolo Bonzini 2164c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 2165c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 2166c50d8ae3SPaolo Bonzini continue; 2167c50d8ae3SPaolo Bonzini } 2168c50d8ae3SPaolo Bonzini 2169e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 2170c50d8ae3SPaolo Bonzini 2171c50d8ae3SPaolo Bonzini if (child->unsync_children) { 2172c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 2173c50d8ae3SPaolo Bonzini return -ENOSPC; 2174c50d8ae3SPaolo Bonzini 2175c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 2176c50d8ae3SPaolo Bonzini if (!ret) { 2177c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 2178c50d8ae3SPaolo Bonzini continue; 2179c50d8ae3SPaolo Bonzini } else if (ret > 0) { 2180c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 2181c50d8ae3SPaolo Bonzini } else 2182c50d8ae3SPaolo Bonzini return ret; 2183c50d8ae3SPaolo Bonzini } else if (child->unsync) { 2184c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 2185c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 2186c50d8ae3SPaolo Bonzini return -ENOSPC; 2187c50d8ae3SPaolo Bonzini } else 2188c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 2189c50d8ae3SPaolo Bonzini } 2190c50d8ae3SPaolo Bonzini 2191c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 2192c50d8ae3SPaolo Bonzini } 2193c50d8ae3SPaolo Bonzini 2194c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 2195c50d8ae3SPaolo Bonzini 2196c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 2197c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 2198c50d8ae3SPaolo Bonzini { 2199c50d8ae3SPaolo Bonzini pvec->nr = 0; 2200c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 2201c50d8ae3SPaolo Bonzini return 0; 2202c50d8ae3SPaolo Bonzini 2203c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 2204c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 2205c50d8ae3SPaolo Bonzini } 2206c50d8ae3SPaolo Bonzini 2207c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 2208c50d8ae3SPaolo Bonzini { 2209c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 2210c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 2211c50d8ae3SPaolo Bonzini sp->unsync = 0; 2212c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 2213c50d8ae3SPaolo Bonzini } 2214c50d8ae3SPaolo Bonzini 2215c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2216c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 2217c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2218c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 2219c50d8ae3SPaolo Bonzini 2220ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 2221ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 2222c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 2223c50d8ae3SPaolo Bonzini } else 2224c50d8ae3SPaolo Bonzini 2225c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 2226ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 2227ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 2228c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 2229c50d8ae3SPaolo Bonzini 2230c50d8ae3SPaolo Bonzini static inline bool is_ept_sp(struct kvm_mmu_page *sp) 2231c50d8ae3SPaolo Bonzini { 2232c50d8ae3SPaolo Bonzini return sp->role.cr0_wp && sp->role.smap_andnot_wp; 2233c50d8ae3SPaolo Bonzini } 2234c50d8ae3SPaolo Bonzini 2235c50d8ae3SPaolo Bonzini /* @sp->gfn should be write-protected at the call site */ 2236c50d8ae3SPaolo Bonzini static bool __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 2237c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2238c50d8ae3SPaolo Bonzini { 2239c50d8ae3SPaolo Bonzini if ((!is_ept_sp(sp) && sp->role.gpte_is_8_bytes != !!is_pae(vcpu)) || 2240c50d8ae3SPaolo Bonzini vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 2241c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 2242c50d8ae3SPaolo Bonzini return false; 2243c50d8ae3SPaolo Bonzini } 2244c50d8ae3SPaolo Bonzini 2245c50d8ae3SPaolo Bonzini return true; 2246c50d8ae3SPaolo Bonzini } 2247c50d8ae3SPaolo Bonzini 2248c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 2249c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2250c50d8ae3SPaolo Bonzini bool remote_flush) 2251c50d8ae3SPaolo Bonzini { 2252c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 2253c50d8ae3SPaolo Bonzini return false; 2254c50d8ae3SPaolo Bonzini 2255c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 2256c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 2257c50d8ae3SPaolo Bonzini else 2258c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2259c50d8ae3SPaolo Bonzini return true; 2260c50d8ae3SPaolo Bonzini } 2261c50d8ae3SPaolo Bonzini 2262c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 2263c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2264c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 2265c50d8ae3SPaolo Bonzini { 2266c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 2267c50d8ae3SPaolo Bonzini return; 2268c50d8ae3SPaolo Bonzini 2269c50d8ae3SPaolo Bonzini if (local_flush) 22708c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2271c50d8ae3SPaolo Bonzini } 2272c50d8ae3SPaolo Bonzini 2273c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 2274c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 2275c50d8ae3SPaolo Bonzini #else 2276c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 2277c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 2278c50d8ae3SPaolo Bonzini #endif 2279c50d8ae3SPaolo Bonzini 2280c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 2281c50d8ae3SPaolo Bonzini { 2282c50d8ae3SPaolo Bonzini return sp->role.invalid || 2283c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 2284c50d8ae3SPaolo Bonzini } 2285c50d8ae3SPaolo Bonzini 2286c50d8ae3SPaolo Bonzini static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 2287c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2288c50d8ae3SPaolo Bonzini { 2289c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(vcpu->kvm, sp); 2290c50d8ae3SPaolo Bonzini return __kvm_sync_page(vcpu, sp, invalid_list); 2291c50d8ae3SPaolo Bonzini } 2292c50d8ae3SPaolo Bonzini 2293c50d8ae3SPaolo Bonzini /* @gfn should be write-protected at the call site */ 2294c50d8ae3SPaolo Bonzini static bool kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, 2295c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2296c50d8ae3SPaolo Bonzini { 2297c50d8ae3SPaolo Bonzini struct kvm_mmu_page *s; 2298c50d8ae3SPaolo Bonzini bool ret = false; 2299c50d8ae3SPaolo Bonzini 2300c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) { 2301c50d8ae3SPaolo Bonzini if (!s->unsync) 2302c50d8ae3SPaolo Bonzini continue; 2303c50d8ae3SPaolo Bonzini 23043bae0459SSean Christopherson WARN_ON(s->role.level != PG_LEVEL_4K); 2305c50d8ae3SPaolo Bonzini ret |= kvm_sync_page(vcpu, s, invalid_list); 2306c50d8ae3SPaolo Bonzini } 2307c50d8ae3SPaolo Bonzini 2308c50d8ae3SPaolo Bonzini return ret; 2309c50d8ae3SPaolo Bonzini } 2310c50d8ae3SPaolo Bonzini 2311c50d8ae3SPaolo Bonzini struct mmu_page_path { 2312c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 2313c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 2314c50d8ae3SPaolo Bonzini }; 2315c50d8ae3SPaolo Bonzini 2316c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 2317c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 2318c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 2319c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 2320c50d8ae3SPaolo Bonzini 2321c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 2322c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 2323c50d8ae3SPaolo Bonzini int i) 2324c50d8ae3SPaolo Bonzini { 2325c50d8ae3SPaolo Bonzini int n; 2326c50d8ae3SPaolo Bonzini 2327c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 2328c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 2329c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 2330c50d8ae3SPaolo Bonzini int level = sp->role.level; 2331c50d8ae3SPaolo Bonzini 2332c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 23333bae0459SSean Christopherson if (level == PG_LEVEL_4K) 2334c50d8ae3SPaolo Bonzini break; 2335c50d8ae3SPaolo Bonzini 2336c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 2337c50d8ae3SPaolo Bonzini } 2338c50d8ae3SPaolo Bonzini 2339c50d8ae3SPaolo Bonzini return n; 2340c50d8ae3SPaolo Bonzini } 2341c50d8ae3SPaolo Bonzini 2342c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 2343c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 2344c50d8ae3SPaolo Bonzini { 2345c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2346c50d8ae3SPaolo Bonzini int level; 2347c50d8ae3SPaolo Bonzini 2348c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 2349c50d8ae3SPaolo Bonzini return 0; 2350c50d8ae3SPaolo Bonzini 2351c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 2352c50d8ae3SPaolo Bonzini 2353c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 2354c50d8ae3SPaolo Bonzini level = sp->role.level; 23553bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 2356c50d8ae3SPaolo Bonzini 2357c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 2358c50d8ae3SPaolo Bonzini 2359c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 2360c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 2361c50d8ae3SPaolo Bonzini */ 2362c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 2363c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 2364c50d8ae3SPaolo Bonzini } 2365c50d8ae3SPaolo Bonzini 2366c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 2367c50d8ae3SPaolo Bonzini { 2368c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2369c50d8ae3SPaolo Bonzini unsigned int level = 0; 2370c50d8ae3SPaolo Bonzini 2371c50d8ae3SPaolo Bonzini do { 2372c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 2373c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 2374c50d8ae3SPaolo Bonzini if (!sp) 2375c50d8ae3SPaolo Bonzini return; 2376c50d8ae3SPaolo Bonzini 2377c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 2378c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 2379c50d8ae3SPaolo Bonzini level++; 2380c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 2381c50d8ae3SPaolo Bonzini } 2382c50d8ae3SPaolo Bonzini 2383c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 2384c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 2385c50d8ae3SPaolo Bonzini { 2386c50d8ae3SPaolo Bonzini int i; 2387c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2388c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2389c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2390c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2391c50d8ae3SPaolo Bonzini bool flush = false; 2392c50d8ae3SPaolo Bonzini 2393c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2394c50d8ae3SPaolo Bonzini bool protected = false; 2395c50d8ae3SPaolo Bonzini 2396c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 2397c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 2398c50d8ae3SPaolo Bonzini 2399c50d8ae3SPaolo Bonzini if (protected) { 2400c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 2401c50d8ae3SPaolo Bonzini flush = false; 2402c50d8ae3SPaolo Bonzini } 2403c50d8ae3SPaolo Bonzini 2404c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2405c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2406c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2407c50d8ae3SPaolo Bonzini } 2408c50d8ae3SPaolo Bonzini if (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock)) { 2409c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2410c50d8ae3SPaolo Bonzini cond_resched_lock(&vcpu->kvm->mmu_lock); 2411c50d8ae3SPaolo Bonzini flush = false; 2412c50d8ae3SPaolo Bonzini } 2413c50d8ae3SPaolo Bonzini } 2414c50d8ae3SPaolo Bonzini 2415c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2416c50d8ae3SPaolo Bonzini } 2417c50d8ae3SPaolo Bonzini 2418c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2419c50d8ae3SPaolo Bonzini { 2420c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2421c50d8ae3SPaolo Bonzini } 2422c50d8ae3SPaolo Bonzini 2423c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2424c50d8ae3SPaolo Bonzini { 242557354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2426c50d8ae3SPaolo Bonzini } 2427c50d8ae3SPaolo Bonzini 2428c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2429c50d8ae3SPaolo Bonzini gfn_t gfn, 2430c50d8ae3SPaolo Bonzini gva_t gaddr, 2431c50d8ae3SPaolo Bonzini unsigned level, 2432c50d8ae3SPaolo Bonzini int direct, 24330a2b64c5SBen Gardon unsigned int access) 2434c50d8ae3SPaolo Bonzini { 2435fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2436c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2437ac101b7cSSean Christopherson struct hlist_head *sp_list; 2438c50d8ae3SPaolo Bonzini unsigned quadrant; 2439c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2440c50d8ae3SPaolo Bonzini bool need_sync = false; 2441c50d8ae3SPaolo Bonzini bool flush = false; 2442c50d8ae3SPaolo Bonzini int collisions = 0; 2443c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2444c50d8ae3SPaolo Bonzini 2445c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2446c50d8ae3SPaolo Bonzini role.level = level; 2447c50d8ae3SPaolo Bonzini role.direct = direct; 2448c50d8ae3SPaolo Bonzini if (role.direct) 2449c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2450c50d8ae3SPaolo Bonzini role.access = access; 2451fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2452c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2453c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2454c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2455c50d8ae3SPaolo Bonzini } 2456ac101b7cSSean Christopherson 2457ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2458ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2459c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2460c50d8ae3SPaolo Bonzini collisions++; 2461c50d8ae3SPaolo Bonzini continue; 2462c50d8ae3SPaolo Bonzini } 2463c50d8ae3SPaolo Bonzini 2464c50d8ae3SPaolo Bonzini if (!need_sync && sp->unsync) 2465c50d8ae3SPaolo Bonzini need_sync = true; 2466c50d8ae3SPaolo Bonzini 2467c50d8ae3SPaolo Bonzini if (sp->role.word != role.word) 2468c50d8ae3SPaolo Bonzini continue; 2469c50d8ae3SPaolo Bonzini 2470fb58a9c3SSean Christopherson if (direct_mmu) 2471fb58a9c3SSean Christopherson goto trace_get_page; 2472fb58a9c3SSean Christopherson 2473c50d8ae3SPaolo Bonzini if (sp->unsync) { 2474c50d8ae3SPaolo Bonzini /* The page is good, but __kvm_sync_page might still end 2475c50d8ae3SPaolo Bonzini * up zapping it. If so, break in order to rebuild it. 2476c50d8ae3SPaolo Bonzini */ 2477c50d8ae3SPaolo Bonzini if (!__kvm_sync_page(vcpu, sp, &invalid_list)) 2478c50d8ae3SPaolo Bonzini break; 2479c50d8ae3SPaolo Bonzini 2480c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 24818c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2482c50d8ae3SPaolo Bonzini } 2483c50d8ae3SPaolo Bonzini 2484c50d8ae3SPaolo Bonzini if (sp->unsync_children) 2485f6f6195bSLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 2486c50d8ae3SPaolo Bonzini 2487c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2488fb58a9c3SSean Christopherson 2489fb58a9c3SSean Christopherson trace_get_page: 2490c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2491c50d8ae3SPaolo Bonzini goto out; 2492c50d8ae3SPaolo Bonzini } 2493c50d8ae3SPaolo Bonzini 2494c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2495c50d8ae3SPaolo Bonzini 2496c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2497c50d8ae3SPaolo Bonzini 2498c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2499c50d8ae3SPaolo Bonzini sp->role = role; 2500ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2501c50d8ae3SPaolo Bonzini if (!direct) { 2502c50d8ae3SPaolo Bonzini /* 2503c50d8ae3SPaolo Bonzini * we should do write protection before syncing pages 2504c50d8ae3SPaolo Bonzini * otherwise the content of the synced shadow page may 2505c50d8ae3SPaolo Bonzini * be inconsistent with guest page table. 2506c50d8ae3SPaolo Bonzini */ 2507c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 25083bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2509c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2510c50d8ae3SPaolo Bonzini 25113bae0459SSean Christopherson if (level > PG_LEVEL_4K && need_sync) 2512c50d8ae3SPaolo Bonzini flush |= kvm_sync_pages(vcpu, gfn, &invalid_list); 2513c50d8ae3SPaolo Bonzini } 2514c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2515c50d8ae3SPaolo Bonzini 2516c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2517c50d8ae3SPaolo Bonzini out: 2518c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2519c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2520c50d8ae3SPaolo Bonzini return sp; 2521c50d8ae3SPaolo Bonzini } 2522c50d8ae3SPaolo Bonzini 2523c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2524c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2525c50d8ae3SPaolo Bonzini u64 addr) 2526c50d8ae3SPaolo Bonzini { 2527c50d8ae3SPaolo Bonzini iterator->addr = addr; 2528c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2529c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2530c50d8ae3SPaolo Bonzini 2531c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2532c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2533c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2534c50d8ae3SPaolo Bonzini --iterator->level; 2535c50d8ae3SPaolo Bonzini 2536c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2537c50d8ae3SPaolo Bonzini /* 2538c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2539c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2540c50d8ae3SPaolo Bonzini */ 2541c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2542c50d8ae3SPaolo Bonzini 2543c50d8ae3SPaolo Bonzini iterator->shadow_addr 2544c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2545c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2546c50d8ae3SPaolo Bonzini --iterator->level; 2547c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2548c50d8ae3SPaolo Bonzini iterator->level = 0; 2549c50d8ae3SPaolo Bonzini } 2550c50d8ae3SPaolo Bonzini } 2551c50d8ae3SPaolo Bonzini 2552c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2553c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2554c50d8ae3SPaolo Bonzini { 2555c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2556c50d8ae3SPaolo Bonzini addr); 2557c50d8ae3SPaolo Bonzini } 2558c50d8ae3SPaolo Bonzini 2559c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2560c50d8ae3SPaolo Bonzini { 25613bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2562c50d8ae3SPaolo Bonzini return false; 2563c50d8ae3SPaolo Bonzini 2564c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2565c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2566c50d8ae3SPaolo Bonzini return true; 2567c50d8ae3SPaolo Bonzini } 2568c50d8ae3SPaolo Bonzini 2569c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2570c50d8ae3SPaolo Bonzini u64 spte) 2571c50d8ae3SPaolo Bonzini { 2572c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2573c50d8ae3SPaolo Bonzini iterator->level = 0; 2574c50d8ae3SPaolo Bonzini return; 2575c50d8ae3SPaolo Bonzini } 2576c50d8ae3SPaolo Bonzini 2577c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2578c50d8ae3SPaolo Bonzini --iterator->level; 2579c50d8ae3SPaolo Bonzini } 2580c50d8ae3SPaolo Bonzini 2581c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2582c50d8ae3SPaolo Bonzini { 2583c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2584c50d8ae3SPaolo Bonzini } 2585c50d8ae3SPaolo Bonzini 2586cc4674d0SBen Gardon static u64 make_nonleaf_spte(u64 *child_pt, bool ad_disabled) 2587cc4674d0SBen Gardon { 2588cc4674d0SBen Gardon u64 spte; 2589cc4674d0SBen Gardon 2590cc4674d0SBen Gardon spte = __pa(child_pt) | shadow_present_mask | PT_WRITABLE_MASK | 2591cc4674d0SBen Gardon shadow_user_mask | shadow_x_mask | shadow_me_mask; 2592cc4674d0SBen Gardon 2593cc4674d0SBen Gardon if (ad_disabled) 2594cc4674d0SBen Gardon spte |= SPTE_AD_DISABLED_MASK; 2595cc4674d0SBen Gardon else 2596cc4674d0SBen Gardon spte |= shadow_accessed_mask; 2597cc4674d0SBen Gardon 2598cc4674d0SBen Gardon return spte; 2599cc4674d0SBen Gardon } 2600cc4674d0SBen Gardon 2601c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2602c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2603c50d8ae3SPaolo Bonzini { 2604c50d8ae3SPaolo Bonzini u64 spte; 2605c50d8ae3SPaolo Bonzini 2606c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2607c50d8ae3SPaolo Bonzini 2608cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2609c50d8ae3SPaolo Bonzini 2610c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2611c50d8ae3SPaolo Bonzini 2612c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2613c50d8ae3SPaolo Bonzini 2614c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2615c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2616c50d8ae3SPaolo Bonzini } 2617c50d8ae3SPaolo Bonzini 2618c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2619c50d8ae3SPaolo Bonzini unsigned direct_access) 2620c50d8ae3SPaolo Bonzini { 2621c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2622c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2623c50d8ae3SPaolo Bonzini 2624c50d8ae3SPaolo Bonzini /* 2625c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2626c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2627c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2628c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2629c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2630c50d8ae3SPaolo Bonzini */ 2631e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2632c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2633c50d8ae3SPaolo Bonzini return; 2634c50d8ae3SPaolo Bonzini 2635c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2636c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2637c50d8ae3SPaolo Bonzini } 2638c50d8ae3SPaolo Bonzini } 2639c50d8ae3SPaolo Bonzini 26402de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 26412de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 26422de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2643c50d8ae3SPaolo Bonzini { 2644c50d8ae3SPaolo Bonzini u64 pte; 2645c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2646c50d8ae3SPaolo Bonzini 2647c50d8ae3SPaolo Bonzini pte = *spte; 2648c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2649c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2650c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2651c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2652c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2653c50d8ae3SPaolo Bonzini } else { 2654e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2655c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 26562de4085cSBen Gardon 26572de4085cSBen Gardon /* 26582de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 26592de4085cSBen Gardon * unlikely to be used again in the near future. This 26602de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 26612de4085cSBen Gardon */ 26622de4085cSBen Gardon if (tdp_enabled && invalid_list && 26632de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 26642de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 26652de4085cSBen Gardon invalid_list); 2666c50d8ae3SPaolo Bonzini } 2667ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2668c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2669ace569e0SSean Christopherson } 26702de4085cSBen Gardon return 0; 2671c50d8ae3SPaolo Bonzini } 2672c50d8ae3SPaolo Bonzini 26732de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 26742de4085cSBen Gardon struct kvm_mmu_page *sp, 26752de4085cSBen Gardon struct list_head *invalid_list) 2676c50d8ae3SPaolo Bonzini { 26772de4085cSBen Gardon int zapped = 0; 2678c50d8ae3SPaolo Bonzini unsigned i; 2679c50d8ae3SPaolo Bonzini 2680c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 26812de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 26822de4085cSBen Gardon 26832de4085cSBen Gardon return zapped; 2684c50d8ae3SPaolo Bonzini } 2685c50d8ae3SPaolo Bonzini 2686c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2687c50d8ae3SPaolo Bonzini { 2688c50d8ae3SPaolo Bonzini u64 *sptep; 2689c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2690c50d8ae3SPaolo Bonzini 2691c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2692c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2693c50d8ae3SPaolo Bonzini } 2694c50d8ae3SPaolo Bonzini 2695c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2696c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2697c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2698c50d8ae3SPaolo Bonzini { 2699c50d8ae3SPaolo Bonzini int i, zapped = 0; 2700c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2701c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2702c50d8ae3SPaolo Bonzini 27033bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2704c50d8ae3SPaolo Bonzini return 0; 2705c50d8ae3SPaolo Bonzini 2706c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2707c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2708c50d8ae3SPaolo Bonzini 2709c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2710c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2711c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2712c50d8ae3SPaolo Bonzini zapped++; 2713c50d8ae3SPaolo Bonzini } 2714c50d8ae3SPaolo Bonzini } 2715c50d8ae3SPaolo Bonzini 2716c50d8ae3SPaolo Bonzini return zapped; 2717c50d8ae3SPaolo Bonzini } 2718c50d8ae3SPaolo Bonzini 2719c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2720c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2721c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2722c50d8ae3SPaolo Bonzini int *nr_zapped) 2723c50d8ae3SPaolo Bonzini { 2724c50d8ae3SPaolo Bonzini bool list_unstable; 2725c50d8ae3SPaolo Bonzini 2726c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2727c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2728c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 27292de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2730c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2731c50d8ae3SPaolo Bonzini 2732c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2733c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2734c50d8ae3SPaolo Bonzini 2735c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2736c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2737c50d8ae3SPaolo Bonzini 2738c50d8ae3SPaolo Bonzini if (sp->unsync) 2739c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2740c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2741c50d8ae3SPaolo Bonzini /* Count self */ 2742c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2743f95eec9bSSean Christopherson 2744f95eec9bSSean Christopherson /* 2745f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2746f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2747f95eec9bSSean Christopherson * !sp->root_count. 2748f95eec9bSSean Christopherson */ 2749f95eec9bSSean Christopherson if (sp->role.invalid) 2750f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2751f95eec9bSSean Christopherson else 2752c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2753c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2754c50d8ae3SPaolo Bonzini } else { 2755f95eec9bSSean Christopherson /* 2756f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2757f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2758f95eec9bSSean Christopherson */ 2759f95eec9bSSean Christopherson list_del(&sp->link); 2760c50d8ae3SPaolo Bonzini 2761c50d8ae3SPaolo Bonzini /* 2762c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2763c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2764c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2765c50d8ae3SPaolo Bonzini */ 2766c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2767c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2768c50d8ae3SPaolo Bonzini } 2769c50d8ae3SPaolo Bonzini 2770c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2771c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2772c50d8ae3SPaolo Bonzini 2773c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2774c50d8ae3SPaolo Bonzini return list_unstable; 2775c50d8ae3SPaolo Bonzini } 2776c50d8ae3SPaolo Bonzini 2777c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2778c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2779c50d8ae3SPaolo Bonzini { 2780c50d8ae3SPaolo Bonzini int nr_zapped; 2781c50d8ae3SPaolo Bonzini 2782c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2783c50d8ae3SPaolo Bonzini return nr_zapped; 2784c50d8ae3SPaolo Bonzini } 2785c50d8ae3SPaolo Bonzini 2786c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2787c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2788c50d8ae3SPaolo Bonzini { 2789c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2790c50d8ae3SPaolo Bonzini 2791c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2792c50d8ae3SPaolo Bonzini return; 2793c50d8ae3SPaolo Bonzini 2794c50d8ae3SPaolo Bonzini /* 2795c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2796c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2797c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2798c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2799c50d8ae3SPaolo Bonzini * 2800c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2801c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2802c50d8ae3SPaolo Bonzini */ 2803c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2804c50d8ae3SPaolo Bonzini 2805c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2806c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2807c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2808c50d8ae3SPaolo Bonzini } 2809c50d8ae3SPaolo Bonzini } 2810c50d8ae3SPaolo Bonzini 28116b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 28126b82ef2cSSean Christopherson unsigned long nr_to_zap) 2813c50d8ae3SPaolo Bonzini { 28146b82ef2cSSean Christopherson unsigned long total_zapped = 0; 28156b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2816ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 28176b82ef2cSSean Christopherson bool unstable; 28186b82ef2cSSean Christopherson int nr_zapped; 2819c50d8ae3SPaolo Bonzini 2820c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2821ba7888ddSSean Christopherson return 0; 2822c50d8ae3SPaolo Bonzini 28236b82ef2cSSean Christopherson restart: 28246b82ef2cSSean Christopherson list_for_each_entry_safe(sp, tmp, &kvm->arch.active_mmu_pages, link) { 28256b82ef2cSSean Christopherson /* 28266b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 28276b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 28286b82ef2cSSean Christopherson */ 28296b82ef2cSSean Christopherson if (sp->root_count) 28306b82ef2cSSean Christopherson continue; 28316b82ef2cSSean Christopherson 28326b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 28336b82ef2cSSean Christopherson &nr_zapped); 28346b82ef2cSSean Christopherson total_zapped += nr_zapped; 28356b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2836ba7888ddSSean Christopherson break; 2837ba7888ddSSean Christopherson 28386b82ef2cSSean Christopherson if (unstable) 28396b82ef2cSSean Christopherson goto restart; 2840ba7888ddSSean Christopherson } 28416b82ef2cSSean Christopherson 28426b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 28436b82ef2cSSean Christopherson 28446b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 28456b82ef2cSSean Christopherson return total_zapped; 28466b82ef2cSSean Christopherson } 28476b82ef2cSSean Christopherson 2848afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2849afe8d7e6SSean Christopherson { 2850afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2851afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2852afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2853afe8d7e6SSean Christopherson 2854afe8d7e6SSean Christopherson return 0; 2855c50d8ae3SPaolo Bonzini } 2856c50d8ae3SPaolo Bonzini 2857ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2858ba7888ddSSean Christopherson { 28596b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2860ba7888ddSSean Christopherson 28616b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2862ba7888ddSSean Christopherson return 0; 2863ba7888ddSSean Christopherson 28646b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2865ba7888ddSSean Christopherson 2866ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2867ba7888ddSSean Christopherson return -ENOSPC; 2868ba7888ddSSean Christopherson return 0; 2869ba7888ddSSean Christopherson } 2870ba7888ddSSean Christopherson 2871c50d8ae3SPaolo Bonzini /* 2872c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2873c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2874c50d8ae3SPaolo Bonzini */ 2875c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2876c50d8ae3SPaolo Bonzini { 2877c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 2878c50d8ae3SPaolo Bonzini 2879c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 28806b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 28816b82ef2cSSean Christopherson goal_nr_mmu_pages); 2882c50d8ae3SPaolo Bonzini 2883c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2884c50d8ae3SPaolo Bonzini } 2885c50d8ae3SPaolo Bonzini 2886c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2887c50d8ae3SPaolo Bonzini 2888c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 2889c50d8ae3SPaolo Bonzini } 2890c50d8ae3SPaolo Bonzini 2891c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2892c50d8ae3SPaolo Bonzini { 2893c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2894c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2895c50d8ae3SPaolo Bonzini int r; 2896c50d8ae3SPaolo Bonzini 2897c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2898c50d8ae3SPaolo Bonzini r = 0; 2899c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 2900c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2901c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2902c50d8ae3SPaolo Bonzini sp->role.word); 2903c50d8ae3SPaolo Bonzini r = 1; 2904c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2905c50d8ae3SPaolo Bonzini } 2906c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2907c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 2908c50d8ae3SPaolo Bonzini 2909c50d8ae3SPaolo Bonzini return r; 2910c50d8ae3SPaolo Bonzini } 2911c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page); 2912c50d8ae3SPaolo Bonzini 2913c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2914c50d8ae3SPaolo Bonzini { 2915c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2916c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2917c50d8ae3SPaolo Bonzini sp->unsync = 1; 2918c50d8ae3SPaolo Bonzini 2919c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2920c50d8ae3SPaolo Bonzini } 2921c50d8ae3SPaolo Bonzini 2922c50d8ae3SPaolo Bonzini static bool mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, 2923c50d8ae3SPaolo Bonzini bool can_unsync) 2924c50d8ae3SPaolo Bonzini { 2925c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2926c50d8ae3SPaolo Bonzini 2927c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 2928c50d8ae3SPaolo Bonzini return true; 2929c50d8ae3SPaolo Bonzini 2930c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2931c50d8ae3SPaolo Bonzini if (!can_unsync) 2932c50d8ae3SPaolo Bonzini return true; 2933c50d8ae3SPaolo Bonzini 2934c50d8ae3SPaolo Bonzini if (sp->unsync) 2935c50d8ae3SPaolo Bonzini continue; 2936c50d8ae3SPaolo Bonzini 29373bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2938c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2939c50d8ae3SPaolo Bonzini } 2940c50d8ae3SPaolo Bonzini 2941c50d8ae3SPaolo Bonzini /* 2942c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2943c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2944c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2945c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2946c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2947c50d8ae3SPaolo Bonzini * following could happen: 2948c50d8ae3SPaolo Bonzini * 2949c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2950c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2951c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2952c50d8ae3SPaolo Bonzini * to be writable 2953c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2954c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2955c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2956c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2957c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2958c50d8ae3SPaolo Bonzini * fault. 2959c50d8ae3SPaolo Bonzini * 2960c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2961c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2962c50d8ae3SPaolo Bonzini * 2963c50d8ae3SPaolo Bonzini * 2.3 kvm_mmu_sync_pages() reads sp->unsync. 2964c50d8ae3SPaolo Bonzini * Since it is false, so it just returns. 2965c50d8ae3SPaolo Bonzini * 2966c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2967c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2968c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2969c50d8ae3SPaolo Bonzini * gets used. 2970c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2971c50d8ae3SPaolo Bonzini * as unsync 2972c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2973c50d8ae3SPaolo Bonzini * 2974c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2975c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2976c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2977c50d8ae3SPaolo Bonzini */ 2978c50d8ae3SPaolo Bonzini smp_wmb(); 2979c50d8ae3SPaolo Bonzini 2980c50d8ae3SPaolo Bonzini return false; 2981c50d8ae3SPaolo Bonzini } 2982c50d8ae3SPaolo Bonzini 2983c50d8ae3SPaolo Bonzini static bool kvm_is_mmio_pfn(kvm_pfn_t pfn) 2984c50d8ae3SPaolo Bonzini { 2985c50d8ae3SPaolo Bonzini if (pfn_valid(pfn)) 2986c50d8ae3SPaolo Bonzini return !is_zero_pfn(pfn) && PageReserved(pfn_to_page(pfn)) && 2987c50d8ae3SPaolo Bonzini /* 2988c50d8ae3SPaolo Bonzini * Some reserved pages, such as those from NVDIMM 2989c50d8ae3SPaolo Bonzini * DAX devices, are not for MMIO, and can be mapped 2990c50d8ae3SPaolo Bonzini * with cached memory type for better performance. 2991c50d8ae3SPaolo Bonzini * However, the above check misconceives those pages 2992c50d8ae3SPaolo Bonzini * as MMIO, and results in KVM mapping them with UC 2993c50d8ae3SPaolo Bonzini * memory type, which would hurt the performance. 2994c50d8ae3SPaolo Bonzini * Therefore, we check the host memory type in addition 2995c50d8ae3SPaolo Bonzini * and only treat UC/UC-/WC pages as MMIO. 2996c50d8ae3SPaolo Bonzini */ 2997c50d8ae3SPaolo Bonzini (!pat_enabled() || pat_pfn_immune_to_uc_mtrr(pfn)); 2998c50d8ae3SPaolo Bonzini 2999c50d8ae3SPaolo Bonzini return !e820__mapped_raw_any(pfn_to_hpa(pfn), 3000c50d8ae3SPaolo Bonzini pfn_to_hpa(pfn + 1) - 1, 3001c50d8ae3SPaolo Bonzini E820_TYPE_RAM); 3002c50d8ae3SPaolo Bonzini } 3003c50d8ae3SPaolo Bonzini 3004c50d8ae3SPaolo Bonzini /* Bits which may be returned by set_spte() */ 3005c50d8ae3SPaolo Bonzini #define SET_SPTE_WRITE_PROTECTED_PT BIT(0) 3006c50d8ae3SPaolo Bonzini #define SET_SPTE_NEED_REMOTE_TLB_FLUSH BIT(1) 300712703759SSean Christopherson #define SET_SPTE_SPURIOUS BIT(2) 3008c50d8ae3SPaolo Bonzini 3009799a4190SBen Gardon static int make_spte(struct kvm_vcpu *vcpu, unsigned int pte_access, int level, 3010799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, u64 old_spte, bool speculative, 3011799a4190SBen Gardon bool can_unsync, bool host_writable, bool ad_disabled, 3012799a4190SBen Gardon u64 *new_spte) 3013c50d8ae3SPaolo Bonzini { 3014c50d8ae3SPaolo Bonzini u64 spte = 0; 3015c50d8ae3SPaolo Bonzini int ret = 0; 3016c50d8ae3SPaolo Bonzini 3017799a4190SBen Gardon if (ad_disabled) 3018c50d8ae3SPaolo Bonzini spte |= SPTE_AD_DISABLED_MASK; 3019c50d8ae3SPaolo Bonzini else if (kvm_vcpu_ad_need_write_protect(vcpu)) 3020c50d8ae3SPaolo Bonzini spte |= SPTE_AD_WRPROT_ONLY_MASK; 3021c50d8ae3SPaolo Bonzini 3022c50d8ae3SPaolo Bonzini /* 3023c50d8ae3SPaolo Bonzini * For the EPT case, shadow_present_mask is 0 if hardware 3024c50d8ae3SPaolo Bonzini * supports exec-only page table entries. In that case, 3025c50d8ae3SPaolo Bonzini * ACC_USER_MASK and shadow_user_mask are used to represent 3026c50d8ae3SPaolo Bonzini * read access. See FNAME(gpte_access) in paging_tmpl.h. 3027c50d8ae3SPaolo Bonzini */ 3028c50d8ae3SPaolo Bonzini spte |= shadow_present_mask; 3029c50d8ae3SPaolo Bonzini if (!speculative) 3030c50d8ae3SPaolo Bonzini spte |= spte_shadow_accessed_mask(spte); 3031c50d8ae3SPaolo Bonzini 30323bae0459SSean Christopherson if (level > PG_LEVEL_4K && (pte_access & ACC_EXEC_MASK) && 3033c50d8ae3SPaolo Bonzini is_nx_huge_page_enabled()) { 3034c50d8ae3SPaolo Bonzini pte_access &= ~ACC_EXEC_MASK; 3035c50d8ae3SPaolo Bonzini } 3036c50d8ae3SPaolo Bonzini 3037c50d8ae3SPaolo Bonzini if (pte_access & ACC_EXEC_MASK) 3038c50d8ae3SPaolo Bonzini spte |= shadow_x_mask; 3039c50d8ae3SPaolo Bonzini else 3040c50d8ae3SPaolo Bonzini spte |= shadow_nx_mask; 3041c50d8ae3SPaolo Bonzini 3042c50d8ae3SPaolo Bonzini if (pte_access & ACC_USER_MASK) 3043c50d8ae3SPaolo Bonzini spte |= shadow_user_mask; 3044c50d8ae3SPaolo Bonzini 30453bae0459SSean Christopherson if (level > PG_LEVEL_4K) 3046c50d8ae3SPaolo Bonzini spte |= PT_PAGE_SIZE_MASK; 3047c50d8ae3SPaolo Bonzini if (tdp_enabled) 3048afaf0b2fSSean Christopherson spte |= kvm_x86_ops.get_mt_mask(vcpu, gfn, 3049c50d8ae3SPaolo Bonzini kvm_is_mmio_pfn(pfn)); 3050c50d8ae3SPaolo Bonzini 3051c50d8ae3SPaolo Bonzini if (host_writable) 3052c50d8ae3SPaolo Bonzini spte |= SPTE_HOST_WRITEABLE; 3053c50d8ae3SPaolo Bonzini else 3054c50d8ae3SPaolo Bonzini pte_access &= ~ACC_WRITE_MASK; 3055c50d8ae3SPaolo Bonzini 3056c50d8ae3SPaolo Bonzini if (!kvm_is_mmio_pfn(pfn)) 3057c50d8ae3SPaolo Bonzini spte |= shadow_me_mask; 3058c50d8ae3SPaolo Bonzini 3059c50d8ae3SPaolo Bonzini spte |= (u64)pfn << PAGE_SHIFT; 3060c50d8ae3SPaolo Bonzini 3061c50d8ae3SPaolo Bonzini if (pte_access & ACC_WRITE_MASK) { 3062c50d8ae3SPaolo Bonzini spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE; 3063c50d8ae3SPaolo Bonzini 3064c50d8ae3SPaolo Bonzini /* 3065c50d8ae3SPaolo Bonzini * Optimization: for pte sync, if spte was writable the hash 3066c50d8ae3SPaolo Bonzini * lookup is unnecessary (and expensive). Write protection 3067c50d8ae3SPaolo Bonzini * is responsibility of mmu_get_page / kvm_sync_page. 3068c50d8ae3SPaolo Bonzini * Same reasoning can be applied to dirty page accounting. 3069c50d8ae3SPaolo Bonzini */ 3070799a4190SBen Gardon if (!can_unsync && is_writable_pte(old_spte)) 3071799a4190SBen Gardon goto out; 3072c50d8ae3SPaolo Bonzini 3073c50d8ae3SPaolo Bonzini if (mmu_need_write_protect(vcpu, gfn, can_unsync)) { 3074c50d8ae3SPaolo Bonzini pgprintk("%s: found shadow page for %llx, marking ro\n", 3075c50d8ae3SPaolo Bonzini __func__, gfn); 3076c50d8ae3SPaolo Bonzini ret |= SET_SPTE_WRITE_PROTECTED_PT; 3077c50d8ae3SPaolo Bonzini pte_access &= ~ACC_WRITE_MASK; 3078c50d8ae3SPaolo Bonzini spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE); 3079c50d8ae3SPaolo Bonzini } 3080c50d8ae3SPaolo Bonzini } 3081c50d8ae3SPaolo Bonzini 3082799a4190SBen Gardon if (pte_access & ACC_WRITE_MASK) 3083c50d8ae3SPaolo Bonzini spte |= spte_shadow_dirty_mask(spte); 3084c50d8ae3SPaolo Bonzini 3085c50d8ae3SPaolo Bonzini if (speculative) 3086c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 3087c50d8ae3SPaolo Bonzini 3088799a4190SBen Gardon out: 3089799a4190SBen Gardon *new_spte = spte; 3090799a4190SBen Gardon return ret; 3091799a4190SBen Gardon } 3092799a4190SBen Gardon 3093799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 3094799a4190SBen Gardon unsigned int pte_access, int level, 3095799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 3096799a4190SBen Gardon bool can_unsync, bool host_writable) 3097799a4190SBen Gardon { 3098799a4190SBen Gardon u64 spte; 3099799a4190SBen Gardon struct kvm_mmu_page *sp; 3100799a4190SBen Gardon int ret; 3101799a4190SBen Gardon 3102799a4190SBen Gardon if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access)) 3103799a4190SBen Gardon return 0; 3104799a4190SBen Gardon 3105799a4190SBen Gardon sp = sptep_to_sp(sptep); 3106799a4190SBen Gardon 3107799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 3108799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 3109799a4190SBen Gardon 3110799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 3111799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 3112799a4190SBen Gardon 311312703759SSean Christopherson if (*sptep == spte) 311412703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 311512703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 3116c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 3117c50d8ae3SPaolo Bonzini return ret; 3118c50d8ae3SPaolo Bonzini } 3119c50d8ae3SPaolo Bonzini 31200a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 3121e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 31220a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 31230a2b64c5SBen Gardon bool host_writable) 3124c50d8ae3SPaolo Bonzini { 3125c50d8ae3SPaolo Bonzini int was_rmapped = 0; 3126c50d8ae3SPaolo Bonzini int rmap_count; 3127c50d8ae3SPaolo Bonzini int set_spte_ret; 3128c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 3129c50d8ae3SPaolo Bonzini bool flush = false; 3130c50d8ae3SPaolo Bonzini 3131c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 3132c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 3133c50d8ae3SPaolo Bonzini 3134c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 3135c50d8ae3SPaolo Bonzini /* 3136c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 3137c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 3138c50d8ae3SPaolo Bonzini */ 31393bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 3140c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 3141c50d8ae3SPaolo Bonzini u64 pte = *sptep; 3142c50d8ae3SPaolo Bonzini 3143e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 3144c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 3145c50d8ae3SPaolo Bonzini flush = true; 3146c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 3147c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 3148c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 3149c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 3150c50d8ae3SPaolo Bonzini flush = true; 3151c50d8ae3SPaolo Bonzini } else 3152c50d8ae3SPaolo Bonzini was_rmapped = 1; 3153c50d8ae3SPaolo Bonzini } 3154c50d8ae3SPaolo Bonzini 3155c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 3156c50d8ae3SPaolo Bonzini speculative, true, host_writable); 3157c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 3158c50d8ae3SPaolo Bonzini if (write_fault) 3159c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 31608c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 3161c50d8ae3SPaolo Bonzini } 3162c50d8ae3SPaolo Bonzini 3163c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 3164c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 3165c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 3166c50d8ae3SPaolo Bonzini 3167c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) 3168c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 3169c50d8ae3SPaolo Bonzini 317012703759SSean Christopherson /* 317112703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 317212703759SSean Christopherson * are identical, and emulation is not required. 317312703759SSean Christopherson */ 317412703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 317512703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 317612703759SSean Christopherson return RET_PF_SPURIOUS; 317712703759SSean Christopherson } 317812703759SSean Christopherson 3179c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 3180c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 3181c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 3182c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 3183c50d8ae3SPaolo Bonzini 3184c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 3185c50d8ae3SPaolo Bonzini if (!was_rmapped) { 3186c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 3187c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 3188c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 3189c50d8ae3SPaolo Bonzini } 3190c50d8ae3SPaolo Bonzini } 3191c50d8ae3SPaolo Bonzini 3192c50d8ae3SPaolo Bonzini return ret; 3193c50d8ae3SPaolo Bonzini } 3194c50d8ae3SPaolo Bonzini 3195c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 3196c50d8ae3SPaolo Bonzini bool no_dirty_log) 3197c50d8ae3SPaolo Bonzini { 3198c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 3199c50d8ae3SPaolo Bonzini 3200c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 3201c50d8ae3SPaolo Bonzini if (!slot) 3202c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 3203c50d8ae3SPaolo Bonzini 3204c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 3205c50d8ae3SPaolo Bonzini } 3206c50d8ae3SPaolo Bonzini 3207c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 3208c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 3209c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 3210c50d8ae3SPaolo Bonzini { 3211c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 3212c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 32130a2b64c5SBen Gardon unsigned int access = sp->role.access; 3214c50d8ae3SPaolo Bonzini int i, ret; 3215c50d8ae3SPaolo Bonzini gfn_t gfn; 3216c50d8ae3SPaolo Bonzini 3217c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 3218c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 3219c50d8ae3SPaolo Bonzini if (!slot) 3220c50d8ae3SPaolo Bonzini return -1; 3221c50d8ae3SPaolo Bonzini 3222c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 3223c50d8ae3SPaolo Bonzini if (ret <= 0) 3224c50d8ae3SPaolo Bonzini return -1; 3225c50d8ae3SPaolo Bonzini 3226c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 3227e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 3228c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 3229c50d8ae3SPaolo Bonzini put_page(pages[i]); 3230c50d8ae3SPaolo Bonzini } 3231c50d8ae3SPaolo Bonzini 3232c50d8ae3SPaolo Bonzini return 0; 3233c50d8ae3SPaolo Bonzini } 3234c50d8ae3SPaolo Bonzini 3235c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 3236c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 3237c50d8ae3SPaolo Bonzini { 3238c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 3239c50d8ae3SPaolo Bonzini int i; 3240c50d8ae3SPaolo Bonzini 3241c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3242c50d8ae3SPaolo Bonzini 3243c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 3244c50d8ae3SPaolo Bonzini spte = sp->spt + i; 3245c50d8ae3SPaolo Bonzini 3246c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 3247c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 3248c50d8ae3SPaolo Bonzini if (!start) 3249c50d8ae3SPaolo Bonzini continue; 3250c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 3251c50d8ae3SPaolo Bonzini break; 3252c50d8ae3SPaolo Bonzini start = NULL; 3253c50d8ae3SPaolo Bonzini } else if (!start) 3254c50d8ae3SPaolo Bonzini start = spte; 3255c50d8ae3SPaolo Bonzini } 3256c50d8ae3SPaolo Bonzini } 3257c50d8ae3SPaolo Bonzini 3258c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 3259c50d8ae3SPaolo Bonzini { 3260c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3261c50d8ae3SPaolo Bonzini 326257354682SSean Christopherson sp = sptep_to_sp(sptep); 3263c50d8ae3SPaolo Bonzini 3264c50d8ae3SPaolo Bonzini /* 3265c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 3266c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 3267c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 3268c50d8ae3SPaolo Bonzini */ 3269c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 3270c50d8ae3SPaolo Bonzini return; 3271c50d8ae3SPaolo Bonzini 32723bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3273c50d8ae3SPaolo Bonzini return; 3274c50d8ae3SPaolo Bonzini 3275c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 3276c50d8ae3SPaolo Bonzini } 3277c50d8ae3SPaolo Bonzini 3278db543216SSean Christopherson static int host_pfn_mapping_level(struct kvm_vcpu *vcpu, gfn_t gfn, 3279293e306eSSean Christopherson kvm_pfn_t pfn, struct kvm_memory_slot *slot) 3280db543216SSean Christopherson { 3281db543216SSean Christopherson unsigned long hva; 3282db543216SSean Christopherson pte_t *pte; 3283db543216SSean Christopherson int level; 3284db543216SSean Christopherson 3285e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 32863bae0459SSean Christopherson return PG_LEVEL_4K; 3287db543216SSean Christopherson 3288293e306eSSean Christopherson /* 3289293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 3290293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 3291293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 3292293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 3293293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 3294293e306eSSean Christopherson * read-only memslot. 3295293e306eSSean Christopherson */ 3296db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 3297db543216SSean Christopherson 3298db543216SSean Christopherson pte = lookup_address_in_mm(vcpu->kvm->mm, hva, &level); 3299db543216SSean Christopherson if (unlikely(!pte)) 33003bae0459SSean Christopherson return PG_LEVEL_4K; 3301db543216SSean Christopherson 3302db543216SSean Christopherson return level; 3303db543216SSean Christopherson } 3304db543216SSean Christopherson 330583f06fa7SSean Christopherson static int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 33063cf06612SSean Christopherson int max_level, kvm_pfn_t *pfnp, 33073cf06612SSean Christopherson bool huge_page_disallowed, int *req_level) 33080885904dSSean Christopherson { 3309293e306eSSean Christopherson struct kvm_memory_slot *slot; 33102c0629f4SSean Christopherson struct kvm_lpage_info *linfo; 33110885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 331217eff019SSean Christopherson kvm_pfn_t mask; 331383f06fa7SSean Christopherson int level; 33140885904dSSean Christopherson 33153cf06612SSean Christopherson *req_level = PG_LEVEL_4K; 33163cf06612SSean Christopherson 33173bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 33183bae0459SSean Christopherson return PG_LEVEL_4K; 331917eff019SSean Christopherson 3320e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 33213bae0459SSean Christopherson return PG_LEVEL_4K; 332217eff019SSean Christopherson 3323293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 3324293e306eSSean Christopherson if (!slot) 33253bae0459SSean Christopherson return PG_LEVEL_4K; 3326293e306eSSean Christopherson 33271d92d2e8SSean Christopherson max_level = min(max_level, max_huge_page_level); 33283bae0459SSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 33292c0629f4SSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 33302c0629f4SSean Christopherson if (!linfo->disallow_lpage) 3331293e306eSSean Christopherson break; 3332293e306eSSean Christopherson } 3333293e306eSSean Christopherson 33343bae0459SSean Christopherson if (max_level == PG_LEVEL_4K) 33353bae0459SSean Christopherson return PG_LEVEL_4K; 3336293e306eSSean Christopherson 3337293e306eSSean Christopherson level = host_pfn_mapping_level(vcpu, gfn, pfn, slot); 33383bae0459SSean Christopherson if (level == PG_LEVEL_4K) 333983f06fa7SSean Christopherson return level; 334017eff019SSean Christopherson 33413cf06612SSean Christopherson *req_level = level = min(level, max_level); 33423cf06612SSean Christopherson 33433cf06612SSean Christopherson /* 33443cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 33453cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 33463cf06612SSean Christopherson */ 33473cf06612SSean Christopherson if (huge_page_disallowed) 33483cf06612SSean Christopherson return PG_LEVEL_4K; 33494cd071d1SSean Christopherson 33500885904dSSean Christopherson /* 33514cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 33524cd071d1SSean Christopherson * the pmd can't be split from under us. 33530885904dSSean Christopherson */ 33540885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 33550885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 33564cd071d1SSean Christopherson *pfnp = pfn & ~mask; 335783f06fa7SSean Christopherson 335883f06fa7SSean Christopherson return level; 33590885904dSSean Christopherson } 33600885904dSSean Christopherson 3361c50d8ae3SPaolo Bonzini static void disallowed_hugepage_adjust(struct kvm_shadow_walk_iterator it, 3362c50d8ae3SPaolo Bonzini gfn_t gfn, kvm_pfn_t *pfnp, int *levelp) 3363c50d8ae3SPaolo Bonzini { 3364c50d8ae3SPaolo Bonzini int level = *levelp; 3365c50d8ae3SPaolo Bonzini u64 spte = *it.sptep; 3366c50d8ae3SPaolo Bonzini 33673bae0459SSean Christopherson if (it.level == level && level > PG_LEVEL_4K && 3368c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 3369c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 3370c50d8ae3SPaolo Bonzini /* 3371c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 3372c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 3373c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 3374c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 3375c50d8ae3SPaolo Bonzini * the address. 3376c50d8ae3SPaolo Bonzini */ 3377c50d8ae3SPaolo Bonzini u64 page_mask = KVM_PAGES_PER_HPAGE(level) - KVM_PAGES_PER_HPAGE(level - 1); 3378c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 3379c50d8ae3SPaolo Bonzini (*levelp)--; 3380c50d8ae3SPaolo Bonzini } 3381c50d8ae3SPaolo Bonzini } 3382c50d8ae3SPaolo Bonzini 33836c2fd34fSSean Christopherson static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 338483f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 33856c2fd34fSSean Christopherson bool prefault, bool is_tdp) 3386c50d8ae3SPaolo Bonzini { 33876c2fd34fSSean Christopherson bool nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(); 33886c2fd34fSSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 33896c2fd34fSSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 33906c2fd34fSSean Christopherson bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled; 3391c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 3392c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 33933cf06612SSean Christopherson int level, req_level, ret; 3394c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 3395c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 3396c50d8ae3SPaolo Bonzini 33970c7a98e3SSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 3398c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3399c50d8ae3SPaolo Bonzini 34003cf06612SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn, 34013cf06612SSean Christopherson huge_page_disallowed, &req_level); 34024cd071d1SSean Christopherson 3403c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 3404c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 3405c50d8ae3SPaolo Bonzini /* 3406c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 3407c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 3408c50d8ae3SPaolo Bonzini */ 3409dcc70651SSean Christopherson if (nx_huge_page_workaround_enabled) 3410c50d8ae3SPaolo Bonzini disallowed_hugepage_adjust(it, gfn, &pfn, &level); 3411c50d8ae3SPaolo Bonzini 3412c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 3413c50d8ae3SPaolo Bonzini if (it.level == level) 3414c50d8ae3SPaolo Bonzini break; 3415c50d8ae3SPaolo Bonzini 3416c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 3417c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(*it.sptep)) { 3418c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 3419c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 3420c50d8ae3SPaolo Bonzini 3421c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 34225bcaf3e1SSean Christopherson if (is_tdp && huge_page_disallowed && 34235bcaf3e1SSean Christopherson req_level >= it.level) 3424c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 3425c50d8ae3SPaolo Bonzini } 3426c50d8ae3SPaolo Bonzini } 3427c50d8ae3SPaolo Bonzini 3428c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 3429c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 3430c50d8ae3SPaolo Bonzini map_writable); 343112703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 343212703759SSean Christopherson return ret; 343312703759SSean Christopherson 3434c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 3435c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 3436c50d8ae3SPaolo Bonzini return ret; 3437c50d8ae3SPaolo Bonzini } 3438c50d8ae3SPaolo Bonzini 3439c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 3440c50d8ae3SPaolo Bonzini { 3441c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 3442c50d8ae3SPaolo Bonzini } 3443c50d8ae3SPaolo Bonzini 3444c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 3445c50d8ae3SPaolo Bonzini { 3446c50d8ae3SPaolo Bonzini /* 3447c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 3448c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 3449c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 3450c50d8ae3SPaolo Bonzini */ 3451c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 3452c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3453c50d8ae3SPaolo Bonzini 3454c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 3455c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 3456c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3457c50d8ae3SPaolo Bonzini } 3458c50d8ae3SPaolo Bonzini 3459c50d8ae3SPaolo Bonzini return -EFAULT; 3460c50d8ae3SPaolo Bonzini } 3461c50d8ae3SPaolo Bonzini 3462c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 34630a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 34640a2b64c5SBen Gardon int *ret_val) 3465c50d8ae3SPaolo Bonzini { 3466c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 3467c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 3468c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 3469c50d8ae3SPaolo Bonzini return true; 3470c50d8ae3SPaolo Bonzini } 3471c50d8ae3SPaolo Bonzini 3472c50d8ae3SPaolo Bonzini if (unlikely(is_noslot_pfn(pfn))) 3473c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 3474c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 3475c50d8ae3SPaolo Bonzini 3476c50d8ae3SPaolo Bonzini return false; 3477c50d8ae3SPaolo Bonzini } 3478c50d8ae3SPaolo Bonzini 3479c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 3480c50d8ae3SPaolo Bonzini { 3481c50d8ae3SPaolo Bonzini /* 3482c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3483c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3484c50d8ae3SPaolo Bonzini */ 3485c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3486c50d8ae3SPaolo Bonzini return false; 3487c50d8ae3SPaolo Bonzini 3488c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 3489c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 3490c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 3491c50d8ae3SPaolo Bonzini return false; 3492c50d8ae3SPaolo Bonzini 3493c50d8ae3SPaolo Bonzini /* 3494c50d8ae3SPaolo Bonzini * #PF can be fast if: 3495c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3496c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3497c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3498c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3499c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3500c50d8ae3SPaolo Bonzini * 3501c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3502c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3503c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3504c50d8ae3SPaolo Bonzini * accesses to a present page. 3505c50d8ae3SPaolo Bonzini */ 3506c50d8ae3SPaolo Bonzini 3507c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 3508c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 3509c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 3510c50d8ae3SPaolo Bonzini } 3511c50d8ae3SPaolo Bonzini 3512c50d8ae3SPaolo Bonzini /* 3513c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3514c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3515c50d8ae3SPaolo Bonzini */ 3516c50d8ae3SPaolo Bonzini static bool 3517c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 3518c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3519c50d8ae3SPaolo Bonzini { 3520c50d8ae3SPaolo Bonzini gfn_t gfn; 3521c50d8ae3SPaolo Bonzini 3522c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3523c50d8ae3SPaolo Bonzini 3524c50d8ae3SPaolo Bonzini /* 3525c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3526c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3527c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3528c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3529c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3530c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3531c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3532c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3533c50d8ae3SPaolo Bonzini * 3534c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3535c50d8ae3SPaolo Bonzini */ 3536c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3537c50d8ae3SPaolo Bonzini return false; 3538c50d8ae3SPaolo Bonzini 3539c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3540c50d8ae3SPaolo Bonzini /* 3541c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3542c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3543c50d8ae3SPaolo Bonzini */ 3544c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3545c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3546c50d8ae3SPaolo Bonzini } 3547c50d8ae3SPaolo Bonzini 3548c50d8ae3SPaolo Bonzini return true; 3549c50d8ae3SPaolo Bonzini } 3550c50d8ae3SPaolo Bonzini 3551c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3552c50d8ae3SPaolo Bonzini { 3553c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3554c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3555c50d8ae3SPaolo Bonzini 3556c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3557c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3558c50d8ae3SPaolo Bonzini 3559c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3560c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3561c50d8ae3SPaolo Bonzini } 3562c50d8ae3SPaolo Bonzini 3563c50d8ae3SPaolo Bonzini /* 3564c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3565c50d8ae3SPaolo Bonzini */ 3566c4371c2aSSean Christopherson static int fast_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 3567c50d8ae3SPaolo Bonzini u32 error_code) 3568c50d8ae3SPaolo Bonzini { 3569c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3570c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3571c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3572c50d8ae3SPaolo Bonzini u64 spte = 0ull; 3573c50d8ae3SPaolo Bonzini uint retry_count = 0; 3574c50d8ae3SPaolo Bonzini 3575c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3576c4371c2aSSean Christopherson return ret; 3577c50d8ae3SPaolo Bonzini 3578c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3579c50d8ae3SPaolo Bonzini 3580c50d8ae3SPaolo Bonzini do { 3581c50d8ae3SPaolo Bonzini u64 new_spte; 3582c50d8ae3SPaolo Bonzini 3583736c291cSSean Christopherson for_each_shadow_entry_lockless(vcpu, cr2_or_gpa, iterator, spte) 3584f9fa2509SSean Christopherson if (!is_shadow_present_pte(spte)) 3585c50d8ae3SPaolo Bonzini break; 3586c50d8ae3SPaolo Bonzini 358757354682SSean Christopherson sp = sptep_to_sp(iterator.sptep); 3588c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3589c50d8ae3SPaolo Bonzini break; 3590c50d8ae3SPaolo Bonzini 3591c50d8ae3SPaolo Bonzini /* 3592c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3593c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3594c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3595c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3596c50d8ae3SPaolo Bonzini * current CPU took the fault. 3597c50d8ae3SPaolo Bonzini * 3598c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3599c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3600c50d8ae3SPaolo Bonzini */ 3601c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3602c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3603c50d8ae3SPaolo Bonzini break; 3604c50d8ae3SPaolo Bonzini } 3605c50d8ae3SPaolo Bonzini 3606c50d8ae3SPaolo Bonzini new_spte = spte; 3607c50d8ae3SPaolo Bonzini 3608c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3609c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3610c50d8ae3SPaolo Bonzini 3611c50d8ae3SPaolo Bonzini /* 3612c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3613c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3614c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3615c50d8ae3SPaolo Bonzini */ 3616c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3617e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3618c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3619c50d8ae3SPaolo Bonzini 3620c50d8ae3SPaolo Bonzini /* 3621c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3622c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3623c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3624c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3625c50d8ae3SPaolo Bonzini * 3626c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3627c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3628c50d8ae3SPaolo Bonzini * 3629c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3630c50d8ae3SPaolo Bonzini */ 36313bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3632c50d8ae3SPaolo Bonzini break; 3633c50d8ae3SPaolo Bonzini } 3634c50d8ae3SPaolo Bonzini 3635c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3636c50d8ae3SPaolo Bonzini if (new_spte == spte || 3637c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3638c50d8ae3SPaolo Bonzini break; 3639c50d8ae3SPaolo Bonzini 3640c50d8ae3SPaolo Bonzini /* 3641c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3642c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 36433ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3644c50d8ae3SPaolo Bonzini */ 3645c4371c2aSSean Christopherson if (fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte, 3646c4371c2aSSean Christopherson new_spte)) { 3647c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3648c50d8ae3SPaolo Bonzini break; 3649c4371c2aSSean Christopherson } 3650c50d8ae3SPaolo Bonzini 3651c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3652c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3653c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3654c50d8ae3SPaolo Bonzini break; 3655c50d8ae3SPaolo Bonzini } 3656c50d8ae3SPaolo Bonzini 3657c50d8ae3SPaolo Bonzini } while (true); 3658c50d8ae3SPaolo Bonzini 3659736c291cSSean Christopherson trace_fast_page_fault(vcpu, cr2_or_gpa, error_code, iterator.sptep, 3660c4371c2aSSean Christopherson spte, ret); 3661c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3662c50d8ae3SPaolo Bonzini 3663c4371c2aSSean Christopherson return ret; 3664c50d8ae3SPaolo Bonzini } 3665c50d8ae3SPaolo Bonzini 3666c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3667c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3668c50d8ae3SPaolo Bonzini { 3669c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3670c50d8ae3SPaolo Bonzini 3671c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3672c50d8ae3SPaolo Bonzini return; 3673c50d8ae3SPaolo Bonzini 3674e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 3675c50d8ae3SPaolo Bonzini --sp->root_count; 3676c50d8ae3SPaolo Bonzini if (!sp->root_count && sp->role.invalid) 3677c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3678c50d8ae3SPaolo Bonzini 3679c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3680c50d8ae3SPaolo Bonzini } 3681c50d8ae3SPaolo Bonzini 3682c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3683c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3684c50d8ae3SPaolo Bonzini ulong roots_to_free) 3685c50d8ae3SPaolo Bonzini { 36864d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3687c50d8ae3SPaolo Bonzini int i; 3688c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3689c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3690c50d8ae3SPaolo Bonzini 3691c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3692c50d8ae3SPaolo Bonzini 3693c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3694c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3695c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3696c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3697c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3698c50d8ae3SPaolo Bonzini break; 3699c50d8ae3SPaolo Bonzini 3700c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3701c50d8ae3SPaolo Bonzini return; 3702c50d8ae3SPaolo Bonzini } 3703c50d8ae3SPaolo Bonzini 37044d710de9SSean Christopherson spin_lock(&kvm->mmu_lock); 3705c50d8ae3SPaolo Bonzini 3706c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3707c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 37084d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3709c50d8ae3SPaolo Bonzini &invalid_list); 3710c50d8ae3SPaolo Bonzini 3711c50d8ae3SPaolo Bonzini if (free_active_root) { 3712c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3713c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 37144d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 3715c50d8ae3SPaolo Bonzini } else { 3716c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 3717c50d8ae3SPaolo Bonzini if (mmu->pae_root[i] != 0) 37184d710de9SSean Christopherson mmu_free_root_page(kvm, 3719c50d8ae3SPaolo Bonzini &mmu->pae_root[i], 3720c50d8ae3SPaolo Bonzini &invalid_list); 3721c50d8ae3SPaolo Bonzini mmu->root_hpa = INVALID_PAGE; 3722c50d8ae3SPaolo Bonzini } 3723be01e8e2SSean Christopherson mmu->root_pgd = 0; 3724c50d8ae3SPaolo Bonzini } 3725c50d8ae3SPaolo Bonzini 37264d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 37274d710de9SSean Christopherson spin_unlock(&kvm->mmu_lock); 3728c50d8ae3SPaolo Bonzini } 3729c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3730c50d8ae3SPaolo Bonzini 3731c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3732c50d8ae3SPaolo Bonzini { 3733c50d8ae3SPaolo Bonzini int ret = 0; 3734c50d8ae3SPaolo Bonzini 3735995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3736c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3737c50d8ae3SPaolo Bonzini ret = 1; 3738c50d8ae3SPaolo Bonzini } 3739c50d8ae3SPaolo Bonzini 3740c50d8ae3SPaolo Bonzini return ret; 3741c50d8ae3SPaolo Bonzini } 3742c50d8ae3SPaolo Bonzini 37438123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 37448123f265SSean Christopherson u8 level, bool direct) 3745c50d8ae3SPaolo Bonzini { 3746c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 37478123f265SSean Christopherson 37488123f265SSean Christopherson spin_lock(&vcpu->kvm->mmu_lock); 37498123f265SSean Christopherson 37508123f265SSean Christopherson if (make_mmu_pages_available(vcpu)) { 37518123f265SSean Christopherson spin_unlock(&vcpu->kvm->mmu_lock); 37528123f265SSean Christopherson return INVALID_PAGE; 37538123f265SSean Christopherson } 37548123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 37558123f265SSean Christopherson ++sp->root_count; 37568123f265SSean Christopherson 37578123f265SSean Christopherson spin_unlock(&vcpu->kvm->mmu_lock); 37588123f265SSean Christopherson return __pa(sp->spt); 37598123f265SSean Christopherson } 37608123f265SSean Christopherson 37618123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 37628123f265SSean Christopherson { 37638123f265SSean Christopherson u8 shadow_root_level = vcpu->arch.mmu->shadow_root_level; 37648123f265SSean Christopherson hpa_t root; 3765c50d8ae3SPaolo Bonzini unsigned i; 3766c50d8ae3SPaolo Bonzini 37678123f265SSean Christopherson if (shadow_root_level >= PT64_ROOT_4LEVEL) { 37688123f265SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 37698123f265SSean Christopherson if (!VALID_PAGE(root)) 3770c50d8ae3SPaolo Bonzini return -ENOSPC; 37718123f265SSean Christopherson vcpu->arch.mmu->root_hpa = root; 37728123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 3773c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 37748123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); 3775c50d8ae3SPaolo Bonzini 37768123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 37778123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 37788123f265SSean Christopherson if (!VALID_PAGE(root)) 3779c50d8ae3SPaolo Bonzini return -ENOSPC; 3780c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = root | PT_PRESENT_MASK; 3781c50d8ae3SPaolo Bonzini } 3782c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); 3783c50d8ae3SPaolo Bonzini } else 3784c50d8ae3SPaolo Bonzini BUG(); 37853651c7fcSSean Christopherson 3786be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3787be01e8e2SSean Christopherson vcpu->arch.mmu->root_pgd = 0; 3788c50d8ae3SPaolo Bonzini 3789c50d8ae3SPaolo Bonzini return 0; 3790c50d8ae3SPaolo Bonzini } 3791c50d8ae3SPaolo Bonzini 3792c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3793c50d8ae3SPaolo Bonzini { 3794c50d8ae3SPaolo Bonzini u64 pdptr, pm_mask; 3795be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 37968123f265SSean Christopherson hpa_t root; 3797c50d8ae3SPaolo Bonzini int i; 3798c50d8ae3SPaolo Bonzini 3799be01e8e2SSean Christopherson root_pgd = vcpu->arch.mmu->get_guest_pgd(vcpu); 3800be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3801c50d8ae3SPaolo Bonzini 3802c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3803c50d8ae3SPaolo Bonzini return 1; 3804c50d8ae3SPaolo Bonzini 3805c50d8ae3SPaolo Bonzini /* 3806c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3807c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3808c50d8ae3SPaolo Bonzini */ 3809c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 38108123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->root_hpa)); 3811c50d8ae3SPaolo Bonzini 38128123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 38138123f265SSean Christopherson vcpu->arch.mmu->shadow_root_level, false); 38148123f265SSean Christopherson if (!VALID_PAGE(root)) 3815c50d8ae3SPaolo Bonzini return -ENOSPC; 3816c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = root; 3817be01e8e2SSean Christopherson goto set_root_pgd; 3818c50d8ae3SPaolo Bonzini } 3819c50d8ae3SPaolo Bonzini 3820c50d8ae3SPaolo Bonzini /* 3821c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3822c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3823c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3824c50d8ae3SPaolo Bonzini */ 3825c50d8ae3SPaolo Bonzini pm_mask = PT_PRESENT_MASK; 3826c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) 3827c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3828c50d8ae3SPaolo Bonzini 3829c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 38308123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); 3831c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level == PT32E_ROOT_LEVEL) { 3832c50d8ae3SPaolo Bonzini pdptr = vcpu->arch.mmu->get_pdptr(vcpu, i); 3833c50d8ae3SPaolo Bonzini if (!(pdptr & PT_PRESENT_MASK)) { 3834c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = 0; 3835c50d8ae3SPaolo Bonzini continue; 3836c50d8ae3SPaolo Bonzini } 3837c50d8ae3SPaolo Bonzini root_gfn = pdptr >> PAGE_SHIFT; 3838c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3839c50d8ae3SPaolo Bonzini return 1; 3840c50d8ae3SPaolo Bonzini } 3841c50d8ae3SPaolo Bonzini 38428123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 38438123f265SSean Christopherson PT32_ROOT_LEVEL, false); 38448123f265SSean Christopherson if (!VALID_PAGE(root)) 38458123f265SSean Christopherson return -ENOSPC; 3846c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = root | pm_mask; 3847c50d8ae3SPaolo Bonzini } 3848c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); 3849c50d8ae3SPaolo Bonzini 3850c50d8ae3SPaolo Bonzini /* 3851c50d8ae3SPaolo Bonzini * If we shadow a 32 bit page table with a long mode page 3852c50d8ae3SPaolo Bonzini * table we enter this path. 3853c50d8ae3SPaolo Bonzini */ 3854c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3855c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->lm_root == NULL) { 3856c50d8ae3SPaolo Bonzini /* 3857c50d8ae3SPaolo Bonzini * The additional page necessary for this is only 3858c50d8ae3SPaolo Bonzini * allocated on demand. 3859c50d8ae3SPaolo Bonzini */ 3860c50d8ae3SPaolo Bonzini 3861c50d8ae3SPaolo Bonzini u64 *lm_root; 3862c50d8ae3SPaolo Bonzini 3863c50d8ae3SPaolo Bonzini lm_root = (void*)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3864c50d8ae3SPaolo Bonzini if (lm_root == NULL) 3865c50d8ae3SPaolo Bonzini return 1; 3866c50d8ae3SPaolo Bonzini 3867c50d8ae3SPaolo Bonzini lm_root[0] = __pa(vcpu->arch.mmu->pae_root) | pm_mask; 3868c50d8ae3SPaolo Bonzini 3869c50d8ae3SPaolo Bonzini vcpu->arch.mmu->lm_root = lm_root; 3870c50d8ae3SPaolo Bonzini } 3871c50d8ae3SPaolo Bonzini 3872c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->lm_root); 3873c50d8ae3SPaolo Bonzini } 3874c50d8ae3SPaolo Bonzini 3875be01e8e2SSean Christopherson set_root_pgd: 3876be01e8e2SSean Christopherson vcpu->arch.mmu->root_pgd = root_pgd; 3877c50d8ae3SPaolo Bonzini 3878c50d8ae3SPaolo Bonzini return 0; 3879c50d8ae3SPaolo Bonzini } 3880c50d8ae3SPaolo Bonzini 3881c50d8ae3SPaolo Bonzini static int mmu_alloc_roots(struct kvm_vcpu *vcpu) 3882c50d8ae3SPaolo Bonzini { 3883c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3884c50d8ae3SPaolo Bonzini return mmu_alloc_direct_roots(vcpu); 3885c50d8ae3SPaolo Bonzini else 3886c50d8ae3SPaolo Bonzini return mmu_alloc_shadow_roots(vcpu); 3887c50d8ae3SPaolo Bonzini } 3888c50d8ae3SPaolo Bonzini 3889c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3890c50d8ae3SPaolo Bonzini { 3891c50d8ae3SPaolo Bonzini int i; 3892c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3893c50d8ae3SPaolo Bonzini 3894c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3895c50d8ae3SPaolo Bonzini return; 3896c50d8ae3SPaolo Bonzini 3897c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3898c50d8ae3SPaolo Bonzini return; 3899c50d8ae3SPaolo Bonzini 3900c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3901c50d8ae3SPaolo Bonzini 3902c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3903c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3904e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3905c50d8ae3SPaolo Bonzini 3906c50d8ae3SPaolo Bonzini /* 3907c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3908c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3909c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3910c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3911c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3912c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 3913c50d8ae3SPaolo Bonzini * mmu_need_write_protect() describe what could go wrong if this 3914c50d8ae3SPaolo Bonzini * requirement isn't satisfied. 3915c50d8ae3SPaolo Bonzini */ 3916c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3917c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3918c50d8ae3SPaolo Bonzini return; 3919c50d8ae3SPaolo Bonzini 3920c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 3921c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3922c50d8ae3SPaolo Bonzini 3923c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3924c50d8ae3SPaolo Bonzini 3925c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3926c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 3927c50d8ae3SPaolo Bonzini return; 3928c50d8ae3SPaolo Bonzini } 3929c50d8ae3SPaolo Bonzini 3930c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 3931c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3932c50d8ae3SPaolo Bonzini 3933c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3934c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3935c50d8ae3SPaolo Bonzini 3936c50d8ae3SPaolo Bonzini if (root && VALID_PAGE(root)) { 3937c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3938e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3939c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3940c50d8ae3SPaolo Bonzini } 3941c50d8ae3SPaolo Bonzini } 3942c50d8ae3SPaolo Bonzini 3943c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3944c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 3945c50d8ae3SPaolo Bonzini } 3946c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots); 3947c50d8ae3SPaolo Bonzini 3948736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3949c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3950c50d8ae3SPaolo Bonzini { 3951c50d8ae3SPaolo Bonzini if (exception) 3952c50d8ae3SPaolo Bonzini exception->error_code = 0; 3953c50d8ae3SPaolo Bonzini return vaddr; 3954c50d8ae3SPaolo Bonzini } 3955c50d8ae3SPaolo Bonzini 3956736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3957c50d8ae3SPaolo Bonzini u32 access, 3958c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3959c50d8ae3SPaolo Bonzini { 3960c50d8ae3SPaolo Bonzini if (exception) 3961c50d8ae3SPaolo Bonzini exception->error_code = 0; 3962c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3963c50d8ae3SPaolo Bonzini } 3964c50d8ae3SPaolo Bonzini 3965c50d8ae3SPaolo Bonzini static bool 3966c50d8ae3SPaolo Bonzini __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) 3967c50d8ae3SPaolo Bonzini { 3968b5c3c1b3SSean Christopherson int bit7 = (pte >> 7) & 1; 3969c50d8ae3SPaolo Bonzini 3970b5c3c1b3SSean Christopherson return pte & rsvd_check->rsvd_bits_mask[bit7][level-1]; 3971c50d8ae3SPaolo Bonzini } 3972c50d8ae3SPaolo Bonzini 3973b5c3c1b3SSean Christopherson static bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, u64 pte) 3974c50d8ae3SPaolo Bonzini { 3975b5c3c1b3SSean Christopherson return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f); 3976c50d8ae3SPaolo Bonzini } 3977c50d8ae3SPaolo Bonzini 3978c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3979c50d8ae3SPaolo Bonzini { 3980c50d8ae3SPaolo Bonzini /* 3981c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3982c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3983c50d8ae3SPaolo Bonzini */ 3984c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3985c50d8ae3SPaolo Bonzini return false; 3986c50d8ae3SPaolo Bonzini 3987c50d8ae3SPaolo Bonzini if (direct) 3988c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3989c50d8ae3SPaolo Bonzini 3990c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3991c50d8ae3SPaolo Bonzini } 3992c50d8ae3SPaolo Bonzini 3993c50d8ae3SPaolo Bonzini /* return true if reserved bit is detected on spte. */ 3994c50d8ae3SPaolo Bonzini static bool 3995c50d8ae3SPaolo Bonzini walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 3996c50d8ae3SPaolo Bonzini { 3997c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3998c50d8ae3SPaolo Bonzini u64 sptes[PT64_ROOT_MAX_LEVEL], spte = 0ull; 3999b5c3c1b3SSean Christopherson struct rsvd_bits_validate *rsvd_check; 4000c50d8ae3SPaolo Bonzini int root, leaf; 4001c50d8ae3SPaolo Bonzini bool reserved = false; 4002c50d8ae3SPaolo Bonzini 4003b5c3c1b3SSean Christopherson rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 4004c50d8ae3SPaolo Bonzini 4005c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 4006c50d8ae3SPaolo Bonzini 4007c50d8ae3SPaolo Bonzini for (shadow_walk_init(&iterator, vcpu, addr), 4008c50d8ae3SPaolo Bonzini leaf = root = iterator.level; 4009c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 4010c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 4011c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 4012c50d8ae3SPaolo Bonzini 4013c50d8ae3SPaolo Bonzini sptes[leaf - 1] = spte; 4014c50d8ae3SPaolo Bonzini leaf--; 4015c50d8ae3SPaolo Bonzini 4016c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 4017c50d8ae3SPaolo Bonzini break; 4018c50d8ae3SPaolo Bonzini 4019b5c3c1b3SSean Christopherson /* 4020b5c3c1b3SSean Christopherson * Use a bitwise-OR instead of a logical-OR to aggregate the 4021b5c3c1b3SSean Christopherson * reserved bit and EPT's invalid memtype/XWR checks to avoid 4022b5c3c1b3SSean Christopherson * adding a Jcc in the loop. 4023b5c3c1b3SSean Christopherson */ 4024b5c3c1b3SSean Christopherson reserved |= __is_bad_mt_xwr(rsvd_check, spte) | 4025b5c3c1b3SSean Christopherson __is_rsvd_bits_set(rsvd_check, spte, iterator.level); 4026c50d8ae3SPaolo Bonzini } 4027c50d8ae3SPaolo Bonzini 4028c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 4029c50d8ae3SPaolo Bonzini 4030c50d8ae3SPaolo Bonzini if (reserved) { 4031c50d8ae3SPaolo Bonzini pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n", 4032c50d8ae3SPaolo Bonzini __func__, addr); 4033c50d8ae3SPaolo Bonzini while (root > leaf) { 4034c50d8ae3SPaolo Bonzini pr_err("------ spte 0x%llx level %d.\n", 4035c50d8ae3SPaolo Bonzini sptes[root - 1], root); 4036c50d8ae3SPaolo Bonzini root--; 4037c50d8ae3SPaolo Bonzini } 4038c50d8ae3SPaolo Bonzini } 4039ddce6208SSean Christopherson 4040c50d8ae3SPaolo Bonzini *sptep = spte; 4041c50d8ae3SPaolo Bonzini return reserved; 4042c50d8ae3SPaolo Bonzini } 4043c50d8ae3SPaolo Bonzini 4044c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 4045c50d8ae3SPaolo Bonzini { 4046c50d8ae3SPaolo Bonzini u64 spte; 4047c50d8ae3SPaolo Bonzini bool reserved; 4048c50d8ae3SPaolo Bonzini 4049c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 4050c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4051c50d8ae3SPaolo Bonzini 4052c50d8ae3SPaolo Bonzini reserved = walk_shadow_page_get_mmio_spte(vcpu, addr, &spte); 4053c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 4054c50d8ae3SPaolo Bonzini return -EINVAL; 4055c50d8ae3SPaolo Bonzini 4056c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 4057c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 40580a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 4059c50d8ae3SPaolo Bonzini 4060c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 4061c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 4062c50d8ae3SPaolo Bonzini 4063c50d8ae3SPaolo Bonzini if (direct) 4064c50d8ae3SPaolo Bonzini addr = 0; 4065c50d8ae3SPaolo Bonzini 4066c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 4067c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 4068c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4069c50d8ae3SPaolo Bonzini } 4070c50d8ae3SPaolo Bonzini 4071c50d8ae3SPaolo Bonzini /* 4072c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 4073c50d8ae3SPaolo Bonzini * the address. 4074c50d8ae3SPaolo Bonzini */ 4075c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 4076c50d8ae3SPaolo Bonzini } 4077c50d8ae3SPaolo Bonzini 4078c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 4079c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 4080c50d8ae3SPaolo Bonzini { 4081c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 4082c50d8ae3SPaolo Bonzini return false; 4083c50d8ae3SPaolo Bonzini 4084c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 4085c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 4086c50d8ae3SPaolo Bonzini return false; 4087c50d8ae3SPaolo Bonzini 4088c50d8ae3SPaolo Bonzini /* 4089c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 4090c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 4091c50d8ae3SPaolo Bonzini */ 4092c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 4093c50d8ae3SPaolo Bonzini return true; 4094c50d8ae3SPaolo Bonzini 4095c50d8ae3SPaolo Bonzini return false; 4096c50d8ae3SPaolo Bonzini } 4097c50d8ae3SPaolo Bonzini 4098c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 4099c50d8ae3SPaolo Bonzini { 4100c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 4101c50d8ae3SPaolo Bonzini u64 spte; 4102c50d8ae3SPaolo Bonzini 4103c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 4104c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 4105c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 4106c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 4107c50d8ae3SPaolo Bonzini break; 4108c50d8ae3SPaolo Bonzini } 4109c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 4110c50d8ae3SPaolo Bonzini } 4111c50d8ae3SPaolo Bonzini 4112e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 41139f1a8526SSean Christopherson gfn_t gfn) 4114c50d8ae3SPaolo Bonzini { 4115c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 4116c50d8ae3SPaolo Bonzini 4117c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 4118c50d8ae3SPaolo Bonzini arch.gfn = gfn; 4119c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 4120d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 4121c50d8ae3SPaolo Bonzini 41229f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 41239f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 4124c50d8ae3SPaolo Bonzini } 4125c50d8ae3SPaolo Bonzini 4126c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 41279f1a8526SSean Christopherson gpa_t cr2_or_gpa, kvm_pfn_t *pfn, bool write, 41289f1a8526SSean Christopherson bool *writable) 4129c50d8ae3SPaolo Bonzini { 4130c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 4131c50d8ae3SPaolo Bonzini bool async; 4132c50d8ae3SPaolo Bonzini 4133c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 4134c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 4135c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 4136c583eed6SSean Christopherson *writable = false; 4137c50d8ae3SPaolo Bonzini return false; 4138c50d8ae3SPaolo Bonzini } 4139c50d8ae3SPaolo Bonzini 4140c50d8ae3SPaolo Bonzini async = false; 4141c50d8ae3SPaolo Bonzini *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable); 4142c50d8ae3SPaolo Bonzini if (!async) 4143c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 4144c50d8ae3SPaolo Bonzini 4145c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 41469f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 4147c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 41489f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 4149c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 4150c50d8ae3SPaolo Bonzini return true; 41519f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 4152c50d8ae3SPaolo Bonzini return true; 4153c50d8ae3SPaolo Bonzini } 4154c50d8ae3SPaolo Bonzini 4155c50d8ae3SPaolo Bonzini *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable); 4156c50d8ae3SPaolo Bonzini return false; 4157c50d8ae3SPaolo Bonzini } 4158c50d8ae3SPaolo Bonzini 41590f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 41600f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 4161c50d8ae3SPaolo Bonzini { 4162367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 41630f90e1c1SSean Christopherson bool map_writable; 4164c50d8ae3SPaolo Bonzini 41650f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 41660f90e1c1SSean Christopherson unsigned long mmu_seq; 41670f90e1c1SSean Christopherson kvm_pfn_t pfn; 416883f06fa7SSean Christopherson int r; 4169c50d8ae3SPaolo Bonzini 4170c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 4171c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4172c50d8ae3SPaolo Bonzini 4173c4371c2aSSean Christopherson r = fast_page_fault(vcpu, gpa, error_code); 4174c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 4175c4371c2aSSean Christopherson return r; 417683291445SSean Christopherson 4177378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 4178c50d8ae3SPaolo Bonzini if (r) 4179c50d8ae3SPaolo Bonzini return r; 4180c50d8ae3SPaolo Bonzini 4181367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 4182367fd790SSean Christopherson smp_rmb(); 4183367fd790SSean Christopherson 4184367fd790SSean Christopherson if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable)) 4185367fd790SSean Christopherson return RET_PF_RETRY; 4186367fd790SSean Christopherson 41870f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 4188367fd790SSean Christopherson return r; 4189367fd790SSean Christopherson 4190367fd790SSean Christopherson r = RET_PF_RETRY; 4191367fd790SSean Christopherson spin_lock(&vcpu->kvm->mmu_lock); 4192367fd790SSean Christopherson if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) 4193367fd790SSean Christopherson goto out_unlock; 41947bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 41957bd7ded6SSean Christopherson if (r) 4196367fd790SSean Christopherson goto out_unlock; 41976c2fd34fSSean Christopherson r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, 41986c2fd34fSSean Christopherson prefault, is_tdp); 41990f90e1c1SSean Christopherson 4200367fd790SSean Christopherson out_unlock: 4201367fd790SSean Christopherson spin_unlock(&vcpu->kvm->mmu_lock); 4202367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 4203367fd790SSean Christopherson return r; 4204c50d8ae3SPaolo Bonzini } 4205c50d8ae3SPaolo Bonzini 42060f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 42070f90e1c1SSean Christopherson u32 error_code, bool prefault) 42080f90e1c1SSean Christopherson { 42090f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 42100f90e1c1SSean Christopherson 42110f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 42120f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 42133bae0459SSean Christopherson PG_LEVEL_2M, false); 42140f90e1c1SSean Christopherson } 42150f90e1c1SSean Christopherson 4216c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 4217c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 4218c50d8ae3SPaolo Bonzini { 4219c50d8ae3SPaolo Bonzini int r = 1; 42209ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 4221c50d8ae3SPaolo Bonzini 4222736c291cSSean Christopherson #ifndef CONFIG_X86_64 4223736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 4224736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 4225736c291cSSean Christopherson return -EFAULT; 4226736c291cSSean Christopherson #endif 4227736c291cSSean Christopherson 4228c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 42299ce372b3SVitaly Kuznetsov if (!flags) { 4230c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 4231c50d8ae3SPaolo Bonzini 4232c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 4233c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 4234c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 4235c50d8ae3SPaolo Bonzini insn_len); 42369ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 423768fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 4238c50d8ae3SPaolo Bonzini local_irq_disable(); 42396bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 4240c50d8ae3SPaolo Bonzini local_irq_enable(); 42419ce372b3SVitaly Kuznetsov } else { 42429ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 4243c50d8ae3SPaolo Bonzini } 42449ce372b3SVitaly Kuznetsov 4245c50d8ae3SPaolo Bonzini return r; 4246c50d8ae3SPaolo Bonzini } 4247c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 4248c50d8ae3SPaolo Bonzini 42497a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 4250c50d8ae3SPaolo Bonzini bool prefault) 4251c50d8ae3SPaolo Bonzini { 4252cb9b88c6SSean Christopherson int max_level; 4253c50d8ae3SPaolo Bonzini 4254e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 42553bae0459SSean Christopherson max_level > PG_LEVEL_4K; 4256cb9b88c6SSean Christopherson max_level--) { 4257cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 42580f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 4259c50d8ae3SPaolo Bonzini 4260cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 4261cb9b88c6SSean Christopherson break; 4262c50d8ae3SPaolo Bonzini } 4263c50d8ae3SPaolo Bonzini 42640f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 42650f90e1c1SSean Christopherson max_level, true); 4266c50d8ae3SPaolo Bonzini } 4267c50d8ae3SPaolo Bonzini 4268c50d8ae3SPaolo Bonzini static void nonpaging_init_context(struct kvm_vcpu *vcpu, 4269c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4270c50d8ae3SPaolo Bonzini { 4271c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 4272c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4273c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 42745efac074SPaolo Bonzini context->invlpg = NULL; 4275c50d8ae3SPaolo Bonzini context->update_pte = nonpaging_update_pte; 4276c50d8ae3SPaolo Bonzini context->root_level = 0; 4277c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4278c50d8ae3SPaolo Bonzini context->direct_map = true; 4279c50d8ae3SPaolo Bonzini context->nx = false; 4280c50d8ae3SPaolo Bonzini } 4281c50d8ae3SPaolo Bonzini 4282be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 42830be44352SSean Christopherson union kvm_mmu_page_role role) 42840be44352SSean Christopherson { 4285be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 4286e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 4287e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 42880be44352SSean Christopherson } 42890be44352SSean Christopherson 4290c50d8ae3SPaolo Bonzini /* 4291be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 4292c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 4293c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 4294c50d8ae3SPaolo Bonzini * returned. 4295c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 4296c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4297c50d8ae3SPaolo Bonzini */ 4298be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4299c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4300c50d8ae3SPaolo Bonzini { 4301c50d8ae3SPaolo Bonzini uint i; 4302c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 4303c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4304c50d8ae3SPaolo Bonzini 4305be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 4306c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 4307c50d8ae3SPaolo Bonzini 4308be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 43090be44352SSean Christopherson return true; 43100be44352SSean Christopherson 4311c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4312c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 4313c50d8ae3SPaolo Bonzini 4314be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 4315c50d8ae3SPaolo Bonzini break; 4316c50d8ae3SPaolo Bonzini } 4317c50d8ae3SPaolo Bonzini 4318c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 4319be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 4320c50d8ae3SPaolo Bonzini 4321c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4322c50d8ae3SPaolo Bonzini } 4323c50d8ae3SPaolo Bonzini 4324be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4325b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4326c50d8ae3SPaolo Bonzini { 4327c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4328c50d8ae3SPaolo Bonzini 4329c50d8ae3SPaolo Bonzini /* 4330c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4331c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4332c50d8ae3SPaolo Bonzini * later if necessary. 4333c50d8ae3SPaolo Bonzini */ 4334c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4335b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4336fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 4337c50d8ae3SPaolo Bonzini 4338c50d8ae3SPaolo Bonzini return false; 4339c50d8ae3SPaolo Bonzini } 4340c50d8ae3SPaolo Bonzini 4341be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4342c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role, 43434a632ac6SSean Christopherson bool skip_tlb_flush, bool skip_mmu_sync) 4344c50d8ae3SPaolo Bonzini { 4345be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4346b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4347b869855bSSean Christopherson return; 4348c50d8ae3SPaolo Bonzini } 4349c50d8ae3SPaolo Bonzini 4350c50d8ae3SPaolo Bonzini /* 4351b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4352b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4353b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4354b869855bSSean Christopherson * free the root set here and allocate a new one. 4355b869855bSSean Christopherson */ 4356b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4357b869855bSSean Christopherson 435871fe7013SSean Christopherson if (!skip_mmu_sync || force_flush_and_sync_on_reuse) 4359b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 436071fe7013SSean Christopherson if (!skip_tlb_flush || force_flush_and_sync_on_reuse) 4361b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4362b869855bSSean Christopherson 4363b869855bSSean Christopherson /* 4364b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4365b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4366b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4367b869855bSSean Christopherson * the shadow page tables. 4368c50d8ae3SPaolo Bonzini */ 4369c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4370c50d8ae3SPaolo Bonzini 4371e47c4aeeSSean Christopherson __clear_sp_write_flooding_count(to_shadow_page(vcpu->arch.mmu->root_hpa)); 4372c50d8ae3SPaolo Bonzini } 4373c50d8ae3SPaolo Bonzini 4374be01e8e2SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 43754a632ac6SSean Christopherson bool skip_mmu_sync) 4376c50d8ae3SPaolo Bonzini { 4377be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu), 43784a632ac6SSean Christopherson skip_tlb_flush, skip_mmu_sync); 4379c50d8ae3SPaolo Bonzini } 4380be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4381c50d8ae3SPaolo Bonzini 4382c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4383c50d8ae3SPaolo Bonzini { 4384c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4385c50d8ae3SPaolo Bonzini } 4386c50d8ae3SPaolo Bonzini 4387c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 43880a2b64c5SBen Gardon unsigned int access, int *nr_present) 4389c50d8ae3SPaolo Bonzini { 4390c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4391c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4392c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4393c50d8ae3SPaolo Bonzini return true; 4394c50d8ae3SPaolo Bonzini } 4395c50d8ae3SPaolo Bonzini 4396c50d8ae3SPaolo Bonzini (*nr_present)++; 4397c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4398c50d8ae3SPaolo Bonzini return true; 4399c50d8ae3SPaolo Bonzini } 4400c50d8ae3SPaolo Bonzini 4401c50d8ae3SPaolo Bonzini return false; 4402c50d8ae3SPaolo Bonzini } 4403c50d8ae3SPaolo Bonzini 4404c50d8ae3SPaolo Bonzini static inline bool is_last_gpte(struct kvm_mmu *mmu, 4405c50d8ae3SPaolo Bonzini unsigned level, unsigned gpte) 4406c50d8ae3SPaolo Bonzini { 4407c50d8ae3SPaolo Bonzini /* 4408c50d8ae3SPaolo Bonzini * The RHS has bit 7 set iff level < mmu->last_nonleaf_level. 4409c50d8ae3SPaolo Bonzini * If it is clear, there are no large pages at this level, so clear 4410c50d8ae3SPaolo Bonzini * PT_PAGE_SIZE_MASK in gpte if that is the case. 4411c50d8ae3SPaolo Bonzini */ 4412c50d8ae3SPaolo Bonzini gpte &= level - mmu->last_nonleaf_level; 4413c50d8ae3SPaolo Bonzini 4414c50d8ae3SPaolo Bonzini /* 44153bae0459SSean Christopherson * PG_LEVEL_4K always terminates. The RHS has bit 7 set 44163bae0459SSean Christopherson * iff level <= PG_LEVEL_4K, which for our purpose means 44173bae0459SSean Christopherson * level == PG_LEVEL_4K; set PT_PAGE_SIZE_MASK in gpte then. 4418c50d8ae3SPaolo Bonzini */ 44193bae0459SSean Christopherson gpte |= level - PG_LEVEL_4K - 1; 4420c50d8ae3SPaolo Bonzini 4421c50d8ae3SPaolo Bonzini return gpte & PT_PAGE_SIZE_MASK; 4422c50d8ae3SPaolo Bonzini } 4423c50d8ae3SPaolo Bonzini 4424c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4425c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4426c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4427c50d8ae3SPaolo Bonzini #undef PTTYPE 4428c50d8ae3SPaolo Bonzini 4429c50d8ae3SPaolo Bonzini #define PTTYPE 64 4430c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4431c50d8ae3SPaolo Bonzini #undef PTTYPE 4432c50d8ae3SPaolo Bonzini 4433c50d8ae3SPaolo Bonzini #define PTTYPE 32 4434c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4435c50d8ae3SPaolo Bonzini #undef PTTYPE 4436c50d8ae3SPaolo Bonzini 4437c50d8ae3SPaolo Bonzini static void 4438c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4439c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *rsvd_check, 4440c50d8ae3SPaolo Bonzini int maxphyaddr, int level, bool nx, bool gbpages, 4441c50d8ae3SPaolo Bonzini bool pse, bool amd) 4442c50d8ae3SPaolo Bonzini { 4443c50d8ae3SPaolo Bonzini u64 exb_bit_rsvd = 0; 4444c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4445c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 4446c50d8ae3SPaolo Bonzini 4447c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4448c50d8ae3SPaolo Bonzini 4449c50d8ae3SPaolo Bonzini if (!nx) 4450c50d8ae3SPaolo Bonzini exb_bit_rsvd = rsvd_bits(63, 63); 4451c50d8ae3SPaolo Bonzini if (!gbpages) 4452c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4453c50d8ae3SPaolo Bonzini 4454c50d8ae3SPaolo Bonzini /* 4455c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4456c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4457c50d8ae3SPaolo Bonzini */ 4458c50d8ae3SPaolo Bonzini if (amd) 4459c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4460c50d8ae3SPaolo Bonzini 4461c50d8ae3SPaolo Bonzini switch (level) { 4462c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4463c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4464c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4465c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4466c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4467c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4468c50d8ae3SPaolo Bonzini 4469c50d8ae3SPaolo Bonzini if (!pse) { 4470c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4471c50d8ae3SPaolo Bonzini break; 4472c50d8ae3SPaolo Bonzini } 4473c50d8ae3SPaolo Bonzini 4474c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4475c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4476c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4477c50d8ae3SPaolo Bonzini else 4478c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4479c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4480c50d8ae3SPaolo Bonzini break; 4481c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 4482c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][2] = 4483c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 63) | 4484c50d8ae3SPaolo Bonzini rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */ 4485c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | 4486c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 62); /* PDE */ 4487c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd | 4488c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 62); /* PTE */ 4489c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd | 4490c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 62) | 4491c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4492c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4493c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4494c50d8ae3SPaolo Bonzini break; 4495c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 4496c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4] = exb_bit_rsvd | 4497c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd | rsvd_bits(7, 7) | 4498c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4499c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4500c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4501df561f66SGustavo A. R. Silva fallthrough; 4502c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 4503c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd | 4504c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd | rsvd_bits(7, 7) | 4505c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4506c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd | 45075ecad245SPaolo Bonzini gbpages_bit_rsvd | 4508c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4509c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | 4510c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4511c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd | 4512c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51); 4513c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4514c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 4515c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][2] = exb_bit_rsvd | 4516c50d8ae3SPaolo Bonzini gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) | 4517c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 4518c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd | 4519c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | 4520c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4521c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4522c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4523c50d8ae3SPaolo Bonzini break; 4524c50d8ae3SPaolo Bonzini } 4525c50d8ae3SPaolo Bonzini } 4526c50d8ae3SPaolo Bonzini 4527c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4528c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4529c50d8ae3SPaolo Bonzini { 4530c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, 4531c50d8ae3SPaolo Bonzini cpuid_maxphyaddr(vcpu), context->root_level, 4532c50d8ae3SPaolo Bonzini context->nx, 4533c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 453423493d0aSSean Christopherson is_pse(vcpu), 453523493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4536c50d8ae3SPaolo Bonzini } 4537c50d8ae3SPaolo Bonzini 4538c50d8ae3SPaolo Bonzini static void 4539c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 4540c50d8ae3SPaolo Bonzini int maxphyaddr, bool execonly) 4541c50d8ae3SPaolo Bonzini { 4542c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4543c50d8ae3SPaolo Bonzini 4544c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4] = 4545c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7); 4546c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3] = 4547c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7); 4548c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][2] = 4549c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6); 4550c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 4551c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6); 4552c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51); 4553c50d8ae3SPaolo Bonzini 4554c50d8ae3SPaolo Bonzini /* large page */ 4555c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4556c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 4557c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][2] = 4558c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29); 4559c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 4560c50d8ae3SPaolo Bonzini rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20); 4561c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4562c50d8ae3SPaolo Bonzini 4563c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4564c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4565c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4566c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4567c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4568c50d8ae3SPaolo Bonzini if (!execonly) { 4569c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4570c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4571c50d8ae3SPaolo Bonzini } 4572c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4573c50d8ae3SPaolo Bonzini } 4574c50d8ae3SPaolo Bonzini 4575c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4576c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4577c50d8ae3SPaolo Bonzini { 4578c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 4579c50d8ae3SPaolo Bonzini cpuid_maxphyaddr(vcpu), execonly); 4580c50d8ae3SPaolo Bonzini } 4581c50d8ae3SPaolo Bonzini 4582c50d8ae3SPaolo Bonzini /* 4583c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4584c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4585c50d8ae3SPaolo Bonzini * follow the features in guest. 4586c50d8ae3SPaolo Bonzini */ 4587c50d8ae3SPaolo Bonzini void 4588c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) 4589c50d8ae3SPaolo Bonzini { 4590c50d8ae3SPaolo Bonzini bool uses_nx = context->nx || 4591c50d8ae3SPaolo Bonzini context->mmu_role.base.smep_andnot_wp; 4592c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4593c50d8ae3SPaolo Bonzini int i; 4594c50d8ae3SPaolo Bonzini 4595c50d8ae3SPaolo Bonzini /* 4596c50d8ae3SPaolo Bonzini * Passing "true" to the last argument is okay; it adds a check 4597c50d8ae3SPaolo Bonzini * on bit 8 of the SPTEs which KVM doesn't use anyway. 4598c50d8ae3SPaolo Bonzini */ 4599c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4600c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 4601c50d8ae3SPaolo Bonzini shadow_phys_bits, 4602c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 4603c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 4604c50d8ae3SPaolo Bonzini is_pse(vcpu), true); 4605c50d8ae3SPaolo Bonzini 4606c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4607c50d8ae3SPaolo Bonzini return; 4608c50d8ae3SPaolo Bonzini 4609c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4610c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4611c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4612c50d8ae3SPaolo Bonzini } 4613c50d8ae3SPaolo Bonzini 4614c50d8ae3SPaolo Bonzini } 4615c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); 4616c50d8ae3SPaolo Bonzini 4617c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4618c50d8ae3SPaolo Bonzini { 4619c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4620c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4621c50d8ae3SPaolo Bonzini } 4622c50d8ae3SPaolo Bonzini 4623c50d8ae3SPaolo Bonzini /* 4624c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4625c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4626c50d8ae3SPaolo Bonzini */ 4627c50d8ae3SPaolo Bonzini static void 4628c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4629c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4630c50d8ae3SPaolo Bonzini { 4631c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4632c50d8ae3SPaolo Bonzini int i; 4633c50d8ae3SPaolo Bonzini 4634c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4635c50d8ae3SPaolo Bonzini 4636c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4637c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 4638c50d8ae3SPaolo Bonzini shadow_phys_bits, 4639c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4640c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 4641c50d8ae3SPaolo Bonzini true, true); 4642c50d8ae3SPaolo Bonzini else 4643c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 4644c50d8ae3SPaolo Bonzini shadow_phys_bits, 4645c50d8ae3SPaolo Bonzini false); 4646c50d8ae3SPaolo Bonzini 4647c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4648c50d8ae3SPaolo Bonzini return; 4649c50d8ae3SPaolo Bonzini 4650c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4651c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4652c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4653c50d8ae3SPaolo Bonzini } 4654c50d8ae3SPaolo Bonzini } 4655c50d8ae3SPaolo Bonzini 4656c50d8ae3SPaolo Bonzini /* 4657c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4658c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4659c50d8ae3SPaolo Bonzini */ 4660c50d8ae3SPaolo Bonzini static void 4661c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4662c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4663c50d8ae3SPaolo Bonzini { 4664c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 4665c50d8ae3SPaolo Bonzini shadow_phys_bits, execonly); 4666c50d8ae3SPaolo Bonzini } 4667c50d8ae3SPaolo Bonzini 4668c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4669c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4670c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4671c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4672c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4673c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4674c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4675c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4676c50d8ae3SPaolo Bonzini 4677c50d8ae3SPaolo Bonzini 4678c50d8ae3SPaolo Bonzini static void update_permission_bitmask(struct kvm_vcpu *vcpu, 4679c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu, bool ept) 4680c50d8ae3SPaolo Bonzini { 4681c50d8ae3SPaolo Bonzini unsigned byte; 4682c50d8ae3SPaolo Bonzini 4683c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4684c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4685c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4686c50d8ae3SPaolo Bonzini 4687c50d8ae3SPaolo Bonzini bool cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP) != 0; 4688c50d8ae3SPaolo Bonzini bool cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP) != 0; 4689c50d8ae3SPaolo Bonzini bool cr0_wp = is_write_protection(vcpu); 4690c50d8ae3SPaolo Bonzini 4691c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4692c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4693c50d8ae3SPaolo Bonzini 4694c50d8ae3SPaolo Bonzini /* 4695c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4696c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4697c50d8ae3SPaolo Bonzini */ 4698c50d8ae3SPaolo Bonzini 4699c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4700c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4701c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4702c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4703c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4704c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4705c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4706c50d8ae3SPaolo Bonzini u8 smepf = 0; 4707c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4708c50d8ae3SPaolo Bonzini u8 smapf = 0; 4709c50d8ae3SPaolo Bonzini 4710c50d8ae3SPaolo Bonzini if (!ept) { 4711c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4712c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4713c50d8ae3SPaolo Bonzini 4714c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 4715c50d8ae3SPaolo Bonzini if (!mmu->nx) 4716c50d8ae3SPaolo Bonzini ff = 0; 4717c50d8ae3SPaolo Bonzini 4718c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4719c50d8ae3SPaolo Bonzini if (!cr0_wp) 4720c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4721c50d8ae3SPaolo Bonzini 4722c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4723c50d8ae3SPaolo Bonzini if (cr4_smep) 4724c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4725c50d8ae3SPaolo Bonzini 4726c50d8ae3SPaolo Bonzini /* 4727c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4728c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4729c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4730c50d8ae3SPaolo Bonzini * conditions are true: 4731c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4732c50d8ae3SPaolo Bonzini * - A user page is accessed 4733c50d8ae3SPaolo Bonzini * - The access is not a fetch 4734c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4735c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4736c50d8ae3SPaolo Bonzini * 4737c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4738c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4739c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4740c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4741c50d8ae3SPaolo Bonzini */ 4742c50d8ae3SPaolo Bonzini if (cr4_smap) 4743c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4744c50d8ae3SPaolo Bonzini } 4745c50d8ae3SPaolo Bonzini 4746c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4747c50d8ae3SPaolo Bonzini } 4748c50d8ae3SPaolo Bonzini } 4749c50d8ae3SPaolo Bonzini 4750c50d8ae3SPaolo Bonzini /* 4751c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4752c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4753c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4754c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4755c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4756c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4757c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4758c50d8ae3SPaolo Bonzini * 4759c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4760c50d8ae3SPaolo Bonzini * page tables and the machine state: 4761c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4762c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4763c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4764c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4765c50d8ae3SPaolo Bonzini * 4766c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4767c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4768c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4769c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4770c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4771c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4772c50d8ae3SPaolo Bonzini * only will be masked away. 4773c50d8ae3SPaolo Bonzini */ 4774c50d8ae3SPaolo Bonzini static void update_pkru_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 4775c50d8ae3SPaolo Bonzini bool ept) 4776c50d8ae3SPaolo Bonzini { 4777c50d8ae3SPaolo Bonzini unsigned bit; 4778c50d8ae3SPaolo Bonzini bool wp; 4779c50d8ae3SPaolo Bonzini 4780c50d8ae3SPaolo Bonzini if (ept) { 4781c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4782c50d8ae3SPaolo Bonzini return; 4783c50d8ae3SPaolo Bonzini } 4784c50d8ae3SPaolo Bonzini 4785c50d8ae3SPaolo Bonzini /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */ 4786c50d8ae3SPaolo Bonzini if (!kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || !is_long_mode(vcpu)) { 4787c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4788c50d8ae3SPaolo Bonzini return; 4789c50d8ae3SPaolo Bonzini } 4790c50d8ae3SPaolo Bonzini 4791c50d8ae3SPaolo Bonzini wp = is_write_protection(vcpu); 4792c50d8ae3SPaolo Bonzini 4793c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4794c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4795c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4796c50d8ae3SPaolo Bonzini 4797c50d8ae3SPaolo Bonzini pfec = bit << 1; 4798c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4799c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4800c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4801c50d8ae3SPaolo Bonzini 4802c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4803c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4804c50d8ae3SPaolo Bonzini 4805c50d8ae3SPaolo Bonzini /* 4806c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4807c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4808c50d8ae3SPaolo Bonzini */ 4809c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4810c50d8ae3SPaolo Bonzini /* 4811c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4812c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4813c50d8ae3SPaolo Bonzini */ 4814c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4815c50d8ae3SPaolo Bonzini 4816c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4817c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4818c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4819c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4820c50d8ae3SPaolo Bonzini 4821c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4822c50d8ae3SPaolo Bonzini } 4823c50d8ae3SPaolo Bonzini } 4824c50d8ae3SPaolo Bonzini 4825c50d8ae3SPaolo Bonzini static void update_last_nonleaf_level(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 4826c50d8ae3SPaolo Bonzini { 4827c50d8ae3SPaolo Bonzini unsigned root_level = mmu->root_level; 4828c50d8ae3SPaolo Bonzini 4829c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level = root_level; 4830c50d8ae3SPaolo Bonzini if (root_level == PT32_ROOT_LEVEL && is_pse(vcpu)) 4831c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level++; 4832c50d8ae3SPaolo Bonzini } 4833c50d8ae3SPaolo Bonzini 4834c50d8ae3SPaolo Bonzini static void paging64_init_context_common(struct kvm_vcpu *vcpu, 4835c50d8ae3SPaolo Bonzini struct kvm_mmu *context, 4836c50d8ae3SPaolo Bonzini int level) 4837c50d8ae3SPaolo Bonzini { 4838c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4839c50d8ae3SPaolo Bonzini context->root_level = level; 4840c50d8ae3SPaolo Bonzini 4841c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4842c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4843c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4844c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4845c50d8ae3SPaolo Bonzini 4846c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_pae(vcpu)); 4847c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4848c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4849c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4850c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4851c50d8ae3SPaolo Bonzini context->update_pte = paging64_update_pte; 4852c50d8ae3SPaolo Bonzini context->shadow_root_level = level; 4853c50d8ae3SPaolo Bonzini context->direct_map = false; 4854c50d8ae3SPaolo Bonzini } 4855c50d8ae3SPaolo Bonzini 4856c50d8ae3SPaolo Bonzini static void paging64_init_context(struct kvm_vcpu *vcpu, 4857c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4858c50d8ae3SPaolo Bonzini { 4859c50d8ae3SPaolo Bonzini int root_level = is_la57_mode(vcpu) ? 4860c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4861c50d8ae3SPaolo Bonzini 4862c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, root_level); 4863c50d8ae3SPaolo Bonzini } 4864c50d8ae3SPaolo Bonzini 4865c50d8ae3SPaolo Bonzini static void paging32_init_context(struct kvm_vcpu *vcpu, 4866c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4867c50d8ae3SPaolo Bonzini { 4868c50d8ae3SPaolo Bonzini context->nx = false; 4869c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4870c50d8ae3SPaolo Bonzini 4871c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4872c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4873c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4874c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4875c50d8ae3SPaolo Bonzini 4876c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4877c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4878c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4879c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4880c50d8ae3SPaolo Bonzini context->update_pte = paging32_update_pte; 4881c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4882c50d8ae3SPaolo Bonzini context->direct_map = false; 4883c50d8ae3SPaolo Bonzini } 4884c50d8ae3SPaolo Bonzini 4885c50d8ae3SPaolo Bonzini static void paging32E_init_context(struct kvm_vcpu *vcpu, 4886c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4887c50d8ae3SPaolo Bonzini { 4888c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL); 4889c50d8ae3SPaolo Bonzini } 4890c50d8ae3SPaolo Bonzini 4891c50d8ae3SPaolo Bonzini static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu) 4892c50d8ae3SPaolo Bonzini { 4893c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4894c50d8ae3SPaolo Bonzini 4895c50d8ae3SPaolo Bonzini ext.cr0_pg = !!is_paging(vcpu); 4896c50d8ae3SPaolo Bonzini ext.cr4_pae = !!is_pae(vcpu); 4897c50d8ae3SPaolo Bonzini ext.cr4_smep = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); 4898c50d8ae3SPaolo Bonzini ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); 4899c50d8ae3SPaolo Bonzini ext.cr4_pse = !!is_pse(vcpu); 4900c50d8ae3SPaolo Bonzini ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE); 4901c50d8ae3SPaolo Bonzini ext.maxphyaddr = cpuid_maxphyaddr(vcpu); 4902c50d8ae3SPaolo Bonzini 4903c50d8ae3SPaolo Bonzini ext.valid = 1; 4904c50d8ae3SPaolo Bonzini 4905c50d8ae3SPaolo Bonzini return ext; 4906c50d8ae3SPaolo Bonzini } 4907c50d8ae3SPaolo Bonzini 4908c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 4909c50d8ae3SPaolo Bonzini bool base_only) 4910c50d8ae3SPaolo Bonzini { 4911c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4912c50d8ae3SPaolo Bonzini 4913c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4914c50d8ae3SPaolo Bonzini role.base.nxe = !!is_nx(vcpu); 4915c50d8ae3SPaolo Bonzini role.base.cr0_wp = is_write_protection(vcpu); 4916c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4917c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4918c50d8ae3SPaolo Bonzini 4919c50d8ae3SPaolo Bonzini if (base_only) 4920c50d8ae3SPaolo Bonzini return role; 4921c50d8ae3SPaolo Bonzini 4922c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4923c50d8ae3SPaolo Bonzini 4924c50d8ae3SPaolo Bonzini return role; 4925c50d8ae3SPaolo Bonzini } 4926c50d8ae3SPaolo Bonzini 4927d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4928d468d94bSSean Christopherson { 4929d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 493083013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4931d468d94bSSean Christopherson return 4; 4932d468d94bSSean Christopherson 493383013059SSean Christopherson return max_tdp_level; 4934d468d94bSSean Christopherson } 4935d468d94bSSean Christopherson 4936c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4937c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 4938c50d8ae3SPaolo Bonzini { 4939c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4940c50d8ae3SPaolo Bonzini 4941c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4942d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4943c50d8ae3SPaolo Bonzini role.base.direct = true; 4944c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4945c50d8ae3SPaolo Bonzini 4946c50d8ae3SPaolo Bonzini return role; 4947c50d8ae3SPaolo Bonzini } 4948c50d8ae3SPaolo Bonzini 4949c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4950c50d8ae3SPaolo Bonzini { 49518c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4952c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4953c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(vcpu, false); 4954c50d8ae3SPaolo Bonzini 4955c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4956c50d8ae3SPaolo Bonzini return; 4957c50d8ae3SPaolo Bonzini 4958c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 49597a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4960c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 49615efac074SPaolo Bonzini context->invlpg = NULL; 4962c50d8ae3SPaolo Bonzini context->update_pte = nonpaging_update_pte; 4963d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4964c50d8ae3SPaolo Bonzini context->direct_map = true; 4965d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4966c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4967c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4968c50d8ae3SPaolo Bonzini 4969c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4970c50d8ae3SPaolo Bonzini context->nx = false; 4971c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4972c50d8ae3SPaolo Bonzini context->root_level = 0; 4973c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4974c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4975c50d8ae3SPaolo Bonzini context->root_level = is_la57_mode(vcpu) ? 4976c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4977c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4978c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4979c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4980c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4981c50d8ae3SPaolo Bonzini context->root_level = PT32E_ROOT_LEVEL; 4982c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4983c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4984c50d8ae3SPaolo Bonzini } else { 4985c50d8ae3SPaolo Bonzini context->nx = false; 4986c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4987c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4988c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4989c50d8ae3SPaolo Bonzini } 4990c50d8ae3SPaolo Bonzini 4991c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4992c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4993c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4994c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4995c50d8ae3SPaolo Bonzini } 4996c50d8ae3SPaolo Bonzini 4997c50d8ae3SPaolo Bonzini static union kvm_mmu_role 499859505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, bool base_only) 4999c50d8ae3SPaolo Bonzini { 5000c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 5001c50d8ae3SPaolo Bonzini 5002c50d8ae3SPaolo Bonzini role.base.smep_andnot_wp = role.ext.cr4_smep && 5003c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 5004c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = role.ext.cr4_smap && 5005c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 5006c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = !!is_pae(vcpu); 5007c50d8ae3SPaolo Bonzini 500859505b55SSean Christopherson return role; 500959505b55SSean Christopherson } 501059505b55SSean Christopherson 501159505b55SSean Christopherson static union kvm_mmu_role 501259505b55SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 501359505b55SSean Christopherson { 501459505b55SSean Christopherson union kvm_mmu_role role = 501559505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, base_only); 501659505b55SSean Christopherson 501759505b55SSean Christopherson role.base.direct = !is_paging(vcpu); 501859505b55SSean Christopherson 5019c50d8ae3SPaolo Bonzini if (!is_long_mode(vcpu)) 5020c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 5021c50d8ae3SPaolo Bonzini else if (is_la57_mode(vcpu)) 5022c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 5023c50d8ae3SPaolo Bonzini else 5024c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 5025c50d8ae3SPaolo Bonzini 5026c50d8ae3SPaolo Bonzini return role; 5027c50d8ae3SPaolo Bonzini } 5028c50d8ae3SPaolo Bonzini 50298c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 50308c008659SPaolo Bonzini u32 cr0, u32 cr4, u32 efer, 50318c008659SPaolo Bonzini union kvm_mmu_role new_role) 5032c50d8ae3SPaolo Bonzini { 5033929d1cfaSPaolo Bonzini if (!(cr0 & X86_CR0_PG)) 5034c50d8ae3SPaolo Bonzini nonpaging_init_context(vcpu, context); 5035929d1cfaSPaolo Bonzini else if (efer & EFER_LMA) 5036c50d8ae3SPaolo Bonzini paging64_init_context(vcpu, context); 5037929d1cfaSPaolo Bonzini else if (cr4 & X86_CR4_PAE) 5038c50d8ae3SPaolo Bonzini paging32E_init_context(vcpu, context); 5039c50d8ae3SPaolo Bonzini else 5040c50d8ae3SPaolo Bonzini paging32_init_context(vcpu, context); 5041c50d8ae3SPaolo Bonzini 5042c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 5043c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 5044c50d8ae3SPaolo Bonzini } 50450f04a2acSVitaly Kuznetsov 50460f04a2acSVitaly Kuznetsov static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer) 50470f04a2acSVitaly Kuznetsov { 50488c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 50490f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 50500f04a2acSVitaly Kuznetsov kvm_calc_shadow_mmu_root_page_role(vcpu, false); 50510f04a2acSVitaly Kuznetsov 50520f04a2acSVitaly Kuznetsov if (new_role.as_u64 != context->mmu_role.as_u64) 50538c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 50540f04a2acSVitaly Kuznetsov } 50550f04a2acSVitaly Kuznetsov 505659505b55SSean Christopherson static union kvm_mmu_role 505759505b55SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu) 505859505b55SSean Christopherson { 505959505b55SSean Christopherson union kvm_mmu_role role = 506059505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, false); 506159505b55SSean Christopherson 506259505b55SSean Christopherson role.base.direct = false; 5063d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 506459505b55SSean Christopherson 506559505b55SSean Christopherson return role; 506659505b55SSean Christopherson } 506759505b55SSean Christopherson 50680f04a2acSVitaly Kuznetsov void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer, 50690f04a2acSVitaly Kuznetsov gpa_t nested_cr3) 50700f04a2acSVitaly Kuznetsov { 50718c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 507259505b55SSean Christopherson union kvm_mmu_role new_role = kvm_calc_shadow_npt_root_page_role(vcpu); 50730f04a2acSVitaly Kuznetsov 5074096586fdSSean Christopherson context->shadow_root_level = new_role.base.level; 5075096586fdSSean Christopherson 5076a506fdd2SVitaly Kuznetsov __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base, false, false); 5077a506fdd2SVitaly Kuznetsov 50780f04a2acSVitaly Kuznetsov if (new_role.as_u64 != context->mmu_role.as_u64) 50798c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 50800f04a2acSVitaly Kuznetsov } 50810f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 5082c50d8ae3SPaolo Bonzini 5083c50d8ae3SPaolo Bonzini static union kvm_mmu_role 5084c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 5085bb1fcc70SSean Christopherson bool execonly, u8 level) 5086c50d8ae3SPaolo Bonzini { 5087c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 5088c50d8ae3SPaolo Bonzini 5089c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 5090c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 5091c50d8ae3SPaolo Bonzini 5092bb1fcc70SSean Christopherson role.base.level = level; 5093c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 5094c50d8ae3SPaolo Bonzini role.base.direct = false; 5095c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 5096c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 5097c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 5098c50d8ae3SPaolo Bonzini 5099c50d8ae3SPaolo Bonzini /* 5100c50d8ae3SPaolo Bonzini * WP=1 and NOT_WP=1 is an impossible combination, use WP and the 5101c50d8ae3SPaolo Bonzini * SMAP variation to denote shadow EPT entries. 5102c50d8ae3SPaolo Bonzini */ 5103c50d8ae3SPaolo Bonzini role.base.cr0_wp = true; 5104c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = true; 5105c50d8ae3SPaolo Bonzini 5106c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 5107c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 5108c50d8ae3SPaolo Bonzini 5109c50d8ae3SPaolo Bonzini return role; 5110c50d8ae3SPaolo Bonzini } 5111c50d8ae3SPaolo Bonzini 5112c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 5113c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 5114c50d8ae3SPaolo Bonzini { 51158c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 5116bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 5117c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 5118c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 5119bb1fcc70SSean Christopherson execonly, level); 5120c50d8ae3SPaolo Bonzini 5121be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base, true, true); 5122c50d8ae3SPaolo Bonzini 5123c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 5124c50d8ae3SPaolo Bonzini return; 5125c50d8ae3SPaolo Bonzini 5126bb1fcc70SSean Christopherson context->shadow_root_level = level; 5127c50d8ae3SPaolo Bonzini 5128c50d8ae3SPaolo Bonzini context->nx = true; 5129c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 5130c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 5131c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 5132c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 5133c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 5134c50d8ae3SPaolo Bonzini context->update_pte = ept_update_pte; 5135bb1fcc70SSean Christopherson context->root_level = level; 5136c50d8ae3SPaolo Bonzini context->direct_map = false; 5137c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 5138c50d8ae3SPaolo Bonzini 5139c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, true); 5140c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, true); 5141c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 5142c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 5143c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 5144c50d8ae3SPaolo Bonzini } 5145c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 5146c50d8ae3SPaolo Bonzini 5147c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 5148c50d8ae3SPaolo Bonzini { 51498c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 5150c50d8ae3SPaolo Bonzini 5151929d1cfaSPaolo Bonzini kvm_init_shadow_mmu(vcpu, 5152929d1cfaSPaolo Bonzini kvm_read_cr0_bits(vcpu, X86_CR0_PG), 5153929d1cfaSPaolo Bonzini kvm_read_cr4_bits(vcpu, X86_CR4_PAE), 5154929d1cfaSPaolo Bonzini vcpu->arch.efer); 5155929d1cfaSPaolo Bonzini 5156d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 5157c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 5158c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 5159c50d8ae3SPaolo Bonzini } 5160c50d8ae3SPaolo Bonzini 5161c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 5162c50d8ae3SPaolo Bonzini { 5163c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = kvm_calc_mmu_role_common(vcpu, false); 5164c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 5165c50d8ae3SPaolo Bonzini 5166c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 5167c50d8ae3SPaolo Bonzini return; 5168c50d8ae3SPaolo Bonzini 5169c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 5170d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 5171c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 5172c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 5173c50d8ae3SPaolo Bonzini 5174c50d8ae3SPaolo Bonzini /* 51755efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 51765efac074SPaolo Bonzini * SPTEs. 51775efac074SPaolo Bonzini */ 51785efac074SPaolo Bonzini g_context->invlpg = NULL; 51795efac074SPaolo Bonzini 51805efac074SPaolo Bonzini /* 5181c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 5182c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 5183c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 5184c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 5185c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 5186c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 5187c50d8ae3SPaolo Bonzini */ 5188c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 5189c50d8ae3SPaolo Bonzini g_context->nx = false; 5190c50d8ae3SPaolo Bonzini g_context->root_level = 0; 5191c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 5192c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 5193c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 5194c50d8ae3SPaolo Bonzini g_context->root_level = is_la57_mode(vcpu) ? 5195c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 5196c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 5197c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 5198c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 5199c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 5200c50d8ae3SPaolo Bonzini g_context->root_level = PT32E_ROOT_LEVEL; 5201c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 5202c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 5203c50d8ae3SPaolo Bonzini } else { 5204c50d8ae3SPaolo Bonzini g_context->nx = false; 5205c50d8ae3SPaolo Bonzini g_context->root_level = PT32_ROOT_LEVEL; 5206c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 5207c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 5208c50d8ae3SPaolo Bonzini } 5209c50d8ae3SPaolo Bonzini 5210c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, g_context, false); 5211c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, g_context, false); 5212c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, g_context); 5213c50d8ae3SPaolo Bonzini } 5214c50d8ae3SPaolo Bonzini 5215c50d8ae3SPaolo Bonzini void kvm_init_mmu(struct kvm_vcpu *vcpu, bool reset_roots) 5216c50d8ae3SPaolo Bonzini { 5217c50d8ae3SPaolo Bonzini if (reset_roots) { 5218c50d8ae3SPaolo Bonzini uint i; 5219c50d8ae3SPaolo Bonzini 5220c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = INVALID_PAGE; 5221c50d8ae3SPaolo Bonzini 5222c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5223c50d8ae3SPaolo Bonzini vcpu->arch.mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 5224c50d8ae3SPaolo Bonzini } 5225c50d8ae3SPaolo Bonzini 5226c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 5227c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 5228c50d8ae3SPaolo Bonzini else if (tdp_enabled) 5229c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 5230c50d8ae3SPaolo Bonzini else 5231c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 5232c50d8ae3SPaolo Bonzini } 5233c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 5234c50d8ae3SPaolo Bonzini 5235c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 5236c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 5237c50d8ae3SPaolo Bonzini { 5238c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 5239c50d8ae3SPaolo Bonzini 5240c50d8ae3SPaolo Bonzini if (tdp_enabled) 5241c50d8ae3SPaolo Bonzini role = kvm_calc_tdp_mmu_root_page_role(vcpu, true); 5242c50d8ae3SPaolo Bonzini else 5243c50d8ae3SPaolo Bonzini role = kvm_calc_shadow_mmu_root_page_role(vcpu, true); 5244c50d8ae3SPaolo Bonzini 5245c50d8ae3SPaolo Bonzini return role.base; 5246c50d8ae3SPaolo Bonzini } 5247c50d8ae3SPaolo Bonzini 5248c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 5249c50d8ae3SPaolo Bonzini { 5250c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5251c50d8ae3SPaolo Bonzini kvm_init_mmu(vcpu, true); 5252c50d8ae3SPaolo Bonzini } 5253c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 5254c50d8ae3SPaolo Bonzini 5255c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 5256c50d8ae3SPaolo Bonzini { 5257c50d8ae3SPaolo Bonzini int r; 5258c50d8ae3SPaolo Bonzini 5259378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 5260c50d8ae3SPaolo Bonzini if (r) 5261c50d8ae3SPaolo Bonzini goto out; 5262c50d8ae3SPaolo Bonzini r = mmu_alloc_roots(vcpu); 5263c50d8ae3SPaolo Bonzini kvm_mmu_sync_roots(vcpu); 5264c50d8ae3SPaolo Bonzini if (r) 5265c50d8ae3SPaolo Bonzini goto out; 5266727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 52678c8560b8SSean Christopherson kvm_x86_ops.tlb_flush_current(vcpu); 5268c50d8ae3SPaolo Bonzini out: 5269c50d8ae3SPaolo Bonzini return r; 5270c50d8ae3SPaolo Bonzini } 5271c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_load); 5272c50d8ae3SPaolo Bonzini 5273c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 5274c50d8ae3SPaolo Bonzini { 5275c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 5276c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 5277c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 5278c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 5279c50d8ae3SPaolo Bonzini } 5280c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unload); 5281c50d8ae3SPaolo Bonzini 5282c50d8ae3SPaolo Bonzini static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, 5283c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *spte, 5284c50d8ae3SPaolo Bonzini const void *new) 5285c50d8ae3SPaolo Bonzini { 52863bae0459SSean Christopherson if (sp->role.level != PG_LEVEL_4K) { 5287c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pde_zapped; 5288c50d8ae3SPaolo Bonzini return; 5289c50d8ae3SPaolo Bonzini } 5290c50d8ae3SPaolo Bonzini 5291c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_updated; 5292c50d8ae3SPaolo Bonzini vcpu->arch.mmu->update_pte(vcpu, sp, spte, new); 5293c50d8ae3SPaolo Bonzini } 5294c50d8ae3SPaolo Bonzini 5295c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 5296c50d8ae3SPaolo Bonzini { 5297c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 5298c50d8ae3SPaolo Bonzini return false; 5299c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 5300c50d8ae3SPaolo Bonzini return true; 5301c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 5302c50d8ae3SPaolo Bonzini return true; 5303c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 5304c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 5305c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 5306c50d8ae3SPaolo Bonzini } 5307c50d8ae3SPaolo Bonzini 5308c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 5309c50d8ae3SPaolo Bonzini int *bytes) 5310c50d8ae3SPaolo Bonzini { 5311c50d8ae3SPaolo Bonzini u64 gentry = 0; 5312c50d8ae3SPaolo Bonzini int r; 5313c50d8ae3SPaolo Bonzini 5314c50d8ae3SPaolo Bonzini /* 5315c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 5316c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 5317c50d8ae3SPaolo Bonzini * when they have the same mode. 5318c50d8ae3SPaolo Bonzini */ 5319c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5320c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5321c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5322c50d8ae3SPaolo Bonzini *bytes = 8; 5323c50d8ae3SPaolo Bonzini } 5324c50d8ae3SPaolo Bonzini 5325c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5326c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5327c50d8ae3SPaolo Bonzini if (r) 5328c50d8ae3SPaolo Bonzini gentry = 0; 5329c50d8ae3SPaolo Bonzini } 5330c50d8ae3SPaolo Bonzini 5331c50d8ae3SPaolo Bonzini return gentry; 5332c50d8ae3SPaolo Bonzini } 5333c50d8ae3SPaolo Bonzini 5334c50d8ae3SPaolo Bonzini /* 5335c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5336c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5337c50d8ae3SPaolo Bonzini */ 5338c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5339c50d8ae3SPaolo Bonzini { 5340c50d8ae3SPaolo Bonzini /* 5341c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5342c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5343c50d8ae3SPaolo Bonzini */ 53443bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5345c50d8ae3SPaolo Bonzini return false; 5346c50d8ae3SPaolo Bonzini 5347c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5348c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5349c50d8ae3SPaolo Bonzini } 5350c50d8ae3SPaolo Bonzini 5351c50d8ae3SPaolo Bonzini /* 5352c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5353c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5354c50d8ae3SPaolo Bonzini */ 5355c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5356c50d8ae3SPaolo Bonzini int bytes) 5357c50d8ae3SPaolo Bonzini { 5358c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5359c50d8ae3SPaolo Bonzini 5360c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5361c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5362c50d8ae3SPaolo Bonzini 5363c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5364c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 5365c50d8ae3SPaolo Bonzini 5366c50d8ae3SPaolo Bonzini /* 5367c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5368c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5369c50d8ae3SPaolo Bonzini */ 5370c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5371c50d8ae3SPaolo Bonzini return false; 5372c50d8ae3SPaolo Bonzini 5373c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5374c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5375c50d8ae3SPaolo Bonzini 5376c50d8ae3SPaolo Bonzini return misaligned; 5377c50d8ae3SPaolo Bonzini } 5378c50d8ae3SPaolo Bonzini 5379c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5380c50d8ae3SPaolo Bonzini { 5381c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5382c50d8ae3SPaolo Bonzini u64 *spte; 5383c50d8ae3SPaolo Bonzini int level; 5384c50d8ae3SPaolo Bonzini 5385c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5386c50d8ae3SPaolo Bonzini level = sp->role.level; 5387c50d8ae3SPaolo Bonzini *nspte = 1; 5388c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 5389c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5390c50d8ae3SPaolo Bonzini /* 5391c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5392c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5393c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5394c50d8ae3SPaolo Bonzini */ 5395c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5396c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5397c50d8ae3SPaolo Bonzini page_offset <<= 1; 5398c50d8ae3SPaolo Bonzini *nspte = 2; 5399c50d8ae3SPaolo Bonzini } 5400c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5401c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5402c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5403c50d8ae3SPaolo Bonzini return NULL; 5404c50d8ae3SPaolo Bonzini } 5405c50d8ae3SPaolo Bonzini 5406c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5407c50d8ae3SPaolo Bonzini return spte; 5408c50d8ae3SPaolo Bonzini } 5409c50d8ae3SPaolo Bonzini 5410a102a674SSean Christopherson /* 5411a102a674SSean Christopherson * Ignore various flags when determining if a SPTE can be immediately 5412a102a674SSean Christopherson * overwritten for the current MMU. 5413a102a674SSean Christopherson * - level: explicitly checked in mmu_pte_write_new_pte(), and will never 5414a102a674SSean Christopherson * match the current MMU role, as MMU's level tracks the root level. 5415a102a674SSean Christopherson * - access: updated based on the new guest PTE 5416a102a674SSean Christopherson * - quadrant: handled by get_written_sptes() 5417a102a674SSean Christopherson * - invalid: always false (loop only walks valid shadow pages) 5418a102a674SSean Christopherson */ 5419a102a674SSean Christopherson static const union kvm_mmu_page_role role_ign = { 5420a102a674SSean Christopherson .level = 0xf, 5421a102a674SSean Christopherson .access = 0x7, 5422a102a674SSean Christopherson .quadrant = 0x3, 5423a102a674SSean Christopherson .invalid = 0x1, 5424a102a674SSean Christopherson }; 5425a102a674SSean Christopherson 5426c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5427c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5428c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5429c50d8ae3SPaolo Bonzini { 5430c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5431c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5432c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5433c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5434c50d8ae3SPaolo Bonzini int npte; 5435c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 5436c50d8ae3SPaolo Bonzini 5437c50d8ae3SPaolo Bonzini /* 5438c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5439c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5440c50d8ae3SPaolo Bonzini */ 5441c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5442c50d8ae3SPaolo Bonzini return; 5443c50d8ae3SPaolo Bonzini 5444c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 5445c50d8ae3SPaolo Bonzini 5446c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5447c50d8ae3SPaolo Bonzini 5448c50d8ae3SPaolo Bonzini /* 5449c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5450c50d8ae3SPaolo Bonzini * or not since pte prefetch is skiped if it does not have 5451c50d8ae3SPaolo Bonzini * enough objects in the cache. 5452c50d8ae3SPaolo Bonzini */ 5453378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5454c50d8ae3SPaolo Bonzini 5455c50d8ae3SPaolo Bonzini spin_lock(&vcpu->kvm->mmu_lock); 5456c50d8ae3SPaolo Bonzini 5457c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5458c50d8ae3SPaolo Bonzini 5459c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5460c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5461c50d8ae3SPaolo Bonzini 5462c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5463c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5464c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5465c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5466c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5467c50d8ae3SPaolo Bonzini continue; 5468c50d8ae3SPaolo Bonzini } 5469c50d8ae3SPaolo Bonzini 5470c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5471c50d8ae3SPaolo Bonzini if (!spte) 5472c50d8ae3SPaolo Bonzini continue; 5473c50d8ae3SPaolo Bonzini 5474c50d8ae3SPaolo Bonzini local_flush = true; 5475c50d8ae3SPaolo Bonzini while (npte--) { 5476c50d8ae3SPaolo Bonzini u32 base_role = vcpu->arch.mmu->mmu_role.base.word; 5477c50d8ae3SPaolo Bonzini 5478c50d8ae3SPaolo Bonzini entry = *spte; 54792de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5480c50d8ae3SPaolo Bonzini if (gentry && 5481a102a674SSean Christopherson !((sp->role.word ^ base_role) & ~role_ign.word) && 5482a102a674SSean Christopherson rmap_can_add(vcpu)) 5483c50d8ae3SPaolo Bonzini mmu_pte_write_new_pte(vcpu, sp, spte, &gentry); 5484c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5485c50d8ae3SPaolo Bonzini remote_flush = true; 5486c50d8ae3SPaolo Bonzini ++spte; 5487c50d8ae3SPaolo Bonzini } 5488c50d8ae3SPaolo Bonzini } 5489c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5490c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5491c50d8ae3SPaolo Bonzini spin_unlock(&vcpu->kvm->mmu_lock); 5492c50d8ae3SPaolo Bonzini } 5493c50d8ae3SPaolo Bonzini 5494c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 5495c50d8ae3SPaolo Bonzini { 5496c50d8ae3SPaolo Bonzini gpa_t gpa; 5497c50d8ae3SPaolo Bonzini int r; 5498c50d8ae3SPaolo Bonzini 5499c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 5500c50d8ae3SPaolo Bonzini return 0; 5501c50d8ae3SPaolo Bonzini 5502c50d8ae3SPaolo Bonzini gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 5503c50d8ae3SPaolo Bonzini 5504c50d8ae3SPaolo Bonzini r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 5505c50d8ae3SPaolo Bonzini 5506c50d8ae3SPaolo Bonzini return r; 5507c50d8ae3SPaolo Bonzini } 5508c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); 5509c50d8ae3SPaolo Bonzini 5510736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5511c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5512c50d8ae3SPaolo Bonzini { 551392daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5514c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5515c50d8ae3SPaolo Bonzini 55166948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5517ddce6208SSean Christopherson return RET_PF_RETRY; 5518ddce6208SSean Christopherson 5519c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5520c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5521736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5522c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5523c50d8ae3SPaolo Bonzini goto emulate; 5524c50d8ae3SPaolo Bonzini } 5525c50d8ae3SPaolo Bonzini 5526c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 55277a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 55287a02674dSSean Christopherson lower_32_bits(error_code), false); 55297b367bc9SSean Christopherson if (WARN_ON_ONCE(r == RET_PF_INVALID)) 55307b367bc9SSean Christopherson return -EIO; 5531c50d8ae3SPaolo Bonzini } 5532c50d8ae3SPaolo Bonzini 5533c50d8ae3SPaolo Bonzini if (r < 0) 5534c50d8ae3SPaolo Bonzini return r; 553583a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 553683a2ba4cSSean Christopherson return 1; 5537c50d8ae3SPaolo Bonzini 5538c50d8ae3SPaolo Bonzini /* 5539c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5540c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5541c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5542c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5543c50d8ae3SPaolo Bonzini * and resume the guest. 5544c50d8ae3SPaolo Bonzini */ 5545c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5546c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5547736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5548c50d8ae3SPaolo Bonzini return 1; 5549c50d8ae3SPaolo Bonzini } 5550c50d8ae3SPaolo Bonzini 5551c50d8ae3SPaolo Bonzini /* 5552c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5553c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5554c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5555c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5556c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5557c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5558c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5559c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5560c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5561c50d8ae3SPaolo Bonzini */ 5562736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 556392daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5564c50d8ae3SPaolo Bonzini emulate: 5565736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5566c50d8ae3SPaolo Bonzini insn_len); 5567c50d8ae3SPaolo Bonzini } 5568c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5569c50d8ae3SPaolo Bonzini 55705efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 55715efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5572c50d8ae3SPaolo Bonzini { 5573c50d8ae3SPaolo Bonzini int i; 5574c50d8ae3SPaolo Bonzini 55755efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 55765efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 55775efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5578c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5579c50d8ae3SPaolo Bonzini return; 5580c50d8ae3SPaolo Bonzini 55815efac074SPaolo Bonzini kvm_x86_ops.tlb_flush_gva(vcpu, gva); 55825efac074SPaolo Bonzini } 55835efac074SPaolo Bonzini 55845efac074SPaolo Bonzini if (!mmu->invlpg) 55855efac074SPaolo Bonzini return; 55865efac074SPaolo Bonzini 55875efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5588c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5589c50d8ae3SPaolo Bonzini 5590c50d8ae3SPaolo Bonzini /* 5591c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5592c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5593c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5594c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5595c50d8ae3SPaolo Bonzini * just always sync it. 5596c50d8ae3SPaolo Bonzini * 5597c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5598c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5599c50d8ae3SPaolo Bonzini * for them. 5600c50d8ae3SPaolo Bonzini */ 5601c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5602c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5603c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 56045efac074SPaolo Bonzini } else { 56055efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 56065efac074SPaolo Bonzini } 56075efac074SPaolo Bonzini } 56085efac074SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invalidate_gva); 5609c50d8ae3SPaolo Bonzini 56105efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 56115efac074SPaolo Bonzini { 56125efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5613c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5614c50d8ae3SPaolo Bonzini } 5615c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5616c50d8ae3SPaolo Bonzini 56175efac074SPaolo Bonzini 5618c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5619c50d8ae3SPaolo Bonzini { 5620c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5621c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5622c50d8ae3SPaolo Bonzini uint i; 5623c50d8ae3SPaolo Bonzini 5624c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5625c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5626c50d8ae3SPaolo Bonzini tlb_flush = true; 5627c50d8ae3SPaolo Bonzini } 5628c50d8ae3SPaolo Bonzini 5629c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5630c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5631be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5632c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5633c50d8ae3SPaolo Bonzini tlb_flush = true; 5634c50d8ae3SPaolo Bonzini } 5635c50d8ae3SPaolo Bonzini } 5636c50d8ae3SPaolo Bonzini 5637c50d8ae3SPaolo Bonzini if (tlb_flush) 5638afaf0b2fSSean Christopherson kvm_x86_ops.tlb_flush_gva(vcpu, gva); 5639c50d8ae3SPaolo Bonzini 5640c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5641c50d8ae3SPaolo Bonzini 5642c50d8ae3SPaolo Bonzini /* 5643c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5644c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5645c50d8ae3SPaolo Bonzini * for them. 5646c50d8ae3SPaolo Bonzini */ 5647c50d8ae3SPaolo Bonzini } 5648c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invpcid_gva); 5649c50d8ae3SPaolo Bonzini 565083013059SSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 565183013059SSean Christopherson int tdp_huge_page_level) 5652c50d8ae3SPaolo Bonzini { 5653bde77235SSean Christopherson tdp_enabled = enable_tdp; 565483013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5655703c335dSSean Christopherson 5656703c335dSSean Christopherson /* 56571d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5658703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5659703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5660703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5661703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5662703c335dSSean Christopherson */ 5663703c335dSSean Christopherson if (tdp_enabled) 56641d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5665703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 56661d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5667703c335dSSean Christopherson else 56681d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5669c50d8ae3SPaolo Bonzini } 5670bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5671c50d8ae3SPaolo Bonzini 5672c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5673c50d8ae3SPaolo Bonzini typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head); 5674c50d8ae3SPaolo Bonzini 5675c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5676c50d8ae3SPaolo Bonzini static __always_inline bool 5677c50d8ae3SPaolo Bonzini slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot, 5678c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5679c50d8ae3SPaolo Bonzini gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb) 5680c50d8ae3SPaolo Bonzini { 5681c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5682c50d8ae3SPaolo Bonzini bool flush = false; 5683c50d8ae3SPaolo Bonzini 5684c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5685c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5686c50d8ae3SPaolo Bonzini if (iterator.rmap) 5687c50d8ae3SPaolo Bonzini flush |= fn(kvm, iterator.rmap); 5688c50d8ae3SPaolo Bonzini 5689c50d8ae3SPaolo Bonzini if (need_resched() || spin_needbreak(&kvm->mmu_lock)) { 5690c50d8ae3SPaolo Bonzini if (flush && lock_flush_tlb) { 5691c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5692c50d8ae3SPaolo Bonzini start_gfn, 5693c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5694c50d8ae3SPaolo Bonzini flush = false; 5695c50d8ae3SPaolo Bonzini } 5696c50d8ae3SPaolo Bonzini cond_resched_lock(&kvm->mmu_lock); 5697c50d8ae3SPaolo Bonzini } 5698c50d8ae3SPaolo Bonzini } 5699c50d8ae3SPaolo Bonzini 5700c50d8ae3SPaolo Bonzini if (flush && lock_flush_tlb) { 5701c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, start_gfn, 5702c50d8ae3SPaolo Bonzini end_gfn - start_gfn + 1); 5703c50d8ae3SPaolo Bonzini flush = false; 5704c50d8ae3SPaolo Bonzini } 5705c50d8ae3SPaolo Bonzini 5706c50d8ae3SPaolo Bonzini return flush; 5707c50d8ae3SPaolo Bonzini } 5708c50d8ae3SPaolo Bonzini 5709c50d8ae3SPaolo Bonzini static __always_inline bool 5710c50d8ae3SPaolo Bonzini slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5711c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5712c50d8ae3SPaolo Bonzini bool lock_flush_tlb) 5713c50d8ae3SPaolo Bonzini { 5714c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5715c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5716c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 5717c50d8ae3SPaolo Bonzini lock_flush_tlb); 5718c50d8ae3SPaolo Bonzini } 5719c50d8ae3SPaolo Bonzini 5720c50d8ae3SPaolo Bonzini static __always_inline bool 5721c50d8ae3SPaolo Bonzini slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5722c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5723c50d8ae3SPaolo Bonzini { 57243bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5725e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); 5726c50d8ae3SPaolo Bonzini } 5727c50d8ae3SPaolo Bonzini 5728c50d8ae3SPaolo Bonzini static __always_inline bool 5729c50d8ae3SPaolo Bonzini slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5730c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5731c50d8ae3SPaolo Bonzini { 57323bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K + 1, 5733e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); 5734c50d8ae3SPaolo Bonzini } 5735c50d8ae3SPaolo Bonzini 5736c50d8ae3SPaolo Bonzini static __always_inline bool 5737c50d8ae3SPaolo Bonzini slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, 5738c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5739c50d8ae3SPaolo Bonzini { 57403bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 57413bae0459SSean Christopherson PG_LEVEL_4K, lock_flush_tlb); 5742c50d8ae3SPaolo Bonzini } 5743c50d8ae3SPaolo Bonzini 5744c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5745c50d8ae3SPaolo Bonzini { 5746c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 5747c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->lm_root); 5748c50d8ae3SPaolo Bonzini } 5749c50d8ae3SPaolo Bonzini 575004d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5751c50d8ae3SPaolo Bonzini { 5752c50d8ae3SPaolo Bonzini struct page *page; 5753c50d8ae3SPaolo Bonzini int i; 5754c50d8ae3SPaolo Bonzini 575504d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 575604d28e37SSean Christopherson mmu->root_pgd = 0; 575704d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 575804d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 575904d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 576004d28e37SSean Christopherson 5761c50d8ae3SPaolo Bonzini /* 5762c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5763c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5764c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5765c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 5766c50d8ae3SPaolo Bonzini * 4GB of memory, which happens to fit the DMA32 zone. Except for 5767c50d8ae3SPaolo Bonzini * SVM's 32-bit NPT support, TDP paging doesn't use PAE paging and can 5768c50d8ae3SPaolo Bonzini * skip allocating the PDP table. 5769c50d8ae3SPaolo Bonzini */ 5770d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5771c50d8ae3SPaolo Bonzini return 0; 5772c50d8ae3SPaolo Bonzini 5773c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5774c50d8ae3SPaolo Bonzini if (!page) 5775c50d8ae3SPaolo Bonzini return -ENOMEM; 5776c50d8ae3SPaolo Bonzini 5777c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 5778c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5779c50d8ae3SPaolo Bonzini mmu->pae_root[i] = INVALID_PAGE; 5780c50d8ae3SPaolo Bonzini 5781c50d8ae3SPaolo Bonzini return 0; 5782c50d8ae3SPaolo Bonzini } 5783c50d8ae3SPaolo Bonzini 5784c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5785c50d8ae3SPaolo Bonzini { 5786c50d8ae3SPaolo Bonzini int ret; 5787c50d8ae3SPaolo Bonzini 57885962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 57895f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 57905f6078f9SSean Christopherson 57915962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 57925f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 57935962bfb7SSean Christopherson 579496880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 579596880883SSean Christopherson 5796c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5797c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5798c50d8ae3SPaolo Bonzini 5799c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5800c50d8ae3SPaolo Bonzini 580104d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5802c50d8ae3SPaolo Bonzini if (ret) 5803c50d8ae3SPaolo Bonzini return ret; 5804c50d8ae3SPaolo Bonzini 580504d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5806c50d8ae3SPaolo Bonzini if (ret) 5807c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5808c50d8ae3SPaolo Bonzini 5809c50d8ae3SPaolo Bonzini return ret; 5810c50d8ae3SPaolo Bonzini fail_allocate_root: 5811c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5812c50d8ae3SPaolo Bonzini return ret; 5813c50d8ae3SPaolo Bonzini } 5814c50d8ae3SPaolo Bonzini 5815c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5816c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5817c50d8ae3SPaolo Bonzini { 5818c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5819c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5820c50d8ae3SPaolo Bonzini 5821c50d8ae3SPaolo Bonzini restart: 5822c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5823c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5824c50d8ae3SPaolo Bonzini /* 5825c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5826c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5827c50d8ae3SPaolo Bonzini */ 5828c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5829c50d8ae3SPaolo Bonzini break; 5830c50d8ae3SPaolo Bonzini 5831c50d8ae3SPaolo Bonzini /* 5832f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5833f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5834f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5835c50d8ae3SPaolo Bonzini */ 5836f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5837c50d8ae3SPaolo Bonzini continue; 5838c50d8ae3SPaolo Bonzini 5839c50d8ae3SPaolo Bonzini /* 5840c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5841c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5842c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5843c50d8ae3SPaolo Bonzini * be in active use by the guest. 5844c50d8ae3SPaolo Bonzini */ 5845c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5846c50d8ae3SPaolo Bonzini cond_resched_lock(&kvm->mmu_lock)) { 5847c50d8ae3SPaolo Bonzini batch = 0; 5848c50d8ae3SPaolo Bonzini goto restart; 5849c50d8ae3SPaolo Bonzini } 5850c50d8ae3SPaolo Bonzini 5851c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5852c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5853c50d8ae3SPaolo Bonzini batch += nr_zapped; 5854c50d8ae3SPaolo Bonzini goto restart; 5855c50d8ae3SPaolo Bonzini } 5856c50d8ae3SPaolo Bonzini } 5857c50d8ae3SPaolo Bonzini 5858c50d8ae3SPaolo Bonzini /* 5859c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5860c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5861c50d8ae3SPaolo Bonzini * may reference the pages. 5862c50d8ae3SPaolo Bonzini */ 5863c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5864c50d8ae3SPaolo Bonzini } 5865c50d8ae3SPaolo Bonzini 5866c50d8ae3SPaolo Bonzini /* 5867c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5868c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5869c50d8ae3SPaolo Bonzini * 5870c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5871c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5872c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5873c50d8ae3SPaolo Bonzini * after calling the function. 5874c50d8ae3SPaolo Bonzini */ 5875c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5876c50d8ae3SPaolo Bonzini { 5877c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5878c50d8ae3SPaolo Bonzini 5879c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5880c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5881c50d8ae3SPaolo Bonzini 5882c50d8ae3SPaolo Bonzini /* 5883c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5884c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5885c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5886c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5887c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5888c50d8ae3SPaolo Bonzini */ 5889c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5890c50d8ae3SPaolo Bonzini 5891c50d8ae3SPaolo Bonzini /* 5892c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5893c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5894c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5895c50d8ae3SPaolo Bonzini * 5896c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5897c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5898c50d8ae3SPaolo Bonzini */ 5899c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5900c50d8ae3SPaolo Bonzini 5901c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5902c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5903c50d8ae3SPaolo Bonzini } 5904c50d8ae3SPaolo Bonzini 5905c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5906c50d8ae3SPaolo Bonzini { 5907c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5908c50d8ae3SPaolo Bonzini } 5909c50d8ae3SPaolo Bonzini 5910c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5911c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5912c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5913c50d8ae3SPaolo Bonzini { 5914c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5915c50d8ae3SPaolo Bonzini } 5916c50d8ae3SPaolo Bonzini 5917c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5918c50d8ae3SPaolo Bonzini { 5919c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5920c50d8ae3SPaolo Bonzini 5921c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5922c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5923c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5924c50d8ae3SPaolo Bonzini } 5925c50d8ae3SPaolo Bonzini 5926c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5927c50d8ae3SPaolo Bonzini { 5928c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5929c50d8ae3SPaolo Bonzini 5930c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5931c50d8ae3SPaolo Bonzini } 5932c50d8ae3SPaolo Bonzini 5933c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5934c50d8ae3SPaolo Bonzini { 5935c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5936c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5937c50d8ae3SPaolo Bonzini int i; 5938c50d8ae3SPaolo Bonzini 5939c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 5940c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5941c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5942c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5943c50d8ae3SPaolo Bonzini gfn_t start, end; 5944c50d8ae3SPaolo Bonzini 5945c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5946c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5947c50d8ae3SPaolo Bonzini if (start >= end) 5948c50d8ae3SPaolo Bonzini continue; 5949c50d8ae3SPaolo Bonzini 5950c50d8ae3SPaolo Bonzini slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, 59513bae0459SSean Christopherson PG_LEVEL_4K, 5952e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 5953c50d8ae3SPaolo Bonzini start, end - 1, true); 5954c50d8ae3SPaolo Bonzini } 5955c50d8ae3SPaolo Bonzini } 5956c50d8ae3SPaolo Bonzini 5957c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5958c50d8ae3SPaolo Bonzini } 5959c50d8ae3SPaolo Bonzini 5960c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 5961c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 5962c50d8ae3SPaolo Bonzini { 5963c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5964c50d8ae3SPaolo Bonzini } 5965c50d8ae3SPaolo Bonzini 5966c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 59673c9bd400SJay Zhou struct kvm_memory_slot *memslot, 59683c9bd400SJay Zhou int start_level) 5969c50d8ae3SPaolo Bonzini { 5970c50d8ae3SPaolo Bonzini bool flush; 5971c50d8ae3SPaolo Bonzini 5972c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 59733c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5974e662ec3eSSean Christopherson start_level, KVM_MAX_HUGEPAGE_LEVEL, false); 5975c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 5976c50d8ae3SPaolo Bonzini 5977c50d8ae3SPaolo Bonzini /* 5978c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5979c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5980c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5981c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5982c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5983c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 5984c50d8ae3SPaolo Bonzini * have checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE 5985c50d8ae3SPaolo Bonzini * instead of PT_WRITABLE_MASK, that means it does not depend 5986c50d8ae3SPaolo Bonzini * on PT_WRITABLE_MASK anymore. 5987c50d8ae3SPaolo Bonzini */ 5988c50d8ae3SPaolo Bonzini if (flush) 59897f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5990c50d8ae3SPaolo Bonzini } 5991c50d8ae3SPaolo Bonzini 5992c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 5993c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 5994c50d8ae3SPaolo Bonzini { 5995c50d8ae3SPaolo Bonzini u64 *sptep; 5996c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5997c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5998c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5999c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6000c50d8ae3SPaolo Bonzini 6001c50d8ae3SPaolo Bonzini restart: 6002c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 600357354682SSean Christopherson sp = sptep_to_sp(sptep); 6004c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 6005c50d8ae3SPaolo Bonzini 6006c50d8ae3SPaolo Bonzini /* 6007c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 6008c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 6009c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 6010c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 6011c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 6012c50d8ae3SPaolo Bonzini */ 6013c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 6014e851265aSSean Christopherson (kvm_is_zone_device_pfn(pfn) || 6015e851265aSSean Christopherson PageCompound(pfn_to_page(pfn)))) { 6016c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 6017c50d8ae3SPaolo Bonzini 6018c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 6019c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 6020c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 6021c50d8ae3SPaolo Bonzini else 6022c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 6023c50d8ae3SPaolo Bonzini 6024c50d8ae3SPaolo Bonzini goto restart; 6025c50d8ae3SPaolo Bonzini } 6026c50d8ae3SPaolo Bonzini } 6027c50d8ae3SPaolo Bonzini 6028c50d8ae3SPaolo Bonzini return need_tlb_flush; 6029c50d8ae3SPaolo Bonzini } 6030c50d8ae3SPaolo Bonzini 6031c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 6032c50d8ae3SPaolo Bonzini const struct kvm_memory_slot *memslot) 6033c50d8ae3SPaolo Bonzini { 6034c50d8ae3SPaolo Bonzini /* FIXME: const-ify all uses of struct kvm_memory_slot. */ 6035c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6036c50d8ae3SPaolo Bonzini slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot, 6037c50d8ae3SPaolo Bonzini kvm_mmu_zap_collapsible_spte, true); 6038c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6039c50d8ae3SPaolo Bonzini } 6040c50d8ae3SPaolo Bonzini 6041b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 6042b3594ffbSSean Christopherson struct kvm_memory_slot *memslot) 6043b3594ffbSSean Christopherson { 6044b3594ffbSSean Christopherson /* 60457f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 60467f42aa76SSean Christopherson * are related to dirty logging, and do the TLB flush out of mmu_lock. 60477f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 60487f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 60497f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 6050b3594ffbSSean Christopherson */ 6051b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 6052cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 6053cec37648SSean Christopherson memslot->npages); 6054b3594ffbSSean Christopherson } 6055b3594ffbSSean Christopherson 6056c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 6057c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 6058c50d8ae3SPaolo Bonzini { 6059c50d8ae3SPaolo Bonzini bool flush; 6060c50d8ae3SPaolo Bonzini 6061c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6062c50d8ae3SPaolo Bonzini flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false); 6063c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6064c50d8ae3SPaolo Bonzini 6065c50d8ae3SPaolo Bonzini /* 6066c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 6067c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 6068c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 6069c50d8ae3SPaolo Bonzini * dirty_bitmap. 6070c50d8ae3SPaolo Bonzini */ 6071c50d8ae3SPaolo Bonzini if (flush) 60727f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 6073c50d8ae3SPaolo Bonzini } 6074c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty); 6075c50d8ae3SPaolo Bonzini 6076c50d8ae3SPaolo Bonzini void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 6077c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 6078c50d8ae3SPaolo Bonzini { 6079c50d8ae3SPaolo Bonzini bool flush; 6080c50d8ae3SPaolo Bonzini 6081c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6082c50d8ae3SPaolo Bonzini flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect, 6083c50d8ae3SPaolo Bonzini false); 6084c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6085c50d8ae3SPaolo Bonzini 6086c50d8ae3SPaolo Bonzini if (flush) 60877f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 6088c50d8ae3SPaolo Bonzini } 6089c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access); 6090c50d8ae3SPaolo Bonzini 6091c50d8ae3SPaolo Bonzini void kvm_mmu_slot_set_dirty(struct kvm *kvm, 6092c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 6093c50d8ae3SPaolo Bonzini { 6094c50d8ae3SPaolo Bonzini bool flush; 6095c50d8ae3SPaolo Bonzini 6096c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6097c50d8ae3SPaolo Bonzini flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false); 6098c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6099c50d8ae3SPaolo Bonzini 6100c50d8ae3SPaolo Bonzini if (flush) 61017f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 6102c50d8ae3SPaolo Bonzini } 6103c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty); 6104c50d8ae3SPaolo Bonzini 6105c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 6106c50d8ae3SPaolo Bonzini { 6107c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 6108c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6109c50d8ae3SPaolo Bonzini int ign; 6110c50d8ae3SPaolo Bonzini 6111c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6112c50d8ae3SPaolo Bonzini restart: 6113c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 6114f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 6115c50d8ae3SPaolo Bonzini continue; 6116c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 6117c50d8ae3SPaolo Bonzini goto restart; 6118c50d8ae3SPaolo Bonzini if (cond_resched_lock(&kvm->mmu_lock)) 6119c50d8ae3SPaolo Bonzini goto restart; 6120c50d8ae3SPaolo Bonzini } 6121c50d8ae3SPaolo Bonzini 6122c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 6123c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6124c50d8ae3SPaolo Bonzini } 6125c50d8ae3SPaolo Bonzini 6126c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 6127c50d8ae3SPaolo Bonzini { 6128c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 6129c50d8ae3SPaolo Bonzini 6130c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 6131c50d8ae3SPaolo Bonzini 6132c50d8ae3SPaolo Bonzini /* 6133c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 6134c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 6135c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 6136c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 6137c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 6138c50d8ae3SPaolo Bonzini */ 6139c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 6140c50d8ae3SPaolo Bonzini 6141c50d8ae3SPaolo Bonzini /* 6142c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 6143c50d8ae3SPaolo Bonzini * zap all shadow pages. 6144c50d8ae3SPaolo Bonzini */ 6145c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 6146c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 6147c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6148c50d8ae3SPaolo Bonzini } 6149c50d8ae3SPaolo Bonzini } 6150c50d8ae3SPaolo Bonzini 6151c50d8ae3SPaolo Bonzini static unsigned long 6152c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 6153c50d8ae3SPaolo Bonzini { 6154c50d8ae3SPaolo Bonzini struct kvm *kvm; 6155c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 6156c50d8ae3SPaolo Bonzini unsigned long freed = 0; 6157c50d8ae3SPaolo Bonzini 6158c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6159c50d8ae3SPaolo Bonzini 6160c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6161c50d8ae3SPaolo Bonzini int idx; 6162c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6163c50d8ae3SPaolo Bonzini 6164c50d8ae3SPaolo Bonzini /* 6165c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 6166c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 6167c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 6168c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 6169c50d8ae3SPaolo Bonzini */ 6170c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 6171c50d8ae3SPaolo Bonzini break; 6172c50d8ae3SPaolo Bonzini /* 6173c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 6174c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 6175c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 6176c50d8ae3SPaolo Bonzini * anyway. 6177c50d8ae3SPaolo Bonzini */ 6178c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 6179c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 6180c50d8ae3SPaolo Bonzini continue; 6181c50d8ae3SPaolo Bonzini 6182c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 6183c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6184c50d8ae3SPaolo Bonzini 6185c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 6186c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 6187c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 6188c50d8ae3SPaolo Bonzini goto unlock; 6189c50d8ae3SPaolo Bonzini } 6190c50d8ae3SPaolo Bonzini 6191ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 6192c50d8ae3SPaolo Bonzini 6193c50d8ae3SPaolo Bonzini unlock: 6194c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6195c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 6196c50d8ae3SPaolo Bonzini 6197c50d8ae3SPaolo Bonzini /* 6198c50d8ae3SPaolo Bonzini * unfair on small ones 6199c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 6200c50d8ae3SPaolo Bonzini * sadness comes quickly 6201c50d8ae3SPaolo Bonzini */ 6202c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 6203c50d8ae3SPaolo Bonzini break; 6204c50d8ae3SPaolo Bonzini } 6205c50d8ae3SPaolo Bonzini 6206c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6207c50d8ae3SPaolo Bonzini return freed; 6208c50d8ae3SPaolo Bonzini } 6209c50d8ae3SPaolo Bonzini 6210c50d8ae3SPaolo Bonzini static unsigned long 6211c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 6212c50d8ae3SPaolo Bonzini { 6213c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 6214c50d8ae3SPaolo Bonzini } 6215c50d8ae3SPaolo Bonzini 6216c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 6217c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 6218c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 6219c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 6220c50d8ae3SPaolo Bonzini }; 6221c50d8ae3SPaolo Bonzini 6222c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 6223c50d8ae3SPaolo Bonzini { 6224c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 6225c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 6226c50d8ae3SPaolo Bonzini } 6227c50d8ae3SPaolo Bonzini 6228c50d8ae3SPaolo Bonzini static void kvm_set_mmio_spte_mask(void) 6229c50d8ae3SPaolo Bonzini { 6230c50d8ae3SPaolo Bonzini u64 mask; 6231c50d8ae3SPaolo Bonzini 6232c50d8ae3SPaolo Bonzini /* 62336129ed87SSean Christopherson * Set a reserved PA bit in MMIO SPTEs to generate page faults with 62346129ed87SSean Christopherson * PFEC.RSVD=1 on MMIO accesses. 64-bit PTEs (PAE, x86-64, and EPT 62356129ed87SSean Christopherson * paging) support a maximum of 52 bits of PA, i.e. if the CPU supports 62366129ed87SSean Christopherson * 52-bit physical addresses then there are no reserved PA bits in the 62376129ed87SSean Christopherson * PTEs and so the reserved PA approach must be disabled. 6238c50d8ae3SPaolo Bonzini */ 62396129ed87SSean Christopherson if (shadow_phys_bits < 52) 62406129ed87SSean Christopherson mask = BIT_ULL(51) | PT_PRESENT_MASK; 62416129ed87SSean Christopherson else 62426129ed87SSean Christopherson mask = 0; 6243c50d8ae3SPaolo Bonzini 6244e7581cacSPaolo Bonzini kvm_mmu_set_mmio_spte_mask(mask, ACC_WRITE_MASK | ACC_USER_MASK); 6245c50d8ae3SPaolo Bonzini } 6246c50d8ae3SPaolo Bonzini 6247c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 6248c50d8ae3SPaolo Bonzini { 6249c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 6250c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 6251c50d8ae3SPaolo Bonzini } 6252c50d8ae3SPaolo Bonzini 6253c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 6254c50d8ae3SPaolo Bonzini { 6255c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 6256c50d8ae3SPaolo Bonzini } 6257c50d8ae3SPaolo Bonzini 6258c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 6259c50d8ae3SPaolo Bonzini { 6260c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 6261c50d8ae3SPaolo Bonzini bool new_val; 6262c50d8ae3SPaolo Bonzini 6263c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 6264c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 6265c50d8ae3SPaolo Bonzini new_val = 0; 6266c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 6267c50d8ae3SPaolo Bonzini new_val = 1; 6268c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 6269c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 6270c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 6271c50d8ae3SPaolo Bonzini return -EINVAL; 6272c50d8ae3SPaolo Bonzini 6273c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 6274c50d8ae3SPaolo Bonzini 6275c50d8ae3SPaolo Bonzini if (new_val != old_val) { 6276c50d8ae3SPaolo Bonzini struct kvm *kvm; 6277c50d8ae3SPaolo Bonzini 6278c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6279c50d8ae3SPaolo Bonzini 6280c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6281c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 6282c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6283c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 6284c50d8ae3SPaolo Bonzini 6285c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6286c50d8ae3SPaolo Bonzini } 6287c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6288c50d8ae3SPaolo Bonzini } 6289c50d8ae3SPaolo Bonzini 6290c50d8ae3SPaolo Bonzini return 0; 6291c50d8ae3SPaolo Bonzini } 6292c50d8ae3SPaolo Bonzini 6293c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 6294c50d8ae3SPaolo Bonzini { 6295c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 6296c50d8ae3SPaolo Bonzini 6297c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 6298c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 6299c50d8ae3SPaolo Bonzini 6300c50d8ae3SPaolo Bonzini /* 6301c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 6302c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 6303c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 6304c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 6305c50d8ae3SPaolo Bonzini */ 6306c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 6307c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 6308c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 6309c50d8ae3SPaolo Bonzini 6310c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 6311c50d8ae3SPaolo Bonzini 6312c50d8ae3SPaolo Bonzini kvm_set_mmio_spte_mask(); 6313c50d8ae3SPaolo Bonzini 6314c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 6315c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 6316c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6317c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 6318c50d8ae3SPaolo Bonzini goto out; 6319c50d8ae3SPaolo Bonzini 6320c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 6321c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 6322c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6323c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 6324c50d8ae3SPaolo Bonzini goto out; 6325c50d8ae3SPaolo Bonzini 6326c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 6327c50d8ae3SPaolo Bonzini goto out; 6328c50d8ae3SPaolo Bonzini 6329c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6330c50d8ae3SPaolo Bonzini if (ret) 6331c50d8ae3SPaolo Bonzini goto out; 6332c50d8ae3SPaolo Bonzini 6333c50d8ae3SPaolo Bonzini return 0; 6334c50d8ae3SPaolo Bonzini 6335c50d8ae3SPaolo Bonzini out: 6336c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6337c50d8ae3SPaolo Bonzini return ret; 6338c50d8ae3SPaolo Bonzini } 6339c50d8ae3SPaolo Bonzini 6340c50d8ae3SPaolo Bonzini /* 6341c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 6342c50d8ae3SPaolo Bonzini */ 6343c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 6344c50d8ae3SPaolo Bonzini { 6345c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 6346c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 6347c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 6348c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 6349c50d8ae3SPaolo Bonzini int i; 6350c50d8ae3SPaolo Bonzini 6351c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 6352c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 6353c50d8ae3SPaolo Bonzini 6354c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 6355c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 6356c50d8ae3SPaolo Bonzini } 6357c50d8ae3SPaolo Bonzini 6358c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 6359c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 6360c50d8ae3SPaolo Bonzini 6361c50d8ae3SPaolo Bonzini return nr_mmu_pages; 6362c50d8ae3SPaolo Bonzini } 6363c50d8ae3SPaolo Bonzini 6364c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6365c50d8ae3SPaolo Bonzini { 6366c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6367c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6368c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6369c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6370c50d8ae3SPaolo Bonzini } 6371c50d8ae3SPaolo Bonzini 6372c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6373c50d8ae3SPaolo Bonzini { 6374c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6375c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6376c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6377c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6378c50d8ae3SPaolo Bonzini } 6379c50d8ae3SPaolo Bonzini 6380c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 6381c50d8ae3SPaolo Bonzini { 6382c50d8ae3SPaolo Bonzini unsigned int old_val; 6383c50d8ae3SPaolo Bonzini int err; 6384c50d8ae3SPaolo Bonzini 6385c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 6386c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6387c50d8ae3SPaolo Bonzini if (err) 6388c50d8ae3SPaolo Bonzini return err; 6389c50d8ae3SPaolo Bonzini 6390c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 6391c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 6392c50d8ae3SPaolo Bonzini struct kvm *kvm; 6393c50d8ae3SPaolo Bonzini 6394c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6395c50d8ae3SPaolo Bonzini 6396c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6397c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6398c50d8ae3SPaolo Bonzini 6399c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6400c50d8ae3SPaolo Bonzini } 6401c50d8ae3SPaolo Bonzini 6402c50d8ae3SPaolo Bonzini return err; 6403c50d8ae3SPaolo Bonzini } 6404c50d8ae3SPaolo Bonzini 6405c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6406c50d8ae3SPaolo Bonzini { 6407c50d8ae3SPaolo Bonzini int rcu_idx; 6408c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6409c50d8ae3SPaolo Bonzini unsigned int ratio; 6410c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6411c50d8ae3SPaolo Bonzini ulong to_zap; 6412c50d8ae3SPaolo Bonzini 6413c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6414c50d8ae3SPaolo Bonzini spin_lock(&kvm->mmu_lock); 6415c50d8ae3SPaolo Bonzini 6416c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6417c50d8ae3SPaolo Bonzini to_zap = ratio ? DIV_ROUND_UP(kvm->stat.nx_lpage_splits, ratio) : 0; 64187d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 64197d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 64207d919c7aSSean Christopherson break; 64217d919c7aSSean Christopherson 6422c50d8ae3SPaolo Bonzini /* 6423c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6424c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6425c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6426c50d8ae3SPaolo Bonzini */ 6427c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6428c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6429c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6430c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6431c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6432c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 6433c50d8ae3SPaolo Bonzini 64347d919c7aSSean Christopherson if (need_resched() || spin_needbreak(&kvm->mmu_lock)) { 6435c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 6436c50d8ae3SPaolo Bonzini cond_resched_lock(&kvm->mmu_lock); 6437c50d8ae3SPaolo Bonzini } 6438c50d8ae3SPaolo Bonzini } 6439e8950569SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 6440c50d8ae3SPaolo Bonzini 6441c50d8ae3SPaolo Bonzini spin_unlock(&kvm->mmu_lock); 6442c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6443c50d8ae3SPaolo Bonzini } 6444c50d8ae3SPaolo Bonzini 6445c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6446c50d8ae3SPaolo Bonzini { 6447c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6448c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6449c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6450c50d8ae3SPaolo Bonzini } 6451c50d8ae3SPaolo Bonzini 6452c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6453c50d8ae3SPaolo Bonzini { 6454c50d8ae3SPaolo Bonzini u64 start_time; 6455c50d8ae3SPaolo Bonzini long remaining_time; 6456c50d8ae3SPaolo Bonzini 6457c50d8ae3SPaolo Bonzini while (true) { 6458c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6459c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6460c50d8ae3SPaolo Bonzini 6461c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6462c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6463c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6464c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6465c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6466c50d8ae3SPaolo Bonzini } 6467c50d8ae3SPaolo Bonzini 6468c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6469c50d8ae3SPaolo Bonzini 6470c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6471c50d8ae3SPaolo Bonzini return 0; 6472c50d8ae3SPaolo Bonzini 6473c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6474c50d8ae3SPaolo Bonzini } 6475c50d8ae3SPaolo Bonzini } 6476c50d8ae3SPaolo Bonzini 6477c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6478c50d8ae3SPaolo Bonzini { 6479c50d8ae3SPaolo Bonzini int err; 6480c50d8ae3SPaolo Bonzini 6481c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6482c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6483c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6484c50d8ae3SPaolo Bonzini if (!err) 6485c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6486c50d8ae3SPaolo Bonzini 6487c50d8ae3SPaolo Bonzini return err; 6488c50d8ae3SPaolo Bonzini } 6489c50d8ae3SPaolo Bonzini 6490c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6491c50d8ae3SPaolo Bonzini { 6492c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6493c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6494c50d8ae3SPaolo Bonzini } 6495