1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56fc9bf2e0SSean Christopherson #include "paging.h" 57fc9bf2e0SSean Christopherson 58c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 59c50d8ae3SPaolo Bonzini 60a9d6496dSShaokun Zhang int __read_mostly nx_huge_pages = -1; 614dfe4f40SJunaid Shahid static uint __read_mostly nx_huge_pages_recovery_period_ms; 62c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 63c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 64c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 65c50d8ae3SPaolo Bonzini #else 66c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 67c50d8ae3SPaolo Bonzini #endif 68c50d8ae3SPaolo Bonzini 69c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 704dfe4f40SJunaid Shahid static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp); 71c50d8ae3SPaolo Bonzini 72d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 73c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 74c50d8ae3SPaolo Bonzini .get = param_get_bool, 75c50d8ae3SPaolo Bonzini }; 76c50d8ae3SPaolo Bonzini 774dfe4f40SJunaid Shahid static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = { 784dfe4f40SJunaid Shahid .set = set_nx_huge_pages_recovery_param, 79c50d8ae3SPaolo Bonzini .get = param_get_uint, 80c50d8ae3SPaolo Bonzini }; 81c50d8ae3SPaolo Bonzini 82c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 83c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 844dfe4f40SJunaid Shahid module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops, 85c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 86c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 874dfe4f40SJunaid Shahid module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops, 884dfe4f40SJunaid Shahid &nx_huge_pages_recovery_period_ms, 0644); 894dfe4f40SJunaid Shahid __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint"); 90c50d8ae3SPaolo Bonzini 9171fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 9271fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 9371fe7013SSean Christopherson 94c50d8ae3SPaolo Bonzini /* 95c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 96c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 97c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 98c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 99c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 100c50d8ae3SPaolo Bonzini */ 101c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 102c50d8ae3SPaolo Bonzini 1031d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 104746700d2SWei Huang static int tdp_root_level __read_mostly; 10583013059SSean Christopherson static int max_tdp_level __read_mostly; 106703c335dSSean Christopherson 107c50d8ae3SPaolo Bonzini enum { 108c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 109c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 110c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 111c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 112c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 113c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 114c50d8ae3SPaolo Bonzini }; 115c50d8ae3SPaolo Bonzini 116c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1175a9624afSPaolo Bonzini bool dbg = 0; 118c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 119c50d8ae3SPaolo Bonzini #endif 120c50d8ae3SPaolo Bonzini 121c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 122c50d8ae3SPaolo Bonzini 123c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 124c50d8ae3SPaolo Bonzini 125c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 126c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 127c50d8ae3SPaolo Bonzini 128c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 129c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 130c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 131c50d8ae3SPaolo Bonzini 132c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 133c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 134c50d8ae3SPaolo Bonzini 135c50d8ae3SPaolo Bonzini 136c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 137c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 138c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 139c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 140c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 141c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 142c50d8ae3SPaolo Bonzini 143c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 144c50d8ae3SPaolo Bonzini 145dc1cff96SPeter Xu /* make pte_list_desc fit well in cache lines */ 14613236e25SPeter Xu #define PTE_LIST_EXT 14 147c50d8ae3SPaolo Bonzini 14813236e25SPeter Xu /* 14913236e25SPeter Xu * Slight optimization of cacheline layout, by putting `more' and `spte_count' 15013236e25SPeter Xu * at the start; then accessing it will only use one single cacheline for 15113236e25SPeter Xu * either full (entries==PTE_LIST_EXT) case or entries<=6. 15213236e25SPeter Xu */ 153c50d8ae3SPaolo Bonzini struct pte_list_desc { 154c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 15513236e25SPeter Xu /* 15613236e25SPeter Xu * Stores number of entries stored in the pte_list_desc. No need to be 15713236e25SPeter Xu * u64 but just for easier alignment. When PTE_LIST_EXT, means full. 15813236e25SPeter Xu */ 15913236e25SPeter Xu u64 spte_count; 16013236e25SPeter Xu u64 *sptes[PTE_LIST_EXT]; 161c50d8ae3SPaolo Bonzini }; 162c50d8ae3SPaolo Bonzini 163c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 164c50d8ae3SPaolo Bonzini u64 addr; 165c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 166c50d8ae3SPaolo Bonzini u64 *sptep; 167c50d8ae3SPaolo Bonzini int level; 168c50d8ae3SPaolo Bonzini unsigned index; 169c50d8ae3SPaolo Bonzini }; 170c50d8ae3SPaolo Bonzini 171c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 172c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 173c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 174c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 175c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 176c50d8ae3SPaolo Bonzini 177c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 178c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 179c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 180c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 181c50d8ae3SPaolo Bonzini 182c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 183c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 184c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 185c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 186c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 187c50d8ae3SPaolo Bonzini 188c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 18902c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 190c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 191c50d8ae3SPaolo Bonzini 192c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 193c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 194c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 195c50d8ae3SPaolo Bonzini 196594e91a1SSean Christopherson struct kvm_mmu_role_regs { 197594e91a1SSean Christopherson const unsigned long cr0; 198594e91a1SSean Christopherson const unsigned long cr4; 199594e91a1SSean Christopherson const u64 efer; 200594e91a1SSean Christopherson }; 201594e91a1SSean Christopherson 202c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 203c50d8ae3SPaolo Bonzini #include "mmutrace.h" 204c50d8ae3SPaolo Bonzini 205594e91a1SSean Christopherson /* 206594e91a1SSean Christopherson * Yes, lot's of underscores. They're a hint that you probably shouldn't be 207594e91a1SSean Christopherson * reading from the role_regs. Once the mmu_role is constructed, it becomes 208594e91a1SSean Christopherson * the single source of truth for the MMU's state. 209594e91a1SSean Christopherson */ 210594e91a1SSean Christopherson #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \ 2114ac21457SPaolo Bonzini static inline bool __maybe_unused ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\ 212594e91a1SSean Christopherson { \ 213594e91a1SSean Christopherson return !!(regs->reg & flag); \ 214594e91a1SSean Christopherson } 215594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG); 216594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP); 217594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE); 218594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE); 219594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP); 220594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP); 221594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE); 222594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57); 223594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX); 224594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA); 225594e91a1SSean Christopherson 22660667724SSean Christopherson /* 22760667724SSean Christopherson * The MMU itself (with a valid role) is the single source of truth for the 22860667724SSean Christopherson * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The 22960667724SSean Christopherson * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1, 23060667724SSean Christopherson * and the vCPU may be incorrect/irrelevant. 23160667724SSean Christopherson */ 23260667724SSean Christopherson #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \ 2334ac21457SPaolo Bonzini static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \ 23460667724SSean Christopherson { \ 23560667724SSean Christopherson return !!(mmu->mmu_role. base_or_ext . reg##_##name); \ 23660667724SSean Christopherson } 23760667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg); 23860667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp); 23960667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse); 24060667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae); 24160667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep); 24260667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap); 24360667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke); 24460667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57); 24560667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, efer, nx); 24660667724SSean Christopherson 247594e91a1SSean Christopherson static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) 248594e91a1SSean Christopherson { 249594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 250594e91a1SSean Christopherson .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS), 251594e91a1SSean Christopherson .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS), 252594e91a1SSean Christopherson .efer = vcpu->arch.efer, 253594e91a1SSean Christopherson }; 254594e91a1SSean Christopherson 255594e91a1SSean Christopherson return regs; 256594e91a1SSean Christopherson } 257c50d8ae3SPaolo Bonzini 258f4bd6f73SSean Christopherson static int role_regs_to_root_level(struct kvm_mmu_role_regs *regs) 259f4bd6f73SSean Christopherson { 260f4bd6f73SSean Christopherson if (!____is_cr0_pg(regs)) 261f4bd6f73SSean Christopherson return 0; 262f4bd6f73SSean Christopherson else if (____is_efer_lma(regs)) 263f4bd6f73SSean Christopherson return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : 264f4bd6f73SSean Christopherson PT64_ROOT_4LEVEL; 265f4bd6f73SSean Christopherson else if (____is_cr4_pae(regs)) 266f4bd6f73SSean Christopherson return PT32E_ROOT_LEVEL; 267f4bd6f73SSean Christopherson else 268f4bd6f73SSean Christopherson return PT32_ROOT_LEVEL; 269f4bd6f73SSean Christopherson } 270c50d8ae3SPaolo Bonzini 271c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 272c50d8ae3SPaolo Bonzini { 273afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 274c50d8ae3SPaolo Bonzini } 275c50d8ae3SPaolo Bonzini 276c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 277c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 278c50d8ae3SPaolo Bonzini { 279c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 280c50d8ae3SPaolo Bonzini 281afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 282b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 283c50d8ae3SPaolo Bonzini 284c50d8ae3SPaolo Bonzini if (ret) 285c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 286c50d8ae3SPaolo Bonzini } 287c50d8ae3SPaolo Bonzini 2882f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 289c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 290c50d8ae3SPaolo Bonzini { 291c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 292c50d8ae3SPaolo Bonzini 293c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 294c50d8ae3SPaolo Bonzini range.pages = pages; 295c50d8ae3SPaolo Bonzini 296c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 297c50d8ae3SPaolo Bonzini } 298c50d8ae3SPaolo Bonzini 2998f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 3008f79b064SBen Gardon unsigned int access) 3018f79b064SBen Gardon { 302c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 3038f79b064SBen Gardon 304c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 305c236d962SSean Christopherson mmu_spte_set(sptep, spte); 306c50d8ae3SPaolo Bonzini } 307c50d8ae3SPaolo Bonzini 308c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 309c50d8ae3SPaolo Bonzini { 310c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 311c50d8ae3SPaolo Bonzini 3128a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 313c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 314c50d8ae3SPaolo Bonzini 315c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 316c50d8ae3SPaolo Bonzini } 317c50d8ae3SPaolo Bonzini 318c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 319c50d8ae3SPaolo Bonzini { 320c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 321c50d8ae3SPaolo Bonzini } 322c50d8ae3SPaolo Bonzini 323c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 324c50d8ae3SPaolo Bonzini { 325c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 326c50d8ae3SPaolo Bonzini 327c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 328c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 329c50d8ae3SPaolo Bonzini return false; 330c50d8ae3SPaolo Bonzini 331c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 332c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 333c50d8ae3SPaolo Bonzini 334c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 335c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 336c50d8ae3SPaolo Bonzini } 337c50d8ae3SPaolo Bonzini 338c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 339c50d8ae3SPaolo Bonzini { 340c50d8ae3SPaolo Bonzini return 1; 341c50d8ae3SPaolo Bonzini } 342c50d8ae3SPaolo Bonzini 343c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 344c50d8ae3SPaolo Bonzini { 345c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 346c50d8ae3SPaolo Bonzini 347c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 348c50d8ae3SPaolo Bonzini } 349c50d8ae3SPaolo Bonzini 350c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 351c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 352c50d8ae3SPaolo Bonzini { 353c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 354c50d8ae3SPaolo Bonzini } 355c50d8ae3SPaolo Bonzini 356c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 357c50d8ae3SPaolo Bonzini { 358c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 359c50d8ae3SPaolo Bonzini } 360c50d8ae3SPaolo Bonzini 361c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 362c50d8ae3SPaolo Bonzini { 363c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 364c50d8ae3SPaolo Bonzini } 365c50d8ae3SPaolo Bonzini 366c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 367c50d8ae3SPaolo Bonzini { 368c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 369c50d8ae3SPaolo Bonzini } 370c50d8ae3SPaolo Bonzini #else 371c50d8ae3SPaolo Bonzini union split_spte { 372c50d8ae3SPaolo Bonzini struct { 373c50d8ae3SPaolo Bonzini u32 spte_low; 374c50d8ae3SPaolo Bonzini u32 spte_high; 375c50d8ae3SPaolo Bonzini }; 376c50d8ae3SPaolo Bonzini u64 spte; 377c50d8ae3SPaolo Bonzini }; 378c50d8ae3SPaolo Bonzini 379c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 380c50d8ae3SPaolo Bonzini { 38157354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 382c50d8ae3SPaolo Bonzini 383c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 384c50d8ae3SPaolo Bonzini return; 385c50d8ae3SPaolo Bonzini 386c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 387c50d8ae3SPaolo Bonzini smp_wmb(); 388c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 389c50d8ae3SPaolo Bonzini } 390c50d8ae3SPaolo Bonzini 391c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 392c50d8ae3SPaolo Bonzini { 393c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 394c50d8ae3SPaolo Bonzini 395c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 396c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 397c50d8ae3SPaolo Bonzini 398c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 399c50d8ae3SPaolo Bonzini 400c50d8ae3SPaolo Bonzini /* 401c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 402c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 403c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 404c50d8ae3SPaolo Bonzini */ 405c50d8ae3SPaolo Bonzini smp_wmb(); 406c50d8ae3SPaolo Bonzini 407c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 408c50d8ae3SPaolo Bonzini } 409c50d8ae3SPaolo Bonzini 410c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 411c50d8ae3SPaolo Bonzini { 412c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 413c50d8ae3SPaolo Bonzini 414c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 415c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 416c50d8ae3SPaolo Bonzini 417c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 418c50d8ae3SPaolo Bonzini 419c50d8ae3SPaolo Bonzini /* 420c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 421c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 422c50d8ae3SPaolo Bonzini */ 423c50d8ae3SPaolo Bonzini smp_wmb(); 424c50d8ae3SPaolo Bonzini 425c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 426c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 427c50d8ae3SPaolo Bonzini } 428c50d8ae3SPaolo Bonzini 429c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 430c50d8ae3SPaolo Bonzini { 431c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 432c50d8ae3SPaolo Bonzini 433c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 434c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 435c50d8ae3SPaolo Bonzini 436c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 437c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 438c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 439c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 440c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 441c50d8ae3SPaolo Bonzini 442c50d8ae3SPaolo Bonzini return orig.spte; 443c50d8ae3SPaolo Bonzini } 444c50d8ae3SPaolo Bonzini 445c50d8ae3SPaolo Bonzini /* 446c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 447c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 448c50d8ae3SPaolo Bonzini * 449c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 450c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 451c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 452c50d8ae3SPaolo Bonzini * 453c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 454c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 455c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 456c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 457c50d8ae3SPaolo Bonzini * 458c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 459c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 460c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 461c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 462c50d8ae3SPaolo Bonzini */ 463c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 464c50d8ae3SPaolo Bonzini { 46557354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 466c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 467c50d8ae3SPaolo Bonzini int count; 468c50d8ae3SPaolo Bonzini 469c50d8ae3SPaolo Bonzini retry: 470c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 471c50d8ae3SPaolo Bonzini smp_rmb(); 472c50d8ae3SPaolo Bonzini 473c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 474c50d8ae3SPaolo Bonzini smp_rmb(); 475c50d8ae3SPaolo Bonzini 476c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 477c50d8ae3SPaolo Bonzini smp_rmb(); 478c50d8ae3SPaolo Bonzini 479c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 480c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 481c50d8ae3SPaolo Bonzini goto retry; 482c50d8ae3SPaolo Bonzini 483c50d8ae3SPaolo Bonzini return spte.spte; 484c50d8ae3SPaolo Bonzini } 485c50d8ae3SPaolo Bonzini #endif 486c50d8ae3SPaolo Bonzini 487c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 488c50d8ae3SPaolo Bonzini { 489c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 490c50d8ae3SPaolo Bonzini return false; 491c50d8ae3SPaolo Bonzini 492c50d8ae3SPaolo Bonzini /* 493c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 494c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 495c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 496c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 497c50d8ae3SPaolo Bonzini */ 498c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 499c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 500c50d8ae3SPaolo Bonzini return true; 501c50d8ae3SPaolo Bonzini 502c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 503c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 504c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 505c50d8ae3SPaolo Bonzini return true; 506c50d8ae3SPaolo Bonzini } 507c50d8ae3SPaolo Bonzini 508c50d8ae3SPaolo Bonzini return false; 509c50d8ae3SPaolo Bonzini } 510c50d8ae3SPaolo Bonzini 511c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 512c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 513c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 514c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 515c50d8ae3SPaolo Bonzini * the spte. 516c50d8ae3SPaolo Bonzini */ 517c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 518c50d8ae3SPaolo Bonzini { 519c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 520c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 521c50d8ae3SPaolo Bonzini } 522c50d8ae3SPaolo Bonzini 523c50d8ae3SPaolo Bonzini /* 524c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 525c50d8ae3SPaolo Bonzini * accessed/dirty status. 526c50d8ae3SPaolo Bonzini */ 527c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 528c50d8ae3SPaolo Bonzini { 529c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 530c50d8ae3SPaolo Bonzini 531c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 532c50d8ae3SPaolo Bonzini 533c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 534c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 535c50d8ae3SPaolo Bonzini return old_spte; 536c50d8ae3SPaolo Bonzini } 537c50d8ae3SPaolo Bonzini 538c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 539c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 540c50d8ae3SPaolo Bonzini else 541c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 542c50d8ae3SPaolo Bonzini 543c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 544c50d8ae3SPaolo Bonzini 545c50d8ae3SPaolo Bonzini return old_spte; 546c50d8ae3SPaolo Bonzini } 547c50d8ae3SPaolo Bonzini 548c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 549c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 550c50d8ae3SPaolo Bonzini * 551c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 552c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 553c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 554c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 555c50d8ae3SPaolo Bonzini * case. 556c50d8ae3SPaolo Bonzini * 557c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 558c50d8ae3SPaolo Bonzini */ 559c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 560c50d8ae3SPaolo Bonzini { 561c50d8ae3SPaolo Bonzini bool flush = false; 562c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 563c50d8ae3SPaolo Bonzini 564c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 565c50d8ae3SPaolo Bonzini return false; 566c50d8ae3SPaolo Bonzini 567c50d8ae3SPaolo Bonzini /* 568c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 569c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 570c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 571c50d8ae3SPaolo Bonzini */ 572c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 573c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 574c50d8ae3SPaolo Bonzini flush = true; 575c50d8ae3SPaolo Bonzini 576c50d8ae3SPaolo Bonzini /* 577c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 578c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 579c50d8ae3SPaolo Bonzini */ 580c50d8ae3SPaolo Bonzini 581c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 582c50d8ae3SPaolo Bonzini flush = true; 583c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 584c50d8ae3SPaolo Bonzini } 585c50d8ae3SPaolo Bonzini 586c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 587c50d8ae3SPaolo Bonzini flush = true; 588c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 589c50d8ae3SPaolo Bonzini } 590c50d8ae3SPaolo Bonzini 591c50d8ae3SPaolo Bonzini return flush; 592c50d8ae3SPaolo Bonzini } 593c50d8ae3SPaolo Bonzini 594c50d8ae3SPaolo Bonzini /* 595c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 596c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 597c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 5987fa2a347SSean Christopherson * Returns the old PTE. 599c50d8ae3SPaolo Bonzini */ 60071f51d2cSMingwei Zhang static int mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep) 601c50d8ae3SPaolo Bonzini { 602c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 603c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 60471f51d2cSMingwei Zhang int level = sptep_to_sp(sptep)->role.level; 605c50d8ae3SPaolo Bonzini 606c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 607c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 608c50d8ae3SPaolo Bonzini else 609c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 610c50d8ae3SPaolo Bonzini 611c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 6127fa2a347SSean Christopherson return old_spte; 613c50d8ae3SPaolo Bonzini 61471f51d2cSMingwei Zhang kvm_update_page_stats(kvm, level, -1); 61571f51d2cSMingwei Zhang 616c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 617c50d8ae3SPaolo Bonzini 618c50d8ae3SPaolo Bonzini /* 619c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 620c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 621c50d8ae3SPaolo Bonzini * unmap it from mmu first. 622c50d8ae3SPaolo Bonzini */ 623c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 624c50d8ae3SPaolo Bonzini 625c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 626c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 627c50d8ae3SPaolo Bonzini 628c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 629c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 630c50d8ae3SPaolo Bonzini 6317fa2a347SSean Christopherson return old_spte; 632c50d8ae3SPaolo Bonzini } 633c50d8ae3SPaolo Bonzini 634c50d8ae3SPaolo Bonzini /* 635c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 636c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 637c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 638c50d8ae3SPaolo Bonzini */ 639c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 640c50d8ae3SPaolo Bonzini { 641c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 642c50d8ae3SPaolo Bonzini } 643c50d8ae3SPaolo Bonzini 644c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 645c50d8ae3SPaolo Bonzini { 646c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 647c50d8ae3SPaolo Bonzini } 648c50d8ae3SPaolo Bonzini 649c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 650c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 651c50d8ae3SPaolo Bonzini { 652c50d8ae3SPaolo Bonzini u64 new_spte = spte; 6538a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 6548a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 655c50d8ae3SPaolo Bonzini 656c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 657c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 658c50d8ae3SPaolo Bonzini 659c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 6608a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 6618a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 662c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 663c50d8ae3SPaolo Bonzini 664c50d8ae3SPaolo Bonzini return new_spte; 665c50d8ae3SPaolo Bonzini } 666c50d8ae3SPaolo Bonzini 667c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 668c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 669c50d8ae3SPaolo Bonzini { 670c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 671c50d8ae3SPaolo Bonzini 672c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 673c50d8ae3SPaolo Bonzini return false; 674c50d8ae3SPaolo Bonzini 675c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 676c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 677c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 678c50d8ae3SPaolo Bonzini } else { 679c50d8ae3SPaolo Bonzini /* 680c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 681c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 682c50d8ae3SPaolo Bonzini */ 683c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 684c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 685c50d8ae3SPaolo Bonzini 686c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 687c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 688c50d8ae3SPaolo Bonzini } 689c50d8ae3SPaolo Bonzini 690c50d8ae3SPaolo Bonzini return true; 691c50d8ae3SPaolo Bonzini } 692c50d8ae3SPaolo Bonzini 693c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 694c50d8ae3SPaolo Bonzini { 695c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 696c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_begin(); 697c5c8c7c5SDavid Matlack } else { 698c50d8ae3SPaolo Bonzini /* 699c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 700c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 701c50d8ae3SPaolo Bonzini */ 702c50d8ae3SPaolo Bonzini local_irq_disable(); 703c50d8ae3SPaolo Bonzini 704c50d8ae3SPaolo Bonzini /* 705c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 706c50d8ae3SPaolo Bonzini * to vcpu->mode. 707c50d8ae3SPaolo Bonzini */ 708c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 709c50d8ae3SPaolo Bonzini } 710c5c8c7c5SDavid Matlack } 711c50d8ae3SPaolo Bonzini 712c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 713c50d8ae3SPaolo Bonzini { 714c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 715c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_end(); 716c5c8c7c5SDavid Matlack } else { 717c50d8ae3SPaolo Bonzini /* 718c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 719c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 720c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 721c50d8ae3SPaolo Bonzini */ 722c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 723c50d8ae3SPaolo Bonzini local_irq_enable(); 724c50d8ae3SPaolo Bonzini } 725c5c8c7c5SDavid Matlack } 726c50d8ae3SPaolo Bonzini 727378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 728c50d8ae3SPaolo Bonzini { 729c50d8ae3SPaolo Bonzini int r; 730c50d8ae3SPaolo Bonzini 731531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 73294ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 733531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 734c50d8ae3SPaolo Bonzini if (r) 735c50d8ae3SPaolo Bonzini return r; 73694ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 737171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 738171a90d7SSean Christopherson if (r) 739171a90d7SSean Christopherson return r; 740378f5cd6SSean Christopherson if (maybe_indirect) { 74194ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 742171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 743c50d8ae3SPaolo Bonzini if (r) 744c50d8ae3SPaolo Bonzini return r; 745378f5cd6SSean Christopherson } 74694ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 747531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 748c50d8ae3SPaolo Bonzini } 749c50d8ae3SPaolo Bonzini 750c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 751c50d8ae3SPaolo Bonzini { 75294ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 75394ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 75494ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 75594ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 756c50d8ae3SPaolo Bonzini } 757c50d8ae3SPaolo Bonzini 758c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 759c50d8ae3SPaolo Bonzini { 76094ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 761c50d8ae3SPaolo Bonzini } 762c50d8ae3SPaolo Bonzini 763c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 764c50d8ae3SPaolo Bonzini { 765c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 766c50d8ae3SPaolo Bonzini } 767c50d8ae3SPaolo Bonzini 768c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 769c50d8ae3SPaolo Bonzini { 770c50d8ae3SPaolo Bonzini if (!sp->role.direct) 771c50d8ae3SPaolo Bonzini return sp->gfns[index]; 772c50d8ae3SPaolo Bonzini 773c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 774c50d8ae3SPaolo Bonzini } 775c50d8ae3SPaolo Bonzini 776c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 777c50d8ae3SPaolo Bonzini { 778c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 779c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 780c50d8ae3SPaolo Bonzini return; 781c50d8ae3SPaolo Bonzini } 782c50d8ae3SPaolo Bonzini 783c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 784c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 785c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 786c50d8ae3SPaolo Bonzini sp->gfn, 787c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 788c50d8ae3SPaolo Bonzini } 789c50d8ae3SPaolo Bonzini 790c50d8ae3SPaolo Bonzini /* 791c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 792c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 793c50d8ae3SPaolo Bonzini */ 794c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 7958ca6f063SBen Gardon const struct kvm_memory_slot *slot, int level) 796c50d8ae3SPaolo Bonzini { 797c50d8ae3SPaolo Bonzini unsigned long idx; 798c50d8ae3SPaolo Bonzini 799c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 800c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 801c50d8ae3SPaolo Bonzini } 802c50d8ae3SPaolo Bonzini 803269e9552SHamza Mahfooz static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot, 804c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 805c50d8ae3SPaolo Bonzini { 806c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 807c50d8ae3SPaolo Bonzini int i; 808c50d8ae3SPaolo Bonzini 8093bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 810c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 811c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 812c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 813c50d8ae3SPaolo Bonzini } 814c50d8ae3SPaolo Bonzini } 815c50d8ae3SPaolo Bonzini 816269e9552SHamza Mahfooz void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 817c50d8ae3SPaolo Bonzini { 818c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 819c50d8ae3SPaolo Bonzini } 820c50d8ae3SPaolo Bonzini 821269e9552SHamza Mahfooz void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 822c50d8ae3SPaolo Bonzini { 823c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 824c50d8ae3SPaolo Bonzini } 825c50d8ae3SPaolo Bonzini 826c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 827c50d8ae3SPaolo Bonzini { 828c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 829c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 830c50d8ae3SPaolo Bonzini gfn_t gfn; 831c50d8ae3SPaolo Bonzini 832c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 833c50d8ae3SPaolo Bonzini gfn = sp->gfn; 834c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 835c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 836c50d8ae3SPaolo Bonzini 837c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 8383bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 839c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 840c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 841c50d8ae3SPaolo Bonzini 842c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 843c50d8ae3SPaolo Bonzini } 844c50d8ae3SPaolo Bonzini 84529cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 846c50d8ae3SPaolo Bonzini { 847c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 848c50d8ae3SPaolo Bonzini return; 849c50d8ae3SPaolo Bonzini 850c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 851c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 852c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 853c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 854c50d8ae3SPaolo Bonzini } 855c50d8ae3SPaolo Bonzini 856c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 857c50d8ae3SPaolo Bonzini { 858c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 859c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 860c50d8ae3SPaolo Bonzini gfn_t gfn; 861c50d8ae3SPaolo Bonzini 862c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 863c50d8ae3SPaolo Bonzini gfn = sp->gfn; 864c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 865c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 8663bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 867c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 868c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 869c50d8ae3SPaolo Bonzini 870c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 871c50d8ae3SPaolo Bonzini } 872c50d8ae3SPaolo Bonzini 87329cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 874c50d8ae3SPaolo Bonzini { 875c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 876c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 877c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 878c50d8ae3SPaolo Bonzini } 879c50d8ae3SPaolo Bonzini 880c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 881c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 882c50d8ae3SPaolo Bonzini bool no_dirty_log) 883c50d8ae3SPaolo Bonzini { 884c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 885c50d8ae3SPaolo Bonzini 886c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 88791b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 88891b0d268SPaolo Bonzini return NULL; 889044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 89091b0d268SPaolo Bonzini return NULL; 891c50d8ae3SPaolo Bonzini 892c50d8ae3SPaolo Bonzini return slot; 893c50d8ae3SPaolo Bonzini } 894c50d8ae3SPaolo Bonzini 895c50d8ae3SPaolo Bonzini /* 896c50d8ae3SPaolo Bonzini * About rmap_head encoding: 897c50d8ae3SPaolo Bonzini * 898c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 899c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 900c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 901c50d8ae3SPaolo Bonzini */ 902c50d8ae3SPaolo Bonzini 903c50d8ae3SPaolo Bonzini /* 904c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 905c50d8ae3SPaolo Bonzini */ 906c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 907c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 908c50d8ae3SPaolo Bonzini { 909c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 91013236e25SPeter Xu int count = 0; 911c50d8ae3SPaolo Bonzini 912c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 913805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 914c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 915c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 916805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 917c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 918c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 919c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 92013236e25SPeter Xu desc->spte_count = 2; 921c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 922c50d8ae3SPaolo Bonzini ++count; 923c50d8ae3SPaolo Bonzini } else { 924805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 925c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 92613236e25SPeter Xu while (desc->spte_count == PTE_LIST_EXT) { 927c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 928c6c4f961SLi RongQing if (!desc->more) { 929c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 930c50d8ae3SPaolo Bonzini desc = desc->more; 93113236e25SPeter Xu desc->spte_count = 0; 932c6c4f961SLi RongQing break; 933c6c4f961SLi RongQing } 934c6c4f961SLi RongQing desc = desc->more; 935c50d8ae3SPaolo Bonzini } 93613236e25SPeter Xu count += desc->spte_count; 93713236e25SPeter Xu desc->sptes[desc->spte_count++] = spte; 938c50d8ae3SPaolo Bonzini } 939c50d8ae3SPaolo Bonzini return count; 940c50d8ae3SPaolo Bonzini } 941c50d8ae3SPaolo Bonzini 942c50d8ae3SPaolo Bonzini static void 943c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 944c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 945c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 946c50d8ae3SPaolo Bonzini { 94713236e25SPeter Xu int j = desc->spte_count - 1; 948c50d8ae3SPaolo Bonzini 949c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 950c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 95113236e25SPeter Xu desc->spte_count--; 95213236e25SPeter Xu if (desc->spte_count) 953c50d8ae3SPaolo Bonzini return; 954c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 955fe3c2b4cSMiaohe Lin rmap_head->val = 0; 956c50d8ae3SPaolo Bonzini else 957c50d8ae3SPaolo Bonzini if (prev_desc) 958c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 959c50d8ae3SPaolo Bonzini else 960c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 961c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 962c50d8ae3SPaolo Bonzini } 963c50d8ae3SPaolo Bonzini 964c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 965c50d8ae3SPaolo Bonzini { 966c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 967c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 968c50d8ae3SPaolo Bonzini int i; 969c50d8ae3SPaolo Bonzini 970c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 971c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 972c50d8ae3SPaolo Bonzini BUG(); 973c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 974805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 975c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 976c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 977c50d8ae3SPaolo Bonzini BUG(); 978c50d8ae3SPaolo Bonzini } 979c50d8ae3SPaolo Bonzini rmap_head->val = 0; 980c50d8ae3SPaolo Bonzini } else { 981805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 982c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 983c50d8ae3SPaolo Bonzini prev_desc = NULL; 984c50d8ae3SPaolo Bonzini while (desc) { 98513236e25SPeter Xu for (i = 0; i < desc->spte_count; ++i) { 986c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 987c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 988c50d8ae3SPaolo Bonzini desc, i, prev_desc); 989c50d8ae3SPaolo Bonzini return; 990c50d8ae3SPaolo Bonzini } 991c50d8ae3SPaolo Bonzini } 992c50d8ae3SPaolo Bonzini prev_desc = desc; 993c50d8ae3SPaolo Bonzini desc = desc->more; 994c50d8ae3SPaolo Bonzini } 995c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 996c50d8ae3SPaolo Bonzini BUG(); 997c50d8ae3SPaolo Bonzini } 998c50d8ae3SPaolo Bonzini } 999c50d8ae3SPaolo Bonzini 100071f51d2cSMingwei Zhang static void pte_list_remove(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 100171f51d2cSMingwei Zhang u64 *sptep) 1002c50d8ae3SPaolo Bonzini { 100371f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, sptep); 1004c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 1005c50d8ae3SPaolo Bonzini } 1006c50d8ae3SPaolo Bonzini 1007a75b5404SPeter Xu /* Return true if rmap existed, false otherwise */ 100871f51d2cSMingwei Zhang static bool pte_list_destroy(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 1009a75b5404SPeter Xu { 1010a75b5404SPeter Xu struct pte_list_desc *desc, *next; 1011a75b5404SPeter Xu int i; 1012a75b5404SPeter Xu 1013a75b5404SPeter Xu if (!rmap_head->val) 1014a75b5404SPeter Xu return false; 1015a75b5404SPeter Xu 1016a75b5404SPeter Xu if (!(rmap_head->val & 1)) { 101771f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val); 1018a75b5404SPeter Xu goto out; 1019a75b5404SPeter Xu } 1020a75b5404SPeter Xu 1021a75b5404SPeter Xu desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1022a75b5404SPeter Xu 1023a75b5404SPeter Xu for (; desc; desc = next) { 1024a75b5404SPeter Xu for (i = 0; i < desc->spte_count; i++) 102571f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, desc->sptes[i]); 1026a75b5404SPeter Xu next = desc->more; 1027a75b5404SPeter Xu mmu_free_pte_list_desc(desc); 1028a75b5404SPeter Xu } 1029a75b5404SPeter Xu out: 1030a75b5404SPeter Xu /* rmap_head is meaningless now, remember to reset it */ 1031a75b5404SPeter Xu rmap_head->val = 0; 1032a75b5404SPeter Xu return true; 1033a75b5404SPeter Xu } 1034a75b5404SPeter Xu 10353bcd0662SPeter Xu unsigned int pte_list_count(struct kvm_rmap_head *rmap_head) 10363bcd0662SPeter Xu { 10373bcd0662SPeter Xu struct pte_list_desc *desc; 10383bcd0662SPeter Xu unsigned int count = 0; 10393bcd0662SPeter Xu 10403bcd0662SPeter Xu if (!rmap_head->val) 10413bcd0662SPeter Xu return 0; 10423bcd0662SPeter Xu else if (!(rmap_head->val & 1)) 10433bcd0662SPeter Xu return 1; 10443bcd0662SPeter Xu 10453bcd0662SPeter Xu desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 10463bcd0662SPeter Xu 10473bcd0662SPeter Xu while (desc) { 10483bcd0662SPeter Xu count += desc->spte_count; 10493bcd0662SPeter Xu desc = desc->more; 10503bcd0662SPeter Xu } 10513bcd0662SPeter Xu 10523bcd0662SPeter Xu return count; 10533bcd0662SPeter Xu } 10543bcd0662SPeter Xu 105593e083d4SDavid Matlack static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level, 1056269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1057c50d8ae3SPaolo Bonzini { 1058c50d8ae3SPaolo Bonzini unsigned long idx; 1059c50d8ae3SPaolo Bonzini 1060c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 10613bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1062c50d8ae3SPaolo Bonzini } 1063c50d8ae3SPaolo Bonzini 1064c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1065c50d8ae3SPaolo Bonzini { 1066356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 1067c50d8ae3SPaolo Bonzini 1068356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 106994ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 1070c50d8ae3SPaolo Bonzini } 1071c50d8ae3SPaolo Bonzini 1072c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1073c50d8ae3SPaolo Bonzini { 1074601f8af0SDavid Matlack struct kvm_memslots *slots; 1075601f8af0SDavid Matlack struct kvm_memory_slot *slot; 1076c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1077c50d8ae3SPaolo Bonzini gfn_t gfn; 1078c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1079c50d8ae3SPaolo Bonzini 108057354682SSean Christopherson sp = sptep_to_sp(spte); 1081c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1082601f8af0SDavid Matlack 1083601f8af0SDavid Matlack /* 108468be1306SDavid Matlack * Unlike rmap_add, rmap_remove does not run in the context of a vCPU 108568be1306SDavid Matlack * so we have to determine which memslots to use based on context 108668be1306SDavid Matlack * information in sp->role. 1087601f8af0SDavid Matlack */ 1088601f8af0SDavid Matlack slots = kvm_memslots_for_spte_role(kvm, sp->role); 1089601f8af0SDavid Matlack 1090601f8af0SDavid Matlack slot = __gfn_to_memslot(slots, gfn); 109193e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 1092601f8af0SDavid Matlack 1093c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1094c50d8ae3SPaolo Bonzini } 1095c50d8ae3SPaolo Bonzini 1096c50d8ae3SPaolo Bonzini /* 1097c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1098c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1099c50d8ae3SPaolo Bonzini */ 1100c50d8ae3SPaolo Bonzini struct rmap_iterator { 1101c50d8ae3SPaolo Bonzini /* private fields */ 1102c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1103c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1104c50d8ae3SPaolo Bonzini }; 1105c50d8ae3SPaolo Bonzini 1106c50d8ae3SPaolo Bonzini /* 1107c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1108c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 11090a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1110c50d8ae3SPaolo Bonzini * 1111c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1112c50d8ae3SPaolo Bonzini */ 1113c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1114c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1115c50d8ae3SPaolo Bonzini { 1116c50d8ae3SPaolo Bonzini u64 *sptep; 1117c50d8ae3SPaolo Bonzini 1118c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1119c50d8ae3SPaolo Bonzini return NULL; 1120c50d8ae3SPaolo Bonzini 1121c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1122c50d8ae3SPaolo Bonzini iter->desc = NULL; 1123c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1124c50d8ae3SPaolo Bonzini goto out; 1125c50d8ae3SPaolo Bonzini } 1126c50d8ae3SPaolo Bonzini 1127c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1128c50d8ae3SPaolo Bonzini iter->pos = 0; 1129c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1130c50d8ae3SPaolo Bonzini out: 1131c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1132c50d8ae3SPaolo Bonzini return sptep; 1133c50d8ae3SPaolo Bonzini } 1134c50d8ae3SPaolo Bonzini 1135c50d8ae3SPaolo Bonzini /* 1136c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1137c50d8ae3SPaolo Bonzini * 1138c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1139c50d8ae3SPaolo Bonzini */ 1140c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1141c50d8ae3SPaolo Bonzini { 1142c50d8ae3SPaolo Bonzini u64 *sptep; 1143c50d8ae3SPaolo Bonzini 1144c50d8ae3SPaolo Bonzini if (iter->desc) { 1145c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1146c50d8ae3SPaolo Bonzini ++iter->pos; 1147c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1148c50d8ae3SPaolo Bonzini if (sptep) 1149c50d8ae3SPaolo Bonzini goto out; 1150c50d8ae3SPaolo Bonzini } 1151c50d8ae3SPaolo Bonzini 1152c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1153c50d8ae3SPaolo Bonzini 1154c50d8ae3SPaolo Bonzini if (iter->desc) { 1155c50d8ae3SPaolo Bonzini iter->pos = 0; 1156c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1157c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1158c50d8ae3SPaolo Bonzini goto out; 1159c50d8ae3SPaolo Bonzini } 1160c50d8ae3SPaolo Bonzini } 1161c50d8ae3SPaolo Bonzini 1162c50d8ae3SPaolo Bonzini return NULL; 1163c50d8ae3SPaolo Bonzini out: 1164c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1165c50d8ae3SPaolo Bonzini return sptep; 1166c50d8ae3SPaolo Bonzini } 1167c50d8ae3SPaolo Bonzini 1168c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1169c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1170c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1171c50d8ae3SPaolo Bonzini 1172c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1173c50d8ae3SPaolo Bonzini { 117471f51d2cSMingwei Zhang u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep); 11757fa2a347SSean Christopherson 11767fa2a347SSean Christopherson if (is_shadow_present_pte(old_spte)) 1177c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1178c50d8ae3SPaolo Bonzini } 1179c50d8ae3SPaolo Bonzini 1180c50d8ae3SPaolo Bonzini 1181c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1182c50d8ae3SPaolo Bonzini { 1183c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 118457354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1185c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1186c50d8ae3SPaolo Bonzini return true; 1187c50d8ae3SPaolo Bonzini } 1188c50d8ae3SPaolo Bonzini 1189c50d8ae3SPaolo Bonzini return false; 1190c50d8ae3SPaolo Bonzini } 1191c50d8ae3SPaolo Bonzini 1192c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1193c50d8ae3SPaolo Bonzini { 1194c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 119557354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1196c50d8ae3SPaolo Bonzini 1197c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1198c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1199c50d8ae3SPaolo Bonzini } 1200c50d8ae3SPaolo Bonzini } 1201c50d8ae3SPaolo Bonzini 1202c50d8ae3SPaolo Bonzini /* 1203c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1204c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1205c50d8ae3SPaolo Bonzini * 1206c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1207c50d8ae3SPaolo Bonzini * protection: 1208c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1209c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1210c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1211c50d8ae3SPaolo Bonzini * shadow page. 1212c50d8ae3SPaolo Bonzini * 1213c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1214c50d8ae3SPaolo Bonzini */ 1215c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1216c50d8ae3SPaolo Bonzini { 1217c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1218c50d8ae3SPaolo Bonzini 1219c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1220c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1221c50d8ae3SPaolo Bonzini return false; 1222c50d8ae3SPaolo Bonzini 1223805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1224c50d8ae3SPaolo Bonzini 1225c50d8ae3SPaolo Bonzini if (pt_protect) 12265fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1227c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1228c50d8ae3SPaolo Bonzini 1229c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1230c50d8ae3SPaolo Bonzini } 1231c50d8ae3SPaolo Bonzini 1232c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1233c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1234c50d8ae3SPaolo Bonzini bool pt_protect) 1235c50d8ae3SPaolo Bonzini { 1236c50d8ae3SPaolo Bonzini u64 *sptep; 1237c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1238c50d8ae3SPaolo Bonzini bool flush = false; 1239c50d8ae3SPaolo Bonzini 1240c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1241c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1242c50d8ae3SPaolo Bonzini 1243c50d8ae3SPaolo Bonzini return flush; 1244c50d8ae3SPaolo Bonzini } 1245c50d8ae3SPaolo Bonzini 1246c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1247c50d8ae3SPaolo Bonzini { 1248c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1249c50d8ae3SPaolo Bonzini 1250805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1251c50d8ae3SPaolo Bonzini 1252c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1253c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1254c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1255c50d8ae3SPaolo Bonzini } 1256c50d8ae3SPaolo Bonzini 1257c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1258c50d8ae3SPaolo Bonzini { 1259c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1260c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1261c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1262c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1263c50d8ae3SPaolo Bonzini 1264c50d8ae3SPaolo Bonzini return was_writable; 1265c50d8ae3SPaolo Bonzini } 1266c50d8ae3SPaolo Bonzini 1267c50d8ae3SPaolo Bonzini /* 1268c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1269c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1270c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1271c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1272c50d8ae3SPaolo Bonzini */ 12730a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1274269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1275c50d8ae3SPaolo Bonzini { 1276c50d8ae3SPaolo Bonzini u64 *sptep; 1277c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1278c50d8ae3SPaolo Bonzini bool flush = false; 1279c50d8ae3SPaolo Bonzini 1280c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1281c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1282c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1283c50d8ae3SPaolo Bonzini else 1284c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1285c50d8ae3SPaolo Bonzini 1286c50d8ae3SPaolo Bonzini return flush; 1287c50d8ae3SPaolo Bonzini } 1288c50d8ae3SPaolo Bonzini 1289c50d8ae3SPaolo Bonzini /** 1290c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1291c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1292c50d8ae3SPaolo Bonzini * @slot: slot to protect 1293c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1294c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1295c50d8ae3SPaolo Bonzini * 129689212919SKeqian Zhu * Used when we do not need to care about huge page mappings. 1297c50d8ae3SPaolo Bonzini */ 1298c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1299c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1300c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1301c50d8ae3SPaolo Bonzini { 1302c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1303c50d8ae3SPaolo Bonzini 1304897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1305a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1306a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1307e2209710SBen Gardon 1308e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1309e2209710SBen Gardon return; 1310e2209710SBen Gardon 1311c50d8ae3SPaolo Bonzini while (mask) { 131293e083d4SDavid Matlack rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13133bae0459SSean Christopherson PG_LEVEL_4K, slot); 1314c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1315c50d8ae3SPaolo Bonzini 1316c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1317c50d8ae3SPaolo Bonzini mask &= mask - 1; 1318c50d8ae3SPaolo Bonzini } 1319c50d8ae3SPaolo Bonzini } 1320c50d8ae3SPaolo Bonzini 1321c50d8ae3SPaolo Bonzini /** 1322c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1323c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1324c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1325c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1326c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1327c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1328c50d8ae3SPaolo Bonzini * 1329c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1330c50d8ae3SPaolo Bonzini */ 1331a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1332c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1333c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1334c50d8ae3SPaolo Bonzini { 1335c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1336c50d8ae3SPaolo Bonzini 1337897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1338a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1339a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1340e2209710SBen Gardon 1341e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1342e2209710SBen Gardon return; 1343e2209710SBen Gardon 1344c50d8ae3SPaolo Bonzini while (mask) { 134593e083d4SDavid Matlack rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13463bae0459SSean Christopherson PG_LEVEL_4K, slot); 13470a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1348c50d8ae3SPaolo Bonzini 1349c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1350c50d8ae3SPaolo Bonzini mask &= mask - 1; 1351c50d8ae3SPaolo Bonzini } 1352c50d8ae3SPaolo Bonzini } 1353c50d8ae3SPaolo Bonzini 1354c50d8ae3SPaolo Bonzini /** 1355c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1356c50d8ae3SPaolo Bonzini * PT level pages. 1357c50d8ae3SPaolo Bonzini * 1358c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1359c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1360c50d8ae3SPaolo Bonzini * 136189212919SKeqian Zhu * We need to care about huge page mappings: e.g. during dirty logging we may 136289212919SKeqian Zhu * have such mappings. 1363c50d8ae3SPaolo Bonzini */ 1364c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1365c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1366c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1367c50d8ae3SPaolo Bonzini { 136889212919SKeqian Zhu /* 136989212919SKeqian Zhu * Huge pages are NOT write protected when we start dirty logging in 137089212919SKeqian Zhu * initially-all-set mode; must write protect them here so that they 137189212919SKeqian Zhu * are split to 4K on the first write. 137289212919SKeqian Zhu * 137389212919SKeqian Zhu * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn 137489212919SKeqian Zhu * of memslot has no such restriction, so the range can cross two large 137589212919SKeqian Zhu * pages. 137689212919SKeqian Zhu */ 137789212919SKeqian Zhu if (kvm_dirty_log_manual_protect_and_init_set(kvm)) { 137889212919SKeqian Zhu gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); 137989212919SKeqian Zhu gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); 138089212919SKeqian Zhu 138189212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M); 138289212919SKeqian Zhu 138389212919SKeqian Zhu /* Cross two large pages? */ 138489212919SKeqian Zhu if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) != 138589212919SKeqian Zhu ALIGN(end << PAGE_SHIFT, PMD_SIZE)) 138689212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, end, 138789212919SKeqian Zhu PG_LEVEL_2M); 138889212919SKeqian Zhu } 138989212919SKeqian Zhu 139089212919SKeqian Zhu /* Now handle 4K PTEs. */ 1391a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1392a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1393c50d8ae3SPaolo Bonzini else 1394c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1395c50d8ae3SPaolo Bonzini } 1396c50d8ae3SPaolo Bonzini 1397fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1398fb04a1edSPeter Xu { 13996dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1400fb04a1edSPeter Xu } 1401fb04a1edSPeter Xu 1402c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 14033ad93562SKeqian Zhu struct kvm_memory_slot *slot, u64 gfn, 14043ad93562SKeqian Zhu int min_level) 1405c50d8ae3SPaolo Bonzini { 1406c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1407c50d8ae3SPaolo Bonzini int i; 1408c50d8ae3SPaolo Bonzini bool write_protected = false; 1409c50d8ae3SPaolo Bonzini 1410e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 14113ad93562SKeqian Zhu for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 141293e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, i, slot); 1413c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1414c50d8ae3SPaolo Bonzini } 1415e2209710SBen Gardon } 1416c50d8ae3SPaolo Bonzini 1417897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 141846044f72SBen Gardon write_protected |= 14193ad93562SKeqian Zhu kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level); 142046044f72SBen Gardon 1421c50d8ae3SPaolo Bonzini return write_protected; 1422c50d8ae3SPaolo Bonzini } 1423c50d8ae3SPaolo Bonzini 1424c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1425c50d8ae3SPaolo Bonzini { 1426c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1427c50d8ae3SPaolo Bonzini 1428c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 14293ad93562SKeqian Zhu return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); 1430c50d8ae3SPaolo Bonzini } 1431c50d8ae3SPaolo Bonzini 14320a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1433269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1434c50d8ae3SPaolo Bonzini { 143571f51d2cSMingwei Zhang return pte_list_destroy(kvm, rmap_head); 1436c50d8ae3SPaolo Bonzini } 1437c50d8ae3SPaolo Bonzini 14383039bcc7SSean Christopherson static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1439c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14403039bcc7SSean Christopherson pte_t unused) 1441c50d8ae3SPaolo Bonzini { 14420a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1443c50d8ae3SPaolo Bonzini } 1444c50d8ae3SPaolo Bonzini 14453039bcc7SSean Christopherson static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1446c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14473039bcc7SSean Christopherson pte_t pte) 1448c50d8ae3SPaolo Bonzini { 1449c50d8ae3SPaolo Bonzini u64 *sptep; 1450c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 145198a26b69SVihas Mak bool need_flush = false; 1452c50d8ae3SPaolo Bonzini u64 new_spte; 1453c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1454c50d8ae3SPaolo Bonzini 14553039bcc7SSean Christopherson WARN_ON(pte_huge(pte)); 14563039bcc7SSean Christopherson new_pfn = pte_pfn(pte); 1457c50d8ae3SPaolo Bonzini 1458c50d8ae3SPaolo Bonzini restart: 1459c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1460805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1461c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1462c50d8ae3SPaolo Bonzini 146398a26b69SVihas Mak need_flush = true; 1464c50d8ae3SPaolo Bonzini 14653039bcc7SSean Christopherson if (pte_write(pte)) { 146671f51d2cSMingwei Zhang pte_list_remove(kvm, rmap_head, sptep); 1467c50d8ae3SPaolo Bonzini goto restart; 1468c50d8ae3SPaolo Bonzini } else { 1469cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1470cb3eedabSPaolo Bonzini *sptep, new_pfn); 1471c50d8ae3SPaolo Bonzini 147271f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, sptep); 1473c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1474c50d8ae3SPaolo Bonzini } 1475c50d8ae3SPaolo Bonzini } 1476c50d8ae3SPaolo Bonzini 1477c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1478c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 147998a26b69SVihas Mak return false; 1480c50d8ae3SPaolo Bonzini } 1481c50d8ae3SPaolo Bonzini 1482c50d8ae3SPaolo Bonzini return need_flush; 1483c50d8ae3SPaolo Bonzini } 1484c50d8ae3SPaolo Bonzini 1485c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1486c50d8ae3SPaolo Bonzini /* input fields. */ 1487269e9552SHamza Mahfooz const struct kvm_memory_slot *slot; 1488c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1489c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1490c50d8ae3SPaolo Bonzini int start_level; 1491c50d8ae3SPaolo Bonzini int end_level; 1492c50d8ae3SPaolo Bonzini 1493c50d8ae3SPaolo Bonzini /* output fields. */ 1494c50d8ae3SPaolo Bonzini gfn_t gfn; 1495c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1496c50d8ae3SPaolo Bonzini int level; 1497c50d8ae3SPaolo Bonzini 1498c50d8ae3SPaolo Bonzini /* private field. */ 1499c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1500c50d8ae3SPaolo Bonzini }; 1501c50d8ae3SPaolo Bonzini 1502c50d8ae3SPaolo Bonzini static void 1503c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1504c50d8ae3SPaolo Bonzini { 1505c50d8ae3SPaolo Bonzini iterator->level = level; 1506c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 150793e083d4SDavid Matlack iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot); 150893e083d4SDavid Matlack iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot); 1509c50d8ae3SPaolo Bonzini } 1510c50d8ae3SPaolo Bonzini 1511c50d8ae3SPaolo Bonzini static void 1512c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1513269e9552SHamza Mahfooz const struct kvm_memory_slot *slot, int start_level, 1514c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1515c50d8ae3SPaolo Bonzini { 1516c50d8ae3SPaolo Bonzini iterator->slot = slot; 1517c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1518c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1519c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1520c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1521c50d8ae3SPaolo Bonzini 1522c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1523c50d8ae3SPaolo Bonzini } 1524c50d8ae3SPaolo Bonzini 1525c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1526c50d8ae3SPaolo Bonzini { 1527c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1528c50d8ae3SPaolo Bonzini } 1529c50d8ae3SPaolo Bonzini 1530c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1531c50d8ae3SPaolo Bonzini { 1532c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1533c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1534c50d8ae3SPaolo Bonzini return; 1535c50d8ae3SPaolo Bonzini } 1536c50d8ae3SPaolo Bonzini 1537c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1538c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1539c50d8ae3SPaolo Bonzini return; 1540c50d8ae3SPaolo Bonzini } 1541c50d8ae3SPaolo Bonzini 1542c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1543c50d8ae3SPaolo Bonzini } 1544c50d8ae3SPaolo Bonzini 1545c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1546c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1547c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1548c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1549c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1550c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1551c50d8ae3SPaolo Bonzini 15523039bcc7SSean Christopherson typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1553c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 15543039bcc7SSean Christopherson int level, pte_t pte); 1555c1b91493SSean Christopherson 15563039bcc7SSean Christopherson static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm, 15573039bcc7SSean Christopherson struct kvm_gfn_range *range, 1558c1b91493SSean Christopherson rmap_handler_t handler) 1559c50d8ae3SPaolo Bonzini { 1560c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 15613039bcc7SSean Christopherson bool ret = false; 1562c50d8ae3SPaolo Bonzini 15633039bcc7SSean Christopherson for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 15643039bcc7SSean Christopherson range->start, range->end - 1, &iterator) 15653039bcc7SSean Christopherson ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, 15663039bcc7SSean Christopherson iterator.level, range->pte); 1567c50d8ae3SPaolo Bonzini 1568c50d8ae3SPaolo Bonzini return ret; 1569c50d8ae3SPaolo Bonzini } 1570c50d8ae3SPaolo Bonzini 15713039bcc7SSean Christopherson bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 1572c50d8ae3SPaolo Bonzini { 1573e2209710SBen Gardon bool flush = false; 1574c50d8ae3SPaolo Bonzini 1575e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15763039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp); 1577063afacdSBen Gardon 1578897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1579c7785d85SHou Wenlong flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush); 1580063afacdSBen Gardon 15813039bcc7SSean Christopherson return flush; 1582c50d8ae3SPaolo Bonzini } 1583c50d8ae3SPaolo Bonzini 15843039bcc7SSean Christopherson bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1585c50d8ae3SPaolo Bonzini { 1586e2209710SBen Gardon bool flush = false; 15871d8dd6b3SBen Gardon 1588e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15893039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp); 15901d8dd6b3SBen Gardon 1591897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15923039bcc7SSean Christopherson flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range); 15931d8dd6b3SBen Gardon 15943039bcc7SSean Christopherson return flush; 1595c50d8ae3SPaolo Bonzini } 1596c50d8ae3SPaolo Bonzini 15973039bcc7SSean Christopherson static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1598c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 15993039bcc7SSean Christopherson pte_t unused) 1600c50d8ae3SPaolo Bonzini { 1601c50d8ae3SPaolo Bonzini u64 *sptep; 16023f649ab7SKees Cook struct rmap_iterator iter; 1603c50d8ae3SPaolo Bonzini int young = 0; 1604c50d8ae3SPaolo Bonzini 1605c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1606c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1607c50d8ae3SPaolo Bonzini 1608c50d8ae3SPaolo Bonzini return young; 1609c50d8ae3SPaolo Bonzini } 1610c50d8ae3SPaolo Bonzini 16113039bcc7SSean Christopherson static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1612c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 16133039bcc7SSean Christopherson int level, pte_t unused) 1614c50d8ae3SPaolo Bonzini { 1615c50d8ae3SPaolo Bonzini u64 *sptep; 1616c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1617c50d8ae3SPaolo Bonzini 1618c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1619c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 162098a26b69SVihas Mak return true; 162198a26b69SVihas Mak return false; 1622c50d8ae3SPaolo Bonzini } 1623c50d8ae3SPaolo Bonzini 1624c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1625c50d8ae3SPaolo Bonzini 16268a9f566aSDavid Matlack static void rmap_add(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot, 16278a9f566aSDavid Matlack u64 *spte, gfn_t gfn) 1628c50d8ae3SPaolo Bonzini { 1629c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 163068be1306SDavid Matlack struct kvm_rmap_head *rmap_head; 163168be1306SDavid Matlack int rmap_count; 1632c50d8ae3SPaolo Bonzini 163357354682SSean Christopherson sp = sptep_to_sp(spte); 163468be1306SDavid Matlack kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 163593e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 163668be1306SDavid Matlack rmap_count = pte_list_add(vcpu, spte, rmap_head); 1637c50d8ae3SPaolo Bonzini 163868be1306SDavid Matlack if (rmap_count > RMAP_RECYCLE_THRESHOLD) { 16393039bcc7SSean Christopherson kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0)); 164068be1306SDavid Matlack kvm_flush_remote_tlbs_with_address( 164168be1306SDavid Matlack vcpu->kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level)); 164268be1306SDavid Matlack } 1643c50d8ae3SPaolo Bonzini } 1644c50d8ae3SPaolo Bonzini 16453039bcc7SSean Christopherson bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1646c50d8ae3SPaolo Bonzini { 1647e2209710SBen Gardon bool young = false; 1648f8e14497SBen Gardon 1649e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16503039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp); 16513039bcc7SSean Christopherson 1652897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16533039bcc7SSean Christopherson young |= kvm_tdp_mmu_age_gfn_range(kvm, range); 1654f8e14497SBen Gardon 1655f8e14497SBen Gardon return young; 1656c50d8ae3SPaolo Bonzini } 1657c50d8ae3SPaolo Bonzini 16583039bcc7SSean Christopherson bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1659c50d8ae3SPaolo Bonzini { 1660e2209710SBen Gardon bool young = false; 1661f8e14497SBen Gardon 1662e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16633039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp); 16643039bcc7SSean Christopherson 1665897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16663039bcc7SSean Christopherson young |= kvm_tdp_mmu_test_age_gfn(kvm, range); 1667f8e14497SBen Gardon 1668f8e14497SBen Gardon return young; 1669c50d8ae3SPaolo Bonzini } 1670c50d8ae3SPaolo Bonzini 1671c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1672c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1673c50d8ae3SPaolo Bonzini { 1674c50d8ae3SPaolo Bonzini u64 *pos; 1675c50d8ae3SPaolo Bonzini u64 *end; 1676c50d8ae3SPaolo Bonzini 1677c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1678c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1679c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1680c50d8ae3SPaolo Bonzini pos, *pos); 1681c50d8ae3SPaolo Bonzini return 0; 1682c50d8ae3SPaolo Bonzini } 1683c50d8ae3SPaolo Bonzini return 1; 1684c50d8ae3SPaolo Bonzini } 1685c50d8ae3SPaolo Bonzini #endif 1686c50d8ae3SPaolo Bonzini 1687c50d8ae3SPaolo Bonzini /* 1688c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1689c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1690c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1691c50d8ae3SPaolo Bonzini * faster 1692c50d8ae3SPaolo Bonzini */ 1693d5aaad6fSSean Christopherson static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr) 1694c50d8ae3SPaolo Bonzini { 1695c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1696c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1697c50d8ae3SPaolo Bonzini } 1698c50d8ae3SPaolo Bonzini 1699c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1700c50d8ae3SPaolo Bonzini { 1701c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1702c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1703c50d8ae3SPaolo Bonzini list_del(&sp->link); 1704c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1705c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1706c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1707c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1708c50d8ae3SPaolo Bonzini } 1709c50d8ae3SPaolo Bonzini 1710c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1711c50d8ae3SPaolo Bonzini { 1712c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1713c50d8ae3SPaolo Bonzini } 1714c50d8ae3SPaolo Bonzini 1715c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1716c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1717c50d8ae3SPaolo Bonzini { 1718c50d8ae3SPaolo Bonzini if (!parent_pte) 1719c50d8ae3SPaolo Bonzini return; 1720c50d8ae3SPaolo Bonzini 1721c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1722c50d8ae3SPaolo Bonzini } 1723c50d8ae3SPaolo Bonzini 1724c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1725c50d8ae3SPaolo Bonzini u64 *parent_pte) 1726c50d8ae3SPaolo Bonzini { 1727c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1728c50d8ae3SPaolo Bonzini } 1729c50d8ae3SPaolo Bonzini 1730c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1731c50d8ae3SPaolo Bonzini u64 *parent_pte) 1732c50d8ae3SPaolo Bonzini { 1733c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1734c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1735c50d8ae3SPaolo Bonzini } 1736c50d8ae3SPaolo Bonzini 1737c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1738c50d8ae3SPaolo Bonzini { 1739c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1740c50d8ae3SPaolo Bonzini 174194ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 174294ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1743c50d8ae3SPaolo Bonzini if (!direct) 174494ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1745c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1746c50d8ae3SPaolo Bonzini 1747c50d8ae3SPaolo Bonzini /* 1748c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1749c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1750c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1751c50d8ae3SPaolo Bonzini */ 1752c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1753c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1754c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1755c50d8ae3SPaolo Bonzini return sp; 1756c50d8ae3SPaolo Bonzini } 1757c50d8ae3SPaolo Bonzini 1758c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1759c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1760c50d8ae3SPaolo Bonzini { 1761c50d8ae3SPaolo Bonzini u64 *sptep; 1762c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1763c50d8ae3SPaolo Bonzini 1764c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1765c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1766c50d8ae3SPaolo Bonzini } 1767c50d8ae3SPaolo Bonzini } 1768c50d8ae3SPaolo Bonzini 1769c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1770c50d8ae3SPaolo Bonzini { 1771c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1772c50d8ae3SPaolo Bonzini unsigned int index; 1773c50d8ae3SPaolo Bonzini 177457354682SSean Christopherson sp = sptep_to_sp(spte); 1775c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1776c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1777c50d8ae3SPaolo Bonzini return; 1778c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1779c50d8ae3SPaolo Bonzini return; 1780c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1781c50d8ae3SPaolo Bonzini } 1782c50d8ae3SPaolo Bonzini 1783c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1784c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1785c50d8ae3SPaolo Bonzini { 1786c3e5e415SLai Jiangshan return -1; 1787c50d8ae3SPaolo Bonzini } 1788c50d8ae3SPaolo Bonzini 1789c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1790c50d8ae3SPaolo Bonzini 1791c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1792c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1793c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1794c50d8ae3SPaolo Bonzini unsigned int idx; 1795c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1796c50d8ae3SPaolo Bonzini unsigned int nr; 1797c50d8ae3SPaolo Bonzini }; 1798c50d8ae3SPaolo Bonzini 1799c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1800c50d8ae3SPaolo Bonzini int idx) 1801c50d8ae3SPaolo Bonzini { 1802c50d8ae3SPaolo Bonzini int i; 1803c50d8ae3SPaolo Bonzini 1804c50d8ae3SPaolo Bonzini if (sp->unsync) 1805c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1806c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1807c50d8ae3SPaolo Bonzini return 0; 1808c50d8ae3SPaolo Bonzini 1809c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1810c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1811c50d8ae3SPaolo Bonzini pvec->nr++; 1812c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1813c50d8ae3SPaolo Bonzini } 1814c50d8ae3SPaolo Bonzini 1815c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1816c50d8ae3SPaolo Bonzini { 1817c50d8ae3SPaolo Bonzini --sp->unsync_children; 1818c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1819c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1820c50d8ae3SPaolo Bonzini } 1821c50d8ae3SPaolo Bonzini 1822c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1823c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1824c50d8ae3SPaolo Bonzini { 1825c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1826c50d8ae3SPaolo Bonzini 1827c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1828c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1829c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1830c50d8ae3SPaolo Bonzini 1831c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1832c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1833c50d8ae3SPaolo Bonzini continue; 1834c50d8ae3SPaolo Bonzini } 1835c50d8ae3SPaolo Bonzini 1836e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1837c50d8ae3SPaolo Bonzini 1838c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1839c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1840c50d8ae3SPaolo Bonzini return -ENOSPC; 1841c50d8ae3SPaolo Bonzini 1842c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1843c50d8ae3SPaolo Bonzini if (!ret) { 1844c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1845c50d8ae3SPaolo Bonzini continue; 1846c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1847c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1848c50d8ae3SPaolo Bonzini } else 1849c50d8ae3SPaolo Bonzini return ret; 1850c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1851c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1852c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1853c50d8ae3SPaolo Bonzini return -ENOSPC; 1854c50d8ae3SPaolo Bonzini } else 1855c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1856c50d8ae3SPaolo Bonzini } 1857c50d8ae3SPaolo Bonzini 1858c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1859c50d8ae3SPaolo Bonzini } 1860c50d8ae3SPaolo Bonzini 1861c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1862c50d8ae3SPaolo Bonzini 1863c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1864c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1865c50d8ae3SPaolo Bonzini { 1866c50d8ae3SPaolo Bonzini pvec->nr = 0; 1867c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1868c50d8ae3SPaolo Bonzini return 0; 1869c50d8ae3SPaolo Bonzini 1870c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1871c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1872c50d8ae3SPaolo Bonzini } 1873c50d8ae3SPaolo Bonzini 1874c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1875c50d8ae3SPaolo Bonzini { 1876c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1877c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1878c50d8ae3SPaolo Bonzini sp->unsync = 0; 1879c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1880c50d8ae3SPaolo Bonzini } 1881c50d8ae3SPaolo Bonzini 1882c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1883c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1884c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1885c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1886c50d8ae3SPaolo Bonzini 1887ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1888ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1889c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1890c50d8ae3SPaolo Bonzini } else 1891c50d8ae3SPaolo Bonzini 1892c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1893ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1894ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1895c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1896c50d8ae3SPaolo Bonzini 1897479a1efcSSean Christopherson static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1898c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1899c50d8ae3SPaolo Bonzini { 1900c3e5e415SLai Jiangshan int ret = vcpu->arch.mmu->sync_page(vcpu, sp); 1901c3e5e415SLai Jiangshan 1902c3e5e415SLai Jiangshan if (ret < 0) { 1903c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1904c50d8ae3SPaolo Bonzini return false; 1905c50d8ae3SPaolo Bonzini } 1906c50d8ae3SPaolo Bonzini 1907c3e5e415SLai Jiangshan return !!ret; 1908c50d8ae3SPaolo Bonzini } 1909c50d8ae3SPaolo Bonzini 1910c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1911c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1912c50d8ae3SPaolo Bonzini bool remote_flush) 1913c50d8ae3SPaolo Bonzini { 1914c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1915c50d8ae3SPaolo Bonzini return false; 1916c50d8ae3SPaolo Bonzini 1917c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1918c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1919c50d8ae3SPaolo Bonzini else 1920c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1921c50d8ae3SPaolo Bonzini return true; 1922c50d8ae3SPaolo Bonzini } 1923c50d8ae3SPaolo Bonzini 1924c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1925c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1926c50d8ae3SPaolo Bonzini #else 1927c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1928c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1929c50d8ae3SPaolo Bonzini #endif 1930c50d8ae3SPaolo Bonzini 1931c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1932c50d8ae3SPaolo Bonzini { 1933a955cad8SSean Christopherson if (sp->role.invalid) 1934a955cad8SSean Christopherson return true; 1935a955cad8SSean Christopherson 1936a955cad8SSean Christopherson /* TDP MMU pages due not use the MMU generation. */ 1937a955cad8SSean Christopherson return !sp->tdp_mmu_page && 1938c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1939c50d8ae3SPaolo Bonzini } 1940c50d8ae3SPaolo Bonzini 1941c50d8ae3SPaolo Bonzini struct mmu_page_path { 1942c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1943c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1944c50d8ae3SPaolo Bonzini }; 1945c50d8ae3SPaolo Bonzini 1946c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1947c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1948c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1949c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1950c50d8ae3SPaolo Bonzini 1951c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1952c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1953c50d8ae3SPaolo Bonzini int i) 1954c50d8ae3SPaolo Bonzini { 1955c50d8ae3SPaolo Bonzini int n; 1956c50d8ae3SPaolo Bonzini 1957c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1958c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1959c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1960c50d8ae3SPaolo Bonzini int level = sp->role.level; 1961c50d8ae3SPaolo Bonzini 1962c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 19633bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1964c50d8ae3SPaolo Bonzini break; 1965c50d8ae3SPaolo Bonzini 1966c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1967c50d8ae3SPaolo Bonzini } 1968c50d8ae3SPaolo Bonzini 1969c50d8ae3SPaolo Bonzini return n; 1970c50d8ae3SPaolo Bonzini } 1971c50d8ae3SPaolo Bonzini 1972c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1973c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1974c50d8ae3SPaolo Bonzini { 1975c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1976c50d8ae3SPaolo Bonzini int level; 1977c50d8ae3SPaolo Bonzini 1978c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1979c50d8ae3SPaolo Bonzini return 0; 1980c50d8ae3SPaolo Bonzini 1981c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1982c50d8ae3SPaolo Bonzini 1983c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1984c50d8ae3SPaolo Bonzini level = sp->role.level; 19853bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1986c50d8ae3SPaolo Bonzini 1987c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1988c50d8ae3SPaolo Bonzini 1989c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1990c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1991c50d8ae3SPaolo Bonzini */ 1992c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1993c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1994c50d8ae3SPaolo Bonzini } 1995c50d8ae3SPaolo Bonzini 1996c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1997c50d8ae3SPaolo Bonzini { 1998c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1999c50d8ae3SPaolo Bonzini unsigned int level = 0; 2000c50d8ae3SPaolo Bonzini 2001c50d8ae3SPaolo Bonzini do { 2002c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 2003c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 2004c50d8ae3SPaolo Bonzini if (!sp) 2005c50d8ae3SPaolo Bonzini return; 2006c50d8ae3SPaolo Bonzini 2007c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 2008c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 2009c50d8ae3SPaolo Bonzini level++; 2010c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 2011c50d8ae3SPaolo Bonzini } 2012c50d8ae3SPaolo Bonzini 201365855ed8SLai Jiangshan static int mmu_sync_children(struct kvm_vcpu *vcpu, 201465855ed8SLai Jiangshan struct kvm_mmu_page *parent, bool can_yield) 2015c50d8ae3SPaolo Bonzini { 2016c50d8ae3SPaolo Bonzini int i; 2017c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2018c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2019c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2020c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2021c50d8ae3SPaolo Bonzini bool flush = false; 2022c50d8ae3SPaolo Bonzini 2023c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2024c50d8ae3SPaolo Bonzini bool protected = false; 2025c50d8ae3SPaolo Bonzini 2026c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 2027c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 2028c50d8ae3SPaolo Bonzini 2029c50d8ae3SPaolo Bonzini if (protected) { 20305591c069SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true); 2031c50d8ae3SPaolo Bonzini flush = false; 2032c50d8ae3SPaolo Bonzini } 2033c50d8ae3SPaolo Bonzini 2034c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2035479a1efcSSean Christopherson kvm_unlink_unsync_page(vcpu->kvm, sp); 2036c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2037c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2038c50d8ae3SPaolo Bonzini } 2039531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 2040c3e5e415SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 204165855ed8SLai Jiangshan if (!can_yield) { 204265855ed8SLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 204365855ed8SLai Jiangshan return -EINTR; 204465855ed8SLai Jiangshan } 204565855ed8SLai Jiangshan 2046531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 2047c50d8ae3SPaolo Bonzini flush = false; 2048c50d8ae3SPaolo Bonzini } 2049c50d8ae3SPaolo Bonzini } 2050c50d8ae3SPaolo Bonzini 2051c3e5e415SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 205265855ed8SLai Jiangshan return 0; 2053c50d8ae3SPaolo Bonzini } 2054c50d8ae3SPaolo Bonzini 2055c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2056c50d8ae3SPaolo Bonzini { 2057c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2058c50d8ae3SPaolo Bonzini } 2059c50d8ae3SPaolo Bonzini 2060c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2061c50d8ae3SPaolo Bonzini { 206257354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2063c50d8ae3SPaolo Bonzini } 2064c50d8ae3SPaolo Bonzini 2065c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2066c50d8ae3SPaolo Bonzini gfn_t gfn, 2067c50d8ae3SPaolo Bonzini gva_t gaddr, 2068c50d8ae3SPaolo Bonzini unsigned level, 2069c50d8ae3SPaolo Bonzini int direct, 20700a2b64c5SBen Gardon unsigned int access) 2071c50d8ae3SPaolo Bonzini { 2072fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2073c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2074ac101b7cSSean Christopherson struct hlist_head *sp_list; 2075c50d8ae3SPaolo Bonzini unsigned quadrant; 2076c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2077c50d8ae3SPaolo Bonzini int collisions = 0; 2078c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2079c50d8ae3SPaolo Bonzini 2080c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2081c50d8ae3SPaolo Bonzini role.level = level; 2082c50d8ae3SPaolo Bonzini role.direct = direct; 2083c50d8ae3SPaolo Bonzini role.access = access; 2084bb3b394dSLai Jiangshan if (role.has_4_byte_gpte) { 2085c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2086c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2087c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2088c50d8ae3SPaolo Bonzini } 2089ac101b7cSSean Christopherson 2090ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2091ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2092c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2093c50d8ae3SPaolo Bonzini collisions++; 2094c50d8ae3SPaolo Bonzini continue; 2095c50d8ae3SPaolo Bonzini } 2096c50d8ae3SPaolo Bonzini 2097ddc16abbSSean Christopherson if (sp->role.word != role.word) { 2098ddc16abbSSean Christopherson /* 2099ddc16abbSSean Christopherson * If the guest is creating an upper-level page, zap 2100ddc16abbSSean Christopherson * unsync pages for the same gfn. While it's possible 2101ddc16abbSSean Christopherson * the guest is using recursive page tables, in all 2102ddc16abbSSean Christopherson * likelihood the guest has stopped using the unsync 2103ddc16abbSSean Christopherson * page and is installing a completely unrelated page. 2104ddc16abbSSean Christopherson * Unsync pages must not be left as is, because the new 2105ddc16abbSSean Christopherson * upper-level page will be write-protected. 2106ddc16abbSSean Christopherson */ 2107ddc16abbSSean Christopherson if (level > PG_LEVEL_4K && sp->unsync) 2108ddc16abbSSean Christopherson kvm_mmu_prepare_zap_page(vcpu->kvm, sp, 2109ddc16abbSSean Christopherson &invalid_list); 2110c50d8ae3SPaolo Bonzini continue; 2111ddc16abbSSean Christopherson } 2112c50d8ae3SPaolo Bonzini 2113fb58a9c3SSean Christopherson if (direct_mmu) 2114fb58a9c3SSean Christopherson goto trace_get_page; 2115fb58a9c3SSean Christopherson 2116c50d8ae3SPaolo Bonzini if (sp->unsync) { 211707dc4f35SSean Christopherson /* 2118479a1efcSSean Christopherson * The page is good, but is stale. kvm_sync_page does 211907dc4f35SSean Christopherson * get the latest guest state, but (unlike mmu_unsync_children) 212007dc4f35SSean Christopherson * it doesn't write-protect the page or mark it synchronized! 212107dc4f35SSean Christopherson * This way the validity of the mapping is ensured, but the 212207dc4f35SSean Christopherson * overhead of write protection is not incurred until the 212307dc4f35SSean Christopherson * guest invalidates the TLB mapping. This allows multiple 212407dc4f35SSean Christopherson * SPs for a single gfn to be unsync. 212507dc4f35SSean Christopherson * 212607dc4f35SSean Christopherson * If the sync fails, the page is zapped. If so, break 212707dc4f35SSean Christopherson * in order to rebuild it. 2128c50d8ae3SPaolo Bonzini */ 2129479a1efcSSean Christopherson if (!kvm_sync_page(vcpu, sp, &invalid_list)) 2130c50d8ae3SPaolo Bonzini break; 2131c50d8ae3SPaolo Bonzini 2132c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 2133c3e5e415SLai Jiangshan kvm_flush_remote_tlbs(vcpu->kvm); 2134c50d8ae3SPaolo Bonzini } 2135c50d8ae3SPaolo Bonzini 2136c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2137fb58a9c3SSean Christopherson 2138fb58a9c3SSean Christopherson trace_get_page: 2139c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2140c50d8ae3SPaolo Bonzini goto out; 2141c50d8ae3SPaolo Bonzini } 2142c50d8ae3SPaolo Bonzini 2143c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2144c50d8ae3SPaolo Bonzini 2145c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2146c50d8ae3SPaolo Bonzini 2147c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2148c50d8ae3SPaolo Bonzini sp->role = role; 2149ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2150c50d8ae3SPaolo Bonzini if (!direct) { 2151c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 21523bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2153c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2154c50d8ae3SPaolo Bonzini } 2155c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2156c50d8ae3SPaolo Bonzini out: 2157ddc16abbSSean Christopherson kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 2158ddc16abbSSean Christopherson 2159c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2160c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2161c50d8ae3SPaolo Bonzini return sp; 2162c50d8ae3SPaolo Bonzini } 2163c50d8ae3SPaolo Bonzini 2164c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2165c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2166c50d8ae3SPaolo Bonzini u64 addr) 2167c50d8ae3SPaolo Bonzini { 2168c50d8ae3SPaolo Bonzini iterator->addr = addr; 2169c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2170c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2171c50d8ae3SPaolo Bonzini 217212ec33a7SLai Jiangshan if (iterator->level >= PT64_ROOT_4LEVEL && 2173c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2174c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 217512ec33a7SLai Jiangshan iterator->level = PT32E_ROOT_LEVEL; 2176c50d8ae3SPaolo Bonzini 2177c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2178c50d8ae3SPaolo Bonzini /* 2179c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2180c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2181c50d8ae3SPaolo Bonzini */ 2182c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2183c50d8ae3SPaolo Bonzini 2184c50d8ae3SPaolo Bonzini iterator->shadow_addr 2185c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2186c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2187c50d8ae3SPaolo Bonzini --iterator->level; 2188c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2189c50d8ae3SPaolo Bonzini iterator->level = 0; 2190c50d8ae3SPaolo Bonzini } 2191c50d8ae3SPaolo Bonzini } 2192c50d8ae3SPaolo Bonzini 2193c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2194c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2195c50d8ae3SPaolo Bonzini { 2196c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2197c50d8ae3SPaolo Bonzini addr); 2198c50d8ae3SPaolo Bonzini } 2199c50d8ae3SPaolo Bonzini 2200c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2201c50d8ae3SPaolo Bonzini { 22023bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2203c50d8ae3SPaolo Bonzini return false; 2204c50d8ae3SPaolo Bonzini 2205c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2206c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2207c50d8ae3SPaolo Bonzini return true; 2208c50d8ae3SPaolo Bonzini } 2209c50d8ae3SPaolo Bonzini 2210c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2211c50d8ae3SPaolo Bonzini u64 spte) 2212c50d8ae3SPaolo Bonzini { 22133e44dce4SLai Jiangshan if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) { 2214c50d8ae3SPaolo Bonzini iterator->level = 0; 2215c50d8ae3SPaolo Bonzini return; 2216c50d8ae3SPaolo Bonzini } 2217c50d8ae3SPaolo Bonzini 2218c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2219c50d8ae3SPaolo Bonzini --iterator->level; 2220c50d8ae3SPaolo Bonzini } 2221c50d8ae3SPaolo Bonzini 2222c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2223c50d8ae3SPaolo Bonzini { 2224c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2225c50d8ae3SPaolo Bonzini } 2226c50d8ae3SPaolo Bonzini 2227c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2228c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2229c50d8ae3SPaolo Bonzini { 2230c50d8ae3SPaolo Bonzini u64 spte; 2231c50d8ae3SPaolo Bonzini 2232c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2233c50d8ae3SPaolo Bonzini 2234cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2235c50d8ae3SPaolo Bonzini 2236c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2237c50d8ae3SPaolo Bonzini 2238c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2239c50d8ae3SPaolo Bonzini 2240c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2241c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2242c50d8ae3SPaolo Bonzini } 2243c50d8ae3SPaolo Bonzini 2244c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2245c50d8ae3SPaolo Bonzini unsigned direct_access) 2246c50d8ae3SPaolo Bonzini { 2247c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2248c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2249c50d8ae3SPaolo Bonzini 2250c50d8ae3SPaolo Bonzini /* 2251c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2252c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2253c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2254c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2255c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2256c50d8ae3SPaolo Bonzini */ 2257e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2258c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2259c50d8ae3SPaolo Bonzini return; 2260c50d8ae3SPaolo Bonzini 2261c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2262c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2263c50d8ae3SPaolo Bonzini } 2264c50d8ae3SPaolo Bonzini } 2265c50d8ae3SPaolo Bonzini 22662de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 22672de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 22682de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2269c50d8ae3SPaolo Bonzini { 2270c50d8ae3SPaolo Bonzini u64 pte; 2271c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2272c50d8ae3SPaolo Bonzini 2273c50d8ae3SPaolo Bonzini pte = *spte; 2274c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2275c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2276c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2277c50d8ae3SPaolo Bonzini } else { 2278e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2279c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 22802de4085cSBen Gardon 22812de4085cSBen Gardon /* 22822de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 22832de4085cSBen Gardon * unlikely to be used again in the near future. This 22842de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22852de4085cSBen Gardon */ 22862de4085cSBen Gardon if (tdp_enabled && invalid_list && 22872de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22882de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22892de4085cSBen Gardon invalid_list); 2290c50d8ae3SPaolo Bonzini } 2291ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2292c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2293ace569e0SSean Christopherson } 22942de4085cSBen Gardon return 0; 2295c50d8ae3SPaolo Bonzini } 2296c50d8ae3SPaolo Bonzini 22972de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 22982de4085cSBen Gardon struct kvm_mmu_page *sp, 22992de4085cSBen Gardon struct list_head *invalid_list) 2300c50d8ae3SPaolo Bonzini { 23012de4085cSBen Gardon int zapped = 0; 2302c50d8ae3SPaolo Bonzini unsigned i; 2303c50d8ae3SPaolo Bonzini 2304c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 23052de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 23062de4085cSBen Gardon 23072de4085cSBen Gardon return zapped; 2308c50d8ae3SPaolo Bonzini } 2309c50d8ae3SPaolo Bonzini 2310c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2311c50d8ae3SPaolo Bonzini { 2312c50d8ae3SPaolo Bonzini u64 *sptep; 2313c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2314c50d8ae3SPaolo Bonzini 2315c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2316c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2317c50d8ae3SPaolo Bonzini } 2318c50d8ae3SPaolo Bonzini 2319c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2320c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2321c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2322c50d8ae3SPaolo Bonzini { 2323c50d8ae3SPaolo Bonzini int i, zapped = 0; 2324c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2325c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2326c50d8ae3SPaolo Bonzini 23273bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2328c50d8ae3SPaolo Bonzini return 0; 2329c50d8ae3SPaolo Bonzini 2330c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2331c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2332c50d8ae3SPaolo Bonzini 2333c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2334c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2335c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2336c50d8ae3SPaolo Bonzini zapped++; 2337c50d8ae3SPaolo Bonzini } 2338c50d8ae3SPaolo Bonzini } 2339c50d8ae3SPaolo Bonzini 2340c50d8ae3SPaolo Bonzini return zapped; 2341c50d8ae3SPaolo Bonzini } 2342c50d8ae3SPaolo Bonzini 2343c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2344c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2345c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2346c50d8ae3SPaolo Bonzini int *nr_zapped) 2347c50d8ae3SPaolo Bonzini { 2348c50d8ae3SPaolo Bonzini bool list_unstable; 2349c50d8ae3SPaolo Bonzini 2350c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2351c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2352c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 23532de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2354c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2355c50d8ae3SPaolo Bonzini 2356c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2357c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2358c50d8ae3SPaolo Bonzini 2359c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2360c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2361c50d8ae3SPaolo Bonzini 2362c50d8ae3SPaolo Bonzini if (sp->unsync) 2363c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2364c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2365c50d8ae3SPaolo Bonzini /* Count self */ 2366c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2367f95eec9bSSean Christopherson 2368f95eec9bSSean Christopherson /* 2369f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2370f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2371f95eec9bSSean Christopherson * !sp->root_count. 2372f95eec9bSSean Christopherson */ 2373f95eec9bSSean Christopherson if (sp->role.invalid) 2374f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2375f95eec9bSSean Christopherson else 2376c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2377c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2378c50d8ae3SPaolo Bonzini } else { 2379f95eec9bSSean Christopherson /* 2380f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2381f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2382f95eec9bSSean Christopherson */ 2383f95eec9bSSean Christopherson list_del(&sp->link); 2384c50d8ae3SPaolo Bonzini 2385c50d8ae3SPaolo Bonzini /* 2386c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2387c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2388c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2389c50d8ae3SPaolo Bonzini */ 2390c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2391c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2392c50d8ae3SPaolo Bonzini } 2393c50d8ae3SPaolo Bonzini 2394c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2395c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2396c50d8ae3SPaolo Bonzini 2397c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2398c50d8ae3SPaolo Bonzini return list_unstable; 2399c50d8ae3SPaolo Bonzini } 2400c50d8ae3SPaolo Bonzini 2401c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2402c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2403c50d8ae3SPaolo Bonzini { 2404c50d8ae3SPaolo Bonzini int nr_zapped; 2405c50d8ae3SPaolo Bonzini 2406c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2407c50d8ae3SPaolo Bonzini return nr_zapped; 2408c50d8ae3SPaolo Bonzini } 2409c50d8ae3SPaolo Bonzini 2410c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2411c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2412c50d8ae3SPaolo Bonzini { 2413c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2414c50d8ae3SPaolo Bonzini 2415c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2416c50d8ae3SPaolo Bonzini return; 2417c50d8ae3SPaolo Bonzini 2418c50d8ae3SPaolo Bonzini /* 2419c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2420c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2421c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2422c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2423c50d8ae3SPaolo Bonzini * 2424c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2425c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2426c50d8ae3SPaolo Bonzini */ 2427c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2428c50d8ae3SPaolo Bonzini 2429c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2430c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2431c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2432c50d8ae3SPaolo Bonzini } 2433c50d8ae3SPaolo Bonzini } 2434c50d8ae3SPaolo Bonzini 24356b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 24366b82ef2cSSean Christopherson unsigned long nr_to_zap) 2437c50d8ae3SPaolo Bonzini { 24386b82ef2cSSean Christopherson unsigned long total_zapped = 0; 24396b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2440ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 24416b82ef2cSSean Christopherson bool unstable; 24426b82ef2cSSean Christopherson int nr_zapped; 2443c50d8ae3SPaolo Bonzini 2444c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2445ba7888ddSSean Christopherson return 0; 2446c50d8ae3SPaolo Bonzini 24476b82ef2cSSean Christopherson restart: 24488fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 24496b82ef2cSSean Christopherson /* 24506b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 24516b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 24526b82ef2cSSean Christopherson */ 24536b82ef2cSSean Christopherson if (sp->root_count) 24546b82ef2cSSean Christopherson continue; 24556b82ef2cSSean Christopherson 24566b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 24576b82ef2cSSean Christopherson &nr_zapped); 24586b82ef2cSSean Christopherson total_zapped += nr_zapped; 24596b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2460ba7888ddSSean Christopherson break; 2461ba7888ddSSean Christopherson 24626b82ef2cSSean Christopherson if (unstable) 24636b82ef2cSSean Christopherson goto restart; 2464ba7888ddSSean Christopherson } 24656b82ef2cSSean Christopherson 24666b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 24676b82ef2cSSean Christopherson 24686b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 24696b82ef2cSSean Christopherson return total_zapped; 24706b82ef2cSSean Christopherson } 24716b82ef2cSSean Christopherson 2472afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2473afe8d7e6SSean Christopherson { 2474afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2475afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2476afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2477afe8d7e6SSean Christopherson 2478afe8d7e6SSean Christopherson return 0; 2479c50d8ae3SPaolo Bonzini } 2480c50d8ae3SPaolo Bonzini 2481ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2482ba7888ddSSean Christopherson { 24836b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2484ba7888ddSSean Christopherson 24856b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2486ba7888ddSSean Christopherson return 0; 2487ba7888ddSSean Christopherson 24886b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2489ba7888ddSSean Christopherson 24906e6ec584SSean Christopherson /* 24916e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 24926e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 24936e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 24946e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 2495c4342633SIngo Molnar * being too aggressive may unnecessarily kill the guest, and getting an 24966e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 24976e6ec584SSean Christopherson * page fault paths. 24986e6ec584SSean Christopherson */ 2499ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2500ba7888ddSSean Christopherson return -ENOSPC; 2501ba7888ddSSean Christopherson return 0; 2502ba7888ddSSean Christopherson } 2503ba7888ddSSean Christopherson 2504c50d8ae3SPaolo Bonzini /* 2505c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2506c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2507c50d8ae3SPaolo Bonzini */ 2508c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2509c50d8ae3SPaolo Bonzini { 2510531810caSBen Gardon write_lock(&kvm->mmu_lock); 2511c50d8ae3SPaolo Bonzini 2512c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 25136b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 25146b82ef2cSSean Christopherson goal_nr_mmu_pages); 2515c50d8ae3SPaolo Bonzini 2516c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2517c50d8ae3SPaolo Bonzini } 2518c50d8ae3SPaolo Bonzini 2519c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2520c50d8ae3SPaolo Bonzini 2521531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2522c50d8ae3SPaolo Bonzini } 2523c50d8ae3SPaolo Bonzini 2524c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2525c50d8ae3SPaolo Bonzini { 2526c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2527c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2528c50d8ae3SPaolo Bonzini int r; 2529c50d8ae3SPaolo Bonzini 2530c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2531c50d8ae3SPaolo Bonzini r = 0; 2532531810caSBen Gardon write_lock(&kvm->mmu_lock); 2533c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2534c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2535c50d8ae3SPaolo Bonzini sp->role.word); 2536c50d8ae3SPaolo Bonzini r = 1; 2537c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2538c50d8ae3SPaolo Bonzini } 2539c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2540531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2541c50d8ae3SPaolo Bonzini 2542c50d8ae3SPaolo Bonzini return r; 2543c50d8ae3SPaolo Bonzini } 254496ad91aeSSean Christopherson 254596ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 254696ad91aeSSean Christopherson { 254796ad91aeSSean Christopherson gpa_t gpa; 254896ad91aeSSean Christopherson int r; 254996ad91aeSSean Christopherson 255096ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 255196ad91aeSSean Christopherson return 0; 255296ad91aeSSean Christopherson 255396ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 255496ad91aeSSean Christopherson 255596ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 255696ad91aeSSean Christopherson 255796ad91aeSSean Christopherson return r; 255896ad91aeSSean Christopherson } 2559c50d8ae3SPaolo Bonzini 25604d78d0b3SBen Gardon static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 2561c50d8ae3SPaolo Bonzini { 2562c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 25634d78d0b3SBen Gardon ++kvm->stat.mmu_unsync; 2564c50d8ae3SPaolo Bonzini sp->unsync = 1; 2565c50d8ae3SPaolo Bonzini 2566c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2567c50d8ae3SPaolo Bonzini } 2568c50d8ae3SPaolo Bonzini 25690337f585SSean Christopherson /* 25700337f585SSean Christopherson * Attempt to unsync any shadow pages that can be reached by the specified gfn, 25710337f585SSean Christopherson * KVM is creating a writable mapping for said gfn. Returns 0 if all pages 25720337f585SSean Christopherson * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must 25730337f585SSean Christopherson * be write-protected. 25740337f585SSean Christopherson */ 25758283e36aSBen Gardon int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot, 25762839180cSPaolo Bonzini gfn_t gfn, bool can_unsync, bool prefetch) 2577c50d8ae3SPaolo Bonzini { 2578c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2579ce25681dSSean Christopherson bool locked = false; 2580c50d8ae3SPaolo Bonzini 25810337f585SSean Christopherson /* 25820337f585SSean Christopherson * Force write-protection if the page is being tracked. Note, the page 25830337f585SSean Christopherson * track machinery is used to write-protect upper-level shadow pages, 25840337f585SSean Christopherson * i.e. this guards the role.level == 4K assertion below! 25850337f585SSean Christopherson */ 25864d78d0b3SBen Gardon if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE)) 25870337f585SSean Christopherson return -EPERM; 2588c50d8ae3SPaolo Bonzini 25890337f585SSean Christopherson /* 25900337f585SSean Christopherson * The page is not write-tracked, mark existing shadow pages unsync 25910337f585SSean Christopherson * unless KVM is synchronizing an unsync SP (can_unsync = false). In 25920337f585SSean Christopherson * that case, KVM must complete emulation of the guest TLB flush before 25930337f585SSean Christopherson * allowing shadow pages to become unsync (writable by the guest). 25940337f585SSean Christopherson */ 25954d78d0b3SBen Gardon for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2596c50d8ae3SPaolo Bonzini if (!can_unsync) 25970337f585SSean Christopherson return -EPERM; 2598c50d8ae3SPaolo Bonzini 2599c50d8ae3SPaolo Bonzini if (sp->unsync) 2600c50d8ae3SPaolo Bonzini continue; 2601c50d8ae3SPaolo Bonzini 26022839180cSPaolo Bonzini if (prefetch) 2603f1c4a88cSLai Jiangshan return -EEXIST; 2604f1c4a88cSLai Jiangshan 2605ce25681dSSean Christopherson /* 2606ce25681dSSean Christopherson * TDP MMU page faults require an additional spinlock as they 2607ce25681dSSean Christopherson * run with mmu_lock held for read, not write, and the unsync 2608ce25681dSSean Christopherson * logic is not thread safe. Take the spinklock regardless of 2609ce25681dSSean Christopherson * the MMU type to avoid extra conditionals/parameters, there's 2610ce25681dSSean Christopherson * no meaningful penalty if mmu_lock is held for write. 2611ce25681dSSean Christopherson */ 2612ce25681dSSean Christopherson if (!locked) { 2613ce25681dSSean Christopherson locked = true; 26144d78d0b3SBen Gardon spin_lock(&kvm->arch.mmu_unsync_pages_lock); 2615ce25681dSSean Christopherson 2616ce25681dSSean Christopherson /* 2617ce25681dSSean Christopherson * Recheck after taking the spinlock, a different vCPU 2618ce25681dSSean Christopherson * may have since marked the page unsync. A false 2619ce25681dSSean Christopherson * positive on the unprotected check above is not 2620ce25681dSSean Christopherson * possible as clearing sp->unsync _must_ hold mmu_lock 2621ce25681dSSean Christopherson * for write, i.e. unsync cannot transition from 0->1 2622ce25681dSSean Christopherson * while this CPU holds mmu_lock for read (or write). 2623ce25681dSSean Christopherson */ 2624ce25681dSSean Christopherson if (READ_ONCE(sp->unsync)) 2625ce25681dSSean Christopherson continue; 2626ce25681dSSean Christopherson } 2627ce25681dSSean Christopherson 26283bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 26294d78d0b3SBen Gardon kvm_unsync_page(kvm, sp); 2630c50d8ae3SPaolo Bonzini } 2631ce25681dSSean Christopherson if (locked) 26324d78d0b3SBen Gardon spin_unlock(&kvm->arch.mmu_unsync_pages_lock); 2633c50d8ae3SPaolo Bonzini 2634c50d8ae3SPaolo Bonzini /* 2635c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2636c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2637c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2638c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2639c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2640c50d8ae3SPaolo Bonzini * following could happen: 2641c50d8ae3SPaolo Bonzini * 2642c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2643c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2644c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2645c50d8ae3SPaolo Bonzini * to be writable 2646c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2647c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2648c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2649c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2650c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2651c50d8ae3SPaolo Bonzini * fault. 2652c50d8ae3SPaolo Bonzini * 2653c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2654c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2655c50d8ae3SPaolo Bonzini * 26560337f585SSean Christopherson * 2.3 Walking of unsync pages sees sp->unsync is 26570337f585SSean Christopherson * false and skips the page. 2658c50d8ae3SPaolo Bonzini * 2659c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2660c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2661c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2662c50d8ae3SPaolo Bonzini * gets used. 2663c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2664c50d8ae3SPaolo Bonzini * as unsync 2665c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2666c50d8ae3SPaolo Bonzini * 2667c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2668264d3dc1SLai Jiangshan * the situation in 2.4 does not arise. It pairs with the read barrier 2669264d3dc1SLai Jiangshan * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3. 2670c50d8ae3SPaolo Bonzini */ 2671c50d8ae3SPaolo Bonzini smp_wmb(); 2672c50d8ae3SPaolo Bonzini 26730337f585SSean Christopherson return 0; 2674c50d8ae3SPaolo Bonzini } 2675c50d8ae3SPaolo Bonzini 26768a9f566aSDavid Matlack static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot, 26778a9f566aSDavid Matlack u64 *sptep, unsigned int pte_access, gfn_t gfn, 2678a12f4381SPaolo Bonzini kvm_pfn_t pfn, struct kvm_page_fault *fault) 2679799a4190SBen Gardon { 2680d786c778SPaolo Bonzini struct kvm_mmu_page *sp = sptep_to_sp(sptep); 2681eb5cd7ffSPaolo Bonzini int level = sp->role.level; 2682c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2683c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2684c50d8ae3SPaolo Bonzini bool flush = false; 2685ad67e480SPaolo Bonzini bool wrprot; 2686d786c778SPaolo Bonzini u64 spte; 2687c50d8ae3SPaolo Bonzini 2688a12f4381SPaolo Bonzini /* Prefetching always gets a writable pfn. */ 2689a12f4381SPaolo Bonzini bool host_writable = !fault || fault->map_writable; 26902839180cSPaolo Bonzini bool prefetch = !fault || fault->prefetch; 2691a12f4381SPaolo Bonzini bool write_fault = fault && fault->write; 2692c50d8ae3SPaolo Bonzini 2693c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2694c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2695c50d8ae3SPaolo Bonzini 2696a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2697a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2698a54aa15cSSean Christopherson return RET_PF_EMULATE; 2699a54aa15cSSean Christopherson } 2700a54aa15cSSean Christopherson 2701c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2702c50d8ae3SPaolo Bonzini /* 2703c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2704c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2705c50d8ae3SPaolo Bonzini */ 27063bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2707c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2708c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2709c50d8ae3SPaolo Bonzini 2710e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2711c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2712c50d8ae3SPaolo Bonzini flush = true; 2713c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2714c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2715c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2716c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2717c50d8ae3SPaolo Bonzini flush = true; 2718c50d8ae3SPaolo Bonzini } else 2719c50d8ae3SPaolo Bonzini was_rmapped = 1; 2720c50d8ae3SPaolo Bonzini } 2721c50d8ae3SPaolo Bonzini 27222839180cSPaolo Bonzini wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch, 27237158bee4SPaolo Bonzini true, host_writable, &spte); 2724d786c778SPaolo Bonzini 2725d786c778SPaolo Bonzini if (*sptep == spte) { 2726d786c778SPaolo Bonzini ret = RET_PF_SPURIOUS; 2727d786c778SPaolo Bonzini } else { 2728d786c778SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2729d786c778SPaolo Bonzini flush |= mmu_spte_update(sptep, spte); 2730c50d8ae3SPaolo Bonzini } 2731c50d8ae3SPaolo Bonzini 2732ad67e480SPaolo Bonzini if (wrprot) { 2733c50d8ae3SPaolo Bonzini if (write_fault) 2734c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 2735c50d8ae3SPaolo Bonzini } 2736c50d8ae3SPaolo Bonzini 2737d786c778SPaolo Bonzini if (flush) 2738c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2739c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2740c50d8ae3SPaolo Bonzini 2741c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2742c50d8ae3SPaolo Bonzini 2743c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2744d786c778SPaolo Bonzini WARN_ON_ONCE(ret == RET_PF_SPURIOUS); 274571f51d2cSMingwei Zhang kvm_update_page_stats(vcpu->kvm, level, 1); 27468a9f566aSDavid Matlack rmap_add(vcpu, slot, sptep, gfn); 2747c50d8ae3SPaolo Bonzini } 2748c50d8ae3SPaolo Bonzini 2749c50d8ae3SPaolo Bonzini return ret; 2750c50d8ae3SPaolo Bonzini } 2751c50d8ae3SPaolo Bonzini 2752c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2753c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2754c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2755c50d8ae3SPaolo Bonzini { 2756c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2757c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 27580a2b64c5SBen Gardon unsigned int access = sp->role.access; 2759c50d8ae3SPaolo Bonzini int i, ret; 2760c50d8ae3SPaolo Bonzini gfn_t gfn; 2761c50d8ae3SPaolo Bonzini 2762c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2763c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2764c50d8ae3SPaolo Bonzini if (!slot) 2765c50d8ae3SPaolo Bonzini return -1; 2766c50d8ae3SPaolo Bonzini 2767c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2768c50d8ae3SPaolo Bonzini if (ret <= 0) 2769c50d8ae3SPaolo Bonzini return -1; 2770c50d8ae3SPaolo Bonzini 2771c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 27728a9f566aSDavid Matlack mmu_set_spte(vcpu, slot, start, access, gfn, 2773a12f4381SPaolo Bonzini page_to_pfn(pages[i]), NULL); 2774c50d8ae3SPaolo Bonzini put_page(pages[i]); 2775c50d8ae3SPaolo Bonzini } 2776c50d8ae3SPaolo Bonzini 2777c50d8ae3SPaolo Bonzini return 0; 2778c50d8ae3SPaolo Bonzini } 2779c50d8ae3SPaolo Bonzini 2780c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2781c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2782c50d8ae3SPaolo Bonzini { 2783c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2784c50d8ae3SPaolo Bonzini int i; 2785c50d8ae3SPaolo Bonzini 2786c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2787c50d8ae3SPaolo Bonzini 2788c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2789c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2790c50d8ae3SPaolo Bonzini 2791c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2792c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2793c50d8ae3SPaolo Bonzini if (!start) 2794c50d8ae3SPaolo Bonzini continue; 2795c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2796c6cecc4bSSean Christopherson return; 2797c50d8ae3SPaolo Bonzini start = NULL; 2798c50d8ae3SPaolo Bonzini } else if (!start) 2799c50d8ae3SPaolo Bonzini start = spte; 2800c50d8ae3SPaolo Bonzini } 2801c6cecc4bSSean Christopherson if (start) 2802c6cecc4bSSean Christopherson direct_pte_prefetch_many(vcpu, sp, start, spte); 2803c50d8ae3SPaolo Bonzini } 2804c50d8ae3SPaolo Bonzini 2805c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2806c50d8ae3SPaolo Bonzini { 2807c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2808c50d8ae3SPaolo Bonzini 280957354682SSean Christopherson sp = sptep_to_sp(sptep); 2810c50d8ae3SPaolo Bonzini 2811c50d8ae3SPaolo Bonzini /* 2812c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2813c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2814c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2815c50d8ae3SPaolo Bonzini */ 2816c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2817c50d8ae3SPaolo Bonzini return; 2818c50d8ae3SPaolo Bonzini 28193bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2820c50d8ae3SPaolo Bonzini return; 2821c50d8ae3SPaolo Bonzini 28224a42d848SDavid Stevens /* 28234a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 28244a42d848SDavid Stevens * accidentally prefetching those addresses. 28254a42d848SDavid Stevens */ 28264a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 28274a42d848SDavid Stevens return; 28284a42d848SDavid Stevens 2829c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2830c50d8ae3SPaolo Bonzini } 2831c50d8ae3SPaolo Bonzini 28321b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 28338ca6f063SBen Gardon const struct kvm_memory_slot *slot) 2834db543216SSean Christopherson { 2835db543216SSean Christopherson unsigned long hva; 2836db543216SSean Christopherson pte_t *pte; 2837db543216SSean Christopherson int level; 2838db543216SSean Christopherson 2839e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 28403bae0459SSean Christopherson return PG_LEVEL_4K; 2841db543216SSean Christopherson 2842293e306eSSean Christopherson /* 2843293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2844293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2845293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2846293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2847293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2848293e306eSSean Christopherson * read-only memslot. 2849293e306eSSean Christopherson */ 2850db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2851db543216SSean Christopherson 28521b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2853db543216SSean Christopherson if (unlikely(!pte)) 28543bae0459SSean Christopherson return PG_LEVEL_4K; 2855db543216SSean Christopherson 2856db543216SSean Christopherson return level; 2857db543216SSean Christopherson } 2858db543216SSean Christopherson 28598ca6f063SBen Gardon int kvm_mmu_max_mapping_level(struct kvm *kvm, 28608ca6f063SBen Gardon const struct kvm_memory_slot *slot, gfn_t gfn, 28618ca6f063SBen Gardon kvm_pfn_t pfn, int max_level) 28621b6d9d9eSSean Christopherson { 28631b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 2864ec607a56SPaolo Bonzini int host_level; 28651b6d9d9eSSean Christopherson 28661b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 28671b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 28681b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 28691b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 28701b6d9d9eSSean Christopherson break; 28711b6d9d9eSSean Christopherson } 28721b6d9d9eSSean Christopherson 28731b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 28741b6d9d9eSSean Christopherson return PG_LEVEL_4K; 28751b6d9d9eSSean Christopherson 2876ec607a56SPaolo Bonzini host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot); 2877ec607a56SPaolo Bonzini return min(host_level, max_level); 28781b6d9d9eSSean Christopherson } 28791b6d9d9eSSean Christopherson 288073a3c659SPaolo Bonzini void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 28810885904dSSean Christopherson { 2882e710c5f6SDavid Matlack struct kvm_memory_slot *slot = fault->slot; 288317eff019SSean Christopherson kvm_pfn_t mask; 28840885904dSSean Christopherson 288573a3c659SPaolo Bonzini fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled; 28863cf06612SSean Christopherson 288773a3c659SPaolo Bonzini if (unlikely(fault->max_level == PG_LEVEL_4K)) 288873a3c659SPaolo Bonzini return; 288917eff019SSean Christopherson 289073a3c659SPaolo Bonzini if (is_error_noslot_pfn(fault->pfn) || kvm_is_reserved_pfn(fault->pfn)) 289173a3c659SPaolo Bonzini return; 289217eff019SSean Christopherson 2893e710c5f6SDavid Matlack if (kvm_slot_dirty_track_enabled(slot)) 289473a3c659SPaolo Bonzini return; 2895293e306eSSean Christopherson 28963cf06612SSean Christopherson /* 28973cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28983cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28993cf06612SSean Christopherson */ 290073a3c659SPaolo Bonzini fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, 290173a3c659SPaolo Bonzini fault->gfn, fault->pfn, 290273a3c659SPaolo Bonzini fault->max_level); 290373a3c659SPaolo Bonzini if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed) 290473a3c659SPaolo Bonzini return; 29054cd071d1SSean Christopherson 29060885904dSSean Christopherson /* 29074cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 29084cd071d1SSean Christopherson * the pmd can't be split from under us. 29090885904dSSean Christopherson */ 291073a3c659SPaolo Bonzini fault->goal_level = fault->req_level; 291173a3c659SPaolo Bonzini mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1; 291273a3c659SPaolo Bonzini VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask)); 291373a3c659SPaolo Bonzini fault->pfn &= ~mask; 29140885904dSSean Christopherson } 29150885904dSSean Christopherson 2916536f0e6aSPaolo Bonzini void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level) 2917c50d8ae3SPaolo Bonzini { 2918536f0e6aSPaolo Bonzini if (cur_level > PG_LEVEL_4K && 2919536f0e6aSPaolo Bonzini cur_level == fault->goal_level && 2920c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2921c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2922c50d8ae3SPaolo Bonzini /* 2923c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2924c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2925c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2926c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2927c50d8ae3SPaolo Bonzini * the address. 2928c50d8ae3SPaolo Bonzini */ 2929536f0e6aSPaolo Bonzini u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) - 2930536f0e6aSPaolo Bonzini KVM_PAGES_PER_HPAGE(cur_level - 1); 2931536f0e6aSPaolo Bonzini fault->pfn |= fault->gfn & page_mask; 2932536f0e6aSPaolo Bonzini fault->goal_level--; 2933c50d8ae3SPaolo Bonzini } 2934c50d8ae3SPaolo Bonzini } 2935c50d8ae3SPaolo Bonzini 293643b74355SPaolo Bonzini static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 2937c50d8ae3SPaolo Bonzini { 2938c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2939c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 294073a3c659SPaolo Bonzini int ret; 294143b74355SPaolo Bonzini gfn_t base_gfn = fault->gfn; 2942c50d8ae3SPaolo Bonzini 294373a3c659SPaolo Bonzini kvm_mmu_hugepage_adjust(vcpu, fault); 29444cd071d1SSean Christopherson 2945f0066d94SPaolo Bonzini trace_kvm_mmu_spte_requested(fault); 294643b74355SPaolo Bonzini for_each_shadow_entry(vcpu, fault->addr, it) { 2947c50d8ae3SPaolo Bonzini /* 2948c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2949c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2950c50d8ae3SPaolo Bonzini */ 295173a3c659SPaolo Bonzini if (fault->nx_huge_page_workaround_enabled) 2952536f0e6aSPaolo Bonzini disallowed_hugepage_adjust(fault, *it.sptep, it.level); 2953c50d8ae3SPaolo Bonzini 295443b74355SPaolo Bonzini base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 295573a3c659SPaolo Bonzini if (it.level == fault->goal_level) 2956c50d8ae3SPaolo Bonzini break; 2957c50d8ae3SPaolo Bonzini 2958c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 295903fffc54SSean Christopherson if (is_shadow_present_pte(*it.sptep)) 296003fffc54SSean Christopherson continue; 296103fffc54SSean Christopherson 2962c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2963c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2964c50d8ae3SPaolo Bonzini 2965c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 296673a3c659SPaolo Bonzini if (fault->is_tdp && fault->huge_page_disallowed && 296773a3c659SPaolo Bonzini fault->req_level >= it.level) 2968c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2969c50d8ae3SPaolo Bonzini } 2970c50d8ae3SPaolo Bonzini 2971b1a429fbSSean Christopherson if (WARN_ON_ONCE(it.level != fault->goal_level)) 2972b1a429fbSSean Christopherson return -EFAULT; 2973b1a429fbSSean Christopherson 29748a9f566aSDavid Matlack ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL, 2975a12f4381SPaolo Bonzini base_gfn, fault->pfn, fault); 297612703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 297712703759SSean Christopherson return ret; 297812703759SSean Christopherson 2979c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2980c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2981c50d8ae3SPaolo Bonzini return ret; 2982c50d8ae3SPaolo Bonzini } 2983c50d8ae3SPaolo Bonzini 2984c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2985c50d8ae3SPaolo Bonzini { 2986c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2987c50d8ae3SPaolo Bonzini } 2988c50d8ae3SPaolo Bonzini 2989c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2990c50d8ae3SPaolo Bonzini { 2991c50d8ae3SPaolo Bonzini /* 2992c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2993c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2994c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2995c50d8ae3SPaolo Bonzini */ 2996c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2997c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 2998c50d8ae3SPaolo Bonzini 2999c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 3000c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 3001c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3002c50d8ae3SPaolo Bonzini } 3003c50d8ae3SPaolo Bonzini 3004c50d8ae3SPaolo Bonzini return -EFAULT; 3005c50d8ae3SPaolo Bonzini } 3006c50d8ae3SPaolo Bonzini 30073a13f4feSPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, 30083a13f4feSPaolo Bonzini unsigned int access, int *ret_val) 3009c50d8ae3SPaolo Bonzini { 3010c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 30113a13f4feSPaolo Bonzini if (unlikely(is_error_pfn(fault->pfn))) { 30123a13f4feSPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn); 3013c50d8ae3SPaolo Bonzini return true; 3014c50d8ae3SPaolo Bonzini } 3015c50d8ae3SPaolo Bonzini 3016e710c5f6SDavid Matlack if (unlikely(!fault->slot)) { 30173a13f4feSPaolo Bonzini gva_t gva = fault->is_tdp ? 0 : fault->addr; 30183a13f4feSPaolo Bonzini 30193a13f4feSPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, fault->gfn, 3020c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 302130ab5901SSean Christopherson /* 302230ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 302330ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 302430ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 302530ab5901SSean Christopherson */ 302630ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 302730ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 302830ab5901SSean Christopherson return true; 302930ab5901SSean Christopherson } 303030ab5901SSean Christopherson } 3031c50d8ae3SPaolo Bonzini 3032c50d8ae3SPaolo Bonzini return false; 3033c50d8ae3SPaolo Bonzini } 3034c50d8ae3SPaolo Bonzini 30353c8ad5a6SPaolo Bonzini static bool page_fault_can_be_fast(struct kvm_page_fault *fault) 3036c50d8ae3SPaolo Bonzini { 3037c50d8ae3SPaolo Bonzini /* 3038c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3039c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3040c50d8ae3SPaolo Bonzini */ 30413c8ad5a6SPaolo Bonzini if (fault->rsvd) 3042c50d8ae3SPaolo Bonzini return false; 3043c50d8ae3SPaolo Bonzini 3044c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 30453c8ad5a6SPaolo Bonzini if (unlikely(fault->exec && fault->present)) 3046c50d8ae3SPaolo Bonzini return false; 3047c50d8ae3SPaolo Bonzini 3048c50d8ae3SPaolo Bonzini /* 3049c50d8ae3SPaolo Bonzini * #PF can be fast if: 3050c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3051c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3052c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3053c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3054c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3055c50d8ae3SPaolo Bonzini * 3056c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3057c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3058c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3059c50d8ae3SPaolo Bonzini * accesses to a present page. 3060c50d8ae3SPaolo Bonzini */ 3061c50d8ae3SPaolo Bonzini 30623c8ad5a6SPaolo Bonzini return shadow_acc_track_mask != 0 || (fault->write && fault->present); 3063c50d8ae3SPaolo Bonzini } 3064c50d8ae3SPaolo Bonzini 3065c50d8ae3SPaolo Bonzini /* 3066c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3067c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3068c50d8ae3SPaolo Bonzini */ 3069c50d8ae3SPaolo Bonzini static bool 3070e710c5f6SDavid Matlack fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, 3071c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3072c50d8ae3SPaolo Bonzini { 3073c50d8ae3SPaolo Bonzini /* 3074c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3075c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3076c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3077c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3078c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3079c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3080c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3081c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3082c50d8ae3SPaolo Bonzini * 3083c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3084c50d8ae3SPaolo Bonzini */ 3085c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3086c50d8ae3SPaolo Bonzini return false; 3087c50d8ae3SPaolo Bonzini 3088e710c5f6SDavid Matlack if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) 3089e710c5f6SDavid Matlack mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn); 3090c50d8ae3SPaolo Bonzini 3091c50d8ae3SPaolo Bonzini return true; 3092c50d8ae3SPaolo Bonzini } 3093c50d8ae3SPaolo Bonzini 30943c8ad5a6SPaolo Bonzini static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte) 3095c50d8ae3SPaolo Bonzini { 30963c8ad5a6SPaolo Bonzini if (fault->exec) 3097c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3098c50d8ae3SPaolo Bonzini 30993c8ad5a6SPaolo Bonzini if (fault->write) 3100c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3101c50d8ae3SPaolo Bonzini 3102c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3103c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3104c50d8ae3SPaolo Bonzini } 3105c50d8ae3SPaolo Bonzini 3106c50d8ae3SPaolo Bonzini /* 31076e8eb206SDavid Matlack * Returns the last level spte pointer of the shadow page walk for the given 31086e8eb206SDavid Matlack * gpa, and sets *spte to the spte value. This spte may be non-preset. If no 31096e8eb206SDavid Matlack * walk could be performed, returns NULL and *spte does not contain valid data. 31106e8eb206SDavid Matlack * 31116e8eb206SDavid Matlack * Contract: 31126e8eb206SDavid Matlack * - Must be called between walk_shadow_page_lockless_{begin,end}. 31136e8eb206SDavid Matlack * - The returned sptep must not be used after walk_shadow_page_lockless_end. 31146e8eb206SDavid Matlack */ 31156e8eb206SDavid Matlack static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte) 31166e8eb206SDavid Matlack { 31176e8eb206SDavid Matlack struct kvm_shadow_walk_iterator iterator; 31186e8eb206SDavid Matlack u64 old_spte; 31196e8eb206SDavid Matlack u64 *sptep = NULL; 31206e8eb206SDavid Matlack 31216e8eb206SDavid Matlack for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) { 31226e8eb206SDavid Matlack sptep = iterator.sptep; 31236e8eb206SDavid Matlack *spte = old_spte; 31246e8eb206SDavid Matlack } 31256e8eb206SDavid Matlack 31266e8eb206SDavid Matlack return sptep; 31276e8eb206SDavid Matlack } 31286e8eb206SDavid Matlack 31296e8eb206SDavid Matlack /* 3130c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3131c50d8ae3SPaolo Bonzini */ 31323c8ad5a6SPaolo Bonzini static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 3133c50d8ae3SPaolo Bonzini { 3134c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3135c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3136c50d8ae3SPaolo Bonzini u64 spte = 0ull; 31376e8eb206SDavid Matlack u64 *sptep = NULL; 3138c50d8ae3SPaolo Bonzini uint retry_count = 0; 3139c50d8ae3SPaolo Bonzini 31403c8ad5a6SPaolo Bonzini if (!page_fault_can_be_fast(fault)) 3141c4371c2aSSean Christopherson return ret; 3142c50d8ae3SPaolo Bonzini 3143c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3144c50d8ae3SPaolo Bonzini 3145c50d8ae3SPaolo Bonzini do { 3146c50d8ae3SPaolo Bonzini u64 new_spte; 3147c50d8ae3SPaolo Bonzini 31486e8eb206SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 31493c8ad5a6SPaolo Bonzini sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte); 31506e8eb206SDavid Matlack else 31513c8ad5a6SPaolo Bonzini sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); 3152c50d8ae3SPaolo Bonzini 3153ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3154ec89e643SSean Christopherson break; 3155ec89e643SSean Christopherson 31566e8eb206SDavid Matlack sp = sptep_to_sp(sptep); 3157c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3158c50d8ae3SPaolo Bonzini break; 3159c50d8ae3SPaolo Bonzini 3160c50d8ae3SPaolo Bonzini /* 3161c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3162c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3163c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3164c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3165c50d8ae3SPaolo Bonzini * current CPU took the fault. 3166c50d8ae3SPaolo Bonzini * 3167c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3168c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3169c50d8ae3SPaolo Bonzini */ 31703c8ad5a6SPaolo Bonzini if (is_access_allowed(fault, spte)) { 3171c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3172c50d8ae3SPaolo Bonzini break; 3173c50d8ae3SPaolo Bonzini } 3174c50d8ae3SPaolo Bonzini 3175c50d8ae3SPaolo Bonzini new_spte = spte; 3176c50d8ae3SPaolo Bonzini 3177c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3178c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3179c50d8ae3SPaolo Bonzini 3180c50d8ae3SPaolo Bonzini /* 3181c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3182c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3183c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3184c50d8ae3SPaolo Bonzini */ 31853c8ad5a6SPaolo Bonzini if (fault->write && 3186e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3187c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3188c50d8ae3SPaolo Bonzini 3189c50d8ae3SPaolo Bonzini /* 319010c30de0SJunaid Shahid * Do not fix write-permission on the large spte when 319110c30de0SJunaid Shahid * dirty logging is enabled. Since we only dirty the 319210c30de0SJunaid Shahid * first page into the dirty-bitmap in 3193c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3194c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3195c50d8ae3SPaolo Bonzini * 3196c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3197c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3198c50d8ae3SPaolo Bonzini */ 319910c30de0SJunaid Shahid if (sp->role.level > PG_LEVEL_4K && 320010c30de0SJunaid Shahid kvm_slot_dirty_track_enabled(fault->slot)) 3201c50d8ae3SPaolo Bonzini break; 3202c50d8ae3SPaolo Bonzini } 3203c50d8ae3SPaolo Bonzini 3204c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3205c50d8ae3SPaolo Bonzini if (new_spte == spte || 32063c8ad5a6SPaolo Bonzini !is_access_allowed(fault, new_spte)) 3207c50d8ae3SPaolo Bonzini break; 3208c50d8ae3SPaolo Bonzini 3209c50d8ae3SPaolo Bonzini /* 3210c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3211c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 32123ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3213c50d8ae3SPaolo Bonzini */ 3214e710c5f6SDavid Matlack if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) { 3215c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3216c50d8ae3SPaolo Bonzini break; 3217c4371c2aSSean Christopherson } 3218c50d8ae3SPaolo Bonzini 3219c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3220c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3221c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3222c50d8ae3SPaolo Bonzini break; 3223c50d8ae3SPaolo Bonzini } 3224c50d8ae3SPaolo Bonzini 3225c50d8ae3SPaolo Bonzini } while (true); 3226c50d8ae3SPaolo Bonzini 3227f0066d94SPaolo Bonzini trace_fast_page_fault(vcpu, fault, sptep, spte, ret); 3228c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3229c50d8ae3SPaolo Bonzini 3230c4371c2aSSean Christopherson return ret; 3231c50d8ae3SPaolo Bonzini } 3232c50d8ae3SPaolo Bonzini 3233c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3234c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3235c50d8ae3SPaolo Bonzini { 3236c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3237c50d8ae3SPaolo Bonzini 3238c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3239c50d8ae3SPaolo Bonzini return; 3240c50d8ae3SPaolo Bonzini 3241e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 324202c00b3aSBen Gardon 3243897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 32446103bc07SBen Gardon kvm_tdp_mmu_put_root(kvm, sp, false); 324576eb54e7SBen Gardon else if (!--sp->root_count && sp->role.invalid) 3246c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3247c50d8ae3SPaolo Bonzini 3248c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3249c50d8ae3SPaolo Bonzini } 3250c50d8ae3SPaolo Bonzini 3251c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3252c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3253c50d8ae3SPaolo Bonzini ulong roots_to_free) 3254c50d8ae3SPaolo Bonzini { 32554d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3256c50d8ae3SPaolo Bonzini int i; 3257c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3258c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3259c50d8ae3SPaolo Bonzini 3260c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3261c50d8ae3SPaolo Bonzini 3262c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3263c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3264c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3265c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3266c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3267c50d8ae3SPaolo Bonzini break; 3268c50d8ae3SPaolo Bonzini 3269c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3270c50d8ae3SPaolo Bonzini return; 3271c50d8ae3SPaolo Bonzini } 3272c50d8ae3SPaolo Bonzini 3273531810caSBen Gardon write_lock(&kvm->mmu_lock); 3274c50d8ae3SPaolo Bonzini 3275c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3276c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 32774d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3278c50d8ae3SPaolo Bonzini &invalid_list); 3279c50d8ae3SPaolo Bonzini 3280c50d8ae3SPaolo Bonzini if (free_active_root) { 3281c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3282c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 32834d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 328404d45551SSean Christopherson } else if (mmu->pae_root) { 3285c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3286c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3287c834e5e4SSean Christopherson continue; 3288c834e5e4SSean Christopherson 3289c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3290c50d8ae3SPaolo Bonzini &invalid_list); 3291c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3292c50d8ae3SPaolo Bonzini } 3293c50d8ae3SPaolo Bonzini } 329404d45551SSean Christopherson mmu->root_hpa = INVALID_PAGE; 3295be01e8e2SSean Christopherson mmu->root_pgd = 0; 3296c50d8ae3SPaolo Bonzini } 3297c50d8ae3SPaolo Bonzini 32984d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3299531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3300c50d8ae3SPaolo Bonzini } 3301c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3302c50d8ae3SPaolo Bonzini 330325b62c62SSean Christopherson void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 330425b62c62SSean Christopherson { 330525b62c62SSean Christopherson unsigned long roots_to_free = 0; 330625b62c62SSean Christopherson hpa_t root_hpa; 330725b62c62SSean Christopherson int i; 330825b62c62SSean Christopherson 330925b62c62SSean Christopherson /* 331025b62c62SSean Christopherson * This should not be called while L2 is active, L2 can't invalidate 331125b62c62SSean Christopherson * _only_ its own roots, e.g. INVVPID unconditionally exits. 331225b62c62SSean Christopherson */ 331325b62c62SSean Christopherson WARN_ON_ONCE(mmu->mmu_role.base.guest_mode); 331425b62c62SSean Christopherson 331525b62c62SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 331625b62c62SSean Christopherson root_hpa = mmu->prev_roots[i].hpa; 331725b62c62SSean Christopherson if (!VALID_PAGE(root_hpa)) 331825b62c62SSean Christopherson continue; 331925b62c62SSean Christopherson 332025b62c62SSean Christopherson if (!to_shadow_page(root_hpa) || 332125b62c62SSean Christopherson to_shadow_page(root_hpa)->role.guest_mode) 332225b62c62SSean Christopherson roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 332325b62c62SSean Christopherson } 332425b62c62SSean Christopherson 332525b62c62SSean Christopherson kvm_mmu_free_roots(vcpu, mmu, roots_to_free); 332625b62c62SSean Christopherson } 332725b62c62SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots); 332825b62c62SSean Christopherson 332925b62c62SSean Christopherson 3330c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3331c50d8ae3SPaolo Bonzini { 3332c50d8ae3SPaolo Bonzini int ret = 0; 3333c50d8ae3SPaolo Bonzini 3334995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3335c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3336c50d8ae3SPaolo Bonzini ret = 1; 3337c50d8ae3SPaolo Bonzini } 3338c50d8ae3SPaolo Bonzini 3339c50d8ae3SPaolo Bonzini return ret; 3340c50d8ae3SPaolo Bonzini } 3341c50d8ae3SPaolo Bonzini 33428123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 33438123f265SSean Christopherson u8 level, bool direct) 3344c50d8ae3SPaolo Bonzini { 3345c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 33468123f265SSean Christopherson 33478123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 33488123f265SSean Christopherson ++sp->root_count; 33498123f265SSean Christopherson 33508123f265SSean Christopherson return __pa(sp->spt); 33518123f265SSean Christopherson } 33528123f265SSean Christopherson 33538123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 33548123f265SSean Christopherson { 3355b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3356b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 33578123f265SSean Christopherson hpa_t root; 3358c50d8ae3SPaolo Bonzini unsigned i; 33594a38162eSPaolo Bonzini int r; 33604a38162eSPaolo Bonzini 33614a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 33624a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 33634a38162eSPaolo Bonzini if (r < 0) 33644a38162eSPaolo Bonzini goto out_unlock; 3365c50d8ae3SPaolo Bonzini 3366897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 336702c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3368b37233c9SSean Christopherson mmu->root_hpa = root; 336902c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 33706e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3371b37233c9SSean Christopherson mmu->root_hpa = root; 33728123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 33734a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 33744a38162eSPaolo Bonzini r = -EIO; 33754a38162eSPaolo Bonzini goto out_unlock; 33764a38162eSPaolo Bonzini } 337773ad1606SSean Christopherson 3378c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3379c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3380c50d8ae3SPaolo Bonzini 33818123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 33828123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 338317e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 338417e368d9SSean Christopherson shadow_me_mask; 3385c50d8ae3SPaolo Bonzini } 3386b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 338773ad1606SSean Christopherson } else { 338873ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 33894a38162eSPaolo Bonzini r = -EIO; 33904a38162eSPaolo Bonzini goto out_unlock; 339173ad1606SSean Christopherson } 33923651c7fcSSean Christopherson 3393be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3394b37233c9SSean Christopherson mmu->root_pgd = 0; 33954a38162eSPaolo Bonzini out_unlock: 33964a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 33974a38162eSPaolo Bonzini return r; 3398c50d8ae3SPaolo Bonzini } 3399c50d8ae3SPaolo Bonzini 34001e76a3ceSDavid Stevens static int mmu_first_shadow_root_alloc(struct kvm *kvm) 34011e76a3ceSDavid Stevens { 34021e76a3ceSDavid Stevens struct kvm_memslots *slots; 34031e76a3ceSDavid Stevens struct kvm_memory_slot *slot; 3404a54d8066SMaciej S. Szmigiero int r = 0, i, bkt; 34051e76a3ceSDavid Stevens 34061e76a3ceSDavid Stevens /* 34071e76a3ceSDavid Stevens * Check if this is the first shadow root being allocated before 34081e76a3ceSDavid Stevens * taking the lock. 34091e76a3ceSDavid Stevens */ 34101e76a3ceSDavid Stevens if (kvm_shadow_root_allocated(kvm)) 34111e76a3ceSDavid Stevens return 0; 34121e76a3ceSDavid Stevens 34131e76a3ceSDavid Stevens mutex_lock(&kvm->slots_arch_lock); 34141e76a3ceSDavid Stevens 34151e76a3ceSDavid Stevens /* Recheck, under the lock, whether this is the first shadow root. */ 34161e76a3ceSDavid Stevens if (kvm_shadow_root_allocated(kvm)) 34171e76a3ceSDavid Stevens goto out_unlock; 34181e76a3ceSDavid Stevens 34191e76a3ceSDavid Stevens /* 34201e76a3ceSDavid Stevens * Check if anything actually needs to be allocated, e.g. all metadata 34211e76a3ceSDavid Stevens * will be allocated upfront if TDP is disabled. 34221e76a3ceSDavid Stevens */ 34231e76a3ceSDavid Stevens if (kvm_memslots_have_rmaps(kvm) && 34241e76a3ceSDavid Stevens kvm_page_track_write_tracking_enabled(kvm)) 34251e76a3ceSDavid Stevens goto out_success; 34261e76a3ceSDavid Stevens 34271e76a3ceSDavid Stevens for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 34281e76a3ceSDavid Stevens slots = __kvm_memslots(kvm, i); 3429a54d8066SMaciej S. Szmigiero kvm_for_each_memslot(slot, bkt, slots) { 34301e76a3ceSDavid Stevens /* 34311e76a3ceSDavid Stevens * Both of these functions are no-ops if the target is 34321e76a3ceSDavid Stevens * already allocated, so unconditionally calling both 34331e76a3ceSDavid Stevens * is safe. Intentionally do NOT free allocations on 34341e76a3ceSDavid Stevens * failure to avoid having to track which allocations 34351e76a3ceSDavid Stevens * were made now versus when the memslot was created. 34361e76a3ceSDavid Stevens * The metadata is guaranteed to be freed when the slot 34371e76a3ceSDavid Stevens * is freed, and will be kept/used if userspace retries 34381e76a3ceSDavid Stevens * KVM_RUN instead of killing the VM. 34391e76a3ceSDavid Stevens */ 34401e76a3ceSDavid Stevens r = memslot_rmap_alloc(slot, slot->npages); 34411e76a3ceSDavid Stevens if (r) 34421e76a3ceSDavid Stevens goto out_unlock; 34431e76a3ceSDavid Stevens r = kvm_page_track_write_tracking_alloc(slot); 34441e76a3ceSDavid Stevens if (r) 34451e76a3ceSDavid Stevens goto out_unlock; 34461e76a3ceSDavid Stevens } 34471e76a3ceSDavid Stevens } 34481e76a3ceSDavid Stevens 34491e76a3ceSDavid Stevens /* 34501e76a3ceSDavid Stevens * Ensure that shadow_root_allocated becomes true strictly after 34511e76a3ceSDavid Stevens * all the related pointers are set. 34521e76a3ceSDavid Stevens */ 34531e76a3ceSDavid Stevens out_success: 34541e76a3ceSDavid Stevens smp_store_release(&kvm->arch.shadow_root_allocated, true); 34551e76a3ceSDavid Stevens 34561e76a3ceSDavid Stevens out_unlock: 34571e76a3ceSDavid Stevens mutex_unlock(&kvm->slots_arch_lock); 34581e76a3ceSDavid Stevens return r; 34591e76a3ceSDavid Stevens } 34601e76a3ceSDavid Stevens 3461c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3462c50d8ae3SPaolo Bonzini { 3463b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 34646e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3465be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 34668123f265SSean Christopherson hpa_t root; 34674a38162eSPaolo Bonzini unsigned i; 34684a38162eSPaolo Bonzini int r; 3469c50d8ae3SPaolo Bonzini 3470b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3471be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3472c50d8ae3SPaolo Bonzini 3473c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3474c50d8ae3SPaolo Bonzini return 1; 3475c50d8ae3SPaolo Bonzini 3476c50d8ae3SPaolo Bonzini /* 34774a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 34784a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 34794a38162eSPaolo Bonzini */ 34806e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34816e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 34826e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 34836e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 34846e0918aeSSean Christopherson continue; 34856e0918aeSSean Christopherson 34866e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 34876e0918aeSSean Christopherson return 1; 34886e0918aeSSean Christopherson } 34896e0918aeSSean Christopherson } 34906e0918aeSSean Christopherson 34911e76a3ceSDavid Stevens r = mmu_first_shadow_root_alloc(vcpu->kvm); 3492d501f747SBen Gardon if (r) 3493d501f747SBen Gardon return r; 3494d501f747SBen Gardon 34954a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 34964a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 34974a38162eSPaolo Bonzini if (r < 0) 34984a38162eSPaolo Bonzini goto out_unlock; 34994a38162eSPaolo Bonzini 3500c50d8ae3SPaolo Bonzini /* 3501c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3502c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3503c50d8ae3SPaolo Bonzini */ 3504b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 35058123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3506b37233c9SSean Christopherson mmu->shadow_root_level, false); 3507b37233c9SSean Christopherson mmu->root_hpa = root; 3508be01e8e2SSean Christopherson goto set_root_pgd; 3509c50d8ae3SPaolo Bonzini } 3510c50d8ae3SPaolo Bonzini 35114a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 35124a38162eSPaolo Bonzini r = -EIO; 35134a38162eSPaolo Bonzini goto out_unlock; 35144a38162eSPaolo Bonzini } 351573ad1606SSean Christopherson 3516c50d8ae3SPaolo Bonzini /* 3517c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3518c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3519c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3520c50d8ae3SPaolo Bonzini */ 352117e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3522cb0f722aSWei Huang if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL) { 3523c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3524c50d8ae3SPaolo Bonzini 352503ca4589SSean Christopherson if (WARN_ON_ONCE(!mmu->pml4_root)) { 35264a38162eSPaolo Bonzini r = -EIO; 35274a38162eSPaolo Bonzini goto out_unlock; 35284a38162eSPaolo Bonzini } 352903ca4589SSean Christopherson mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; 3530cb0f722aSWei Huang 3531cb0f722aSWei Huang if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) { 3532cb0f722aSWei Huang if (WARN_ON_ONCE(!mmu->pml5_root)) { 3533cb0f722aSWei Huang r = -EIO; 3534cb0f722aSWei Huang goto out_unlock; 3535cb0f722aSWei Huang } 3536cb0f722aSWei Huang mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask; 3537cb0f722aSWei Huang } 353804d45551SSean Christopherson } 353904d45551SSean Christopherson 3540c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3541c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 35426e6ec584SSean Christopherson 3543b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 35446e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3545c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3546c50d8ae3SPaolo Bonzini continue; 3547c50d8ae3SPaolo Bonzini } 35486e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3549c50d8ae3SPaolo Bonzini } 3550c50d8ae3SPaolo Bonzini 35518123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 35528123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3553b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3554c50d8ae3SPaolo Bonzini } 3555c50d8ae3SPaolo Bonzini 3556cb0f722aSWei Huang if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) 3557cb0f722aSWei Huang mmu->root_hpa = __pa(mmu->pml5_root); 3558cb0f722aSWei Huang else if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 355903ca4589SSean Christopherson mmu->root_hpa = __pa(mmu->pml4_root); 3560ba0a194fSSean Christopherson else 3561ba0a194fSSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 3562c50d8ae3SPaolo Bonzini 3563be01e8e2SSean Christopherson set_root_pgd: 3564b37233c9SSean Christopherson mmu->root_pgd = root_pgd; 35654a38162eSPaolo Bonzini out_unlock: 35664a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3567c50d8ae3SPaolo Bonzini 3568*c6c937d6SLike Xu return r; 3569c50d8ae3SPaolo Bonzini } 3570c50d8ae3SPaolo Bonzini 3571748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3572c50d8ae3SPaolo Bonzini { 3573748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3574a717a780SSean Christopherson bool need_pml5 = mmu->shadow_root_level > PT64_ROOT_4LEVEL; 3575cb0f722aSWei Huang u64 *pml5_root = NULL; 3576cb0f722aSWei Huang u64 *pml4_root = NULL; 3577cb0f722aSWei Huang u64 *pae_root; 3578748e52b9SSean Christopherson 3579748e52b9SSean Christopherson /* 3580748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3581748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3582748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3583748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3584748e52b9SSean Christopherson */ 3585748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3586748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3587748e52b9SSean Christopherson return 0; 3588748e52b9SSean Christopherson 3589a717a780SSean Christopherson /* 3590a717a780SSean Christopherson * NPT, the only paging mode that uses this horror, uses a fixed number 3591a717a780SSean Christopherson * of levels for the shadow page tables, e.g. all MMUs are 4-level or 3592a717a780SSean Christopherson * all MMus are 5-level. Thus, this can safely require that pml5_root 3593a717a780SSean Christopherson * is allocated if the other roots are valid and pml5 is needed, as any 3594a717a780SSean Christopherson * prior MMU would also have required pml5. 3595a717a780SSean Christopherson */ 3596a717a780SSean Christopherson if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root)) 3597748e52b9SSean Christopherson return 0; 3598748e52b9SSean Christopherson 3599748e52b9SSean Christopherson /* 3600748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3601748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3602748e52b9SSean Christopherson */ 3603cb0f722aSWei Huang if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root || 3604a717a780SSean Christopherson (need_pml5 && mmu->pml5_root))) 3605748e52b9SSean Christopherson return -EIO; 3606748e52b9SSean Christopherson 36074a98623dSSean Christopherson /* 36084a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 36094a98623dSSean Christopherson * doesn't need to be decrypted. 36104a98623dSSean Christopherson */ 3611748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3612748e52b9SSean Christopherson if (!pae_root) 3613748e52b9SSean Christopherson return -ENOMEM; 3614748e52b9SSean Christopherson 3615cb0f722aSWei Huang #ifdef CONFIG_X86_64 361603ca4589SSean Christopherson pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3617cb0f722aSWei Huang if (!pml4_root) 3618cb0f722aSWei Huang goto err_pml4; 3619cb0f722aSWei Huang 3620a717a780SSean Christopherson if (need_pml5) { 3621cb0f722aSWei Huang pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3622cb0f722aSWei Huang if (!pml5_root) 3623cb0f722aSWei Huang goto err_pml5; 3624748e52b9SSean Christopherson } 3625cb0f722aSWei Huang #endif 3626748e52b9SSean Christopherson 3627748e52b9SSean Christopherson mmu->pae_root = pae_root; 362803ca4589SSean Christopherson mmu->pml4_root = pml4_root; 3629cb0f722aSWei Huang mmu->pml5_root = pml5_root; 3630748e52b9SSean Christopherson 3631748e52b9SSean Christopherson return 0; 3632cb0f722aSWei Huang 3633cb0f722aSWei Huang #ifdef CONFIG_X86_64 3634cb0f722aSWei Huang err_pml5: 3635cb0f722aSWei Huang free_page((unsigned long)pml4_root); 3636cb0f722aSWei Huang err_pml4: 3637cb0f722aSWei Huang free_page((unsigned long)pae_root); 3638cb0f722aSWei Huang return -ENOMEM; 3639cb0f722aSWei Huang #endif 3640c50d8ae3SPaolo Bonzini } 3641c50d8ae3SPaolo Bonzini 3642264d3dc1SLai Jiangshan static bool is_unsync_root(hpa_t root) 3643264d3dc1SLai Jiangshan { 3644264d3dc1SLai Jiangshan struct kvm_mmu_page *sp; 3645264d3dc1SLai Jiangshan 364661b05a9fSLai Jiangshan if (!VALID_PAGE(root)) 364761b05a9fSLai Jiangshan return false; 364861b05a9fSLai Jiangshan 3649264d3dc1SLai Jiangshan /* 3650264d3dc1SLai Jiangshan * The read barrier orders the CPU's read of SPTE.W during the page table 3651264d3dc1SLai Jiangshan * walk before the reads of sp->unsync/sp->unsync_children here. 3652264d3dc1SLai Jiangshan * 3653264d3dc1SLai Jiangshan * Even if another CPU was marking the SP as unsync-ed simultaneously, 3654264d3dc1SLai Jiangshan * any guest page table changes are not guaranteed to be visible anyway 3655264d3dc1SLai Jiangshan * until this VCPU issues a TLB flush strictly after those changes are 3656264d3dc1SLai Jiangshan * made. We only need to ensure that the other CPU sets these flags 3657264d3dc1SLai Jiangshan * before any actual changes to the page tables are made. The comments 3658264d3dc1SLai Jiangshan * in mmu_try_to_unsync_pages() describe what could go wrong if this 3659264d3dc1SLai Jiangshan * requirement isn't satisfied. 3660264d3dc1SLai Jiangshan */ 3661264d3dc1SLai Jiangshan smp_rmb(); 3662264d3dc1SLai Jiangshan sp = to_shadow_page(root); 3663264d3dc1SLai Jiangshan if (sp->unsync || sp->unsync_children) 3664264d3dc1SLai Jiangshan return true; 3665264d3dc1SLai Jiangshan 3666264d3dc1SLai Jiangshan return false; 3667264d3dc1SLai Jiangshan } 3668264d3dc1SLai Jiangshan 3669c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3670c50d8ae3SPaolo Bonzini { 3671c50d8ae3SPaolo Bonzini int i; 3672c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3673c50d8ae3SPaolo Bonzini 3674c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3675c50d8ae3SPaolo Bonzini return; 3676c50d8ae3SPaolo Bonzini 3677c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3678c50d8ae3SPaolo Bonzini return; 3679c50d8ae3SPaolo Bonzini 3680c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3681c50d8ae3SPaolo Bonzini 3682c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3683c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3684e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3685c50d8ae3SPaolo Bonzini 3686264d3dc1SLai Jiangshan if (!is_unsync_root(root)) 3687c50d8ae3SPaolo Bonzini return; 3688c50d8ae3SPaolo Bonzini 3689531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3690c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3691c50d8ae3SPaolo Bonzini 369265855ed8SLai Jiangshan mmu_sync_children(vcpu, sp, true); 3693c50d8ae3SPaolo Bonzini 3694c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3695531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3696c50d8ae3SPaolo Bonzini return; 3697c50d8ae3SPaolo Bonzini } 3698c50d8ae3SPaolo Bonzini 3699531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3700c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3701c50d8ae3SPaolo Bonzini 3702c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3703c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3704c50d8ae3SPaolo Bonzini 3705c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3706c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3707e47c4aeeSSean Christopherson sp = to_shadow_page(root); 370865855ed8SLai Jiangshan mmu_sync_children(vcpu, sp, true); 3709c50d8ae3SPaolo Bonzini } 3710c50d8ae3SPaolo Bonzini } 3711c50d8ae3SPaolo Bonzini 3712c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3713531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3714c50d8ae3SPaolo Bonzini } 3715c50d8ae3SPaolo Bonzini 371661b05a9fSLai Jiangshan void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu) 371761b05a9fSLai Jiangshan { 371861b05a9fSLai Jiangshan unsigned long roots_to_free = 0; 371961b05a9fSLai Jiangshan int i; 372061b05a9fSLai Jiangshan 372161b05a9fSLai Jiangshan for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 372261b05a9fSLai Jiangshan if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa)) 372361b05a9fSLai Jiangshan roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 372461b05a9fSLai Jiangshan 372561b05a9fSLai Jiangshan /* sync prev_roots by simply freeing them */ 372661b05a9fSLai Jiangshan kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free); 372761b05a9fSLai Jiangshan } 372861b05a9fSLai Jiangshan 37291f5a21eeSLai Jiangshan static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 37301f5a21eeSLai Jiangshan gpa_t vaddr, u32 access, 3731c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3732c50d8ae3SPaolo Bonzini { 3733c50d8ae3SPaolo Bonzini if (exception) 3734c50d8ae3SPaolo Bonzini exception->error_code = 0; 3735c59a0f57SLai Jiangshan return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception); 3736c50d8ae3SPaolo Bonzini } 3737c50d8ae3SPaolo Bonzini 3738c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3739c50d8ae3SPaolo Bonzini { 3740c50d8ae3SPaolo Bonzini /* 3741c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3742c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3743c50d8ae3SPaolo Bonzini */ 3744c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3745c50d8ae3SPaolo Bonzini return false; 3746c50d8ae3SPaolo Bonzini 3747c50d8ae3SPaolo Bonzini if (direct) 3748c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3749c50d8ae3SPaolo Bonzini 3750c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3751c50d8ae3SPaolo Bonzini } 3752c50d8ae3SPaolo Bonzini 375395fb5b02SBen Gardon /* 375495fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 375595fb5b02SBen Gardon * That SPTE may be non-present. 3756c5c8c7c5SDavid Matlack * 3757c5c8c7c5SDavid Matlack * Must be called between walk_shadow_page_lockless_{begin,end}. 375895fb5b02SBen Gardon */ 375939b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3760c50d8ae3SPaolo Bonzini { 3761c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 37622aa07893SSean Christopherson int leaf = -1; 376395fb5b02SBen Gardon u64 spte; 3764c50d8ae3SPaolo Bonzini 376539b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 376639b4d43eSSean Christopherson *root_level = iterator.level; 3767c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3768c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 376995fb5b02SBen Gardon leaf = iterator.level; 3770c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3771c50d8ae3SPaolo Bonzini 3772dde81f94SSean Christopherson sptes[leaf] = spte; 377395fb5b02SBen Gardon } 377495fb5b02SBen Gardon 377595fb5b02SBen Gardon return leaf; 377695fb5b02SBen Gardon } 377795fb5b02SBen Gardon 37789aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 377995fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 378095fb5b02SBen Gardon { 3781dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 378295fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 378339b4d43eSSean Christopherson int root, leaf, level; 378495fb5b02SBen Gardon bool reserved = false; 378595fb5b02SBen Gardon 3786c5c8c7c5SDavid Matlack walk_shadow_page_lockless_begin(vcpu); 3787c5c8c7c5SDavid Matlack 378863c0cac9SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 378939b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 379095fb5b02SBen Gardon else 379139b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 379295fb5b02SBen Gardon 3793c5c8c7c5SDavid Matlack walk_shadow_page_lockless_end(vcpu); 3794c5c8c7c5SDavid Matlack 37952aa07893SSean Christopherson if (unlikely(leaf < 0)) { 37962aa07893SSean Christopherson *sptep = 0ull; 37972aa07893SSean Christopherson return reserved; 37982aa07893SSean Christopherson } 37992aa07893SSean Christopherson 38009aa41879SSean Christopherson *sptep = sptes[leaf]; 38019aa41879SSean Christopherson 38029aa41879SSean Christopherson /* 38039aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 38049aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 38059aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 38069aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 38079aa41879SSean Christopherson */ 38089aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 38099aa41879SSean Christopherson leaf++; 381095fb5b02SBen Gardon 381195fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 381295fb5b02SBen Gardon 38139aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3814961f8445SSean Christopherson reserved |= is_rsvd_spte(rsvd_check, sptes[level], level); 3815c50d8ae3SPaolo Bonzini 3816c50d8ae3SPaolo Bonzini if (reserved) { 3817bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3818c50d8ae3SPaolo Bonzini __func__, addr); 381995fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3820bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3821bb4cdf3aSSean Christopherson sptes[level], level, 3822961f8445SSean Christopherson get_rsvd_bits(rsvd_check, sptes[level], level)); 3823c50d8ae3SPaolo Bonzini } 3824ddce6208SSean Christopherson 3825c50d8ae3SPaolo Bonzini return reserved; 3826c50d8ae3SPaolo Bonzini } 3827c50d8ae3SPaolo Bonzini 3828c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3829c50d8ae3SPaolo Bonzini { 3830c50d8ae3SPaolo Bonzini u64 spte; 3831c50d8ae3SPaolo Bonzini bool reserved; 3832c50d8ae3SPaolo Bonzini 3833c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3834c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3835c50d8ae3SPaolo Bonzini 383695fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3837c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3838c50d8ae3SPaolo Bonzini return -EINVAL; 3839c50d8ae3SPaolo Bonzini 3840c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3841c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 38420a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3843c50d8ae3SPaolo Bonzini 3844c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3845c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3846c50d8ae3SPaolo Bonzini 3847c50d8ae3SPaolo Bonzini if (direct) 3848c50d8ae3SPaolo Bonzini addr = 0; 3849c50d8ae3SPaolo Bonzini 3850c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3851c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3852c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3853c50d8ae3SPaolo Bonzini } 3854c50d8ae3SPaolo Bonzini 3855c50d8ae3SPaolo Bonzini /* 3856c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3857c50d8ae3SPaolo Bonzini * the address. 3858c50d8ae3SPaolo Bonzini */ 3859c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3860c50d8ae3SPaolo Bonzini } 3861c50d8ae3SPaolo Bonzini 3862c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3863b8a5d551SPaolo Bonzini struct kvm_page_fault *fault) 3864c50d8ae3SPaolo Bonzini { 3865b8a5d551SPaolo Bonzini if (unlikely(fault->rsvd)) 3866c50d8ae3SPaolo Bonzini return false; 3867c50d8ae3SPaolo Bonzini 3868b8a5d551SPaolo Bonzini if (!fault->present || !fault->write) 3869c50d8ae3SPaolo Bonzini return false; 3870c50d8ae3SPaolo Bonzini 3871c50d8ae3SPaolo Bonzini /* 3872c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3873c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3874c50d8ae3SPaolo Bonzini */ 38759d395a0aSBen Gardon if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE)) 3876c50d8ae3SPaolo Bonzini return true; 3877c50d8ae3SPaolo Bonzini 3878c50d8ae3SPaolo Bonzini return false; 3879c50d8ae3SPaolo Bonzini } 3880c50d8ae3SPaolo Bonzini 3881c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3882c50d8ae3SPaolo Bonzini { 3883c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3884c50d8ae3SPaolo Bonzini u64 spte; 3885c50d8ae3SPaolo Bonzini 3886c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 38873e44dce4SLai Jiangshan for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) 3888c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3889c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3890c50d8ae3SPaolo Bonzini } 3891c50d8ae3SPaolo Bonzini 38926f3c1fc5SLiang Zhang static u32 alloc_apf_token(struct kvm_vcpu *vcpu) 38936f3c1fc5SLiang Zhang { 38946f3c1fc5SLiang Zhang /* make sure the token value is not 0 */ 38956f3c1fc5SLiang Zhang u32 id = vcpu->arch.apf.id; 38966f3c1fc5SLiang Zhang 38976f3c1fc5SLiang Zhang if (id << 12 == 0) 38986f3c1fc5SLiang Zhang vcpu->arch.apf.id = 1; 38996f3c1fc5SLiang Zhang 39006f3c1fc5SLiang Zhang return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 39016f3c1fc5SLiang Zhang } 39026f3c1fc5SLiang Zhang 3903e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 39049f1a8526SSean Christopherson gfn_t gfn) 3905c50d8ae3SPaolo Bonzini { 3906c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3907c50d8ae3SPaolo Bonzini 39086f3c1fc5SLiang Zhang arch.token = alloc_apf_token(vcpu); 3909c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3910c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3911d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3912c50d8ae3SPaolo Bonzini 39139f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 39149f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3915c50d8ae3SPaolo Bonzini } 3916c50d8ae3SPaolo Bonzini 39173647cd04SPaolo Bonzini static bool kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, int *r) 3918c50d8ae3SPaolo Bonzini { 3919e710c5f6SDavid Matlack struct kvm_memory_slot *slot = fault->slot; 3920c50d8ae3SPaolo Bonzini bool async; 3921c50d8ae3SPaolo Bonzini 3922e0c37868SSean Christopherson /* 3923e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3924e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3925e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3926e0c37868SSean Christopherson */ 3927e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 39288f32d5e5SMaxim Levitsky goto out_retry; 3929e0c37868SSean Christopherson 39309cc13d60SMaxim Levitsky if (!kvm_is_visible_memslot(slot)) { 3931c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 39329cc13d60SMaxim Levitsky if (is_guest_mode(vcpu)) { 3933e710c5f6SDavid Matlack fault->slot = NULL; 39343647cd04SPaolo Bonzini fault->pfn = KVM_PFN_NOSLOT; 39353647cd04SPaolo Bonzini fault->map_writable = false; 3936c50d8ae3SPaolo Bonzini return false; 3937c50d8ae3SPaolo Bonzini } 39389cc13d60SMaxim Levitsky /* 39399cc13d60SMaxim Levitsky * If the APIC access page exists but is disabled, go directly 39409cc13d60SMaxim Levitsky * to emulation without caching the MMIO access or creating a 39419cc13d60SMaxim Levitsky * MMIO SPTE. That way the cache doesn't need to be purged 39429cc13d60SMaxim Levitsky * when the AVIC is re-enabled. 39439cc13d60SMaxim Levitsky */ 39449cc13d60SMaxim Levitsky if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT && 39459cc13d60SMaxim Levitsky !kvm_apicv_activated(vcpu->kvm)) { 39469cc13d60SMaxim Levitsky *r = RET_PF_EMULATE; 39479cc13d60SMaxim Levitsky return true; 39489cc13d60SMaxim Levitsky } 39499cc13d60SMaxim Levitsky } 3950c50d8ae3SPaolo Bonzini 3951c50d8ae3SPaolo Bonzini async = false; 39523647cd04SPaolo Bonzini fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async, 39533647cd04SPaolo Bonzini fault->write, &fault->map_writable, 39543647cd04SPaolo Bonzini &fault->hva); 3955c50d8ae3SPaolo Bonzini if (!async) 3956c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3957c50d8ae3SPaolo Bonzini 39582839180cSPaolo Bonzini if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) { 39593647cd04SPaolo Bonzini trace_kvm_try_async_get_page(fault->addr, fault->gfn); 39603647cd04SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) { 39613647cd04SPaolo Bonzini trace_kvm_async_pf_doublefault(fault->addr, fault->gfn); 3962c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 39638f32d5e5SMaxim Levitsky goto out_retry; 39643647cd04SPaolo Bonzini } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) 39658f32d5e5SMaxim Levitsky goto out_retry; 3966c50d8ae3SPaolo Bonzini } 3967c50d8ae3SPaolo Bonzini 39683647cd04SPaolo Bonzini fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL, 39693647cd04SPaolo Bonzini fault->write, &fault->map_writable, 39703647cd04SPaolo Bonzini &fault->hva); 3971a7cc099fSAndrei Vagin return false; 39728f32d5e5SMaxim Levitsky 39738f32d5e5SMaxim Levitsky out_retry: 39748f32d5e5SMaxim Levitsky *r = RET_PF_RETRY; 39758f32d5e5SMaxim Levitsky return true; 3976c50d8ae3SPaolo Bonzini } 3977c50d8ae3SPaolo Bonzini 3978a955cad8SSean Christopherson /* 3979a955cad8SSean Christopherson * Returns true if the page fault is stale and needs to be retried, i.e. if the 3980a955cad8SSean Christopherson * root was invalidated by a memslot update or a relevant mmu_notifier fired. 3981a955cad8SSean Christopherson */ 3982a955cad8SSean Christopherson static bool is_page_fault_stale(struct kvm_vcpu *vcpu, 3983a955cad8SSean Christopherson struct kvm_page_fault *fault, int mmu_seq) 3984a955cad8SSean Christopherson { 398518c841e1SSean Christopherson struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root_hpa); 398618c841e1SSean Christopherson 398718c841e1SSean Christopherson /* Special roots, e.g. pae_root, are not backed by shadow pages. */ 398818c841e1SSean Christopherson if (sp && is_obsolete_sp(vcpu->kvm, sp)) 398918c841e1SSean Christopherson return true; 399018c841e1SSean Christopherson 399118c841e1SSean Christopherson /* 399218c841e1SSean Christopherson * Roots without an associated shadow page are considered invalid if 399318c841e1SSean Christopherson * there is a pending request to free obsolete roots. The request is 399418c841e1SSean Christopherson * only a hint that the current root _may_ be obsolete and needs to be 399518c841e1SSean Christopherson * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a 399618c841e1SSean Christopherson * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs 399718c841e1SSean Christopherson * to reload even if no vCPU is actively using the root. 399818c841e1SSean Christopherson */ 399918c841e1SSean Christopherson if (!sp && kvm_test_request(KVM_REQ_MMU_RELOAD, vcpu)) 4000a955cad8SSean Christopherson return true; 4001a955cad8SSean Christopherson 4002a955cad8SSean Christopherson return fault->slot && 4003a955cad8SSean Christopherson mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, fault->hva); 4004a955cad8SSean Christopherson } 4005a955cad8SSean Christopherson 40064326e57eSPaolo Bonzini static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 4007c50d8ae3SPaolo Bonzini { 400863c0cac9SDavid Matlack bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); 4009c50d8ae3SPaolo Bonzini 40100f90e1c1SSean Christopherson unsigned long mmu_seq; 401183f06fa7SSean Christopherson int r; 4012c50d8ae3SPaolo Bonzini 40133c8ad5a6SPaolo Bonzini fault->gfn = fault->addr >> PAGE_SHIFT; 4014e710c5f6SDavid Matlack fault->slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn); 4015e710c5f6SDavid Matlack 4016b8a5d551SPaolo Bonzini if (page_fault_handle_page_track(vcpu, fault)) 4017c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 4018c50d8ae3SPaolo Bonzini 40193c8ad5a6SPaolo Bonzini r = fast_page_fault(vcpu, fault); 4020c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 4021c4371c2aSSean Christopherson return r; 402283291445SSean Christopherson 4023378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 4024c50d8ae3SPaolo Bonzini if (r) 4025c50d8ae3SPaolo Bonzini return r; 4026c50d8ae3SPaolo Bonzini 4027367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 4028367fd790SSean Christopherson smp_rmb(); 4029367fd790SSean Christopherson 40303647cd04SPaolo Bonzini if (kvm_faultin_pfn(vcpu, fault, &r)) 40318f32d5e5SMaxim Levitsky return r; 4032367fd790SSean Christopherson 40333a13f4feSPaolo Bonzini if (handle_abnormal_pfn(vcpu, fault, ACC_ALL, &r)) 4034367fd790SSean Christopherson return r; 4035367fd790SSean Christopherson 4036367fd790SSean Christopherson r = RET_PF_RETRY; 4037a2855afcSBen Gardon 40380b873fd7SDavid Matlack if (is_tdp_mmu_fault) 4039a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 4040a2855afcSBen Gardon else 4041531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 4042a2855afcSBen Gardon 4043a955cad8SSean Christopherson if (is_page_fault_stale(vcpu, fault, mmu_seq)) 4044367fd790SSean Christopherson goto out_unlock; 4045a955cad8SSean Christopherson 40467bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 40477bd7ded6SSean Christopherson if (r) 4048367fd790SSean Christopherson goto out_unlock; 4049bb18842eSBen Gardon 40500b873fd7SDavid Matlack if (is_tdp_mmu_fault) 40512f6305ddSPaolo Bonzini r = kvm_tdp_mmu_map(vcpu, fault); 4052bb18842eSBen Gardon else 405343b74355SPaolo Bonzini r = __direct_map(vcpu, fault); 40540f90e1c1SSean Christopherson 4055367fd790SSean Christopherson out_unlock: 40560b873fd7SDavid Matlack if (is_tdp_mmu_fault) 4057a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 4058a2855afcSBen Gardon else 4059531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 40603647cd04SPaolo Bonzini kvm_release_pfn_clean(fault->pfn); 4061367fd790SSean Christopherson return r; 4062c50d8ae3SPaolo Bonzini } 4063c50d8ae3SPaolo Bonzini 4064c501040aSPaolo Bonzini static int nonpaging_page_fault(struct kvm_vcpu *vcpu, 4065c501040aSPaolo Bonzini struct kvm_page_fault *fault) 40660f90e1c1SSean Christopherson { 40674326e57eSPaolo Bonzini pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code); 40680f90e1c1SSean Christopherson 40690f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 40704326e57eSPaolo Bonzini fault->max_level = PG_LEVEL_2M; 40714326e57eSPaolo Bonzini return direct_page_fault(vcpu, fault); 40720f90e1c1SSean Christopherson } 40730f90e1c1SSean Christopherson 4074c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 4075c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 4076c50d8ae3SPaolo Bonzini { 4077c50d8ae3SPaolo Bonzini int r = 1; 40789ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 4079c50d8ae3SPaolo Bonzini 4080736c291cSSean Christopherson #ifndef CONFIG_X86_64 4081736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 4082736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 4083736c291cSSean Christopherson return -EFAULT; 4084736c291cSSean Christopherson #endif 4085736c291cSSean Christopherson 4086c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 40879ce372b3SVitaly Kuznetsov if (!flags) { 4088c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 4089c50d8ae3SPaolo Bonzini 4090c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 4091c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 4092c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 4093c50d8ae3SPaolo Bonzini insn_len); 40949ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 409568fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 4096c50d8ae3SPaolo Bonzini local_irq_disable(); 40976bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 4098c50d8ae3SPaolo Bonzini local_irq_enable(); 40999ce372b3SVitaly Kuznetsov } else { 41009ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 4101c50d8ae3SPaolo Bonzini } 41029ce372b3SVitaly Kuznetsov 4103c50d8ae3SPaolo Bonzini return r; 4104c50d8ae3SPaolo Bonzini } 4105c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 4106c50d8ae3SPaolo Bonzini 4107c501040aSPaolo Bonzini int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 4108c50d8ae3SPaolo Bonzini { 41094326e57eSPaolo Bonzini while (fault->max_level > PG_LEVEL_4K) { 41104326e57eSPaolo Bonzini int page_num = KVM_PAGES_PER_HPAGE(fault->max_level); 41114326e57eSPaolo Bonzini gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1); 4112c50d8ae3SPaolo Bonzini 4113cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 4114cb9b88c6SSean Christopherson break; 41154326e57eSPaolo Bonzini 41164326e57eSPaolo Bonzini --fault->max_level; 4117c50d8ae3SPaolo Bonzini } 4118c50d8ae3SPaolo Bonzini 41194326e57eSPaolo Bonzini return direct_page_fault(vcpu, fault); 4120c50d8ae3SPaolo Bonzini } 4121c50d8ae3SPaolo Bonzini 412284a16226SSean Christopherson static void nonpaging_init_context(struct kvm_mmu *context) 4123c50d8ae3SPaolo Bonzini { 4124c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 4125c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4126c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 41275efac074SPaolo Bonzini context->invlpg = NULL; 4128c50d8ae3SPaolo Bonzini context->direct_map = true; 4129c50d8ae3SPaolo Bonzini } 4130c50d8ae3SPaolo Bonzini 4131be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 41320be44352SSean Christopherson union kvm_mmu_page_role role) 41330be44352SSean Christopherson { 4134be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 4135e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 4136e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 41370be44352SSean Christopherson } 41380be44352SSean Christopherson 4139c50d8ae3SPaolo Bonzini /* 4140be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 4141c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 4142c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 4143c50d8ae3SPaolo Bonzini * returned. 4144c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 4145c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4146c50d8ae3SPaolo Bonzini */ 4147be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4148c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4149c50d8ae3SPaolo Bonzini { 4150c50d8ae3SPaolo Bonzini uint i; 4151c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 4152c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4153c50d8ae3SPaolo Bonzini 4154be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 4155c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 4156c50d8ae3SPaolo Bonzini 4157be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 41580be44352SSean Christopherson return true; 41590be44352SSean Christopherson 4160c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4161c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 4162c50d8ae3SPaolo Bonzini 4163be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 4164c50d8ae3SPaolo Bonzini break; 4165c50d8ae3SPaolo Bonzini } 4166c50d8ae3SPaolo Bonzini 4167c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 4168be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 4169c50d8ae3SPaolo Bonzini 4170c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4171c50d8ae3SPaolo Bonzini } 4172c50d8ae3SPaolo Bonzini 4173be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4174b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4175c50d8ae3SPaolo Bonzini { 4176c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4177c50d8ae3SPaolo Bonzini 4178c50d8ae3SPaolo Bonzini /* 4179c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4180c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4181c50d8ae3SPaolo Bonzini * later if necessary. 4182c50d8ae3SPaolo Bonzini */ 4183c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4184b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4185fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 4186c50d8ae3SPaolo Bonzini 4187c50d8ae3SPaolo Bonzini return false; 4188c50d8ae3SPaolo Bonzini } 4189c50d8ae3SPaolo Bonzini 4190be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4191b5129100SSean Christopherson union kvm_mmu_page_role new_role) 4192c50d8ae3SPaolo Bonzini { 4193be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4194b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4195b869855bSSean Christopherson return; 4196c50d8ae3SPaolo Bonzini } 4197c50d8ae3SPaolo Bonzini 4198c50d8ae3SPaolo Bonzini /* 4199b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4200b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4201b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4202b869855bSSean Christopherson * free the root set here and allocate a new one. 4203b869855bSSean Christopherson */ 4204b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4205b869855bSSean Christopherson 4206b5129100SSean Christopherson if (force_flush_and_sync_on_reuse) { 4207b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 4208b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4209b5129100SSean Christopherson } 4210b869855bSSean Christopherson 4211b869855bSSean Christopherson /* 4212b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4213b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4214b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4215b869855bSSean Christopherson * the shadow page tables. 4216c50d8ae3SPaolo Bonzini */ 4217c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4218c50d8ae3SPaolo Bonzini 4219daa5b6c1SBen Gardon /* 4220daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 4221daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 4222daa5b6c1SBen Gardon */ 4223daa5b6c1SBen Gardon if (!new_role.direct) 4224daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 4225daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 4226c50d8ae3SPaolo Bonzini } 4227c50d8ae3SPaolo Bonzini 4228b5129100SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd) 4229c50d8ae3SPaolo Bonzini { 4230b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu)); 4231c50d8ae3SPaolo Bonzini } 4232be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4233c50d8ae3SPaolo Bonzini 4234c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4235c50d8ae3SPaolo Bonzini { 4236c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4237c50d8ae3SPaolo Bonzini } 4238c50d8ae3SPaolo Bonzini 4239c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 4240c3e5e415SLai Jiangshan unsigned int access) 4241c50d8ae3SPaolo Bonzini { 4242c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4243c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4244c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4245c50d8ae3SPaolo Bonzini return true; 4246c50d8ae3SPaolo Bonzini } 4247c50d8ae3SPaolo Bonzini 4248c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4249c50d8ae3SPaolo Bonzini return true; 4250c50d8ae3SPaolo Bonzini } 4251c50d8ae3SPaolo Bonzini 4252c50d8ae3SPaolo Bonzini return false; 4253c50d8ae3SPaolo Bonzini } 4254c50d8ae3SPaolo Bonzini 4255c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4256c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4257c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4258c50d8ae3SPaolo Bonzini #undef PTTYPE 4259c50d8ae3SPaolo Bonzini 4260c50d8ae3SPaolo Bonzini #define PTTYPE 64 4261c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4262c50d8ae3SPaolo Bonzini #undef PTTYPE 4263c50d8ae3SPaolo Bonzini 4264c50d8ae3SPaolo Bonzini #define PTTYPE 32 4265c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4266c50d8ae3SPaolo Bonzini #undef PTTYPE 4267c50d8ae3SPaolo Bonzini 4268c50d8ae3SPaolo Bonzini static void 4269b705a277SSean Christopherson __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check, 42705b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4271c50d8ae3SPaolo Bonzini bool pse, bool amd) 4272c50d8ae3SPaolo Bonzini { 4273c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4274c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 42755b7f575cSSean Christopherson u64 high_bits_rsvd; 4276c50d8ae3SPaolo Bonzini 4277c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4278c50d8ae3SPaolo Bonzini 4279c50d8ae3SPaolo Bonzini if (!gbpages) 4280c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4281c50d8ae3SPaolo Bonzini 42825b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 42835b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 42845b7f575cSSean Christopherson else 42855b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 42865b7f575cSSean Christopherson 42875b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 42885b7f575cSSean Christopherson if (!nx) 42895b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 42905b7f575cSSean Christopherson 4291c50d8ae3SPaolo Bonzini /* 4292c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4293c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4294c50d8ae3SPaolo Bonzini */ 4295c50d8ae3SPaolo Bonzini if (amd) 4296c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4297c50d8ae3SPaolo Bonzini 4298c50d8ae3SPaolo Bonzini switch (level) { 4299c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4300c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4301c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4302c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4303c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4304c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4305c50d8ae3SPaolo Bonzini 4306c50d8ae3SPaolo Bonzini if (!pse) { 4307c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4308c50d8ae3SPaolo Bonzini break; 4309c50d8ae3SPaolo Bonzini } 4310c50d8ae3SPaolo Bonzini 4311c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4312c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4313c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4314c50d8ae3SPaolo Bonzini else 4315c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4316c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4317c50d8ae3SPaolo Bonzini break; 4318c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 43195b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 43205b7f575cSSean Christopherson high_bits_rsvd | 43215b7f575cSSean Christopherson rsvd_bits(5, 8) | 43225b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 43235b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 43245b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 43255b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4326c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4327c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4328c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4329c50d8ae3SPaolo Bonzini break; 4330c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 43315b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 43325b7f575cSSean Christopherson nonleaf_bit8_rsvd | 43335b7f575cSSean Christopherson rsvd_bits(7, 7); 4334c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4335c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4336df561f66SGustavo A. R. Silva fallthrough; 4337c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 43385b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 43395b7f575cSSean Christopherson nonleaf_bit8_rsvd | 43405b7f575cSSean Christopherson rsvd_bits(7, 7); 43415b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 43425b7f575cSSean Christopherson gbpages_bit_rsvd; 43435b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 43445b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4345c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4346c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 43475b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 43485b7f575cSSean Christopherson gbpages_bit_rsvd | 4349c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 43505b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4351c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4352c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4353c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4354c50d8ae3SPaolo Bonzini break; 4355c50d8ae3SPaolo Bonzini } 4356c50d8ae3SPaolo Bonzini } 4357c50d8ae3SPaolo Bonzini 435827de9250SSean Christopherson static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu) 435927de9250SSean Christopherson { 436027de9250SSean Christopherson /* 436127de9250SSean Christopherson * If TDP is enabled, let the guest use GBPAGES if they're supported in 436227de9250SSean Christopherson * hardware. The hardware page walker doesn't let KVM disable GBPAGES, 436327de9250SSean Christopherson * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA 436427de9250SSean Christopherson * walk for performance and complexity reasons. Not to mention KVM 436527de9250SSean Christopherson * _can't_ solve the problem because GVA->GPA walks aren't visible to 436627de9250SSean Christopherson * KVM once a TDP translation is installed. Mimic hardware behavior so 436727de9250SSean Christopherson * that KVM's is at least consistent, i.e. doesn't randomly inject #PF. 436827de9250SSean Christopherson */ 436927de9250SSean Christopherson return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) : 437027de9250SSean Christopherson guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES); 437127de9250SSean Christopherson } 437227de9250SSean Christopherson 4373c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4374c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4375c50d8ae3SPaolo Bonzini { 4376b705a277SSean Christopherson __reset_rsvds_bits_mask(&context->guest_rsvd_check, 43775b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 437890599c28SSean Christopherson context->root_level, is_efer_nx(context), 437927de9250SSean Christopherson guest_can_use_gbpages(vcpu), 43804e9c0d80SSean Christopherson is_cr4_pse(context), 438123493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4382c50d8ae3SPaolo Bonzini } 4383c50d8ae3SPaolo Bonzini 4384c50d8ae3SPaolo Bonzini static void 4385c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 438684ea5c09SLai Jiangshan u64 pa_bits_rsvd, bool execonly, int huge_page_level) 4387c50d8ae3SPaolo Bonzini { 43885b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 438984ea5c09SLai Jiangshan u64 large_1g_rsvd = 0, large_2m_rsvd = 0; 4390c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4391c50d8ae3SPaolo Bonzini 439284ea5c09SLai Jiangshan if (huge_page_level < PG_LEVEL_1G) 439384ea5c09SLai Jiangshan large_1g_rsvd = rsvd_bits(7, 7); 439484ea5c09SLai Jiangshan if (huge_page_level < PG_LEVEL_2M) 439584ea5c09SLai Jiangshan large_2m_rsvd = rsvd_bits(7, 7); 439684ea5c09SLai Jiangshan 43975b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 43985b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 439984ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd; 440084ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd; 44015b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4402c50d8ae3SPaolo Bonzini 4403c50d8ae3SPaolo Bonzini /* large page */ 4404c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4405c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 440684ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd; 440784ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd; 4408c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4409c50d8ae3SPaolo Bonzini 4410c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4411c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4412c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4413c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4414c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4415c50d8ae3SPaolo Bonzini if (!execonly) { 4416c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4417c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4418c50d8ae3SPaolo Bonzini } 4419c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4420c50d8ae3SPaolo Bonzini } 4421c50d8ae3SPaolo Bonzini 4422c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 442384ea5c09SLai Jiangshan struct kvm_mmu *context, bool execonly, int huge_page_level) 4424c50d8ae3SPaolo Bonzini { 4425c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 442684ea5c09SLai Jiangshan vcpu->arch.reserved_gpa_bits, execonly, 442784ea5c09SLai Jiangshan huge_page_level); 4428c50d8ae3SPaolo Bonzini } 4429c50d8ae3SPaolo Bonzini 44306f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 44316f8e65a6SSean Christopherson { 44326f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 44336f8e65a6SSean Christopherson } 44346f8e65a6SSean Christopherson 4435c50d8ae3SPaolo Bonzini /* 4436c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4437c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4438c50d8ae3SPaolo Bonzini * follow the features in guest. 4439c50d8ae3SPaolo Bonzini */ 444016be1d12SSean Christopherson static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 444116be1d12SSean Christopherson struct kvm_mmu *context) 4442c50d8ae3SPaolo Bonzini { 4443112022bdSSean Christopherson /* 4444112022bdSSean Christopherson * KVM uses NX when TDP is disabled to handle a variety of scenarios, 4445112022bdSSean Christopherson * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and 4446112022bdSSean Christopherson * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0. 4447112022bdSSean Christopherson * The iTLB multi-hit workaround can be toggled at any time, so assume 4448112022bdSSean Christopherson * NX can be used by any non-nested shadow MMU to avoid having to reset 4449112022bdSSean Christopherson * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled. 4450112022bdSSean Christopherson */ 445190599c28SSean Christopherson bool uses_nx = is_efer_nx(context) || !tdp_enabled; 44528c985b2dSSean Christopherson 44538c985b2dSSean Christopherson /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */ 44548c985b2dSSean Christopherson bool is_amd = true; 44558c985b2dSSean Christopherson /* KVM doesn't use 2-level page tables for the shadow MMU. */ 44568c985b2dSSean Christopherson bool is_pse = false; 4457c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4458c50d8ae3SPaolo Bonzini int i; 4459c50d8ae3SPaolo Bonzini 44608c985b2dSSean Christopherson WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL); 44618c985b2dSSean Christopherson 4462c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4463b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4464c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 446527de9250SSean Christopherson guest_can_use_gbpages(vcpu), is_pse, is_amd); 4466c50d8ae3SPaolo Bonzini 4467c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4468c50d8ae3SPaolo Bonzini return; 4469c50d8ae3SPaolo Bonzini 4470c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4471c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4472c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4473c50d8ae3SPaolo Bonzini } 4474c50d8ae3SPaolo Bonzini 4475c50d8ae3SPaolo Bonzini } 4476c50d8ae3SPaolo Bonzini 4477c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4478c50d8ae3SPaolo Bonzini { 4479c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4480c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4481c50d8ae3SPaolo Bonzini } 4482c50d8ae3SPaolo Bonzini 4483c50d8ae3SPaolo Bonzini /* 4484c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4485c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4486c50d8ae3SPaolo Bonzini */ 4487c50d8ae3SPaolo Bonzini static void 4488c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4489c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4490c50d8ae3SPaolo Bonzini { 4491c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4492c50d8ae3SPaolo Bonzini int i; 4493c50d8ae3SPaolo Bonzini 4494c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4495c50d8ae3SPaolo Bonzini 4496c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4497b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4498c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4499c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 45008c985b2dSSean Christopherson false, true); 4501c50d8ae3SPaolo Bonzini else 4502c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 450384ea5c09SLai Jiangshan reserved_hpa_bits(), false, 450484ea5c09SLai Jiangshan max_huge_page_level); 4505c50d8ae3SPaolo Bonzini 4506c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4507c50d8ae3SPaolo Bonzini return; 4508c50d8ae3SPaolo Bonzini 4509c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4510c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4511c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4512c50d8ae3SPaolo Bonzini } 4513c50d8ae3SPaolo Bonzini } 4514c50d8ae3SPaolo Bonzini 4515c50d8ae3SPaolo Bonzini /* 4516c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4517c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4518c50d8ae3SPaolo Bonzini */ 4519c50d8ae3SPaolo Bonzini static void 4520c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4521c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4522c50d8ae3SPaolo Bonzini { 4523c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 452484ea5c09SLai Jiangshan reserved_hpa_bits(), execonly, 452584ea5c09SLai Jiangshan max_huge_page_level); 4526c50d8ae3SPaolo Bonzini } 4527c50d8ae3SPaolo Bonzini 4528c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4529c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4530c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4531c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4532c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4533c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4534c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4535c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4536c50d8ae3SPaolo Bonzini 4537c50d8ae3SPaolo Bonzini 4538c596f147SSean Christopherson static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept) 4539c50d8ae3SPaolo Bonzini { 4540c50d8ae3SPaolo Bonzini unsigned byte; 4541c50d8ae3SPaolo Bonzini 4542c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4543c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4544c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4545c50d8ae3SPaolo Bonzini 4546c596f147SSean Christopherson bool cr4_smep = is_cr4_smep(mmu); 4547c596f147SSean Christopherson bool cr4_smap = is_cr4_smap(mmu); 4548c596f147SSean Christopherson bool cr0_wp = is_cr0_wp(mmu); 454990599c28SSean Christopherson bool efer_nx = is_efer_nx(mmu); 4550c50d8ae3SPaolo Bonzini 4551c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4552c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4553c50d8ae3SPaolo Bonzini 4554c50d8ae3SPaolo Bonzini /* 4555c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4556c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4557c50d8ae3SPaolo Bonzini */ 4558c50d8ae3SPaolo Bonzini 4559c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4560c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4561c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4562c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4563c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4564c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4565c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4566c50d8ae3SPaolo Bonzini u8 smepf = 0; 4567c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4568c50d8ae3SPaolo Bonzini u8 smapf = 0; 4569c50d8ae3SPaolo Bonzini 4570c50d8ae3SPaolo Bonzini if (!ept) { 4571c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4572c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4573c50d8ae3SPaolo Bonzini 4574c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 457590599c28SSean Christopherson if (!efer_nx) 4576c50d8ae3SPaolo Bonzini ff = 0; 4577c50d8ae3SPaolo Bonzini 4578c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4579c50d8ae3SPaolo Bonzini if (!cr0_wp) 4580c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4581c50d8ae3SPaolo Bonzini 4582c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4583c50d8ae3SPaolo Bonzini if (cr4_smep) 4584c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4585c50d8ae3SPaolo Bonzini 4586c50d8ae3SPaolo Bonzini /* 4587c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4588c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4589c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4590c50d8ae3SPaolo Bonzini * conditions are true: 4591c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4592c50d8ae3SPaolo Bonzini * - A user page is accessed 4593c50d8ae3SPaolo Bonzini * - The access is not a fetch 4594c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4595c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4596c50d8ae3SPaolo Bonzini * 4597c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4598c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4599c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4600c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4601c50d8ae3SPaolo Bonzini */ 4602c50d8ae3SPaolo Bonzini if (cr4_smap) 4603c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4604c50d8ae3SPaolo Bonzini } 4605c50d8ae3SPaolo Bonzini 4606c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4607c50d8ae3SPaolo Bonzini } 4608c50d8ae3SPaolo Bonzini } 4609c50d8ae3SPaolo Bonzini 4610c50d8ae3SPaolo Bonzini /* 4611c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4612c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4613c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4614c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4615c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4616c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4617c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4618c50d8ae3SPaolo Bonzini * 4619c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4620c50d8ae3SPaolo Bonzini * page tables and the machine state: 4621c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4622c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4623c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4624c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4625c50d8ae3SPaolo Bonzini * 4626c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4627c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4628c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4629c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4630c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4631c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4632c50d8ae3SPaolo Bonzini * only will be masked away. 4633c50d8ae3SPaolo Bonzini */ 46342e4c0661SSean Christopherson static void update_pkru_bitmask(struct kvm_mmu *mmu) 4635c50d8ae3SPaolo Bonzini { 4636c50d8ae3SPaolo Bonzini unsigned bit; 4637c50d8ae3SPaolo Bonzini bool wp; 4638c50d8ae3SPaolo Bonzini 4639c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4640a3ca5281SChenyi Qiang 4641a3ca5281SChenyi Qiang if (!is_cr4_pke(mmu)) 4642c50d8ae3SPaolo Bonzini return; 4643c50d8ae3SPaolo Bonzini 46442e4c0661SSean Christopherson wp = is_cr0_wp(mmu); 4645c50d8ae3SPaolo Bonzini 4646c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4647c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4648c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4649c50d8ae3SPaolo Bonzini 4650c50d8ae3SPaolo Bonzini pfec = bit << 1; 4651c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4652c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4653c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4654c50d8ae3SPaolo Bonzini 4655c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4656c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4657c50d8ae3SPaolo Bonzini 4658c50d8ae3SPaolo Bonzini /* 4659c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4660c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4661c50d8ae3SPaolo Bonzini */ 4662c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4663c50d8ae3SPaolo Bonzini /* 4664c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4665c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4666c50d8ae3SPaolo Bonzini */ 4667c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4668c50d8ae3SPaolo Bonzini 4669c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4670c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4671c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4672c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4673c50d8ae3SPaolo Bonzini 4674c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4675c50d8ae3SPaolo Bonzini } 4676c50d8ae3SPaolo Bonzini } 4677c50d8ae3SPaolo Bonzini 4678533f9a4bSSean Christopherson static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu, 4679533f9a4bSSean Christopherson struct kvm_mmu *mmu) 4680c50d8ae3SPaolo Bonzini { 4681533f9a4bSSean Christopherson if (!is_cr0_pg(mmu)) 4682533f9a4bSSean Christopherson return; 4683c50d8ae3SPaolo Bonzini 4684533f9a4bSSean Christopherson reset_rsvds_bits_mask(vcpu, mmu); 4685533f9a4bSSean Christopherson update_permission_bitmask(mmu, false); 4686533f9a4bSSean Christopherson update_pkru_bitmask(mmu); 4687c50d8ae3SPaolo Bonzini } 4688c50d8ae3SPaolo Bonzini 4689fe660f72SSean Christopherson static void paging64_init_context(struct kvm_mmu *context) 4690c50d8ae3SPaolo Bonzini { 4691c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4692c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4693c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4694c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4695c50d8ae3SPaolo Bonzini context->direct_map = false; 4696c50d8ae3SPaolo Bonzini } 4697c50d8ae3SPaolo Bonzini 469884a16226SSean Christopherson static void paging32_init_context(struct kvm_mmu *context) 4699c50d8ae3SPaolo Bonzini { 4700c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4701c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4702c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4703c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4704c50d8ae3SPaolo Bonzini context->direct_map = false; 4705c50d8ae3SPaolo Bonzini } 4706c50d8ae3SPaolo Bonzini 47078626c120SSean Christopherson static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu, 47088626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 4709c50d8ae3SPaolo Bonzini { 4710c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4711c50d8ae3SPaolo Bonzini 4712ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4713ca8d664fSSean Christopherson ext.cr0_pg = 1; 47148626c120SSean Christopherson ext.cr4_pae = ____is_cr4_pae(regs); 47158626c120SSean Christopherson ext.cr4_smep = ____is_cr4_smep(regs); 47168626c120SSean Christopherson ext.cr4_smap = ____is_cr4_smap(regs); 47178626c120SSean Christopherson ext.cr4_pse = ____is_cr4_pse(regs); 471884c679f5SSean Christopherson 471984c679f5SSean Christopherson /* PKEY and LA57 are active iff long mode is active. */ 472084c679f5SSean Christopherson ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs); 472184c679f5SSean Christopherson ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs); 4722b8453cdcSMaxim Levitsky ext.efer_lma = ____is_efer_lma(regs); 4723ca8d664fSSean Christopherson } 4724c50d8ae3SPaolo Bonzini 4725c50d8ae3SPaolo Bonzini ext.valid = 1; 4726c50d8ae3SPaolo Bonzini 4727c50d8ae3SPaolo Bonzini return ext; 4728c50d8ae3SPaolo Bonzini } 4729c50d8ae3SPaolo Bonzini 4730c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 47318626c120SSean Christopherson struct kvm_mmu_role_regs *regs, 4732c50d8ae3SPaolo Bonzini bool base_only) 4733c50d8ae3SPaolo Bonzini { 4734c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4735c50d8ae3SPaolo Bonzini 4736c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4737ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4738167f8a5cSSean Christopherson role.base.efer_nx = ____is_efer_nx(regs); 47398626c120SSean Christopherson role.base.cr0_wp = ____is_cr0_wp(regs); 4740ca8d664fSSean Christopherson } 4741c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4742c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4743c50d8ae3SPaolo Bonzini 4744c50d8ae3SPaolo Bonzini if (base_only) 4745c50d8ae3SPaolo Bonzini return role; 4746c50d8ae3SPaolo Bonzini 47478626c120SSean Christopherson role.ext = kvm_calc_mmu_role_ext(vcpu, regs); 4748c50d8ae3SPaolo Bonzini 4749c50d8ae3SPaolo Bonzini return role; 4750c50d8ae3SPaolo Bonzini } 4751c50d8ae3SPaolo Bonzini 4752d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4753d468d94bSSean Christopherson { 4754746700d2SWei Huang /* tdp_root_level is architecture forced level, use it if nonzero */ 4755746700d2SWei Huang if (tdp_root_level) 4756746700d2SWei Huang return tdp_root_level; 4757746700d2SWei Huang 4758d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 475983013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4760d468d94bSSean Christopherson return 4; 4761d468d94bSSean Christopherson 476283013059SSean Christopherson return max_tdp_level; 4763d468d94bSSean Christopherson } 4764d468d94bSSean Christopherson 4765c50d8ae3SPaolo Bonzini static union kvm_mmu_role 47668626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, 47678626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4768c50d8ae3SPaolo Bonzini { 47698626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4770c50d8ae3SPaolo Bonzini 4771c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4772d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4773c50d8ae3SPaolo Bonzini role.base.direct = true; 4774bb3b394dSLai Jiangshan role.base.has_4_byte_gpte = false; 4775c50d8ae3SPaolo Bonzini 4776c50d8ae3SPaolo Bonzini return role; 4777c50d8ae3SPaolo Bonzini } 4778c50d8ae3SPaolo Bonzini 4779c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4780c50d8ae3SPaolo Bonzini { 47818c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 47828626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4783c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 47848626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, false); 4785c50d8ae3SPaolo Bonzini 4786c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4787c50d8ae3SPaolo Bonzini return; 4788c50d8ae3SPaolo Bonzini 4789c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 47907a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4791c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 47925efac074SPaolo Bonzini context->invlpg = NULL; 4793d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4794c50d8ae3SPaolo Bonzini context->direct_map = true; 4795d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4796c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4797c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4798f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(®s); 4799c50d8ae3SPaolo Bonzini 480036f26787SSean Christopherson if (!is_cr0_pg(context)) 4801c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 480236f26787SSean Christopherson else if (is_cr4_pae(context)) 4803c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4804f4bd6f73SSean Christopherson else 4805c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4806c50d8ae3SPaolo Bonzini 4807533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4808c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4809c50d8ae3SPaolo Bonzini } 4810c50d8ae3SPaolo Bonzini 4811c50d8ae3SPaolo Bonzini static union kvm_mmu_role 48128626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, 48138626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4814c50d8ae3SPaolo Bonzini { 48158626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4816c50d8ae3SPaolo Bonzini 48178626c120SSean Christopherson role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs); 48188626c120SSean Christopherson role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs); 4819bb3b394dSLai Jiangshan role.base.has_4_byte_gpte = ____is_cr0_pg(regs) && !____is_cr4_pae(regs); 4820c50d8ae3SPaolo Bonzini 482159505b55SSean Christopherson return role; 482259505b55SSean Christopherson } 482359505b55SSean Christopherson 482459505b55SSean Christopherson static union kvm_mmu_role 48258626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, 48268626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 482759505b55SSean Christopherson { 482859505b55SSean Christopherson union kvm_mmu_role role = 48298626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, base_only); 483059505b55SSean Christopherson 48318626c120SSean Christopherson role.base.direct = !____is_cr0_pg(regs); 483259505b55SSean Christopherson 48338626c120SSean Christopherson if (!____is_efer_lma(regs)) 4834c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 48358626c120SSean Christopherson else if (____is_cr4_la57(regs)) 4836c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4837c50d8ae3SPaolo Bonzini else 4838c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4839c50d8ae3SPaolo Bonzini 4840c50d8ae3SPaolo Bonzini return role; 4841c50d8ae3SPaolo Bonzini } 4842c50d8ae3SPaolo Bonzini 48438c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 4844594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs, 48458c008659SPaolo Bonzini union kvm_mmu_role new_role) 4846c50d8ae3SPaolo Bonzini { 484718db1b17SSean Christopherson if (new_role.as_u64 == context->mmu_role.as_u64) 484818db1b17SSean Christopherson return; 4849c50d8ae3SPaolo Bonzini 4850c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 485118db1b17SSean Christopherson 485236f26787SSean Christopherson if (!is_cr0_pg(context)) 485384a16226SSean Christopherson nonpaging_init_context(context); 485436f26787SSean Christopherson else if (is_cr4_pae(context)) 4855fe660f72SSean Christopherson paging64_init_context(context); 4856c50d8ae3SPaolo Bonzini else 485784a16226SSean Christopherson paging32_init_context(context); 4858f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(regs); 4859c50d8ae3SPaolo Bonzini 4860533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4861d555f705SSean Christopherson context->shadow_root_level = new_role.base.level; 4862d555f705SSean Christopherson 4863c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4864c50d8ae3SPaolo Bonzini } 48650f04a2acSVitaly Kuznetsov 4866594e91a1SSean Christopherson static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, 4867594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs) 48680f04a2acSVitaly Kuznetsov { 48698c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 48700f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 48718626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false); 48720f04a2acSVitaly Kuznetsov 4873594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, regs, new_role); 48740f04a2acSVitaly Kuznetsov } 48750f04a2acSVitaly Kuznetsov 487659505b55SSean Christopherson static union kvm_mmu_role 48778626c120SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu, 48788626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 487959505b55SSean Christopherson { 488059505b55SSean Christopherson union kvm_mmu_role role = 48818626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 488259505b55SSean Christopherson 488359505b55SSean Christopherson role.base.direct = false; 4884d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 488559505b55SSean Christopherson 488659505b55SSean Christopherson return role; 488759505b55SSean Christopherson } 488859505b55SSean Christopherson 4889dbc4739bSSean Christopherson void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4890dbc4739bSSean Christopherson unsigned long cr4, u64 efer, gpa_t nested_cr3) 48910f04a2acSVitaly Kuznetsov { 48928c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4893594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 4894594e91a1SSean Christopherson .cr0 = cr0, 489528f091bcSPaolo Bonzini .cr4 = cr4 & ~X86_CR4_PKE, 4896594e91a1SSean Christopherson .efer = efer, 4897594e91a1SSean Christopherson }; 48988626c120SSean Christopherson union kvm_mmu_role new_role; 48990f04a2acSVitaly Kuznetsov 49008626c120SSean Christopherson new_role = kvm_calc_shadow_npt_root_page_role(vcpu, ®s); 4901a506fdd2SVitaly Kuznetsov 4902b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base); 4903a3322d5cSSean Christopherson 4904594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, ®s, new_role); 49050f04a2acSVitaly Kuznetsov } 49060f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4907c50d8ae3SPaolo Bonzini 4908c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4909c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4910bb1fcc70SSean Christopherson bool execonly, u8 level) 4911c50d8ae3SPaolo Bonzini { 4912c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4913c50d8ae3SPaolo Bonzini 4914c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4915c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4916c50d8ae3SPaolo Bonzini 4917bb1fcc70SSean Christopherson role.base.level = level; 4918bb3b394dSLai Jiangshan role.base.has_4_byte_gpte = false; 4919c50d8ae3SPaolo Bonzini role.base.direct = false; 4920c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4921c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4922c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4923c50d8ae3SPaolo Bonzini 4924cd6767c3SSean Christopherson /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */ 4925cd6767c3SSean Christopherson role.ext.word = 0; 4926c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4927cd6767c3SSean Christopherson role.ext.valid = 1; 4928c50d8ae3SPaolo Bonzini 4929c50d8ae3SPaolo Bonzini return role; 4930c50d8ae3SPaolo Bonzini } 4931c50d8ae3SPaolo Bonzini 4932c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4933cc022ae1SLai Jiangshan int huge_page_level, bool accessed_dirty, 4934cc022ae1SLai Jiangshan gpa_t new_eptp) 4935c50d8ae3SPaolo Bonzini { 49368c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4937bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4938c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4939c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4940bb1fcc70SSean Christopherson execonly, level); 4941c50d8ae3SPaolo Bonzini 4942b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base); 4943c50d8ae3SPaolo Bonzini 4944c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4945c50d8ae3SPaolo Bonzini return; 4946c50d8ae3SPaolo Bonzini 494718db1b17SSean Christopherson context->mmu_role.as_u64 = new_role.as_u64; 494818db1b17SSean Christopherson 4949bb1fcc70SSean Christopherson context->shadow_root_level = level; 4950c50d8ae3SPaolo Bonzini 4951c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4952c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4953c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4954c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4955c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4956bb1fcc70SSean Christopherson context->root_level = level; 4957c50d8ae3SPaolo Bonzini context->direct_map = false; 4958c50d8ae3SPaolo Bonzini 4959c596f147SSean Christopherson update_permission_bitmask(context, true); 496028f091bcSPaolo Bonzini context->pkru_mask = 0; 4961cc022ae1SLai Jiangshan reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level); 4962c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4963c50d8ae3SPaolo Bonzini } 4964c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4965c50d8ae3SPaolo Bonzini 4966c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4967c50d8ae3SPaolo Bonzini { 49688c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4969594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4970c50d8ae3SPaolo Bonzini 4971594e91a1SSean Christopherson kvm_init_shadow_mmu(vcpu, ®s); 4972929d1cfaSPaolo Bonzini 4973d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4974c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4975c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4976c50d8ae3SPaolo Bonzini } 4977c50d8ae3SPaolo Bonzini 49788626c120SSean Christopherson static union kvm_mmu_role 49798626c120SSean Christopherson kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu, struct kvm_mmu_role_regs *regs) 4980654430efSSean Christopherson { 49818626c120SSean Christopherson union kvm_mmu_role role; 49828626c120SSean Christopherson 49838626c120SSean Christopherson role = kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 4984654430efSSean Christopherson 4985654430efSSean Christopherson /* 4986654430efSSean Christopherson * Nested MMUs are used only for walking L2's gva->gpa, they never have 4987654430efSSean Christopherson * shadow pages of their own and so "direct" has no meaning. Set it 4988654430efSSean Christopherson * to "true" to try to detect bogus usage of the nested MMU. 4989654430efSSean Christopherson */ 4990654430efSSean Christopherson role.base.direct = true; 4991f4bd6f73SSean Christopherson role.base.level = role_regs_to_root_level(regs); 4992654430efSSean Christopherson return role; 4993654430efSSean Christopherson } 4994654430efSSean Christopherson 4995c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4996c50d8ae3SPaolo Bonzini { 49978626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 49988626c120SSean Christopherson union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu, ®s); 4999c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 5000c50d8ae3SPaolo Bonzini 5001c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 5002c50d8ae3SPaolo Bonzini return; 5003c50d8ae3SPaolo Bonzini 5004c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 5005d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 5006c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 5007c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 50085472fcd4SSean Christopherson g_context->root_level = new_role.base.level; 5009c50d8ae3SPaolo Bonzini 5010c50d8ae3SPaolo Bonzini /* 50115efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 50125efac074SPaolo Bonzini * SPTEs. 50135efac074SPaolo Bonzini */ 50145efac074SPaolo Bonzini g_context->invlpg = NULL; 50155efac074SPaolo Bonzini 50165efac074SPaolo Bonzini /* 5017c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 5018c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 5019c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 5020c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 5021c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 5022c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 5023c50d8ae3SPaolo Bonzini */ 5024fa4b5588SSean Christopherson if (!is_paging(vcpu)) 50251f5a21eeSLai Jiangshan g_context->gva_to_gpa = nonpaging_gva_to_gpa; 5026fa4b5588SSean Christopherson else if (is_long_mode(vcpu)) 50271f5a21eeSLai Jiangshan g_context->gva_to_gpa = paging64_gva_to_gpa; 5028fa4b5588SSean Christopherson else if (is_pae(vcpu)) 50291f5a21eeSLai Jiangshan g_context->gva_to_gpa = paging64_gva_to_gpa; 5030fa4b5588SSean Christopherson else 50311f5a21eeSLai Jiangshan g_context->gva_to_gpa = paging32_gva_to_gpa; 5032fa4b5588SSean Christopherson 5033533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, g_context); 5034c50d8ae3SPaolo Bonzini } 5035c50d8ae3SPaolo Bonzini 5036c9060662SSean Christopherson void kvm_init_mmu(struct kvm_vcpu *vcpu) 5037c50d8ae3SPaolo Bonzini { 5038c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 5039c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 5040c50d8ae3SPaolo Bonzini else if (tdp_enabled) 5041c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 5042c50d8ae3SPaolo Bonzini else 5043c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 5044c50d8ae3SPaolo Bonzini } 5045c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 5046c50d8ae3SPaolo Bonzini 5047c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 5048c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 5049c50d8ae3SPaolo Bonzini { 50508626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 5051c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 5052c50d8ae3SPaolo Bonzini 5053c50d8ae3SPaolo Bonzini if (tdp_enabled) 50548626c120SSean Christopherson role = kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, true); 5055c50d8ae3SPaolo Bonzini else 50568626c120SSean Christopherson role = kvm_calc_shadow_mmu_root_page_role(vcpu, ®s, true); 5057c50d8ae3SPaolo Bonzini 5058c50d8ae3SPaolo Bonzini return role.base; 5059c50d8ae3SPaolo Bonzini } 5060c50d8ae3SPaolo Bonzini 506149c6f875SSean Christopherson void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) 506249c6f875SSean Christopherson { 506349c6f875SSean Christopherson /* 506449c6f875SSean Christopherson * Invalidate all MMU roles to force them to reinitialize as CPUID 506549c6f875SSean Christopherson * information is factored into reserved bit calculations. 5066feb627e8SVitaly Kuznetsov * 5067feb627e8SVitaly Kuznetsov * Correctly handling multiple vCPU models with respect to paging and 5068feb627e8SVitaly Kuznetsov * physical address properties) in a single VM would require tracking 5069feb627e8SVitaly Kuznetsov * all relevant CPUID information in kvm_mmu_page_role. That is very 5070feb627e8SVitaly Kuznetsov * undesirable as it would increase the memory requirements for 5071feb627e8SVitaly Kuznetsov * gfn_track (see struct kvm_mmu_page_role comments). For now that 5072feb627e8SVitaly Kuznetsov * problem is swept under the rug; KVM's CPUID API is horrific and 5073feb627e8SVitaly Kuznetsov * it's all but impossible to solve it without introducing a new API. 507449c6f875SSean Christopherson */ 507549c6f875SSean Christopherson vcpu->arch.root_mmu.mmu_role.ext.valid = 0; 507649c6f875SSean Christopherson vcpu->arch.guest_mmu.mmu_role.ext.valid = 0; 507749c6f875SSean Christopherson vcpu->arch.nested_mmu.mmu_role.ext.valid = 0; 507849c6f875SSean Christopherson kvm_mmu_reset_context(vcpu); 507963f5a190SSean Christopherson 508063f5a190SSean Christopherson /* 5081feb627e8SVitaly Kuznetsov * Changing guest CPUID after KVM_RUN is forbidden, see the comment in 5082feb627e8SVitaly Kuznetsov * kvm_arch_vcpu_ioctl(). 508363f5a190SSean Christopherson */ 5084feb627e8SVitaly Kuznetsov KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm); 508549c6f875SSean Christopherson } 508649c6f875SSean Christopherson 5087c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 5088c50d8ae3SPaolo Bonzini { 5089c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5090c9060662SSean Christopherson kvm_init_mmu(vcpu); 5091c50d8ae3SPaolo Bonzini } 5092c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 5093c50d8ae3SPaolo Bonzini 5094c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 5095c50d8ae3SPaolo Bonzini { 5096c50d8ae3SPaolo Bonzini int r; 5097c50d8ae3SPaolo Bonzini 5098378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 5099c50d8ae3SPaolo Bonzini if (r) 5100c50d8ae3SPaolo Bonzini goto out; 5101748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 5102c50d8ae3SPaolo Bonzini if (r) 5103c50d8ae3SPaolo Bonzini goto out; 51044a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 51056e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 51066e6ec584SSean Christopherson else 51076e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 5108c50d8ae3SPaolo Bonzini if (r) 5109c50d8ae3SPaolo Bonzini goto out; 5110a91f387bSSean Christopherson 5111a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 5112a91f387bSSean Christopherson 5113727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 5114b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 5115c50d8ae3SPaolo Bonzini out: 5116c50d8ae3SPaolo Bonzini return r; 5117c50d8ae3SPaolo Bonzini } 5118c50d8ae3SPaolo Bonzini 5119c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 5120c50d8ae3SPaolo Bonzini { 5121c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 5122c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 5123c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 5124c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 5125c50d8ae3SPaolo Bonzini } 5126c50d8ae3SPaolo Bonzini 5127c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 5128c50d8ae3SPaolo Bonzini { 5129c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 5130c50d8ae3SPaolo Bonzini return false; 5131c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 5132c50d8ae3SPaolo Bonzini return true; 5133c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 5134c50d8ae3SPaolo Bonzini return true; 5135c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 5136c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 5137c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 5138c50d8ae3SPaolo Bonzini } 5139c50d8ae3SPaolo Bonzini 5140c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 5141c50d8ae3SPaolo Bonzini int *bytes) 5142c50d8ae3SPaolo Bonzini { 5143c50d8ae3SPaolo Bonzini u64 gentry = 0; 5144c50d8ae3SPaolo Bonzini int r; 5145c50d8ae3SPaolo Bonzini 5146c50d8ae3SPaolo Bonzini /* 5147c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 5148c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 5149c50d8ae3SPaolo Bonzini * when they have the same mode. 5150c50d8ae3SPaolo Bonzini */ 5151c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5152c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5153c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5154c50d8ae3SPaolo Bonzini *bytes = 8; 5155c50d8ae3SPaolo Bonzini } 5156c50d8ae3SPaolo Bonzini 5157c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5158c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5159c50d8ae3SPaolo Bonzini if (r) 5160c50d8ae3SPaolo Bonzini gentry = 0; 5161c50d8ae3SPaolo Bonzini } 5162c50d8ae3SPaolo Bonzini 5163c50d8ae3SPaolo Bonzini return gentry; 5164c50d8ae3SPaolo Bonzini } 5165c50d8ae3SPaolo Bonzini 5166c50d8ae3SPaolo Bonzini /* 5167c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5168c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5169c50d8ae3SPaolo Bonzini */ 5170c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5171c50d8ae3SPaolo Bonzini { 5172c50d8ae3SPaolo Bonzini /* 5173c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5174c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5175c50d8ae3SPaolo Bonzini */ 51763bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5177c50d8ae3SPaolo Bonzini return false; 5178c50d8ae3SPaolo Bonzini 5179c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5180c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5181c50d8ae3SPaolo Bonzini } 5182c50d8ae3SPaolo Bonzini 5183c50d8ae3SPaolo Bonzini /* 5184c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5185c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5186c50d8ae3SPaolo Bonzini */ 5187c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5188c50d8ae3SPaolo Bonzini int bytes) 5189c50d8ae3SPaolo Bonzini { 5190c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5191c50d8ae3SPaolo Bonzini 5192c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5193c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5194c50d8ae3SPaolo Bonzini 5195c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5196bb3b394dSLai Jiangshan pte_size = sp->role.has_4_byte_gpte ? 4 : 8; 5197c50d8ae3SPaolo Bonzini 5198c50d8ae3SPaolo Bonzini /* 5199c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5200c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5201c50d8ae3SPaolo Bonzini */ 5202c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5203c50d8ae3SPaolo Bonzini return false; 5204c50d8ae3SPaolo Bonzini 5205c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5206c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5207c50d8ae3SPaolo Bonzini 5208c50d8ae3SPaolo Bonzini return misaligned; 5209c50d8ae3SPaolo Bonzini } 5210c50d8ae3SPaolo Bonzini 5211c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5212c50d8ae3SPaolo Bonzini { 5213c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5214c50d8ae3SPaolo Bonzini u64 *spte; 5215c50d8ae3SPaolo Bonzini int level; 5216c50d8ae3SPaolo Bonzini 5217c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5218c50d8ae3SPaolo Bonzini level = sp->role.level; 5219c50d8ae3SPaolo Bonzini *nspte = 1; 5220bb3b394dSLai Jiangshan if (sp->role.has_4_byte_gpte) { 5221c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5222c50d8ae3SPaolo Bonzini /* 5223c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5224c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5225c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5226c50d8ae3SPaolo Bonzini */ 5227c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5228c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5229c50d8ae3SPaolo Bonzini page_offset <<= 1; 5230c50d8ae3SPaolo Bonzini *nspte = 2; 5231c50d8ae3SPaolo Bonzini } 5232c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5233c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5234c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5235c50d8ae3SPaolo Bonzini return NULL; 5236c50d8ae3SPaolo Bonzini } 5237c50d8ae3SPaolo Bonzini 5238c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5239c50d8ae3SPaolo Bonzini return spte; 5240c50d8ae3SPaolo Bonzini } 5241c50d8ae3SPaolo Bonzini 5242c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5243c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5244c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5245c50d8ae3SPaolo Bonzini { 5246c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5247c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5248c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5249c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5250c50d8ae3SPaolo Bonzini int npte; 525106152b2dSLai Jiangshan bool flush = false; 5252c50d8ae3SPaolo Bonzini 5253c50d8ae3SPaolo Bonzini /* 5254c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5255c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5256c50d8ae3SPaolo Bonzini */ 5257c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5258c50d8ae3SPaolo Bonzini return; 5259c50d8ae3SPaolo Bonzini 5260c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5261c50d8ae3SPaolo Bonzini 5262c50d8ae3SPaolo Bonzini /* 5263c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5264d9f6e12fSIngo Molnar * or not since pte prefetch is skipped if it does not have 5265c50d8ae3SPaolo Bonzini * enough objects in the cache. 5266c50d8ae3SPaolo Bonzini */ 5267378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5268c50d8ae3SPaolo Bonzini 5269531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5270c50d8ae3SPaolo Bonzini 5271c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5272c50d8ae3SPaolo Bonzini 5273c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5274c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5275c50d8ae3SPaolo Bonzini 5276c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5277c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5278c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5279c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5280c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5281c50d8ae3SPaolo Bonzini continue; 5282c50d8ae3SPaolo Bonzini } 5283c50d8ae3SPaolo Bonzini 5284c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5285c50d8ae3SPaolo Bonzini if (!spte) 5286c50d8ae3SPaolo Bonzini continue; 5287c50d8ae3SPaolo Bonzini 5288c50d8ae3SPaolo Bonzini while (npte--) { 5289c50d8ae3SPaolo Bonzini entry = *spte; 52902de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5291c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5292c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5293c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 529406152b2dSLai Jiangshan flush = true; 5295c50d8ae3SPaolo Bonzini ++spte; 5296c50d8ae3SPaolo Bonzini } 5297c50d8ae3SPaolo Bonzini } 529806152b2dSLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 5299c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5300531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5301c50d8ae3SPaolo Bonzini } 5302c50d8ae3SPaolo Bonzini 5303736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5304c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5305c50d8ae3SPaolo Bonzini { 530692daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5307c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5308c50d8ae3SPaolo Bonzini 53096948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5310ddce6208SSean Christopherson return RET_PF_RETRY; 5311ddce6208SSean Christopherson 5312c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5313c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5314736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5315c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5316c50d8ae3SPaolo Bonzini goto emulate; 5317c50d8ae3SPaolo Bonzini } 5318c50d8ae3SPaolo Bonzini 5319c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 53207a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 53217a02674dSSean Christopherson lower_32_bits(error_code), false); 532219025e7bSSean Christopherson if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) 53237b367bc9SSean Christopherson return -EIO; 5324c50d8ae3SPaolo Bonzini } 5325c50d8ae3SPaolo Bonzini 5326c50d8ae3SPaolo Bonzini if (r < 0) 5327c50d8ae3SPaolo Bonzini return r; 532883a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 532983a2ba4cSSean Christopherson return 1; 5330c50d8ae3SPaolo Bonzini 5331c50d8ae3SPaolo Bonzini /* 5332c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5333c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5334c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5335c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5336c50d8ae3SPaolo Bonzini * and resume the guest. 5337c50d8ae3SPaolo Bonzini */ 5338c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5339c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5340736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5341c50d8ae3SPaolo Bonzini return 1; 5342c50d8ae3SPaolo Bonzini } 5343c50d8ae3SPaolo Bonzini 5344c50d8ae3SPaolo Bonzini /* 5345c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5346c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5347c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5348c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5349c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5350c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5351c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5352c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5353c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5354c50d8ae3SPaolo Bonzini */ 5355736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 535692daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5357c50d8ae3SPaolo Bonzini emulate: 5358736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5359c50d8ae3SPaolo Bonzini insn_len); 5360c50d8ae3SPaolo Bonzini } 5361c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5362c50d8ae3SPaolo Bonzini 53635efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 53645efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5365c50d8ae3SPaolo Bonzini { 5366c50d8ae3SPaolo Bonzini int i; 5367c50d8ae3SPaolo Bonzini 53685efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 53695efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 53705efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5371c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5372c50d8ae3SPaolo Bonzini return; 5373c50d8ae3SPaolo Bonzini 5374b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 53755efac074SPaolo Bonzini } 53765efac074SPaolo Bonzini 53775efac074SPaolo Bonzini if (!mmu->invlpg) 53785efac074SPaolo Bonzini return; 53795efac074SPaolo Bonzini 53805efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5381c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5382c50d8ae3SPaolo Bonzini 5383c50d8ae3SPaolo Bonzini /* 5384c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5385c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5386c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5387c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5388c50d8ae3SPaolo Bonzini * just always sync it. 5389c50d8ae3SPaolo Bonzini * 5390c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5391c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5392c50d8ae3SPaolo Bonzini * for them. 5393c50d8ae3SPaolo Bonzini */ 5394c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5395c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5396c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 53975efac074SPaolo Bonzini } else { 53985efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 53995efac074SPaolo Bonzini } 54005efac074SPaolo Bonzini } 5401c50d8ae3SPaolo Bonzini 54025efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 54035efac074SPaolo Bonzini { 540405b29633SLai Jiangshan kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE); 5405c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5406c50d8ae3SPaolo Bonzini } 5407c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5408c50d8ae3SPaolo Bonzini 54095efac074SPaolo Bonzini 5410c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5411c50d8ae3SPaolo Bonzini { 5412c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5413c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5414c50d8ae3SPaolo Bonzini uint i; 5415c50d8ae3SPaolo Bonzini 5416c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5417c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5418c50d8ae3SPaolo Bonzini tlb_flush = true; 5419c50d8ae3SPaolo Bonzini } 5420c50d8ae3SPaolo Bonzini 5421c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5422c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5423be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5424c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5425c50d8ae3SPaolo Bonzini tlb_flush = true; 5426c50d8ae3SPaolo Bonzini } 5427c50d8ae3SPaolo Bonzini } 5428c50d8ae3SPaolo Bonzini 5429c50d8ae3SPaolo Bonzini if (tlb_flush) 5430b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5431c50d8ae3SPaolo Bonzini 5432c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5433c50d8ae3SPaolo Bonzini 5434c50d8ae3SPaolo Bonzini /* 5435c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5436c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5437c50d8ae3SPaolo Bonzini * for them. 5438c50d8ae3SPaolo Bonzini */ 5439c50d8ae3SPaolo Bonzini } 5440c50d8ae3SPaolo Bonzini 5441746700d2SWei Huang void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 5442746700d2SWei Huang int tdp_max_root_level, int tdp_huge_page_level) 5443c50d8ae3SPaolo Bonzini { 5444bde77235SSean Christopherson tdp_enabled = enable_tdp; 5445746700d2SWei Huang tdp_root_level = tdp_forced_root_level; 544683013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5447703c335dSSean Christopherson 5448703c335dSSean Christopherson /* 54491d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5450703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5451703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5452703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5453703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5454703c335dSSean Christopherson */ 5455703c335dSSean Christopherson if (tdp_enabled) 54561d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5457703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 54581d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5459703c335dSSean Christopherson else 54601d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5461c50d8ae3SPaolo Bonzini } 5462bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5463c50d8ae3SPaolo Bonzini 5464c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5465269e9552SHamza Mahfooz typedef bool (*slot_level_handler) (struct kvm *kvm, 5466269e9552SHamza Mahfooz struct kvm_rmap_head *rmap_head, 5467269e9552SHamza Mahfooz const struct kvm_memory_slot *slot); 5468c50d8ae3SPaolo Bonzini 5469c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5470c50d8ae3SPaolo Bonzini static __always_inline bool 5471269e9552SHamza Mahfooz slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5472c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 54731a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 54741a61b7dbSSean Christopherson bool flush) 5475c50d8ae3SPaolo Bonzini { 5476c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5477c50d8ae3SPaolo Bonzini 5478c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5479c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5480c50d8ae3SPaolo Bonzini if (iterator.rmap) 54810a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5482c50d8ae3SPaolo Bonzini 5483531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5484302695a5SSean Christopherson if (flush && flush_on_yield) { 5485c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5486c50d8ae3SPaolo Bonzini start_gfn, 5487c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5488c50d8ae3SPaolo Bonzini flush = false; 5489c50d8ae3SPaolo Bonzini } 5490531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5491c50d8ae3SPaolo Bonzini } 5492c50d8ae3SPaolo Bonzini } 5493c50d8ae3SPaolo Bonzini 5494c50d8ae3SPaolo Bonzini return flush; 5495c50d8ae3SPaolo Bonzini } 5496c50d8ae3SPaolo Bonzini 5497c50d8ae3SPaolo Bonzini static __always_inline bool 5498269e9552SHamza Mahfooz slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5499c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5500302695a5SSean Christopherson bool flush_on_yield) 5501c50d8ae3SPaolo Bonzini { 5502c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5503c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5504c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 55051a61b7dbSSean Christopherson flush_on_yield, false); 5506c50d8ae3SPaolo Bonzini } 5507c50d8ae3SPaolo Bonzini 5508c50d8ae3SPaolo Bonzini static __always_inline bool 5509610265eaSDavid Matlack slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5510302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5511c50d8ae3SPaolo Bonzini { 55123bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5513302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5514c50d8ae3SPaolo Bonzini } 5515c50d8ae3SPaolo Bonzini 5516c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5517c50d8ae3SPaolo Bonzini { 55184a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 55194a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5520c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 552103ca4589SSean Christopherson free_page((unsigned long)mmu->pml4_root); 5522cb0f722aSWei Huang free_page((unsigned long)mmu->pml5_root); 5523c50d8ae3SPaolo Bonzini } 5524c50d8ae3SPaolo Bonzini 552504d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5526c50d8ae3SPaolo Bonzini { 5527c50d8ae3SPaolo Bonzini struct page *page; 5528c50d8ae3SPaolo Bonzini int i; 5529c50d8ae3SPaolo Bonzini 553004d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 553104d28e37SSean Christopherson mmu->root_pgd = 0; 553204d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 553304d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 553404d28e37SSean Christopherson 553527f4fca2SLai Jiangshan /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */ 553627f4fca2SLai Jiangshan if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu) 553727f4fca2SLai Jiangshan return 0; 553827f4fca2SLai Jiangshan 5539c50d8ae3SPaolo Bonzini /* 5540c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5541c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5542c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5543c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 554404d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 554504d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 554604d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 554704d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 554884432316SLai Jiangshan * KVM; that horror is handled on-demand by mmu_alloc_special_roots(). 5549c50d8ae3SPaolo Bonzini */ 5550d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5551c50d8ae3SPaolo Bonzini return 0; 5552c50d8ae3SPaolo Bonzini 5553c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5554c50d8ae3SPaolo Bonzini if (!page) 5555c50d8ae3SPaolo Bonzini return -ENOMEM; 5556c50d8ae3SPaolo Bonzini 5557c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 55584a98623dSSean Christopherson 55594a98623dSSean Christopherson /* 55604a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 55614a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 55624a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 55634a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 55644a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 55654a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 55664a98623dSSean Christopherson */ 55674a98623dSSean Christopherson if (!tdp_enabled) 55684a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 55694a98623dSSean Christopherson else 55704a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 55714a98623dSSean Christopherson 5572c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5573c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5574c50d8ae3SPaolo Bonzini 5575c50d8ae3SPaolo Bonzini return 0; 5576c50d8ae3SPaolo Bonzini } 5577c50d8ae3SPaolo Bonzini 5578c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5579c50d8ae3SPaolo Bonzini { 5580c50d8ae3SPaolo Bonzini int ret; 5581c50d8ae3SPaolo Bonzini 55825962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 55835f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 55845f6078f9SSean Christopherson 55855962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 55865f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 55875962bfb7SSean Christopherson 558896880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 558996880883SSean Christopherson 5590c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5591c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5592c50d8ae3SPaolo Bonzini 559304d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5594c50d8ae3SPaolo Bonzini if (ret) 5595c50d8ae3SPaolo Bonzini return ret; 5596c50d8ae3SPaolo Bonzini 559704d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5598c50d8ae3SPaolo Bonzini if (ret) 5599c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5600c50d8ae3SPaolo Bonzini 5601c50d8ae3SPaolo Bonzini return ret; 5602c50d8ae3SPaolo Bonzini fail_allocate_root: 5603c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5604c50d8ae3SPaolo Bonzini return ret; 5605c50d8ae3SPaolo Bonzini } 5606c50d8ae3SPaolo Bonzini 5607c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5608c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5609c50d8ae3SPaolo Bonzini { 5610c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5611c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5612c50d8ae3SPaolo Bonzini 5613c50d8ae3SPaolo Bonzini restart: 5614c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5615c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5616c50d8ae3SPaolo Bonzini /* 5617c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5618c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5619c50d8ae3SPaolo Bonzini */ 5620c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5621c50d8ae3SPaolo Bonzini break; 5622c50d8ae3SPaolo Bonzini 5623c50d8ae3SPaolo Bonzini /* 5624f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5625f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5626f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5627c50d8ae3SPaolo Bonzini */ 5628f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5629c50d8ae3SPaolo Bonzini continue; 5630c50d8ae3SPaolo Bonzini 5631c50d8ae3SPaolo Bonzini /* 5632c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5633c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5634c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5635c50d8ae3SPaolo Bonzini * be in active use by the guest. 5636c50d8ae3SPaolo Bonzini */ 5637c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5638531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5639c50d8ae3SPaolo Bonzini batch = 0; 5640c50d8ae3SPaolo Bonzini goto restart; 5641c50d8ae3SPaolo Bonzini } 5642c50d8ae3SPaolo Bonzini 5643c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5644c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5645c50d8ae3SPaolo Bonzini batch += nr_zapped; 5646c50d8ae3SPaolo Bonzini goto restart; 5647c50d8ae3SPaolo Bonzini } 5648c50d8ae3SPaolo Bonzini } 5649c50d8ae3SPaolo Bonzini 5650c50d8ae3SPaolo Bonzini /* 5651c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5652c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5653c50d8ae3SPaolo Bonzini * may reference the pages. 5654c50d8ae3SPaolo Bonzini */ 5655c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5656c50d8ae3SPaolo Bonzini } 5657c50d8ae3SPaolo Bonzini 5658c50d8ae3SPaolo Bonzini /* 5659c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5660c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5661c50d8ae3SPaolo Bonzini * 5662c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5663c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5664c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5665c50d8ae3SPaolo Bonzini * after calling the function. 5666c50d8ae3SPaolo Bonzini */ 5667c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5668c50d8ae3SPaolo Bonzini { 5669c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5670c50d8ae3SPaolo Bonzini 5671531810caSBen Gardon write_lock(&kvm->mmu_lock); 5672c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5673c50d8ae3SPaolo Bonzini 5674c50d8ae3SPaolo Bonzini /* 5675c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5676c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5677c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5678c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5679c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5680c50d8ae3SPaolo Bonzini */ 5681c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5682c50d8ae3SPaolo Bonzini 5683b7cccd39SBen Gardon /* In order to ensure all threads see this change when 5684b7cccd39SBen Gardon * handling the MMU reload signal, this must happen in the 5685b7cccd39SBen Gardon * same critical section as kvm_reload_remote_mmus, and 5686b7cccd39SBen Gardon * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages 5687b7cccd39SBen Gardon * could drop the MMU lock and yield. 5688b7cccd39SBen Gardon */ 5689b7cccd39SBen Gardon if (is_tdp_mmu_enabled(kvm)) 5690b7cccd39SBen Gardon kvm_tdp_mmu_invalidate_all_roots(kvm); 5691b7cccd39SBen Gardon 5692c50d8ae3SPaolo Bonzini /* 5693c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5694c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5695c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5696c50d8ae3SPaolo Bonzini * 5697c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5698c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5699c50d8ae3SPaolo Bonzini */ 5700c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5701c50d8ae3SPaolo Bonzini 5702c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5703faaf05b0SBen Gardon 5704531810caSBen Gardon write_unlock(&kvm->mmu_lock); 57054c6654bdSBen Gardon 57064c6654bdSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57074c6654bdSBen Gardon read_lock(&kvm->mmu_lock); 57084c6654bdSBen Gardon kvm_tdp_mmu_zap_invalidated_roots(kvm); 57094c6654bdSBen Gardon read_unlock(&kvm->mmu_lock); 57104c6654bdSBen Gardon } 5711c50d8ae3SPaolo Bonzini } 5712c50d8ae3SPaolo Bonzini 5713c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5714c50d8ae3SPaolo Bonzini { 5715c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5716c50d8ae3SPaolo Bonzini } 5717c50d8ae3SPaolo Bonzini 5718c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5719c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5720c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5721c50d8ae3SPaolo Bonzini { 5722c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5723c50d8ae3SPaolo Bonzini } 5724c50d8ae3SPaolo Bonzini 5725c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5726c50d8ae3SPaolo Bonzini { 5727c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5728c50d8ae3SPaolo Bonzini 5729ce25681dSSean Christopherson spin_lock_init(&kvm->arch.mmu_unsync_pages_lock); 5730ce25681dSSean Christopherson 57311e76a3ceSDavid Stevens kvm_mmu_init_tdp_mmu(kvm); 5732fe5db27dSBen Gardon 5733c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5734c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5735c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5736c50d8ae3SPaolo Bonzini } 5737c50d8ae3SPaolo Bonzini 5738c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5739c50d8ae3SPaolo Bonzini { 5740c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5741c50d8ae3SPaolo Bonzini 5742c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5743fe5db27dSBen Gardon 5744fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5745c50d8ae3SPaolo Bonzini } 5746c50d8ae3SPaolo Bonzini 574721fa3246SSean Christopherson static bool __kvm_zap_rmaps(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 574821fa3246SSean Christopherson { 574921fa3246SSean Christopherson const struct kvm_memory_slot *memslot; 575021fa3246SSean Christopherson struct kvm_memslots *slots; 5751f4209439SMaciej S. Szmigiero struct kvm_memslot_iter iter; 575221fa3246SSean Christopherson bool flush = false; 575321fa3246SSean Christopherson gfn_t start, end; 5754f4209439SMaciej S. Szmigiero int i; 575521fa3246SSean Christopherson 575621fa3246SSean Christopherson if (!kvm_memslots_have_rmaps(kvm)) 575721fa3246SSean Christopherson return flush; 575821fa3246SSean Christopherson 575921fa3246SSean Christopherson for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 576021fa3246SSean Christopherson slots = __kvm_memslots(kvm, i); 5761f4209439SMaciej S. Szmigiero 5762f4209439SMaciej S. Szmigiero kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) { 5763f4209439SMaciej S. Szmigiero memslot = iter.slot; 576421fa3246SSean Christopherson start = max(gfn_start, memslot->base_gfn); 576521fa3246SSean Christopherson end = min(gfn_end, memslot->base_gfn + memslot->npages); 5766f4209439SMaciej S. Szmigiero if (WARN_ON_ONCE(start >= end)) 576721fa3246SSean Christopherson continue; 576821fa3246SSean Christopherson 576921fa3246SSean Christopherson flush = slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, 57706ff94f27SDavid Matlack 577121fa3246SSean Christopherson PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 577221fa3246SSean Christopherson start, end - 1, true, flush); 577321fa3246SSean Christopherson } 577421fa3246SSean Christopherson } 577521fa3246SSean Christopherson 577621fa3246SSean Christopherson return flush; 577721fa3246SSean Christopherson } 577821fa3246SSean Christopherson 577988f58535SMaxim Levitsky /* 578088f58535SMaxim Levitsky * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end 578188f58535SMaxim Levitsky * (not including it) 578288f58535SMaxim Levitsky */ 5783c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5784c50d8ae3SPaolo Bonzini { 578521fa3246SSean Christopherson bool flush; 5786c50d8ae3SPaolo Bonzini int i; 5787c50d8ae3SPaolo Bonzini 5788f4209439SMaciej S. Szmigiero if (WARN_ON_ONCE(gfn_end <= gfn_start)) 5789f4209439SMaciej S. Szmigiero return; 5790f4209439SMaciej S. Szmigiero 5791531810caSBen Gardon write_lock(&kvm->mmu_lock); 57925a324c24SSean Christopherson 5793edb298c6SMaxim Levitsky kvm_inc_notifier_count(kvm, gfn_start, gfn_end); 5794edb298c6SMaxim Levitsky 579521fa3246SSean Christopherson flush = __kvm_zap_rmaps(kvm, gfn_start, gfn_end); 57966103bc07SBen Gardon 57976103bc07SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57986103bc07SBen Gardon for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 57996103bc07SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 58005a324c24SSean Christopherson gfn_end, flush); 58016103bc07SBen Gardon } 58025a324c24SSean Christopherson 58035a324c24SSean Christopherson if (flush) 5804bc3b3c10SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 5805bc3b3c10SSean Christopherson gfn_end - gfn_start); 58065a324c24SSean Christopherson 5807edb298c6SMaxim Levitsky kvm_dec_notifier_count(kvm, gfn_start, gfn_end); 5808edb298c6SMaxim Levitsky 58095a324c24SSean Christopherson write_unlock(&kvm->mmu_lock); 5810c50d8ae3SPaolo Bonzini } 5811c50d8ae3SPaolo Bonzini 5812c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 58130a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5814269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5815c50d8ae3SPaolo Bonzini { 5816c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5817c50d8ae3SPaolo Bonzini } 5818c50d8ae3SPaolo Bonzini 5819c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 5820269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot, 58213c9bd400SJay Zhou int start_level) 5822c50d8ae3SPaolo Bonzini { 5823e2209710SBen Gardon bool flush = false; 5824c50d8ae3SPaolo Bonzini 5825e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5826531810caSBen Gardon write_lock(&kvm->mmu_lock); 58273c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5828e2209710SBen Gardon start_level, KVM_MAX_HUGEPAGE_LEVEL, 5829e2209710SBen Gardon false); 5830531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5831e2209710SBen Gardon } 5832c50d8ae3SPaolo Bonzini 583324ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 583424ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 583524ae4cfaSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 583624ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 583724ae4cfaSBen Gardon } 583824ae4cfaSBen Gardon 5839c50d8ae3SPaolo Bonzini /* 58406ff94f27SDavid Matlack * Flush TLBs if any SPTEs had to be write-protected to ensure that 58416ff94f27SDavid Matlack * guest writes are reflected in the dirty bitmap before the memslot 58426ff94f27SDavid Matlack * update completes, i.e. before enabling dirty logging is visible to 58436ff94f27SDavid Matlack * userspace. 58446ff94f27SDavid Matlack * 58456ff94f27SDavid Matlack * Perform the TLB flush outside the mmu_lock to reduce the amount of 58466ff94f27SDavid Matlack * time the lock is held. However, this does mean that another CPU can 58476ff94f27SDavid Matlack * now grab mmu_lock and encounter a write-protected SPTE while CPUs 58486ff94f27SDavid Matlack * still have a writable mapping for the associated GFN in their TLB. 58496ff94f27SDavid Matlack * 58506ff94f27SDavid Matlack * This is safe but requires KVM to be careful when making decisions 58516ff94f27SDavid Matlack * based on the write-protection status of an SPTE. Specifically, KVM 58526ff94f27SDavid Matlack * also write-protects SPTEs to monitor changes to guest page tables 58536ff94f27SDavid Matlack * during shadow paging, and must guarantee no CPUs can write to those 58546ff94f27SDavid Matlack * page before the lock is dropped. As mentioned in the previous 58556ff94f27SDavid Matlack * paragraph, a write-protected SPTE is no guarantee that CPU cannot 58566ff94f27SDavid Matlack * perform writes. So to determine if a TLB flush is truly required, KVM 58576ff94f27SDavid Matlack * will clear a separate software-only bit (MMU-writable) and skip the 58586ff94f27SDavid Matlack * flush if-and-only-if this bit was already clear. 58596ff94f27SDavid Matlack * 58606ff94f27SDavid Matlack * See DEFAULT_SPTE_MMU_WRITEABLE for more details. 5861c50d8ae3SPaolo Bonzini */ 5862c50d8ae3SPaolo Bonzini if (flush) 58637f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5864c50d8ae3SPaolo Bonzini } 5865c50d8ae3SPaolo Bonzini 5866c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 58670a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5868269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5869c50d8ae3SPaolo Bonzini { 5870c50d8ae3SPaolo Bonzini u64 *sptep; 5871c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5872c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5873c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5874c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5875c50d8ae3SPaolo Bonzini 5876c50d8ae3SPaolo Bonzini restart: 5877c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 587857354682SSean Christopherson sp = sptep_to_sp(sptep); 5879c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5880c50d8ae3SPaolo Bonzini 5881c50d8ae3SPaolo Bonzini /* 5882c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5883c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5884c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5885c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5886c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5887c50d8ae3SPaolo Bonzini */ 5888c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 58899eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 58909eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 589171f51d2cSMingwei Zhang pte_list_remove(kvm, rmap_head, sptep); 5892c50d8ae3SPaolo Bonzini 5893c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5894c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5895c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5896c50d8ae3SPaolo Bonzini else 5897c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5898c50d8ae3SPaolo Bonzini 5899c50d8ae3SPaolo Bonzini goto restart; 5900c50d8ae3SPaolo Bonzini } 5901c50d8ae3SPaolo Bonzini } 5902c50d8ae3SPaolo Bonzini 5903c50d8ae3SPaolo Bonzini return need_tlb_flush; 5904c50d8ae3SPaolo Bonzini } 5905c50d8ae3SPaolo Bonzini 5906c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5907269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5908c50d8ae3SPaolo Bonzini { 5909e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5910531810caSBen Gardon write_lock(&kvm->mmu_lock); 5911610265eaSDavid Matlack /* 5912610265eaSDavid Matlack * Zap only 4k SPTEs since the legacy MMU only supports dirty 5913610265eaSDavid Matlack * logging at a 4k granularity and never creates collapsible 5914610265eaSDavid Matlack * 2m SPTEs during dirty logging. 5915610265eaSDavid Matlack */ 59164b85c921SSean Christopherson if (slot_handle_level_4k(kvm, slot, kvm_mmu_zap_collapsible_spte, true)) 5917302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 5918531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5919e2209710SBen Gardon } 59202db6f772SBen Gardon 59212db6f772SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 59222db6f772SBen Gardon read_lock(&kvm->mmu_lock); 59234b85c921SSean Christopherson kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot); 59242db6f772SBen Gardon read_unlock(&kvm->mmu_lock); 59252db6f772SBen Gardon } 5926c50d8ae3SPaolo Bonzini } 5927c50d8ae3SPaolo Bonzini 5928b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 59296c9dd6d2SPaolo Bonzini const struct kvm_memory_slot *memslot) 5930b3594ffbSSean Christopherson { 5931b3594ffbSSean Christopherson /* 59327f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5933302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 59347f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 59357f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 59367f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5937b3594ffbSSean Christopherson */ 5938b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5939cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5940cec37648SSean Christopherson memslot->npages); 5941b3594ffbSSean Christopherson } 5942b3594ffbSSean Christopherson 5943c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5944269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot) 5945c50d8ae3SPaolo Bonzini { 5946e2209710SBen Gardon bool flush = false; 5947c50d8ae3SPaolo Bonzini 5948e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5949531810caSBen Gardon write_lock(&kvm->mmu_lock); 5950610265eaSDavid Matlack /* 5951610265eaSDavid Matlack * Clear dirty bits only on 4k SPTEs since the legacy MMU only 5952610265eaSDavid Matlack * support dirty logging at a 4k granularity. 5953610265eaSDavid Matlack */ 5954610265eaSDavid Matlack flush = slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false); 5955531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5956e2209710SBen Gardon } 5957c50d8ae3SPaolo Bonzini 595824ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 595924ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 596024ae4cfaSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 596124ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 596224ae4cfaSBen Gardon } 596324ae4cfaSBen Gardon 5964c50d8ae3SPaolo Bonzini /* 5965c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5966c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5967c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5968c50d8ae3SPaolo Bonzini * dirty_bitmap. 5969c50d8ae3SPaolo Bonzini */ 5970c50d8ae3SPaolo Bonzini if (flush) 59717f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5972c50d8ae3SPaolo Bonzini } 5973c50d8ae3SPaolo Bonzini 5974c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5975c50d8ae3SPaolo Bonzini { 5976c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5977c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5978c50d8ae3SPaolo Bonzini int ign; 5979c50d8ae3SPaolo Bonzini 5980531810caSBen Gardon write_lock(&kvm->mmu_lock); 5981c50d8ae3SPaolo Bonzini restart: 5982c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5983f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5984c50d8ae3SPaolo Bonzini continue; 5985c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5986c50d8ae3SPaolo Bonzini goto restart; 5987531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5988c50d8ae3SPaolo Bonzini goto restart; 5989c50d8ae3SPaolo Bonzini } 5990c50d8ae3SPaolo Bonzini 5991c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5992faaf05b0SBen Gardon 5993897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5994faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5995faaf05b0SBen Gardon 5996531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5997c50d8ae3SPaolo Bonzini } 5998c50d8ae3SPaolo Bonzini 5999c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 6000c50d8ae3SPaolo Bonzini { 6001c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 6002c50d8ae3SPaolo Bonzini 6003c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 6004c50d8ae3SPaolo Bonzini 6005c50d8ae3SPaolo Bonzini /* 6006c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 6007c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 6008c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 6009c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 6010c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 6011c50d8ae3SPaolo Bonzini */ 6012c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 6013c50d8ae3SPaolo Bonzini 6014c50d8ae3SPaolo Bonzini /* 6015c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 6016c50d8ae3SPaolo Bonzini * zap all shadow pages. 6017c50d8ae3SPaolo Bonzini */ 6018c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 6019c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 6020c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6021c50d8ae3SPaolo Bonzini } 6022c50d8ae3SPaolo Bonzini } 6023c50d8ae3SPaolo Bonzini 6024c50d8ae3SPaolo Bonzini static unsigned long 6025c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 6026c50d8ae3SPaolo Bonzini { 6027c50d8ae3SPaolo Bonzini struct kvm *kvm; 6028c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 6029c50d8ae3SPaolo Bonzini unsigned long freed = 0; 6030c50d8ae3SPaolo Bonzini 6031c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6032c50d8ae3SPaolo Bonzini 6033c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6034c50d8ae3SPaolo Bonzini int idx; 6035c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6036c50d8ae3SPaolo Bonzini 6037c50d8ae3SPaolo Bonzini /* 6038c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 6039c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 6040c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 6041c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 6042c50d8ae3SPaolo Bonzini */ 6043c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 6044c50d8ae3SPaolo Bonzini break; 6045c50d8ae3SPaolo Bonzini /* 6046c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 6047c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 6048c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 6049c50d8ae3SPaolo Bonzini * anyway. 6050c50d8ae3SPaolo Bonzini */ 6051c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 6052c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 6053c50d8ae3SPaolo Bonzini continue; 6054c50d8ae3SPaolo Bonzini 6055c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 6056531810caSBen Gardon write_lock(&kvm->mmu_lock); 6057c50d8ae3SPaolo Bonzini 6058c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 6059c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 6060c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 6061c50d8ae3SPaolo Bonzini goto unlock; 6062c50d8ae3SPaolo Bonzini } 6063c50d8ae3SPaolo Bonzini 6064ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 6065c50d8ae3SPaolo Bonzini 6066c50d8ae3SPaolo Bonzini unlock: 6067531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6068c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 6069c50d8ae3SPaolo Bonzini 6070c50d8ae3SPaolo Bonzini /* 6071c50d8ae3SPaolo Bonzini * unfair on small ones 6072c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 6073c50d8ae3SPaolo Bonzini * sadness comes quickly 6074c50d8ae3SPaolo Bonzini */ 6075c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 6076c50d8ae3SPaolo Bonzini break; 6077c50d8ae3SPaolo Bonzini } 6078c50d8ae3SPaolo Bonzini 6079c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6080c50d8ae3SPaolo Bonzini return freed; 6081c50d8ae3SPaolo Bonzini } 6082c50d8ae3SPaolo Bonzini 6083c50d8ae3SPaolo Bonzini static unsigned long 6084c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 6085c50d8ae3SPaolo Bonzini { 6086c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 6087c50d8ae3SPaolo Bonzini } 6088c50d8ae3SPaolo Bonzini 6089c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 6090c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 6091c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 6092c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 6093c50d8ae3SPaolo Bonzini }; 6094c50d8ae3SPaolo Bonzini 6095c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 6096c50d8ae3SPaolo Bonzini { 6097c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 6098c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 6099c50d8ae3SPaolo Bonzini } 6100c50d8ae3SPaolo Bonzini 6101c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 6102c50d8ae3SPaolo Bonzini { 6103c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 6104c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 6105c50d8ae3SPaolo Bonzini } 6106c50d8ae3SPaolo Bonzini 6107c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 6108c50d8ae3SPaolo Bonzini { 6109c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 6110c50d8ae3SPaolo Bonzini } 6111c50d8ae3SPaolo Bonzini 6112c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 6113c50d8ae3SPaolo Bonzini { 6114c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 6115c50d8ae3SPaolo Bonzini bool new_val; 6116c50d8ae3SPaolo Bonzini 6117c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 6118c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 6119c50d8ae3SPaolo Bonzini new_val = 0; 6120c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 6121c50d8ae3SPaolo Bonzini new_val = 1; 6122c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 6123c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 6124c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 6125c50d8ae3SPaolo Bonzini return -EINVAL; 6126c50d8ae3SPaolo Bonzini 6127c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 6128c50d8ae3SPaolo Bonzini 6129c50d8ae3SPaolo Bonzini if (new_val != old_val) { 6130c50d8ae3SPaolo Bonzini struct kvm *kvm; 6131c50d8ae3SPaolo Bonzini 6132c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6133c50d8ae3SPaolo Bonzini 6134c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6135c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 6136c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6137c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 6138c50d8ae3SPaolo Bonzini 6139c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6140c50d8ae3SPaolo Bonzini } 6141c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6142c50d8ae3SPaolo Bonzini } 6143c50d8ae3SPaolo Bonzini 6144c50d8ae3SPaolo Bonzini return 0; 6145c50d8ae3SPaolo Bonzini } 6146c50d8ae3SPaolo Bonzini 6147c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 6148c50d8ae3SPaolo Bonzini { 6149c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 6150c50d8ae3SPaolo Bonzini 6151c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 6152c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 6153c50d8ae3SPaolo Bonzini 6154c50d8ae3SPaolo Bonzini /* 6155c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 6156c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 6157c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 6158c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 6159c50d8ae3SPaolo Bonzini */ 6160c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 6161c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 6162c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 6163c50d8ae3SPaolo Bonzini 6164c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 6165c50d8ae3SPaolo Bonzini 6166c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 6167c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 6168c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6169c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 6170c50d8ae3SPaolo Bonzini goto out; 6171c50d8ae3SPaolo Bonzini 6172c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 6173c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 6174c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6175c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 6176c50d8ae3SPaolo Bonzini goto out; 6177c50d8ae3SPaolo Bonzini 6178c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 6179c50d8ae3SPaolo Bonzini goto out; 6180c50d8ae3SPaolo Bonzini 6181c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6182c50d8ae3SPaolo Bonzini if (ret) 6183c50d8ae3SPaolo Bonzini goto out; 6184c50d8ae3SPaolo Bonzini 6185c50d8ae3SPaolo Bonzini return 0; 6186c50d8ae3SPaolo Bonzini 6187c50d8ae3SPaolo Bonzini out: 6188c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6189c50d8ae3SPaolo Bonzini return ret; 6190c50d8ae3SPaolo Bonzini } 6191c50d8ae3SPaolo Bonzini 6192c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6193c50d8ae3SPaolo Bonzini { 6194c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6195c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6196c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6197c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6198c50d8ae3SPaolo Bonzini } 6199c50d8ae3SPaolo Bonzini 6200c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6201c50d8ae3SPaolo Bonzini { 6202c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6203c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6204c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6205c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6206c50d8ae3SPaolo Bonzini } 6207c50d8ae3SPaolo Bonzini 6208f47491d7SSean Christopherson /* 6209f47491d7SSean Christopherson * Calculate the effective recovery period, accounting for '0' meaning "let KVM 6210f47491d7SSean Christopherson * select a halving time of 1 hour". Returns true if recovery is enabled. 6211f47491d7SSean Christopherson */ 6212f47491d7SSean Christopherson static bool calc_nx_huge_pages_recovery_period(uint *period) 6213f47491d7SSean Christopherson { 6214f47491d7SSean Christopherson /* 6215f47491d7SSean Christopherson * Use READ_ONCE to get the params, this may be called outside of the 6216f47491d7SSean Christopherson * param setters, e.g. by the kthread to compute its next timeout. 6217f47491d7SSean Christopherson */ 6218f47491d7SSean Christopherson bool enabled = READ_ONCE(nx_huge_pages); 6219f47491d7SSean Christopherson uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6220f47491d7SSean Christopherson 6221f47491d7SSean Christopherson if (!enabled || !ratio) 6222f47491d7SSean Christopherson return false; 6223f47491d7SSean Christopherson 6224f47491d7SSean Christopherson *period = READ_ONCE(nx_huge_pages_recovery_period_ms); 6225f47491d7SSean Christopherson if (!*period) { 6226f47491d7SSean Christopherson /* Make sure the period is not less than one second. */ 6227f47491d7SSean Christopherson ratio = min(ratio, 3600u); 6228f47491d7SSean Christopherson *period = 60 * 60 * 1000 / ratio; 6229f47491d7SSean Christopherson } 6230f47491d7SSean Christopherson return true; 6231f47491d7SSean Christopherson } 6232f47491d7SSean Christopherson 62334dfe4f40SJunaid Shahid static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp) 6234c50d8ae3SPaolo Bonzini { 62354dfe4f40SJunaid Shahid bool was_recovery_enabled, is_recovery_enabled; 62364dfe4f40SJunaid Shahid uint old_period, new_period; 6237c50d8ae3SPaolo Bonzini int err; 6238c50d8ae3SPaolo Bonzini 6239f47491d7SSean Christopherson was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period); 62404dfe4f40SJunaid Shahid 6241c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6242c50d8ae3SPaolo Bonzini if (err) 6243c50d8ae3SPaolo Bonzini return err; 6244c50d8ae3SPaolo Bonzini 6245f47491d7SSean Christopherson is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period); 62464dfe4f40SJunaid Shahid 6247f47491d7SSean Christopherson if (is_recovery_enabled && 62484dfe4f40SJunaid Shahid (!was_recovery_enabled || old_period > new_period)) { 6249c50d8ae3SPaolo Bonzini struct kvm *kvm; 6250c50d8ae3SPaolo Bonzini 6251c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6252c50d8ae3SPaolo Bonzini 6253c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6254c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6255c50d8ae3SPaolo Bonzini 6256c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6257c50d8ae3SPaolo Bonzini } 6258c50d8ae3SPaolo Bonzini 6259c50d8ae3SPaolo Bonzini return err; 6260c50d8ae3SPaolo Bonzini } 6261c50d8ae3SPaolo Bonzini 6262c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6263c50d8ae3SPaolo Bonzini { 6264ade74e14SSean Christopherson unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; 6265c50d8ae3SPaolo Bonzini int rcu_idx; 6266c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6267c50d8ae3SPaolo Bonzini unsigned int ratio; 6268c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6269048f4980SSean Christopherson bool flush = false; 6270c50d8ae3SPaolo Bonzini ulong to_zap; 6271c50d8ae3SPaolo Bonzini 6272c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6273531810caSBen Gardon write_lock(&kvm->mmu_lock); 6274c50d8ae3SPaolo Bonzini 6275c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6276ade74e14SSean Christopherson to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0; 62777d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 62787d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 62797d919c7aSSean Christopherson break; 62807d919c7aSSean Christopherson 6281c50d8ae3SPaolo Bonzini /* 6282c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6283c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6284c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6285c50d8ae3SPaolo Bonzini */ 6286c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6287c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6288c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6289c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6290897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 6291315f02c6SPaolo Bonzini flush |= kvm_tdp_mmu_zap_sp(kvm, sp); 62928d1a182eSBen Gardon } else { 6293c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6294c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 629529cf0f50SBen Gardon } 6296c50d8ae3SPaolo Bonzini 6297531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 6298048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6299531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 6300048f4980SSean Christopherson flush = false; 6301c50d8ae3SPaolo Bonzini } 6302c50d8ae3SPaolo Bonzini } 6303048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6304c50d8ae3SPaolo Bonzini 6305531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6306c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6307c50d8ae3SPaolo Bonzini } 6308c50d8ae3SPaolo Bonzini 6309c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6310c50d8ae3SPaolo Bonzini { 6311f47491d7SSean Christopherson bool enabled; 6312f47491d7SSean Christopherson uint period; 63134dfe4f40SJunaid Shahid 6314f47491d7SSean Christopherson enabled = calc_nx_huge_pages_recovery_period(&period); 63154dfe4f40SJunaid Shahid 6316f47491d7SSean Christopherson return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64() 6317c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6318c50d8ae3SPaolo Bonzini } 6319c50d8ae3SPaolo Bonzini 6320c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6321c50d8ae3SPaolo Bonzini { 6322c50d8ae3SPaolo Bonzini u64 start_time; 6323c50d8ae3SPaolo Bonzini long remaining_time; 6324c50d8ae3SPaolo Bonzini 6325c50d8ae3SPaolo Bonzini while (true) { 6326c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6327c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6328c50d8ae3SPaolo Bonzini 6329c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6330c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6331c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6332c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6333c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6334c50d8ae3SPaolo Bonzini } 6335c50d8ae3SPaolo Bonzini 6336c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6337c50d8ae3SPaolo Bonzini 6338c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6339c50d8ae3SPaolo Bonzini return 0; 6340c50d8ae3SPaolo Bonzini 6341c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6342c50d8ae3SPaolo Bonzini } 6343c50d8ae3SPaolo Bonzini } 6344c50d8ae3SPaolo Bonzini 6345c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6346c50d8ae3SPaolo Bonzini { 6347c50d8ae3SPaolo Bonzini int err; 6348c50d8ae3SPaolo Bonzini 6349c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6350c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6351c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6352c50d8ae3SPaolo Bonzini if (!err) 6353c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6354c50d8ae3SPaolo Bonzini 6355c50d8ae3SPaolo Bonzini return err; 6356c50d8ae3SPaolo Bonzini } 6357c50d8ae3SPaolo Bonzini 6358c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6359c50d8ae3SPaolo Bonzini { 6360c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6361c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6362c50d8ae3SPaolo Bonzini } 6363