1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56fc9bf2e0SSean Christopherson #include "paging.h" 57fc9bf2e0SSean Christopherson 58c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 59c50d8ae3SPaolo Bonzini 60a9d6496dSShaokun Zhang int __read_mostly nx_huge_pages = -1; 614dfe4f40SJunaid Shahid static uint __read_mostly nx_huge_pages_recovery_period_ms; 62c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 63c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 64c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 65c50d8ae3SPaolo Bonzini #else 66c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 67c50d8ae3SPaolo Bonzini #endif 68c50d8ae3SPaolo Bonzini 69c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 704dfe4f40SJunaid Shahid static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp); 71c50d8ae3SPaolo Bonzini 72d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 73c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 74c50d8ae3SPaolo Bonzini .get = param_get_bool, 75c50d8ae3SPaolo Bonzini }; 76c50d8ae3SPaolo Bonzini 774dfe4f40SJunaid Shahid static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = { 784dfe4f40SJunaid Shahid .set = set_nx_huge_pages_recovery_param, 79c50d8ae3SPaolo Bonzini .get = param_get_uint, 80c50d8ae3SPaolo Bonzini }; 81c50d8ae3SPaolo Bonzini 82c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 83c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 844dfe4f40SJunaid Shahid module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops, 85c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 86c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 874dfe4f40SJunaid Shahid module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops, 884dfe4f40SJunaid Shahid &nx_huge_pages_recovery_period_ms, 0644); 894dfe4f40SJunaid Shahid __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint"); 90c50d8ae3SPaolo Bonzini 9171fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 9271fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 9371fe7013SSean Christopherson 94c50d8ae3SPaolo Bonzini /* 95c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 96c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 97c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 98c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 99c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 100c50d8ae3SPaolo Bonzini */ 101c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 102c50d8ae3SPaolo Bonzini 1031d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 104746700d2SWei Huang static int tdp_root_level __read_mostly; 10583013059SSean Christopherson static int max_tdp_level __read_mostly; 106703c335dSSean Christopherson 107c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1085a9624afSPaolo Bonzini bool dbg = 0; 109c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 110c50d8ae3SPaolo Bonzini #endif 111c50d8ae3SPaolo Bonzini 112c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 113c50d8ae3SPaolo Bonzini 114c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 115c50d8ae3SPaolo Bonzini 116c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 117c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 118c50d8ae3SPaolo Bonzini 119c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 120c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 121c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 122c50d8ae3SPaolo Bonzini 123c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 124c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 125c50d8ae3SPaolo Bonzini 126c50d8ae3SPaolo Bonzini 127c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 128c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 129c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 130c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 131c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 132c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 133c50d8ae3SPaolo Bonzini 134c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 135c50d8ae3SPaolo Bonzini 136dc1cff96SPeter Xu /* make pte_list_desc fit well in cache lines */ 13713236e25SPeter Xu #define PTE_LIST_EXT 14 138c50d8ae3SPaolo Bonzini 13913236e25SPeter Xu /* 14013236e25SPeter Xu * Slight optimization of cacheline layout, by putting `more' and `spte_count' 14113236e25SPeter Xu * at the start; then accessing it will only use one single cacheline for 14213236e25SPeter Xu * either full (entries==PTE_LIST_EXT) case or entries<=6. 14313236e25SPeter Xu */ 144c50d8ae3SPaolo Bonzini struct pte_list_desc { 145c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 14613236e25SPeter Xu /* 14713236e25SPeter Xu * Stores number of entries stored in the pte_list_desc. No need to be 14813236e25SPeter Xu * u64 but just for easier alignment. When PTE_LIST_EXT, means full. 14913236e25SPeter Xu */ 15013236e25SPeter Xu u64 spte_count; 15113236e25SPeter Xu u64 *sptes[PTE_LIST_EXT]; 152c50d8ae3SPaolo Bonzini }; 153c50d8ae3SPaolo Bonzini 154c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 155c50d8ae3SPaolo Bonzini u64 addr; 156c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 157c50d8ae3SPaolo Bonzini u64 *sptep; 158c50d8ae3SPaolo Bonzini int level; 159c50d8ae3SPaolo Bonzini unsigned index; 160c50d8ae3SPaolo Bonzini }; 161c50d8ae3SPaolo Bonzini 162c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 163c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 164c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 165c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 166c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 167c50d8ae3SPaolo Bonzini 168c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 169c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 170c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 171c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 172c50d8ae3SPaolo Bonzini 173c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 174c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 175c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 176c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 177c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 178c50d8ae3SPaolo Bonzini 179c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 18002c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 181c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 182c50d8ae3SPaolo Bonzini 183c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 184c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 185c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 186c50d8ae3SPaolo Bonzini 187594e91a1SSean Christopherson struct kvm_mmu_role_regs { 188594e91a1SSean Christopherson const unsigned long cr0; 189594e91a1SSean Christopherson const unsigned long cr4; 190594e91a1SSean Christopherson const u64 efer; 191594e91a1SSean Christopherson }; 192594e91a1SSean Christopherson 193c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 194c50d8ae3SPaolo Bonzini #include "mmutrace.h" 195c50d8ae3SPaolo Bonzini 196594e91a1SSean Christopherson /* 197594e91a1SSean Christopherson * Yes, lot's of underscores. They're a hint that you probably shouldn't be 198594e91a1SSean Christopherson * reading from the role_regs. Once the mmu_role is constructed, it becomes 199594e91a1SSean Christopherson * the single source of truth for the MMU's state. 200594e91a1SSean Christopherson */ 201594e91a1SSean Christopherson #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \ 2024ac21457SPaolo Bonzini static inline bool __maybe_unused ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\ 203594e91a1SSean Christopherson { \ 204594e91a1SSean Christopherson return !!(regs->reg & flag); \ 205594e91a1SSean Christopherson } 206594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG); 207594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP); 208594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE); 209594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE); 210594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP); 211594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP); 212594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE); 213594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57); 214594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX); 215594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA); 216594e91a1SSean Christopherson 21760667724SSean Christopherson /* 21860667724SSean Christopherson * The MMU itself (with a valid role) is the single source of truth for the 21960667724SSean Christopherson * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The 22060667724SSean Christopherson * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1, 22160667724SSean Christopherson * and the vCPU may be incorrect/irrelevant. 22260667724SSean Christopherson */ 22360667724SSean Christopherson #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \ 2244ac21457SPaolo Bonzini static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \ 22560667724SSean Christopherson { \ 22660667724SSean Christopherson return !!(mmu->mmu_role. base_or_ext . reg##_##name); \ 22760667724SSean Christopherson } 22860667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg); 22960667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp); 23060667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse); 23160667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae); 23260667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep); 23360667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap); 23460667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke); 23560667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57); 23660667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, efer, nx); 23760667724SSean Christopherson 238594e91a1SSean Christopherson static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) 239594e91a1SSean Christopherson { 240594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 241594e91a1SSean Christopherson .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS), 242594e91a1SSean Christopherson .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS), 243594e91a1SSean Christopherson .efer = vcpu->arch.efer, 244594e91a1SSean Christopherson }; 245594e91a1SSean Christopherson 246594e91a1SSean Christopherson return regs; 247594e91a1SSean Christopherson } 248c50d8ae3SPaolo Bonzini 249f4bd6f73SSean Christopherson static int role_regs_to_root_level(struct kvm_mmu_role_regs *regs) 250f4bd6f73SSean Christopherson { 251f4bd6f73SSean Christopherson if (!____is_cr0_pg(regs)) 252f4bd6f73SSean Christopherson return 0; 253f4bd6f73SSean Christopherson else if (____is_efer_lma(regs)) 254f4bd6f73SSean Christopherson return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : 255f4bd6f73SSean Christopherson PT64_ROOT_4LEVEL; 256f4bd6f73SSean Christopherson else if (____is_cr4_pae(regs)) 257f4bd6f73SSean Christopherson return PT32E_ROOT_LEVEL; 258f4bd6f73SSean Christopherson else 259f4bd6f73SSean Christopherson return PT32_ROOT_LEVEL; 260f4bd6f73SSean Christopherson } 261c50d8ae3SPaolo Bonzini 262c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 263c50d8ae3SPaolo Bonzini { 264afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 265c50d8ae3SPaolo Bonzini } 266c50d8ae3SPaolo Bonzini 267c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 268c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 269c50d8ae3SPaolo Bonzini { 270c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 271c50d8ae3SPaolo Bonzini 272afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 273b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 274c50d8ae3SPaolo Bonzini 275c50d8ae3SPaolo Bonzini if (ret) 276c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 277c50d8ae3SPaolo Bonzini } 278c50d8ae3SPaolo Bonzini 2792f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 280c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 281c50d8ae3SPaolo Bonzini { 282c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 283c50d8ae3SPaolo Bonzini 284c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 285c50d8ae3SPaolo Bonzini range.pages = pages; 286c50d8ae3SPaolo Bonzini 287c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 288c50d8ae3SPaolo Bonzini } 289c50d8ae3SPaolo Bonzini 2908f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2918f79b064SBen Gardon unsigned int access) 2928f79b064SBen Gardon { 293c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 2948f79b064SBen Gardon 295c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 296c236d962SSean Christopherson mmu_spte_set(sptep, spte); 297c50d8ae3SPaolo Bonzini } 298c50d8ae3SPaolo Bonzini 299c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 300c50d8ae3SPaolo Bonzini { 301c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 302c50d8ae3SPaolo Bonzini 3038a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 304c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 305c50d8ae3SPaolo Bonzini 306c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 307c50d8ae3SPaolo Bonzini } 308c50d8ae3SPaolo Bonzini 309c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 310c50d8ae3SPaolo Bonzini { 311c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 312c50d8ae3SPaolo Bonzini } 313c50d8ae3SPaolo Bonzini 314c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 315c50d8ae3SPaolo Bonzini { 316c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 317c50d8ae3SPaolo Bonzini 318c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 319c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 320c50d8ae3SPaolo Bonzini return false; 321c50d8ae3SPaolo Bonzini 322c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 323c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 324c50d8ae3SPaolo Bonzini 325c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 326c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 327c50d8ae3SPaolo Bonzini } 328c50d8ae3SPaolo Bonzini 329c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 330c50d8ae3SPaolo Bonzini { 331c50d8ae3SPaolo Bonzini return 1; 332c50d8ae3SPaolo Bonzini } 333c50d8ae3SPaolo Bonzini 334c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 335c50d8ae3SPaolo Bonzini { 336c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 337c50d8ae3SPaolo Bonzini 338c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 339c50d8ae3SPaolo Bonzini } 340c50d8ae3SPaolo Bonzini 341c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 342c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 343c50d8ae3SPaolo Bonzini { 344c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 345c50d8ae3SPaolo Bonzini } 346c50d8ae3SPaolo Bonzini 347c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 348c50d8ae3SPaolo Bonzini { 349c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 350c50d8ae3SPaolo Bonzini } 351c50d8ae3SPaolo Bonzini 352c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 353c50d8ae3SPaolo Bonzini { 354c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 355c50d8ae3SPaolo Bonzini } 356c50d8ae3SPaolo Bonzini 357c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 358c50d8ae3SPaolo Bonzini { 359c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 360c50d8ae3SPaolo Bonzini } 361c50d8ae3SPaolo Bonzini #else 362c50d8ae3SPaolo Bonzini union split_spte { 363c50d8ae3SPaolo Bonzini struct { 364c50d8ae3SPaolo Bonzini u32 spte_low; 365c50d8ae3SPaolo Bonzini u32 spte_high; 366c50d8ae3SPaolo Bonzini }; 367c50d8ae3SPaolo Bonzini u64 spte; 368c50d8ae3SPaolo Bonzini }; 369c50d8ae3SPaolo Bonzini 370c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 371c50d8ae3SPaolo Bonzini { 37257354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 373c50d8ae3SPaolo Bonzini 374c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 375c50d8ae3SPaolo Bonzini return; 376c50d8ae3SPaolo Bonzini 377c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 378c50d8ae3SPaolo Bonzini smp_wmb(); 379c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 380c50d8ae3SPaolo Bonzini } 381c50d8ae3SPaolo Bonzini 382c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 383c50d8ae3SPaolo Bonzini { 384c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 385c50d8ae3SPaolo Bonzini 386c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 387c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 388c50d8ae3SPaolo Bonzini 389c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 390c50d8ae3SPaolo Bonzini 391c50d8ae3SPaolo Bonzini /* 392c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 393c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 394c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 395c50d8ae3SPaolo Bonzini */ 396c50d8ae3SPaolo Bonzini smp_wmb(); 397c50d8ae3SPaolo Bonzini 398c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 399c50d8ae3SPaolo Bonzini } 400c50d8ae3SPaolo Bonzini 401c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 402c50d8ae3SPaolo Bonzini { 403c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 404c50d8ae3SPaolo Bonzini 405c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 406c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 407c50d8ae3SPaolo Bonzini 408c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 409c50d8ae3SPaolo Bonzini 410c50d8ae3SPaolo Bonzini /* 411c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 412c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 413c50d8ae3SPaolo Bonzini */ 414c50d8ae3SPaolo Bonzini smp_wmb(); 415c50d8ae3SPaolo Bonzini 416c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 417c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 418c50d8ae3SPaolo Bonzini } 419c50d8ae3SPaolo Bonzini 420c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 421c50d8ae3SPaolo Bonzini { 422c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 423c50d8ae3SPaolo Bonzini 424c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 425c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 426c50d8ae3SPaolo Bonzini 427c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 428c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 429c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 430c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 431c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 432c50d8ae3SPaolo Bonzini 433c50d8ae3SPaolo Bonzini return orig.spte; 434c50d8ae3SPaolo Bonzini } 435c50d8ae3SPaolo Bonzini 436c50d8ae3SPaolo Bonzini /* 437c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 438c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 439c50d8ae3SPaolo Bonzini * 440c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 441c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 442c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 443c50d8ae3SPaolo Bonzini * 444c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 445c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 446c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 447c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 448c50d8ae3SPaolo Bonzini * 449c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 450c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 451c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 452c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 453c50d8ae3SPaolo Bonzini */ 454c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 455c50d8ae3SPaolo Bonzini { 45657354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 457c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 458c50d8ae3SPaolo Bonzini int count; 459c50d8ae3SPaolo Bonzini 460c50d8ae3SPaolo Bonzini retry: 461c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 462c50d8ae3SPaolo Bonzini smp_rmb(); 463c50d8ae3SPaolo Bonzini 464c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 465c50d8ae3SPaolo Bonzini smp_rmb(); 466c50d8ae3SPaolo Bonzini 467c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 468c50d8ae3SPaolo Bonzini smp_rmb(); 469c50d8ae3SPaolo Bonzini 470c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 471c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 472c50d8ae3SPaolo Bonzini goto retry; 473c50d8ae3SPaolo Bonzini 474c50d8ae3SPaolo Bonzini return spte.spte; 475c50d8ae3SPaolo Bonzini } 476c50d8ae3SPaolo Bonzini #endif 477c50d8ae3SPaolo Bonzini 478c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 479c50d8ae3SPaolo Bonzini { 480c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 481c50d8ae3SPaolo Bonzini return false; 482c50d8ae3SPaolo Bonzini 483c50d8ae3SPaolo Bonzini /* 484c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 485c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 486c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 487c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 488c50d8ae3SPaolo Bonzini */ 489c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 490c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 491c50d8ae3SPaolo Bonzini return true; 492c50d8ae3SPaolo Bonzini 493c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 494c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 495c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 496c50d8ae3SPaolo Bonzini return true; 497c50d8ae3SPaolo Bonzini } 498c50d8ae3SPaolo Bonzini 499c50d8ae3SPaolo Bonzini return false; 500c50d8ae3SPaolo Bonzini } 501c50d8ae3SPaolo Bonzini 502c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 503c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 504c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 505c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 506c50d8ae3SPaolo Bonzini * the spte. 507c50d8ae3SPaolo Bonzini */ 508c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 509c50d8ae3SPaolo Bonzini { 510c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 511c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 512c50d8ae3SPaolo Bonzini } 513c50d8ae3SPaolo Bonzini 514c50d8ae3SPaolo Bonzini /* 515c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 516c50d8ae3SPaolo Bonzini * accessed/dirty status. 517c50d8ae3SPaolo Bonzini */ 518c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 519c50d8ae3SPaolo Bonzini { 520c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 521c50d8ae3SPaolo Bonzini 522c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 523115111efSDavid Matlack check_spte_writable_invariants(new_spte); 524c50d8ae3SPaolo Bonzini 525c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 526c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 527c50d8ae3SPaolo Bonzini return old_spte; 528c50d8ae3SPaolo Bonzini } 529c50d8ae3SPaolo Bonzini 530c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 531c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 532c50d8ae3SPaolo Bonzini else 533c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 534c50d8ae3SPaolo Bonzini 535c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 536c50d8ae3SPaolo Bonzini 537c50d8ae3SPaolo Bonzini return old_spte; 538c50d8ae3SPaolo Bonzini } 539c50d8ae3SPaolo Bonzini 540c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 541c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 542c50d8ae3SPaolo Bonzini * 54302844ac1SDavid Matlack * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote 54402844ac1SDavid Matlack * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only 54502844ac1SDavid Matlack * spte, even though the writable spte might be cached on a CPU's TLB. 546c50d8ae3SPaolo Bonzini * 547c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 548c50d8ae3SPaolo Bonzini */ 549c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 550c50d8ae3SPaolo Bonzini { 551c50d8ae3SPaolo Bonzini bool flush = false; 552c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 553c50d8ae3SPaolo Bonzini 554c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 555c50d8ae3SPaolo Bonzini return false; 556c50d8ae3SPaolo Bonzini 557c50d8ae3SPaolo Bonzini /* 558c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 559c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 560c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 561c50d8ae3SPaolo Bonzini */ 562c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 563c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 564c50d8ae3SPaolo Bonzini flush = true; 565c50d8ae3SPaolo Bonzini 566c50d8ae3SPaolo Bonzini /* 567c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 568c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 569c50d8ae3SPaolo Bonzini */ 570c50d8ae3SPaolo Bonzini 571c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 572c50d8ae3SPaolo Bonzini flush = true; 573c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 574c50d8ae3SPaolo Bonzini } 575c50d8ae3SPaolo Bonzini 576c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 577c50d8ae3SPaolo Bonzini flush = true; 578c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 579c50d8ae3SPaolo Bonzini } 580c50d8ae3SPaolo Bonzini 581c50d8ae3SPaolo Bonzini return flush; 582c50d8ae3SPaolo Bonzini } 583c50d8ae3SPaolo Bonzini 584c50d8ae3SPaolo Bonzini /* 585c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 586c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 587c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 5887fa2a347SSean Christopherson * Returns the old PTE. 589c50d8ae3SPaolo Bonzini */ 59071f51d2cSMingwei Zhang static int mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep) 591c50d8ae3SPaolo Bonzini { 592c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 593c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 59471f51d2cSMingwei Zhang int level = sptep_to_sp(sptep)->role.level; 595c50d8ae3SPaolo Bonzini 596c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 597c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 598c50d8ae3SPaolo Bonzini else 599c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 600c50d8ae3SPaolo Bonzini 601c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 6027fa2a347SSean Christopherson return old_spte; 603c50d8ae3SPaolo Bonzini 60471f51d2cSMingwei Zhang kvm_update_page_stats(kvm, level, -1); 60571f51d2cSMingwei Zhang 606c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 607c50d8ae3SPaolo Bonzini 608c50d8ae3SPaolo Bonzini /* 609c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 610c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 611c50d8ae3SPaolo Bonzini * unmap it from mmu first. 612c50d8ae3SPaolo Bonzini */ 613c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 614c50d8ae3SPaolo Bonzini 615c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 616c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 617c50d8ae3SPaolo Bonzini 618c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 619c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 620c50d8ae3SPaolo Bonzini 6217fa2a347SSean Christopherson return old_spte; 622c50d8ae3SPaolo Bonzini } 623c50d8ae3SPaolo Bonzini 624c50d8ae3SPaolo Bonzini /* 625c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 626c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 627c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 628c50d8ae3SPaolo Bonzini */ 629c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 630c50d8ae3SPaolo Bonzini { 631c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 632c50d8ae3SPaolo Bonzini } 633c50d8ae3SPaolo Bonzini 634c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 635c50d8ae3SPaolo Bonzini { 636c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 637c50d8ae3SPaolo Bonzini } 638c50d8ae3SPaolo Bonzini 639c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 640c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 641c50d8ae3SPaolo Bonzini { 642c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 643c50d8ae3SPaolo Bonzini 644c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 645c50d8ae3SPaolo Bonzini return false; 646c50d8ae3SPaolo Bonzini 647c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 648c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 649c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 650c50d8ae3SPaolo Bonzini } else { 651c50d8ae3SPaolo Bonzini /* 652c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 653c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 654c50d8ae3SPaolo Bonzini */ 655c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 656c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 657c50d8ae3SPaolo Bonzini 658c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 659c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 660c50d8ae3SPaolo Bonzini } 661c50d8ae3SPaolo Bonzini 662c50d8ae3SPaolo Bonzini return true; 663c50d8ae3SPaolo Bonzini } 664c50d8ae3SPaolo Bonzini 665c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 666c50d8ae3SPaolo Bonzini { 667c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 668c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_begin(); 669c5c8c7c5SDavid Matlack } else { 670c50d8ae3SPaolo Bonzini /* 671c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 672c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 673c50d8ae3SPaolo Bonzini */ 674c50d8ae3SPaolo Bonzini local_irq_disable(); 675c50d8ae3SPaolo Bonzini 676c50d8ae3SPaolo Bonzini /* 677c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 678c50d8ae3SPaolo Bonzini * to vcpu->mode. 679c50d8ae3SPaolo Bonzini */ 680c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 681c50d8ae3SPaolo Bonzini } 682c5c8c7c5SDavid Matlack } 683c50d8ae3SPaolo Bonzini 684c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 685c50d8ae3SPaolo Bonzini { 686c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 687c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_end(); 688c5c8c7c5SDavid Matlack } else { 689c50d8ae3SPaolo Bonzini /* 690c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 691c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 692c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 693c50d8ae3SPaolo Bonzini */ 694c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 695c50d8ae3SPaolo Bonzini local_irq_enable(); 696c50d8ae3SPaolo Bonzini } 697c5c8c7c5SDavid Matlack } 698c50d8ae3SPaolo Bonzini 699378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 700c50d8ae3SPaolo Bonzini { 701c50d8ae3SPaolo Bonzini int r; 702c50d8ae3SPaolo Bonzini 703531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 70494ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 705531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 706c50d8ae3SPaolo Bonzini if (r) 707c50d8ae3SPaolo Bonzini return r; 70894ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 709171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 710171a90d7SSean Christopherson if (r) 711171a90d7SSean Christopherson return r; 712378f5cd6SSean Christopherson if (maybe_indirect) { 71394ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 714171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 715c50d8ae3SPaolo Bonzini if (r) 716c50d8ae3SPaolo Bonzini return r; 717378f5cd6SSean Christopherson } 71894ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 719531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 720c50d8ae3SPaolo Bonzini } 721c50d8ae3SPaolo Bonzini 722c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 723c50d8ae3SPaolo Bonzini { 72494ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 72594ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 72694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 72794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 728c50d8ae3SPaolo Bonzini } 729c50d8ae3SPaolo Bonzini 730c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 731c50d8ae3SPaolo Bonzini { 73294ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 733c50d8ae3SPaolo Bonzini } 734c50d8ae3SPaolo Bonzini 735c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 736c50d8ae3SPaolo Bonzini { 737c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 738c50d8ae3SPaolo Bonzini } 739c50d8ae3SPaolo Bonzini 740c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 741c50d8ae3SPaolo Bonzini { 742c50d8ae3SPaolo Bonzini if (!sp->role.direct) 743c50d8ae3SPaolo Bonzini return sp->gfns[index]; 744c50d8ae3SPaolo Bonzini 745c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 746c50d8ae3SPaolo Bonzini } 747c50d8ae3SPaolo Bonzini 748c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 749c50d8ae3SPaolo Bonzini { 750c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 751c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 752c50d8ae3SPaolo Bonzini return; 753c50d8ae3SPaolo Bonzini } 754c50d8ae3SPaolo Bonzini 755c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 756c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 757c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 758c50d8ae3SPaolo Bonzini sp->gfn, 759c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 760c50d8ae3SPaolo Bonzini } 761c50d8ae3SPaolo Bonzini 762c50d8ae3SPaolo Bonzini /* 763c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 764c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 765c50d8ae3SPaolo Bonzini */ 766c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 7678ca6f063SBen Gardon const struct kvm_memory_slot *slot, int level) 768c50d8ae3SPaolo Bonzini { 769c50d8ae3SPaolo Bonzini unsigned long idx; 770c50d8ae3SPaolo Bonzini 771c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 772c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 773c50d8ae3SPaolo Bonzini } 774c50d8ae3SPaolo Bonzini 775269e9552SHamza Mahfooz static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot, 776c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 777c50d8ae3SPaolo Bonzini { 778c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 779c50d8ae3SPaolo Bonzini int i; 780c50d8ae3SPaolo Bonzini 7813bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 782c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 783c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 784c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 785c50d8ae3SPaolo Bonzini } 786c50d8ae3SPaolo Bonzini } 787c50d8ae3SPaolo Bonzini 788269e9552SHamza Mahfooz void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 789c50d8ae3SPaolo Bonzini { 790c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 791c50d8ae3SPaolo Bonzini } 792c50d8ae3SPaolo Bonzini 793269e9552SHamza Mahfooz void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 794c50d8ae3SPaolo Bonzini { 795c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 796c50d8ae3SPaolo Bonzini } 797c50d8ae3SPaolo Bonzini 798c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 799c50d8ae3SPaolo Bonzini { 800c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 801c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 802c50d8ae3SPaolo Bonzini gfn_t gfn; 803c50d8ae3SPaolo Bonzini 804c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 805c50d8ae3SPaolo Bonzini gfn = sp->gfn; 806c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 807c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 808c50d8ae3SPaolo Bonzini 809c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 8103bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 811c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 812c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 813c50d8ae3SPaolo Bonzini 814c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 815c50d8ae3SPaolo Bonzini } 816c50d8ae3SPaolo Bonzini 81729cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 818c50d8ae3SPaolo Bonzini { 819c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 820c50d8ae3SPaolo Bonzini return; 821c50d8ae3SPaolo Bonzini 822c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 823c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 824c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 825c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 826c50d8ae3SPaolo Bonzini } 827c50d8ae3SPaolo Bonzini 828c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 829c50d8ae3SPaolo Bonzini { 830c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 831c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 832c50d8ae3SPaolo Bonzini gfn_t gfn; 833c50d8ae3SPaolo Bonzini 834c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 835c50d8ae3SPaolo Bonzini gfn = sp->gfn; 836c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 837c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 8383bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 839c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 840c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 841c50d8ae3SPaolo Bonzini 842c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 843c50d8ae3SPaolo Bonzini } 844c50d8ae3SPaolo Bonzini 84529cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 846c50d8ae3SPaolo Bonzini { 847c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 848c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 849c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 850c50d8ae3SPaolo Bonzini } 851c50d8ae3SPaolo Bonzini 852c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 853c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 854c50d8ae3SPaolo Bonzini bool no_dirty_log) 855c50d8ae3SPaolo Bonzini { 856c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 857c50d8ae3SPaolo Bonzini 858c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 85991b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 86091b0d268SPaolo Bonzini return NULL; 861044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 86291b0d268SPaolo Bonzini return NULL; 863c50d8ae3SPaolo Bonzini 864c50d8ae3SPaolo Bonzini return slot; 865c50d8ae3SPaolo Bonzini } 866c50d8ae3SPaolo Bonzini 867c50d8ae3SPaolo Bonzini /* 868c50d8ae3SPaolo Bonzini * About rmap_head encoding: 869c50d8ae3SPaolo Bonzini * 870c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 871c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 872c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 873c50d8ae3SPaolo Bonzini */ 874c50d8ae3SPaolo Bonzini 875c50d8ae3SPaolo Bonzini /* 876c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 877c50d8ae3SPaolo Bonzini */ 878c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 879c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 880c50d8ae3SPaolo Bonzini { 881c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 88213236e25SPeter Xu int count = 0; 883c50d8ae3SPaolo Bonzini 884c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 885805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 886c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 887c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 888805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 889c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 890c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 891c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 89213236e25SPeter Xu desc->spte_count = 2; 893c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 894c50d8ae3SPaolo Bonzini ++count; 895c50d8ae3SPaolo Bonzini } else { 896805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 897c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 89813236e25SPeter Xu while (desc->spte_count == PTE_LIST_EXT) { 899c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 900c6c4f961SLi RongQing if (!desc->more) { 901c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 902c50d8ae3SPaolo Bonzini desc = desc->more; 90313236e25SPeter Xu desc->spte_count = 0; 904c6c4f961SLi RongQing break; 905c6c4f961SLi RongQing } 906c6c4f961SLi RongQing desc = desc->more; 907c50d8ae3SPaolo Bonzini } 90813236e25SPeter Xu count += desc->spte_count; 90913236e25SPeter Xu desc->sptes[desc->spte_count++] = spte; 910c50d8ae3SPaolo Bonzini } 911c50d8ae3SPaolo Bonzini return count; 912c50d8ae3SPaolo Bonzini } 913c50d8ae3SPaolo Bonzini 914c50d8ae3SPaolo Bonzini static void 915c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 916c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 917c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 918c50d8ae3SPaolo Bonzini { 91913236e25SPeter Xu int j = desc->spte_count - 1; 920c50d8ae3SPaolo Bonzini 921c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 922c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 92313236e25SPeter Xu desc->spte_count--; 92413236e25SPeter Xu if (desc->spte_count) 925c50d8ae3SPaolo Bonzini return; 926c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 927fe3c2b4cSMiaohe Lin rmap_head->val = 0; 928c50d8ae3SPaolo Bonzini else 929c50d8ae3SPaolo Bonzini if (prev_desc) 930c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 931c50d8ae3SPaolo Bonzini else 932c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 933c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 934c50d8ae3SPaolo Bonzini } 935c50d8ae3SPaolo Bonzini 936c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 937c50d8ae3SPaolo Bonzini { 938c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 939c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 940c50d8ae3SPaolo Bonzini int i; 941c50d8ae3SPaolo Bonzini 942c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 943c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 944c50d8ae3SPaolo Bonzini BUG(); 945c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 946805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 947c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 948c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 949c50d8ae3SPaolo Bonzini BUG(); 950c50d8ae3SPaolo Bonzini } 951c50d8ae3SPaolo Bonzini rmap_head->val = 0; 952c50d8ae3SPaolo Bonzini } else { 953805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 954c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 955c50d8ae3SPaolo Bonzini prev_desc = NULL; 956c50d8ae3SPaolo Bonzini while (desc) { 95713236e25SPeter Xu for (i = 0; i < desc->spte_count; ++i) { 958c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 959c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 960c50d8ae3SPaolo Bonzini desc, i, prev_desc); 961c50d8ae3SPaolo Bonzini return; 962c50d8ae3SPaolo Bonzini } 963c50d8ae3SPaolo Bonzini } 964c50d8ae3SPaolo Bonzini prev_desc = desc; 965c50d8ae3SPaolo Bonzini desc = desc->more; 966c50d8ae3SPaolo Bonzini } 967c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 968c50d8ae3SPaolo Bonzini BUG(); 969c50d8ae3SPaolo Bonzini } 970c50d8ae3SPaolo Bonzini } 971c50d8ae3SPaolo Bonzini 97271f51d2cSMingwei Zhang static void pte_list_remove(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 97371f51d2cSMingwei Zhang u64 *sptep) 974c50d8ae3SPaolo Bonzini { 97571f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, sptep); 976c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 977c50d8ae3SPaolo Bonzini } 978c50d8ae3SPaolo Bonzini 979a75b5404SPeter Xu /* Return true if rmap existed, false otherwise */ 98071f51d2cSMingwei Zhang static bool pte_list_destroy(struct kvm *kvm, struct kvm_rmap_head *rmap_head) 981a75b5404SPeter Xu { 982a75b5404SPeter Xu struct pte_list_desc *desc, *next; 983a75b5404SPeter Xu int i; 984a75b5404SPeter Xu 985a75b5404SPeter Xu if (!rmap_head->val) 986a75b5404SPeter Xu return false; 987a75b5404SPeter Xu 988a75b5404SPeter Xu if (!(rmap_head->val & 1)) { 98971f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val); 990a75b5404SPeter Xu goto out; 991a75b5404SPeter Xu } 992a75b5404SPeter Xu 993a75b5404SPeter Xu desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 994a75b5404SPeter Xu 995a75b5404SPeter Xu for (; desc; desc = next) { 996a75b5404SPeter Xu for (i = 0; i < desc->spte_count; i++) 99771f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, desc->sptes[i]); 998a75b5404SPeter Xu next = desc->more; 999a75b5404SPeter Xu mmu_free_pte_list_desc(desc); 1000a75b5404SPeter Xu } 1001a75b5404SPeter Xu out: 1002a75b5404SPeter Xu /* rmap_head is meaningless now, remember to reset it */ 1003a75b5404SPeter Xu rmap_head->val = 0; 1004a75b5404SPeter Xu return true; 1005a75b5404SPeter Xu } 1006a75b5404SPeter Xu 10073bcd0662SPeter Xu unsigned int pte_list_count(struct kvm_rmap_head *rmap_head) 10083bcd0662SPeter Xu { 10093bcd0662SPeter Xu struct pte_list_desc *desc; 10103bcd0662SPeter Xu unsigned int count = 0; 10113bcd0662SPeter Xu 10123bcd0662SPeter Xu if (!rmap_head->val) 10133bcd0662SPeter Xu return 0; 10143bcd0662SPeter Xu else if (!(rmap_head->val & 1)) 10153bcd0662SPeter Xu return 1; 10163bcd0662SPeter Xu 10173bcd0662SPeter Xu desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 10183bcd0662SPeter Xu 10193bcd0662SPeter Xu while (desc) { 10203bcd0662SPeter Xu count += desc->spte_count; 10213bcd0662SPeter Xu desc = desc->more; 10223bcd0662SPeter Xu } 10233bcd0662SPeter Xu 10243bcd0662SPeter Xu return count; 10253bcd0662SPeter Xu } 10263bcd0662SPeter Xu 102793e083d4SDavid Matlack static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level, 1028269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1029c50d8ae3SPaolo Bonzini { 1030c50d8ae3SPaolo Bonzini unsigned long idx; 1031c50d8ae3SPaolo Bonzini 1032c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 10333bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1034c50d8ae3SPaolo Bonzini } 1035c50d8ae3SPaolo Bonzini 1036c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1037c50d8ae3SPaolo Bonzini { 1038356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 1039c50d8ae3SPaolo Bonzini 1040356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 104194ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 1042c50d8ae3SPaolo Bonzini } 1043c50d8ae3SPaolo Bonzini 1044c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1045c50d8ae3SPaolo Bonzini { 1046601f8af0SDavid Matlack struct kvm_memslots *slots; 1047601f8af0SDavid Matlack struct kvm_memory_slot *slot; 1048c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1049c50d8ae3SPaolo Bonzini gfn_t gfn; 1050c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1051c50d8ae3SPaolo Bonzini 105257354682SSean Christopherson sp = sptep_to_sp(spte); 1053c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1054601f8af0SDavid Matlack 1055601f8af0SDavid Matlack /* 105668be1306SDavid Matlack * Unlike rmap_add, rmap_remove does not run in the context of a vCPU 105768be1306SDavid Matlack * so we have to determine which memslots to use based on context 105868be1306SDavid Matlack * information in sp->role. 1059601f8af0SDavid Matlack */ 1060601f8af0SDavid Matlack slots = kvm_memslots_for_spte_role(kvm, sp->role); 1061601f8af0SDavid Matlack 1062601f8af0SDavid Matlack slot = __gfn_to_memslot(slots, gfn); 106393e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 1064601f8af0SDavid Matlack 1065c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1066c50d8ae3SPaolo Bonzini } 1067c50d8ae3SPaolo Bonzini 1068c50d8ae3SPaolo Bonzini /* 1069c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1070c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1071c50d8ae3SPaolo Bonzini */ 1072c50d8ae3SPaolo Bonzini struct rmap_iterator { 1073c50d8ae3SPaolo Bonzini /* private fields */ 1074c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1075c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1076c50d8ae3SPaolo Bonzini }; 1077c50d8ae3SPaolo Bonzini 1078c50d8ae3SPaolo Bonzini /* 1079c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1080c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 10810a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1082c50d8ae3SPaolo Bonzini * 1083c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1084c50d8ae3SPaolo Bonzini */ 1085c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1086c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1087c50d8ae3SPaolo Bonzini { 1088c50d8ae3SPaolo Bonzini u64 *sptep; 1089c50d8ae3SPaolo Bonzini 1090c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1091c50d8ae3SPaolo Bonzini return NULL; 1092c50d8ae3SPaolo Bonzini 1093c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1094c50d8ae3SPaolo Bonzini iter->desc = NULL; 1095c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1096c50d8ae3SPaolo Bonzini goto out; 1097c50d8ae3SPaolo Bonzini } 1098c50d8ae3SPaolo Bonzini 1099c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1100c50d8ae3SPaolo Bonzini iter->pos = 0; 1101c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1102c50d8ae3SPaolo Bonzini out: 1103c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1104c50d8ae3SPaolo Bonzini return sptep; 1105c50d8ae3SPaolo Bonzini } 1106c50d8ae3SPaolo Bonzini 1107c50d8ae3SPaolo Bonzini /* 1108c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1109c50d8ae3SPaolo Bonzini * 1110c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1111c50d8ae3SPaolo Bonzini */ 1112c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1113c50d8ae3SPaolo Bonzini { 1114c50d8ae3SPaolo Bonzini u64 *sptep; 1115c50d8ae3SPaolo Bonzini 1116c50d8ae3SPaolo Bonzini if (iter->desc) { 1117c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1118c50d8ae3SPaolo Bonzini ++iter->pos; 1119c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1120c50d8ae3SPaolo Bonzini if (sptep) 1121c50d8ae3SPaolo Bonzini goto out; 1122c50d8ae3SPaolo Bonzini } 1123c50d8ae3SPaolo Bonzini 1124c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1125c50d8ae3SPaolo Bonzini 1126c50d8ae3SPaolo Bonzini if (iter->desc) { 1127c50d8ae3SPaolo Bonzini iter->pos = 0; 1128c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1129c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1130c50d8ae3SPaolo Bonzini goto out; 1131c50d8ae3SPaolo Bonzini } 1132c50d8ae3SPaolo Bonzini } 1133c50d8ae3SPaolo Bonzini 1134c50d8ae3SPaolo Bonzini return NULL; 1135c50d8ae3SPaolo Bonzini out: 1136c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1137c50d8ae3SPaolo Bonzini return sptep; 1138c50d8ae3SPaolo Bonzini } 1139c50d8ae3SPaolo Bonzini 1140c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1141c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1142c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1143c50d8ae3SPaolo Bonzini 1144c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1145c50d8ae3SPaolo Bonzini { 114671f51d2cSMingwei Zhang u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep); 11477fa2a347SSean Christopherson 11487fa2a347SSean Christopherson if (is_shadow_present_pte(old_spte)) 1149c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1150c50d8ae3SPaolo Bonzini } 1151c50d8ae3SPaolo Bonzini 1152c50d8ae3SPaolo Bonzini 1153c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1154c50d8ae3SPaolo Bonzini { 1155c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 115657354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1157c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1158c50d8ae3SPaolo Bonzini return true; 1159c50d8ae3SPaolo Bonzini } 1160c50d8ae3SPaolo Bonzini 1161c50d8ae3SPaolo Bonzini return false; 1162c50d8ae3SPaolo Bonzini } 1163c50d8ae3SPaolo Bonzini 1164c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1165c50d8ae3SPaolo Bonzini { 1166c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 116757354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1168c50d8ae3SPaolo Bonzini 1169c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1170c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1171c50d8ae3SPaolo Bonzini } 1172c50d8ae3SPaolo Bonzini } 1173c50d8ae3SPaolo Bonzini 1174c50d8ae3SPaolo Bonzini /* 1175c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1176c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1177c50d8ae3SPaolo Bonzini * 1178c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1179c50d8ae3SPaolo Bonzini * protection: 1180c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1181c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1182c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1183c50d8ae3SPaolo Bonzini * shadow page. 1184c50d8ae3SPaolo Bonzini * 1185c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1186c50d8ae3SPaolo Bonzini */ 1187c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1188c50d8ae3SPaolo Bonzini { 1189c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1190c50d8ae3SPaolo Bonzini 1191c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1192c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1193c50d8ae3SPaolo Bonzini return false; 1194c50d8ae3SPaolo Bonzini 1195805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1196c50d8ae3SPaolo Bonzini 1197c50d8ae3SPaolo Bonzini if (pt_protect) 11985fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1199c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1200c50d8ae3SPaolo Bonzini 1201c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1202c50d8ae3SPaolo Bonzini } 1203c50d8ae3SPaolo Bonzini 12041346bbb6SDavid Matlack static bool rmap_write_protect(struct kvm_rmap_head *rmap_head, 1205c50d8ae3SPaolo Bonzini bool pt_protect) 1206c50d8ae3SPaolo Bonzini { 1207c50d8ae3SPaolo Bonzini u64 *sptep; 1208c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1209c50d8ae3SPaolo Bonzini bool flush = false; 1210c50d8ae3SPaolo Bonzini 1211c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1212c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1213c50d8ae3SPaolo Bonzini 1214c50d8ae3SPaolo Bonzini return flush; 1215c50d8ae3SPaolo Bonzini } 1216c50d8ae3SPaolo Bonzini 1217c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1218c50d8ae3SPaolo Bonzini { 1219c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1220c50d8ae3SPaolo Bonzini 1221805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1222c50d8ae3SPaolo Bonzini 1223c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1224c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1225c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1226c50d8ae3SPaolo Bonzini } 1227c50d8ae3SPaolo Bonzini 1228c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1229c50d8ae3SPaolo Bonzini { 1230c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1231c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1232c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1233c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1234c50d8ae3SPaolo Bonzini 1235c50d8ae3SPaolo Bonzini return was_writable; 1236c50d8ae3SPaolo Bonzini } 1237c50d8ae3SPaolo Bonzini 1238c50d8ae3SPaolo Bonzini /* 1239c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1240c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1241c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1242c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1243c50d8ae3SPaolo Bonzini */ 12440a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1245269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1246c50d8ae3SPaolo Bonzini { 1247c50d8ae3SPaolo Bonzini u64 *sptep; 1248c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1249c50d8ae3SPaolo Bonzini bool flush = false; 1250c50d8ae3SPaolo Bonzini 1251c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1252c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1253c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1254c50d8ae3SPaolo Bonzini else 1255c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1256c50d8ae3SPaolo Bonzini 1257c50d8ae3SPaolo Bonzini return flush; 1258c50d8ae3SPaolo Bonzini } 1259c50d8ae3SPaolo Bonzini 1260c50d8ae3SPaolo Bonzini /** 1261c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1262c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1263c50d8ae3SPaolo Bonzini * @slot: slot to protect 1264c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1265c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1266c50d8ae3SPaolo Bonzini * 126789212919SKeqian Zhu * Used when we do not need to care about huge page mappings. 1268c50d8ae3SPaolo Bonzini */ 1269c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1270c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1271c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1272c50d8ae3SPaolo Bonzini { 1273c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1274c50d8ae3SPaolo Bonzini 1275897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1276a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1277a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1278e2209710SBen Gardon 1279e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1280e2209710SBen Gardon return; 1281e2209710SBen Gardon 1282c50d8ae3SPaolo Bonzini while (mask) { 128393e083d4SDavid Matlack rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12843bae0459SSean Christopherson PG_LEVEL_4K, slot); 12851346bbb6SDavid Matlack rmap_write_protect(rmap_head, false); 1286c50d8ae3SPaolo Bonzini 1287c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1288c50d8ae3SPaolo Bonzini mask &= mask - 1; 1289c50d8ae3SPaolo Bonzini } 1290c50d8ae3SPaolo Bonzini } 1291c50d8ae3SPaolo Bonzini 1292c50d8ae3SPaolo Bonzini /** 1293c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1294c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1295c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1296c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1297c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1298c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1299c50d8ae3SPaolo Bonzini * 1300c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1301c50d8ae3SPaolo Bonzini */ 1302a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1303c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1304c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1305c50d8ae3SPaolo Bonzini { 1306c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1307c50d8ae3SPaolo Bonzini 1308897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1309a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1310a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1311e2209710SBen Gardon 1312e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1313e2209710SBen Gardon return; 1314e2209710SBen Gardon 1315c50d8ae3SPaolo Bonzini while (mask) { 131693e083d4SDavid Matlack rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13173bae0459SSean Christopherson PG_LEVEL_4K, slot); 13180a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1319c50d8ae3SPaolo Bonzini 1320c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1321c50d8ae3SPaolo Bonzini mask &= mask - 1; 1322c50d8ae3SPaolo Bonzini } 1323c50d8ae3SPaolo Bonzini } 1324c50d8ae3SPaolo Bonzini 1325c50d8ae3SPaolo Bonzini /** 1326c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1327c50d8ae3SPaolo Bonzini * PT level pages. 1328c50d8ae3SPaolo Bonzini * 1329c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1330c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1331c50d8ae3SPaolo Bonzini * 133289212919SKeqian Zhu * We need to care about huge page mappings: e.g. during dirty logging we may 133389212919SKeqian Zhu * have such mappings. 1334c50d8ae3SPaolo Bonzini */ 1335c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1336c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1337c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1338c50d8ae3SPaolo Bonzini { 133989212919SKeqian Zhu /* 134089212919SKeqian Zhu * Huge pages are NOT write protected when we start dirty logging in 134189212919SKeqian Zhu * initially-all-set mode; must write protect them here so that they 134289212919SKeqian Zhu * are split to 4K on the first write. 134389212919SKeqian Zhu * 134489212919SKeqian Zhu * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn 134589212919SKeqian Zhu * of memslot has no such restriction, so the range can cross two large 134689212919SKeqian Zhu * pages. 134789212919SKeqian Zhu */ 134889212919SKeqian Zhu if (kvm_dirty_log_manual_protect_and_init_set(kvm)) { 134989212919SKeqian Zhu gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); 135089212919SKeqian Zhu gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); 135189212919SKeqian Zhu 1352cb00a70bSDavid Matlack if (READ_ONCE(eager_page_split)) 1353cb00a70bSDavid Matlack kvm_mmu_try_split_huge_pages(kvm, slot, start, end, PG_LEVEL_4K); 1354cb00a70bSDavid Matlack 135589212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M); 135689212919SKeqian Zhu 135789212919SKeqian Zhu /* Cross two large pages? */ 135889212919SKeqian Zhu if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) != 135989212919SKeqian Zhu ALIGN(end << PAGE_SHIFT, PMD_SIZE)) 136089212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, end, 136189212919SKeqian Zhu PG_LEVEL_2M); 136289212919SKeqian Zhu } 136389212919SKeqian Zhu 136489212919SKeqian Zhu /* Now handle 4K PTEs. */ 1365a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1366a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1367c50d8ae3SPaolo Bonzini else 1368c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1369c50d8ae3SPaolo Bonzini } 1370c50d8ae3SPaolo Bonzini 1371fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1372fb04a1edSPeter Xu { 13736dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1374fb04a1edSPeter Xu } 1375fb04a1edSPeter Xu 1376c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 13773ad93562SKeqian Zhu struct kvm_memory_slot *slot, u64 gfn, 13783ad93562SKeqian Zhu int min_level) 1379c50d8ae3SPaolo Bonzini { 1380c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1381c50d8ae3SPaolo Bonzini int i; 1382c50d8ae3SPaolo Bonzini bool write_protected = false; 1383c50d8ae3SPaolo Bonzini 1384e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 13853ad93562SKeqian Zhu for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 138693e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, i, slot); 13871346bbb6SDavid Matlack write_protected |= rmap_write_protect(rmap_head, true); 1388c50d8ae3SPaolo Bonzini } 1389e2209710SBen Gardon } 1390c50d8ae3SPaolo Bonzini 1391897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 139246044f72SBen Gardon write_protected |= 13933ad93562SKeqian Zhu kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level); 139446044f72SBen Gardon 1395c50d8ae3SPaolo Bonzini return write_protected; 1396c50d8ae3SPaolo Bonzini } 1397c50d8ae3SPaolo Bonzini 1398cf48f9e2SDavid Matlack static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn) 1399c50d8ae3SPaolo Bonzini { 1400c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1401c50d8ae3SPaolo Bonzini 1402c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 14033ad93562SKeqian Zhu return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); 1404c50d8ae3SPaolo Bonzini } 1405c50d8ae3SPaolo Bonzini 14060a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1407269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1408c50d8ae3SPaolo Bonzini { 140971f51d2cSMingwei Zhang return pte_list_destroy(kvm, rmap_head); 1410c50d8ae3SPaolo Bonzini } 1411c50d8ae3SPaolo Bonzini 14123039bcc7SSean Christopherson static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1413c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14143039bcc7SSean Christopherson pte_t unused) 1415c50d8ae3SPaolo Bonzini { 14160a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1417c50d8ae3SPaolo Bonzini } 1418c50d8ae3SPaolo Bonzini 14193039bcc7SSean Christopherson static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1420c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14213039bcc7SSean Christopherson pte_t pte) 1422c50d8ae3SPaolo Bonzini { 1423c50d8ae3SPaolo Bonzini u64 *sptep; 1424c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 142598a26b69SVihas Mak bool need_flush = false; 1426c50d8ae3SPaolo Bonzini u64 new_spte; 1427c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1428c50d8ae3SPaolo Bonzini 14293039bcc7SSean Christopherson WARN_ON(pte_huge(pte)); 14303039bcc7SSean Christopherson new_pfn = pte_pfn(pte); 1431c50d8ae3SPaolo Bonzini 1432c50d8ae3SPaolo Bonzini restart: 1433c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1434805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1435c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1436c50d8ae3SPaolo Bonzini 143798a26b69SVihas Mak need_flush = true; 1438c50d8ae3SPaolo Bonzini 14393039bcc7SSean Christopherson if (pte_write(pte)) { 144071f51d2cSMingwei Zhang pte_list_remove(kvm, rmap_head, sptep); 1441c50d8ae3SPaolo Bonzini goto restart; 1442c50d8ae3SPaolo Bonzini } else { 1443cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1444cb3eedabSPaolo Bonzini *sptep, new_pfn); 1445c50d8ae3SPaolo Bonzini 144671f51d2cSMingwei Zhang mmu_spte_clear_track_bits(kvm, sptep); 1447c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1448c50d8ae3SPaolo Bonzini } 1449c50d8ae3SPaolo Bonzini } 1450c50d8ae3SPaolo Bonzini 1451c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1452c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 145398a26b69SVihas Mak return false; 1454c50d8ae3SPaolo Bonzini } 1455c50d8ae3SPaolo Bonzini 1456c50d8ae3SPaolo Bonzini return need_flush; 1457c50d8ae3SPaolo Bonzini } 1458c50d8ae3SPaolo Bonzini 1459c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1460c50d8ae3SPaolo Bonzini /* input fields. */ 1461269e9552SHamza Mahfooz const struct kvm_memory_slot *slot; 1462c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1463c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1464c50d8ae3SPaolo Bonzini int start_level; 1465c50d8ae3SPaolo Bonzini int end_level; 1466c50d8ae3SPaolo Bonzini 1467c50d8ae3SPaolo Bonzini /* output fields. */ 1468c50d8ae3SPaolo Bonzini gfn_t gfn; 1469c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1470c50d8ae3SPaolo Bonzini int level; 1471c50d8ae3SPaolo Bonzini 1472c50d8ae3SPaolo Bonzini /* private field. */ 1473c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1474c50d8ae3SPaolo Bonzini }; 1475c50d8ae3SPaolo Bonzini 1476c50d8ae3SPaolo Bonzini static void 1477c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1478c50d8ae3SPaolo Bonzini { 1479c50d8ae3SPaolo Bonzini iterator->level = level; 1480c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 148193e083d4SDavid Matlack iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot); 148293e083d4SDavid Matlack iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot); 1483c50d8ae3SPaolo Bonzini } 1484c50d8ae3SPaolo Bonzini 1485c50d8ae3SPaolo Bonzini static void 1486c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1487269e9552SHamza Mahfooz const struct kvm_memory_slot *slot, int start_level, 1488c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1489c50d8ae3SPaolo Bonzini { 1490c50d8ae3SPaolo Bonzini iterator->slot = slot; 1491c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1492c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1493c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1494c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1495c50d8ae3SPaolo Bonzini 1496c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1497c50d8ae3SPaolo Bonzini } 1498c50d8ae3SPaolo Bonzini 1499c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1500c50d8ae3SPaolo Bonzini { 1501c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1502c50d8ae3SPaolo Bonzini } 1503c50d8ae3SPaolo Bonzini 1504c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1505c50d8ae3SPaolo Bonzini { 1506c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1507c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1508c50d8ae3SPaolo Bonzini return; 1509c50d8ae3SPaolo Bonzini } 1510c50d8ae3SPaolo Bonzini 1511c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1512c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1513c50d8ae3SPaolo Bonzini return; 1514c50d8ae3SPaolo Bonzini } 1515c50d8ae3SPaolo Bonzini 1516c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1517c50d8ae3SPaolo Bonzini } 1518c50d8ae3SPaolo Bonzini 1519c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1520c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1521c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1522c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1523c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1524c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1525c50d8ae3SPaolo Bonzini 15263039bcc7SSean Christopherson typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1527c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 15283039bcc7SSean Christopherson int level, pte_t pte); 1529c1b91493SSean Christopherson 15303039bcc7SSean Christopherson static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm, 15313039bcc7SSean Christopherson struct kvm_gfn_range *range, 1532c1b91493SSean Christopherson rmap_handler_t handler) 1533c50d8ae3SPaolo Bonzini { 1534c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 15353039bcc7SSean Christopherson bool ret = false; 1536c50d8ae3SPaolo Bonzini 15373039bcc7SSean Christopherson for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 15383039bcc7SSean Christopherson range->start, range->end - 1, &iterator) 15393039bcc7SSean Christopherson ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, 15403039bcc7SSean Christopherson iterator.level, range->pte); 1541c50d8ae3SPaolo Bonzini 1542c50d8ae3SPaolo Bonzini return ret; 1543c50d8ae3SPaolo Bonzini } 1544c50d8ae3SPaolo Bonzini 15453039bcc7SSean Christopherson bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 1546c50d8ae3SPaolo Bonzini { 1547e2209710SBen Gardon bool flush = false; 1548c50d8ae3SPaolo Bonzini 1549e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15503039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp); 1551063afacdSBen Gardon 1552897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1553c7785d85SHou Wenlong flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush); 1554063afacdSBen Gardon 15553039bcc7SSean Christopherson return flush; 1556c50d8ae3SPaolo Bonzini } 1557c50d8ae3SPaolo Bonzini 15583039bcc7SSean Christopherson bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1559c50d8ae3SPaolo Bonzini { 1560e2209710SBen Gardon bool flush = false; 15611d8dd6b3SBen Gardon 1562e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15633039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp); 15641d8dd6b3SBen Gardon 1565897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15663039bcc7SSean Christopherson flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range); 15671d8dd6b3SBen Gardon 15683039bcc7SSean Christopherson return flush; 1569c50d8ae3SPaolo Bonzini } 1570c50d8ae3SPaolo Bonzini 15713039bcc7SSean Christopherson static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1572c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 15733039bcc7SSean Christopherson pte_t unused) 1574c50d8ae3SPaolo Bonzini { 1575c50d8ae3SPaolo Bonzini u64 *sptep; 15763f649ab7SKees Cook struct rmap_iterator iter; 1577c50d8ae3SPaolo Bonzini int young = 0; 1578c50d8ae3SPaolo Bonzini 1579c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1580c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1581c50d8ae3SPaolo Bonzini 1582c50d8ae3SPaolo Bonzini return young; 1583c50d8ae3SPaolo Bonzini } 1584c50d8ae3SPaolo Bonzini 15853039bcc7SSean Christopherson static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1586c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 15873039bcc7SSean Christopherson int level, pte_t unused) 1588c50d8ae3SPaolo Bonzini { 1589c50d8ae3SPaolo Bonzini u64 *sptep; 1590c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1591c50d8ae3SPaolo Bonzini 1592c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1593c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 159498a26b69SVihas Mak return true; 159598a26b69SVihas Mak return false; 1596c50d8ae3SPaolo Bonzini } 1597c50d8ae3SPaolo Bonzini 1598c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1599c50d8ae3SPaolo Bonzini 16008a9f566aSDavid Matlack static void rmap_add(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot, 16018a9f566aSDavid Matlack u64 *spte, gfn_t gfn) 1602c50d8ae3SPaolo Bonzini { 1603c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 160468be1306SDavid Matlack struct kvm_rmap_head *rmap_head; 160568be1306SDavid Matlack int rmap_count; 1606c50d8ae3SPaolo Bonzini 160757354682SSean Christopherson sp = sptep_to_sp(spte); 160868be1306SDavid Matlack kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 160993e083d4SDavid Matlack rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); 161068be1306SDavid Matlack rmap_count = pte_list_add(vcpu, spte, rmap_head); 1611c50d8ae3SPaolo Bonzini 161268be1306SDavid Matlack if (rmap_count > RMAP_RECYCLE_THRESHOLD) { 16133039bcc7SSean Christopherson kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0)); 161468be1306SDavid Matlack kvm_flush_remote_tlbs_with_address( 161568be1306SDavid Matlack vcpu->kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level)); 161668be1306SDavid Matlack } 1617c50d8ae3SPaolo Bonzini } 1618c50d8ae3SPaolo Bonzini 16193039bcc7SSean Christopherson bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1620c50d8ae3SPaolo Bonzini { 1621e2209710SBen Gardon bool young = false; 1622f8e14497SBen Gardon 1623e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16243039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp); 16253039bcc7SSean Christopherson 1626897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16273039bcc7SSean Christopherson young |= kvm_tdp_mmu_age_gfn_range(kvm, range); 1628f8e14497SBen Gardon 1629f8e14497SBen Gardon return young; 1630c50d8ae3SPaolo Bonzini } 1631c50d8ae3SPaolo Bonzini 16323039bcc7SSean Christopherson bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1633c50d8ae3SPaolo Bonzini { 1634e2209710SBen Gardon bool young = false; 1635f8e14497SBen Gardon 1636e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16373039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp); 16383039bcc7SSean Christopherson 1639897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16403039bcc7SSean Christopherson young |= kvm_tdp_mmu_test_age_gfn(kvm, range); 1641f8e14497SBen Gardon 1642f8e14497SBen Gardon return young; 1643c50d8ae3SPaolo Bonzini } 1644c50d8ae3SPaolo Bonzini 1645c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1646c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1647c50d8ae3SPaolo Bonzini { 1648c50d8ae3SPaolo Bonzini u64 *pos; 1649c50d8ae3SPaolo Bonzini u64 *end; 1650c50d8ae3SPaolo Bonzini 1651c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1652c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1653c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1654c50d8ae3SPaolo Bonzini pos, *pos); 1655c50d8ae3SPaolo Bonzini return 0; 1656c50d8ae3SPaolo Bonzini } 1657c50d8ae3SPaolo Bonzini return 1; 1658c50d8ae3SPaolo Bonzini } 1659c50d8ae3SPaolo Bonzini #endif 1660c50d8ae3SPaolo Bonzini 1661c50d8ae3SPaolo Bonzini /* 1662c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1663c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1664c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1665c50d8ae3SPaolo Bonzini * faster 1666c50d8ae3SPaolo Bonzini */ 1667d5aaad6fSSean Christopherson static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr) 1668c50d8ae3SPaolo Bonzini { 1669c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1670c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1671c50d8ae3SPaolo Bonzini } 1672c50d8ae3SPaolo Bonzini 1673c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1674c50d8ae3SPaolo Bonzini { 1675c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1676c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1677c50d8ae3SPaolo Bonzini list_del(&sp->link); 1678c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1679c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1680c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1681c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1682c50d8ae3SPaolo Bonzini } 1683c50d8ae3SPaolo Bonzini 1684c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1685c50d8ae3SPaolo Bonzini { 1686c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1687c50d8ae3SPaolo Bonzini } 1688c50d8ae3SPaolo Bonzini 1689c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1690c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1691c50d8ae3SPaolo Bonzini { 1692c50d8ae3SPaolo Bonzini if (!parent_pte) 1693c50d8ae3SPaolo Bonzini return; 1694c50d8ae3SPaolo Bonzini 1695c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1696c50d8ae3SPaolo Bonzini } 1697c50d8ae3SPaolo Bonzini 1698c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1699c50d8ae3SPaolo Bonzini u64 *parent_pte) 1700c50d8ae3SPaolo Bonzini { 1701c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1702c50d8ae3SPaolo Bonzini } 1703c50d8ae3SPaolo Bonzini 1704c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1705c50d8ae3SPaolo Bonzini u64 *parent_pte) 1706c50d8ae3SPaolo Bonzini { 1707c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1708c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1709c50d8ae3SPaolo Bonzini } 1710c50d8ae3SPaolo Bonzini 1711c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1712c50d8ae3SPaolo Bonzini { 1713c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1714c50d8ae3SPaolo Bonzini 171594ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 171694ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1717c50d8ae3SPaolo Bonzini if (!direct) 171894ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1719c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1720c50d8ae3SPaolo Bonzini 1721c50d8ae3SPaolo Bonzini /* 1722c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1723c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1724c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1725c50d8ae3SPaolo Bonzini */ 1726c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1727c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1728c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1729c50d8ae3SPaolo Bonzini return sp; 1730c50d8ae3SPaolo Bonzini } 1731c50d8ae3SPaolo Bonzini 1732c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1733c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1734c50d8ae3SPaolo Bonzini { 1735c50d8ae3SPaolo Bonzini u64 *sptep; 1736c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1737c50d8ae3SPaolo Bonzini 1738c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1739c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1740c50d8ae3SPaolo Bonzini } 1741c50d8ae3SPaolo Bonzini } 1742c50d8ae3SPaolo Bonzini 1743c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1744c50d8ae3SPaolo Bonzini { 1745c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1746c50d8ae3SPaolo Bonzini unsigned int index; 1747c50d8ae3SPaolo Bonzini 174857354682SSean Christopherson sp = sptep_to_sp(spte); 1749c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1750c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1751c50d8ae3SPaolo Bonzini return; 1752c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1753c50d8ae3SPaolo Bonzini return; 1754c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1755c50d8ae3SPaolo Bonzini } 1756c50d8ae3SPaolo Bonzini 1757c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1758c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1759c50d8ae3SPaolo Bonzini { 1760c3e5e415SLai Jiangshan return -1; 1761c50d8ae3SPaolo Bonzini } 1762c50d8ae3SPaolo Bonzini 1763c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1764c50d8ae3SPaolo Bonzini 1765c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1766c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1767c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1768c50d8ae3SPaolo Bonzini unsigned int idx; 1769c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1770c50d8ae3SPaolo Bonzini unsigned int nr; 1771c50d8ae3SPaolo Bonzini }; 1772c50d8ae3SPaolo Bonzini 1773c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1774c50d8ae3SPaolo Bonzini int idx) 1775c50d8ae3SPaolo Bonzini { 1776c50d8ae3SPaolo Bonzini int i; 1777c50d8ae3SPaolo Bonzini 1778c50d8ae3SPaolo Bonzini if (sp->unsync) 1779c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1780c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1781c50d8ae3SPaolo Bonzini return 0; 1782c50d8ae3SPaolo Bonzini 1783c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1784c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1785c50d8ae3SPaolo Bonzini pvec->nr++; 1786c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1787c50d8ae3SPaolo Bonzini } 1788c50d8ae3SPaolo Bonzini 1789c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1790c50d8ae3SPaolo Bonzini { 1791c50d8ae3SPaolo Bonzini --sp->unsync_children; 1792c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1793c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1794c50d8ae3SPaolo Bonzini } 1795c50d8ae3SPaolo Bonzini 1796c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1797c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1798c50d8ae3SPaolo Bonzini { 1799c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1800c50d8ae3SPaolo Bonzini 1801c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1802c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1803c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1804c50d8ae3SPaolo Bonzini 1805c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1806c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1807c50d8ae3SPaolo Bonzini continue; 1808c50d8ae3SPaolo Bonzini } 1809c50d8ae3SPaolo Bonzini 1810e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1811c50d8ae3SPaolo Bonzini 1812c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1813c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1814c50d8ae3SPaolo Bonzini return -ENOSPC; 1815c50d8ae3SPaolo Bonzini 1816c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1817c50d8ae3SPaolo Bonzini if (!ret) { 1818c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1819c50d8ae3SPaolo Bonzini continue; 1820c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1821c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1822c50d8ae3SPaolo Bonzini } else 1823c50d8ae3SPaolo Bonzini return ret; 1824c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1825c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1826c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1827c50d8ae3SPaolo Bonzini return -ENOSPC; 1828c50d8ae3SPaolo Bonzini } else 1829c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1830c50d8ae3SPaolo Bonzini } 1831c50d8ae3SPaolo Bonzini 1832c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1833c50d8ae3SPaolo Bonzini } 1834c50d8ae3SPaolo Bonzini 1835c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1836c50d8ae3SPaolo Bonzini 1837c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1838c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1839c50d8ae3SPaolo Bonzini { 1840c50d8ae3SPaolo Bonzini pvec->nr = 0; 1841c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1842c50d8ae3SPaolo Bonzini return 0; 1843c50d8ae3SPaolo Bonzini 1844c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1845c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1846c50d8ae3SPaolo Bonzini } 1847c50d8ae3SPaolo Bonzini 1848c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1849c50d8ae3SPaolo Bonzini { 1850c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1851c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1852c50d8ae3SPaolo Bonzini sp->unsync = 0; 1853c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1854c50d8ae3SPaolo Bonzini } 1855c50d8ae3SPaolo Bonzini 1856c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1857c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1858c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1859c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1860c50d8ae3SPaolo Bonzini 1861ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1862ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1863c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1864c50d8ae3SPaolo Bonzini } else 1865c50d8ae3SPaolo Bonzini 1866c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1867ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1868ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1869c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1870c50d8ae3SPaolo Bonzini 1871479a1efcSSean Christopherson static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1872c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1873c50d8ae3SPaolo Bonzini { 1874c3e5e415SLai Jiangshan int ret = vcpu->arch.mmu->sync_page(vcpu, sp); 1875c3e5e415SLai Jiangshan 1876c3e5e415SLai Jiangshan if (ret < 0) { 1877c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1878c50d8ae3SPaolo Bonzini return false; 1879c50d8ae3SPaolo Bonzini } 1880c50d8ae3SPaolo Bonzini 1881c3e5e415SLai Jiangshan return !!ret; 1882c50d8ae3SPaolo Bonzini } 1883c50d8ae3SPaolo Bonzini 1884c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1885c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1886c50d8ae3SPaolo Bonzini bool remote_flush) 1887c50d8ae3SPaolo Bonzini { 1888c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1889c50d8ae3SPaolo Bonzini return false; 1890c50d8ae3SPaolo Bonzini 1891c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1892c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1893c50d8ae3SPaolo Bonzini else 1894c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1895c50d8ae3SPaolo Bonzini return true; 1896c50d8ae3SPaolo Bonzini } 1897c50d8ae3SPaolo Bonzini 1898c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1899c50d8ae3SPaolo Bonzini { 1900a955cad8SSean Christopherson if (sp->role.invalid) 1901a955cad8SSean Christopherson return true; 1902a955cad8SSean Christopherson 1903a955cad8SSean Christopherson /* TDP MMU pages due not use the MMU generation. */ 1904a955cad8SSean Christopherson return !sp->tdp_mmu_page && 1905c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1906c50d8ae3SPaolo Bonzini } 1907c50d8ae3SPaolo Bonzini 1908c50d8ae3SPaolo Bonzini struct mmu_page_path { 1909c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1910c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1911c50d8ae3SPaolo Bonzini }; 1912c50d8ae3SPaolo Bonzini 1913c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1914c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1915c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1916c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1917c50d8ae3SPaolo Bonzini 1918c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1919c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1920c50d8ae3SPaolo Bonzini int i) 1921c50d8ae3SPaolo Bonzini { 1922c50d8ae3SPaolo Bonzini int n; 1923c50d8ae3SPaolo Bonzini 1924c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1925c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1926c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1927c50d8ae3SPaolo Bonzini int level = sp->role.level; 1928c50d8ae3SPaolo Bonzini 1929c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 19303bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1931c50d8ae3SPaolo Bonzini break; 1932c50d8ae3SPaolo Bonzini 1933c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1934c50d8ae3SPaolo Bonzini } 1935c50d8ae3SPaolo Bonzini 1936c50d8ae3SPaolo Bonzini return n; 1937c50d8ae3SPaolo Bonzini } 1938c50d8ae3SPaolo Bonzini 1939c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1940c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1941c50d8ae3SPaolo Bonzini { 1942c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1943c50d8ae3SPaolo Bonzini int level; 1944c50d8ae3SPaolo Bonzini 1945c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1946c50d8ae3SPaolo Bonzini return 0; 1947c50d8ae3SPaolo Bonzini 1948c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1949c50d8ae3SPaolo Bonzini 1950c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1951c50d8ae3SPaolo Bonzini level = sp->role.level; 19523bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1953c50d8ae3SPaolo Bonzini 1954c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1955c50d8ae3SPaolo Bonzini 1956c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1957c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1958c50d8ae3SPaolo Bonzini */ 1959c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1960c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1961c50d8ae3SPaolo Bonzini } 1962c50d8ae3SPaolo Bonzini 1963c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1964c50d8ae3SPaolo Bonzini { 1965c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1966c50d8ae3SPaolo Bonzini unsigned int level = 0; 1967c50d8ae3SPaolo Bonzini 1968c50d8ae3SPaolo Bonzini do { 1969c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 1970c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 1971c50d8ae3SPaolo Bonzini if (!sp) 1972c50d8ae3SPaolo Bonzini return; 1973c50d8ae3SPaolo Bonzini 1974c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 1975c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 1976c50d8ae3SPaolo Bonzini level++; 1977c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 1978c50d8ae3SPaolo Bonzini } 1979c50d8ae3SPaolo Bonzini 198065855ed8SLai Jiangshan static int mmu_sync_children(struct kvm_vcpu *vcpu, 198165855ed8SLai Jiangshan struct kvm_mmu_page *parent, bool can_yield) 1982c50d8ae3SPaolo Bonzini { 1983c50d8ae3SPaolo Bonzini int i; 1984c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1985c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 1986c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 1987c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1988c50d8ae3SPaolo Bonzini bool flush = false; 1989c50d8ae3SPaolo Bonzini 1990c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 1991c50d8ae3SPaolo Bonzini bool protected = false; 1992c50d8ae3SPaolo Bonzini 1993c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 1994cf48f9e2SDavid Matlack protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn); 1995c50d8ae3SPaolo Bonzini 1996c50d8ae3SPaolo Bonzini if (protected) { 19975591c069SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true); 1998c50d8ae3SPaolo Bonzini flush = false; 1999c50d8ae3SPaolo Bonzini } 2000c50d8ae3SPaolo Bonzini 2001c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2002479a1efcSSean Christopherson kvm_unlink_unsync_page(vcpu->kvm, sp); 2003c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2004c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2005c50d8ae3SPaolo Bonzini } 2006531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 2007c3e5e415SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 200865855ed8SLai Jiangshan if (!can_yield) { 200965855ed8SLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 201065855ed8SLai Jiangshan return -EINTR; 201165855ed8SLai Jiangshan } 201265855ed8SLai Jiangshan 2013531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 2014c50d8ae3SPaolo Bonzini flush = false; 2015c50d8ae3SPaolo Bonzini } 2016c50d8ae3SPaolo Bonzini } 2017c50d8ae3SPaolo Bonzini 2018c3e5e415SLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 201965855ed8SLai Jiangshan return 0; 2020c50d8ae3SPaolo Bonzini } 2021c50d8ae3SPaolo Bonzini 2022c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2023c50d8ae3SPaolo Bonzini { 2024c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2025c50d8ae3SPaolo Bonzini } 2026c50d8ae3SPaolo Bonzini 2027c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2028c50d8ae3SPaolo Bonzini { 202957354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2030c50d8ae3SPaolo Bonzini } 2031c50d8ae3SPaolo Bonzini 2032c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2033c50d8ae3SPaolo Bonzini gfn_t gfn, 2034c50d8ae3SPaolo Bonzini gva_t gaddr, 2035c50d8ae3SPaolo Bonzini unsigned level, 2036c50d8ae3SPaolo Bonzini int direct, 20370a2b64c5SBen Gardon unsigned int access) 2038c50d8ae3SPaolo Bonzini { 2039fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2040c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2041ac101b7cSSean Christopherson struct hlist_head *sp_list; 2042c50d8ae3SPaolo Bonzini unsigned quadrant; 2043c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2044c50d8ae3SPaolo Bonzini int collisions = 0; 2045c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2046c50d8ae3SPaolo Bonzini 2047c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2048c50d8ae3SPaolo Bonzini role.level = level; 2049c50d8ae3SPaolo Bonzini role.direct = direct; 2050c50d8ae3SPaolo Bonzini role.access = access; 2051bb3b394dSLai Jiangshan if (role.has_4_byte_gpte) { 2052c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2053c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2054c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2055c50d8ae3SPaolo Bonzini } 2056ac101b7cSSean Christopherson 2057ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2058ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2059c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2060c50d8ae3SPaolo Bonzini collisions++; 2061c50d8ae3SPaolo Bonzini continue; 2062c50d8ae3SPaolo Bonzini } 2063c50d8ae3SPaolo Bonzini 2064ddc16abbSSean Christopherson if (sp->role.word != role.word) { 2065ddc16abbSSean Christopherson /* 2066ddc16abbSSean Christopherson * If the guest is creating an upper-level page, zap 2067ddc16abbSSean Christopherson * unsync pages for the same gfn. While it's possible 2068ddc16abbSSean Christopherson * the guest is using recursive page tables, in all 2069ddc16abbSSean Christopherson * likelihood the guest has stopped using the unsync 2070ddc16abbSSean Christopherson * page and is installing a completely unrelated page. 2071ddc16abbSSean Christopherson * Unsync pages must not be left as is, because the new 2072ddc16abbSSean Christopherson * upper-level page will be write-protected. 2073ddc16abbSSean Christopherson */ 2074ddc16abbSSean Christopherson if (level > PG_LEVEL_4K && sp->unsync) 2075ddc16abbSSean Christopherson kvm_mmu_prepare_zap_page(vcpu->kvm, sp, 2076ddc16abbSSean Christopherson &invalid_list); 2077c50d8ae3SPaolo Bonzini continue; 2078ddc16abbSSean Christopherson } 2079c50d8ae3SPaolo Bonzini 2080fb58a9c3SSean Christopherson if (direct_mmu) 2081fb58a9c3SSean Christopherson goto trace_get_page; 2082fb58a9c3SSean Christopherson 2083c50d8ae3SPaolo Bonzini if (sp->unsync) { 208407dc4f35SSean Christopherson /* 2085479a1efcSSean Christopherson * The page is good, but is stale. kvm_sync_page does 208607dc4f35SSean Christopherson * get the latest guest state, but (unlike mmu_unsync_children) 208707dc4f35SSean Christopherson * it doesn't write-protect the page or mark it synchronized! 208807dc4f35SSean Christopherson * This way the validity of the mapping is ensured, but the 208907dc4f35SSean Christopherson * overhead of write protection is not incurred until the 209007dc4f35SSean Christopherson * guest invalidates the TLB mapping. This allows multiple 209107dc4f35SSean Christopherson * SPs for a single gfn to be unsync. 209207dc4f35SSean Christopherson * 209307dc4f35SSean Christopherson * If the sync fails, the page is zapped. If so, break 209407dc4f35SSean Christopherson * in order to rebuild it. 2095c50d8ae3SPaolo Bonzini */ 2096479a1efcSSean Christopherson if (!kvm_sync_page(vcpu, sp, &invalid_list)) 2097c50d8ae3SPaolo Bonzini break; 2098c50d8ae3SPaolo Bonzini 2099c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 2100c3e5e415SLai Jiangshan kvm_flush_remote_tlbs(vcpu->kvm); 2101c50d8ae3SPaolo Bonzini } 2102c50d8ae3SPaolo Bonzini 2103c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2104fb58a9c3SSean Christopherson 2105fb58a9c3SSean Christopherson trace_get_page: 2106c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2107c50d8ae3SPaolo Bonzini goto out; 2108c50d8ae3SPaolo Bonzini } 2109c50d8ae3SPaolo Bonzini 2110c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2111c50d8ae3SPaolo Bonzini 2112c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2113c50d8ae3SPaolo Bonzini 2114c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2115c50d8ae3SPaolo Bonzini sp->role = role; 2116ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2117c50d8ae3SPaolo Bonzini if (!direct) { 2118c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 2119cf48f9e2SDavid Matlack if (level == PG_LEVEL_4K && kvm_vcpu_write_protect_gfn(vcpu, gfn)) 2120c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2121c50d8ae3SPaolo Bonzini } 2122c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2123c50d8ae3SPaolo Bonzini out: 2124ddc16abbSSean Christopherson kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 2125ddc16abbSSean Christopherson 2126c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2127c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2128c50d8ae3SPaolo Bonzini return sp; 2129c50d8ae3SPaolo Bonzini } 2130c50d8ae3SPaolo Bonzini 2131c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2132c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2133c50d8ae3SPaolo Bonzini u64 addr) 2134c50d8ae3SPaolo Bonzini { 2135c50d8ae3SPaolo Bonzini iterator->addr = addr; 2136c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2137c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2138c50d8ae3SPaolo Bonzini 213912ec33a7SLai Jiangshan if (iterator->level >= PT64_ROOT_4LEVEL && 2140c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2141c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 214212ec33a7SLai Jiangshan iterator->level = PT32E_ROOT_LEVEL; 2143c50d8ae3SPaolo Bonzini 2144c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2145c50d8ae3SPaolo Bonzini /* 2146c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2147c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2148c50d8ae3SPaolo Bonzini */ 2149*b9e5603cSPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root.hpa); 2150c50d8ae3SPaolo Bonzini 2151c50d8ae3SPaolo Bonzini iterator->shadow_addr 2152c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2153c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2154c50d8ae3SPaolo Bonzini --iterator->level; 2155c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2156c50d8ae3SPaolo Bonzini iterator->level = 0; 2157c50d8ae3SPaolo Bonzini } 2158c50d8ae3SPaolo Bonzini } 2159c50d8ae3SPaolo Bonzini 2160c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2161c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2162c50d8ae3SPaolo Bonzini { 2163*b9e5603cSPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa, 2164c50d8ae3SPaolo Bonzini addr); 2165c50d8ae3SPaolo Bonzini } 2166c50d8ae3SPaolo Bonzini 2167c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2168c50d8ae3SPaolo Bonzini { 21693bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2170c50d8ae3SPaolo Bonzini return false; 2171c50d8ae3SPaolo Bonzini 2172c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2173c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2174c50d8ae3SPaolo Bonzini return true; 2175c50d8ae3SPaolo Bonzini } 2176c50d8ae3SPaolo Bonzini 2177c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2178c50d8ae3SPaolo Bonzini u64 spte) 2179c50d8ae3SPaolo Bonzini { 21803e44dce4SLai Jiangshan if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) { 2181c50d8ae3SPaolo Bonzini iterator->level = 0; 2182c50d8ae3SPaolo Bonzini return; 2183c50d8ae3SPaolo Bonzini } 2184c50d8ae3SPaolo Bonzini 2185c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2186c50d8ae3SPaolo Bonzini --iterator->level; 2187c50d8ae3SPaolo Bonzini } 2188c50d8ae3SPaolo Bonzini 2189c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2190c50d8ae3SPaolo Bonzini { 2191c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2192c50d8ae3SPaolo Bonzini } 2193c50d8ae3SPaolo Bonzini 2194c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2195c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2196c50d8ae3SPaolo Bonzini { 2197c50d8ae3SPaolo Bonzini u64 spte; 2198c50d8ae3SPaolo Bonzini 2199c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2200c50d8ae3SPaolo Bonzini 2201cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2202c50d8ae3SPaolo Bonzini 2203c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2204c50d8ae3SPaolo Bonzini 2205c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2206c50d8ae3SPaolo Bonzini 2207c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2208c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2209c50d8ae3SPaolo Bonzini } 2210c50d8ae3SPaolo Bonzini 2211c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2212c50d8ae3SPaolo Bonzini unsigned direct_access) 2213c50d8ae3SPaolo Bonzini { 2214c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2215c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2216c50d8ae3SPaolo Bonzini 2217c50d8ae3SPaolo Bonzini /* 2218c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2219c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2220c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2221c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2222c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2223c50d8ae3SPaolo Bonzini */ 2224e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2225c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2226c50d8ae3SPaolo Bonzini return; 2227c50d8ae3SPaolo Bonzini 2228c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2229c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2230c50d8ae3SPaolo Bonzini } 2231c50d8ae3SPaolo Bonzini } 2232c50d8ae3SPaolo Bonzini 22332de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 22342de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 22352de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2236c50d8ae3SPaolo Bonzini { 2237c50d8ae3SPaolo Bonzini u64 pte; 2238c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2239c50d8ae3SPaolo Bonzini 2240c50d8ae3SPaolo Bonzini pte = *spte; 2241c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2242c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2243c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2244c50d8ae3SPaolo Bonzini } else { 2245e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2246c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 22472de4085cSBen Gardon 22482de4085cSBen Gardon /* 22492de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 22502de4085cSBen Gardon * unlikely to be used again in the near future. This 22512de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22522de4085cSBen Gardon */ 22532de4085cSBen Gardon if (tdp_enabled && invalid_list && 22542de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22552de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22562de4085cSBen Gardon invalid_list); 2257c50d8ae3SPaolo Bonzini } 2258ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2259c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2260ace569e0SSean Christopherson } 22612de4085cSBen Gardon return 0; 2262c50d8ae3SPaolo Bonzini } 2263c50d8ae3SPaolo Bonzini 22642de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 22652de4085cSBen Gardon struct kvm_mmu_page *sp, 22662de4085cSBen Gardon struct list_head *invalid_list) 2267c50d8ae3SPaolo Bonzini { 22682de4085cSBen Gardon int zapped = 0; 2269c50d8ae3SPaolo Bonzini unsigned i; 2270c50d8ae3SPaolo Bonzini 2271c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 22722de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 22732de4085cSBen Gardon 22742de4085cSBen Gardon return zapped; 2275c50d8ae3SPaolo Bonzini } 2276c50d8ae3SPaolo Bonzini 227761827671SJinrong Liang static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp) 2278c50d8ae3SPaolo Bonzini { 2279c50d8ae3SPaolo Bonzini u64 *sptep; 2280c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2281c50d8ae3SPaolo Bonzini 2282c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2283c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2284c50d8ae3SPaolo Bonzini } 2285c50d8ae3SPaolo Bonzini 2286c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2287c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2288c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2289c50d8ae3SPaolo Bonzini { 2290c50d8ae3SPaolo Bonzini int i, zapped = 0; 2291c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2292c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2293c50d8ae3SPaolo Bonzini 22943bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2295c50d8ae3SPaolo Bonzini return 0; 2296c50d8ae3SPaolo Bonzini 2297c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2298c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2299c50d8ae3SPaolo Bonzini 2300c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2301c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2302c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2303c50d8ae3SPaolo Bonzini zapped++; 2304c50d8ae3SPaolo Bonzini } 2305c50d8ae3SPaolo Bonzini } 2306c50d8ae3SPaolo Bonzini 2307c50d8ae3SPaolo Bonzini return zapped; 2308c50d8ae3SPaolo Bonzini } 2309c50d8ae3SPaolo Bonzini 2310c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2311c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2312c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2313c50d8ae3SPaolo Bonzini int *nr_zapped) 2314c50d8ae3SPaolo Bonzini { 2315c50d8ae3SPaolo Bonzini bool list_unstable; 2316c50d8ae3SPaolo Bonzini 2317c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2318c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2319c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 23202de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 232161827671SJinrong Liang kvm_mmu_unlink_parents(sp); 2322c50d8ae3SPaolo Bonzini 2323c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2324c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2325c50d8ae3SPaolo Bonzini 2326c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2327c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2328c50d8ae3SPaolo Bonzini 2329c50d8ae3SPaolo Bonzini if (sp->unsync) 2330c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2331c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2332c50d8ae3SPaolo Bonzini /* Count self */ 2333c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2334f95eec9bSSean Christopherson 2335f95eec9bSSean Christopherson /* 2336f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2337f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2338f95eec9bSSean Christopherson * !sp->root_count. 2339f95eec9bSSean Christopherson */ 2340f95eec9bSSean Christopherson if (sp->role.invalid) 2341f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2342f95eec9bSSean Christopherson else 2343c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2344c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2345c50d8ae3SPaolo Bonzini } else { 2346f95eec9bSSean Christopherson /* 2347f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2348f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2349f95eec9bSSean Christopherson */ 2350f95eec9bSSean Christopherson list_del(&sp->link); 2351c50d8ae3SPaolo Bonzini 2352c50d8ae3SPaolo Bonzini /* 2353c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2354c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2355c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2356c50d8ae3SPaolo Bonzini */ 2357c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2358c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2359c50d8ae3SPaolo Bonzini } 2360c50d8ae3SPaolo Bonzini 2361c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2362c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2363c50d8ae3SPaolo Bonzini 2364c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2365c50d8ae3SPaolo Bonzini return list_unstable; 2366c50d8ae3SPaolo Bonzini } 2367c50d8ae3SPaolo Bonzini 2368c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2369c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2370c50d8ae3SPaolo Bonzini { 2371c50d8ae3SPaolo Bonzini int nr_zapped; 2372c50d8ae3SPaolo Bonzini 2373c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2374c50d8ae3SPaolo Bonzini return nr_zapped; 2375c50d8ae3SPaolo Bonzini } 2376c50d8ae3SPaolo Bonzini 2377c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2378c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2379c50d8ae3SPaolo Bonzini { 2380c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2381c50d8ae3SPaolo Bonzini 2382c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2383c50d8ae3SPaolo Bonzini return; 2384c50d8ae3SPaolo Bonzini 2385c50d8ae3SPaolo Bonzini /* 2386c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2387c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2388c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2389c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2390c50d8ae3SPaolo Bonzini * 2391c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2392c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2393c50d8ae3SPaolo Bonzini */ 2394c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2395c50d8ae3SPaolo Bonzini 2396c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2397c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2398c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2399c50d8ae3SPaolo Bonzini } 2400c50d8ae3SPaolo Bonzini } 2401c50d8ae3SPaolo Bonzini 24026b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 24036b82ef2cSSean Christopherson unsigned long nr_to_zap) 2404c50d8ae3SPaolo Bonzini { 24056b82ef2cSSean Christopherson unsigned long total_zapped = 0; 24066b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2407ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 24086b82ef2cSSean Christopherson bool unstable; 24096b82ef2cSSean Christopherson int nr_zapped; 2410c50d8ae3SPaolo Bonzini 2411c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2412ba7888ddSSean Christopherson return 0; 2413c50d8ae3SPaolo Bonzini 24146b82ef2cSSean Christopherson restart: 24158fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 24166b82ef2cSSean Christopherson /* 24176b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 24186b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 24196b82ef2cSSean Christopherson */ 24206b82ef2cSSean Christopherson if (sp->root_count) 24216b82ef2cSSean Christopherson continue; 24226b82ef2cSSean Christopherson 24236b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 24246b82ef2cSSean Christopherson &nr_zapped); 24256b82ef2cSSean Christopherson total_zapped += nr_zapped; 24266b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2427ba7888ddSSean Christopherson break; 2428ba7888ddSSean Christopherson 24296b82ef2cSSean Christopherson if (unstable) 24306b82ef2cSSean Christopherson goto restart; 2431ba7888ddSSean Christopherson } 24326b82ef2cSSean Christopherson 24336b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 24346b82ef2cSSean Christopherson 24356b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 24366b82ef2cSSean Christopherson return total_zapped; 24376b82ef2cSSean Christopherson } 24386b82ef2cSSean Christopherson 2439afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2440afe8d7e6SSean Christopherson { 2441afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2442afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2443afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2444afe8d7e6SSean Christopherson 2445afe8d7e6SSean Christopherson return 0; 2446c50d8ae3SPaolo Bonzini } 2447c50d8ae3SPaolo Bonzini 2448ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2449ba7888ddSSean Christopherson { 24506b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2451ba7888ddSSean Christopherson 24526b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2453ba7888ddSSean Christopherson return 0; 2454ba7888ddSSean Christopherson 24556b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2456ba7888ddSSean Christopherson 24576e6ec584SSean Christopherson /* 24586e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 24596e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 24606e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 24616e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 2462c4342633SIngo Molnar * being too aggressive may unnecessarily kill the guest, and getting an 24636e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 24646e6ec584SSean Christopherson * page fault paths. 24656e6ec584SSean Christopherson */ 2466ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2467ba7888ddSSean Christopherson return -ENOSPC; 2468ba7888ddSSean Christopherson return 0; 2469ba7888ddSSean Christopherson } 2470ba7888ddSSean Christopherson 2471c50d8ae3SPaolo Bonzini /* 2472c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2473c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2474c50d8ae3SPaolo Bonzini */ 2475c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2476c50d8ae3SPaolo Bonzini { 2477531810caSBen Gardon write_lock(&kvm->mmu_lock); 2478c50d8ae3SPaolo Bonzini 2479c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 24806b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 24816b82ef2cSSean Christopherson goal_nr_mmu_pages); 2482c50d8ae3SPaolo Bonzini 2483c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2484c50d8ae3SPaolo Bonzini } 2485c50d8ae3SPaolo Bonzini 2486c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2487c50d8ae3SPaolo Bonzini 2488531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2489c50d8ae3SPaolo Bonzini } 2490c50d8ae3SPaolo Bonzini 2491c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2492c50d8ae3SPaolo Bonzini { 2493c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2494c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2495c50d8ae3SPaolo Bonzini int r; 2496c50d8ae3SPaolo Bonzini 2497c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2498c50d8ae3SPaolo Bonzini r = 0; 2499531810caSBen Gardon write_lock(&kvm->mmu_lock); 2500c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2501c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2502c50d8ae3SPaolo Bonzini sp->role.word); 2503c50d8ae3SPaolo Bonzini r = 1; 2504c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2505c50d8ae3SPaolo Bonzini } 2506c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2507531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2508c50d8ae3SPaolo Bonzini 2509c50d8ae3SPaolo Bonzini return r; 2510c50d8ae3SPaolo Bonzini } 251196ad91aeSSean Christopherson 251296ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 251396ad91aeSSean Christopherson { 251496ad91aeSSean Christopherson gpa_t gpa; 251596ad91aeSSean Christopherson int r; 251696ad91aeSSean Christopherson 251796ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 251896ad91aeSSean Christopherson return 0; 251996ad91aeSSean Christopherson 252096ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 252196ad91aeSSean Christopherson 252296ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 252396ad91aeSSean Christopherson 252496ad91aeSSean Christopherson return r; 252596ad91aeSSean Christopherson } 2526c50d8ae3SPaolo Bonzini 25274d78d0b3SBen Gardon static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 2528c50d8ae3SPaolo Bonzini { 2529c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 25304d78d0b3SBen Gardon ++kvm->stat.mmu_unsync; 2531c50d8ae3SPaolo Bonzini sp->unsync = 1; 2532c50d8ae3SPaolo Bonzini 2533c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2534c50d8ae3SPaolo Bonzini } 2535c50d8ae3SPaolo Bonzini 25360337f585SSean Christopherson /* 25370337f585SSean Christopherson * Attempt to unsync any shadow pages that can be reached by the specified gfn, 25380337f585SSean Christopherson * KVM is creating a writable mapping for said gfn. Returns 0 if all pages 25390337f585SSean Christopherson * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must 25400337f585SSean Christopherson * be write-protected. 25410337f585SSean Christopherson */ 25428283e36aSBen Gardon int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot, 25432839180cSPaolo Bonzini gfn_t gfn, bool can_unsync, bool prefetch) 2544c50d8ae3SPaolo Bonzini { 2545c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2546ce25681dSSean Christopherson bool locked = false; 2547c50d8ae3SPaolo Bonzini 25480337f585SSean Christopherson /* 25490337f585SSean Christopherson * Force write-protection if the page is being tracked. Note, the page 25500337f585SSean Christopherson * track machinery is used to write-protect upper-level shadow pages, 25510337f585SSean Christopherson * i.e. this guards the role.level == 4K assertion below! 25520337f585SSean Christopherson */ 25534d78d0b3SBen Gardon if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE)) 25540337f585SSean Christopherson return -EPERM; 2555c50d8ae3SPaolo Bonzini 25560337f585SSean Christopherson /* 25570337f585SSean Christopherson * The page is not write-tracked, mark existing shadow pages unsync 25580337f585SSean Christopherson * unless KVM is synchronizing an unsync SP (can_unsync = false). In 25590337f585SSean Christopherson * that case, KVM must complete emulation of the guest TLB flush before 25600337f585SSean Christopherson * allowing shadow pages to become unsync (writable by the guest). 25610337f585SSean Christopherson */ 25624d78d0b3SBen Gardon for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2563c50d8ae3SPaolo Bonzini if (!can_unsync) 25640337f585SSean Christopherson return -EPERM; 2565c50d8ae3SPaolo Bonzini 2566c50d8ae3SPaolo Bonzini if (sp->unsync) 2567c50d8ae3SPaolo Bonzini continue; 2568c50d8ae3SPaolo Bonzini 25692839180cSPaolo Bonzini if (prefetch) 2570f1c4a88cSLai Jiangshan return -EEXIST; 2571f1c4a88cSLai Jiangshan 2572ce25681dSSean Christopherson /* 2573ce25681dSSean Christopherson * TDP MMU page faults require an additional spinlock as they 2574ce25681dSSean Christopherson * run with mmu_lock held for read, not write, and the unsync 2575ce25681dSSean Christopherson * logic is not thread safe. Take the spinklock regardless of 2576ce25681dSSean Christopherson * the MMU type to avoid extra conditionals/parameters, there's 2577ce25681dSSean Christopherson * no meaningful penalty if mmu_lock is held for write. 2578ce25681dSSean Christopherson */ 2579ce25681dSSean Christopherson if (!locked) { 2580ce25681dSSean Christopherson locked = true; 25814d78d0b3SBen Gardon spin_lock(&kvm->arch.mmu_unsync_pages_lock); 2582ce25681dSSean Christopherson 2583ce25681dSSean Christopherson /* 2584ce25681dSSean Christopherson * Recheck after taking the spinlock, a different vCPU 2585ce25681dSSean Christopherson * may have since marked the page unsync. A false 2586ce25681dSSean Christopherson * positive on the unprotected check above is not 2587ce25681dSSean Christopherson * possible as clearing sp->unsync _must_ hold mmu_lock 2588ce25681dSSean Christopherson * for write, i.e. unsync cannot transition from 0->1 2589ce25681dSSean Christopherson * while this CPU holds mmu_lock for read (or write). 2590ce25681dSSean Christopherson */ 2591ce25681dSSean Christopherson if (READ_ONCE(sp->unsync)) 2592ce25681dSSean Christopherson continue; 2593ce25681dSSean Christopherson } 2594ce25681dSSean Christopherson 25953bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 25964d78d0b3SBen Gardon kvm_unsync_page(kvm, sp); 2597c50d8ae3SPaolo Bonzini } 2598ce25681dSSean Christopherson if (locked) 25994d78d0b3SBen Gardon spin_unlock(&kvm->arch.mmu_unsync_pages_lock); 2600c50d8ae3SPaolo Bonzini 2601c50d8ae3SPaolo Bonzini /* 2602c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2603c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2604c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2605c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2606c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2607c50d8ae3SPaolo Bonzini * following could happen: 2608c50d8ae3SPaolo Bonzini * 2609c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2610c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2611c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2612c50d8ae3SPaolo Bonzini * to be writable 2613c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2614c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2615c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2616c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2617c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2618c50d8ae3SPaolo Bonzini * fault. 2619c50d8ae3SPaolo Bonzini * 2620c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2621c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2622c50d8ae3SPaolo Bonzini * 26230337f585SSean Christopherson * 2.3 Walking of unsync pages sees sp->unsync is 26240337f585SSean Christopherson * false and skips the page. 2625c50d8ae3SPaolo Bonzini * 2626c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2627c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2628c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2629c50d8ae3SPaolo Bonzini * gets used. 2630c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2631c50d8ae3SPaolo Bonzini * as unsync 2632c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2633c50d8ae3SPaolo Bonzini * 2634c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2635264d3dc1SLai Jiangshan * the situation in 2.4 does not arise. It pairs with the read barrier 2636264d3dc1SLai Jiangshan * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3. 2637c50d8ae3SPaolo Bonzini */ 2638c50d8ae3SPaolo Bonzini smp_wmb(); 2639c50d8ae3SPaolo Bonzini 26400337f585SSean Christopherson return 0; 2641c50d8ae3SPaolo Bonzini } 2642c50d8ae3SPaolo Bonzini 26438a9f566aSDavid Matlack static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot, 26448a9f566aSDavid Matlack u64 *sptep, unsigned int pte_access, gfn_t gfn, 2645a12f4381SPaolo Bonzini kvm_pfn_t pfn, struct kvm_page_fault *fault) 2646799a4190SBen Gardon { 2647d786c778SPaolo Bonzini struct kvm_mmu_page *sp = sptep_to_sp(sptep); 2648eb5cd7ffSPaolo Bonzini int level = sp->role.level; 2649c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2650c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2651c50d8ae3SPaolo Bonzini bool flush = false; 2652ad67e480SPaolo Bonzini bool wrprot; 2653d786c778SPaolo Bonzini u64 spte; 2654c50d8ae3SPaolo Bonzini 2655a12f4381SPaolo Bonzini /* Prefetching always gets a writable pfn. */ 2656a12f4381SPaolo Bonzini bool host_writable = !fault || fault->map_writable; 26572839180cSPaolo Bonzini bool prefetch = !fault || fault->prefetch; 2658a12f4381SPaolo Bonzini bool write_fault = fault && fault->write; 2659c50d8ae3SPaolo Bonzini 2660c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2661c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2662c50d8ae3SPaolo Bonzini 2663a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2664a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2665a54aa15cSSean Christopherson return RET_PF_EMULATE; 2666a54aa15cSSean Christopherson } 2667a54aa15cSSean Christopherson 2668c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2669c50d8ae3SPaolo Bonzini /* 2670c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2671c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2672c50d8ae3SPaolo Bonzini */ 26733bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2674c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2675c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2676c50d8ae3SPaolo Bonzini 2677e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2678c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2679c50d8ae3SPaolo Bonzini flush = true; 2680c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2681c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2682c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2683c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2684c50d8ae3SPaolo Bonzini flush = true; 2685c50d8ae3SPaolo Bonzini } else 2686c50d8ae3SPaolo Bonzini was_rmapped = 1; 2687c50d8ae3SPaolo Bonzini } 2688c50d8ae3SPaolo Bonzini 26892839180cSPaolo Bonzini wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch, 26907158bee4SPaolo Bonzini true, host_writable, &spte); 2691d786c778SPaolo Bonzini 2692d786c778SPaolo Bonzini if (*sptep == spte) { 2693d786c778SPaolo Bonzini ret = RET_PF_SPURIOUS; 2694d786c778SPaolo Bonzini } else { 2695d786c778SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2696d786c778SPaolo Bonzini flush |= mmu_spte_update(sptep, spte); 2697c50d8ae3SPaolo Bonzini } 2698c50d8ae3SPaolo Bonzini 2699ad67e480SPaolo Bonzini if (wrprot) { 2700c50d8ae3SPaolo Bonzini if (write_fault) 2701c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 2702c50d8ae3SPaolo Bonzini } 2703c50d8ae3SPaolo Bonzini 2704d786c778SPaolo Bonzini if (flush) 2705c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2706c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2707c50d8ae3SPaolo Bonzini 2708c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2709c50d8ae3SPaolo Bonzini 2710c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2711d786c778SPaolo Bonzini WARN_ON_ONCE(ret == RET_PF_SPURIOUS); 271271f51d2cSMingwei Zhang kvm_update_page_stats(vcpu->kvm, level, 1); 27138a9f566aSDavid Matlack rmap_add(vcpu, slot, sptep, gfn); 2714c50d8ae3SPaolo Bonzini } 2715c50d8ae3SPaolo Bonzini 2716c50d8ae3SPaolo Bonzini return ret; 2717c50d8ae3SPaolo Bonzini } 2718c50d8ae3SPaolo Bonzini 2719c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2720c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2721c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2722c50d8ae3SPaolo Bonzini { 2723c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2724c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 27250a2b64c5SBen Gardon unsigned int access = sp->role.access; 2726c50d8ae3SPaolo Bonzini int i, ret; 2727c50d8ae3SPaolo Bonzini gfn_t gfn; 2728c50d8ae3SPaolo Bonzini 2729c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2730c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2731c50d8ae3SPaolo Bonzini if (!slot) 2732c50d8ae3SPaolo Bonzini return -1; 2733c50d8ae3SPaolo Bonzini 2734c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2735c50d8ae3SPaolo Bonzini if (ret <= 0) 2736c50d8ae3SPaolo Bonzini return -1; 2737c50d8ae3SPaolo Bonzini 2738c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 27398a9f566aSDavid Matlack mmu_set_spte(vcpu, slot, start, access, gfn, 2740a12f4381SPaolo Bonzini page_to_pfn(pages[i]), NULL); 2741c50d8ae3SPaolo Bonzini put_page(pages[i]); 2742c50d8ae3SPaolo Bonzini } 2743c50d8ae3SPaolo Bonzini 2744c50d8ae3SPaolo Bonzini return 0; 2745c50d8ae3SPaolo Bonzini } 2746c50d8ae3SPaolo Bonzini 2747c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2748c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2749c50d8ae3SPaolo Bonzini { 2750c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2751c50d8ae3SPaolo Bonzini int i; 2752c50d8ae3SPaolo Bonzini 2753c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2754c50d8ae3SPaolo Bonzini 2755c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2756c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2757c50d8ae3SPaolo Bonzini 2758c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2759c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2760c50d8ae3SPaolo Bonzini if (!start) 2761c50d8ae3SPaolo Bonzini continue; 2762c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2763c6cecc4bSSean Christopherson return; 2764c50d8ae3SPaolo Bonzini start = NULL; 2765c50d8ae3SPaolo Bonzini } else if (!start) 2766c50d8ae3SPaolo Bonzini start = spte; 2767c50d8ae3SPaolo Bonzini } 2768c6cecc4bSSean Christopherson if (start) 2769c6cecc4bSSean Christopherson direct_pte_prefetch_many(vcpu, sp, start, spte); 2770c50d8ae3SPaolo Bonzini } 2771c50d8ae3SPaolo Bonzini 2772c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2773c50d8ae3SPaolo Bonzini { 2774c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2775c50d8ae3SPaolo Bonzini 277657354682SSean Christopherson sp = sptep_to_sp(sptep); 2777c50d8ae3SPaolo Bonzini 2778c50d8ae3SPaolo Bonzini /* 2779c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2780c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2781c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2782c50d8ae3SPaolo Bonzini */ 2783c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2784c50d8ae3SPaolo Bonzini return; 2785c50d8ae3SPaolo Bonzini 27863bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2787c50d8ae3SPaolo Bonzini return; 2788c50d8ae3SPaolo Bonzini 27894a42d848SDavid Stevens /* 27904a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 27914a42d848SDavid Stevens * accidentally prefetching those addresses. 27924a42d848SDavid Stevens */ 27934a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 27944a42d848SDavid Stevens return; 27954a42d848SDavid Stevens 2796c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2797c50d8ae3SPaolo Bonzini } 2798c50d8ae3SPaolo Bonzini 27991b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 28008ca6f063SBen Gardon const struct kvm_memory_slot *slot) 2801db543216SSean Christopherson { 2802db543216SSean Christopherson unsigned long hva; 2803db543216SSean Christopherson pte_t *pte; 2804db543216SSean Christopherson int level; 2805db543216SSean Christopherson 2806e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 28073bae0459SSean Christopherson return PG_LEVEL_4K; 2808db543216SSean Christopherson 2809293e306eSSean Christopherson /* 2810293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2811293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2812293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2813293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2814293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2815293e306eSSean Christopherson * read-only memslot. 2816293e306eSSean Christopherson */ 2817db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2818db543216SSean Christopherson 28191b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2820db543216SSean Christopherson if (unlikely(!pte)) 28213bae0459SSean Christopherson return PG_LEVEL_4K; 2822db543216SSean Christopherson 2823db543216SSean Christopherson return level; 2824db543216SSean Christopherson } 2825db543216SSean Christopherson 28268ca6f063SBen Gardon int kvm_mmu_max_mapping_level(struct kvm *kvm, 28278ca6f063SBen Gardon const struct kvm_memory_slot *slot, gfn_t gfn, 28288ca6f063SBen Gardon kvm_pfn_t pfn, int max_level) 28291b6d9d9eSSean Christopherson { 28301b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 2831ec607a56SPaolo Bonzini int host_level; 28321b6d9d9eSSean Christopherson 28331b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 28341b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 28351b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 28361b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 28371b6d9d9eSSean Christopherson break; 28381b6d9d9eSSean Christopherson } 28391b6d9d9eSSean Christopherson 28401b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 28411b6d9d9eSSean Christopherson return PG_LEVEL_4K; 28421b6d9d9eSSean Christopherson 2843ec607a56SPaolo Bonzini host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot); 2844ec607a56SPaolo Bonzini return min(host_level, max_level); 28451b6d9d9eSSean Christopherson } 28461b6d9d9eSSean Christopherson 284773a3c659SPaolo Bonzini void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 28480885904dSSean Christopherson { 2849e710c5f6SDavid Matlack struct kvm_memory_slot *slot = fault->slot; 285017eff019SSean Christopherson kvm_pfn_t mask; 28510885904dSSean Christopherson 285273a3c659SPaolo Bonzini fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled; 28533cf06612SSean Christopherson 285473a3c659SPaolo Bonzini if (unlikely(fault->max_level == PG_LEVEL_4K)) 285573a3c659SPaolo Bonzini return; 285617eff019SSean Christopherson 285773a3c659SPaolo Bonzini if (is_error_noslot_pfn(fault->pfn) || kvm_is_reserved_pfn(fault->pfn)) 285873a3c659SPaolo Bonzini return; 285917eff019SSean Christopherson 2860e710c5f6SDavid Matlack if (kvm_slot_dirty_track_enabled(slot)) 286173a3c659SPaolo Bonzini return; 2862293e306eSSean Christopherson 28633cf06612SSean Christopherson /* 28643cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28653cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28663cf06612SSean Christopherson */ 286773a3c659SPaolo Bonzini fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, 286873a3c659SPaolo Bonzini fault->gfn, fault->pfn, 286973a3c659SPaolo Bonzini fault->max_level); 287073a3c659SPaolo Bonzini if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed) 287173a3c659SPaolo Bonzini return; 28724cd071d1SSean Christopherson 28730885904dSSean Christopherson /* 28744cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 28754cd071d1SSean Christopherson * the pmd can't be split from under us. 28760885904dSSean Christopherson */ 287773a3c659SPaolo Bonzini fault->goal_level = fault->req_level; 287873a3c659SPaolo Bonzini mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1; 287973a3c659SPaolo Bonzini VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask)); 288073a3c659SPaolo Bonzini fault->pfn &= ~mask; 28810885904dSSean Christopherson } 28820885904dSSean Christopherson 2883536f0e6aSPaolo Bonzini void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level) 2884c50d8ae3SPaolo Bonzini { 2885536f0e6aSPaolo Bonzini if (cur_level > PG_LEVEL_4K && 2886536f0e6aSPaolo Bonzini cur_level == fault->goal_level && 2887c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2888c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2889c50d8ae3SPaolo Bonzini /* 2890c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2891c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2892c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2893c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2894c50d8ae3SPaolo Bonzini * the address. 2895c50d8ae3SPaolo Bonzini */ 2896536f0e6aSPaolo Bonzini u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) - 2897536f0e6aSPaolo Bonzini KVM_PAGES_PER_HPAGE(cur_level - 1); 2898536f0e6aSPaolo Bonzini fault->pfn |= fault->gfn & page_mask; 2899536f0e6aSPaolo Bonzini fault->goal_level--; 2900c50d8ae3SPaolo Bonzini } 2901c50d8ae3SPaolo Bonzini } 2902c50d8ae3SPaolo Bonzini 290343b74355SPaolo Bonzini static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 2904c50d8ae3SPaolo Bonzini { 2905c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2906c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 290773a3c659SPaolo Bonzini int ret; 290843b74355SPaolo Bonzini gfn_t base_gfn = fault->gfn; 2909c50d8ae3SPaolo Bonzini 291073a3c659SPaolo Bonzini kvm_mmu_hugepage_adjust(vcpu, fault); 29114cd071d1SSean Christopherson 2912f0066d94SPaolo Bonzini trace_kvm_mmu_spte_requested(fault); 291343b74355SPaolo Bonzini for_each_shadow_entry(vcpu, fault->addr, it) { 2914c50d8ae3SPaolo Bonzini /* 2915c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2916c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2917c50d8ae3SPaolo Bonzini */ 291873a3c659SPaolo Bonzini if (fault->nx_huge_page_workaround_enabled) 2919536f0e6aSPaolo Bonzini disallowed_hugepage_adjust(fault, *it.sptep, it.level); 2920c50d8ae3SPaolo Bonzini 292143b74355SPaolo Bonzini base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 292273a3c659SPaolo Bonzini if (it.level == fault->goal_level) 2923c50d8ae3SPaolo Bonzini break; 2924c50d8ae3SPaolo Bonzini 2925c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 292603fffc54SSean Christopherson if (is_shadow_present_pte(*it.sptep)) 292703fffc54SSean Christopherson continue; 292803fffc54SSean Christopherson 2929c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2930c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2931c50d8ae3SPaolo Bonzini 2932c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 293373a3c659SPaolo Bonzini if (fault->is_tdp && fault->huge_page_disallowed && 293473a3c659SPaolo Bonzini fault->req_level >= it.level) 2935c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2936c50d8ae3SPaolo Bonzini } 2937c50d8ae3SPaolo Bonzini 2938b1a429fbSSean Christopherson if (WARN_ON_ONCE(it.level != fault->goal_level)) 2939b1a429fbSSean Christopherson return -EFAULT; 2940b1a429fbSSean Christopherson 29418a9f566aSDavid Matlack ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL, 2942a12f4381SPaolo Bonzini base_gfn, fault->pfn, fault); 294312703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 294412703759SSean Christopherson return ret; 294512703759SSean Christopherson 2946c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2947c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2948c50d8ae3SPaolo Bonzini return ret; 2949c50d8ae3SPaolo Bonzini } 2950c50d8ae3SPaolo Bonzini 2951c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2952c50d8ae3SPaolo Bonzini { 2953c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2954c50d8ae3SPaolo Bonzini } 2955c50d8ae3SPaolo Bonzini 2956c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2957c50d8ae3SPaolo Bonzini { 2958c50d8ae3SPaolo Bonzini /* 2959c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2960c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2961c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2962c50d8ae3SPaolo Bonzini */ 2963c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2964c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 2965c50d8ae3SPaolo Bonzini 2966c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 2967c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 2968c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2969c50d8ae3SPaolo Bonzini } 2970c50d8ae3SPaolo Bonzini 2971c50d8ae3SPaolo Bonzini return -EFAULT; 2972c50d8ae3SPaolo Bonzini } 2973c50d8ae3SPaolo Bonzini 29743a13f4feSPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, 29753a13f4feSPaolo Bonzini unsigned int access, int *ret_val) 2976c50d8ae3SPaolo Bonzini { 2977c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 29783a13f4feSPaolo Bonzini if (unlikely(is_error_pfn(fault->pfn))) { 29793a13f4feSPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn); 2980c50d8ae3SPaolo Bonzini return true; 2981c50d8ae3SPaolo Bonzini } 2982c50d8ae3SPaolo Bonzini 2983e710c5f6SDavid Matlack if (unlikely(!fault->slot)) { 29843a13f4feSPaolo Bonzini gva_t gva = fault->is_tdp ? 0 : fault->addr; 29853a13f4feSPaolo Bonzini 29863a13f4feSPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, fault->gfn, 2987c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 298830ab5901SSean Christopherson /* 298930ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 299030ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 299130ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 299230ab5901SSean Christopherson */ 299330ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 299430ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 299530ab5901SSean Christopherson return true; 299630ab5901SSean Christopherson } 299730ab5901SSean Christopherson } 2998c50d8ae3SPaolo Bonzini 2999c50d8ae3SPaolo Bonzini return false; 3000c50d8ae3SPaolo Bonzini } 3001c50d8ae3SPaolo Bonzini 30023c8ad5a6SPaolo Bonzini static bool page_fault_can_be_fast(struct kvm_page_fault *fault) 3003c50d8ae3SPaolo Bonzini { 3004c50d8ae3SPaolo Bonzini /* 3005c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3006c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3007c50d8ae3SPaolo Bonzini */ 30083c8ad5a6SPaolo Bonzini if (fault->rsvd) 3009c50d8ae3SPaolo Bonzini return false; 3010c50d8ae3SPaolo Bonzini 3011c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 30123c8ad5a6SPaolo Bonzini if (unlikely(fault->exec && fault->present)) 3013c50d8ae3SPaolo Bonzini return false; 3014c50d8ae3SPaolo Bonzini 3015c50d8ae3SPaolo Bonzini /* 3016c50d8ae3SPaolo Bonzini * #PF can be fast if: 3017c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3018c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3019c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3020c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3021c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3022c50d8ae3SPaolo Bonzini * 3023c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3024c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3025c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3026c50d8ae3SPaolo Bonzini * accesses to a present page. 3027c50d8ae3SPaolo Bonzini */ 3028c50d8ae3SPaolo Bonzini 30293c8ad5a6SPaolo Bonzini return shadow_acc_track_mask != 0 || (fault->write && fault->present); 3030c50d8ae3SPaolo Bonzini } 3031c50d8ae3SPaolo Bonzini 3032c50d8ae3SPaolo Bonzini /* 3033c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3034c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3035c50d8ae3SPaolo Bonzini */ 3036c50d8ae3SPaolo Bonzini static bool 3037e710c5f6SDavid Matlack fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, 3038c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3039c50d8ae3SPaolo Bonzini { 3040c50d8ae3SPaolo Bonzini /* 3041c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3042c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3043c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3044c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3045c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3046c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3047c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3048c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3049c50d8ae3SPaolo Bonzini * 3050c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3051c50d8ae3SPaolo Bonzini */ 3052c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3053c50d8ae3SPaolo Bonzini return false; 3054c50d8ae3SPaolo Bonzini 3055e710c5f6SDavid Matlack if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) 3056e710c5f6SDavid Matlack mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn); 3057c50d8ae3SPaolo Bonzini 3058c50d8ae3SPaolo Bonzini return true; 3059c50d8ae3SPaolo Bonzini } 3060c50d8ae3SPaolo Bonzini 30613c8ad5a6SPaolo Bonzini static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte) 3062c50d8ae3SPaolo Bonzini { 30633c8ad5a6SPaolo Bonzini if (fault->exec) 3064c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3065c50d8ae3SPaolo Bonzini 30663c8ad5a6SPaolo Bonzini if (fault->write) 3067c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3068c50d8ae3SPaolo Bonzini 3069c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3070c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3071c50d8ae3SPaolo Bonzini } 3072c50d8ae3SPaolo Bonzini 3073c50d8ae3SPaolo Bonzini /* 30746e8eb206SDavid Matlack * Returns the last level spte pointer of the shadow page walk for the given 30756e8eb206SDavid Matlack * gpa, and sets *spte to the spte value. This spte may be non-preset. If no 30766e8eb206SDavid Matlack * walk could be performed, returns NULL and *spte does not contain valid data. 30776e8eb206SDavid Matlack * 30786e8eb206SDavid Matlack * Contract: 30796e8eb206SDavid Matlack * - Must be called between walk_shadow_page_lockless_{begin,end}. 30806e8eb206SDavid Matlack * - The returned sptep must not be used after walk_shadow_page_lockless_end. 30816e8eb206SDavid Matlack */ 30826e8eb206SDavid Matlack static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte) 30836e8eb206SDavid Matlack { 30846e8eb206SDavid Matlack struct kvm_shadow_walk_iterator iterator; 30856e8eb206SDavid Matlack u64 old_spte; 30866e8eb206SDavid Matlack u64 *sptep = NULL; 30876e8eb206SDavid Matlack 30886e8eb206SDavid Matlack for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) { 30896e8eb206SDavid Matlack sptep = iterator.sptep; 30906e8eb206SDavid Matlack *spte = old_spte; 30916e8eb206SDavid Matlack } 30926e8eb206SDavid Matlack 30936e8eb206SDavid Matlack return sptep; 30946e8eb206SDavid Matlack } 30956e8eb206SDavid Matlack 30966e8eb206SDavid Matlack /* 3097c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3098c50d8ae3SPaolo Bonzini */ 30993c8ad5a6SPaolo Bonzini static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 3100c50d8ae3SPaolo Bonzini { 3101c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3102c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3103c50d8ae3SPaolo Bonzini u64 spte = 0ull; 31046e8eb206SDavid Matlack u64 *sptep = NULL; 3105c50d8ae3SPaolo Bonzini uint retry_count = 0; 3106c50d8ae3SPaolo Bonzini 31073c8ad5a6SPaolo Bonzini if (!page_fault_can_be_fast(fault)) 3108c4371c2aSSean Christopherson return ret; 3109c50d8ae3SPaolo Bonzini 3110c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3111c50d8ae3SPaolo Bonzini 3112c50d8ae3SPaolo Bonzini do { 3113c50d8ae3SPaolo Bonzini u64 new_spte; 3114c50d8ae3SPaolo Bonzini 31156e8eb206SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 31163c8ad5a6SPaolo Bonzini sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte); 31176e8eb206SDavid Matlack else 31183c8ad5a6SPaolo Bonzini sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); 3119c50d8ae3SPaolo Bonzini 3120ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3121ec89e643SSean Christopherson break; 3122ec89e643SSean Christopherson 31236e8eb206SDavid Matlack sp = sptep_to_sp(sptep); 3124c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3125c50d8ae3SPaolo Bonzini break; 3126c50d8ae3SPaolo Bonzini 3127c50d8ae3SPaolo Bonzini /* 3128c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3129c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3130c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3131c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3132c50d8ae3SPaolo Bonzini * current CPU took the fault. 3133c50d8ae3SPaolo Bonzini * 3134c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3135c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3136c50d8ae3SPaolo Bonzini */ 31373c8ad5a6SPaolo Bonzini if (is_access_allowed(fault, spte)) { 3138c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3139c50d8ae3SPaolo Bonzini break; 3140c50d8ae3SPaolo Bonzini } 3141c50d8ae3SPaolo Bonzini 3142c50d8ae3SPaolo Bonzini new_spte = spte; 3143c50d8ae3SPaolo Bonzini 3144c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3145c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3146c50d8ae3SPaolo Bonzini 3147c50d8ae3SPaolo Bonzini /* 3148c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3149c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3150c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3151c50d8ae3SPaolo Bonzini */ 31523c8ad5a6SPaolo Bonzini if (fault->write && 3153e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3154c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3155c50d8ae3SPaolo Bonzini 3156c50d8ae3SPaolo Bonzini /* 315710c30de0SJunaid Shahid * Do not fix write-permission on the large spte when 315810c30de0SJunaid Shahid * dirty logging is enabled. Since we only dirty the 315910c30de0SJunaid Shahid * first page into the dirty-bitmap in 3160c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3161c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3162c50d8ae3SPaolo Bonzini * 3163c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3164c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3165c50d8ae3SPaolo Bonzini */ 316610c30de0SJunaid Shahid if (sp->role.level > PG_LEVEL_4K && 316710c30de0SJunaid Shahid kvm_slot_dirty_track_enabled(fault->slot)) 3168c50d8ae3SPaolo Bonzini break; 3169c50d8ae3SPaolo Bonzini } 3170c50d8ae3SPaolo Bonzini 3171c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3172c50d8ae3SPaolo Bonzini if (new_spte == spte || 31733c8ad5a6SPaolo Bonzini !is_access_allowed(fault, new_spte)) 3174c50d8ae3SPaolo Bonzini break; 3175c50d8ae3SPaolo Bonzini 3176c50d8ae3SPaolo Bonzini /* 3177c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3178c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 31793ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3180c50d8ae3SPaolo Bonzini */ 3181e710c5f6SDavid Matlack if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) { 3182c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3183c50d8ae3SPaolo Bonzini break; 3184c4371c2aSSean Christopherson } 3185c50d8ae3SPaolo Bonzini 3186c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3187c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3188c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3189c50d8ae3SPaolo Bonzini break; 3190c50d8ae3SPaolo Bonzini } 3191c50d8ae3SPaolo Bonzini 3192c50d8ae3SPaolo Bonzini } while (true); 3193c50d8ae3SPaolo Bonzini 3194f0066d94SPaolo Bonzini trace_fast_page_fault(vcpu, fault, sptep, spte, ret); 3195c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3196c50d8ae3SPaolo Bonzini 3197c4371c2aSSean Christopherson return ret; 3198c50d8ae3SPaolo Bonzini } 3199c50d8ae3SPaolo Bonzini 3200c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3201c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3202c50d8ae3SPaolo Bonzini { 3203c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3204c50d8ae3SPaolo Bonzini 3205c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3206c50d8ae3SPaolo Bonzini return; 3207c50d8ae3SPaolo Bonzini 3208e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 32099191b8f0SPaolo Bonzini if (WARN_ON(!sp)) 32109191b8f0SPaolo Bonzini return; 321102c00b3aSBen Gardon 3212897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 32136103bc07SBen Gardon kvm_tdp_mmu_put_root(kvm, sp, false); 321476eb54e7SBen Gardon else if (!--sp->root_count && sp->role.invalid) 3215c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3216c50d8ae3SPaolo Bonzini 3217c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3218c50d8ae3SPaolo Bonzini } 3219c50d8ae3SPaolo Bonzini 3220c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3221c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3222c50d8ae3SPaolo Bonzini ulong roots_to_free) 3223c50d8ae3SPaolo Bonzini { 32244d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3225c50d8ae3SPaolo Bonzini int i; 3226c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3227c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3228c50d8ae3SPaolo Bonzini 3229c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3230c50d8ae3SPaolo Bonzini 3231c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3232*b9e5603cSPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root.hpa))) { 3233c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3234c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3235c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3236c50d8ae3SPaolo Bonzini break; 3237c50d8ae3SPaolo Bonzini 3238c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3239c50d8ae3SPaolo Bonzini return; 3240c50d8ae3SPaolo Bonzini } 3241c50d8ae3SPaolo Bonzini 3242531810caSBen Gardon write_lock(&kvm->mmu_lock); 3243c50d8ae3SPaolo Bonzini 3244c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3245c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 32464d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3247c50d8ae3SPaolo Bonzini &invalid_list); 3248c50d8ae3SPaolo Bonzini 3249c50d8ae3SPaolo Bonzini if (free_active_root) { 3250c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3251c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 3252*b9e5603cSPaolo Bonzini mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list); 325304d45551SSean Christopherson } else if (mmu->pae_root) { 3254c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3255c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3256c834e5e4SSean Christopherson continue; 3257c834e5e4SSean Christopherson 3258c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3259c50d8ae3SPaolo Bonzini &invalid_list); 3260c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3261c50d8ae3SPaolo Bonzini } 3262c50d8ae3SPaolo Bonzini } 3263*b9e5603cSPaolo Bonzini mmu->root.hpa = INVALID_PAGE; 3264*b9e5603cSPaolo Bonzini mmu->root.pgd = 0; 3265c50d8ae3SPaolo Bonzini } 3266c50d8ae3SPaolo Bonzini 32674d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3268531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3269c50d8ae3SPaolo Bonzini } 3270c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3271c50d8ae3SPaolo Bonzini 327225b62c62SSean Christopherson void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 327325b62c62SSean Christopherson { 327425b62c62SSean Christopherson unsigned long roots_to_free = 0; 327525b62c62SSean Christopherson hpa_t root_hpa; 327625b62c62SSean Christopherson int i; 327725b62c62SSean Christopherson 327825b62c62SSean Christopherson /* 327925b62c62SSean Christopherson * This should not be called while L2 is active, L2 can't invalidate 328025b62c62SSean Christopherson * _only_ its own roots, e.g. INVVPID unconditionally exits. 328125b62c62SSean Christopherson */ 328225b62c62SSean Christopherson WARN_ON_ONCE(mmu->mmu_role.base.guest_mode); 328325b62c62SSean Christopherson 328425b62c62SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 328525b62c62SSean Christopherson root_hpa = mmu->prev_roots[i].hpa; 328625b62c62SSean Christopherson if (!VALID_PAGE(root_hpa)) 328725b62c62SSean Christopherson continue; 328825b62c62SSean Christopherson 328925b62c62SSean Christopherson if (!to_shadow_page(root_hpa) || 329025b62c62SSean Christopherson to_shadow_page(root_hpa)->role.guest_mode) 329125b62c62SSean Christopherson roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 329225b62c62SSean Christopherson } 329325b62c62SSean Christopherson 329425b62c62SSean Christopherson kvm_mmu_free_roots(vcpu, mmu, roots_to_free); 329525b62c62SSean Christopherson } 329625b62c62SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots); 329725b62c62SSean Christopherson 329825b62c62SSean Christopherson 3299c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3300c50d8ae3SPaolo Bonzini { 3301c50d8ae3SPaolo Bonzini int ret = 0; 3302c50d8ae3SPaolo Bonzini 3303995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3304c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3305c50d8ae3SPaolo Bonzini ret = 1; 3306c50d8ae3SPaolo Bonzini } 3307c50d8ae3SPaolo Bonzini 3308c50d8ae3SPaolo Bonzini return ret; 3309c50d8ae3SPaolo Bonzini } 3310c50d8ae3SPaolo Bonzini 33118123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 33128123f265SSean Christopherson u8 level, bool direct) 3313c50d8ae3SPaolo Bonzini { 3314c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 33158123f265SSean Christopherson 33168123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 33178123f265SSean Christopherson ++sp->root_count; 33188123f265SSean Christopherson 33198123f265SSean Christopherson return __pa(sp->spt); 33208123f265SSean Christopherson } 33218123f265SSean Christopherson 33228123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 33238123f265SSean Christopherson { 3324b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3325b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 33268123f265SSean Christopherson hpa_t root; 3327c50d8ae3SPaolo Bonzini unsigned i; 33284a38162eSPaolo Bonzini int r; 33294a38162eSPaolo Bonzini 33304a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 33314a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 33324a38162eSPaolo Bonzini if (r < 0) 33334a38162eSPaolo Bonzini goto out_unlock; 3334c50d8ae3SPaolo Bonzini 3335897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 333602c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3337*b9e5603cSPaolo Bonzini mmu->root.hpa = root; 333802c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 33396e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3340*b9e5603cSPaolo Bonzini mmu->root.hpa = root; 33418123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 33424a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 33434a38162eSPaolo Bonzini r = -EIO; 33444a38162eSPaolo Bonzini goto out_unlock; 33454a38162eSPaolo Bonzini } 334673ad1606SSean Christopherson 3347c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3348c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3349c50d8ae3SPaolo Bonzini 33508123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 33518123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 335217e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 335317e368d9SSean Christopherson shadow_me_mask; 3354c50d8ae3SPaolo Bonzini } 3355*b9e5603cSPaolo Bonzini mmu->root.hpa = __pa(mmu->pae_root); 335673ad1606SSean Christopherson } else { 335773ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 33584a38162eSPaolo Bonzini r = -EIO; 33594a38162eSPaolo Bonzini goto out_unlock; 336073ad1606SSean Christopherson } 33613651c7fcSSean Christopherson 3362*b9e5603cSPaolo Bonzini /* root.pgd is ignored for direct MMUs. */ 3363*b9e5603cSPaolo Bonzini mmu->root.pgd = 0; 33644a38162eSPaolo Bonzini out_unlock: 33654a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 33664a38162eSPaolo Bonzini return r; 3367c50d8ae3SPaolo Bonzini } 3368c50d8ae3SPaolo Bonzini 33691e76a3ceSDavid Stevens static int mmu_first_shadow_root_alloc(struct kvm *kvm) 33701e76a3ceSDavid Stevens { 33711e76a3ceSDavid Stevens struct kvm_memslots *slots; 33721e76a3ceSDavid Stevens struct kvm_memory_slot *slot; 3373a54d8066SMaciej S. Szmigiero int r = 0, i, bkt; 33741e76a3ceSDavid Stevens 33751e76a3ceSDavid Stevens /* 33761e76a3ceSDavid Stevens * Check if this is the first shadow root being allocated before 33771e76a3ceSDavid Stevens * taking the lock. 33781e76a3ceSDavid Stevens */ 33791e76a3ceSDavid Stevens if (kvm_shadow_root_allocated(kvm)) 33801e76a3ceSDavid Stevens return 0; 33811e76a3ceSDavid Stevens 33821e76a3ceSDavid Stevens mutex_lock(&kvm->slots_arch_lock); 33831e76a3ceSDavid Stevens 33841e76a3ceSDavid Stevens /* Recheck, under the lock, whether this is the first shadow root. */ 33851e76a3ceSDavid Stevens if (kvm_shadow_root_allocated(kvm)) 33861e76a3ceSDavid Stevens goto out_unlock; 33871e76a3ceSDavid Stevens 33881e76a3ceSDavid Stevens /* 33891e76a3ceSDavid Stevens * Check if anything actually needs to be allocated, e.g. all metadata 33901e76a3ceSDavid Stevens * will be allocated upfront if TDP is disabled. 33911e76a3ceSDavid Stevens */ 33921e76a3ceSDavid Stevens if (kvm_memslots_have_rmaps(kvm) && 33931e76a3ceSDavid Stevens kvm_page_track_write_tracking_enabled(kvm)) 33941e76a3ceSDavid Stevens goto out_success; 33951e76a3ceSDavid Stevens 33961e76a3ceSDavid Stevens for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 33971e76a3ceSDavid Stevens slots = __kvm_memslots(kvm, i); 3398a54d8066SMaciej S. Szmigiero kvm_for_each_memslot(slot, bkt, slots) { 33991e76a3ceSDavid Stevens /* 34001e76a3ceSDavid Stevens * Both of these functions are no-ops if the target is 34011e76a3ceSDavid Stevens * already allocated, so unconditionally calling both 34021e76a3ceSDavid Stevens * is safe. Intentionally do NOT free allocations on 34031e76a3ceSDavid Stevens * failure to avoid having to track which allocations 34041e76a3ceSDavid Stevens * were made now versus when the memslot was created. 34051e76a3ceSDavid Stevens * The metadata is guaranteed to be freed when the slot 34061e76a3ceSDavid Stevens * is freed, and will be kept/used if userspace retries 34071e76a3ceSDavid Stevens * KVM_RUN instead of killing the VM. 34081e76a3ceSDavid Stevens */ 34091e76a3ceSDavid Stevens r = memslot_rmap_alloc(slot, slot->npages); 34101e76a3ceSDavid Stevens if (r) 34111e76a3ceSDavid Stevens goto out_unlock; 34121e76a3ceSDavid Stevens r = kvm_page_track_write_tracking_alloc(slot); 34131e76a3ceSDavid Stevens if (r) 34141e76a3ceSDavid Stevens goto out_unlock; 34151e76a3ceSDavid Stevens } 34161e76a3ceSDavid Stevens } 34171e76a3ceSDavid Stevens 34181e76a3ceSDavid Stevens /* 34191e76a3ceSDavid Stevens * Ensure that shadow_root_allocated becomes true strictly after 34201e76a3ceSDavid Stevens * all the related pointers are set. 34211e76a3ceSDavid Stevens */ 34221e76a3ceSDavid Stevens out_success: 34231e76a3ceSDavid Stevens smp_store_release(&kvm->arch.shadow_root_allocated, true); 34241e76a3ceSDavid Stevens 34251e76a3ceSDavid Stevens out_unlock: 34261e76a3ceSDavid Stevens mutex_unlock(&kvm->slots_arch_lock); 34271e76a3ceSDavid Stevens return r; 34281e76a3ceSDavid Stevens } 34291e76a3ceSDavid Stevens 3430c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3431c50d8ae3SPaolo Bonzini { 3432b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 34336e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3434be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 34358123f265SSean Christopherson hpa_t root; 34364a38162eSPaolo Bonzini unsigned i; 34374a38162eSPaolo Bonzini int r; 3438c50d8ae3SPaolo Bonzini 3439b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3440be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3441c50d8ae3SPaolo Bonzini 3442c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3443c50d8ae3SPaolo Bonzini return 1; 3444c50d8ae3SPaolo Bonzini 3445c50d8ae3SPaolo Bonzini /* 34464a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 34474a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 34484a38162eSPaolo Bonzini */ 34496e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34506e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 34516e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 34526e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 34536e0918aeSSean Christopherson continue; 34546e0918aeSSean Christopherson 34556e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 34566e0918aeSSean Christopherson return 1; 34576e0918aeSSean Christopherson } 34586e0918aeSSean Christopherson } 34596e0918aeSSean Christopherson 34601e76a3ceSDavid Stevens r = mmu_first_shadow_root_alloc(vcpu->kvm); 3461d501f747SBen Gardon if (r) 3462d501f747SBen Gardon return r; 3463d501f747SBen Gardon 34644a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 34654a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 34664a38162eSPaolo Bonzini if (r < 0) 34674a38162eSPaolo Bonzini goto out_unlock; 34684a38162eSPaolo Bonzini 3469c50d8ae3SPaolo Bonzini /* 3470c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3471c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3472c50d8ae3SPaolo Bonzini */ 3473b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 34748123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3475b37233c9SSean Christopherson mmu->shadow_root_level, false); 3476*b9e5603cSPaolo Bonzini mmu->root.hpa = root; 3477be01e8e2SSean Christopherson goto set_root_pgd; 3478c50d8ae3SPaolo Bonzini } 3479c50d8ae3SPaolo Bonzini 34804a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 34814a38162eSPaolo Bonzini r = -EIO; 34824a38162eSPaolo Bonzini goto out_unlock; 34834a38162eSPaolo Bonzini } 348473ad1606SSean Christopherson 3485c50d8ae3SPaolo Bonzini /* 3486c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3487c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3488c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3489c50d8ae3SPaolo Bonzini */ 349017e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3491cb0f722aSWei Huang if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL) { 3492c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3493c50d8ae3SPaolo Bonzini 349403ca4589SSean Christopherson if (WARN_ON_ONCE(!mmu->pml4_root)) { 34954a38162eSPaolo Bonzini r = -EIO; 34964a38162eSPaolo Bonzini goto out_unlock; 34974a38162eSPaolo Bonzini } 349803ca4589SSean Christopherson mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; 3499cb0f722aSWei Huang 3500cb0f722aSWei Huang if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) { 3501cb0f722aSWei Huang if (WARN_ON_ONCE(!mmu->pml5_root)) { 3502cb0f722aSWei Huang r = -EIO; 3503cb0f722aSWei Huang goto out_unlock; 3504cb0f722aSWei Huang } 3505cb0f722aSWei Huang mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask; 3506cb0f722aSWei Huang } 350704d45551SSean Christopherson } 350804d45551SSean Christopherson 3509c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3510c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 35116e6ec584SSean Christopherson 3512b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 35136e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3514c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3515c50d8ae3SPaolo Bonzini continue; 3516c50d8ae3SPaolo Bonzini } 35176e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3518c50d8ae3SPaolo Bonzini } 3519c50d8ae3SPaolo Bonzini 35208123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 35218123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3522b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3523c50d8ae3SPaolo Bonzini } 3524c50d8ae3SPaolo Bonzini 3525cb0f722aSWei Huang if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) 3526*b9e5603cSPaolo Bonzini mmu->root.hpa = __pa(mmu->pml5_root); 3527cb0f722aSWei Huang else if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 3528*b9e5603cSPaolo Bonzini mmu->root.hpa = __pa(mmu->pml4_root); 3529ba0a194fSSean Christopherson else 3530*b9e5603cSPaolo Bonzini mmu->root.hpa = __pa(mmu->pae_root); 3531c50d8ae3SPaolo Bonzini 3532be01e8e2SSean Christopherson set_root_pgd: 3533*b9e5603cSPaolo Bonzini mmu->root.pgd = root_pgd; 35344a38162eSPaolo Bonzini out_unlock: 35354a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3536c50d8ae3SPaolo Bonzini 3537c50d8ae3SPaolo Bonzini return 0; 3538c50d8ae3SPaolo Bonzini } 3539c50d8ae3SPaolo Bonzini 3540748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3541c50d8ae3SPaolo Bonzini { 3542748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3543a717a780SSean Christopherson bool need_pml5 = mmu->shadow_root_level > PT64_ROOT_4LEVEL; 3544cb0f722aSWei Huang u64 *pml5_root = NULL; 3545cb0f722aSWei Huang u64 *pml4_root = NULL; 3546cb0f722aSWei Huang u64 *pae_root; 3547748e52b9SSean Christopherson 3548748e52b9SSean Christopherson /* 3549748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3550748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3551748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3552748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3553748e52b9SSean Christopherson */ 3554748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3555748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3556748e52b9SSean Christopherson return 0; 3557748e52b9SSean Christopherson 3558a717a780SSean Christopherson /* 3559a717a780SSean Christopherson * NPT, the only paging mode that uses this horror, uses a fixed number 3560a717a780SSean Christopherson * of levels for the shadow page tables, e.g. all MMUs are 4-level or 3561a717a780SSean Christopherson * all MMus are 5-level. Thus, this can safely require that pml5_root 3562a717a780SSean Christopherson * is allocated if the other roots are valid and pml5 is needed, as any 3563a717a780SSean Christopherson * prior MMU would also have required pml5. 3564a717a780SSean Christopherson */ 3565a717a780SSean Christopherson if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root)) 3566748e52b9SSean Christopherson return 0; 3567748e52b9SSean Christopherson 3568748e52b9SSean Christopherson /* 3569748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3570748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3571748e52b9SSean Christopherson */ 3572cb0f722aSWei Huang if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root || 3573a717a780SSean Christopherson (need_pml5 && mmu->pml5_root))) 3574748e52b9SSean Christopherson return -EIO; 3575748e52b9SSean Christopherson 35764a98623dSSean Christopherson /* 35774a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 35784a98623dSSean Christopherson * doesn't need to be decrypted. 35794a98623dSSean Christopherson */ 3580748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3581748e52b9SSean Christopherson if (!pae_root) 3582748e52b9SSean Christopherson return -ENOMEM; 3583748e52b9SSean Christopherson 3584cb0f722aSWei Huang #ifdef CONFIG_X86_64 358503ca4589SSean Christopherson pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3586cb0f722aSWei Huang if (!pml4_root) 3587cb0f722aSWei Huang goto err_pml4; 3588cb0f722aSWei Huang 3589a717a780SSean Christopherson if (need_pml5) { 3590cb0f722aSWei Huang pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3591cb0f722aSWei Huang if (!pml5_root) 3592cb0f722aSWei Huang goto err_pml5; 3593748e52b9SSean Christopherson } 3594cb0f722aSWei Huang #endif 3595748e52b9SSean Christopherson 3596748e52b9SSean Christopherson mmu->pae_root = pae_root; 359703ca4589SSean Christopherson mmu->pml4_root = pml4_root; 3598cb0f722aSWei Huang mmu->pml5_root = pml5_root; 3599748e52b9SSean Christopherson 3600748e52b9SSean Christopherson return 0; 3601cb0f722aSWei Huang 3602cb0f722aSWei Huang #ifdef CONFIG_X86_64 3603cb0f722aSWei Huang err_pml5: 3604cb0f722aSWei Huang free_page((unsigned long)pml4_root); 3605cb0f722aSWei Huang err_pml4: 3606cb0f722aSWei Huang free_page((unsigned long)pae_root); 3607cb0f722aSWei Huang return -ENOMEM; 3608cb0f722aSWei Huang #endif 3609c50d8ae3SPaolo Bonzini } 3610c50d8ae3SPaolo Bonzini 3611264d3dc1SLai Jiangshan static bool is_unsync_root(hpa_t root) 3612264d3dc1SLai Jiangshan { 3613264d3dc1SLai Jiangshan struct kvm_mmu_page *sp; 3614264d3dc1SLai Jiangshan 361561b05a9fSLai Jiangshan if (!VALID_PAGE(root)) 361661b05a9fSLai Jiangshan return false; 361761b05a9fSLai Jiangshan 3618264d3dc1SLai Jiangshan /* 3619264d3dc1SLai Jiangshan * The read barrier orders the CPU's read of SPTE.W during the page table 3620264d3dc1SLai Jiangshan * walk before the reads of sp->unsync/sp->unsync_children here. 3621264d3dc1SLai Jiangshan * 3622264d3dc1SLai Jiangshan * Even if another CPU was marking the SP as unsync-ed simultaneously, 3623264d3dc1SLai Jiangshan * any guest page table changes are not guaranteed to be visible anyway 3624264d3dc1SLai Jiangshan * until this VCPU issues a TLB flush strictly after those changes are 3625264d3dc1SLai Jiangshan * made. We only need to ensure that the other CPU sets these flags 3626264d3dc1SLai Jiangshan * before any actual changes to the page tables are made. The comments 3627264d3dc1SLai Jiangshan * in mmu_try_to_unsync_pages() describe what could go wrong if this 3628264d3dc1SLai Jiangshan * requirement isn't satisfied. 3629264d3dc1SLai Jiangshan */ 3630264d3dc1SLai Jiangshan smp_rmb(); 3631264d3dc1SLai Jiangshan sp = to_shadow_page(root); 3632264d3dc1SLai Jiangshan if (sp->unsync || sp->unsync_children) 3633264d3dc1SLai Jiangshan return true; 3634264d3dc1SLai Jiangshan 3635264d3dc1SLai Jiangshan return false; 3636264d3dc1SLai Jiangshan } 3637264d3dc1SLai Jiangshan 3638c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3639c50d8ae3SPaolo Bonzini { 3640c50d8ae3SPaolo Bonzini int i; 3641c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3642c50d8ae3SPaolo Bonzini 3643c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3644c50d8ae3SPaolo Bonzini return; 3645c50d8ae3SPaolo Bonzini 3646*b9e5603cSPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root.hpa)) 3647c50d8ae3SPaolo Bonzini return; 3648c50d8ae3SPaolo Bonzini 3649c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3650c50d8ae3SPaolo Bonzini 3651c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3652*b9e5603cSPaolo Bonzini hpa_t root = vcpu->arch.mmu->root.hpa; 3653e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3654c50d8ae3SPaolo Bonzini 3655264d3dc1SLai Jiangshan if (!is_unsync_root(root)) 3656c50d8ae3SPaolo Bonzini return; 3657c50d8ae3SPaolo Bonzini 3658531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 365965855ed8SLai Jiangshan mmu_sync_children(vcpu, sp, true); 3660531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3661c50d8ae3SPaolo Bonzini return; 3662c50d8ae3SPaolo Bonzini } 3663c50d8ae3SPaolo Bonzini 3664531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3665c50d8ae3SPaolo Bonzini 3666c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3667c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3668c50d8ae3SPaolo Bonzini 3669c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3670c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3671e47c4aeeSSean Christopherson sp = to_shadow_page(root); 367265855ed8SLai Jiangshan mmu_sync_children(vcpu, sp, true); 3673c50d8ae3SPaolo Bonzini } 3674c50d8ae3SPaolo Bonzini } 3675c50d8ae3SPaolo Bonzini 3676531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3677c50d8ae3SPaolo Bonzini } 3678c50d8ae3SPaolo Bonzini 367961b05a9fSLai Jiangshan void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu) 368061b05a9fSLai Jiangshan { 368161b05a9fSLai Jiangshan unsigned long roots_to_free = 0; 368261b05a9fSLai Jiangshan int i; 368361b05a9fSLai Jiangshan 368461b05a9fSLai Jiangshan for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 368561b05a9fSLai Jiangshan if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa)) 368661b05a9fSLai Jiangshan roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 368761b05a9fSLai Jiangshan 368861b05a9fSLai Jiangshan /* sync prev_roots by simply freeing them */ 368961b05a9fSLai Jiangshan kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free); 369061b05a9fSLai Jiangshan } 369161b05a9fSLai Jiangshan 36921f5a21eeSLai Jiangshan static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 36931f5a21eeSLai Jiangshan gpa_t vaddr, u32 access, 3694c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3695c50d8ae3SPaolo Bonzini { 3696c50d8ae3SPaolo Bonzini if (exception) 3697c50d8ae3SPaolo Bonzini exception->error_code = 0; 3698c59a0f57SLai Jiangshan return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception); 3699c50d8ae3SPaolo Bonzini } 3700c50d8ae3SPaolo Bonzini 3701c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3702c50d8ae3SPaolo Bonzini { 3703c50d8ae3SPaolo Bonzini /* 3704c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3705c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3706c50d8ae3SPaolo Bonzini */ 3707c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3708c50d8ae3SPaolo Bonzini return false; 3709c50d8ae3SPaolo Bonzini 3710c50d8ae3SPaolo Bonzini if (direct) 3711c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3712c50d8ae3SPaolo Bonzini 3713c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3714c50d8ae3SPaolo Bonzini } 3715c50d8ae3SPaolo Bonzini 371695fb5b02SBen Gardon /* 371795fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 371895fb5b02SBen Gardon * That SPTE may be non-present. 3719c5c8c7c5SDavid Matlack * 3720c5c8c7c5SDavid Matlack * Must be called between walk_shadow_page_lockless_{begin,end}. 372195fb5b02SBen Gardon */ 372239b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3723c50d8ae3SPaolo Bonzini { 3724c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 37252aa07893SSean Christopherson int leaf = -1; 372695fb5b02SBen Gardon u64 spte; 3727c50d8ae3SPaolo Bonzini 372839b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 372939b4d43eSSean Christopherson *root_level = iterator.level; 3730c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3731c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 373295fb5b02SBen Gardon leaf = iterator.level; 3733c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3734c50d8ae3SPaolo Bonzini 3735dde81f94SSean Christopherson sptes[leaf] = spte; 373695fb5b02SBen Gardon } 373795fb5b02SBen Gardon 373895fb5b02SBen Gardon return leaf; 373995fb5b02SBen Gardon } 374095fb5b02SBen Gardon 37419aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 374295fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 374395fb5b02SBen Gardon { 3744dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 374595fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 374639b4d43eSSean Christopherson int root, leaf, level; 374795fb5b02SBen Gardon bool reserved = false; 374895fb5b02SBen Gardon 3749c5c8c7c5SDavid Matlack walk_shadow_page_lockless_begin(vcpu); 3750c5c8c7c5SDavid Matlack 375163c0cac9SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 375239b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 375395fb5b02SBen Gardon else 375439b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 375595fb5b02SBen Gardon 3756c5c8c7c5SDavid Matlack walk_shadow_page_lockless_end(vcpu); 3757c5c8c7c5SDavid Matlack 37582aa07893SSean Christopherson if (unlikely(leaf < 0)) { 37592aa07893SSean Christopherson *sptep = 0ull; 37602aa07893SSean Christopherson return reserved; 37612aa07893SSean Christopherson } 37622aa07893SSean Christopherson 37639aa41879SSean Christopherson *sptep = sptes[leaf]; 37649aa41879SSean Christopherson 37659aa41879SSean Christopherson /* 37669aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 37679aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 37689aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 37699aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 37709aa41879SSean Christopherson */ 37719aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 37729aa41879SSean Christopherson leaf++; 377395fb5b02SBen Gardon 377495fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 377595fb5b02SBen Gardon 37769aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3777961f8445SSean Christopherson reserved |= is_rsvd_spte(rsvd_check, sptes[level], level); 3778c50d8ae3SPaolo Bonzini 3779c50d8ae3SPaolo Bonzini if (reserved) { 3780bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3781c50d8ae3SPaolo Bonzini __func__, addr); 378295fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3783bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3784bb4cdf3aSSean Christopherson sptes[level], level, 3785961f8445SSean Christopherson get_rsvd_bits(rsvd_check, sptes[level], level)); 3786c50d8ae3SPaolo Bonzini } 3787ddce6208SSean Christopherson 3788c50d8ae3SPaolo Bonzini return reserved; 3789c50d8ae3SPaolo Bonzini } 3790c50d8ae3SPaolo Bonzini 3791c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3792c50d8ae3SPaolo Bonzini { 3793c50d8ae3SPaolo Bonzini u64 spte; 3794c50d8ae3SPaolo Bonzini bool reserved; 3795c50d8ae3SPaolo Bonzini 3796c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3797c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3798c50d8ae3SPaolo Bonzini 379995fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3800c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3801c50d8ae3SPaolo Bonzini return -EINVAL; 3802c50d8ae3SPaolo Bonzini 3803c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3804c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 38050a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3806c50d8ae3SPaolo Bonzini 3807c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3808c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3809c50d8ae3SPaolo Bonzini 3810c50d8ae3SPaolo Bonzini if (direct) 3811c50d8ae3SPaolo Bonzini addr = 0; 3812c50d8ae3SPaolo Bonzini 3813c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3814c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3815c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3816c50d8ae3SPaolo Bonzini } 3817c50d8ae3SPaolo Bonzini 3818c50d8ae3SPaolo Bonzini /* 3819c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3820c50d8ae3SPaolo Bonzini * the address. 3821c50d8ae3SPaolo Bonzini */ 3822c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3823c50d8ae3SPaolo Bonzini } 3824c50d8ae3SPaolo Bonzini 3825c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3826b8a5d551SPaolo Bonzini struct kvm_page_fault *fault) 3827c50d8ae3SPaolo Bonzini { 3828b8a5d551SPaolo Bonzini if (unlikely(fault->rsvd)) 3829c50d8ae3SPaolo Bonzini return false; 3830c50d8ae3SPaolo Bonzini 3831b8a5d551SPaolo Bonzini if (!fault->present || !fault->write) 3832c50d8ae3SPaolo Bonzini return false; 3833c50d8ae3SPaolo Bonzini 3834c50d8ae3SPaolo Bonzini /* 3835c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3836c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3837c50d8ae3SPaolo Bonzini */ 38389d395a0aSBen Gardon if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE)) 3839c50d8ae3SPaolo Bonzini return true; 3840c50d8ae3SPaolo Bonzini 3841c50d8ae3SPaolo Bonzini return false; 3842c50d8ae3SPaolo Bonzini } 3843c50d8ae3SPaolo Bonzini 3844c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3845c50d8ae3SPaolo Bonzini { 3846c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3847c50d8ae3SPaolo Bonzini u64 spte; 3848c50d8ae3SPaolo Bonzini 3849c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 38503e44dce4SLai Jiangshan for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) 3851c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3852c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3853c50d8ae3SPaolo Bonzini } 3854c50d8ae3SPaolo Bonzini 3855e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 38569f1a8526SSean Christopherson gfn_t gfn) 3857c50d8ae3SPaolo Bonzini { 3858c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3859c50d8ae3SPaolo Bonzini 3860c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3861c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3862c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3863d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3864c50d8ae3SPaolo Bonzini 38659f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 38669f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3867c50d8ae3SPaolo Bonzini } 3868c50d8ae3SPaolo Bonzini 38693647cd04SPaolo Bonzini static bool kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, int *r) 3870c50d8ae3SPaolo Bonzini { 3871e710c5f6SDavid Matlack struct kvm_memory_slot *slot = fault->slot; 3872c50d8ae3SPaolo Bonzini bool async; 3873c50d8ae3SPaolo Bonzini 3874e0c37868SSean Christopherson /* 3875e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3876e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3877e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3878e0c37868SSean Christopherson */ 3879e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 38808f32d5e5SMaxim Levitsky goto out_retry; 3881e0c37868SSean Christopherson 38829cc13d60SMaxim Levitsky if (!kvm_is_visible_memslot(slot)) { 3883c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 38849cc13d60SMaxim Levitsky if (is_guest_mode(vcpu)) { 3885e710c5f6SDavid Matlack fault->slot = NULL; 38863647cd04SPaolo Bonzini fault->pfn = KVM_PFN_NOSLOT; 38873647cd04SPaolo Bonzini fault->map_writable = false; 3888c50d8ae3SPaolo Bonzini return false; 3889c50d8ae3SPaolo Bonzini } 38909cc13d60SMaxim Levitsky /* 38919cc13d60SMaxim Levitsky * If the APIC access page exists but is disabled, go directly 38929cc13d60SMaxim Levitsky * to emulation without caching the MMIO access or creating a 38939cc13d60SMaxim Levitsky * MMIO SPTE. That way the cache doesn't need to be purged 38949cc13d60SMaxim Levitsky * when the AVIC is re-enabled. 38959cc13d60SMaxim Levitsky */ 38969cc13d60SMaxim Levitsky if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT && 38979cc13d60SMaxim Levitsky !kvm_apicv_activated(vcpu->kvm)) { 38989cc13d60SMaxim Levitsky *r = RET_PF_EMULATE; 38999cc13d60SMaxim Levitsky return true; 39009cc13d60SMaxim Levitsky } 39019cc13d60SMaxim Levitsky } 3902c50d8ae3SPaolo Bonzini 3903c50d8ae3SPaolo Bonzini async = false; 39043647cd04SPaolo Bonzini fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async, 39053647cd04SPaolo Bonzini fault->write, &fault->map_writable, 39063647cd04SPaolo Bonzini &fault->hva); 3907c50d8ae3SPaolo Bonzini if (!async) 3908c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3909c50d8ae3SPaolo Bonzini 39102839180cSPaolo Bonzini if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) { 39113647cd04SPaolo Bonzini trace_kvm_try_async_get_page(fault->addr, fault->gfn); 39123647cd04SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) { 39133647cd04SPaolo Bonzini trace_kvm_async_pf_doublefault(fault->addr, fault->gfn); 3914c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 39158f32d5e5SMaxim Levitsky goto out_retry; 39163647cd04SPaolo Bonzini } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) 39178f32d5e5SMaxim Levitsky goto out_retry; 3918c50d8ae3SPaolo Bonzini } 3919c50d8ae3SPaolo Bonzini 39203647cd04SPaolo Bonzini fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL, 39213647cd04SPaolo Bonzini fault->write, &fault->map_writable, 39223647cd04SPaolo Bonzini &fault->hva); 3923a7cc099fSAndrei Vagin return false; 39248f32d5e5SMaxim Levitsky 39258f32d5e5SMaxim Levitsky out_retry: 39268f32d5e5SMaxim Levitsky *r = RET_PF_RETRY; 39278f32d5e5SMaxim Levitsky return true; 3928c50d8ae3SPaolo Bonzini } 3929c50d8ae3SPaolo Bonzini 3930a955cad8SSean Christopherson /* 3931a955cad8SSean Christopherson * Returns true if the page fault is stale and needs to be retried, i.e. if the 3932a955cad8SSean Christopherson * root was invalidated by a memslot update or a relevant mmu_notifier fired. 3933a955cad8SSean Christopherson */ 3934a955cad8SSean Christopherson static bool is_page_fault_stale(struct kvm_vcpu *vcpu, 3935a955cad8SSean Christopherson struct kvm_page_fault *fault, int mmu_seq) 3936a955cad8SSean Christopherson { 3937*b9e5603cSPaolo Bonzini struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa); 393818c841e1SSean Christopherson 393918c841e1SSean Christopherson /* Special roots, e.g. pae_root, are not backed by shadow pages. */ 394018c841e1SSean Christopherson if (sp && is_obsolete_sp(vcpu->kvm, sp)) 394118c841e1SSean Christopherson return true; 394218c841e1SSean Christopherson 394318c841e1SSean Christopherson /* 394418c841e1SSean Christopherson * Roots without an associated shadow page are considered invalid if 394518c841e1SSean Christopherson * there is a pending request to free obsolete roots. The request is 394618c841e1SSean Christopherson * only a hint that the current root _may_ be obsolete and needs to be 394718c841e1SSean Christopherson * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a 394818c841e1SSean Christopherson * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs 394918c841e1SSean Christopherson * to reload even if no vCPU is actively using the root. 395018c841e1SSean Christopherson */ 395118c841e1SSean Christopherson if (!sp && kvm_test_request(KVM_REQ_MMU_RELOAD, vcpu)) 3952a955cad8SSean Christopherson return true; 3953a955cad8SSean Christopherson 3954a955cad8SSean Christopherson return fault->slot && 3955a955cad8SSean Christopherson mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, fault->hva); 3956a955cad8SSean Christopherson } 3957a955cad8SSean Christopherson 39584326e57eSPaolo Bonzini static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 3959c50d8ae3SPaolo Bonzini { 396063c0cac9SDavid Matlack bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); 3961c50d8ae3SPaolo Bonzini 39620f90e1c1SSean Christopherson unsigned long mmu_seq; 396383f06fa7SSean Christopherson int r; 3964c50d8ae3SPaolo Bonzini 39653c8ad5a6SPaolo Bonzini fault->gfn = fault->addr >> PAGE_SHIFT; 3966e710c5f6SDavid Matlack fault->slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn); 3967e710c5f6SDavid Matlack 3968b8a5d551SPaolo Bonzini if (page_fault_handle_page_track(vcpu, fault)) 3969c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3970c50d8ae3SPaolo Bonzini 39713c8ad5a6SPaolo Bonzini r = fast_page_fault(vcpu, fault); 3972c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3973c4371c2aSSean Christopherson return r; 397483291445SSean Christopherson 3975378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3976c50d8ae3SPaolo Bonzini if (r) 3977c50d8ae3SPaolo Bonzini return r; 3978c50d8ae3SPaolo Bonzini 3979367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3980367fd790SSean Christopherson smp_rmb(); 3981367fd790SSean Christopherson 39823647cd04SPaolo Bonzini if (kvm_faultin_pfn(vcpu, fault, &r)) 39838f32d5e5SMaxim Levitsky return r; 3984367fd790SSean Christopherson 39853a13f4feSPaolo Bonzini if (handle_abnormal_pfn(vcpu, fault, ACC_ALL, &r)) 3986367fd790SSean Christopherson return r; 3987367fd790SSean Christopherson 3988367fd790SSean Christopherson r = RET_PF_RETRY; 3989a2855afcSBen Gardon 39900b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3991a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3992a2855afcSBen Gardon else 3993531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3994a2855afcSBen Gardon 3995a955cad8SSean Christopherson if (is_page_fault_stale(vcpu, fault, mmu_seq)) 3996367fd790SSean Christopherson goto out_unlock; 3997a955cad8SSean Christopherson 39987bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 39997bd7ded6SSean Christopherson if (r) 4000367fd790SSean Christopherson goto out_unlock; 4001bb18842eSBen Gardon 40020b873fd7SDavid Matlack if (is_tdp_mmu_fault) 40032f6305ddSPaolo Bonzini r = kvm_tdp_mmu_map(vcpu, fault); 4004bb18842eSBen Gardon else 400543b74355SPaolo Bonzini r = __direct_map(vcpu, fault); 40060f90e1c1SSean Christopherson 4007367fd790SSean Christopherson out_unlock: 40080b873fd7SDavid Matlack if (is_tdp_mmu_fault) 4009a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 4010a2855afcSBen Gardon else 4011531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 40123647cd04SPaolo Bonzini kvm_release_pfn_clean(fault->pfn); 4013367fd790SSean Christopherson return r; 4014c50d8ae3SPaolo Bonzini } 4015c50d8ae3SPaolo Bonzini 4016c501040aSPaolo Bonzini static int nonpaging_page_fault(struct kvm_vcpu *vcpu, 4017c501040aSPaolo Bonzini struct kvm_page_fault *fault) 40180f90e1c1SSean Christopherson { 40194326e57eSPaolo Bonzini pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code); 40200f90e1c1SSean Christopherson 40210f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 40224326e57eSPaolo Bonzini fault->max_level = PG_LEVEL_2M; 40234326e57eSPaolo Bonzini return direct_page_fault(vcpu, fault); 40240f90e1c1SSean Christopherson } 40250f90e1c1SSean Christopherson 4026c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 4027c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 4028c50d8ae3SPaolo Bonzini { 4029c50d8ae3SPaolo Bonzini int r = 1; 40309ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 4031c50d8ae3SPaolo Bonzini 4032736c291cSSean Christopherson #ifndef CONFIG_X86_64 4033736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 4034736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 4035736c291cSSean Christopherson return -EFAULT; 4036736c291cSSean Christopherson #endif 4037736c291cSSean Christopherson 4038c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 40399ce372b3SVitaly Kuznetsov if (!flags) { 4040c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 4041c50d8ae3SPaolo Bonzini 4042c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 4043c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 4044c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 4045c50d8ae3SPaolo Bonzini insn_len); 40469ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 404768fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 4048c50d8ae3SPaolo Bonzini local_irq_disable(); 40496bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 4050c50d8ae3SPaolo Bonzini local_irq_enable(); 40519ce372b3SVitaly Kuznetsov } else { 40529ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 4053c50d8ae3SPaolo Bonzini } 40549ce372b3SVitaly Kuznetsov 4055c50d8ae3SPaolo Bonzini return r; 4056c50d8ae3SPaolo Bonzini } 4057c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 4058c50d8ae3SPaolo Bonzini 4059c501040aSPaolo Bonzini int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) 4060c50d8ae3SPaolo Bonzini { 40614326e57eSPaolo Bonzini while (fault->max_level > PG_LEVEL_4K) { 40624326e57eSPaolo Bonzini int page_num = KVM_PAGES_PER_HPAGE(fault->max_level); 40634326e57eSPaolo Bonzini gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1); 4064c50d8ae3SPaolo Bonzini 4065cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 4066cb9b88c6SSean Christopherson break; 40674326e57eSPaolo Bonzini 40684326e57eSPaolo Bonzini --fault->max_level; 4069c50d8ae3SPaolo Bonzini } 4070c50d8ae3SPaolo Bonzini 40714326e57eSPaolo Bonzini return direct_page_fault(vcpu, fault); 4072c50d8ae3SPaolo Bonzini } 4073c50d8ae3SPaolo Bonzini 407484a16226SSean Christopherson static void nonpaging_init_context(struct kvm_mmu *context) 4075c50d8ae3SPaolo Bonzini { 4076c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 4077c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4078c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 40795efac074SPaolo Bonzini context->invlpg = NULL; 4080c50d8ae3SPaolo Bonzini context->direct_map = true; 4081c50d8ae3SPaolo Bonzini } 4082c50d8ae3SPaolo Bonzini 4083be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 40840be44352SSean Christopherson union kvm_mmu_page_role role) 40850be44352SSean Christopherson { 4086be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 4087e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 4088e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 40890be44352SSean Christopherson } 40900be44352SSean Christopherson 4091c50d8ae3SPaolo Bonzini /* 4092be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 4093c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 4094*b9e5603cSPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root.hpa and true is 4095c50d8ae3SPaolo Bonzini * returned. 4096*b9e5603cSPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root.hpa and 4097c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4098c50d8ae3SPaolo Bonzini */ 4099be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4100c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4101c50d8ae3SPaolo Bonzini { 4102c50d8ae3SPaolo Bonzini uint i; 4103c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4104c50d8ae3SPaolo Bonzini 4105*b9e5603cSPaolo Bonzini if (is_root_usable(&mmu->root, new_pgd, new_role)) 41060be44352SSean Christopherson return true; 41070be44352SSean Christopherson 4108c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4109*b9e5603cSPaolo Bonzini swap(mmu->root, mmu->prev_roots[i]); 4110c50d8ae3SPaolo Bonzini 4111*b9e5603cSPaolo Bonzini if (is_root_usable(&mmu->root, new_pgd, new_role)) 4112c50d8ae3SPaolo Bonzini break; 4113c50d8ae3SPaolo Bonzini } 4114c50d8ae3SPaolo Bonzini 4115c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4116c50d8ae3SPaolo Bonzini } 4117c50d8ae3SPaolo Bonzini 4118be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4119b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4120c50d8ae3SPaolo Bonzini { 4121c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4122c50d8ae3SPaolo Bonzini 4123c50d8ae3SPaolo Bonzini /* 4124c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4125c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4126c50d8ae3SPaolo Bonzini * later if necessary. 4127c50d8ae3SPaolo Bonzini */ 4128c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4129b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4130fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 4131c50d8ae3SPaolo Bonzini 4132c50d8ae3SPaolo Bonzini return false; 4133c50d8ae3SPaolo Bonzini } 4134c50d8ae3SPaolo Bonzini 4135be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4136b5129100SSean Christopherson union kvm_mmu_page_role new_role) 4137c50d8ae3SPaolo Bonzini { 4138be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4139b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4140b869855bSSean Christopherson return; 4141c50d8ae3SPaolo Bonzini } 4142c50d8ae3SPaolo Bonzini 4143c50d8ae3SPaolo Bonzini /* 4144b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4145b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4146b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4147b869855bSSean Christopherson * free the root set here and allocate a new one. 4148b869855bSSean Christopherson */ 4149b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4150b869855bSSean Christopherson 4151b5129100SSean Christopherson if (force_flush_and_sync_on_reuse) { 4152b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 4153b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4154b5129100SSean Christopherson } 4155b869855bSSean Christopherson 4156b869855bSSean Christopherson /* 4157b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4158b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4159b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4160b869855bSSean Christopherson * the shadow page tables. 4161c50d8ae3SPaolo Bonzini */ 4162c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4163c50d8ae3SPaolo Bonzini 4164daa5b6c1SBen Gardon /* 4165daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 4166daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 4167daa5b6c1SBen Gardon */ 4168daa5b6c1SBen Gardon if (!new_role.direct) 4169daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 4170*b9e5603cSPaolo Bonzini to_shadow_page(vcpu->arch.mmu->root.hpa)); 4171c50d8ae3SPaolo Bonzini } 4172c50d8ae3SPaolo Bonzini 4173b5129100SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd) 4174c50d8ae3SPaolo Bonzini { 4175b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu)); 4176c50d8ae3SPaolo Bonzini } 4177be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4178c50d8ae3SPaolo Bonzini 4179c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4180c50d8ae3SPaolo Bonzini { 4181c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4182c50d8ae3SPaolo Bonzini } 4183c50d8ae3SPaolo Bonzini 4184c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 4185c3e5e415SLai Jiangshan unsigned int access) 4186c50d8ae3SPaolo Bonzini { 4187c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4188c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4189c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4190c50d8ae3SPaolo Bonzini return true; 4191c50d8ae3SPaolo Bonzini } 4192c50d8ae3SPaolo Bonzini 4193c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4194c50d8ae3SPaolo Bonzini return true; 4195c50d8ae3SPaolo Bonzini } 4196c50d8ae3SPaolo Bonzini 4197c50d8ae3SPaolo Bonzini return false; 4198c50d8ae3SPaolo Bonzini } 4199c50d8ae3SPaolo Bonzini 4200c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4201c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4202c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4203c50d8ae3SPaolo Bonzini #undef PTTYPE 4204c50d8ae3SPaolo Bonzini 4205c50d8ae3SPaolo Bonzini #define PTTYPE 64 4206c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4207c50d8ae3SPaolo Bonzini #undef PTTYPE 4208c50d8ae3SPaolo Bonzini 4209c50d8ae3SPaolo Bonzini #define PTTYPE 32 4210c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4211c50d8ae3SPaolo Bonzini #undef PTTYPE 4212c50d8ae3SPaolo Bonzini 4213c50d8ae3SPaolo Bonzini static void 4214b705a277SSean Christopherson __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check, 42155b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4216c50d8ae3SPaolo Bonzini bool pse, bool amd) 4217c50d8ae3SPaolo Bonzini { 4218c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4219c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 42205b7f575cSSean Christopherson u64 high_bits_rsvd; 4221c50d8ae3SPaolo Bonzini 4222c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4223c50d8ae3SPaolo Bonzini 4224c50d8ae3SPaolo Bonzini if (!gbpages) 4225c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4226c50d8ae3SPaolo Bonzini 42275b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 42285b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 42295b7f575cSSean Christopherson else 42305b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 42315b7f575cSSean Christopherson 42325b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 42335b7f575cSSean Christopherson if (!nx) 42345b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 42355b7f575cSSean Christopherson 4236c50d8ae3SPaolo Bonzini /* 4237c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4238c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4239c50d8ae3SPaolo Bonzini */ 4240c50d8ae3SPaolo Bonzini if (amd) 4241c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4242c50d8ae3SPaolo Bonzini 4243c50d8ae3SPaolo Bonzini switch (level) { 4244c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4245c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4246c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4247c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4248c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4249c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4250c50d8ae3SPaolo Bonzini 4251c50d8ae3SPaolo Bonzini if (!pse) { 4252c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4253c50d8ae3SPaolo Bonzini break; 4254c50d8ae3SPaolo Bonzini } 4255c50d8ae3SPaolo Bonzini 4256c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4257c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4258c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4259c50d8ae3SPaolo Bonzini else 4260c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4261c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4262c50d8ae3SPaolo Bonzini break; 4263c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 42645b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 42655b7f575cSSean Christopherson high_bits_rsvd | 42665b7f575cSSean Christopherson rsvd_bits(5, 8) | 42675b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 42685b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 42695b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 42705b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4271c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4272c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4273c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4274c50d8ae3SPaolo Bonzini break; 4275c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 42765b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 42775b7f575cSSean Christopherson nonleaf_bit8_rsvd | 42785b7f575cSSean Christopherson rsvd_bits(7, 7); 4279c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4280c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4281df561f66SGustavo A. R. Silva fallthrough; 4282c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 42835b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 42845b7f575cSSean Christopherson nonleaf_bit8_rsvd | 42855b7f575cSSean Christopherson rsvd_bits(7, 7); 42865b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 42875b7f575cSSean Christopherson gbpages_bit_rsvd; 42885b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 42895b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4290c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4291c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 42925b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 42935b7f575cSSean Christopherson gbpages_bit_rsvd | 4294c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 42955b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4296c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4297c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4298c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4299c50d8ae3SPaolo Bonzini break; 4300c50d8ae3SPaolo Bonzini } 4301c50d8ae3SPaolo Bonzini } 4302c50d8ae3SPaolo Bonzini 430327de9250SSean Christopherson static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu) 430427de9250SSean Christopherson { 430527de9250SSean Christopherson /* 430627de9250SSean Christopherson * If TDP is enabled, let the guest use GBPAGES if they're supported in 430727de9250SSean Christopherson * hardware. The hardware page walker doesn't let KVM disable GBPAGES, 430827de9250SSean Christopherson * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA 430927de9250SSean Christopherson * walk for performance and complexity reasons. Not to mention KVM 431027de9250SSean Christopherson * _can't_ solve the problem because GVA->GPA walks aren't visible to 431127de9250SSean Christopherson * KVM once a TDP translation is installed. Mimic hardware behavior so 431227de9250SSean Christopherson * that KVM's is at least consistent, i.e. doesn't randomly inject #PF. 431327de9250SSean Christopherson */ 431427de9250SSean Christopherson return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) : 431527de9250SSean Christopherson guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES); 431627de9250SSean Christopherson } 431727de9250SSean Christopherson 4318c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4319c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4320c50d8ae3SPaolo Bonzini { 4321b705a277SSean Christopherson __reset_rsvds_bits_mask(&context->guest_rsvd_check, 43225b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 432390599c28SSean Christopherson context->root_level, is_efer_nx(context), 432427de9250SSean Christopherson guest_can_use_gbpages(vcpu), 43254e9c0d80SSean Christopherson is_cr4_pse(context), 432623493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4327c50d8ae3SPaolo Bonzini } 4328c50d8ae3SPaolo Bonzini 4329c50d8ae3SPaolo Bonzini static void 4330c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 433184ea5c09SLai Jiangshan u64 pa_bits_rsvd, bool execonly, int huge_page_level) 4332c50d8ae3SPaolo Bonzini { 43335b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 433484ea5c09SLai Jiangshan u64 large_1g_rsvd = 0, large_2m_rsvd = 0; 4335c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4336c50d8ae3SPaolo Bonzini 433784ea5c09SLai Jiangshan if (huge_page_level < PG_LEVEL_1G) 433884ea5c09SLai Jiangshan large_1g_rsvd = rsvd_bits(7, 7); 433984ea5c09SLai Jiangshan if (huge_page_level < PG_LEVEL_2M) 434084ea5c09SLai Jiangshan large_2m_rsvd = rsvd_bits(7, 7); 434184ea5c09SLai Jiangshan 43425b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 43435b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 434484ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd; 434584ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd; 43465b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4347c50d8ae3SPaolo Bonzini 4348c50d8ae3SPaolo Bonzini /* large page */ 4349c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4350c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 435184ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd; 435284ea5c09SLai Jiangshan rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd; 4353c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4354c50d8ae3SPaolo Bonzini 4355c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4356c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4357c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4358c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4359c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4360c50d8ae3SPaolo Bonzini if (!execonly) { 4361c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4362c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4363c50d8ae3SPaolo Bonzini } 4364c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4365c50d8ae3SPaolo Bonzini } 4366c50d8ae3SPaolo Bonzini 4367c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 436884ea5c09SLai Jiangshan struct kvm_mmu *context, bool execonly, int huge_page_level) 4369c50d8ae3SPaolo Bonzini { 4370c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 437184ea5c09SLai Jiangshan vcpu->arch.reserved_gpa_bits, execonly, 437284ea5c09SLai Jiangshan huge_page_level); 4373c50d8ae3SPaolo Bonzini } 4374c50d8ae3SPaolo Bonzini 43756f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 43766f8e65a6SSean Christopherson { 43776f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 43786f8e65a6SSean Christopherson } 43796f8e65a6SSean Christopherson 4380c50d8ae3SPaolo Bonzini /* 4381c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4382c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4383c50d8ae3SPaolo Bonzini * follow the features in guest. 4384c50d8ae3SPaolo Bonzini */ 438516be1d12SSean Christopherson static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 438616be1d12SSean Christopherson struct kvm_mmu *context) 4387c50d8ae3SPaolo Bonzini { 4388112022bdSSean Christopherson /* 4389112022bdSSean Christopherson * KVM uses NX when TDP is disabled to handle a variety of scenarios, 4390112022bdSSean Christopherson * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and 4391112022bdSSean Christopherson * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0. 4392112022bdSSean Christopherson * The iTLB multi-hit workaround can be toggled at any time, so assume 4393112022bdSSean Christopherson * NX can be used by any non-nested shadow MMU to avoid having to reset 4394112022bdSSean Christopherson * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled. 4395112022bdSSean Christopherson */ 439690599c28SSean Christopherson bool uses_nx = is_efer_nx(context) || !tdp_enabled; 43978c985b2dSSean Christopherson 43988c985b2dSSean Christopherson /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */ 43998c985b2dSSean Christopherson bool is_amd = true; 44008c985b2dSSean Christopherson /* KVM doesn't use 2-level page tables for the shadow MMU. */ 44018c985b2dSSean Christopherson bool is_pse = false; 4402c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4403c50d8ae3SPaolo Bonzini int i; 4404c50d8ae3SPaolo Bonzini 44058c985b2dSSean Christopherson WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL); 44068c985b2dSSean Christopherson 4407c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4408b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4409c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 441027de9250SSean Christopherson guest_can_use_gbpages(vcpu), is_pse, is_amd); 4411c50d8ae3SPaolo Bonzini 4412c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4413c50d8ae3SPaolo Bonzini return; 4414c50d8ae3SPaolo Bonzini 4415c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4416c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4417c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4418c50d8ae3SPaolo Bonzini } 4419c50d8ae3SPaolo Bonzini 4420c50d8ae3SPaolo Bonzini } 4421c50d8ae3SPaolo Bonzini 4422c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4423c50d8ae3SPaolo Bonzini { 4424c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4425c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4426c50d8ae3SPaolo Bonzini } 4427c50d8ae3SPaolo Bonzini 4428c50d8ae3SPaolo Bonzini /* 4429c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4430c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4431c50d8ae3SPaolo Bonzini */ 4432c50d8ae3SPaolo Bonzini static void 4433e8f6e738SJinrong Liang reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context) 4434c50d8ae3SPaolo Bonzini { 4435c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4436c50d8ae3SPaolo Bonzini int i; 4437c50d8ae3SPaolo Bonzini 4438c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4439c50d8ae3SPaolo Bonzini 4440c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4441b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4442c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4443c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 44448c985b2dSSean Christopherson false, true); 4445c50d8ae3SPaolo Bonzini else 4446c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 444784ea5c09SLai Jiangshan reserved_hpa_bits(), false, 444884ea5c09SLai Jiangshan max_huge_page_level); 4449c50d8ae3SPaolo Bonzini 4450c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4451c50d8ae3SPaolo Bonzini return; 4452c50d8ae3SPaolo Bonzini 4453c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4454c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4455c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4456c50d8ae3SPaolo Bonzini } 4457c50d8ae3SPaolo Bonzini } 4458c50d8ae3SPaolo Bonzini 4459c50d8ae3SPaolo Bonzini /* 4460c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4461c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4462c50d8ae3SPaolo Bonzini */ 4463c50d8ae3SPaolo Bonzini static void 4464e8f6e738SJinrong Liang reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly) 4465c50d8ae3SPaolo Bonzini { 4466c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 446784ea5c09SLai Jiangshan reserved_hpa_bits(), execonly, 446884ea5c09SLai Jiangshan max_huge_page_level); 4469c50d8ae3SPaolo Bonzini } 4470c50d8ae3SPaolo Bonzini 4471c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4472c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4473c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4474c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4475c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4476c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4477c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4478c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4479c50d8ae3SPaolo Bonzini 4480c50d8ae3SPaolo Bonzini 4481c596f147SSean Christopherson static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept) 4482c50d8ae3SPaolo Bonzini { 4483c50d8ae3SPaolo Bonzini unsigned byte; 4484c50d8ae3SPaolo Bonzini 4485c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4486c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4487c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4488c50d8ae3SPaolo Bonzini 4489c596f147SSean Christopherson bool cr4_smep = is_cr4_smep(mmu); 4490c596f147SSean Christopherson bool cr4_smap = is_cr4_smap(mmu); 4491c596f147SSean Christopherson bool cr0_wp = is_cr0_wp(mmu); 449290599c28SSean Christopherson bool efer_nx = is_efer_nx(mmu); 4493c50d8ae3SPaolo Bonzini 4494c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4495c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4496c50d8ae3SPaolo Bonzini 4497c50d8ae3SPaolo Bonzini /* 4498c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4499c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4500c50d8ae3SPaolo Bonzini */ 4501c50d8ae3SPaolo Bonzini 4502c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4503c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4504c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4505c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4506c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4507c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4508c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4509c50d8ae3SPaolo Bonzini u8 smepf = 0; 4510c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4511c50d8ae3SPaolo Bonzini u8 smapf = 0; 4512c50d8ae3SPaolo Bonzini 4513c50d8ae3SPaolo Bonzini if (!ept) { 4514c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4515c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4516c50d8ae3SPaolo Bonzini 4517c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 451890599c28SSean Christopherson if (!efer_nx) 4519c50d8ae3SPaolo Bonzini ff = 0; 4520c50d8ae3SPaolo Bonzini 4521c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4522c50d8ae3SPaolo Bonzini if (!cr0_wp) 4523c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4524c50d8ae3SPaolo Bonzini 4525c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4526c50d8ae3SPaolo Bonzini if (cr4_smep) 4527c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4528c50d8ae3SPaolo Bonzini 4529c50d8ae3SPaolo Bonzini /* 4530c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4531c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4532c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4533c50d8ae3SPaolo Bonzini * conditions are true: 4534c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4535c50d8ae3SPaolo Bonzini * - A user page is accessed 4536c50d8ae3SPaolo Bonzini * - The access is not a fetch 4537c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4538c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4539c50d8ae3SPaolo Bonzini * 4540c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4541c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4542c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4543c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4544c50d8ae3SPaolo Bonzini */ 4545c50d8ae3SPaolo Bonzini if (cr4_smap) 4546c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4547c50d8ae3SPaolo Bonzini } 4548c50d8ae3SPaolo Bonzini 4549c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4550c50d8ae3SPaolo Bonzini } 4551c50d8ae3SPaolo Bonzini } 4552c50d8ae3SPaolo Bonzini 4553c50d8ae3SPaolo Bonzini /* 4554c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4555c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4556c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4557c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4558c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4559c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4560c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4561c50d8ae3SPaolo Bonzini * 4562c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4563c50d8ae3SPaolo Bonzini * page tables and the machine state: 4564c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4565c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4566c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4567c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4568c50d8ae3SPaolo Bonzini * 4569c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4570c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4571c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4572c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4573c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4574c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4575c50d8ae3SPaolo Bonzini * only will be masked away. 4576c50d8ae3SPaolo Bonzini */ 45772e4c0661SSean Christopherson static void update_pkru_bitmask(struct kvm_mmu *mmu) 4578c50d8ae3SPaolo Bonzini { 4579c50d8ae3SPaolo Bonzini unsigned bit; 4580c50d8ae3SPaolo Bonzini bool wp; 4581c50d8ae3SPaolo Bonzini 4582c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4583a3ca5281SChenyi Qiang 4584a3ca5281SChenyi Qiang if (!is_cr4_pke(mmu)) 4585c50d8ae3SPaolo Bonzini return; 4586c50d8ae3SPaolo Bonzini 45872e4c0661SSean Christopherson wp = is_cr0_wp(mmu); 4588c50d8ae3SPaolo Bonzini 4589c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4590c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4591c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4592c50d8ae3SPaolo Bonzini 4593c50d8ae3SPaolo Bonzini pfec = bit << 1; 4594c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4595c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4596c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4597c50d8ae3SPaolo Bonzini 4598c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4599c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4600c50d8ae3SPaolo Bonzini 4601c50d8ae3SPaolo Bonzini /* 4602c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4603c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4604c50d8ae3SPaolo Bonzini */ 4605c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4606c50d8ae3SPaolo Bonzini /* 4607c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4608c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4609c50d8ae3SPaolo Bonzini */ 4610c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4611c50d8ae3SPaolo Bonzini 4612c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4613c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4614c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4615c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4616c50d8ae3SPaolo Bonzini 4617c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4618c50d8ae3SPaolo Bonzini } 4619c50d8ae3SPaolo Bonzini } 4620c50d8ae3SPaolo Bonzini 4621533f9a4bSSean Christopherson static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu, 4622533f9a4bSSean Christopherson struct kvm_mmu *mmu) 4623c50d8ae3SPaolo Bonzini { 4624533f9a4bSSean Christopherson if (!is_cr0_pg(mmu)) 4625533f9a4bSSean Christopherson return; 4626c50d8ae3SPaolo Bonzini 4627533f9a4bSSean Christopherson reset_rsvds_bits_mask(vcpu, mmu); 4628533f9a4bSSean Christopherson update_permission_bitmask(mmu, false); 4629533f9a4bSSean Christopherson update_pkru_bitmask(mmu); 4630c50d8ae3SPaolo Bonzini } 4631c50d8ae3SPaolo Bonzini 4632fe660f72SSean Christopherson static void paging64_init_context(struct kvm_mmu *context) 4633c50d8ae3SPaolo Bonzini { 4634c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4635c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4636c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4637c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4638c50d8ae3SPaolo Bonzini context->direct_map = false; 4639c50d8ae3SPaolo Bonzini } 4640c50d8ae3SPaolo Bonzini 464184a16226SSean Christopherson static void paging32_init_context(struct kvm_mmu *context) 4642c50d8ae3SPaolo Bonzini { 4643c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4644c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4645c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4646c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4647c50d8ae3SPaolo Bonzini context->direct_map = false; 4648c50d8ae3SPaolo Bonzini } 4649c50d8ae3SPaolo Bonzini 46508626c120SSean Christopherson static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu, 46518626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 4652c50d8ae3SPaolo Bonzini { 4653c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4654c50d8ae3SPaolo Bonzini 4655ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4656ca8d664fSSean Christopherson ext.cr0_pg = 1; 46578626c120SSean Christopherson ext.cr4_pae = ____is_cr4_pae(regs); 46588626c120SSean Christopherson ext.cr4_smep = ____is_cr4_smep(regs); 46598626c120SSean Christopherson ext.cr4_smap = ____is_cr4_smap(regs); 46608626c120SSean Christopherson ext.cr4_pse = ____is_cr4_pse(regs); 466184c679f5SSean Christopherson 466284c679f5SSean Christopherson /* PKEY and LA57 are active iff long mode is active. */ 466384c679f5SSean Christopherson ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs); 466484c679f5SSean Christopherson ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs); 4665b8453cdcSMaxim Levitsky ext.efer_lma = ____is_efer_lma(regs); 4666ca8d664fSSean Christopherson } 4667c50d8ae3SPaolo Bonzini 4668c50d8ae3SPaolo Bonzini ext.valid = 1; 4669c50d8ae3SPaolo Bonzini 4670c50d8ae3SPaolo Bonzini return ext; 4671c50d8ae3SPaolo Bonzini } 4672c50d8ae3SPaolo Bonzini 4673c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 46748626c120SSean Christopherson struct kvm_mmu_role_regs *regs, 4675c50d8ae3SPaolo Bonzini bool base_only) 4676c50d8ae3SPaolo Bonzini { 4677c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4678c50d8ae3SPaolo Bonzini 4679c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4680ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4681167f8a5cSSean Christopherson role.base.efer_nx = ____is_efer_nx(regs); 46828626c120SSean Christopherson role.base.cr0_wp = ____is_cr0_wp(regs); 4683ca8d664fSSean Christopherson } 4684c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4685c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4686c50d8ae3SPaolo Bonzini 4687c50d8ae3SPaolo Bonzini if (base_only) 4688c50d8ae3SPaolo Bonzini return role; 4689c50d8ae3SPaolo Bonzini 46908626c120SSean Christopherson role.ext = kvm_calc_mmu_role_ext(vcpu, regs); 4691c50d8ae3SPaolo Bonzini 4692c50d8ae3SPaolo Bonzini return role; 4693c50d8ae3SPaolo Bonzini } 4694c50d8ae3SPaolo Bonzini 4695d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4696d468d94bSSean Christopherson { 4697746700d2SWei Huang /* tdp_root_level is architecture forced level, use it if nonzero */ 4698746700d2SWei Huang if (tdp_root_level) 4699746700d2SWei Huang return tdp_root_level; 4700746700d2SWei Huang 4701d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 470283013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4703d468d94bSSean Christopherson return 4; 4704d468d94bSSean Christopherson 470583013059SSean Christopherson return max_tdp_level; 4706d468d94bSSean Christopherson } 4707d468d94bSSean Christopherson 4708c50d8ae3SPaolo Bonzini static union kvm_mmu_role 47098626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, 47108626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4711c50d8ae3SPaolo Bonzini { 47128626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4713c50d8ae3SPaolo Bonzini 4714c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4715d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4716c50d8ae3SPaolo Bonzini role.base.direct = true; 4717bb3b394dSLai Jiangshan role.base.has_4_byte_gpte = false; 4718c50d8ae3SPaolo Bonzini 4719c50d8ae3SPaolo Bonzini return role; 4720c50d8ae3SPaolo Bonzini } 4721c50d8ae3SPaolo Bonzini 4722c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4723c50d8ae3SPaolo Bonzini { 47248c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 47258626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4726c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 47278626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, false); 4728c50d8ae3SPaolo Bonzini 4729c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4730c50d8ae3SPaolo Bonzini return; 4731c50d8ae3SPaolo Bonzini 4732c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 47337a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4734c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 47355efac074SPaolo Bonzini context->invlpg = NULL; 4736d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4737c50d8ae3SPaolo Bonzini context->direct_map = true; 4738d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4739c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4740c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4741f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(®s); 4742c50d8ae3SPaolo Bonzini 474336f26787SSean Christopherson if (!is_cr0_pg(context)) 4744c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 474536f26787SSean Christopherson else if (is_cr4_pae(context)) 4746c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4747f4bd6f73SSean Christopherson else 4748c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4749c50d8ae3SPaolo Bonzini 4750533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4751e8f6e738SJinrong Liang reset_tdp_shadow_zero_bits_mask(context); 4752c50d8ae3SPaolo Bonzini } 4753c50d8ae3SPaolo Bonzini 4754c50d8ae3SPaolo Bonzini static union kvm_mmu_role 47558626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, 47568626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4757c50d8ae3SPaolo Bonzini { 47588626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4759c50d8ae3SPaolo Bonzini 47608626c120SSean Christopherson role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs); 47618626c120SSean Christopherson role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs); 4762bb3b394dSLai Jiangshan role.base.has_4_byte_gpte = ____is_cr0_pg(regs) && !____is_cr4_pae(regs); 4763c50d8ae3SPaolo Bonzini 476459505b55SSean Christopherson return role; 476559505b55SSean Christopherson } 476659505b55SSean Christopherson 476759505b55SSean Christopherson static union kvm_mmu_role 47688626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, 47698626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 477059505b55SSean Christopherson { 477159505b55SSean Christopherson union kvm_mmu_role role = 47728626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, base_only); 477359505b55SSean Christopherson 47748626c120SSean Christopherson role.base.direct = !____is_cr0_pg(regs); 477559505b55SSean Christopherson 47768626c120SSean Christopherson if (!____is_efer_lma(regs)) 4777c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 47788626c120SSean Christopherson else if (____is_cr4_la57(regs)) 4779c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4780c50d8ae3SPaolo Bonzini else 4781c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4782c50d8ae3SPaolo Bonzini 4783c50d8ae3SPaolo Bonzini return role; 4784c50d8ae3SPaolo Bonzini } 4785c50d8ae3SPaolo Bonzini 47868c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 4787594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs, 47888c008659SPaolo Bonzini union kvm_mmu_role new_role) 4789c50d8ae3SPaolo Bonzini { 479018db1b17SSean Christopherson if (new_role.as_u64 == context->mmu_role.as_u64) 479118db1b17SSean Christopherson return; 4792c50d8ae3SPaolo Bonzini 4793c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 479418db1b17SSean Christopherson 479536f26787SSean Christopherson if (!is_cr0_pg(context)) 479684a16226SSean Christopherson nonpaging_init_context(context); 479736f26787SSean Christopherson else if (is_cr4_pae(context)) 4798fe660f72SSean Christopherson paging64_init_context(context); 4799c50d8ae3SPaolo Bonzini else 480084a16226SSean Christopherson paging32_init_context(context); 4801f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(regs); 4802c50d8ae3SPaolo Bonzini 4803533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4804d555f705SSean Christopherson context->shadow_root_level = new_role.base.level; 4805d555f705SSean Christopherson 4806c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4807c50d8ae3SPaolo Bonzini } 48080f04a2acSVitaly Kuznetsov 4809594e91a1SSean Christopherson static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, 4810594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs) 48110f04a2acSVitaly Kuznetsov { 48128c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 48130f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 48148626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false); 48150f04a2acSVitaly Kuznetsov 4816594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, regs, new_role); 48170f04a2acSVitaly Kuznetsov } 48180f04a2acSVitaly Kuznetsov 481959505b55SSean Christopherson static union kvm_mmu_role 48208626c120SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu, 48218626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 482259505b55SSean Christopherson { 482359505b55SSean Christopherson union kvm_mmu_role role = 48248626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 482559505b55SSean Christopherson 482659505b55SSean Christopherson role.base.direct = false; 4827d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 482859505b55SSean Christopherson 482959505b55SSean Christopherson return role; 483059505b55SSean Christopherson } 483159505b55SSean Christopherson 4832dbc4739bSSean Christopherson void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4833dbc4739bSSean Christopherson unsigned long cr4, u64 efer, gpa_t nested_cr3) 48340f04a2acSVitaly Kuznetsov { 48358c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4836594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 4837594e91a1SSean Christopherson .cr0 = cr0, 483828f091bcSPaolo Bonzini .cr4 = cr4 & ~X86_CR4_PKE, 4839594e91a1SSean Christopherson .efer = efer, 4840594e91a1SSean Christopherson }; 48418626c120SSean Christopherson union kvm_mmu_role new_role; 48420f04a2acSVitaly Kuznetsov 48438626c120SSean Christopherson new_role = kvm_calc_shadow_npt_root_page_role(vcpu, ®s); 4844a506fdd2SVitaly Kuznetsov 4845b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base); 4846a3322d5cSSean Christopherson 4847594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, ®s, new_role); 48480f04a2acSVitaly Kuznetsov } 48490f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4850c50d8ae3SPaolo Bonzini 4851c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4852c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4853bb1fcc70SSean Christopherson bool execonly, u8 level) 4854c50d8ae3SPaolo Bonzini { 4855c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4856c50d8ae3SPaolo Bonzini 4857c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4858c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4859c50d8ae3SPaolo Bonzini 4860bb1fcc70SSean Christopherson role.base.level = level; 4861bb3b394dSLai Jiangshan role.base.has_4_byte_gpte = false; 4862c50d8ae3SPaolo Bonzini role.base.direct = false; 4863c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4864c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4865c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4866c50d8ae3SPaolo Bonzini 4867cd6767c3SSean Christopherson /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */ 4868cd6767c3SSean Christopherson role.ext.word = 0; 4869c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4870cd6767c3SSean Christopherson role.ext.valid = 1; 4871c50d8ae3SPaolo Bonzini 4872c50d8ae3SPaolo Bonzini return role; 4873c50d8ae3SPaolo Bonzini } 4874c50d8ae3SPaolo Bonzini 4875c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4876cc022ae1SLai Jiangshan int huge_page_level, bool accessed_dirty, 4877cc022ae1SLai Jiangshan gpa_t new_eptp) 4878c50d8ae3SPaolo Bonzini { 48798c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4880bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4881c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4882c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4883bb1fcc70SSean Christopherson execonly, level); 4884c50d8ae3SPaolo Bonzini 4885b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base); 4886c50d8ae3SPaolo Bonzini 4887c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4888c50d8ae3SPaolo Bonzini return; 4889c50d8ae3SPaolo Bonzini 489018db1b17SSean Christopherson context->mmu_role.as_u64 = new_role.as_u64; 489118db1b17SSean Christopherson 4892bb1fcc70SSean Christopherson context->shadow_root_level = level; 4893c50d8ae3SPaolo Bonzini 4894c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4895c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4896c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4897c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4898c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4899bb1fcc70SSean Christopherson context->root_level = level; 4900c50d8ae3SPaolo Bonzini context->direct_map = false; 4901c50d8ae3SPaolo Bonzini 4902c596f147SSean Christopherson update_permission_bitmask(context, true); 490328f091bcSPaolo Bonzini context->pkru_mask = 0; 4904cc022ae1SLai Jiangshan reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level); 4905e8f6e738SJinrong Liang reset_ept_shadow_zero_bits_mask(context, execonly); 4906c50d8ae3SPaolo Bonzini } 4907c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4908c50d8ae3SPaolo Bonzini 4909c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4910c50d8ae3SPaolo Bonzini { 49118c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4912594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4913c50d8ae3SPaolo Bonzini 4914594e91a1SSean Christopherson kvm_init_shadow_mmu(vcpu, ®s); 4915929d1cfaSPaolo Bonzini 4916d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4917c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4918c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4919c50d8ae3SPaolo Bonzini } 4920c50d8ae3SPaolo Bonzini 49218626c120SSean Christopherson static union kvm_mmu_role 49228626c120SSean Christopherson kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu, struct kvm_mmu_role_regs *regs) 4923654430efSSean Christopherson { 49248626c120SSean Christopherson union kvm_mmu_role role; 49258626c120SSean Christopherson 49268626c120SSean Christopherson role = kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 4927654430efSSean Christopherson 4928654430efSSean Christopherson /* 4929654430efSSean Christopherson * Nested MMUs are used only for walking L2's gva->gpa, they never have 4930654430efSSean Christopherson * shadow pages of their own and so "direct" has no meaning. Set it 4931654430efSSean Christopherson * to "true" to try to detect bogus usage of the nested MMU. 4932654430efSSean Christopherson */ 4933654430efSSean Christopherson role.base.direct = true; 4934f4bd6f73SSean Christopherson role.base.level = role_regs_to_root_level(regs); 4935654430efSSean Christopherson return role; 4936654430efSSean Christopherson } 4937654430efSSean Christopherson 4938c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4939c50d8ae3SPaolo Bonzini { 49408626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 49418626c120SSean Christopherson union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu, ®s); 4942c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4943c50d8ae3SPaolo Bonzini 4944c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4945c50d8ae3SPaolo Bonzini return; 4946c50d8ae3SPaolo Bonzini 4947c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4948d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4949c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4950c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 49515472fcd4SSean Christopherson g_context->root_level = new_role.base.level; 4952c50d8ae3SPaolo Bonzini 4953c50d8ae3SPaolo Bonzini /* 49545efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 49555efac074SPaolo Bonzini * SPTEs. 49565efac074SPaolo Bonzini */ 49575efac074SPaolo Bonzini g_context->invlpg = NULL; 49585efac074SPaolo Bonzini 49595efac074SPaolo Bonzini /* 4960c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4961c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4962c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4963c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4964c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4965c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4966c50d8ae3SPaolo Bonzini */ 4967fa4b5588SSean Christopherson if (!is_paging(vcpu)) 49681f5a21eeSLai Jiangshan g_context->gva_to_gpa = nonpaging_gva_to_gpa; 4969fa4b5588SSean Christopherson else if (is_long_mode(vcpu)) 49701f5a21eeSLai Jiangshan g_context->gva_to_gpa = paging64_gva_to_gpa; 4971fa4b5588SSean Christopherson else if (is_pae(vcpu)) 49721f5a21eeSLai Jiangshan g_context->gva_to_gpa = paging64_gva_to_gpa; 4973fa4b5588SSean Christopherson else 49741f5a21eeSLai Jiangshan g_context->gva_to_gpa = paging32_gva_to_gpa; 4975fa4b5588SSean Christopherson 4976533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, g_context); 4977c50d8ae3SPaolo Bonzini } 4978c50d8ae3SPaolo Bonzini 4979c9060662SSean Christopherson void kvm_init_mmu(struct kvm_vcpu *vcpu) 4980c50d8ae3SPaolo Bonzini { 4981c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4982c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4983c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4984c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4985c50d8ae3SPaolo Bonzini else 4986c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4987c50d8ae3SPaolo Bonzini } 4988c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4989c50d8ae3SPaolo Bonzini 4990c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4991c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4992c50d8ae3SPaolo Bonzini { 49938626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4994c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4995c50d8ae3SPaolo Bonzini 4996c50d8ae3SPaolo Bonzini if (tdp_enabled) 49978626c120SSean Christopherson role = kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, true); 4998c50d8ae3SPaolo Bonzini else 49998626c120SSean Christopherson role = kvm_calc_shadow_mmu_root_page_role(vcpu, ®s, true); 5000c50d8ae3SPaolo Bonzini 5001c50d8ae3SPaolo Bonzini return role.base; 5002c50d8ae3SPaolo Bonzini } 5003c50d8ae3SPaolo Bonzini 500449c6f875SSean Christopherson void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) 500549c6f875SSean Christopherson { 500649c6f875SSean Christopherson /* 500749c6f875SSean Christopherson * Invalidate all MMU roles to force them to reinitialize as CPUID 500849c6f875SSean Christopherson * information is factored into reserved bit calculations. 5009feb627e8SVitaly Kuznetsov * 5010feb627e8SVitaly Kuznetsov * Correctly handling multiple vCPU models with respect to paging and 5011feb627e8SVitaly Kuznetsov * physical address properties) in a single VM would require tracking 5012feb627e8SVitaly Kuznetsov * all relevant CPUID information in kvm_mmu_page_role. That is very 5013feb627e8SVitaly Kuznetsov * undesirable as it would increase the memory requirements for 5014feb627e8SVitaly Kuznetsov * gfn_track (see struct kvm_mmu_page_role comments). For now that 5015feb627e8SVitaly Kuznetsov * problem is swept under the rug; KVM's CPUID API is horrific and 5016feb627e8SVitaly Kuznetsov * it's all but impossible to solve it without introducing a new API. 501749c6f875SSean Christopherson */ 501849c6f875SSean Christopherson vcpu->arch.root_mmu.mmu_role.ext.valid = 0; 501949c6f875SSean Christopherson vcpu->arch.guest_mmu.mmu_role.ext.valid = 0; 502049c6f875SSean Christopherson vcpu->arch.nested_mmu.mmu_role.ext.valid = 0; 502149c6f875SSean Christopherson kvm_mmu_reset_context(vcpu); 502263f5a190SSean Christopherson 502363f5a190SSean Christopherson /* 5024feb627e8SVitaly Kuznetsov * Changing guest CPUID after KVM_RUN is forbidden, see the comment in 5025feb627e8SVitaly Kuznetsov * kvm_arch_vcpu_ioctl(). 502663f5a190SSean Christopherson */ 5027feb627e8SVitaly Kuznetsov KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm); 502849c6f875SSean Christopherson } 502949c6f875SSean Christopherson 5030c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 5031c50d8ae3SPaolo Bonzini { 5032c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5033c9060662SSean Christopherson kvm_init_mmu(vcpu); 5034c50d8ae3SPaolo Bonzini } 5035c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 5036c50d8ae3SPaolo Bonzini 5037c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 5038c50d8ae3SPaolo Bonzini { 5039c50d8ae3SPaolo Bonzini int r; 5040c50d8ae3SPaolo Bonzini 5041378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 5042c50d8ae3SPaolo Bonzini if (r) 5043c50d8ae3SPaolo Bonzini goto out; 5044748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 5045c50d8ae3SPaolo Bonzini if (r) 5046c50d8ae3SPaolo Bonzini goto out; 50474a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 50486e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 50496e6ec584SSean Christopherson else 50506e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 5051c50d8ae3SPaolo Bonzini if (r) 5052c50d8ae3SPaolo Bonzini goto out; 5053a91f387bSSean Christopherson 5054a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 5055a91f387bSSean Christopherson 5056727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 5057e27bc044SSean Christopherson static_call(kvm_x86_flush_tlb_current)(vcpu); 5058c50d8ae3SPaolo Bonzini out: 5059c50d8ae3SPaolo Bonzini return r; 5060c50d8ae3SPaolo Bonzini } 5061c50d8ae3SPaolo Bonzini 5062c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 5063c50d8ae3SPaolo Bonzini { 5064c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 5065*b9e5603cSPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa)); 5066c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 5067*b9e5603cSPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa)); 5068c50d8ae3SPaolo Bonzini } 5069c50d8ae3SPaolo Bonzini 5070c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 5071c50d8ae3SPaolo Bonzini { 5072c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 5073c50d8ae3SPaolo Bonzini return false; 5074c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 5075c50d8ae3SPaolo Bonzini return true; 5076c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 5077c50d8ae3SPaolo Bonzini return true; 5078c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 5079c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 5080c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 5081c50d8ae3SPaolo Bonzini } 5082c50d8ae3SPaolo Bonzini 5083c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 5084c50d8ae3SPaolo Bonzini int *bytes) 5085c50d8ae3SPaolo Bonzini { 5086c50d8ae3SPaolo Bonzini u64 gentry = 0; 5087c50d8ae3SPaolo Bonzini int r; 5088c50d8ae3SPaolo Bonzini 5089c50d8ae3SPaolo Bonzini /* 5090c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 5091c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 5092c50d8ae3SPaolo Bonzini * when they have the same mode. 5093c50d8ae3SPaolo Bonzini */ 5094c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5095c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5096c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5097c50d8ae3SPaolo Bonzini *bytes = 8; 5098c50d8ae3SPaolo Bonzini } 5099c50d8ae3SPaolo Bonzini 5100c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5101c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5102c50d8ae3SPaolo Bonzini if (r) 5103c50d8ae3SPaolo Bonzini gentry = 0; 5104c50d8ae3SPaolo Bonzini } 5105c50d8ae3SPaolo Bonzini 5106c50d8ae3SPaolo Bonzini return gentry; 5107c50d8ae3SPaolo Bonzini } 5108c50d8ae3SPaolo Bonzini 5109c50d8ae3SPaolo Bonzini /* 5110c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5111c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5112c50d8ae3SPaolo Bonzini */ 5113c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5114c50d8ae3SPaolo Bonzini { 5115c50d8ae3SPaolo Bonzini /* 5116c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5117c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5118c50d8ae3SPaolo Bonzini */ 51193bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5120c50d8ae3SPaolo Bonzini return false; 5121c50d8ae3SPaolo Bonzini 5122c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5123c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5124c50d8ae3SPaolo Bonzini } 5125c50d8ae3SPaolo Bonzini 5126c50d8ae3SPaolo Bonzini /* 5127c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5128c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5129c50d8ae3SPaolo Bonzini */ 5130c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5131c50d8ae3SPaolo Bonzini int bytes) 5132c50d8ae3SPaolo Bonzini { 5133c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5134c50d8ae3SPaolo Bonzini 5135c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5136c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5137c50d8ae3SPaolo Bonzini 5138c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5139bb3b394dSLai Jiangshan pte_size = sp->role.has_4_byte_gpte ? 4 : 8; 5140c50d8ae3SPaolo Bonzini 5141c50d8ae3SPaolo Bonzini /* 5142c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5143c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5144c50d8ae3SPaolo Bonzini */ 5145c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5146c50d8ae3SPaolo Bonzini return false; 5147c50d8ae3SPaolo Bonzini 5148c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5149c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5150c50d8ae3SPaolo Bonzini 5151c50d8ae3SPaolo Bonzini return misaligned; 5152c50d8ae3SPaolo Bonzini } 5153c50d8ae3SPaolo Bonzini 5154c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5155c50d8ae3SPaolo Bonzini { 5156c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5157c50d8ae3SPaolo Bonzini u64 *spte; 5158c50d8ae3SPaolo Bonzini int level; 5159c50d8ae3SPaolo Bonzini 5160c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5161c50d8ae3SPaolo Bonzini level = sp->role.level; 5162c50d8ae3SPaolo Bonzini *nspte = 1; 5163bb3b394dSLai Jiangshan if (sp->role.has_4_byte_gpte) { 5164c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5165c50d8ae3SPaolo Bonzini /* 5166c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5167c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5168c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5169c50d8ae3SPaolo Bonzini */ 5170c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5171c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5172c50d8ae3SPaolo Bonzini page_offset <<= 1; 5173c50d8ae3SPaolo Bonzini *nspte = 2; 5174c50d8ae3SPaolo Bonzini } 5175c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5176c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5177c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5178c50d8ae3SPaolo Bonzini return NULL; 5179c50d8ae3SPaolo Bonzini } 5180c50d8ae3SPaolo Bonzini 5181c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5182c50d8ae3SPaolo Bonzini return spte; 5183c50d8ae3SPaolo Bonzini } 5184c50d8ae3SPaolo Bonzini 5185c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5186c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5187c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5188c50d8ae3SPaolo Bonzini { 5189c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5190c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5191c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5192c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5193c50d8ae3SPaolo Bonzini int npte; 519406152b2dSLai Jiangshan bool flush = false; 5195c50d8ae3SPaolo Bonzini 5196c50d8ae3SPaolo Bonzini /* 5197c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5198c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5199c50d8ae3SPaolo Bonzini */ 5200c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5201c50d8ae3SPaolo Bonzini return; 5202c50d8ae3SPaolo Bonzini 5203c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5204c50d8ae3SPaolo Bonzini 5205c50d8ae3SPaolo Bonzini /* 5206c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5207d9f6e12fSIngo Molnar * or not since pte prefetch is skipped if it does not have 5208c50d8ae3SPaolo Bonzini * enough objects in the cache. 5209c50d8ae3SPaolo Bonzini */ 5210378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5211c50d8ae3SPaolo Bonzini 5212531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5213c50d8ae3SPaolo Bonzini 5214c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5215c50d8ae3SPaolo Bonzini 5216c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5217c50d8ae3SPaolo Bonzini 5218c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5219c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5220c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5221c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5222c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5223c50d8ae3SPaolo Bonzini continue; 5224c50d8ae3SPaolo Bonzini } 5225c50d8ae3SPaolo Bonzini 5226c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5227c50d8ae3SPaolo Bonzini if (!spte) 5228c50d8ae3SPaolo Bonzini continue; 5229c50d8ae3SPaolo Bonzini 5230c50d8ae3SPaolo Bonzini while (npte--) { 5231c50d8ae3SPaolo Bonzini entry = *spte; 52322de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5233c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5234c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5235c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 523606152b2dSLai Jiangshan flush = true; 5237c50d8ae3SPaolo Bonzini ++spte; 5238c50d8ae3SPaolo Bonzini } 5239c50d8ae3SPaolo Bonzini } 524006152b2dSLai Jiangshan kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); 5241531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5242c50d8ae3SPaolo Bonzini } 5243c50d8ae3SPaolo Bonzini 5244736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5245c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5246c50d8ae3SPaolo Bonzini { 524792daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5248c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5249c50d8ae3SPaolo Bonzini 5250*b9e5603cSPaolo Bonzini if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa))) 5251ddce6208SSean Christopherson return RET_PF_RETRY; 5252ddce6208SSean Christopherson 5253c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5254c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5255736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5256c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5257c50d8ae3SPaolo Bonzini goto emulate; 5258c50d8ae3SPaolo Bonzini } 5259c50d8ae3SPaolo Bonzini 5260c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 52617a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 52627a02674dSSean Christopherson lower_32_bits(error_code), false); 526319025e7bSSean Christopherson if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) 52647b367bc9SSean Christopherson return -EIO; 5265c50d8ae3SPaolo Bonzini } 5266c50d8ae3SPaolo Bonzini 5267c50d8ae3SPaolo Bonzini if (r < 0) 5268c50d8ae3SPaolo Bonzini return r; 526983a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 527083a2ba4cSSean Christopherson return 1; 5271c50d8ae3SPaolo Bonzini 5272c50d8ae3SPaolo Bonzini /* 5273c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5274c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5275c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5276c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5277c50d8ae3SPaolo Bonzini * and resume the guest. 5278c50d8ae3SPaolo Bonzini */ 5279c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5280c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5281736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5282c50d8ae3SPaolo Bonzini return 1; 5283c50d8ae3SPaolo Bonzini } 5284c50d8ae3SPaolo Bonzini 5285c50d8ae3SPaolo Bonzini /* 5286c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5287c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5288c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5289c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5290c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5291c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5292c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5293c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5294c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5295c50d8ae3SPaolo Bonzini */ 5296736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 529792daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5298c50d8ae3SPaolo Bonzini emulate: 5299736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5300c50d8ae3SPaolo Bonzini insn_len); 5301c50d8ae3SPaolo Bonzini } 5302c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5303c50d8ae3SPaolo Bonzini 53045efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 53055efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5306c50d8ae3SPaolo Bonzini { 5307c50d8ae3SPaolo Bonzini int i; 5308c50d8ae3SPaolo Bonzini 53095efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 53105efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 53115efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5312c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5313c50d8ae3SPaolo Bonzini return; 5314c50d8ae3SPaolo Bonzini 5315e27bc044SSean Christopherson static_call(kvm_x86_flush_tlb_gva)(vcpu, gva); 53165efac074SPaolo Bonzini } 53175efac074SPaolo Bonzini 53185efac074SPaolo Bonzini if (!mmu->invlpg) 53195efac074SPaolo Bonzini return; 53205efac074SPaolo Bonzini 53215efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5322*b9e5603cSPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root.hpa); 5323c50d8ae3SPaolo Bonzini 5324c50d8ae3SPaolo Bonzini /* 5325c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5326c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5327c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5328c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5329c50d8ae3SPaolo Bonzini * just always sync it. 5330c50d8ae3SPaolo Bonzini * 5331c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5332c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5333c50d8ae3SPaolo Bonzini * for them. 5334c50d8ae3SPaolo Bonzini */ 5335c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5336c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5337c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 53385efac074SPaolo Bonzini } else { 53395efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 53405efac074SPaolo Bonzini } 53415efac074SPaolo Bonzini } 5342c50d8ae3SPaolo Bonzini 53435efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 53445efac074SPaolo Bonzini { 534505b29633SLai Jiangshan kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE); 5346c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5347c50d8ae3SPaolo Bonzini } 5348c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5349c50d8ae3SPaolo Bonzini 53505efac074SPaolo Bonzini 5351c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5352c50d8ae3SPaolo Bonzini { 5353c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5354c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5355c50d8ae3SPaolo Bonzini uint i; 5356c50d8ae3SPaolo Bonzini 5357c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5358*b9e5603cSPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root.hpa); 5359c50d8ae3SPaolo Bonzini tlb_flush = true; 5360c50d8ae3SPaolo Bonzini } 5361c50d8ae3SPaolo Bonzini 5362c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5363c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5364be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5365c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5366c50d8ae3SPaolo Bonzini tlb_flush = true; 5367c50d8ae3SPaolo Bonzini } 5368c50d8ae3SPaolo Bonzini } 5369c50d8ae3SPaolo Bonzini 5370c50d8ae3SPaolo Bonzini if (tlb_flush) 5371e27bc044SSean Christopherson static_call(kvm_x86_flush_tlb_gva)(vcpu, gva); 5372c50d8ae3SPaolo Bonzini 5373c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5374c50d8ae3SPaolo Bonzini 5375c50d8ae3SPaolo Bonzini /* 5376c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5377c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5378c50d8ae3SPaolo Bonzini * for them. 5379c50d8ae3SPaolo Bonzini */ 5380c50d8ae3SPaolo Bonzini } 5381c50d8ae3SPaolo Bonzini 5382746700d2SWei Huang void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 5383746700d2SWei Huang int tdp_max_root_level, int tdp_huge_page_level) 5384c50d8ae3SPaolo Bonzini { 5385bde77235SSean Christopherson tdp_enabled = enable_tdp; 5386746700d2SWei Huang tdp_root_level = tdp_forced_root_level; 538783013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5388703c335dSSean Christopherson 5389703c335dSSean Christopherson /* 53901d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5391703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5392703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5393703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5394703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5395703c335dSSean Christopherson */ 5396703c335dSSean Christopherson if (tdp_enabled) 53971d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5398703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 53991d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5400703c335dSSean Christopherson else 54011d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5402c50d8ae3SPaolo Bonzini } 5403bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5404c50d8ae3SPaolo Bonzini 5405c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5406269e9552SHamza Mahfooz typedef bool (*slot_level_handler) (struct kvm *kvm, 5407269e9552SHamza Mahfooz struct kvm_rmap_head *rmap_head, 5408269e9552SHamza Mahfooz const struct kvm_memory_slot *slot); 5409c50d8ae3SPaolo Bonzini 5410c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5411c50d8ae3SPaolo Bonzini static __always_inline bool 5412269e9552SHamza Mahfooz slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5413c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 54141a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 54151a61b7dbSSean Christopherson bool flush) 5416c50d8ae3SPaolo Bonzini { 5417c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5418c50d8ae3SPaolo Bonzini 5419c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5420c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5421c50d8ae3SPaolo Bonzini if (iterator.rmap) 54220a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5423c50d8ae3SPaolo Bonzini 5424531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5425302695a5SSean Christopherson if (flush && flush_on_yield) { 5426c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5427c50d8ae3SPaolo Bonzini start_gfn, 5428c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5429c50d8ae3SPaolo Bonzini flush = false; 5430c50d8ae3SPaolo Bonzini } 5431531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5432c50d8ae3SPaolo Bonzini } 5433c50d8ae3SPaolo Bonzini } 5434c50d8ae3SPaolo Bonzini 5435c50d8ae3SPaolo Bonzini return flush; 5436c50d8ae3SPaolo Bonzini } 5437c50d8ae3SPaolo Bonzini 5438c50d8ae3SPaolo Bonzini static __always_inline bool 5439269e9552SHamza Mahfooz slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5440c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5441302695a5SSean Christopherson bool flush_on_yield) 5442c50d8ae3SPaolo Bonzini { 5443c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5444c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5445c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 54461a61b7dbSSean Christopherson flush_on_yield, false); 5447c50d8ae3SPaolo Bonzini } 5448c50d8ae3SPaolo Bonzini 5449c50d8ae3SPaolo Bonzini static __always_inline bool 5450610265eaSDavid Matlack slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5451302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5452c50d8ae3SPaolo Bonzini { 54533bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5454302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5455c50d8ae3SPaolo Bonzini } 5456c50d8ae3SPaolo Bonzini 5457c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5458c50d8ae3SPaolo Bonzini { 54594a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 54604a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5461c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 546203ca4589SSean Christopherson free_page((unsigned long)mmu->pml4_root); 5463cb0f722aSWei Huang free_page((unsigned long)mmu->pml5_root); 5464c50d8ae3SPaolo Bonzini } 5465c50d8ae3SPaolo Bonzini 546604d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5467c50d8ae3SPaolo Bonzini { 5468c50d8ae3SPaolo Bonzini struct page *page; 5469c50d8ae3SPaolo Bonzini int i; 5470c50d8ae3SPaolo Bonzini 5471*b9e5603cSPaolo Bonzini mmu->root.hpa = INVALID_PAGE; 5472*b9e5603cSPaolo Bonzini mmu->root.pgd = 0; 547304d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 547404d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 547504d28e37SSean Christopherson 547627f4fca2SLai Jiangshan /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */ 547727f4fca2SLai Jiangshan if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu) 547827f4fca2SLai Jiangshan return 0; 547927f4fca2SLai Jiangshan 5480c50d8ae3SPaolo Bonzini /* 5481c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5482c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5483c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5484c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 548504d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 548604d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 548704d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 548804d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 548984432316SLai Jiangshan * KVM; that horror is handled on-demand by mmu_alloc_special_roots(). 5490c50d8ae3SPaolo Bonzini */ 5491d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5492c50d8ae3SPaolo Bonzini return 0; 5493c50d8ae3SPaolo Bonzini 5494c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5495c50d8ae3SPaolo Bonzini if (!page) 5496c50d8ae3SPaolo Bonzini return -ENOMEM; 5497c50d8ae3SPaolo Bonzini 5498c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 54994a98623dSSean Christopherson 55004a98623dSSean Christopherson /* 55014a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 55024a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 55034a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 55044a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 55054a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 55064a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 55074a98623dSSean Christopherson */ 55084a98623dSSean Christopherson if (!tdp_enabled) 55094a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 55104a98623dSSean Christopherson else 55114a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 55124a98623dSSean Christopherson 5513c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5514c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5515c50d8ae3SPaolo Bonzini 5516c50d8ae3SPaolo Bonzini return 0; 5517c50d8ae3SPaolo Bonzini } 5518c50d8ae3SPaolo Bonzini 5519c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5520c50d8ae3SPaolo Bonzini { 5521c50d8ae3SPaolo Bonzini int ret; 5522c50d8ae3SPaolo Bonzini 55235962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 55245f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 55255f6078f9SSean Christopherson 55265962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 55275f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 55285962bfb7SSean Christopherson 552996880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 553096880883SSean Christopherson 5531c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5532c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5533c50d8ae3SPaolo Bonzini 553404d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5535c50d8ae3SPaolo Bonzini if (ret) 5536c50d8ae3SPaolo Bonzini return ret; 5537c50d8ae3SPaolo Bonzini 553804d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5539c50d8ae3SPaolo Bonzini if (ret) 5540c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5541c50d8ae3SPaolo Bonzini 5542c50d8ae3SPaolo Bonzini return ret; 5543c50d8ae3SPaolo Bonzini fail_allocate_root: 5544c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5545c50d8ae3SPaolo Bonzini return ret; 5546c50d8ae3SPaolo Bonzini } 5547c50d8ae3SPaolo Bonzini 5548c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5549c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5550c50d8ae3SPaolo Bonzini { 5551c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5552c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5553c50d8ae3SPaolo Bonzini 5554c50d8ae3SPaolo Bonzini restart: 5555c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5556c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5557c50d8ae3SPaolo Bonzini /* 5558c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5559c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5560c50d8ae3SPaolo Bonzini */ 5561c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5562c50d8ae3SPaolo Bonzini break; 5563c50d8ae3SPaolo Bonzini 5564c50d8ae3SPaolo Bonzini /* 5565f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5566f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5567f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5568c50d8ae3SPaolo Bonzini */ 5569f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5570c50d8ae3SPaolo Bonzini continue; 5571c50d8ae3SPaolo Bonzini 5572c50d8ae3SPaolo Bonzini /* 5573c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5574c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5575c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5576c50d8ae3SPaolo Bonzini * be in active use by the guest. 5577c50d8ae3SPaolo Bonzini */ 5578c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5579531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5580c50d8ae3SPaolo Bonzini batch = 0; 5581c50d8ae3SPaolo Bonzini goto restart; 5582c50d8ae3SPaolo Bonzini } 5583c50d8ae3SPaolo Bonzini 5584c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5585c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5586c50d8ae3SPaolo Bonzini batch += nr_zapped; 5587c50d8ae3SPaolo Bonzini goto restart; 5588c50d8ae3SPaolo Bonzini } 5589c50d8ae3SPaolo Bonzini } 5590c50d8ae3SPaolo Bonzini 5591c50d8ae3SPaolo Bonzini /* 5592c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5593c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5594c50d8ae3SPaolo Bonzini * may reference the pages. 5595c50d8ae3SPaolo Bonzini */ 5596c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5597c50d8ae3SPaolo Bonzini } 5598c50d8ae3SPaolo Bonzini 5599c50d8ae3SPaolo Bonzini /* 5600c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5601c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5602c50d8ae3SPaolo Bonzini * 5603c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5604c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5605c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5606c50d8ae3SPaolo Bonzini * after calling the function. 5607c50d8ae3SPaolo Bonzini */ 5608c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5609c50d8ae3SPaolo Bonzini { 5610c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5611c50d8ae3SPaolo Bonzini 5612531810caSBen Gardon write_lock(&kvm->mmu_lock); 5613c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5614c50d8ae3SPaolo Bonzini 5615c50d8ae3SPaolo Bonzini /* 5616c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5617c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5618c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5619c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5620c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5621c50d8ae3SPaolo Bonzini */ 5622c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5623c50d8ae3SPaolo Bonzini 5624b7cccd39SBen Gardon /* In order to ensure all threads see this change when 5625b7cccd39SBen Gardon * handling the MMU reload signal, this must happen in the 5626b7cccd39SBen Gardon * same critical section as kvm_reload_remote_mmus, and 5627b7cccd39SBen Gardon * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages 5628b7cccd39SBen Gardon * could drop the MMU lock and yield. 5629b7cccd39SBen Gardon */ 5630b7cccd39SBen Gardon if (is_tdp_mmu_enabled(kvm)) 5631b7cccd39SBen Gardon kvm_tdp_mmu_invalidate_all_roots(kvm); 5632b7cccd39SBen Gardon 5633c50d8ae3SPaolo Bonzini /* 5634c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5635c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5636c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5637c50d8ae3SPaolo Bonzini * 5638c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5639c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5640c50d8ae3SPaolo Bonzini */ 5641c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5642c50d8ae3SPaolo Bonzini 5643c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5644faaf05b0SBen Gardon 5645531810caSBen Gardon write_unlock(&kvm->mmu_lock); 56464c6654bdSBen Gardon 56474c6654bdSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 56484c6654bdSBen Gardon read_lock(&kvm->mmu_lock); 56494c6654bdSBen Gardon kvm_tdp_mmu_zap_invalidated_roots(kvm); 56504c6654bdSBen Gardon read_unlock(&kvm->mmu_lock); 56514c6654bdSBen Gardon } 5652c50d8ae3SPaolo Bonzini } 5653c50d8ae3SPaolo Bonzini 5654c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5655c50d8ae3SPaolo Bonzini { 5656c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5657c50d8ae3SPaolo Bonzini } 5658c50d8ae3SPaolo Bonzini 5659c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5660c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5661c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5662c50d8ae3SPaolo Bonzini { 5663c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5664c50d8ae3SPaolo Bonzini } 5665c50d8ae3SPaolo Bonzini 5666c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5667c50d8ae3SPaolo Bonzini { 5668c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5669c50d8ae3SPaolo Bonzini 5670ce25681dSSean Christopherson spin_lock_init(&kvm->arch.mmu_unsync_pages_lock); 5671ce25681dSSean Christopherson 56721e76a3ceSDavid Stevens kvm_mmu_init_tdp_mmu(kvm); 5673fe5db27dSBen Gardon 5674c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5675c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5676c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5677c50d8ae3SPaolo Bonzini } 5678c50d8ae3SPaolo Bonzini 5679c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5680c50d8ae3SPaolo Bonzini { 5681c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5682c50d8ae3SPaolo Bonzini 5683c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5684fe5db27dSBen Gardon 5685fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5686c50d8ae3SPaolo Bonzini } 5687c50d8ae3SPaolo Bonzini 568821fa3246SSean Christopherson static bool __kvm_zap_rmaps(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 568921fa3246SSean Christopherson { 569021fa3246SSean Christopherson const struct kvm_memory_slot *memslot; 569121fa3246SSean Christopherson struct kvm_memslots *slots; 5692f4209439SMaciej S. Szmigiero struct kvm_memslot_iter iter; 569321fa3246SSean Christopherson bool flush = false; 569421fa3246SSean Christopherson gfn_t start, end; 5695f4209439SMaciej S. Szmigiero int i; 569621fa3246SSean Christopherson 569721fa3246SSean Christopherson if (!kvm_memslots_have_rmaps(kvm)) 569821fa3246SSean Christopherson return flush; 569921fa3246SSean Christopherson 570021fa3246SSean Christopherson for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 570121fa3246SSean Christopherson slots = __kvm_memslots(kvm, i); 5702f4209439SMaciej S. Szmigiero 5703f4209439SMaciej S. Szmigiero kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) { 5704f4209439SMaciej S. Szmigiero memslot = iter.slot; 570521fa3246SSean Christopherson start = max(gfn_start, memslot->base_gfn); 570621fa3246SSean Christopherson end = min(gfn_end, memslot->base_gfn + memslot->npages); 5707f4209439SMaciej S. Szmigiero if (WARN_ON_ONCE(start >= end)) 570821fa3246SSean Christopherson continue; 570921fa3246SSean Christopherson 571021fa3246SSean Christopherson flush = slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, 57116ff94f27SDavid Matlack 571221fa3246SSean Christopherson PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 571321fa3246SSean Christopherson start, end - 1, true, flush); 571421fa3246SSean Christopherson } 571521fa3246SSean Christopherson } 571621fa3246SSean Christopherson 571721fa3246SSean Christopherson return flush; 571821fa3246SSean Christopherson } 571921fa3246SSean Christopherson 572088f58535SMaxim Levitsky /* 572188f58535SMaxim Levitsky * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end 572288f58535SMaxim Levitsky * (not including it) 572388f58535SMaxim Levitsky */ 5724c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5725c50d8ae3SPaolo Bonzini { 572621fa3246SSean Christopherson bool flush; 5727c50d8ae3SPaolo Bonzini int i; 5728c50d8ae3SPaolo Bonzini 5729f4209439SMaciej S. Szmigiero if (WARN_ON_ONCE(gfn_end <= gfn_start)) 5730f4209439SMaciej S. Szmigiero return; 5731f4209439SMaciej S. Szmigiero 5732531810caSBen Gardon write_lock(&kvm->mmu_lock); 57335a324c24SSean Christopherson 5734edb298c6SMaxim Levitsky kvm_inc_notifier_count(kvm, gfn_start, gfn_end); 5735edb298c6SMaxim Levitsky 573621fa3246SSean Christopherson flush = __kvm_zap_rmaps(kvm, gfn_start, gfn_end); 57376103bc07SBen Gardon 57386103bc07SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57396103bc07SBen Gardon for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 57406103bc07SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 57415a324c24SSean Christopherson gfn_end, flush); 57426103bc07SBen Gardon } 57435a324c24SSean Christopherson 57445a324c24SSean Christopherson if (flush) 5745bc3b3c10SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 5746bc3b3c10SSean Christopherson gfn_end - gfn_start); 57475a324c24SSean Christopherson 5748edb298c6SMaxim Levitsky kvm_dec_notifier_count(kvm, gfn_start, gfn_end); 5749edb298c6SMaxim Levitsky 57505a324c24SSean Christopherson write_unlock(&kvm->mmu_lock); 5751c50d8ae3SPaolo Bonzini } 5752c50d8ae3SPaolo Bonzini 5753c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 57540a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5755269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5756c50d8ae3SPaolo Bonzini { 57571346bbb6SDavid Matlack return rmap_write_protect(rmap_head, false); 5758c50d8ae3SPaolo Bonzini } 5759c50d8ae3SPaolo Bonzini 5760c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 5761269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot, 57623c9bd400SJay Zhou int start_level) 5763c50d8ae3SPaolo Bonzini { 5764e2209710SBen Gardon bool flush = false; 5765c50d8ae3SPaolo Bonzini 5766e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5767531810caSBen Gardon write_lock(&kvm->mmu_lock); 57683c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5769e2209710SBen Gardon start_level, KVM_MAX_HUGEPAGE_LEVEL, 5770e2209710SBen Gardon false); 5771531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5772e2209710SBen Gardon } 5773c50d8ae3SPaolo Bonzini 577424ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 577524ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 577624ae4cfaSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 577724ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 577824ae4cfaSBen Gardon } 577924ae4cfaSBen Gardon 5780c50d8ae3SPaolo Bonzini /* 57816ff94f27SDavid Matlack * Flush TLBs if any SPTEs had to be write-protected to ensure that 57826ff94f27SDavid Matlack * guest writes are reflected in the dirty bitmap before the memslot 57836ff94f27SDavid Matlack * update completes, i.e. before enabling dirty logging is visible to 57846ff94f27SDavid Matlack * userspace. 57856ff94f27SDavid Matlack * 57866ff94f27SDavid Matlack * Perform the TLB flush outside the mmu_lock to reduce the amount of 57876ff94f27SDavid Matlack * time the lock is held. However, this does mean that another CPU can 57886ff94f27SDavid Matlack * now grab mmu_lock and encounter a write-protected SPTE while CPUs 57896ff94f27SDavid Matlack * still have a writable mapping for the associated GFN in their TLB. 57906ff94f27SDavid Matlack * 57916ff94f27SDavid Matlack * This is safe but requires KVM to be careful when making decisions 57926ff94f27SDavid Matlack * based on the write-protection status of an SPTE. Specifically, KVM 57936ff94f27SDavid Matlack * also write-protects SPTEs to monitor changes to guest page tables 57946ff94f27SDavid Matlack * during shadow paging, and must guarantee no CPUs can write to those 57956ff94f27SDavid Matlack * page before the lock is dropped. As mentioned in the previous 57966ff94f27SDavid Matlack * paragraph, a write-protected SPTE is no guarantee that CPU cannot 57976ff94f27SDavid Matlack * perform writes. So to determine if a TLB flush is truly required, KVM 57986ff94f27SDavid Matlack * will clear a separate software-only bit (MMU-writable) and skip the 57996ff94f27SDavid Matlack * flush if-and-only-if this bit was already clear. 58006ff94f27SDavid Matlack * 580102844ac1SDavid Matlack * See is_writable_pte() for more details. 5802c50d8ae3SPaolo Bonzini */ 5803c50d8ae3SPaolo Bonzini if (flush) 58047f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5805c50d8ae3SPaolo Bonzini } 5806c50d8ae3SPaolo Bonzini 5807cb00a70bSDavid Matlack /* Must be called with the mmu_lock held in write-mode. */ 5808cb00a70bSDavid Matlack void kvm_mmu_try_split_huge_pages(struct kvm *kvm, 5809cb00a70bSDavid Matlack const struct kvm_memory_slot *memslot, 5810cb00a70bSDavid Matlack u64 start, u64 end, 5811cb00a70bSDavid Matlack int target_level) 5812cb00a70bSDavid Matlack { 5813cb00a70bSDavid Matlack if (is_tdp_mmu_enabled(kvm)) 5814cb00a70bSDavid Matlack kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, 5815cb00a70bSDavid Matlack target_level, false); 5816cb00a70bSDavid Matlack 5817cb00a70bSDavid Matlack /* 5818cb00a70bSDavid Matlack * A TLB flush is unnecessary at this point for the same resons as in 5819cb00a70bSDavid Matlack * kvm_mmu_slot_try_split_huge_pages(). 5820cb00a70bSDavid Matlack */ 5821cb00a70bSDavid Matlack } 5822cb00a70bSDavid Matlack 5823a3fe5dbdSDavid Matlack void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm, 5824a3fe5dbdSDavid Matlack const struct kvm_memory_slot *memslot, 5825a3fe5dbdSDavid Matlack int target_level) 5826a3fe5dbdSDavid Matlack { 5827a3fe5dbdSDavid Matlack u64 start = memslot->base_gfn; 5828a3fe5dbdSDavid Matlack u64 end = start + memslot->npages; 5829a3fe5dbdSDavid Matlack 5830a3fe5dbdSDavid Matlack if (is_tdp_mmu_enabled(kvm)) { 5831a3fe5dbdSDavid Matlack read_lock(&kvm->mmu_lock); 5832cb00a70bSDavid Matlack kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true); 5833a3fe5dbdSDavid Matlack read_unlock(&kvm->mmu_lock); 5834a3fe5dbdSDavid Matlack } 5835a3fe5dbdSDavid Matlack 5836a3fe5dbdSDavid Matlack /* 5837a3fe5dbdSDavid Matlack * No TLB flush is necessary here. KVM will flush TLBs after 5838a3fe5dbdSDavid Matlack * write-protecting and/or clearing dirty on the newly split SPTEs to 5839a3fe5dbdSDavid Matlack * ensure that guest writes are reflected in the dirty log before the 5840a3fe5dbdSDavid Matlack * ioctl to enable dirty logging on this memslot completes. Since the 5841a3fe5dbdSDavid Matlack * split SPTEs retain the write and dirty bits of the huge SPTE, it is 5842a3fe5dbdSDavid Matlack * safe for KVM to decide if a TLB flush is necessary based on the split 5843a3fe5dbdSDavid Matlack * SPTEs. 5844a3fe5dbdSDavid Matlack */ 5845a3fe5dbdSDavid Matlack } 5846a3fe5dbdSDavid Matlack 5847c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 58480a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5849269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5850c50d8ae3SPaolo Bonzini { 5851c50d8ae3SPaolo Bonzini u64 *sptep; 5852c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5853c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5854c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5855c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5856c50d8ae3SPaolo Bonzini 5857c50d8ae3SPaolo Bonzini restart: 5858c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 585957354682SSean Christopherson sp = sptep_to_sp(sptep); 5860c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5861c50d8ae3SPaolo Bonzini 5862c50d8ae3SPaolo Bonzini /* 5863c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5864c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5865c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5866c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5867c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5868c50d8ae3SPaolo Bonzini */ 5869c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 58709eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 58719eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 587271f51d2cSMingwei Zhang pte_list_remove(kvm, rmap_head, sptep); 5873c50d8ae3SPaolo Bonzini 5874c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5875c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5876c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5877c50d8ae3SPaolo Bonzini else 5878c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5879c50d8ae3SPaolo Bonzini 5880c50d8ae3SPaolo Bonzini goto restart; 5881c50d8ae3SPaolo Bonzini } 5882c50d8ae3SPaolo Bonzini } 5883c50d8ae3SPaolo Bonzini 5884c50d8ae3SPaolo Bonzini return need_tlb_flush; 5885c50d8ae3SPaolo Bonzini } 5886c50d8ae3SPaolo Bonzini 5887c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5888269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5889c50d8ae3SPaolo Bonzini { 5890e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5891531810caSBen Gardon write_lock(&kvm->mmu_lock); 5892610265eaSDavid Matlack /* 5893610265eaSDavid Matlack * Zap only 4k SPTEs since the legacy MMU only supports dirty 5894610265eaSDavid Matlack * logging at a 4k granularity and never creates collapsible 5895610265eaSDavid Matlack * 2m SPTEs during dirty logging. 5896610265eaSDavid Matlack */ 58974b85c921SSean Christopherson if (slot_handle_level_4k(kvm, slot, kvm_mmu_zap_collapsible_spte, true)) 5898302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 5899531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5900e2209710SBen Gardon } 59012db6f772SBen Gardon 59022db6f772SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 59032db6f772SBen Gardon read_lock(&kvm->mmu_lock); 59044b85c921SSean Christopherson kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot); 59052db6f772SBen Gardon read_unlock(&kvm->mmu_lock); 59062db6f772SBen Gardon } 5907c50d8ae3SPaolo Bonzini } 5908c50d8ae3SPaolo Bonzini 5909b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 59106c9dd6d2SPaolo Bonzini const struct kvm_memory_slot *memslot) 5911b3594ffbSSean Christopherson { 5912b3594ffbSSean Christopherson /* 59137f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5914302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 59157f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 59167f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 59177f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5918b3594ffbSSean Christopherson */ 5919b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5920cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5921cec37648SSean Christopherson memslot->npages); 5922b3594ffbSSean Christopherson } 5923b3594ffbSSean Christopherson 5924c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5925269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot) 5926c50d8ae3SPaolo Bonzini { 5927e2209710SBen Gardon bool flush = false; 5928c50d8ae3SPaolo Bonzini 5929e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5930531810caSBen Gardon write_lock(&kvm->mmu_lock); 5931610265eaSDavid Matlack /* 5932610265eaSDavid Matlack * Clear dirty bits only on 4k SPTEs since the legacy MMU only 5933610265eaSDavid Matlack * support dirty logging at a 4k granularity. 5934610265eaSDavid Matlack */ 5935610265eaSDavid Matlack flush = slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false); 5936531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5937e2209710SBen Gardon } 5938c50d8ae3SPaolo Bonzini 593924ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 594024ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 594124ae4cfaSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 594224ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 594324ae4cfaSBen Gardon } 594424ae4cfaSBen Gardon 5945c50d8ae3SPaolo Bonzini /* 5946c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5947c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5948c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5949c50d8ae3SPaolo Bonzini * dirty_bitmap. 5950c50d8ae3SPaolo Bonzini */ 5951c50d8ae3SPaolo Bonzini if (flush) 59527f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5953c50d8ae3SPaolo Bonzini } 5954c50d8ae3SPaolo Bonzini 5955c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5956c50d8ae3SPaolo Bonzini { 5957c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5958c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5959c50d8ae3SPaolo Bonzini int ign; 5960c50d8ae3SPaolo Bonzini 5961531810caSBen Gardon write_lock(&kvm->mmu_lock); 5962c50d8ae3SPaolo Bonzini restart: 5963c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5964f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5965c50d8ae3SPaolo Bonzini continue; 5966c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5967c50d8ae3SPaolo Bonzini goto restart; 5968531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5969c50d8ae3SPaolo Bonzini goto restart; 5970c50d8ae3SPaolo Bonzini } 5971c50d8ae3SPaolo Bonzini 5972c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5973faaf05b0SBen Gardon 5974897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5975faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5976faaf05b0SBen Gardon 5977531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5978c50d8ae3SPaolo Bonzini } 5979c50d8ae3SPaolo Bonzini 5980c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5981c50d8ae3SPaolo Bonzini { 5982c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5983c50d8ae3SPaolo Bonzini 5984c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5985c50d8ae3SPaolo Bonzini 5986c50d8ae3SPaolo Bonzini /* 5987c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5988c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5989c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5990c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5991c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5992c50d8ae3SPaolo Bonzini */ 5993c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5994c50d8ae3SPaolo Bonzini 5995c50d8ae3SPaolo Bonzini /* 5996c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5997c50d8ae3SPaolo Bonzini * zap all shadow pages. 5998c50d8ae3SPaolo Bonzini */ 5999c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 6000c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 6001c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6002c50d8ae3SPaolo Bonzini } 6003c50d8ae3SPaolo Bonzini } 6004c50d8ae3SPaolo Bonzini 6005c50d8ae3SPaolo Bonzini static unsigned long 6006c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 6007c50d8ae3SPaolo Bonzini { 6008c50d8ae3SPaolo Bonzini struct kvm *kvm; 6009c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 6010c50d8ae3SPaolo Bonzini unsigned long freed = 0; 6011c50d8ae3SPaolo Bonzini 6012c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6013c50d8ae3SPaolo Bonzini 6014c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6015c50d8ae3SPaolo Bonzini int idx; 6016c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6017c50d8ae3SPaolo Bonzini 6018c50d8ae3SPaolo Bonzini /* 6019c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 6020c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 6021c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 6022c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 6023c50d8ae3SPaolo Bonzini */ 6024c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 6025c50d8ae3SPaolo Bonzini break; 6026c50d8ae3SPaolo Bonzini /* 6027c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 6028c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 6029c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 6030c50d8ae3SPaolo Bonzini * anyway. 6031c50d8ae3SPaolo Bonzini */ 6032c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 6033c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 6034c50d8ae3SPaolo Bonzini continue; 6035c50d8ae3SPaolo Bonzini 6036c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 6037531810caSBen Gardon write_lock(&kvm->mmu_lock); 6038c50d8ae3SPaolo Bonzini 6039c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 6040c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 6041c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 6042c50d8ae3SPaolo Bonzini goto unlock; 6043c50d8ae3SPaolo Bonzini } 6044c50d8ae3SPaolo Bonzini 6045ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 6046c50d8ae3SPaolo Bonzini 6047c50d8ae3SPaolo Bonzini unlock: 6048531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6049c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 6050c50d8ae3SPaolo Bonzini 6051c50d8ae3SPaolo Bonzini /* 6052c50d8ae3SPaolo Bonzini * unfair on small ones 6053c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 6054c50d8ae3SPaolo Bonzini * sadness comes quickly 6055c50d8ae3SPaolo Bonzini */ 6056c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 6057c50d8ae3SPaolo Bonzini break; 6058c50d8ae3SPaolo Bonzini } 6059c50d8ae3SPaolo Bonzini 6060c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6061c50d8ae3SPaolo Bonzini return freed; 6062c50d8ae3SPaolo Bonzini } 6063c50d8ae3SPaolo Bonzini 6064c50d8ae3SPaolo Bonzini static unsigned long 6065c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 6066c50d8ae3SPaolo Bonzini { 6067c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 6068c50d8ae3SPaolo Bonzini } 6069c50d8ae3SPaolo Bonzini 6070c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 6071c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 6072c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 6073c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 6074c50d8ae3SPaolo Bonzini }; 6075c50d8ae3SPaolo Bonzini 6076c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 6077c50d8ae3SPaolo Bonzini { 6078c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 6079c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 6080c50d8ae3SPaolo Bonzini } 6081c50d8ae3SPaolo Bonzini 6082c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 6083c50d8ae3SPaolo Bonzini { 6084c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 6085c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 6086c50d8ae3SPaolo Bonzini } 6087c50d8ae3SPaolo Bonzini 6088c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 6089c50d8ae3SPaolo Bonzini { 6090c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 6091c50d8ae3SPaolo Bonzini } 6092c50d8ae3SPaolo Bonzini 6093c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 6094c50d8ae3SPaolo Bonzini { 6095c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 6096c50d8ae3SPaolo Bonzini bool new_val; 6097c50d8ae3SPaolo Bonzini 6098c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 6099c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 6100c50d8ae3SPaolo Bonzini new_val = 0; 6101c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 6102c50d8ae3SPaolo Bonzini new_val = 1; 6103c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 6104c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 6105c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 6106c50d8ae3SPaolo Bonzini return -EINVAL; 6107c50d8ae3SPaolo Bonzini 6108c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 6109c50d8ae3SPaolo Bonzini 6110c50d8ae3SPaolo Bonzini if (new_val != old_val) { 6111c50d8ae3SPaolo Bonzini struct kvm *kvm; 6112c50d8ae3SPaolo Bonzini 6113c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6114c50d8ae3SPaolo Bonzini 6115c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 6116c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 6117c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 6118c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 6119c50d8ae3SPaolo Bonzini 6120c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6121c50d8ae3SPaolo Bonzini } 6122c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6123c50d8ae3SPaolo Bonzini } 6124c50d8ae3SPaolo Bonzini 6125c50d8ae3SPaolo Bonzini return 0; 6126c50d8ae3SPaolo Bonzini } 6127c50d8ae3SPaolo Bonzini 6128c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 6129c50d8ae3SPaolo Bonzini { 6130c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 6131c50d8ae3SPaolo Bonzini 6132c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 6133c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 6134c50d8ae3SPaolo Bonzini 6135c50d8ae3SPaolo Bonzini /* 6136c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 6137c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 6138c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 6139c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 6140c50d8ae3SPaolo Bonzini */ 6141c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 6142c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 6143c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 6144c50d8ae3SPaolo Bonzini 6145c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 6146c50d8ae3SPaolo Bonzini 6147c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 6148c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 6149c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6150c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 6151c50d8ae3SPaolo Bonzini goto out; 6152c50d8ae3SPaolo Bonzini 6153c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 6154c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 6155c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6156c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 6157c50d8ae3SPaolo Bonzini goto out; 6158c50d8ae3SPaolo Bonzini 6159c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 6160c50d8ae3SPaolo Bonzini goto out; 6161c50d8ae3SPaolo Bonzini 6162c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6163c50d8ae3SPaolo Bonzini if (ret) 6164c50d8ae3SPaolo Bonzini goto out; 6165c50d8ae3SPaolo Bonzini 6166c50d8ae3SPaolo Bonzini return 0; 6167c50d8ae3SPaolo Bonzini 6168c50d8ae3SPaolo Bonzini out: 6169c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6170c50d8ae3SPaolo Bonzini return ret; 6171c50d8ae3SPaolo Bonzini } 6172c50d8ae3SPaolo Bonzini 6173c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6174c50d8ae3SPaolo Bonzini { 6175c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6176c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6177c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6178c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6179c50d8ae3SPaolo Bonzini } 6180c50d8ae3SPaolo Bonzini 6181c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6182c50d8ae3SPaolo Bonzini { 6183c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6184c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6185c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6186c50d8ae3SPaolo Bonzini } 6187c50d8ae3SPaolo Bonzini 6188f47491d7SSean Christopherson /* 6189f47491d7SSean Christopherson * Calculate the effective recovery period, accounting for '0' meaning "let KVM 6190f47491d7SSean Christopherson * select a halving time of 1 hour". Returns true if recovery is enabled. 6191f47491d7SSean Christopherson */ 6192f47491d7SSean Christopherson static bool calc_nx_huge_pages_recovery_period(uint *period) 6193f47491d7SSean Christopherson { 6194f47491d7SSean Christopherson /* 6195f47491d7SSean Christopherson * Use READ_ONCE to get the params, this may be called outside of the 6196f47491d7SSean Christopherson * param setters, e.g. by the kthread to compute its next timeout. 6197f47491d7SSean Christopherson */ 6198f47491d7SSean Christopherson bool enabled = READ_ONCE(nx_huge_pages); 6199f47491d7SSean Christopherson uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6200f47491d7SSean Christopherson 6201f47491d7SSean Christopherson if (!enabled || !ratio) 6202f47491d7SSean Christopherson return false; 6203f47491d7SSean Christopherson 6204f47491d7SSean Christopherson *period = READ_ONCE(nx_huge_pages_recovery_period_ms); 6205f47491d7SSean Christopherson if (!*period) { 6206f47491d7SSean Christopherson /* Make sure the period is not less than one second. */ 6207f47491d7SSean Christopherson ratio = min(ratio, 3600u); 6208f47491d7SSean Christopherson *period = 60 * 60 * 1000 / ratio; 6209f47491d7SSean Christopherson } 6210f47491d7SSean Christopherson return true; 6211f47491d7SSean Christopherson } 6212f47491d7SSean Christopherson 62134dfe4f40SJunaid Shahid static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp) 6214c50d8ae3SPaolo Bonzini { 62154dfe4f40SJunaid Shahid bool was_recovery_enabled, is_recovery_enabled; 62164dfe4f40SJunaid Shahid uint old_period, new_period; 6217c50d8ae3SPaolo Bonzini int err; 6218c50d8ae3SPaolo Bonzini 6219f47491d7SSean Christopherson was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period); 62204dfe4f40SJunaid Shahid 6221c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6222c50d8ae3SPaolo Bonzini if (err) 6223c50d8ae3SPaolo Bonzini return err; 6224c50d8ae3SPaolo Bonzini 6225f47491d7SSean Christopherson is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period); 62264dfe4f40SJunaid Shahid 6227f47491d7SSean Christopherson if (is_recovery_enabled && 62284dfe4f40SJunaid Shahid (!was_recovery_enabled || old_period > new_period)) { 6229c50d8ae3SPaolo Bonzini struct kvm *kvm; 6230c50d8ae3SPaolo Bonzini 6231c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6232c50d8ae3SPaolo Bonzini 6233c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6234c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6235c50d8ae3SPaolo Bonzini 6236c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6237c50d8ae3SPaolo Bonzini } 6238c50d8ae3SPaolo Bonzini 6239c50d8ae3SPaolo Bonzini return err; 6240c50d8ae3SPaolo Bonzini } 6241c50d8ae3SPaolo Bonzini 6242c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6243c50d8ae3SPaolo Bonzini { 6244ade74e14SSean Christopherson unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; 6245c50d8ae3SPaolo Bonzini int rcu_idx; 6246c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6247c50d8ae3SPaolo Bonzini unsigned int ratio; 6248c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6249048f4980SSean Christopherson bool flush = false; 6250c50d8ae3SPaolo Bonzini ulong to_zap; 6251c50d8ae3SPaolo Bonzini 6252c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6253531810caSBen Gardon write_lock(&kvm->mmu_lock); 6254c50d8ae3SPaolo Bonzini 6255c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6256ade74e14SSean Christopherson to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0; 62577d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 62587d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 62597d919c7aSSean Christopherson break; 62607d919c7aSSean Christopherson 6261c50d8ae3SPaolo Bonzini /* 6262c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6263c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6264c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6265c50d8ae3SPaolo Bonzini */ 6266c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6267c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6268c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6269c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6270897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 6271315f02c6SPaolo Bonzini flush |= kvm_tdp_mmu_zap_sp(kvm, sp); 62728d1a182eSBen Gardon } else { 6273c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6274c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 627529cf0f50SBen Gardon } 6276c50d8ae3SPaolo Bonzini 6277531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 6278048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6279531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 6280048f4980SSean Christopherson flush = false; 6281c50d8ae3SPaolo Bonzini } 6282c50d8ae3SPaolo Bonzini } 6283048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6284c50d8ae3SPaolo Bonzini 6285531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6286c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6287c50d8ae3SPaolo Bonzini } 6288c50d8ae3SPaolo Bonzini 6289c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6290c50d8ae3SPaolo Bonzini { 6291f47491d7SSean Christopherson bool enabled; 6292f47491d7SSean Christopherson uint period; 62934dfe4f40SJunaid Shahid 6294f47491d7SSean Christopherson enabled = calc_nx_huge_pages_recovery_period(&period); 62954dfe4f40SJunaid Shahid 6296f47491d7SSean Christopherson return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64() 6297c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6298c50d8ae3SPaolo Bonzini } 6299c50d8ae3SPaolo Bonzini 6300c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6301c50d8ae3SPaolo Bonzini { 6302c50d8ae3SPaolo Bonzini u64 start_time; 6303c50d8ae3SPaolo Bonzini long remaining_time; 6304c50d8ae3SPaolo Bonzini 6305c50d8ae3SPaolo Bonzini while (true) { 6306c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6307c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6308c50d8ae3SPaolo Bonzini 6309c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6310c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6311c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6312c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6313c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6314c50d8ae3SPaolo Bonzini } 6315c50d8ae3SPaolo Bonzini 6316c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6317c50d8ae3SPaolo Bonzini 6318c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6319c50d8ae3SPaolo Bonzini return 0; 6320c50d8ae3SPaolo Bonzini 6321c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6322c50d8ae3SPaolo Bonzini } 6323c50d8ae3SPaolo Bonzini } 6324c50d8ae3SPaolo Bonzini 6325c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6326c50d8ae3SPaolo Bonzini { 6327c50d8ae3SPaolo Bonzini int err; 6328c50d8ae3SPaolo Bonzini 6329c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6330c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6331c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6332c50d8ae3SPaolo Bonzini if (!err) 6333c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6334c50d8ae3SPaolo Bonzini 6335c50d8ae3SPaolo Bonzini return err; 6336c50d8ae3SPaolo Bonzini } 6337c50d8ae3SPaolo Bonzini 6338c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6339c50d8ae3SPaolo Bonzini { 6340c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6341c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6342c50d8ae3SPaolo Bonzini } 6343