1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 51c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 52c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 53c50d8ae3SPaolo Bonzini #include "trace.h" 54c50d8ae3SPaolo Bonzini 55c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 56c50d8ae3SPaolo Bonzini 57c50d8ae3SPaolo Bonzini static int __read_mostly nx_huge_pages = -1; 58c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 59c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 60c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 61c50d8ae3SPaolo Bonzini #else 62c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 63c50d8ae3SPaolo Bonzini #endif 64c50d8ae3SPaolo Bonzini 65c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 66c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 67c50d8ae3SPaolo Bonzini 68d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 69c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 70c50d8ae3SPaolo Bonzini .get = param_get_bool, 71c50d8ae3SPaolo Bonzini }; 72c50d8ae3SPaolo Bonzini 73d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 74c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 75c50d8ae3SPaolo Bonzini .get = param_get_uint, 76c50d8ae3SPaolo Bonzini }; 77c50d8ae3SPaolo Bonzini 78c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 79c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 80c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 81c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 82c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 83c50d8ae3SPaolo Bonzini 8471fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8571fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8671fe7013SSean Christopherson 87c50d8ae3SPaolo Bonzini /* 88c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 89c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 90c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 91c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 92c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 93c50d8ae3SPaolo Bonzini */ 94c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 95c50d8ae3SPaolo Bonzini 961d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 9783013059SSean Christopherson static int max_tdp_level __read_mostly; 98703c335dSSean Christopherson 99c50d8ae3SPaolo Bonzini enum { 100c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 101c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 102c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 103c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 104c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 105c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 106c50d8ae3SPaolo Bonzini }; 107c50d8ae3SPaolo Bonzini 108c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1095a9624afSPaolo Bonzini bool dbg = 0; 110c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 111c50d8ae3SPaolo Bonzini #endif 112c50d8ae3SPaolo Bonzini 113c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 114c50d8ae3SPaolo Bonzini 115c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 116c50d8ae3SPaolo Bonzini 117c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 118c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 119c50d8ae3SPaolo Bonzini 120c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 121c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 122c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 123c50d8ae3SPaolo Bonzini 124c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 125c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 126c50d8ae3SPaolo Bonzini 127c50d8ae3SPaolo Bonzini 128c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 129c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 130c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 131c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 132c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 133c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 134c50d8ae3SPaolo Bonzini 135c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 136c50d8ae3SPaolo Bonzini 137c50d8ae3SPaolo Bonzini /* make pte_list_desc fit well in cache line */ 138c50d8ae3SPaolo Bonzini #define PTE_LIST_EXT 3 139c50d8ae3SPaolo Bonzini 140c50d8ae3SPaolo Bonzini struct pte_list_desc { 141c50d8ae3SPaolo Bonzini u64 *sptes[PTE_LIST_EXT]; 142c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 143c50d8ae3SPaolo Bonzini }; 144c50d8ae3SPaolo Bonzini 145c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 146c50d8ae3SPaolo Bonzini u64 addr; 147c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 148c50d8ae3SPaolo Bonzini u64 *sptep; 149c50d8ae3SPaolo Bonzini int level; 150c50d8ae3SPaolo Bonzini unsigned index; 151c50d8ae3SPaolo Bonzini }; 152c50d8ae3SPaolo Bonzini 153c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 154c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 155c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 156c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 157c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 158c50d8ae3SPaolo Bonzini 159c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 160c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 161c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 162c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 163c50d8ae3SPaolo Bonzini 164c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 165c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 166c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 167c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 168c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 169c50d8ae3SPaolo Bonzini 170c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 17102c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 172c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 173c50d8ae3SPaolo Bonzini 174c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 175c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 176c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 177c50d8ae3SPaolo Bonzini 178c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 179c50d8ae3SPaolo Bonzini #include "mmutrace.h" 180c50d8ae3SPaolo Bonzini 181c50d8ae3SPaolo Bonzini 182c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 183c50d8ae3SPaolo Bonzini { 184afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 185c50d8ae3SPaolo Bonzini } 186c50d8ae3SPaolo Bonzini 187c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 188c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 189c50d8ae3SPaolo Bonzini { 190c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 191c50d8ae3SPaolo Bonzini 192afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 193b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 194c50d8ae3SPaolo Bonzini 195c50d8ae3SPaolo Bonzini if (ret) 196c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 197c50d8ae3SPaolo Bonzini } 198c50d8ae3SPaolo Bonzini 1992f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 200c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 201c50d8ae3SPaolo Bonzini { 202c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 203c50d8ae3SPaolo Bonzini 204c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 205c50d8ae3SPaolo Bonzini range.pages = pages; 206c50d8ae3SPaolo Bonzini 207c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 208c50d8ae3SPaolo Bonzini } 209c50d8ae3SPaolo Bonzini 2105a9624afSPaolo Bonzini bool is_nx_huge_page_enabled(void) 211c50d8ae3SPaolo Bonzini { 212c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages); 213c50d8ae3SPaolo Bonzini } 214c50d8ae3SPaolo Bonzini 2158f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2168f79b064SBen Gardon unsigned int access) 2178f79b064SBen Gardon { 2188f79b064SBen Gardon u64 mask = make_mmio_spte(vcpu, gfn, access); 2198f79b064SBen Gardon 220bb18842eSBen Gardon trace_mark_mmio_spte(sptep, gfn, mask); 221c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, mask); 222c50d8ae3SPaolo Bonzini } 223c50d8ae3SPaolo Bonzini 224c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 225c50d8ae3SPaolo Bonzini { 226c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 227c50d8ae3SPaolo Bonzini 2288a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 229c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 230c50d8ae3SPaolo Bonzini 231c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 232c50d8ae3SPaolo Bonzini } 233c50d8ae3SPaolo Bonzini 234c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 235c50d8ae3SPaolo Bonzini { 236c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 237c50d8ae3SPaolo Bonzini } 238c50d8ae3SPaolo Bonzini 239c50d8ae3SPaolo Bonzini static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 2400a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access) 241c50d8ae3SPaolo Bonzini { 242c50d8ae3SPaolo Bonzini if (unlikely(is_noslot_pfn(pfn))) { 243c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 244c50d8ae3SPaolo Bonzini return true; 245c50d8ae3SPaolo Bonzini } 246c50d8ae3SPaolo Bonzini 247c50d8ae3SPaolo Bonzini return false; 248c50d8ae3SPaolo Bonzini } 249c50d8ae3SPaolo Bonzini 250c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 251c50d8ae3SPaolo Bonzini { 252c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 253c50d8ae3SPaolo Bonzini 254c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 255c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 256c50d8ae3SPaolo Bonzini return false; 257c50d8ae3SPaolo Bonzini 258c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 259c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 260c50d8ae3SPaolo Bonzini 261c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 262c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 263c50d8ae3SPaolo Bonzini } 264c50d8ae3SPaolo Bonzini 265cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 266cd313569SMohammed Gamal struct x86_exception *exception) 267cd313569SMohammed Gamal { 268ec7771abSMohammed Gamal /* Check if guest physical address doesn't exceed guest maximum */ 269dc46515cSSean Christopherson if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) { 270ec7771abSMohammed Gamal exception->error_code |= PFERR_RSVD_MASK; 271ec7771abSMohammed Gamal return UNMAPPED_GVA; 272ec7771abSMohammed Gamal } 273ec7771abSMohammed Gamal 274cd313569SMohammed Gamal return gpa; 275cd313569SMohammed Gamal } 276cd313569SMohammed Gamal 277c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 278c50d8ae3SPaolo Bonzini { 279c50d8ae3SPaolo Bonzini return 1; 280c50d8ae3SPaolo Bonzini } 281c50d8ae3SPaolo Bonzini 282c50d8ae3SPaolo Bonzini static int is_nx(struct kvm_vcpu *vcpu) 283c50d8ae3SPaolo Bonzini { 284c50d8ae3SPaolo Bonzini return vcpu->arch.efer & EFER_NX; 285c50d8ae3SPaolo Bonzini } 286c50d8ae3SPaolo Bonzini 287c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 288c50d8ae3SPaolo Bonzini { 289c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 290c50d8ae3SPaolo Bonzini 291c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 292c50d8ae3SPaolo Bonzini } 293c50d8ae3SPaolo Bonzini 294c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 295c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 296c50d8ae3SPaolo Bonzini { 297c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 298c50d8ae3SPaolo Bonzini } 299c50d8ae3SPaolo Bonzini 300c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 301c50d8ae3SPaolo Bonzini { 302c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 303c50d8ae3SPaolo Bonzini } 304c50d8ae3SPaolo Bonzini 305c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 306c50d8ae3SPaolo Bonzini { 307c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 308c50d8ae3SPaolo Bonzini } 309c50d8ae3SPaolo Bonzini 310c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 311c50d8ae3SPaolo Bonzini { 312c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 313c50d8ae3SPaolo Bonzini } 314c50d8ae3SPaolo Bonzini #else 315c50d8ae3SPaolo Bonzini union split_spte { 316c50d8ae3SPaolo Bonzini struct { 317c50d8ae3SPaolo Bonzini u32 spte_low; 318c50d8ae3SPaolo Bonzini u32 spte_high; 319c50d8ae3SPaolo Bonzini }; 320c50d8ae3SPaolo Bonzini u64 spte; 321c50d8ae3SPaolo Bonzini }; 322c50d8ae3SPaolo Bonzini 323c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 324c50d8ae3SPaolo Bonzini { 32557354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 326c50d8ae3SPaolo Bonzini 327c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 328c50d8ae3SPaolo Bonzini return; 329c50d8ae3SPaolo Bonzini 330c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 331c50d8ae3SPaolo Bonzini smp_wmb(); 332c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 333c50d8ae3SPaolo Bonzini } 334c50d8ae3SPaolo Bonzini 335c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 336c50d8ae3SPaolo Bonzini { 337c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 338c50d8ae3SPaolo Bonzini 339c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 340c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 341c50d8ae3SPaolo Bonzini 342c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 343c50d8ae3SPaolo Bonzini 344c50d8ae3SPaolo Bonzini /* 345c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 346c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 347c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 348c50d8ae3SPaolo Bonzini */ 349c50d8ae3SPaolo Bonzini smp_wmb(); 350c50d8ae3SPaolo Bonzini 351c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 352c50d8ae3SPaolo Bonzini } 353c50d8ae3SPaolo Bonzini 354c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 355c50d8ae3SPaolo Bonzini { 356c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 357c50d8ae3SPaolo Bonzini 358c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 359c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 360c50d8ae3SPaolo Bonzini 361c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 362c50d8ae3SPaolo Bonzini 363c50d8ae3SPaolo Bonzini /* 364c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 365c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 366c50d8ae3SPaolo Bonzini */ 367c50d8ae3SPaolo Bonzini smp_wmb(); 368c50d8ae3SPaolo Bonzini 369c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 370c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 371c50d8ae3SPaolo Bonzini } 372c50d8ae3SPaolo Bonzini 373c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 374c50d8ae3SPaolo Bonzini { 375c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 376c50d8ae3SPaolo Bonzini 377c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 378c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 379c50d8ae3SPaolo Bonzini 380c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 381c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 382c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 383c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 384c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 385c50d8ae3SPaolo Bonzini 386c50d8ae3SPaolo Bonzini return orig.spte; 387c50d8ae3SPaolo Bonzini } 388c50d8ae3SPaolo Bonzini 389c50d8ae3SPaolo Bonzini /* 390c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 391c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 392c50d8ae3SPaolo Bonzini * 393c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 394c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 395c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 396c50d8ae3SPaolo Bonzini * 397c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 398c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 399c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 400c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 401c50d8ae3SPaolo Bonzini * 402c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 403c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 404c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 405c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 406c50d8ae3SPaolo Bonzini */ 407c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 408c50d8ae3SPaolo Bonzini { 40957354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 410c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 411c50d8ae3SPaolo Bonzini int count; 412c50d8ae3SPaolo Bonzini 413c50d8ae3SPaolo Bonzini retry: 414c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 415c50d8ae3SPaolo Bonzini smp_rmb(); 416c50d8ae3SPaolo Bonzini 417c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 418c50d8ae3SPaolo Bonzini smp_rmb(); 419c50d8ae3SPaolo Bonzini 420c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 421c50d8ae3SPaolo Bonzini smp_rmb(); 422c50d8ae3SPaolo Bonzini 423c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 424c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 425c50d8ae3SPaolo Bonzini goto retry; 426c50d8ae3SPaolo Bonzini 427c50d8ae3SPaolo Bonzini return spte.spte; 428c50d8ae3SPaolo Bonzini } 429c50d8ae3SPaolo Bonzini #endif 430c50d8ae3SPaolo Bonzini 431c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 432c50d8ae3SPaolo Bonzini { 433c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 434c50d8ae3SPaolo Bonzini return false; 435c50d8ae3SPaolo Bonzini 436c50d8ae3SPaolo Bonzini /* 437c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 438c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 439c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 440c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 441c50d8ae3SPaolo Bonzini */ 442c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 443c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 444c50d8ae3SPaolo Bonzini return true; 445c50d8ae3SPaolo Bonzini 446c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 447c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 448c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 449c50d8ae3SPaolo Bonzini return true; 450c50d8ae3SPaolo Bonzini } 451c50d8ae3SPaolo Bonzini 452c50d8ae3SPaolo Bonzini return false; 453c50d8ae3SPaolo Bonzini } 454c50d8ae3SPaolo Bonzini 455c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 456c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 457c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 458c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 459c50d8ae3SPaolo Bonzini * the spte. 460c50d8ae3SPaolo Bonzini */ 461c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 462c50d8ae3SPaolo Bonzini { 463c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 464c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 465c50d8ae3SPaolo Bonzini } 466c50d8ae3SPaolo Bonzini 467c50d8ae3SPaolo Bonzini /* 468c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 469c50d8ae3SPaolo Bonzini * accessed/dirty status. 470c50d8ae3SPaolo Bonzini */ 471c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 472c50d8ae3SPaolo Bonzini { 473c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 474c50d8ae3SPaolo Bonzini 475c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 476c50d8ae3SPaolo Bonzini 477c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 478c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 479c50d8ae3SPaolo Bonzini return old_spte; 480c50d8ae3SPaolo Bonzini } 481c50d8ae3SPaolo Bonzini 482c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 483c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 484c50d8ae3SPaolo Bonzini else 485c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 486c50d8ae3SPaolo Bonzini 487c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 488c50d8ae3SPaolo Bonzini 489c50d8ae3SPaolo Bonzini return old_spte; 490c50d8ae3SPaolo Bonzini } 491c50d8ae3SPaolo Bonzini 492c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 493c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 494c50d8ae3SPaolo Bonzini * 495c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 496c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 497c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 498c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 499c50d8ae3SPaolo Bonzini * case. 500c50d8ae3SPaolo Bonzini * 501c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 502c50d8ae3SPaolo Bonzini */ 503c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 504c50d8ae3SPaolo Bonzini { 505c50d8ae3SPaolo Bonzini bool flush = false; 506c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 507c50d8ae3SPaolo Bonzini 508c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 509c50d8ae3SPaolo Bonzini return false; 510c50d8ae3SPaolo Bonzini 511c50d8ae3SPaolo Bonzini /* 512c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 513c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 514c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 515c50d8ae3SPaolo Bonzini */ 516c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 517c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 518c50d8ae3SPaolo Bonzini flush = true; 519c50d8ae3SPaolo Bonzini 520c50d8ae3SPaolo Bonzini /* 521c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 522c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 523c50d8ae3SPaolo Bonzini */ 524c50d8ae3SPaolo Bonzini 525c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 526c50d8ae3SPaolo Bonzini flush = true; 527c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 528c50d8ae3SPaolo Bonzini } 529c50d8ae3SPaolo Bonzini 530c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 531c50d8ae3SPaolo Bonzini flush = true; 532c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 533c50d8ae3SPaolo Bonzini } 534c50d8ae3SPaolo Bonzini 535c50d8ae3SPaolo Bonzini return flush; 536c50d8ae3SPaolo Bonzini } 537c50d8ae3SPaolo Bonzini 538c50d8ae3SPaolo Bonzini /* 539c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 540c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 541c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 542c50d8ae3SPaolo Bonzini * Returns non-zero if the PTE was previously valid. 543c50d8ae3SPaolo Bonzini */ 544c50d8ae3SPaolo Bonzini static int mmu_spte_clear_track_bits(u64 *sptep) 545c50d8ae3SPaolo Bonzini { 546c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 547c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 548c50d8ae3SPaolo Bonzini 549c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 550c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 551c50d8ae3SPaolo Bonzini else 552c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 553c50d8ae3SPaolo Bonzini 554c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 555c50d8ae3SPaolo Bonzini return 0; 556c50d8ae3SPaolo Bonzini 557c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 558c50d8ae3SPaolo Bonzini 559c50d8ae3SPaolo Bonzini /* 560c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 561c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 562c50d8ae3SPaolo Bonzini * unmap it from mmu first. 563c50d8ae3SPaolo Bonzini */ 564c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 565c50d8ae3SPaolo Bonzini 566c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 567c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 568c50d8ae3SPaolo Bonzini 569c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 570c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 571c50d8ae3SPaolo Bonzini 572c50d8ae3SPaolo Bonzini return 1; 573c50d8ae3SPaolo Bonzini } 574c50d8ae3SPaolo Bonzini 575c50d8ae3SPaolo Bonzini /* 576c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 577c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 578c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 579c50d8ae3SPaolo Bonzini */ 580c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 581c50d8ae3SPaolo Bonzini { 582c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 583c50d8ae3SPaolo Bonzini } 584c50d8ae3SPaolo Bonzini 585c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 586c50d8ae3SPaolo Bonzini { 587c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 588c50d8ae3SPaolo Bonzini } 589c50d8ae3SPaolo Bonzini 590c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 591c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 592c50d8ae3SPaolo Bonzini { 593c50d8ae3SPaolo Bonzini u64 new_spte = spte; 5948a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 5958a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 596c50d8ae3SPaolo Bonzini 597c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 598c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 599c50d8ae3SPaolo Bonzini 600c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 6018a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 6028a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 603c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 604c50d8ae3SPaolo Bonzini 605c50d8ae3SPaolo Bonzini return new_spte; 606c50d8ae3SPaolo Bonzini } 607c50d8ae3SPaolo Bonzini 608c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 609c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 610c50d8ae3SPaolo Bonzini { 611c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 612c50d8ae3SPaolo Bonzini 613c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 614c50d8ae3SPaolo Bonzini return false; 615c50d8ae3SPaolo Bonzini 616c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 617c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 618c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 619c50d8ae3SPaolo Bonzini } else { 620c50d8ae3SPaolo Bonzini /* 621c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 622c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 623c50d8ae3SPaolo Bonzini */ 624c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 625c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 626c50d8ae3SPaolo Bonzini 627c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 628c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 629c50d8ae3SPaolo Bonzini } 630c50d8ae3SPaolo Bonzini 631c50d8ae3SPaolo Bonzini return true; 632c50d8ae3SPaolo Bonzini } 633c50d8ae3SPaolo Bonzini 634c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 635c50d8ae3SPaolo Bonzini { 636c50d8ae3SPaolo Bonzini /* 637c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 638c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 639c50d8ae3SPaolo Bonzini */ 640c50d8ae3SPaolo Bonzini local_irq_disable(); 641c50d8ae3SPaolo Bonzini 642c50d8ae3SPaolo Bonzini /* 643c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 644c50d8ae3SPaolo Bonzini * to vcpu->mode. 645c50d8ae3SPaolo Bonzini */ 646c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 647c50d8ae3SPaolo Bonzini } 648c50d8ae3SPaolo Bonzini 649c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 650c50d8ae3SPaolo Bonzini { 651c50d8ae3SPaolo Bonzini /* 652c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 653c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 654c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 655c50d8ae3SPaolo Bonzini */ 656c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 657c50d8ae3SPaolo Bonzini local_irq_enable(); 658c50d8ae3SPaolo Bonzini } 659c50d8ae3SPaolo Bonzini 660378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 661c50d8ae3SPaolo Bonzini { 662c50d8ae3SPaolo Bonzini int r; 663c50d8ae3SPaolo Bonzini 664531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 66594ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 666531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 667c50d8ae3SPaolo Bonzini if (r) 668c50d8ae3SPaolo Bonzini return r; 66994ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 670171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 671171a90d7SSean Christopherson if (r) 672171a90d7SSean Christopherson return r; 673378f5cd6SSean Christopherson if (maybe_indirect) { 67494ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 675171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 676c50d8ae3SPaolo Bonzini if (r) 677c50d8ae3SPaolo Bonzini return r; 678378f5cd6SSean Christopherson } 67994ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 680531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 681c50d8ae3SPaolo Bonzini } 682c50d8ae3SPaolo Bonzini 683c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 684c50d8ae3SPaolo Bonzini { 68594ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 68694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 68794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 68894ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 689c50d8ae3SPaolo Bonzini } 690c50d8ae3SPaolo Bonzini 691c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 692c50d8ae3SPaolo Bonzini { 69394ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 694c50d8ae3SPaolo Bonzini } 695c50d8ae3SPaolo Bonzini 696c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 697c50d8ae3SPaolo Bonzini { 698c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 699c50d8ae3SPaolo Bonzini } 700c50d8ae3SPaolo Bonzini 701c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 702c50d8ae3SPaolo Bonzini { 703c50d8ae3SPaolo Bonzini if (!sp->role.direct) 704c50d8ae3SPaolo Bonzini return sp->gfns[index]; 705c50d8ae3SPaolo Bonzini 706c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 707c50d8ae3SPaolo Bonzini } 708c50d8ae3SPaolo Bonzini 709c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 710c50d8ae3SPaolo Bonzini { 711c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 712c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 713c50d8ae3SPaolo Bonzini return; 714c50d8ae3SPaolo Bonzini } 715c50d8ae3SPaolo Bonzini 716c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 717c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 718c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 719c50d8ae3SPaolo Bonzini sp->gfn, 720c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 721c50d8ae3SPaolo Bonzini } 722c50d8ae3SPaolo Bonzini 723c50d8ae3SPaolo Bonzini /* 724c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 725c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 726c50d8ae3SPaolo Bonzini */ 727c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 728c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 729c50d8ae3SPaolo Bonzini int level) 730c50d8ae3SPaolo Bonzini { 731c50d8ae3SPaolo Bonzini unsigned long idx; 732c50d8ae3SPaolo Bonzini 733c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 734c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 735c50d8ae3SPaolo Bonzini } 736c50d8ae3SPaolo Bonzini 737c50d8ae3SPaolo Bonzini static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot, 738c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 739c50d8ae3SPaolo Bonzini { 740c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 741c50d8ae3SPaolo Bonzini int i; 742c50d8ae3SPaolo Bonzini 7433bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 744c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 745c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 746c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 747c50d8ae3SPaolo Bonzini } 748c50d8ae3SPaolo Bonzini } 749c50d8ae3SPaolo Bonzini 750c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 751c50d8ae3SPaolo Bonzini { 752c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 753c50d8ae3SPaolo Bonzini } 754c50d8ae3SPaolo Bonzini 755c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 756c50d8ae3SPaolo Bonzini { 757c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 758c50d8ae3SPaolo Bonzini } 759c50d8ae3SPaolo Bonzini 760c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 761c50d8ae3SPaolo Bonzini { 762c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 763c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 764c50d8ae3SPaolo Bonzini gfn_t gfn; 765c50d8ae3SPaolo Bonzini 766c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 767c50d8ae3SPaolo Bonzini gfn = sp->gfn; 768c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 769c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 770c50d8ae3SPaolo Bonzini 771c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 7723bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 773c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 774c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 775c50d8ae3SPaolo Bonzini 776c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 777c50d8ae3SPaolo Bonzini } 778c50d8ae3SPaolo Bonzini 77929cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 780c50d8ae3SPaolo Bonzini { 781c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 782c50d8ae3SPaolo Bonzini return; 783c50d8ae3SPaolo Bonzini 784c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 785c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 786c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 787c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 788c50d8ae3SPaolo Bonzini } 789c50d8ae3SPaolo Bonzini 790c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 791c50d8ae3SPaolo Bonzini { 792c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 793c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 794c50d8ae3SPaolo Bonzini gfn_t gfn; 795c50d8ae3SPaolo Bonzini 796c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 797c50d8ae3SPaolo Bonzini gfn = sp->gfn; 798c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 799c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 8003bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 801c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 802c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 803c50d8ae3SPaolo Bonzini 804c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 805c50d8ae3SPaolo Bonzini } 806c50d8ae3SPaolo Bonzini 80729cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 808c50d8ae3SPaolo Bonzini { 809c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 810c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 811c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 812c50d8ae3SPaolo Bonzini } 813c50d8ae3SPaolo Bonzini 814c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 815c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 816c50d8ae3SPaolo Bonzini bool no_dirty_log) 817c50d8ae3SPaolo Bonzini { 818c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 819c50d8ae3SPaolo Bonzini 820c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 82191b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 82291b0d268SPaolo Bonzini return NULL; 823044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 82491b0d268SPaolo Bonzini return NULL; 825c50d8ae3SPaolo Bonzini 826c50d8ae3SPaolo Bonzini return slot; 827c50d8ae3SPaolo Bonzini } 828c50d8ae3SPaolo Bonzini 829c50d8ae3SPaolo Bonzini /* 830c50d8ae3SPaolo Bonzini * About rmap_head encoding: 831c50d8ae3SPaolo Bonzini * 832c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 833c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 834c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 835c50d8ae3SPaolo Bonzini */ 836c50d8ae3SPaolo Bonzini 837c50d8ae3SPaolo Bonzini /* 838c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 839c50d8ae3SPaolo Bonzini */ 840c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 841c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 842c50d8ae3SPaolo Bonzini { 843c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 844c50d8ae3SPaolo Bonzini int i, count = 0; 845c50d8ae3SPaolo Bonzini 846c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 847805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 848c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 849c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 850805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 851c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 852c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 853c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 854c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 855c50d8ae3SPaolo Bonzini ++count; 856c50d8ae3SPaolo Bonzini } else { 857805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 858c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 859c6c4f961SLi RongQing while (desc->sptes[PTE_LIST_EXT-1]) { 860c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 861c6c4f961SLi RongQing 862c6c4f961SLi RongQing if (!desc->more) { 863c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 864c50d8ae3SPaolo Bonzini desc = desc->more; 865c6c4f961SLi RongQing break; 866c6c4f961SLi RongQing } 867c6c4f961SLi RongQing desc = desc->more; 868c50d8ae3SPaolo Bonzini } 869c50d8ae3SPaolo Bonzini for (i = 0; desc->sptes[i]; ++i) 870c50d8ae3SPaolo Bonzini ++count; 871c50d8ae3SPaolo Bonzini desc->sptes[i] = spte; 872c50d8ae3SPaolo Bonzini } 873c50d8ae3SPaolo Bonzini return count; 874c50d8ae3SPaolo Bonzini } 875c50d8ae3SPaolo Bonzini 876c50d8ae3SPaolo Bonzini static void 877c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 878c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 879c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 880c50d8ae3SPaolo Bonzini { 881c50d8ae3SPaolo Bonzini int j; 882c50d8ae3SPaolo Bonzini 883c50d8ae3SPaolo Bonzini for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) 884c50d8ae3SPaolo Bonzini ; 885c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 886c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 887c50d8ae3SPaolo Bonzini if (j != 0) 888c50d8ae3SPaolo Bonzini return; 889c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 890fe3c2b4cSMiaohe Lin rmap_head->val = 0; 891c50d8ae3SPaolo Bonzini else 892c50d8ae3SPaolo Bonzini if (prev_desc) 893c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 894c50d8ae3SPaolo Bonzini else 895c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 896c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 897c50d8ae3SPaolo Bonzini } 898c50d8ae3SPaolo Bonzini 899c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 900c50d8ae3SPaolo Bonzini { 901c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 902c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 903c50d8ae3SPaolo Bonzini int i; 904c50d8ae3SPaolo Bonzini 905c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 906c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 907c50d8ae3SPaolo Bonzini BUG(); 908c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 909805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 910c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 911c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 912c50d8ae3SPaolo Bonzini BUG(); 913c50d8ae3SPaolo Bonzini } 914c50d8ae3SPaolo Bonzini rmap_head->val = 0; 915c50d8ae3SPaolo Bonzini } else { 916805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 917c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 918c50d8ae3SPaolo Bonzini prev_desc = NULL; 919c50d8ae3SPaolo Bonzini while (desc) { 920c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { 921c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 922c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 923c50d8ae3SPaolo Bonzini desc, i, prev_desc); 924c50d8ae3SPaolo Bonzini return; 925c50d8ae3SPaolo Bonzini } 926c50d8ae3SPaolo Bonzini } 927c50d8ae3SPaolo Bonzini prev_desc = desc; 928c50d8ae3SPaolo Bonzini desc = desc->more; 929c50d8ae3SPaolo Bonzini } 930c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 931c50d8ae3SPaolo Bonzini BUG(); 932c50d8ae3SPaolo Bonzini } 933c50d8ae3SPaolo Bonzini } 934c50d8ae3SPaolo Bonzini 935c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 936c50d8ae3SPaolo Bonzini { 937c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 938c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 939c50d8ae3SPaolo Bonzini } 940c50d8ae3SPaolo Bonzini 941c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 942c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot) 943c50d8ae3SPaolo Bonzini { 944c50d8ae3SPaolo Bonzini unsigned long idx; 945c50d8ae3SPaolo Bonzini 946c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 9473bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 948c50d8ae3SPaolo Bonzini } 949c50d8ae3SPaolo Bonzini 950c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 951c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 952c50d8ae3SPaolo Bonzini { 953c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 954c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 955c50d8ae3SPaolo Bonzini 956c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 957c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 958c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 959c50d8ae3SPaolo Bonzini } 960c50d8ae3SPaolo Bonzini 961c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 962c50d8ae3SPaolo Bonzini { 963356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 964c50d8ae3SPaolo Bonzini 965356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 96694ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 967c50d8ae3SPaolo Bonzini } 968c50d8ae3SPaolo Bonzini 969c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 970c50d8ae3SPaolo Bonzini { 971c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 972c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 973c50d8ae3SPaolo Bonzini 97457354682SSean Christopherson sp = sptep_to_sp(spte); 975c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 976c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 977c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 978c50d8ae3SPaolo Bonzini } 979c50d8ae3SPaolo Bonzini 980c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 981c50d8ae3SPaolo Bonzini { 982c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 983c50d8ae3SPaolo Bonzini gfn_t gfn; 984c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 985c50d8ae3SPaolo Bonzini 98657354682SSean Christopherson sp = sptep_to_sp(spte); 987c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 988c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 989c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 990c50d8ae3SPaolo Bonzini } 991c50d8ae3SPaolo Bonzini 992c50d8ae3SPaolo Bonzini /* 993c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 994c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 995c50d8ae3SPaolo Bonzini */ 996c50d8ae3SPaolo Bonzini struct rmap_iterator { 997c50d8ae3SPaolo Bonzini /* private fields */ 998c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 999c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1000c50d8ae3SPaolo Bonzini }; 1001c50d8ae3SPaolo Bonzini 1002c50d8ae3SPaolo Bonzini /* 1003c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1004c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 10050a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1006c50d8ae3SPaolo Bonzini * 1007c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1008c50d8ae3SPaolo Bonzini */ 1009c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1010c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1011c50d8ae3SPaolo Bonzini { 1012c50d8ae3SPaolo Bonzini u64 *sptep; 1013c50d8ae3SPaolo Bonzini 1014c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1015c50d8ae3SPaolo Bonzini return NULL; 1016c50d8ae3SPaolo Bonzini 1017c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1018c50d8ae3SPaolo Bonzini iter->desc = NULL; 1019c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1020c50d8ae3SPaolo Bonzini goto out; 1021c50d8ae3SPaolo Bonzini } 1022c50d8ae3SPaolo Bonzini 1023c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1024c50d8ae3SPaolo Bonzini iter->pos = 0; 1025c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1026c50d8ae3SPaolo Bonzini out: 1027c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1028c50d8ae3SPaolo Bonzini return sptep; 1029c50d8ae3SPaolo Bonzini } 1030c50d8ae3SPaolo Bonzini 1031c50d8ae3SPaolo Bonzini /* 1032c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1033c50d8ae3SPaolo Bonzini * 1034c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1035c50d8ae3SPaolo Bonzini */ 1036c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1037c50d8ae3SPaolo Bonzini { 1038c50d8ae3SPaolo Bonzini u64 *sptep; 1039c50d8ae3SPaolo Bonzini 1040c50d8ae3SPaolo Bonzini if (iter->desc) { 1041c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1042c50d8ae3SPaolo Bonzini ++iter->pos; 1043c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1044c50d8ae3SPaolo Bonzini if (sptep) 1045c50d8ae3SPaolo Bonzini goto out; 1046c50d8ae3SPaolo Bonzini } 1047c50d8ae3SPaolo Bonzini 1048c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1049c50d8ae3SPaolo Bonzini 1050c50d8ae3SPaolo Bonzini if (iter->desc) { 1051c50d8ae3SPaolo Bonzini iter->pos = 0; 1052c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1053c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1054c50d8ae3SPaolo Bonzini goto out; 1055c50d8ae3SPaolo Bonzini } 1056c50d8ae3SPaolo Bonzini } 1057c50d8ae3SPaolo Bonzini 1058c50d8ae3SPaolo Bonzini return NULL; 1059c50d8ae3SPaolo Bonzini out: 1060c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1061c50d8ae3SPaolo Bonzini return sptep; 1062c50d8ae3SPaolo Bonzini } 1063c50d8ae3SPaolo Bonzini 1064c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1065c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1066c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1067c50d8ae3SPaolo Bonzini 1068c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1069c50d8ae3SPaolo Bonzini { 1070c50d8ae3SPaolo Bonzini if (mmu_spte_clear_track_bits(sptep)) 1071c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1072c50d8ae3SPaolo Bonzini } 1073c50d8ae3SPaolo Bonzini 1074c50d8ae3SPaolo Bonzini 1075c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1076c50d8ae3SPaolo Bonzini { 1077c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 107857354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1079c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1080c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1081c50d8ae3SPaolo Bonzini return true; 1082c50d8ae3SPaolo Bonzini } 1083c50d8ae3SPaolo Bonzini 1084c50d8ae3SPaolo Bonzini return false; 1085c50d8ae3SPaolo Bonzini } 1086c50d8ae3SPaolo Bonzini 1087c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1088c50d8ae3SPaolo Bonzini { 1089c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 109057354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1091c50d8ae3SPaolo Bonzini 1092c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1093c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1094c50d8ae3SPaolo Bonzini } 1095c50d8ae3SPaolo Bonzini } 1096c50d8ae3SPaolo Bonzini 1097c50d8ae3SPaolo Bonzini /* 1098c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1099c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1100c50d8ae3SPaolo Bonzini * 1101c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1102c50d8ae3SPaolo Bonzini * protection: 1103c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1104c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1105c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1106c50d8ae3SPaolo Bonzini * shadow page. 1107c50d8ae3SPaolo Bonzini * 1108c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1109c50d8ae3SPaolo Bonzini */ 1110c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1111c50d8ae3SPaolo Bonzini { 1112c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1113c50d8ae3SPaolo Bonzini 1114c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1115c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1116c50d8ae3SPaolo Bonzini return false; 1117c50d8ae3SPaolo Bonzini 1118805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1119c50d8ae3SPaolo Bonzini 1120c50d8ae3SPaolo Bonzini if (pt_protect) 1121c50d8ae3SPaolo Bonzini spte &= ~SPTE_MMU_WRITEABLE; 1122c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1123c50d8ae3SPaolo Bonzini 1124c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1125c50d8ae3SPaolo Bonzini } 1126c50d8ae3SPaolo Bonzini 1127c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1128c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1129c50d8ae3SPaolo Bonzini bool pt_protect) 1130c50d8ae3SPaolo Bonzini { 1131c50d8ae3SPaolo Bonzini u64 *sptep; 1132c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1133c50d8ae3SPaolo Bonzini bool flush = false; 1134c50d8ae3SPaolo Bonzini 1135c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1136c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1137c50d8ae3SPaolo Bonzini 1138c50d8ae3SPaolo Bonzini return flush; 1139c50d8ae3SPaolo Bonzini } 1140c50d8ae3SPaolo Bonzini 1141c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1142c50d8ae3SPaolo Bonzini { 1143c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1144c50d8ae3SPaolo Bonzini 1145805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1146c50d8ae3SPaolo Bonzini 1147c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1148c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1149c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1150c50d8ae3SPaolo Bonzini } 1151c50d8ae3SPaolo Bonzini 1152c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1153c50d8ae3SPaolo Bonzini { 1154c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1155c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1156c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1157c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1158c50d8ae3SPaolo Bonzini 1159c50d8ae3SPaolo Bonzini return was_writable; 1160c50d8ae3SPaolo Bonzini } 1161c50d8ae3SPaolo Bonzini 1162c50d8ae3SPaolo Bonzini /* 1163c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1164c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1165c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1166c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1167c50d8ae3SPaolo Bonzini */ 11680a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 11690a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1170c50d8ae3SPaolo Bonzini { 1171c50d8ae3SPaolo Bonzini u64 *sptep; 1172c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1173c50d8ae3SPaolo Bonzini bool flush = false; 1174c50d8ae3SPaolo Bonzini 1175c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1176c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1177c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1178c50d8ae3SPaolo Bonzini else 1179c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1180c50d8ae3SPaolo Bonzini 1181c50d8ae3SPaolo Bonzini return flush; 1182c50d8ae3SPaolo Bonzini } 1183c50d8ae3SPaolo Bonzini 1184c50d8ae3SPaolo Bonzini static bool spte_set_dirty(u64 *sptep) 1185c50d8ae3SPaolo Bonzini { 1186c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1187c50d8ae3SPaolo Bonzini 1188805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1189c50d8ae3SPaolo Bonzini 1190c50d8ae3SPaolo Bonzini /* 1191afaf0b2fSSean Christopherson * Similar to the !kvm_x86_ops.slot_disable_log_dirty case, 1192c50d8ae3SPaolo Bonzini * do not bother adding back write access to pages marked 1193c50d8ae3SPaolo Bonzini * SPTE_AD_WRPROT_ONLY_MASK. 1194c50d8ae3SPaolo Bonzini */ 1195c50d8ae3SPaolo Bonzini spte |= shadow_dirty_mask; 1196c50d8ae3SPaolo Bonzini 1197c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1198c50d8ae3SPaolo Bonzini } 1199c50d8ae3SPaolo Bonzini 12000a234f5dSSean Christopherson static bool __rmap_set_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 12010a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1202c50d8ae3SPaolo Bonzini { 1203c50d8ae3SPaolo Bonzini u64 *sptep; 1204c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1205c50d8ae3SPaolo Bonzini bool flush = false; 1206c50d8ae3SPaolo Bonzini 1207c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1208c50d8ae3SPaolo Bonzini if (spte_ad_enabled(*sptep)) 1209c50d8ae3SPaolo Bonzini flush |= spte_set_dirty(sptep); 1210c50d8ae3SPaolo Bonzini 1211c50d8ae3SPaolo Bonzini return flush; 1212c50d8ae3SPaolo Bonzini } 1213c50d8ae3SPaolo Bonzini 1214c50d8ae3SPaolo Bonzini /** 1215c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1216c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1217c50d8ae3SPaolo Bonzini * @slot: slot to protect 1218c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1219c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1220c50d8ae3SPaolo Bonzini * 1221c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1222c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1223c50d8ae3SPaolo Bonzini */ 1224c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1225c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1226c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1227c50d8ae3SPaolo Bonzini { 1228c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1229c50d8ae3SPaolo Bonzini 1230897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1231a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1232a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1233c50d8ae3SPaolo Bonzini while (mask) { 1234c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12353bae0459SSean Christopherson PG_LEVEL_4K, slot); 1236c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1237c50d8ae3SPaolo Bonzini 1238c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1239c50d8ae3SPaolo Bonzini mask &= mask - 1; 1240c50d8ae3SPaolo Bonzini } 1241c50d8ae3SPaolo Bonzini } 1242c50d8ae3SPaolo Bonzini 1243c50d8ae3SPaolo Bonzini /** 1244c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1245c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1246c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1247c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1248c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1249c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1250c50d8ae3SPaolo Bonzini * 1251c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1252c50d8ae3SPaolo Bonzini */ 1253*a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1254c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1255c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1256c50d8ae3SPaolo Bonzini { 1257c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1258c50d8ae3SPaolo Bonzini 1259897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1260a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1261a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1262c50d8ae3SPaolo Bonzini while (mask) { 1263c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12643bae0459SSean Christopherson PG_LEVEL_4K, slot); 12650a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1266c50d8ae3SPaolo Bonzini 1267c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1268c50d8ae3SPaolo Bonzini mask &= mask - 1; 1269c50d8ae3SPaolo Bonzini } 1270c50d8ae3SPaolo Bonzini } 1271c50d8ae3SPaolo Bonzini 1272c50d8ae3SPaolo Bonzini /** 1273c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1274c50d8ae3SPaolo Bonzini * PT level pages. 1275c50d8ae3SPaolo Bonzini * 1276c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1277c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1278c50d8ae3SPaolo Bonzini * 1279c50d8ae3SPaolo Bonzini * Used when we do not need to care about huge page mappings: e.g. during dirty 1280c50d8ae3SPaolo Bonzini * logging we do not have any such mappings. 1281c50d8ae3SPaolo Bonzini */ 1282c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1283c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1284c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1285c50d8ae3SPaolo Bonzini { 1286*a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1287*a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1288c50d8ae3SPaolo Bonzini else 1289c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1290c50d8ae3SPaolo Bonzini } 1291c50d8ae3SPaolo Bonzini 1292fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1293fb04a1edSPeter Xu { 12946dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1295fb04a1edSPeter Xu } 1296fb04a1edSPeter Xu 1297c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 1298c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, u64 gfn) 1299c50d8ae3SPaolo Bonzini { 1300c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1301c50d8ae3SPaolo Bonzini int i; 1302c50d8ae3SPaolo Bonzini bool write_protected = false; 1303c50d8ae3SPaolo Bonzini 13043bae0459SSean Christopherson for (i = PG_LEVEL_4K; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1305c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1306c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1307c50d8ae3SPaolo Bonzini } 1308c50d8ae3SPaolo Bonzini 1309897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 131046044f72SBen Gardon write_protected |= 131146044f72SBen Gardon kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn); 131246044f72SBen Gardon 1313c50d8ae3SPaolo Bonzini return write_protected; 1314c50d8ae3SPaolo Bonzini } 1315c50d8ae3SPaolo Bonzini 1316c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1317c50d8ae3SPaolo Bonzini { 1318c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1319c50d8ae3SPaolo Bonzini 1320c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 1321c50d8ae3SPaolo Bonzini return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn); 1322c50d8ae3SPaolo Bonzini } 1323c50d8ae3SPaolo Bonzini 13240a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 13250a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1326c50d8ae3SPaolo Bonzini { 1327c50d8ae3SPaolo Bonzini u64 *sptep; 1328c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1329c50d8ae3SPaolo Bonzini bool flush = false; 1330c50d8ae3SPaolo Bonzini 1331c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1332805a0f83SStephen Zhang rmap_printk("spte %p %llx.\n", sptep, *sptep); 1333c50d8ae3SPaolo Bonzini 1334c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1335c50d8ae3SPaolo Bonzini flush = true; 1336c50d8ae3SPaolo Bonzini } 1337c50d8ae3SPaolo Bonzini 1338c50d8ae3SPaolo Bonzini return flush; 1339c50d8ae3SPaolo Bonzini } 1340c50d8ae3SPaolo Bonzini 1341c50d8ae3SPaolo Bonzini static int kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1342c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1343c50d8ae3SPaolo Bonzini unsigned long data) 1344c50d8ae3SPaolo Bonzini { 13450a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1346c50d8ae3SPaolo Bonzini } 1347c50d8ae3SPaolo Bonzini 1348c50d8ae3SPaolo Bonzini static int kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1349c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1350c50d8ae3SPaolo Bonzini unsigned long data) 1351c50d8ae3SPaolo Bonzini { 1352c50d8ae3SPaolo Bonzini u64 *sptep; 1353c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1354c50d8ae3SPaolo Bonzini int need_flush = 0; 1355c50d8ae3SPaolo Bonzini u64 new_spte; 1356c50d8ae3SPaolo Bonzini pte_t *ptep = (pte_t *)data; 1357c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1358c50d8ae3SPaolo Bonzini 1359c50d8ae3SPaolo Bonzini WARN_ON(pte_huge(*ptep)); 1360c50d8ae3SPaolo Bonzini new_pfn = pte_pfn(*ptep); 1361c50d8ae3SPaolo Bonzini 1362c50d8ae3SPaolo Bonzini restart: 1363c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1364805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1365c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1366c50d8ae3SPaolo Bonzini 1367c50d8ae3SPaolo Bonzini need_flush = 1; 1368c50d8ae3SPaolo Bonzini 1369c50d8ae3SPaolo Bonzini if (pte_write(*ptep)) { 1370c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1371c50d8ae3SPaolo Bonzini goto restart; 1372c50d8ae3SPaolo Bonzini } else { 1373cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1374cb3eedabSPaolo Bonzini *sptep, new_pfn); 1375c50d8ae3SPaolo Bonzini 1376c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1377c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1378c50d8ae3SPaolo Bonzini } 1379c50d8ae3SPaolo Bonzini } 1380c50d8ae3SPaolo Bonzini 1381c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1382c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1383c50d8ae3SPaolo Bonzini return 0; 1384c50d8ae3SPaolo Bonzini } 1385c50d8ae3SPaolo Bonzini 1386c50d8ae3SPaolo Bonzini return need_flush; 1387c50d8ae3SPaolo Bonzini } 1388c50d8ae3SPaolo Bonzini 1389c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1390c50d8ae3SPaolo Bonzini /* input fields. */ 1391c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1392c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1393c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1394c50d8ae3SPaolo Bonzini int start_level; 1395c50d8ae3SPaolo Bonzini int end_level; 1396c50d8ae3SPaolo Bonzini 1397c50d8ae3SPaolo Bonzini /* output fields. */ 1398c50d8ae3SPaolo Bonzini gfn_t gfn; 1399c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1400c50d8ae3SPaolo Bonzini int level; 1401c50d8ae3SPaolo Bonzini 1402c50d8ae3SPaolo Bonzini /* private field. */ 1403c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1404c50d8ae3SPaolo Bonzini }; 1405c50d8ae3SPaolo Bonzini 1406c50d8ae3SPaolo Bonzini static void 1407c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1408c50d8ae3SPaolo Bonzini { 1409c50d8ae3SPaolo Bonzini iterator->level = level; 1410c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1411c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1412c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1413c50d8ae3SPaolo Bonzini iterator->slot); 1414c50d8ae3SPaolo Bonzini } 1415c50d8ae3SPaolo Bonzini 1416c50d8ae3SPaolo Bonzini static void 1417c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1418c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, int start_level, 1419c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1420c50d8ae3SPaolo Bonzini { 1421c50d8ae3SPaolo Bonzini iterator->slot = slot; 1422c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1423c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1424c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1425c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1426c50d8ae3SPaolo Bonzini 1427c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1428c50d8ae3SPaolo Bonzini } 1429c50d8ae3SPaolo Bonzini 1430c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1431c50d8ae3SPaolo Bonzini { 1432c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1433c50d8ae3SPaolo Bonzini } 1434c50d8ae3SPaolo Bonzini 1435c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1436c50d8ae3SPaolo Bonzini { 1437c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1438c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1439c50d8ae3SPaolo Bonzini return; 1440c50d8ae3SPaolo Bonzini } 1441c50d8ae3SPaolo Bonzini 1442c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1443c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1444c50d8ae3SPaolo Bonzini return; 1445c50d8ae3SPaolo Bonzini } 1446c50d8ae3SPaolo Bonzini 1447c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1448c50d8ae3SPaolo Bonzini } 1449c50d8ae3SPaolo Bonzini 1450c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1451c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1452c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1453c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1454c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1455c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1456c50d8ae3SPaolo Bonzini 14578f5c44f9SMaciej S. Szmigiero static __always_inline int 14588f5c44f9SMaciej S. Szmigiero kvm_handle_hva_range(struct kvm *kvm, 1459c50d8ae3SPaolo Bonzini unsigned long start, 1460c50d8ae3SPaolo Bonzini unsigned long end, 1461c50d8ae3SPaolo Bonzini unsigned long data, 1462c50d8ae3SPaolo Bonzini int (*handler)(struct kvm *kvm, 1463c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1464c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1465c50d8ae3SPaolo Bonzini gfn_t gfn, 1466c50d8ae3SPaolo Bonzini int level, 1467c50d8ae3SPaolo Bonzini unsigned long data)) 1468c50d8ae3SPaolo Bonzini { 1469c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1470c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 1471c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 1472c50d8ae3SPaolo Bonzini int ret = 0; 1473c50d8ae3SPaolo Bonzini int i; 1474c50d8ae3SPaolo Bonzini 1475c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 1476c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 1477c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 1478c50d8ae3SPaolo Bonzini unsigned long hva_start, hva_end; 1479c50d8ae3SPaolo Bonzini gfn_t gfn_start, gfn_end; 1480c50d8ae3SPaolo Bonzini 1481c50d8ae3SPaolo Bonzini hva_start = max(start, memslot->userspace_addr); 1482c50d8ae3SPaolo Bonzini hva_end = min(end, memslot->userspace_addr + 1483c50d8ae3SPaolo Bonzini (memslot->npages << PAGE_SHIFT)); 1484c50d8ae3SPaolo Bonzini if (hva_start >= hva_end) 1485c50d8ae3SPaolo Bonzini continue; 1486c50d8ae3SPaolo Bonzini /* 1487c50d8ae3SPaolo Bonzini * {gfn(page) | page intersects with [hva_start, hva_end)} = 1488c50d8ae3SPaolo Bonzini * {gfn_start, gfn_start+1, ..., gfn_end-1}. 1489c50d8ae3SPaolo Bonzini */ 1490c50d8ae3SPaolo Bonzini gfn_start = hva_to_gfn_memslot(hva_start, memslot); 1491c50d8ae3SPaolo Bonzini gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); 1492c50d8ae3SPaolo Bonzini 14933bae0459SSean Christopherson for_each_slot_rmap_range(memslot, PG_LEVEL_4K, 1494e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 1495c50d8ae3SPaolo Bonzini gfn_start, gfn_end - 1, 1496c50d8ae3SPaolo Bonzini &iterator) 1497c50d8ae3SPaolo Bonzini ret |= handler(kvm, iterator.rmap, memslot, 1498c50d8ae3SPaolo Bonzini iterator.gfn, iterator.level, data); 1499c50d8ae3SPaolo Bonzini } 1500c50d8ae3SPaolo Bonzini } 1501c50d8ae3SPaolo Bonzini 1502c50d8ae3SPaolo Bonzini return ret; 1503c50d8ae3SPaolo Bonzini } 1504c50d8ae3SPaolo Bonzini 1505c50d8ae3SPaolo Bonzini static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, 1506c50d8ae3SPaolo Bonzini unsigned long data, 1507c50d8ae3SPaolo Bonzini int (*handler)(struct kvm *kvm, 1508c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1509c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1510c50d8ae3SPaolo Bonzini gfn_t gfn, int level, 1511c50d8ae3SPaolo Bonzini unsigned long data)) 1512c50d8ae3SPaolo Bonzini { 1513c50d8ae3SPaolo Bonzini return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler); 1514c50d8ae3SPaolo Bonzini } 1515c50d8ae3SPaolo Bonzini 1516fdfe7cbdSWill Deacon int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1517fdfe7cbdSWill Deacon unsigned flags) 1518c50d8ae3SPaolo Bonzini { 1519063afacdSBen Gardon int r; 1520063afacdSBen Gardon 1521063afacdSBen Gardon r = kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp); 1522063afacdSBen Gardon 1523897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1524063afacdSBen Gardon r |= kvm_tdp_mmu_zap_hva_range(kvm, start, end); 1525063afacdSBen Gardon 1526063afacdSBen Gardon return r; 1527c50d8ae3SPaolo Bonzini } 1528c50d8ae3SPaolo Bonzini 1529c50d8ae3SPaolo Bonzini int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 1530c50d8ae3SPaolo Bonzini { 15311d8dd6b3SBen Gardon int r; 15321d8dd6b3SBen Gardon 15331d8dd6b3SBen Gardon r = kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); 15341d8dd6b3SBen Gardon 1535897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15361d8dd6b3SBen Gardon r |= kvm_tdp_mmu_set_spte_hva(kvm, hva, &pte); 15371d8dd6b3SBen Gardon 15381d8dd6b3SBen Gardon return r; 1539c50d8ae3SPaolo Bonzini } 1540c50d8ae3SPaolo Bonzini 1541c50d8ae3SPaolo Bonzini static int kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1542c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 1543c50d8ae3SPaolo Bonzini unsigned long data) 1544c50d8ae3SPaolo Bonzini { 1545c50d8ae3SPaolo Bonzini u64 *sptep; 15463f649ab7SKees Cook struct rmap_iterator iter; 1547c50d8ae3SPaolo Bonzini int young = 0; 1548c50d8ae3SPaolo Bonzini 1549c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1550c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1551c50d8ae3SPaolo Bonzini 1552c50d8ae3SPaolo Bonzini trace_kvm_age_page(gfn, level, slot, young); 1553c50d8ae3SPaolo Bonzini return young; 1554c50d8ae3SPaolo Bonzini } 1555c50d8ae3SPaolo Bonzini 1556c50d8ae3SPaolo Bonzini static int kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1557c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 1558c50d8ae3SPaolo Bonzini int level, unsigned long data) 1559c50d8ae3SPaolo Bonzini { 1560c50d8ae3SPaolo Bonzini u64 *sptep; 1561c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1562c50d8ae3SPaolo Bonzini 1563c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1564c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1565c50d8ae3SPaolo Bonzini return 1; 1566c50d8ae3SPaolo Bonzini return 0; 1567c50d8ae3SPaolo Bonzini } 1568c50d8ae3SPaolo Bonzini 1569c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1570c50d8ae3SPaolo Bonzini 1571c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1572c50d8ae3SPaolo Bonzini { 1573c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1574c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1575c50d8ae3SPaolo Bonzini 157657354682SSean Christopherson sp = sptep_to_sp(spte); 1577c50d8ae3SPaolo Bonzini 1578c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1579c50d8ae3SPaolo Bonzini 1580c50d8ae3SPaolo Bonzini kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, 0); 1581c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1582c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1583c50d8ae3SPaolo Bonzini } 1584c50d8ae3SPaolo Bonzini 1585c50d8ae3SPaolo Bonzini int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 1586c50d8ae3SPaolo Bonzini { 1587f8e14497SBen Gardon int young = false; 1588f8e14497SBen Gardon 1589f8e14497SBen Gardon young = kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp); 1590897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1591f8e14497SBen Gardon young |= kvm_tdp_mmu_age_hva_range(kvm, start, end); 1592f8e14497SBen Gardon 1593f8e14497SBen Gardon return young; 1594c50d8ae3SPaolo Bonzini } 1595c50d8ae3SPaolo Bonzini 1596c50d8ae3SPaolo Bonzini int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 1597c50d8ae3SPaolo Bonzini { 1598f8e14497SBen Gardon int young = false; 1599f8e14497SBen Gardon 1600f8e14497SBen Gardon young = kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp); 1601897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1602f8e14497SBen Gardon young |= kvm_tdp_mmu_test_age_hva(kvm, hva); 1603f8e14497SBen Gardon 1604f8e14497SBen Gardon return young; 1605c50d8ae3SPaolo Bonzini } 1606c50d8ae3SPaolo Bonzini 1607c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1608c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1609c50d8ae3SPaolo Bonzini { 1610c50d8ae3SPaolo Bonzini u64 *pos; 1611c50d8ae3SPaolo Bonzini u64 *end; 1612c50d8ae3SPaolo Bonzini 1613c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1614c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1615c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1616c50d8ae3SPaolo Bonzini pos, *pos); 1617c50d8ae3SPaolo Bonzini return 0; 1618c50d8ae3SPaolo Bonzini } 1619c50d8ae3SPaolo Bonzini return 1; 1620c50d8ae3SPaolo Bonzini } 1621c50d8ae3SPaolo Bonzini #endif 1622c50d8ae3SPaolo Bonzini 1623c50d8ae3SPaolo Bonzini /* 1624c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1625c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1626c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1627c50d8ae3SPaolo Bonzini * faster 1628c50d8ae3SPaolo Bonzini */ 1629c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 1630c50d8ae3SPaolo Bonzini { 1631c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1632c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1633c50d8ae3SPaolo Bonzini } 1634c50d8ae3SPaolo Bonzini 1635c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1636c50d8ae3SPaolo Bonzini { 1637c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1638c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1639c50d8ae3SPaolo Bonzini list_del(&sp->link); 1640c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1641c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1642c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1643c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1644c50d8ae3SPaolo Bonzini } 1645c50d8ae3SPaolo Bonzini 1646c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1647c50d8ae3SPaolo Bonzini { 1648c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1649c50d8ae3SPaolo Bonzini } 1650c50d8ae3SPaolo Bonzini 1651c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1652c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1653c50d8ae3SPaolo Bonzini { 1654c50d8ae3SPaolo Bonzini if (!parent_pte) 1655c50d8ae3SPaolo Bonzini return; 1656c50d8ae3SPaolo Bonzini 1657c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1658c50d8ae3SPaolo Bonzini } 1659c50d8ae3SPaolo Bonzini 1660c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1661c50d8ae3SPaolo Bonzini u64 *parent_pte) 1662c50d8ae3SPaolo Bonzini { 1663c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1664c50d8ae3SPaolo Bonzini } 1665c50d8ae3SPaolo Bonzini 1666c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1667c50d8ae3SPaolo Bonzini u64 *parent_pte) 1668c50d8ae3SPaolo Bonzini { 1669c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1670c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1671c50d8ae3SPaolo Bonzini } 1672c50d8ae3SPaolo Bonzini 1673c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1674c50d8ae3SPaolo Bonzini { 1675c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1676c50d8ae3SPaolo Bonzini 167794ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 167894ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1679c50d8ae3SPaolo Bonzini if (!direct) 168094ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1681c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1682c50d8ae3SPaolo Bonzini 1683c50d8ae3SPaolo Bonzini /* 1684c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1685c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1686c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1687c50d8ae3SPaolo Bonzini */ 1688c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1689c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1690c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1691c50d8ae3SPaolo Bonzini return sp; 1692c50d8ae3SPaolo Bonzini } 1693c50d8ae3SPaolo Bonzini 1694c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1695c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1696c50d8ae3SPaolo Bonzini { 1697c50d8ae3SPaolo Bonzini u64 *sptep; 1698c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1699c50d8ae3SPaolo Bonzini 1700c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1701c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1702c50d8ae3SPaolo Bonzini } 1703c50d8ae3SPaolo Bonzini } 1704c50d8ae3SPaolo Bonzini 1705c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1706c50d8ae3SPaolo Bonzini { 1707c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1708c50d8ae3SPaolo Bonzini unsigned int index; 1709c50d8ae3SPaolo Bonzini 171057354682SSean Christopherson sp = sptep_to_sp(spte); 1711c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1712c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1713c50d8ae3SPaolo Bonzini return; 1714c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1715c50d8ae3SPaolo Bonzini return; 1716c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1717c50d8ae3SPaolo Bonzini } 1718c50d8ae3SPaolo Bonzini 1719c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1720c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1721c50d8ae3SPaolo Bonzini { 1722c50d8ae3SPaolo Bonzini return 0; 1723c50d8ae3SPaolo Bonzini } 1724c50d8ae3SPaolo Bonzini 1725c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1726c50d8ae3SPaolo Bonzini 1727c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1728c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1729c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1730c50d8ae3SPaolo Bonzini unsigned int idx; 1731c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1732c50d8ae3SPaolo Bonzini unsigned int nr; 1733c50d8ae3SPaolo Bonzini }; 1734c50d8ae3SPaolo Bonzini 1735c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1736c50d8ae3SPaolo Bonzini int idx) 1737c50d8ae3SPaolo Bonzini { 1738c50d8ae3SPaolo Bonzini int i; 1739c50d8ae3SPaolo Bonzini 1740c50d8ae3SPaolo Bonzini if (sp->unsync) 1741c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1742c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1743c50d8ae3SPaolo Bonzini return 0; 1744c50d8ae3SPaolo Bonzini 1745c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1746c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1747c50d8ae3SPaolo Bonzini pvec->nr++; 1748c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1749c50d8ae3SPaolo Bonzini } 1750c50d8ae3SPaolo Bonzini 1751c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1752c50d8ae3SPaolo Bonzini { 1753c50d8ae3SPaolo Bonzini --sp->unsync_children; 1754c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1755c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1756c50d8ae3SPaolo Bonzini } 1757c50d8ae3SPaolo Bonzini 1758c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1759c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1760c50d8ae3SPaolo Bonzini { 1761c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1762c50d8ae3SPaolo Bonzini 1763c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1764c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1765c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1766c50d8ae3SPaolo Bonzini 1767c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1768c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1769c50d8ae3SPaolo Bonzini continue; 1770c50d8ae3SPaolo Bonzini } 1771c50d8ae3SPaolo Bonzini 1772e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1773c50d8ae3SPaolo Bonzini 1774c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1775c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1776c50d8ae3SPaolo Bonzini return -ENOSPC; 1777c50d8ae3SPaolo Bonzini 1778c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1779c50d8ae3SPaolo Bonzini if (!ret) { 1780c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1781c50d8ae3SPaolo Bonzini continue; 1782c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1783c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1784c50d8ae3SPaolo Bonzini } else 1785c50d8ae3SPaolo Bonzini return ret; 1786c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1787c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1788c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1789c50d8ae3SPaolo Bonzini return -ENOSPC; 1790c50d8ae3SPaolo Bonzini } else 1791c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1792c50d8ae3SPaolo Bonzini } 1793c50d8ae3SPaolo Bonzini 1794c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1795c50d8ae3SPaolo Bonzini } 1796c50d8ae3SPaolo Bonzini 1797c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1798c50d8ae3SPaolo Bonzini 1799c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1800c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1801c50d8ae3SPaolo Bonzini { 1802c50d8ae3SPaolo Bonzini pvec->nr = 0; 1803c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1804c50d8ae3SPaolo Bonzini return 0; 1805c50d8ae3SPaolo Bonzini 1806c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1807c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1808c50d8ae3SPaolo Bonzini } 1809c50d8ae3SPaolo Bonzini 1810c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1811c50d8ae3SPaolo Bonzini { 1812c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1813c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1814c50d8ae3SPaolo Bonzini sp->unsync = 0; 1815c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1816c50d8ae3SPaolo Bonzini } 1817c50d8ae3SPaolo Bonzini 1818c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1819c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1820c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1821c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1822c50d8ae3SPaolo Bonzini 1823ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1824ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1825c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1826c50d8ae3SPaolo Bonzini } else 1827c50d8ae3SPaolo Bonzini 1828c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1829ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1830ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1831c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1832c50d8ae3SPaolo Bonzini 1833c50d8ae3SPaolo Bonzini static inline bool is_ept_sp(struct kvm_mmu_page *sp) 1834c50d8ae3SPaolo Bonzini { 1835c50d8ae3SPaolo Bonzini return sp->role.cr0_wp && sp->role.smap_andnot_wp; 1836c50d8ae3SPaolo Bonzini } 1837c50d8ae3SPaolo Bonzini 1838c50d8ae3SPaolo Bonzini /* @sp->gfn should be write-protected at the call site */ 1839c50d8ae3SPaolo Bonzini static bool __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1840c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1841c50d8ae3SPaolo Bonzini { 1842c50d8ae3SPaolo Bonzini if ((!is_ept_sp(sp) && sp->role.gpte_is_8_bytes != !!is_pae(vcpu)) || 1843c50d8ae3SPaolo Bonzini vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 1844c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1845c50d8ae3SPaolo Bonzini return false; 1846c50d8ae3SPaolo Bonzini } 1847c50d8ae3SPaolo Bonzini 1848c50d8ae3SPaolo Bonzini return true; 1849c50d8ae3SPaolo Bonzini } 1850c50d8ae3SPaolo Bonzini 1851c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1852c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1853c50d8ae3SPaolo Bonzini bool remote_flush) 1854c50d8ae3SPaolo Bonzini { 1855c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1856c50d8ae3SPaolo Bonzini return false; 1857c50d8ae3SPaolo Bonzini 1858c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1859c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1860c50d8ae3SPaolo Bonzini else 1861c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1862c50d8ae3SPaolo Bonzini return true; 1863c50d8ae3SPaolo Bonzini } 1864c50d8ae3SPaolo Bonzini 1865c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 1866c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1867c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 1868c50d8ae3SPaolo Bonzini { 1869c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 1870c50d8ae3SPaolo Bonzini return; 1871c50d8ae3SPaolo Bonzini 1872c50d8ae3SPaolo Bonzini if (local_flush) 18738c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 1874c50d8ae3SPaolo Bonzini } 1875c50d8ae3SPaolo Bonzini 1876c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1877c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1878c50d8ae3SPaolo Bonzini #else 1879c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1880c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1881c50d8ae3SPaolo Bonzini #endif 1882c50d8ae3SPaolo Bonzini 1883c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1884c50d8ae3SPaolo Bonzini { 1885c50d8ae3SPaolo Bonzini return sp->role.invalid || 1886c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1887c50d8ae3SPaolo Bonzini } 1888c50d8ae3SPaolo Bonzini 1889c50d8ae3SPaolo Bonzini static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1890c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1891c50d8ae3SPaolo Bonzini { 1892c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(vcpu->kvm, sp); 1893c50d8ae3SPaolo Bonzini return __kvm_sync_page(vcpu, sp, invalid_list); 1894c50d8ae3SPaolo Bonzini } 1895c50d8ae3SPaolo Bonzini 1896c50d8ae3SPaolo Bonzini /* @gfn should be write-protected at the call site */ 1897c50d8ae3SPaolo Bonzini static bool kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, 1898c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1899c50d8ae3SPaolo Bonzini { 1900c50d8ae3SPaolo Bonzini struct kvm_mmu_page *s; 1901c50d8ae3SPaolo Bonzini bool ret = false; 1902c50d8ae3SPaolo Bonzini 1903c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) { 1904c50d8ae3SPaolo Bonzini if (!s->unsync) 1905c50d8ae3SPaolo Bonzini continue; 1906c50d8ae3SPaolo Bonzini 19073bae0459SSean Christopherson WARN_ON(s->role.level != PG_LEVEL_4K); 1908c50d8ae3SPaolo Bonzini ret |= kvm_sync_page(vcpu, s, invalid_list); 1909c50d8ae3SPaolo Bonzini } 1910c50d8ae3SPaolo Bonzini 1911c50d8ae3SPaolo Bonzini return ret; 1912c50d8ae3SPaolo Bonzini } 1913c50d8ae3SPaolo Bonzini 1914c50d8ae3SPaolo Bonzini struct mmu_page_path { 1915c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1916c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1917c50d8ae3SPaolo Bonzini }; 1918c50d8ae3SPaolo Bonzini 1919c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1920c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1921c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1922c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1923c50d8ae3SPaolo Bonzini 1924c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1925c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1926c50d8ae3SPaolo Bonzini int i) 1927c50d8ae3SPaolo Bonzini { 1928c50d8ae3SPaolo Bonzini int n; 1929c50d8ae3SPaolo Bonzini 1930c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1931c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1932c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1933c50d8ae3SPaolo Bonzini int level = sp->role.level; 1934c50d8ae3SPaolo Bonzini 1935c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 19363bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1937c50d8ae3SPaolo Bonzini break; 1938c50d8ae3SPaolo Bonzini 1939c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1940c50d8ae3SPaolo Bonzini } 1941c50d8ae3SPaolo Bonzini 1942c50d8ae3SPaolo Bonzini return n; 1943c50d8ae3SPaolo Bonzini } 1944c50d8ae3SPaolo Bonzini 1945c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1946c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1947c50d8ae3SPaolo Bonzini { 1948c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1949c50d8ae3SPaolo Bonzini int level; 1950c50d8ae3SPaolo Bonzini 1951c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1952c50d8ae3SPaolo Bonzini return 0; 1953c50d8ae3SPaolo Bonzini 1954c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1955c50d8ae3SPaolo Bonzini 1956c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1957c50d8ae3SPaolo Bonzini level = sp->role.level; 19583bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1959c50d8ae3SPaolo Bonzini 1960c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1961c50d8ae3SPaolo Bonzini 1962c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1963c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1964c50d8ae3SPaolo Bonzini */ 1965c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1966c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1967c50d8ae3SPaolo Bonzini } 1968c50d8ae3SPaolo Bonzini 1969c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1970c50d8ae3SPaolo Bonzini { 1971c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1972c50d8ae3SPaolo Bonzini unsigned int level = 0; 1973c50d8ae3SPaolo Bonzini 1974c50d8ae3SPaolo Bonzini do { 1975c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 1976c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 1977c50d8ae3SPaolo Bonzini if (!sp) 1978c50d8ae3SPaolo Bonzini return; 1979c50d8ae3SPaolo Bonzini 1980c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 1981c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 1982c50d8ae3SPaolo Bonzini level++; 1983c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 1984c50d8ae3SPaolo Bonzini } 1985c50d8ae3SPaolo Bonzini 1986c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 1987c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 1988c50d8ae3SPaolo Bonzini { 1989c50d8ae3SPaolo Bonzini int i; 1990c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1991c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 1992c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 1993c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1994c50d8ae3SPaolo Bonzini bool flush = false; 1995c50d8ae3SPaolo Bonzini 1996c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 1997c50d8ae3SPaolo Bonzini bool protected = false; 1998c50d8ae3SPaolo Bonzini 1999c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 2000c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 2001c50d8ae3SPaolo Bonzini 2002c50d8ae3SPaolo Bonzini if (protected) { 2003c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 2004c50d8ae3SPaolo Bonzini flush = false; 2005c50d8ae3SPaolo Bonzini } 2006c50d8ae3SPaolo Bonzini 2007c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2008c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2009c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2010c50d8ae3SPaolo Bonzini } 2011531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 2012c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2013531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 2014c50d8ae3SPaolo Bonzini flush = false; 2015c50d8ae3SPaolo Bonzini } 2016c50d8ae3SPaolo Bonzini } 2017c50d8ae3SPaolo Bonzini 2018c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2019c50d8ae3SPaolo Bonzini } 2020c50d8ae3SPaolo Bonzini 2021c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2022c50d8ae3SPaolo Bonzini { 2023c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2024c50d8ae3SPaolo Bonzini } 2025c50d8ae3SPaolo Bonzini 2026c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2027c50d8ae3SPaolo Bonzini { 202857354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2029c50d8ae3SPaolo Bonzini } 2030c50d8ae3SPaolo Bonzini 2031c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2032c50d8ae3SPaolo Bonzini gfn_t gfn, 2033c50d8ae3SPaolo Bonzini gva_t gaddr, 2034c50d8ae3SPaolo Bonzini unsigned level, 2035c50d8ae3SPaolo Bonzini int direct, 20360a2b64c5SBen Gardon unsigned int access) 2037c50d8ae3SPaolo Bonzini { 2038fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2039c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2040ac101b7cSSean Christopherson struct hlist_head *sp_list; 2041c50d8ae3SPaolo Bonzini unsigned quadrant; 2042c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2043c50d8ae3SPaolo Bonzini bool need_sync = false; 2044c50d8ae3SPaolo Bonzini bool flush = false; 2045c50d8ae3SPaolo Bonzini int collisions = 0; 2046c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2047c50d8ae3SPaolo Bonzini 2048c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2049c50d8ae3SPaolo Bonzini role.level = level; 2050c50d8ae3SPaolo Bonzini role.direct = direct; 2051c50d8ae3SPaolo Bonzini if (role.direct) 2052c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2053c50d8ae3SPaolo Bonzini role.access = access; 2054fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2055c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2056c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2057c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2058c50d8ae3SPaolo Bonzini } 2059ac101b7cSSean Christopherson 2060ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2061ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2062c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2063c50d8ae3SPaolo Bonzini collisions++; 2064c50d8ae3SPaolo Bonzini continue; 2065c50d8ae3SPaolo Bonzini } 2066c50d8ae3SPaolo Bonzini 2067c50d8ae3SPaolo Bonzini if (!need_sync && sp->unsync) 2068c50d8ae3SPaolo Bonzini need_sync = true; 2069c50d8ae3SPaolo Bonzini 2070c50d8ae3SPaolo Bonzini if (sp->role.word != role.word) 2071c50d8ae3SPaolo Bonzini continue; 2072c50d8ae3SPaolo Bonzini 2073fb58a9c3SSean Christopherson if (direct_mmu) 2074fb58a9c3SSean Christopherson goto trace_get_page; 2075fb58a9c3SSean Christopherson 2076c50d8ae3SPaolo Bonzini if (sp->unsync) { 2077c50d8ae3SPaolo Bonzini /* The page is good, but __kvm_sync_page might still end 2078c50d8ae3SPaolo Bonzini * up zapping it. If so, break in order to rebuild it. 2079c50d8ae3SPaolo Bonzini */ 2080c50d8ae3SPaolo Bonzini if (!__kvm_sync_page(vcpu, sp, &invalid_list)) 2081c50d8ae3SPaolo Bonzini break; 2082c50d8ae3SPaolo Bonzini 2083c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 20848c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2085c50d8ae3SPaolo Bonzini } 2086c50d8ae3SPaolo Bonzini 2087c50d8ae3SPaolo Bonzini if (sp->unsync_children) 2088f6f6195bSLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 2089c50d8ae3SPaolo Bonzini 2090c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2091fb58a9c3SSean Christopherson 2092fb58a9c3SSean Christopherson trace_get_page: 2093c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2094c50d8ae3SPaolo Bonzini goto out; 2095c50d8ae3SPaolo Bonzini } 2096c50d8ae3SPaolo Bonzini 2097c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2098c50d8ae3SPaolo Bonzini 2099c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2100c50d8ae3SPaolo Bonzini 2101c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2102c50d8ae3SPaolo Bonzini sp->role = role; 2103ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2104c50d8ae3SPaolo Bonzini if (!direct) { 2105c50d8ae3SPaolo Bonzini /* 2106c50d8ae3SPaolo Bonzini * we should do write protection before syncing pages 2107c50d8ae3SPaolo Bonzini * otherwise the content of the synced shadow page may 2108c50d8ae3SPaolo Bonzini * be inconsistent with guest page table. 2109c50d8ae3SPaolo Bonzini */ 2110c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 21113bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2112c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2113c50d8ae3SPaolo Bonzini 21143bae0459SSean Christopherson if (level > PG_LEVEL_4K && need_sync) 2115c50d8ae3SPaolo Bonzini flush |= kvm_sync_pages(vcpu, gfn, &invalid_list); 2116c50d8ae3SPaolo Bonzini } 2117c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2118c50d8ae3SPaolo Bonzini 2119c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2120c50d8ae3SPaolo Bonzini out: 2121c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2122c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2123c50d8ae3SPaolo Bonzini return sp; 2124c50d8ae3SPaolo Bonzini } 2125c50d8ae3SPaolo Bonzini 2126c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2127c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2128c50d8ae3SPaolo Bonzini u64 addr) 2129c50d8ae3SPaolo Bonzini { 2130c50d8ae3SPaolo Bonzini iterator->addr = addr; 2131c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2132c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2133c50d8ae3SPaolo Bonzini 2134c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2135c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2136c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2137c50d8ae3SPaolo Bonzini --iterator->level; 2138c50d8ae3SPaolo Bonzini 2139c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2140c50d8ae3SPaolo Bonzini /* 2141c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2142c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2143c50d8ae3SPaolo Bonzini */ 2144c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2145c50d8ae3SPaolo Bonzini 2146c50d8ae3SPaolo Bonzini iterator->shadow_addr 2147c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2148c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2149c50d8ae3SPaolo Bonzini --iterator->level; 2150c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2151c50d8ae3SPaolo Bonzini iterator->level = 0; 2152c50d8ae3SPaolo Bonzini } 2153c50d8ae3SPaolo Bonzini } 2154c50d8ae3SPaolo Bonzini 2155c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2156c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2157c50d8ae3SPaolo Bonzini { 2158c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2159c50d8ae3SPaolo Bonzini addr); 2160c50d8ae3SPaolo Bonzini } 2161c50d8ae3SPaolo Bonzini 2162c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2163c50d8ae3SPaolo Bonzini { 21643bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2165c50d8ae3SPaolo Bonzini return false; 2166c50d8ae3SPaolo Bonzini 2167c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2168c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2169c50d8ae3SPaolo Bonzini return true; 2170c50d8ae3SPaolo Bonzini } 2171c50d8ae3SPaolo Bonzini 2172c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2173c50d8ae3SPaolo Bonzini u64 spte) 2174c50d8ae3SPaolo Bonzini { 2175c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2176c50d8ae3SPaolo Bonzini iterator->level = 0; 2177c50d8ae3SPaolo Bonzini return; 2178c50d8ae3SPaolo Bonzini } 2179c50d8ae3SPaolo Bonzini 2180c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2181c50d8ae3SPaolo Bonzini --iterator->level; 2182c50d8ae3SPaolo Bonzini } 2183c50d8ae3SPaolo Bonzini 2184c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2185c50d8ae3SPaolo Bonzini { 2186c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2187c50d8ae3SPaolo Bonzini } 2188c50d8ae3SPaolo Bonzini 2189c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2190c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2191c50d8ae3SPaolo Bonzini { 2192c50d8ae3SPaolo Bonzini u64 spte; 2193c50d8ae3SPaolo Bonzini 2194c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2195c50d8ae3SPaolo Bonzini 2196cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2197c50d8ae3SPaolo Bonzini 2198c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2199c50d8ae3SPaolo Bonzini 2200c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2201c50d8ae3SPaolo Bonzini 2202c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2203c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2204c50d8ae3SPaolo Bonzini } 2205c50d8ae3SPaolo Bonzini 2206c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2207c50d8ae3SPaolo Bonzini unsigned direct_access) 2208c50d8ae3SPaolo Bonzini { 2209c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2210c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2211c50d8ae3SPaolo Bonzini 2212c50d8ae3SPaolo Bonzini /* 2213c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2214c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2215c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2216c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2217c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2218c50d8ae3SPaolo Bonzini */ 2219e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2220c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2221c50d8ae3SPaolo Bonzini return; 2222c50d8ae3SPaolo Bonzini 2223c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2224c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2225c50d8ae3SPaolo Bonzini } 2226c50d8ae3SPaolo Bonzini } 2227c50d8ae3SPaolo Bonzini 22282de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 22292de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 22302de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2231c50d8ae3SPaolo Bonzini { 2232c50d8ae3SPaolo Bonzini u64 pte; 2233c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2234c50d8ae3SPaolo Bonzini 2235c50d8ae3SPaolo Bonzini pte = *spte; 2236c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2237c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2238c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2239c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2240c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2241c50d8ae3SPaolo Bonzini } else { 2242e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2243c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 22442de4085cSBen Gardon 22452de4085cSBen Gardon /* 22462de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 22472de4085cSBen Gardon * unlikely to be used again in the near future. This 22482de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22492de4085cSBen Gardon */ 22502de4085cSBen Gardon if (tdp_enabled && invalid_list && 22512de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22522de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22532de4085cSBen Gardon invalid_list); 2254c50d8ae3SPaolo Bonzini } 2255ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2256c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2257ace569e0SSean Christopherson } 22582de4085cSBen Gardon return 0; 2259c50d8ae3SPaolo Bonzini } 2260c50d8ae3SPaolo Bonzini 22612de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 22622de4085cSBen Gardon struct kvm_mmu_page *sp, 22632de4085cSBen Gardon struct list_head *invalid_list) 2264c50d8ae3SPaolo Bonzini { 22652de4085cSBen Gardon int zapped = 0; 2266c50d8ae3SPaolo Bonzini unsigned i; 2267c50d8ae3SPaolo Bonzini 2268c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 22692de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 22702de4085cSBen Gardon 22712de4085cSBen Gardon return zapped; 2272c50d8ae3SPaolo Bonzini } 2273c50d8ae3SPaolo Bonzini 2274c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2275c50d8ae3SPaolo Bonzini { 2276c50d8ae3SPaolo Bonzini u64 *sptep; 2277c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2278c50d8ae3SPaolo Bonzini 2279c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2280c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2281c50d8ae3SPaolo Bonzini } 2282c50d8ae3SPaolo Bonzini 2283c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2284c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2285c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2286c50d8ae3SPaolo Bonzini { 2287c50d8ae3SPaolo Bonzini int i, zapped = 0; 2288c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2289c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2290c50d8ae3SPaolo Bonzini 22913bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2292c50d8ae3SPaolo Bonzini return 0; 2293c50d8ae3SPaolo Bonzini 2294c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2295c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2296c50d8ae3SPaolo Bonzini 2297c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2298c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2299c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2300c50d8ae3SPaolo Bonzini zapped++; 2301c50d8ae3SPaolo Bonzini } 2302c50d8ae3SPaolo Bonzini } 2303c50d8ae3SPaolo Bonzini 2304c50d8ae3SPaolo Bonzini return zapped; 2305c50d8ae3SPaolo Bonzini } 2306c50d8ae3SPaolo Bonzini 2307c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2308c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2309c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2310c50d8ae3SPaolo Bonzini int *nr_zapped) 2311c50d8ae3SPaolo Bonzini { 2312c50d8ae3SPaolo Bonzini bool list_unstable; 2313c50d8ae3SPaolo Bonzini 2314c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2315c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2316c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 23172de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2318c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2319c50d8ae3SPaolo Bonzini 2320c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2321c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2322c50d8ae3SPaolo Bonzini 2323c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2324c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2325c50d8ae3SPaolo Bonzini 2326c50d8ae3SPaolo Bonzini if (sp->unsync) 2327c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2328c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2329c50d8ae3SPaolo Bonzini /* Count self */ 2330c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2331f95eec9bSSean Christopherson 2332f95eec9bSSean Christopherson /* 2333f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2334f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2335f95eec9bSSean Christopherson * !sp->root_count. 2336f95eec9bSSean Christopherson */ 2337f95eec9bSSean Christopherson if (sp->role.invalid) 2338f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2339f95eec9bSSean Christopherson else 2340c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2341c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2342c50d8ae3SPaolo Bonzini } else { 2343f95eec9bSSean Christopherson /* 2344f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2345f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2346f95eec9bSSean Christopherson */ 2347f95eec9bSSean Christopherson list_del(&sp->link); 2348c50d8ae3SPaolo Bonzini 2349c50d8ae3SPaolo Bonzini /* 2350c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2351c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2352c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2353c50d8ae3SPaolo Bonzini */ 2354c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2355c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2356c50d8ae3SPaolo Bonzini } 2357c50d8ae3SPaolo Bonzini 2358c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2359c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2360c50d8ae3SPaolo Bonzini 2361c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2362c50d8ae3SPaolo Bonzini return list_unstable; 2363c50d8ae3SPaolo Bonzini } 2364c50d8ae3SPaolo Bonzini 2365c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2366c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2367c50d8ae3SPaolo Bonzini { 2368c50d8ae3SPaolo Bonzini int nr_zapped; 2369c50d8ae3SPaolo Bonzini 2370c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2371c50d8ae3SPaolo Bonzini return nr_zapped; 2372c50d8ae3SPaolo Bonzini } 2373c50d8ae3SPaolo Bonzini 2374c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2375c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2376c50d8ae3SPaolo Bonzini { 2377c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2378c50d8ae3SPaolo Bonzini 2379c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2380c50d8ae3SPaolo Bonzini return; 2381c50d8ae3SPaolo Bonzini 2382c50d8ae3SPaolo Bonzini /* 2383c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2384c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2385c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2386c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2387c50d8ae3SPaolo Bonzini * 2388c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2389c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2390c50d8ae3SPaolo Bonzini */ 2391c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2392c50d8ae3SPaolo Bonzini 2393c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2394c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2395c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2396c50d8ae3SPaolo Bonzini } 2397c50d8ae3SPaolo Bonzini } 2398c50d8ae3SPaolo Bonzini 23996b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 24006b82ef2cSSean Christopherson unsigned long nr_to_zap) 2401c50d8ae3SPaolo Bonzini { 24026b82ef2cSSean Christopherson unsigned long total_zapped = 0; 24036b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2404ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 24056b82ef2cSSean Christopherson bool unstable; 24066b82ef2cSSean Christopherson int nr_zapped; 2407c50d8ae3SPaolo Bonzini 2408c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2409ba7888ddSSean Christopherson return 0; 2410c50d8ae3SPaolo Bonzini 24116b82ef2cSSean Christopherson restart: 24128fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 24136b82ef2cSSean Christopherson /* 24146b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 24156b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 24166b82ef2cSSean Christopherson */ 24176b82ef2cSSean Christopherson if (sp->root_count) 24186b82ef2cSSean Christopherson continue; 24196b82ef2cSSean Christopherson 24206b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 24216b82ef2cSSean Christopherson &nr_zapped); 24226b82ef2cSSean Christopherson total_zapped += nr_zapped; 24236b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2424ba7888ddSSean Christopherson break; 2425ba7888ddSSean Christopherson 24266b82ef2cSSean Christopherson if (unstable) 24276b82ef2cSSean Christopherson goto restart; 2428ba7888ddSSean Christopherson } 24296b82ef2cSSean Christopherson 24306b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 24316b82ef2cSSean Christopherson 24326b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 24336b82ef2cSSean Christopherson return total_zapped; 24346b82ef2cSSean Christopherson } 24356b82ef2cSSean Christopherson 2436afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2437afe8d7e6SSean Christopherson { 2438afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2439afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2440afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2441afe8d7e6SSean Christopherson 2442afe8d7e6SSean Christopherson return 0; 2443c50d8ae3SPaolo Bonzini } 2444c50d8ae3SPaolo Bonzini 2445ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2446ba7888ddSSean Christopherson { 24476b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2448ba7888ddSSean Christopherson 24496b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2450ba7888ddSSean Christopherson return 0; 2451ba7888ddSSean Christopherson 24526b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2453ba7888ddSSean Christopherson 2454ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2455ba7888ddSSean Christopherson return -ENOSPC; 2456ba7888ddSSean Christopherson return 0; 2457ba7888ddSSean Christopherson } 2458ba7888ddSSean Christopherson 2459c50d8ae3SPaolo Bonzini /* 2460c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2461c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2462c50d8ae3SPaolo Bonzini */ 2463c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2464c50d8ae3SPaolo Bonzini { 2465531810caSBen Gardon write_lock(&kvm->mmu_lock); 2466c50d8ae3SPaolo Bonzini 2467c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 24686b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 24696b82ef2cSSean Christopherson goal_nr_mmu_pages); 2470c50d8ae3SPaolo Bonzini 2471c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2472c50d8ae3SPaolo Bonzini } 2473c50d8ae3SPaolo Bonzini 2474c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2475c50d8ae3SPaolo Bonzini 2476531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2477c50d8ae3SPaolo Bonzini } 2478c50d8ae3SPaolo Bonzini 2479c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2480c50d8ae3SPaolo Bonzini { 2481c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2482c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2483c50d8ae3SPaolo Bonzini int r; 2484c50d8ae3SPaolo Bonzini 2485c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2486c50d8ae3SPaolo Bonzini r = 0; 2487531810caSBen Gardon write_lock(&kvm->mmu_lock); 2488c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2489c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2490c50d8ae3SPaolo Bonzini sp->role.word); 2491c50d8ae3SPaolo Bonzini r = 1; 2492c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2493c50d8ae3SPaolo Bonzini } 2494c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2495531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2496c50d8ae3SPaolo Bonzini 2497c50d8ae3SPaolo Bonzini return r; 2498c50d8ae3SPaolo Bonzini } 2499c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page); 2500c50d8ae3SPaolo Bonzini 2501c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2502c50d8ae3SPaolo Bonzini { 2503c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2504c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2505c50d8ae3SPaolo Bonzini sp->unsync = 1; 2506c50d8ae3SPaolo Bonzini 2507c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2508c50d8ae3SPaolo Bonzini } 2509c50d8ae3SPaolo Bonzini 25105a9624afSPaolo Bonzini bool mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, 2511c50d8ae3SPaolo Bonzini bool can_unsync) 2512c50d8ae3SPaolo Bonzini { 2513c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2514c50d8ae3SPaolo Bonzini 2515c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 2516c50d8ae3SPaolo Bonzini return true; 2517c50d8ae3SPaolo Bonzini 2518c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2519c50d8ae3SPaolo Bonzini if (!can_unsync) 2520c50d8ae3SPaolo Bonzini return true; 2521c50d8ae3SPaolo Bonzini 2522c50d8ae3SPaolo Bonzini if (sp->unsync) 2523c50d8ae3SPaolo Bonzini continue; 2524c50d8ae3SPaolo Bonzini 25253bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2526c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2527c50d8ae3SPaolo Bonzini } 2528c50d8ae3SPaolo Bonzini 2529c50d8ae3SPaolo Bonzini /* 2530c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2531c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2532c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2533c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2534c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2535c50d8ae3SPaolo Bonzini * following could happen: 2536c50d8ae3SPaolo Bonzini * 2537c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2538c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2539c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2540c50d8ae3SPaolo Bonzini * to be writable 2541c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2542c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2543c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2544c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2545c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2546c50d8ae3SPaolo Bonzini * fault. 2547c50d8ae3SPaolo Bonzini * 2548c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2549c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2550c50d8ae3SPaolo Bonzini * 2551c50d8ae3SPaolo Bonzini * 2.3 kvm_mmu_sync_pages() reads sp->unsync. 2552c50d8ae3SPaolo Bonzini * Since it is false, so it just returns. 2553c50d8ae3SPaolo Bonzini * 2554c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2555c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2556c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2557c50d8ae3SPaolo Bonzini * gets used. 2558c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2559c50d8ae3SPaolo Bonzini * as unsync 2560c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2561c50d8ae3SPaolo Bonzini * 2562c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2563c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2564c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2565c50d8ae3SPaolo Bonzini */ 2566c50d8ae3SPaolo Bonzini smp_wmb(); 2567c50d8ae3SPaolo Bonzini 2568c50d8ae3SPaolo Bonzini return false; 2569c50d8ae3SPaolo Bonzini } 2570c50d8ae3SPaolo Bonzini 2571799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2572799a4190SBen Gardon unsigned int pte_access, int level, 2573799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 2574799a4190SBen Gardon bool can_unsync, bool host_writable) 2575799a4190SBen Gardon { 2576799a4190SBen Gardon u64 spte; 2577799a4190SBen Gardon struct kvm_mmu_page *sp; 2578799a4190SBen Gardon int ret; 2579799a4190SBen Gardon 2580799a4190SBen Gardon if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access)) 2581799a4190SBen Gardon return 0; 2582799a4190SBen Gardon 2583799a4190SBen Gardon sp = sptep_to_sp(sptep); 2584799a4190SBen Gardon 2585799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 2586799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 2587799a4190SBen Gardon 2588799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 2589799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 2590799a4190SBen Gardon 259112703759SSean Christopherson if (*sptep == spte) 259212703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 259312703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 2594c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 2595c50d8ae3SPaolo Bonzini return ret; 2596c50d8ae3SPaolo Bonzini } 2597c50d8ae3SPaolo Bonzini 25980a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2599e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 26000a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 26010a2b64c5SBen Gardon bool host_writable) 2602c50d8ae3SPaolo Bonzini { 2603c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2604c50d8ae3SPaolo Bonzini int rmap_count; 2605c50d8ae3SPaolo Bonzini int set_spte_ret; 2606c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2607c50d8ae3SPaolo Bonzini bool flush = false; 2608c50d8ae3SPaolo Bonzini 2609c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2610c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2611c50d8ae3SPaolo Bonzini 2612c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2613c50d8ae3SPaolo Bonzini /* 2614c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2615c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2616c50d8ae3SPaolo Bonzini */ 26173bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2618c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2619c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2620c50d8ae3SPaolo Bonzini 2621e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2622c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2623c50d8ae3SPaolo Bonzini flush = true; 2624c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2625c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2626c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2627c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2628c50d8ae3SPaolo Bonzini flush = true; 2629c50d8ae3SPaolo Bonzini } else 2630c50d8ae3SPaolo Bonzini was_rmapped = 1; 2631c50d8ae3SPaolo Bonzini } 2632c50d8ae3SPaolo Bonzini 2633c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 2634c50d8ae3SPaolo Bonzini speculative, true, host_writable); 2635c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 2636c50d8ae3SPaolo Bonzini if (write_fault) 2637c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 26388c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2639c50d8ae3SPaolo Bonzini } 2640c50d8ae3SPaolo Bonzini 2641c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 2642c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2643c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2644c50d8ae3SPaolo Bonzini 2645c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) 2646c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 2647c50d8ae3SPaolo Bonzini 264812703759SSean Christopherson /* 264912703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 265012703759SSean Christopherson * are identical, and emulation is not required. 265112703759SSean Christopherson */ 265212703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 265312703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 265412703759SSean Christopherson return RET_PF_SPURIOUS; 265512703759SSean Christopherson } 265612703759SSean Christopherson 2657c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2658c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2659c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 2660c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 2661c50d8ae3SPaolo Bonzini 2662c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2663c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2664c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 2665c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 2666c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 2667c50d8ae3SPaolo Bonzini } 2668c50d8ae3SPaolo Bonzini } 2669c50d8ae3SPaolo Bonzini 2670c50d8ae3SPaolo Bonzini return ret; 2671c50d8ae3SPaolo Bonzini } 2672c50d8ae3SPaolo Bonzini 2673c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 2674c50d8ae3SPaolo Bonzini bool no_dirty_log) 2675c50d8ae3SPaolo Bonzini { 2676c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 2677c50d8ae3SPaolo Bonzini 2678c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 2679c50d8ae3SPaolo Bonzini if (!slot) 2680c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 2681c50d8ae3SPaolo Bonzini 2682c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 2683c50d8ae3SPaolo Bonzini } 2684c50d8ae3SPaolo Bonzini 2685c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2686c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2687c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2688c50d8ae3SPaolo Bonzini { 2689c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2690c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 26910a2b64c5SBen Gardon unsigned int access = sp->role.access; 2692c50d8ae3SPaolo Bonzini int i, ret; 2693c50d8ae3SPaolo Bonzini gfn_t gfn; 2694c50d8ae3SPaolo Bonzini 2695c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2696c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2697c50d8ae3SPaolo Bonzini if (!slot) 2698c50d8ae3SPaolo Bonzini return -1; 2699c50d8ae3SPaolo Bonzini 2700c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2701c50d8ae3SPaolo Bonzini if (ret <= 0) 2702c50d8ae3SPaolo Bonzini return -1; 2703c50d8ae3SPaolo Bonzini 2704c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 2705e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 2706c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 2707c50d8ae3SPaolo Bonzini put_page(pages[i]); 2708c50d8ae3SPaolo Bonzini } 2709c50d8ae3SPaolo Bonzini 2710c50d8ae3SPaolo Bonzini return 0; 2711c50d8ae3SPaolo Bonzini } 2712c50d8ae3SPaolo Bonzini 2713c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2714c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2715c50d8ae3SPaolo Bonzini { 2716c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2717c50d8ae3SPaolo Bonzini int i; 2718c50d8ae3SPaolo Bonzini 2719c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2720c50d8ae3SPaolo Bonzini 2721c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2722c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2723c50d8ae3SPaolo Bonzini 2724c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2725c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2726c50d8ae3SPaolo Bonzini if (!start) 2727c50d8ae3SPaolo Bonzini continue; 2728c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2729c50d8ae3SPaolo Bonzini break; 2730c50d8ae3SPaolo Bonzini start = NULL; 2731c50d8ae3SPaolo Bonzini } else if (!start) 2732c50d8ae3SPaolo Bonzini start = spte; 2733c50d8ae3SPaolo Bonzini } 2734c50d8ae3SPaolo Bonzini } 2735c50d8ae3SPaolo Bonzini 2736c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2737c50d8ae3SPaolo Bonzini { 2738c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2739c50d8ae3SPaolo Bonzini 274057354682SSean Christopherson sp = sptep_to_sp(sptep); 2741c50d8ae3SPaolo Bonzini 2742c50d8ae3SPaolo Bonzini /* 2743c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2744c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2745c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2746c50d8ae3SPaolo Bonzini */ 2747c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2748c50d8ae3SPaolo Bonzini return; 2749c50d8ae3SPaolo Bonzini 27503bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2751c50d8ae3SPaolo Bonzini return; 2752c50d8ae3SPaolo Bonzini 2753c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2754c50d8ae3SPaolo Bonzini } 2755c50d8ae3SPaolo Bonzini 27561b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 27571b6d9d9eSSean Christopherson struct kvm_memory_slot *slot) 2758db543216SSean Christopherson { 2759db543216SSean Christopherson unsigned long hva; 2760db543216SSean Christopherson pte_t *pte; 2761db543216SSean Christopherson int level; 2762db543216SSean Christopherson 2763e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 27643bae0459SSean Christopherson return PG_LEVEL_4K; 2765db543216SSean Christopherson 2766293e306eSSean Christopherson /* 2767293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2768293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2769293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2770293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2771293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2772293e306eSSean Christopherson * read-only memslot. 2773293e306eSSean Christopherson */ 2774db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2775db543216SSean Christopherson 27761b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2777db543216SSean Christopherson if (unlikely(!pte)) 27783bae0459SSean Christopherson return PG_LEVEL_4K; 2779db543216SSean Christopherson 2780db543216SSean Christopherson return level; 2781db543216SSean Christopherson } 2782db543216SSean Christopherson 27831b6d9d9eSSean Christopherson int kvm_mmu_max_mapping_level(struct kvm *kvm, struct kvm_memory_slot *slot, 27841b6d9d9eSSean Christopherson gfn_t gfn, kvm_pfn_t pfn, int max_level) 27851b6d9d9eSSean Christopherson { 27861b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 27871b6d9d9eSSean Christopherson 27881b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 27891b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 27901b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 27911b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 27921b6d9d9eSSean Christopherson break; 27931b6d9d9eSSean Christopherson } 27941b6d9d9eSSean Christopherson 27951b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 27961b6d9d9eSSean Christopherson return PG_LEVEL_4K; 27971b6d9d9eSSean Christopherson 27981b6d9d9eSSean Christopherson return host_pfn_mapping_level(kvm, gfn, pfn, slot); 27991b6d9d9eSSean Christopherson } 28001b6d9d9eSSean Christopherson 2801bb18842eSBen Gardon int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 28023cf06612SSean Christopherson int max_level, kvm_pfn_t *pfnp, 28033cf06612SSean Christopherson bool huge_page_disallowed, int *req_level) 28040885904dSSean Christopherson { 2805293e306eSSean Christopherson struct kvm_memory_slot *slot; 28060885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 280717eff019SSean Christopherson kvm_pfn_t mask; 280883f06fa7SSean Christopherson int level; 28090885904dSSean Christopherson 28103cf06612SSean Christopherson *req_level = PG_LEVEL_4K; 28113cf06612SSean Christopherson 28123bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 28133bae0459SSean Christopherson return PG_LEVEL_4K; 281417eff019SSean Christopherson 2815e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 28163bae0459SSean Christopherson return PG_LEVEL_4K; 281717eff019SSean Christopherson 2818293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 2819293e306eSSean Christopherson if (!slot) 28203bae0459SSean Christopherson return PG_LEVEL_4K; 2821293e306eSSean Christopherson 28221b6d9d9eSSean Christopherson level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, gfn, pfn, max_level); 28233bae0459SSean Christopherson if (level == PG_LEVEL_4K) 282483f06fa7SSean Christopherson return level; 282517eff019SSean Christopherson 28263cf06612SSean Christopherson *req_level = level = min(level, max_level); 28273cf06612SSean Christopherson 28283cf06612SSean Christopherson /* 28293cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28303cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28313cf06612SSean Christopherson */ 28323cf06612SSean Christopherson if (huge_page_disallowed) 28333cf06612SSean Christopherson return PG_LEVEL_4K; 28344cd071d1SSean Christopherson 28350885904dSSean Christopherson /* 28364cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 28374cd071d1SSean Christopherson * the pmd can't be split from under us. 28380885904dSSean Christopherson */ 28390885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 28400885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 28414cd071d1SSean Christopherson *pfnp = pfn & ~mask; 284283f06fa7SSean Christopherson 284383f06fa7SSean Christopherson return level; 28440885904dSSean Christopherson } 28450885904dSSean Christopherson 2846bb18842eSBen Gardon void disallowed_hugepage_adjust(u64 spte, gfn_t gfn, int cur_level, 2847bb18842eSBen Gardon kvm_pfn_t *pfnp, int *goal_levelp) 2848c50d8ae3SPaolo Bonzini { 2849bb18842eSBen Gardon int level = *goal_levelp; 2850c50d8ae3SPaolo Bonzini 28517d945312SBen Gardon if (cur_level == level && level > PG_LEVEL_4K && 2852c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2853c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2854c50d8ae3SPaolo Bonzini /* 2855c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2856c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2857c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2858c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2859c50d8ae3SPaolo Bonzini * the address. 2860c50d8ae3SPaolo Bonzini */ 28617d945312SBen Gardon u64 page_mask = KVM_PAGES_PER_HPAGE(level) - 28627d945312SBen Gardon KVM_PAGES_PER_HPAGE(level - 1); 2863c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 2864bb18842eSBen Gardon (*goal_levelp)--; 2865c50d8ae3SPaolo Bonzini } 2866c50d8ae3SPaolo Bonzini } 2867c50d8ae3SPaolo Bonzini 28686c2fd34fSSean Christopherson static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 286983f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 28706c2fd34fSSean Christopherson bool prefault, bool is_tdp) 2871c50d8ae3SPaolo Bonzini { 28726c2fd34fSSean Christopherson bool nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(); 28736c2fd34fSSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 28746c2fd34fSSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 28756c2fd34fSSean Christopherson bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled; 2876c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2877c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 28783cf06612SSean Christopherson int level, req_level, ret; 2879c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 2880c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 2881c50d8ae3SPaolo Bonzini 28820c7a98e3SSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 2883c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2884c50d8ae3SPaolo Bonzini 28853cf06612SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn, 28863cf06612SSean Christopherson huge_page_disallowed, &req_level); 28874cd071d1SSean Christopherson 2888c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 2889c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 2890c50d8ae3SPaolo Bonzini /* 2891c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2892c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2893c50d8ae3SPaolo Bonzini */ 2894dcc70651SSean Christopherson if (nx_huge_page_workaround_enabled) 28957d945312SBen Gardon disallowed_hugepage_adjust(*it.sptep, gfn, it.level, 28967d945312SBen Gardon &pfn, &level); 2897c50d8ae3SPaolo Bonzini 2898c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 2899c50d8ae3SPaolo Bonzini if (it.level == level) 2900c50d8ae3SPaolo Bonzini break; 2901c50d8ae3SPaolo Bonzini 2902c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 2903c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(*it.sptep)) { 2904c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2905c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2906c50d8ae3SPaolo Bonzini 2907c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 29085bcaf3e1SSean Christopherson if (is_tdp && huge_page_disallowed && 29095bcaf3e1SSean Christopherson req_level >= it.level) 2910c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2911c50d8ae3SPaolo Bonzini } 2912c50d8ae3SPaolo Bonzini } 2913c50d8ae3SPaolo Bonzini 2914c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 2915c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 2916c50d8ae3SPaolo Bonzini map_writable); 291712703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 291812703759SSean Christopherson return ret; 291912703759SSean Christopherson 2920c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2921c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2922c50d8ae3SPaolo Bonzini return ret; 2923c50d8ae3SPaolo Bonzini } 2924c50d8ae3SPaolo Bonzini 2925c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2926c50d8ae3SPaolo Bonzini { 2927c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2928c50d8ae3SPaolo Bonzini } 2929c50d8ae3SPaolo Bonzini 2930c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2931c50d8ae3SPaolo Bonzini { 2932c50d8ae3SPaolo Bonzini /* 2933c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2934c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2935c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2936c50d8ae3SPaolo Bonzini */ 2937c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2938c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 2939c50d8ae3SPaolo Bonzini 2940c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 2941c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 2942c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2943c50d8ae3SPaolo Bonzini } 2944c50d8ae3SPaolo Bonzini 2945c50d8ae3SPaolo Bonzini return -EFAULT; 2946c50d8ae3SPaolo Bonzini } 2947c50d8ae3SPaolo Bonzini 2948c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 29490a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 29500a2b64c5SBen Gardon int *ret_val) 2951c50d8ae3SPaolo Bonzini { 2952c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 2953c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 2954c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 2955c50d8ae3SPaolo Bonzini return true; 2956c50d8ae3SPaolo Bonzini } 2957c50d8ae3SPaolo Bonzini 2958c50d8ae3SPaolo Bonzini if (unlikely(is_noslot_pfn(pfn))) 2959c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 2960c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 2961c50d8ae3SPaolo Bonzini 2962c50d8ae3SPaolo Bonzini return false; 2963c50d8ae3SPaolo Bonzini } 2964c50d8ae3SPaolo Bonzini 2965c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 2966c50d8ae3SPaolo Bonzini { 2967c50d8ae3SPaolo Bonzini /* 2968c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 2969c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 2970c50d8ae3SPaolo Bonzini */ 2971c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 2972c50d8ae3SPaolo Bonzini return false; 2973c50d8ae3SPaolo Bonzini 2974c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 2975c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 2976c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 2977c50d8ae3SPaolo Bonzini return false; 2978c50d8ae3SPaolo Bonzini 2979c50d8ae3SPaolo Bonzini /* 2980c50d8ae3SPaolo Bonzini * #PF can be fast if: 2981c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 2982c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 2983c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 2984c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 2985c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 2986c50d8ae3SPaolo Bonzini * 2987c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 2988c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 2989c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 2990c50d8ae3SPaolo Bonzini * accesses to a present page. 2991c50d8ae3SPaolo Bonzini */ 2992c50d8ae3SPaolo Bonzini 2993c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 2994c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 2995c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 2996c50d8ae3SPaolo Bonzini } 2997c50d8ae3SPaolo Bonzini 2998c50d8ae3SPaolo Bonzini /* 2999c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3000c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3001c50d8ae3SPaolo Bonzini */ 3002c50d8ae3SPaolo Bonzini static bool 3003c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 3004c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3005c50d8ae3SPaolo Bonzini { 3006c50d8ae3SPaolo Bonzini gfn_t gfn; 3007c50d8ae3SPaolo Bonzini 3008c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3009c50d8ae3SPaolo Bonzini 3010c50d8ae3SPaolo Bonzini /* 3011c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3012c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3013c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3014c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3015c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3016c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3017c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3018c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3019c50d8ae3SPaolo Bonzini * 3020c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3021c50d8ae3SPaolo Bonzini */ 3022c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3023c50d8ae3SPaolo Bonzini return false; 3024c50d8ae3SPaolo Bonzini 3025c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3026c50d8ae3SPaolo Bonzini /* 3027c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3028c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3029c50d8ae3SPaolo Bonzini */ 3030c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3031c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3032c50d8ae3SPaolo Bonzini } 3033c50d8ae3SPaolo Bonzini 3034c50d8ae3SPaolo Bonzini return true; 3035c50d8ae3SPaolo Bonzini } 3036c50d8ae3SPaolo Bonzini 3037c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3038c50d8ae3SPaolo Bonzini { 3039c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3040c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3041c50d8ae3SPaolo Bonzini 3042c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3043c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3044c50d8ae3SPaolo Bonzini 3045c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3046c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3047c50d8ae3SPaolo Bonzini } 3048c50d8ae3SPaolo Bonzini 3049c50d8ae3SPaolo Bonzini /* 3050c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3051c50d8ae3SPaolo Bonzini */ 3052c4371c2aSSean Christopherson static int fast_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 3053c50d8ae3SPaolo Bonzini u32 error_code) 3054c50d8ae3SPaolo Bonzini { 3055c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3056c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3057c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3058c50d8ae3SPaolo Bonzini u64 spte = 0ull; 3059c50d8ae3SPaolo Bonzini uint retry_count = 0; 3060c50d8ae3SPaolo Bonzini 3061c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3062c4371c2aSSean Christopherson return ret; 3063c50d8ae3SPaolo Bonzini 3064c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3065c50d8ae3SPaolo Bonzini 3066c50d8ae3SPaolo Bonzini do { 3067c50d8ae3SPaolo Bonzini u64 new_spte; 3068c50d8ae3SPaolo Bonzini 3069736c291cSSean Christopherson for_each_shadow_entry_lockless(vcpu, cr2_or_gpa, iterator, spte) 3070f9fa2509SSean Christopherson if (!is_shadow_present_pte(spte)) 3071c50d8ae3SPaolo Bonzini break; 3072c50d8ae3SPaolo Bonzini 307357354682SSean Christopherson sp = sptep_to_sp(iterator.sptep); 3074c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3075c50d8ae3SPaolo Bonzini break; 3076c50d8ae3SPaolo Bonzini 3077c50d8ae3SPaolo Bonzini /* 3078c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3079c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3080c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3081c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3082c50d8ae3SPaolo Bonzini * current CPU took the fault. 3083c50d8ae3SPaolo Bonzini * 3084c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3085c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3086c50d8ae3SPaolo Bonzini */ 3087c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3088c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3089c50d8ae3SPaolo Bonzini break; 3090c50d8ae3SPaolo Bonzini } 3091c50d8ae3SPaolo Bonzini 3092c50d8ae3SPaolo Bonzini new_spte = spte; 3093c50d8ae3SPaolo Bonzini 3094c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3095c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3096c50d8ae3SPaolo Bonzini 3097c50d8ae3SPaolo Bonzini /* 3098c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3099c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3100c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3101c50d8ae3SPaolo Bonzini */ 3102c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3103e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3104c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3105c50d8ae3SPaolo Bonzini 3106c50d8ae3SPaolo Bonzini /* 3107c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3108c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3109c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3110c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3111c50d8ae3SPaolo Bonzini * 3112c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3113c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3114c50d8ae3SPaolo Bonzini * 3115c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3116c50d8ae3SPaolo Bonzini */ 31173bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3118c50d8ae3SPaolo Bonzini break; 3119c50d8ae3SPaolo Bonzini } 3120c50d8ae3SPaolo Bonzini 3121c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3122c50d8ae3SPaolo Bonzini if (new_spte == spte || 3123c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3124c50d8ae3SPaolo Bonzini break; 3125c50d8ae3SPaolo Bonzini 3126c50d8ae3SPaolo Bonzini /* 3127c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3128c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 31293ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3130c50d8ae3SPaolo Bonzini */ 3131c4371c2aSSean Christopherson if (fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte, 3132c4371c2aSSean Christopherson new_spte)) { 3133c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3134c50d8ae3SPaolo Bonzini break; 3135c4371c2aSSean Christopherson } 3136c50d8ae3SPaolo Bonzini 3137c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3138c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3139c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3140c50d8ae3SPaolo Bonzini break; 3141c50d8ae3SPaolo Bonzini } 3142c50d8ae3SPaolo Bonzini 3143c50d8ae3SPaolo Bonzini } while (true); 3144c50d8ae3SPaolo Bonzini 3145736c291cSSean Christopherson trace_fast_page_fault(vcpu, cr2_or_gpa, error_code, iterator.sptep, 3146c4371c2aSSean Christopherson spte, ret); 3147c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3148c50d8ae3SPaolo Bonzini 3149c4371c2aSSean Christopherson return ret; 3150c50d8ae3SPaolo Bonzini } 3151c50d8ae3SPaolo Bonzini 3152c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3153c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3154c50d8ae3SPaolo Bonzini { 3155c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3156c50d8ae3SPaolo Bonzini 3157c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3158c50d8ae3SPaolo Bonzini return; 3159c50d8ae3SPaolo Bonzini 3160e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 316102c00b3aSBen Gardon 316202c00b3aSBen Gardon if (kvm_mmu_put_root(kvm, sp)) { 3163897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 316402c00b3aSBen Gardon kvm_tdp_mmu_free_root(kvm, sp); 316502c00b3aSBen Gardon else if (sp->role.invalid) 3166c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 316702c00b3aSBen Gardon } 3168c50d8ae3SPaolo Bonzini 3169c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3170c50d8ae3SPaolo Bonzini } 3171c50d8ae3SPaolo Bonzini 3172c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3173c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3174c50d8ae3SPaolo Bonzini ulong roots_to_free) 3175c50d8ae3SPaolo Bonzini { 31764d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3177c50d8ae3SPaolo Bonzini int i; 3178c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3179c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3180c50d8ae3SPaolo Bonzini 3181c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3182c50d8ae3SPaolo Bonzini 3183c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3184c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3185c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3186c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3187c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3188c50d8ae3SPaolo Bonzini break; 3189c50d8ae3SPaolo Bonzini 3190c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3191c50d8ae3SPaolo Bonzini return; 3192c50d8ae3SPaolo Bonzini } 3193c50d8ae3SPaolo Bonzini 3194531810caSBen Gardon write_lock(&kvm->mmu_lock); 3195c50d8ae3SPaolo Bonzini 3196c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3197c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 31984d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3199c50d8ae3SPaolo Bonzini &invalid_list); 3200c50d8ae3SPaolo Bonzini 3201c50d8ae3SPaolo Bonzini if (free_active_root) { 3202c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3203c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 32044d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 3205c50d8ae3SPaolo Bonzini } else { 3206c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 3207c50d8ae3SPaolo Bonzini if (mmu->pae_root[i] != 0) 32084d710de9SSean Christopherson mmu_free_root_page(kvm, 3209c50d8ae3SPaolo Bonzini &mmu->pae_root[i], 3210c50d8ae3SPaolo Bonzini &invalid_list); 3211c50d8ae3SPaolo Bonzini mmu->root_hpa = INVALID_PAGE; 3212c50d8ae3SPaolo Bonzini } 3213be01e8e2SSean Christopherson mmu->root_pgd = 0; 3214c50d8ae3SPaolo Bonzini } 3215c50d8ae3SPaolo Bonzini 32164d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3217531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3218c50d8ae3SPaolo Bonzini } 3219c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3220c50d8ae3SPaolo Bonzini 3221c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3222c50d8ae3SPaolo Bonzini { 3223c50d8ae3SPaolo Bonzini int ret = 0; 3224c50d8ae3SPaolo Bonzini 3225995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3226c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3227c50d8ae3SPaolo Bonzini ret = 1; 3228c50d8ae3SPaolo Bonzini } 3229c50d8ae3SPaolo Bonzini 3230c50d8ae3SPaolo Bonzini return ret; 3231c50d8ae3SPaolo Bonzini } 3232c50d8ae3SPaolo Bonzini 32338123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 32348123f265SSean Christopherson u8 level, bool direct) 3235c50d8ae3SPaolo Bonzini { 3236c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 32378123f265SSean Christopherson 3238531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 32398123f265SSean Christopherson 32408123f265SSean Christopherson if (make_mmu_pages_available(vcpu)) { 3241531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 32428123f265SSean Christopherson return INVALID_PAGE; 32438123f265SSean Christopherson } 32448123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 32458123f265SSean Christopherson ++sp->root_count; 32468123f265SSean Christopherson 3247531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 32488123f265SSean Christopherson return __pa(sp->spt); 32498123f265SSean Christopherson } 32508123f265SSean Christopherson 32518123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 32528123f265SSean Christopherson { 32538123f265SSean Christopherson u8 shadow_root_level = vcpu->arch.mmu->shadow_root_level; 32548123f265SSean Christopherson hpa_t root; 3255c50d8ae3SPaolo Bonzini unsigned i; 3256c50d8ae3SPaolo Bonzini 3257897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 325802c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 325902c00b3aSBen Gardon 326002c00b3aSBen Gardon if (!VALID_PAGE(root)) 326102c00b3aSBen Gardon return -ENOSPC; 326202c00b3aSBen Gardon vcpu->arch.mmu->root_hpa = root; 326302c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 326402c00b3aSBen Gardon root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, 326502c00b3aSBen Gardon true); 326602c00b3aSBen Gardon 32678123f265SSean Christopherson if (!VALID_PAGE(root)) 3268c50d8ae3SPaolo Bonzini return -ENOSPC; 32698123f265SSean Christopherson vcpu->arch.mmu->root_hpa = root; 32708123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 3271c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 32728123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); 3273c50d8ae3SPaolo Bonzini 32748123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 32758123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 32768123f265SSean Christopherson if (!VALID_PAGE(root)) 3277c50d8ae3SPaolo Bonzini return -ENOSPC; 3278c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = root | PT_PRESENT_MASK; 3279c50d8ae3SPaolo Bonzini } 3280c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); 3281c50d8ae3SPaolo Bonzini } else 3282c50d8ae3SPaolo Bonzini BUG(); 32833651c7fcSSean Christopherson 3284be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3285be01e8e2SSean Christopherson vcpu->arch.mmu->root_pgd = 0; 3286c50d8ae3SPaolo Bonzini 3287c50d8ae3SPaolo Bonzini return 0; 3288c50d8ae3SPaolo Bonzini } 3289c50d8ae3SPaolo Bonzini 3290c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3291c50d8ae3SPaolo Bonzini { 3292c50d8ae3SPaolo Bonzini u64 pdptr, pm_mask; 3293be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 32948123f265SSean Christopherson hpa_t root; 3295c50d8ae3SPaolo Bonzini int i; 3296c50d8ae3SPaolo Bonzini 3297be01e8e2SSean Christopherson root_pgd = vcpu->arch.mmu->get_guest_pgd(vcpu); 3298be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3299c50d8ae3SPaolo Bonzini 3300c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3301c50d8ae3SPaolo Bonzini return 1; 3302c50d8ae3SPaolo Bonzini 3303c50d8ae3SPaolo Bonzini /* 3304c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3305c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3306c50d8ae3SPaolo Bonzini */ 3307c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 33088123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->root_hpa)); 3309c50d8ae3SPaolo Bonzini 33108123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 33118123f265SSean Christopherson vcpu->arch.mmu->shadow_root_level, false); 33128123f265SSean Christopherson if (!VALID_PAGE(root)) 3313c50d8ae3SPaolo Bonzini return -ENOSPC; 3314c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = root; 3315be01e8e2SSean Christopherson goto set_root_pgd; 3316c50d8ae3SPaolo Bonzini } 3317c50d8ae3SPaolo Bonzini 3318c50d8ae3SPaolo Bonzini /* 3319c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3320c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3321c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3322c50d8ae3SPaolo Bonzini */ 3323c50d8ae3SPaolo Bonzini pm_mask = PT_PRESENT_MASK; 3324c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) 3325c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3326c50d8ae3SPaolo Bonzini 3327c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 33288123f265SSean Christopherson MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); 3329c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level == PT32E_ROOT_LEVEL) { 3330c50d8ae3SPaolo Bonzini pdptr = vcpu->arch.mmu->get_pdptr(vcpu, i); 3331c50d8ae3SPaolo Bonzini if (!(pdptr & PT_PRESENT_MASK)) { 3332c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = 0; 3333c50d8ae3SPaolo Bonzini continue; 3334c50d8ae3SPaolo Bonzini } 3335c50d8ae3SPaolo Bonzini root_gfn = pdptr >> PAGE_SHIFT; 3336c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3337c50d8ae3SPaolo Bonzini return 1; 3338c50d8ae3SPaolo Bonzini } 3339c50d8ae3SPaolo Bonzini 33408123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 33418123f265SSean Christopherson PT32_ROOT_LEVEL, false); 33428123f265SSean Christopherson if (!VALID_PAGE(root)) 33438123f265SSean Christopherson return -ENOSPC; 3344c50d8ae3SPaolo Bonzini vcpu->arch.mmu->pae_root[i] = root | pm_mask; 3345c50d8ae3SPaolo Bonzini } 3346c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); 3347c50d8ae3SPaolo Bonzini 3348c50d8ae3SPaolo Bonzini /* 3349c50d8ae3SPaolo Bonzini * If we shadow a 32 bit page table with a long mode page 3350c50d8ae3SPaolo Bonzini * table we enter this path. 3351c50d8ae3SPaolo Bonzini */ 3352c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3353c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->lm_root == NULL) { 3354c50d8ae3SPaolo Bonzini /* 3355c50d8ae3SPaolo Bonzini * The additional page necessary for this is only 3356c50d8ae3SPaolo Bonzini * allocated on demand. 3357c50d8ae3SPaolo Bonzini */ 3358c50d8ae3SPaolo Bonzini 3359c50d8ae3SPaolo Bonzini u64 *lm_root; 3360c50d8ae3SPaolo Bonzini 3361c50d8ae3SPaolo Bonzini lm_root = (void*)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3362c50d8ae3SPaolo Bonzini if (lm_root == NULL) 3363c50d8ae3SPaolo Bonzini return 1; 3364c50d8ae3SPaolo Bonzini 3365c50d8ae3SPaolo Bonzini lm_root[0] = __pa(vcpu->arch.mmu->pae_root) | pm_mask; 3366c50d8ae3SPaolo Bonzini 3367c50d8ae3SPaolo Bonzini vcpu->arch.mmu->lm_root = lm_root; 3368c50d8ae3SPaolo Bonzini } 3369c50d8ae3SPaolo Bonzini 3370c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->lm_root); 3371c50d8ae3SPaolo Bonzini } 3372c50d8ae3SPaolo Bonzini 3373be01e8e2SSean Christopherson set_root_pgd: 3374be01e8e2SSean Christopherson vcpu->arch.mmu->root_pgd = root_pgd; 3375c50d8ae3SPaolo Bonzini 3376c50d8ae3SPaolo Bonzini return 0; 3377c50d8ae3SPaolo Bonzini } 3378c50d8ae3SPaolo Bonzini 3379c50d8ae3SPaolo Bonzini static int mmu_alloc_roots(struct kvm_vcpu *vcpu) 3380c50d8ae3SPaolo Bonzini { 3381c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3382c50d8ae3SPaolo Bonzini return mmu_alloc_direct_roots(vcpu); 3383c50d8ae3SPaolo Bonzini else 3384c50d8ae3SPaolo Bonzini return mmu_alloc_shadow_roots(vcpu); 3385c50d8ae3SPaolo Bonzini } 3386c50d8ae3SPaolo Bonzini 3387c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3388c50d8ae3SPaolo Bonzini { 3389c50d8ae3SPaolo Bonzini int i; 3390c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3391c50d8ae3SPaolo Bonzini 3392c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3393c50d8ae3SPaolo Bonzini return; 3394c50d8ae3SPaolo Bonzini 3395c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3396c50d8ae3SPaolo Bonzini return; 3397c50d8ae3SPaolo Bonzini 3398c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3399c50d8ae3SPaolo Bonzini 3400c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3401c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3402e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3403c50d8ae3SPaolo Bonzini 3404c50d8ae3SPaolo Bonzini /* 3405c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3406c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3407c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3408c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3409c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3410c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 3411c50d8ae3SPaolo Bonzini * mmu_need_write_protect() describe what could go wrong if this 3412c50d8ae3SPaolo Bonzini * requirement isn't satisfied. 3413c50d8ae3SPaolo Bonzini */ 3414c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3415c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3416c50d8ae3SPaolo Bonzini return; 3417c50d8ae3SPaolo Bonzini 3418531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3419c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3420c50d8ae3SPaolo Bonzini 3421c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3422c50d8ae3SPaolo Bonzini 3423c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3424531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3425c50d8ae3SPaolo Bonzini return; 3426c50d8ae3SPaolo Bonzini } 3427c50d8ae3SPaolo Bonzini 3428531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3429c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3430c50d8ae3SPaolo Bonzini 3431c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3432c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3433c50d8ae3SPaolo Bonzini 3434c50d8ae3SPaolo Bonzini if (root && VALID_PAGE(root)) { 3435c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3436e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3437c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3438c50d8ae3SPaolo Bonzini } 3439c50d8ae3SPaolo Bonzini } 3440c50d8ae3SPaolo Bonzini 3441c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3442531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3443c50d8ae3SPaolo Bonzini } 3444c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots); 3445c50d8ae3SPaolo Bonzini 3446736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3447c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3448c50d8ae3SPaolo Bonzini { 3449c50d8ae3SPaolo Bonzini if (exception) 3450c50d8ae3SPaolo Bonzini exception->error_code = 0; 3451c50d8ae3SPaolo Bonzini return vaddr; 3452c50d8ae3SPaolo Bonzini } 3453c50d8ae3SPaolo Bonzini 3454736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3455c50d8ae3SPaolo Bonzini u32 access, 3456c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3457c50d8ae3SPaolo Bonzini { 3458c50d8ae3SPaolo Bonzini if (exception) 3459c50d8ae3SPaolo Bonzini exception->error_code = 0; 3460c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3461c50d8ae3SPaolo Bonzini } 3462c50d8ae3SPaolo Bonzini 3463c50d8ae3SPaolo Bonzini static bool 3464c50d8ae3SPaolo Bonzini __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) 3465c50d8ae3SPaolo Bonzini { 3466b5c3c1b3SSean Christopherson int bit7 = (pte >> 7) & 1; 3467c50d8ae3SPaolo Bonzini 3468b5c3c1b3SSean Christopherson return pte & rsvd_check->rsvd_bits_mask[bit7][level-1]; 3469c50d8ae3SPaolo Bonzini } 3470c50d8ae3SPaolo Bonzini 3471b5c3c1b3SSean Christopherson static bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, u64 pte) 3472c50d8ae3SPaolo Bonzini { 3473b5c3c1b3SSean Christopherson return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f); 3474c50d8ae3SPaolo Bonzini } 3475c50d8ae3SPaolo Bonzini 3476c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3477c50d8ae3SPaolo Bonzini { 3478c50d8ae3SPaolo Bonzini /* 3479c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3480c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3481c50d8ae3SPaolo Bonzini */ 3482c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3483c50d8ae3SPaolo Bonzini return false; 3484c50d8ae3SPaolo Bonzini 3485c50d8ae3SPaolo Bonzini if (direct) 3486c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3487c50d8ae3SPaolo Bonzini 3488c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3489c50d8ae3SPaolo Bonzini } 3490c50d8ae3SPaolo Bonzini 349195fb5b02SBen Gardon /* 349295fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 349395fb5b02SBen Gardon * That SPTE may be non-present. 349495fb5b02SBen Gardon */ 349539b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3496c50d8ae3SPaolo Bonzini { 3497c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 34982aa07893SSean Christopherson int leaf = -1; 349995fb5b02SBen Gardon u64 spte; 3500c50d8ae3SPaolo Bonzini 3501c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3502c50d8ae3SPaolo Bonzini 350339b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 350439b4d43eSSean Christopherson *root_level = iterator.level; 3505c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3506c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 350795fb5b02SBen Gardon leaf = iterator.level; 3508c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3509c50d8ae3SPaolo Bonzini 3510dde81f94SSean Christopherson sptes[leaf] = spte; 3511c50d8ae3SPaolo Bonzini 3512c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3513c50d8ae3SPaolo Bonzini break; 351495fb5b02SBen Gardon } 351595fb5b02SBen Gardon 351695fb5b02SBen Gardon walk_shadow_page_lockless_end(vcpu); 351795fb5b02SBen Gardon 351895fb5b02SBen Gardon return leaf; 351995fb5b02SBen Gardon } 352095fb5b02SBen Gardon 35219aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 352295fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 352395fb5b02SBen Gardon { 3524dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 352595fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 352639b4d43eSSean Christopherson int root, leaf, level; 352795fb5b02SBen Gardon bool reserved = false; 352895fb5b02SBen Gardon 352995fb5b02SBen Gardon if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) { 353095fb5b02SBen Gardon *sptep = 0ull; 353195fb5b02SBen Gardon return reserved; 353295fb5b02SBen Gardon } 353395fb5b02SBen Gardon 353495fb5b02SBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 353539b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 353695fb5b02SBen Gardon else 353739b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 353895fb5b02SBen Gardon 35392aa07893SSean Christopherson if (unlikely(leaf < 0)) { 35402aa07893SSean Christopherson *sptep = 0ull; 35412aa07893SSean Christopherson return reserved; 35422aa07893SSean Christopherson } 35432aa07893SSean Christopherson 35449aa41879SSean Christopherson *sptep = sptes[leaf]; 35459aa41879SSean Christopherson 35469aa41879SSean Christopherson /* 35479aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 35489aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 35499aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 35509aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 35519aa41879SSean Christopherson */ 35529aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 35539aa41879SSean Christopherson leaf++; 355495fb5b02SBen Gardon 355595fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 355695fb5b02SBen Gardon 35579aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3558b5c3c1b3SSean Christopherson /* 3559b5c3c1b3SSean Christopherson * Use a bitwise-OR instead of a logical-OR to aggregate the 3560b5c3c1b3SSean Christopherson * reserved bit and EPT's invalid memtype/XWR checks to avoid 3561b5c3c1b3SSean Christopherson * adding a Jcc in the loop. 3562b5c3c1b3SSean Christopherson */ 3563dde81f94SSean Christopherson reserved |= __is_bad_mt_xwr(rsvd_check, sptes[level]) | 3564dde81f94SSean Christopherson __is_rsvd_bits_set(rsvd_check, sptes[level], level); 3565c50d8ae3SPaolo Bonzini 3566c50d8ae3SPaolo Bonzini if (reserved) { 3567c50d8ae3SPaolo Bonzini pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n", 3568c50d8ae3SPaolo Bonzini __func__, addr); 356995fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3570c50d8ae3SPaolo Bonzini pr_err("------ spte 0x%llx level %d.\n", 3571dde81f94SSean Christopherson sptes[level], level); 3572c50d8ae3SPaolo Bonzini } 3573ddce6208SSean Christopherson 3574c50d8ae3SPaolo Bonzini return reserved; 3575c50d8ae3SPaolo Bonzini } 3576c50d8ae3SPaolo Bonzini 3577c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3578c50d8ae3SPaolo Bonzini { 3579c50d8ae3SPaolo Bonzini u64 spte; 3580c50d8ae3SPaolo Bonzini bool reserved; 3581c50d8ae3SPaolo Bonzini 3582c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3583c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3584c50d8ae3SPaolo Bonzini 358595fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3586c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3587c50d8ae3SPaolo Bonzini return -EINVAL; 3588c50d8ae3SPaolo Bonzini 3589c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3590c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 35910a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3592c50d8ae3SPaolo Bonzini 3593c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3594c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3595c50d8ae3SPaolo Bonzini 3596c50d8ae3SPaolo Bonzini if (direct) 3597c50d8ae3SPaolo Bonzini addr = 0; 3598c50d8ae3SPaolo Bonzini 3599c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3600c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3601c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3602c50d8ae3SPaolo Bonzini } 3603c50d8ae3SPaolo Bonzini 3604c50d8ae3SPaolo Bonzini /* 3605c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3606c50d8ae3SPaolo Bonzini * the address. 3607c50d8ae3SPaolo Bonzini */ 3608c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3609c50d8ae3SPaolo Bonzini } 3610c50d8ae3SPaolo Bonzini 3611c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3612c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 3613c50d8ae3SPaolo Bonzini { 3614c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3615c50d8ae3SPaolo Bonzini return false; 3616c50d8ae3SPaolo Bonzini 3617c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 3618c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 3619c50d8ae3SPaolo Bonzini return false; 3620c50d8ae3SPaolo Bonzini 3621c50d8ae3SPaolo Bonzini /* 3622c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3623c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3624c50d8ae3SPaolo Bonzini */ 3625c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 3626c50d8ae3SPaolo Bonzini return true; 3627c50d8ae3SPaolo Bonzini 3628c50d8ae3SPaolo Bonzini return false; 3629c50d8ae3SPaolo Bonzini } 3630c50d8ae3SPaolo Bonzini 3631c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3632c50d8ae3SPaolo Bonzini { 3633c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3634c50d8ae3SPaolo Bonzini u64 spte; 3635c50d8ae3SPaolo Bonzini 3636c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3637c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 3638c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3639c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3640c50d8ae3SPaolo Bonzini break; 3641c50d8ae3SPaolo Bonzini } 3642c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3643c50d8ae3SPaolo Bonzini } 3644c50d8ae3SPaolo Bonzini 3645e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 36469f1a8526SSean Christopherson gfn_t gfn) 3647c50d8ae3SPaolo Bonzini { 3648c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3649c50d8ae3SPaolo Bonzini 3650c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3651c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3652c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3653d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3654c50d8ae3SPaolo Bonzini 36559f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 36569f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3657c50d8ae3SPaolo Bonzini } 3658c50d8ae3SPaolo Bonzini 3659c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 36609f1a8526SSean Christopherson gpa_t cr2_or_gpa, kvm_pfn_t *pfn, bool write, 36619f1a8526SSean Christopherson bool *writable) 3662c50d8ae3SPaolo Bonzini { 3663c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 3664c50d8ae3SPaolo Bonzini bool async; 3665c50d8ae3SPaolo Bonzini 3666c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 3667c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 3668c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 3669c583eed6SSean Christopherson *writable = false; 3670c50d8ae3SPaolo Bonzini return false; 3671c50d8ae3SPaolo Bonzini } 3672c50d8ae3SPaolo Bonzini 3673c50d8ae3SPaolo Bonzini async = false; 3674c50d8ae3SPaolo Bonzini *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable); 3675c50d8ae3SPaolo Bonzini if (!async) 3676c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3677c50d8ae3SPaolo Bonzini 3678c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 36799f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 3680c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 36819f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 3682c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 3683c50d8ae3SPaolo Bonzini return true; 36849f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 3685c50d8ae3SPaolo Bonzini return true; 3686c50d8ae3SPaolo Bonzini } 3687c50d8ae3SPaolo Bonzini 3688c50d8ae3SPaolo Bonzini *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable); 3689c50d8ae3SPaolo Bonzini return false; 3690c50d8ae3SPaolo Bonzini } 3691c50d8ae3SPaolo Bonzini 36920f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 36930f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 3694c50d8ae3SPaolo Bonzini { 3695367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 36960f90e1c1SSean Christopherson bool map_writable; 3697c50d8ae3SPaolo Bonzini 36980f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 36990f90e1c1SSean Christopherson unsigned long mmu_seq; 37000f90e1c1SSean Christopherson kvm_pfn_t pfn; 370183f06fa7SSean Christopherson int r; 3702c50d8ae3SPaolo Bonzini 3703c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 3704c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3705c50d8ae3SPaolo Bonzini 3706bb18842eSBen Gardon if (!is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) { 3707c4371c2aSSean Christopherson r = fast_page_fault(vcpu, gpa, error_code); 3708c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3709c4371c2aSSean Christopherson return r; 3710bb18842eSBen Gardon } 371183291445SSean Christopherson 3712378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3713c50d8ae3SPaolo Bonzini if (r) 3714c50d8ae3SPaolo Bonzini return r; 3715c50d8ae3SPaolo Bonzini 3716367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3717367fd790SSean Christopherson smp_rmb(); 3718367fd790SSean Christopherson 3719367fd790SSean Christopherson if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable)) 3720367fd790SSean Christopherson return RET_PF_RETRY; 3721367fd790SSean Christopherson 37220f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 3723367fd790SSean Christopherson return r; 3724367fd790SSean Christopherson 3725367fd790SSean Christopherson r = RET_PF_RETRY; 3726a2855afcSBen Gardon 3727a2855afcSBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 3728a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3729a2855afcSBen Gardon else 3730531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3731a2855afcSBen Gardon 3732367fd790SSean Christopherson if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) 3733367fd790SSean Christopherson goto out_unlock; 37347bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 37357bd7ded6SSean Christopherson if (r) 3736367fd790SSean Christopherson goto out_unlock; 3737bb18842eSBen Gardon 3738bb18842eSBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 3739bb18842eSBen Gardon r = kvm_tdp_mmu_map(vcpu, gpa, error_code, map_writable, max_level, 3740bb18842eSBen Gardon pfn, prefault); 3741bb18842eSBen Gardon else 37426c2fd34fSSean Christopherson r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, 37436c2fd34fSSean Christopherson prefault, is_tdp); 37440f90e1c1SSean Christopherson 3745367fd790SSean Christopherson out_unlock: 3746a2855afcSBen Gardon if (is_tdp_mmu_root(vcpu->kvm, vcpu->arch.mmu->root_hpa)) 3747a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 3748a2855afcSBen Gardon else 3749531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3750367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 3751367fd790SSean Christopherson return r; 3752c50d8ae3SPaolo Bonzini } 3753c50d8ae3SPaolo Bonzini 37540f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 37550f90e1c1SSean Christopherson u32 error_code, bool prefault) 37560f90e1c1SSean Christopherson { 37570f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 37580f90e1c1SSean Christopherson 37590f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 37600f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 37613bae0459SSean Christopherson PG_LEVEL_2M, false); 37620f90e1c1SSean Christopherson } 37630f90e1c1SSean Christopherson 3764c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 3765c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 3766c50d8ae3SPaolo Bonzini { 3767c50d8ae3SPaolo Bonzini int r = 1; 37689ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 3769c50d8ae3SPaolo Bonzini 3770736c291cSSean Christopherson #ifndef CONFIG_X86_64 3771736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 3772736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 3773736c291cSSean Christopherson return -EFAULT; 3774736c291cSSean Christopherson #endif 3775736c291cSSean Christopherson 3776c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 37779ce372b3SVitaly Kuznetsov if (!flags) { 3778c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 3779c50d8ae3SPaolo Bonzini 3780c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 3781c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 3782c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 3783c50d8ae3SPaolo Bonzini insn_len); 37849ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 378568fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 3786c50d8ae3SPaolo Bonzini local_irq_disable(); 37876bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 3788c50d8ae3SPaolo Bonzini local_irq_enable(); 37899ce372b3SVitaly Kuznetsov } else { 37909ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 3791c50d8ae3SPaolo Bonzini } 37929ce372b3SVitaly Kuznetsov 3793c50d8ae3SPaolo Bonzini return r; 3794c50d8ae3SPaolo Bonzini } 3795c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 3796c50d8ae3SPaolo Bonzini 37977a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 3798c50d8ae3SPaolo Bonzini bool prefault) 3799c50d8ae3SPaolo Bonzini { 3800cb9b88c6SSean Christopherson int max_level; 3801c50d8ae3SPaolo Bonzini 3802e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 38033bae0459SSean Christopherson max_level > PG_LEVEL_4K; 3804cb9b88c6SSean Christopherson max_level--) { 3805cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 38060f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 3807c50d8ae3SPaolo Bonzini 3808cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 3809cb9b88c6SSean Christopherson break; 3810c50d8ae3SPaolo Bonzini } 3811c50d8ae3SPaolo Bonzini 38120f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 38130f90e1c1SSean Christopherson max_level, true); 3814c50d8ae3SPaolo Bonzini } 3815c50d8ae3SPaolo Bonzini 3816c50d8ae3SPaolo Bonzini static void nonpaging_init_context(struct kvm_vcpu *vcpu, 3817c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 3818c50d8ae3SPaolo Bonzini { 3819c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 3820c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 3821c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 38225efac074SPaolo Bonzini context->invlpg = NULL; 3823c50d8ae3SPaolo Bonzini context->root_level = 0; 3824c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 3825c50d8ae3SPaolo Bonzini context->direct_map = true; 3826c50d8ae3SPaolo Bonzini context->nx = false; 3827c50d8ae3SPaolo Bonzini } 3828c50d8ae3SPaolo Bonzini 3829be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 38300be44352SSean Christopherson union kvm_mmu_page_role role) 38310be44352SSean Christopherson { 3832be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 3833e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 3834e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 38350be44352SSean Christopherson } 38360be44352SSean Christopherson 3837c50d8ae3SPaolo Bonzini /* 3838be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 3839c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 3840c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 3841c50d8ae3SPaolo Bonzini * returned. 3842c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 3843c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 3844c50d8ae3SPaolo Bonzini */ 3845be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3846c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 3847c50d8ae3SPaolo Bonzini { 3848c50d8ae3SPaolo Bonzini uint i; 3849c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 3850c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 3851c50d8ae3SPaolo Bonzini 3852be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 3853c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 3854c50d8ae3SPaolo Bonzini 3855be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 38560be44352SSean Christopherson return true; 38570be44352SSean Christopherson 3858c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 3859c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 3860c50d8ae3SPaolo Bonzini 3861be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 3862c50d8ae3SPaolo Bonzini break; 3863c50d8ae3SPaolo Bonzini } 3864c50d8ae3SPaolo Bonzini 3865c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 3866be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 3867c50d8ae3SPaolo Bonzini 3868c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 3869c50d8ae3SPaolo Bonzini } 3870c50d8ae3SPaolo Bonzini 3871be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3872b869855bSSean Christopherson union kvm_mmu_page_role new_role) 3873c50d8ae3SPaolo Bonzini { 3874c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 3875c50d8ae3SPaolo Bonzini 3876c50d8ae3SPaolo Bonzini /* 3877c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 3878c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 3879c50d8ae3SPaolo Bonzini * later if necessary. 3880c50d8ae3SPaolo Bonzini */ 3881c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3882b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 3883fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 3884c50d8ae3SPaolo Bonzini 3885c50d8ae3SPaolo Bonzini return false; 3886c50d8ae3SPaolo Bonzini } 3887c50d8ae3SPaolo Bonzini 3888be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3889c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role, 38904a632ac6SSean Christopherson bool skip_tlb_flush, bool skip_mmu_sync) 3891c50d8ae3SPaolo Bonzini { 3892be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 3893b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 3894b869855bSSean Christopherson return; 3895c50d8ae3SPaolo Bonzini } 3896c50d8ae3SPaolo Bonzini 3897c50d8ae3SPaolo Bonzini /* 3898b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 3899b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 3900b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 3901b869855bSSean Christopherson * free the root set here and allocate a new one. 3902b869855bSSean Christopherson */ 3903b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 3904b869855bSSean Christopherson 390571fe7013SSean Christopherson if (!skip_mmu_sync || force_flush_and_sync_on_reuse) 3906b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 390771fe7013SSean Christopherson if (!skip_tlb_flush || force_flush_and_sync_on_reuse) 3908b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 3909b869855bSSean Christopherson 3910b869855bSSean Christopherson /* 3911b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 3912b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 3913b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 3914b869855bSSean Christopherson * the shadow page tables. 3915c50d8ae3SPaolo Bonzini */ 3916c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3917c50d8ae3SPaolo Bonzini 3918daa5b6c1SBen Gardon /* 3919daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 3920daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 3921daa5b6c1SBen Gardon */ 3922daa5b6c1SBen Gardon if (!new_role.direct) 3923daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 3924daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 3925c50d8ae3SPaolo Bonzini } 3926c50d8ae3SPaolo Bonzini 3927be01e8e2SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 39284a632ac6SSean Christopherson bool skip_mmu_sync) 3929c50d8ae3SPaolo Bonzini { 3930be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu), 39314a632ac6SSean Christopherson skip_tlb_flush, skip_mmu_sync); 3932c50d8ae3SPaolo Bonzini } 3933be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 3934c50d8ae3SPaolo Bonzini 3935c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 3936c50d8ae3SPaolo Bonzini { 3937c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 3938c50d8ae3SPaolo Bonzini } 3939c50d8ae3SPaolo Bonzini 3940c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 39410a2b64c5SBen Gardon unsigned int access, int *nr_present) 3942c50d8ae3SPaolo Bonzini { 3943c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 3944c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 3945c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 3946c50d8ae3SPaolo Bonzini return true; 3947c50d8ae3SPaolo Bonzini } 3948c50d8ae3SPaolo Bonzini 3949c50d8ae3SPaolo Bonzini (*nr_present)++; 3950c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 3951c50d8ae3SPaolo Bonzini return true; 3952c50d8ae3SPaolo Bonzini } 3953c50d8ae3SPaolo Bonzini 3954c50d8ae3SPaolo Bonzini return false; 3955c50d8ae3SPaolo Bonzini } 3956c50d8ae3SPaolo Bonzini 3957c50d8ae3SPaolo Bonzini static inline bool is_last_gpte(struct kvm_mmu *mmu, 3958c50d8ae3SPaolo Bonzini unsigned level, unsigned gpte) 3959c50d8ae3SPaolo Bonzini { 3960c50d8ae3SPaolo Bonzini /* 3961c50d8ae3SPaolo Bonzini * The RHS has bit 7 set iff level < mmu->last_nonleaf_level. 3962c50d8ae3SPaolo Bonzini * If it is clear, there are no large pages at this level, so clear 3963c50d8ae3SPaolo Bonzini * PT_PAGE_SIZE_MASK in gpte if that is the case. 3964c50d8ae3SPaolo Bonzini */ 3965c50d8ae3SPaolo Bonzini gpte &= level - mmu->last_nonleaf_level; 3966c50d8ae3SPaolo Bonzini 3967c50d8ae3SPaolo Bonzini /* 39683bae0459SSean Christopherson * PG_LEVEL_4K always terminates. The RHS has bit 7 set 39693bae0459SSean Christopherson * iff level <= PG_LEVEL_4K, which for our purpose means 39703bae0459SSean Christopherson * level == PG_LEVEL_4K; set PT_PAGE_SIZE_MASK in gpte then. 3971c50d8ae3SPaolo Bonzini */ 39723bae0459SSean Christopherson gpte |= level - PG_LEVEL_4K - 1; 3973c50d8ae3SPaolo Bonzini 3974c50d8ae3SPaolo Bonzini return gpte & PT_PAGE_SIZE_MASK; 3975c50d8ae3SPaolo Bonzini } 3976c50d8ae3SPaolo Bonzini 3977c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 3978c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 3979c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 3980c50d8ae3SPaolo Bonzini #undef PTTYPE 3981c50d8ae3SPaolo Bonzini 3982c50d8ae3SPaolo Bonzini #define PTTYPE 64 3983c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 3984c50d8ae3SPaolo Bonzini #undef PTTYPE 3985c50d8ae3SPaolo Bonzini 3986c50d8ae3SPaolo Bonzini #define PTTYPE 32 3987c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 3988c50d8ae3SPaolo Bonzini #undef PTTYPE 3989c50d8ae3SPaolo Bonzini 3990c50d8ae3SPaolo Bonzini static void 3991c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 3992c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *rsvd_check, 39935b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 3994c50d8ae3SPaolo Bonzini bool pse, bool amd) 3995c50d8ae3SPaolo Bonzini { 3996c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 3997c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 39985b7f575cSSean Christopherson u64 high_bits_rsvd; 3999c50d8ae3SPaolo Bonzini 4000c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4001c50d8ae3SPaolo Bonzini 4002c50d8ae3SPaolo Bonzini if (!gbpages) 4003c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4004c50d8ae3SPaolo Bonzini 40055b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 40065b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 40075b7f575cSSean Christopherson else 40085b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 40095b7f575cSSean Christopherson 40105b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 40115b7f575cSSean Christopherson if (!nx) 40125b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 40135b7f575cSSean Christopherson 4014c50d8ae3SPaolo Bonzini /* 4015c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4016c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4017c50d8ae3SPaolo Bonzini */ 4018c50d8ae3SPaolo Bonzini if (amd) 4019c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4020c50d8ae3SPaolo Bonzini 4021c50d8ae3SPaolo Bonzini switch (level) { 4022c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4023c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4024c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4025c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4026c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4027c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4028c50d8ae3SPaolo Bonzini 4029c50d8ae3SPaolo Bonzini if (!pse) { 4030c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4031c50d8ae3SPaolo Bonzini break; 4032c50d8ae3SPaolo Bonzini } 4033c50d8ae3SPaolo Bonzini 4034c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4035c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4036c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4037c50d8ae3SPaolo Bonzini else 4038c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4039c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4040c50d8ae3SPaolo Bonzini break; 4041c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 40425b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 40435b7f575cSSean Christopherson high_bits_rsvd | 40445b7f575cSSean Christopherson rsvd_bits(5, 8) | 40455b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 40465b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 40475b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 40485b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4049c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4050c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4051c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4052c50d8ae3SPaolo Bonzini break; 4053c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 40545b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 40555b7f575cSSean Christopherson nonleaf_bit8_rsvd | 40565b7f575cSSean Christopherson rsvd_bits(7, 7); 4057c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4058c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4059df561f66SGustavo A. R. Silva fallthrough; 4060c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 40615b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 40625b7f575cSSean Christopherson nonleaf_bit8_rsvd | 40635b7f575cSSean Christopherson rsvd_bits(7, 7); 40645b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 40655b7f575cSSean Christopherson gbpages_bit_rsvd; 40665b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 40675b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4068c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4069c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 40705b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 40715b7f575cSSean Christopherson gbpages_bit_rsvd | 4072c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 40735b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4074c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4075c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4076c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4077c50d8ae3SPaolo Bonzini break; 4078c50d8ae3SPaolo Bonzini } 4079c50d8ae3SPaolo Bonzini } 4080c50d8ae3SPaolo Bonzini 4081c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4082c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4083c50d8ae3SPaolo Bonzini { 4084c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, 40855b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 40865b7f575cSSean Christopherson context->root_level, context->nx, 4087c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 408823493d0aSSean Christopherson is_pse(vcpu), 408923493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4090c50d8ae3SPaolo Bonzini } 4091c50d8ae3SPaolo Bonzini 4092c50d8ae3SPaolo Bonzini static void 4093c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 40945b7f575cSSean Christopherson u64 pa_bits_rsvd, bool execonly) 4095c50d8ae3SPaolo Bonzini { 40965b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 4097c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4098c50d8ae3SPaolo Bonzini 40995b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 41005b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 41015b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6); 41025b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6); 41035b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4104c50d8ae3SPaolo Bonzini 4105c50d8ae3SPaolo Bonzini /* large page */ 4106c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4107c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 41085b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29); 41095b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20); 4110c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4111c50d8ae3SPaolo Bonzini 4112c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4113c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4114c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4115c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4116c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4117c50d8ae3SPaolo Bonzini if (!execonly) { 4118c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4119c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4120c50d8ae3SPaolo Bonzini } 4121c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4122c50d8ae3SPaolo Bonzini } 4123c50d8ae3SPaolo Bonzini 4124c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4125c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4126c50d8ae3SPaolo Bonzini { 4127c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 41285b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, execonly); 4129c50d8ae3SPaolo Bonzini } 4130c50d8ae3SPaolo Bonzini 41316f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 41326f8e65a6SSean Christopherson { 41336f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 41346f8e65a6SSean Christopherson } 41356f8e65a6SSean Christopherson 4136c50d8ae3SPaolo Bonzini /* 4137c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4138c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4139c50d8ae3SPaolo Bonzini * follow the features in guest. 4140c50d8ae3SPaolo Bonzini */ 4141c50d8ae3SPaolo Bonzini void 4142c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) 4143c50d8ae3SPaolo Bonzini { 4144c50d8ae3SPaolo Bonzini bool uses_nx = context->nx || 4145c50d8ae3SPaolo Bonzini context->mmu_role.base.smep_andnot_wp; 4146c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4147c50d8ae3SPaolo Bonzini int i; 4148c50d8ae3SPaolo Bonzini 4149c50d8ae3SPaolo Bonzini /* 4150c50d8ae3SPaolo Bonzini * Passing "true" to the last argument is okay; it adds a check 4151c50d8ae3SPaolo Bonzini * on bit 8 of the SPTEs which KVM doesn't use anyway. 4152c50d8ae3SPaolo Bonzini */ 4153c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4154c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 41556f8e65a6SSean Christopherson reserved_hpa_bits(), 4156c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 4157c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 4158c50d8ae3SPaolo Bonzini is_pse(vcpu), true); 4159c50d8ae3SPaolo Bonzini 4160c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4161c50d8ae3SPaolo Bonzini return; 4162c50d8ae3SPaolo Bonzini 4163c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4164c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4165c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4166c50d8ae3SPaolo Bonzini } 4167c50d8ae3SPaolo Bonzini 4168c50d8ae3SPaolo Bonzini } 4169c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); 4170c50d8ae3SPaolo Bonzini 4171c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4172c50d8ae3SPaolo Bonzini { 4173c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4174c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4175c50d8ae3SPaolo Bonzini } 4176c50d8ae3SPaolo Bonzini 4177c50d8ae3SPaolo Bonzini /* 4178c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4179c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4180c50d8ae3SPaolo Bonzini */ 4181c50d8ae3SPaolo Bonzini static void 4182c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4183c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4184c50d8ae3SPaolo Bonzini { 4185c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4186c50d8ae3SPaolo Bonzini int i; 4187c50d8ae3SPaolo Bonzini 4188c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4189c50d8ae3SPaolo Bonzini 4190c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4191c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 41926f8e65a6SSean Christopherson reserved_hpa_bits(), 4193c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4194c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 4195c50d8ae3SPaolo Bonzini true, true); 4196c50d8ae3SPaolo Bonzini else 4197c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 41986f8e65a6SSean Christopherson reserved_hpa_bits(), false); 4199c50d8ae3SPaolo Bonzini 4200c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4201c50d8ae3SPaolo Bonzini return; 4202c50d8ae3SPaolo Bonzini 4203c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4204c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4205c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4206c50d8ae3SPaolo Bonzini } 4207c50d8ae3SPaolo Bonzini } 4208c50d8ae3SPaolo Bonzini 4209c50d8ae3SPaolo Bonzini /* 4210c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4211c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4212c50d8ae3SPaolo Bonzini */ 4213c50d8ae3SPaolo Bonzini static void 4214c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4215c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4216c50d8ae3SPaolo Bonzini { 4217c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 42186f8e65a6SSean Christopherson reserved_hpa_bits(), execonly); 4219c50d8ae3SPaolo Bonzini } 4220c50d8ae3SPaolo Bonzini 4221c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4222c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4223c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4224c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4225c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4226c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4227c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4228c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4229c50d8ae3SPaolo Bonzini 4230c50d8ae3SPaolo Bonzini 4231c50d8ae3SPaolo Bonzini static void update_permission_bitmask(struct kvm_vcpu *vcpu, 4232c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu, bool ept) 4233c50d8ae3SPaolo Bonzini { 4234c50d8ae3SPaolo Bonzini unsigned byte; 4235c50d8ae3SPaolo Bonzini 4236c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4237c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4238c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4239c50d8ae3SPaolo Bonzini 4240c50d8ae3SPaolo Bonzini bool cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP) != 0; 4241c50d8ae3SPaolo Bonzini bool cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP) != 0; 4242c50d8ae3SPaolo Bonzini bool cr0_wp = is_write_protection(vcpu); 4243c50d8ae3SPaolo Bonzini 4244c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4245c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4246c50d8ae3SPaolo Bonzini 4247c50d8ae3SPaolo Bonzini /* 4248c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4249c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4250c50d8ae3SPaolo Bonzini */ 4251c50d8ae3SPaolo Bonzini 4252c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4253c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4254c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4255c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4256c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4257c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4258c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4259c50d8ae3SPaolo Bonzini u8 smepf = 0; 4260c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4261c50d8ae3SPaolo Bonzini u8 smapf = 0; 4262c50d8ae3SPaolo Bonzini 4263c50d8ae3SPaolo Bonzini if (!ept) { 4264c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4265c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4266c50d8ae3SPaolo Bonzini 4267c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 4268c50d8ae3SPaolo Bonzini if (!mmu->nx) 4269c50d8ae3SPaolo Bonzini ff = 0; 4270c50d8ae3SPaolo Bonzini 4271c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4272c50d8ae3SPaolo Bonzini if (!cr0_wp) 4273c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4274c50d8ae3SPaolo Bonzini 4275c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4276c50d8ae3SPaolo Bonzini if (cr4_smep) 4277c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4278c50d8ae3SPaolo Bonzini 4279c50d8ae3SPaolo Bonzini /* 4280c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4281c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4282c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4283c50d8ae3SPaolo Bonzini * conditions are true: 4284c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4285c50d8ae3SPaolo Bonzini * - A user page is accessed 4286c50d8ae3SPaolo Bonzini * - The access is not a fetch 4287c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4288c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4289c50d8ae3SPaolo Bonzini * 4290c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4291c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4292c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4293c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4294c50d8ae3SPaolo Bonzini */ 4295c50d8ae3SPaolo Bonzini if (cr4_smap) 4296c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4297c50d8ae3SPaolo Bonzini } 4298c50d8ae3SPaolo Bonzini 4299c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4300c50d8ae3SPaolo Bonzini } 4301c50d8ae3SPaolo Bonzini } 4302c50d8ae3SPaolo Bonzini 4303c50d8ae3SPaolo Bonzini /* 4304c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4305c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4306c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4307c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4308c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4309c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4310c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4311c50d8ae3SPaolo Bonzini * 4312c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4313c50d8ae3SPaolo Bonzini * page tables and the machine state: 4314c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4315c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4316c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4317c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4318c50d8ae3SPaolo Bonzini * 4319c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4320c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4321c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4322c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4323c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4324c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4325c50d8ae3SPaolo Bonzini * only will be masked away. 4326c50d8ae3SPaolo Bonzini */ 4327c50d8ae3SPaolo Bonzini static void update_pkru_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 4328c50d8ae3SPaolo Bonzini bool ept) 4329c50d8ae3SPaolo Bonzini { 4330c50d8ae3SPaolo Bonzini unsigned bit; 4331c50d8ae3SPaolo Bonzini bool wp; 4332c50d8ae3SPaolo Bonzini 4333c50d8ae3SPaolo Bonzini if (ept) { 4334c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4335c50d8ae3SPaolo Bonzini return; 4336c50d8ae3SPaolo Bonzini } 4337c50d8ae3SPaolo Bonzini 4338c50d8ae3SPaolo Bonzini /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */ 4339c50d8ae3SPaolo Bonzini if (!kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || !is_long_mode(vcpu)) { 4340c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4341c50d8ae3SPaolo Bonzini return; 4342c50d8ae3SPaolo Bonzini } 4343c50d8ae3SPaolo Bonzini 4344c50d8ae3SPaolo Bonzini wp = is_write_protection(vcpu); 4345c50d8ae3SPaolo Bonzini 4346c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4347c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4348c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4349c50d8ae3SPaolo Bonzini 4350c50d8ae3SPaolo Bonzini pfec = bit << 1; 4351c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4352c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4353c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4354c50d8ae3SPaolo Bonzini 4355c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4356c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4357c50d8ae3SPaolo Bonzini 4358c50d8ae3SPaolo Bonzini /* 4359c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4360c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4361c50d8ae3SPaolo Bonzini */ 4362c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4363c50d8ae3SPaolo Bonzini /* 4364c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4365c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4366c50d8ae3SPaolo Bonzini */ 4367c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4368c50d8ae3SPaolo Bonzini 4369c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4370c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4371c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4372c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4373c50d8ae3SPaolo Bonzini 4374c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4375c50d8ae3SPaolo Bonzini } 4376c50d8ae3SPaolo Bonzini } 4377c50d8ae3SPaolo Bonzini 4378c50d8ae3SPaolo Bonzini static void update_last_nonleaf_level(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 4379c50d8ae3SPaolo Bonzini { 4380c50d8ae3SPaolo Bonzini unsigned root_level = mmu->root_level; 4381c50d8ae3SPaolo Bonzini 4382c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level = root_level; 4383c50d8ae3SPaolo Bonzini if (root_level == PT32_ROOT_LEVEL && is_pse(vcpu)) 4384c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level++; 4385c50d8ae3SPaolo Bonzini } 4386c50d8ae3SPaolo Bonzini 4387c50d8ae3SPaolo Bonzini static void paging64_init_context_common(struct kvm_vcpu *vcpu, 4388c50d8ae3SPaolo Bonzini struct kvm_mmu *context, 4389c50d8ae3SPaolo Bonzini int level) 4390c50d8ae3SPaolo Bonzini { 4391c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4392c50d8ae3SPaolo Bonzini context->root_level = level; 4393c50d8ae3SPaolo Bonzini 4394c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4395c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4396c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4397c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4398c50d8ae3SPaolo Bonzini 4399c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_pae(vcpu)); 4400c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4401c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4402c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4403c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4404c50d8ae3SPaolo Bonzini context->shadow_root_level = level; 4405c50d8ae3SPaolo Bonzini context->direct_map = false; 4406c50d8ae3SPaolo Bonzini } 4407c50d8ae3SPaolo Bonzini 4408c50d8ae3SPaolo Bonzini static void paging64_init_context(struct kvm_vcpu *vcpu, 4409c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4410c50d8ae3SPaolo Bonzini { 4411c50d8ae3SPaolo Bonzini int root_level = is_la57_mode(vcpu) ? 4412c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4413c50d8ae3SPaolo Bonzini 4414c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, root_level); 4415c50d8ae3SPaolo Bonzini } 4416c50d8ae3SPaolo Bonzini 4417c50d8ae3SPaolo Bonzini static void paging32_init_context(struct kvm_vcpu *vcpu, 4418c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4419c50d8ae3SPaolo Bonzini { 4420c50d8ae3SPaolo Bonzini context->nx = false; 4421c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4422c50d8ae3SPaolo Bonzini 4423c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4424c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4425c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4426c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4427c50d8ae3SPaolo Bonzini 4428c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4429c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4430c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4431c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4432c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4433c50d8ae3SPaolo Bonzini context->direct_map = false; 4434c50d8ae3SPaolo Bonzini } 4435c50d8ae3SPaolo Bonzini 4436c50d8ae3SPaolo Bonzini static void paging32E_init_context(struct kvm_vcpu *vcpu, 4437c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4438c50d8ae3SPaolo Bonzini { 4439c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL); 4440c50d8ae3SPaolo Bonzini } 4441c50d8ae3SPaolo Bonzini 4442c50d8ae3SPaolo Bonzini static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu) 4443c50d8ae3SPaolo Bonzini { 4444c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4445c50d8ae3SPaolo Bonzini 4446c50d8ae3SPaolo Bonzini ext.cr0_pg = !!is_paging(vcpu); 4447c50d8ae3SPaolo Bonzini ext.cr4_pae = !!is_pae(vcpu); 4448c50d8ae3SPaolo Bonzini ext.cr4_smep = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); 4449c50d8ae3SPaolo Bonzini ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); 4450c50d8ae3SPaolo Bonzini ext.cr4_pse = !!is_pse(vcpu); 4451c50d8ae3SPaolo Bonzini ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE); 4452c50d8ae3SPaolo Bonzini ext.maxphyaddr = cpuid_maxphyaddr(vcpu); 4453c50d8ae3SPaolo Bonzini 4454c50d8ae3SPaolo Bonzini ext.valid = 1; 4455c50d8ae3SPaolo Bonzini 4456c50d8ae3SPaolo Bonzini return ext; 4457c50d8ae3SPaolo Bonzini } 4458c50d8ae3SPaolo Bonzini 4459c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 4460c50d8ae3SPaolo Bonzini bool base_only) 4461c50d8ae3SPaolo Bonzini { 4462c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4463c50d8ae3SPaolo Bonzini 4464c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4465c50d8ae3SPaolo Bonzini role.base.nxe = !!is_nx(vcpu); 4466c50d8ae3SPaolo Bonzini role.base.cr0_wp = is_write_protection(vcpu); 4467c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4468c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4469c50d8ae3SPaolo Bonzini 4470c50d8ae3SPaolo Bonzini if (base_only) 4471c50d8ae3SPaolo Bonzini return role; 4472c50d8ae3SPaolo Bonzini 4473c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4474c50d8ae3SPaolo Bonzini 4475c50d8ae3SPaolo Bonzini return role; 4476c50d8ae3SPaolo Bonzini } 4477c50d8ae3SPaolo Bonzini 4478d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4479d468d94bSSean Christopherson { 4480d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 448183013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4482d468d94bSSean Christopherson return 4; 4483d468d94bSSean Christopherson 448483013059SSean Christopherson return max_tdp_level; 4485d468d94bSSean Christopherson } 4486d468d94bSSean Christopherson 4487c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4488c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 4489c50d8ae3SPaolo Bonzini { 4490c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4491c50d8ae3SPaolo Bonzini 4492c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4493d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4494c50d8ae3SPaolo Bonzini role.base.direct = true; 4495c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4496c50d8ae3SPaolo Bonzini 4497c50d8ae3SPaolo Bonzini return role; 4498c50d8ae3SPaolo Bonzini } 4499c50d8ae3SPaolo Bonzini 4500c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4501c50d8ae3SPaolo Bonzini { 45028c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4503c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4504c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(vcpu, false); 4505c50d8ae3SPaolo Bonzini 4506c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4507c50d8ae3SPaolo Bonzini return; 4508c50d8ae3SPaolo Bonzini 4509c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 45107a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4511c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 45125efac074SPaolo Bonzini context->invlpg = NULL; 4513d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4514c50d8ae3SPaolo Bonzini context->direct_map = true; 4515d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4516c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4517c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4518c50d8ae3SPaolo Bonzini 4519c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4520c50d8ae3SPaolo Bonzini context->nx = false; 4521c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4522c50d8ae3SPaolo Bonzini context->root_level = 0; 4523c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4524c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4525c50d8ae3SPaolo Bonzini context->root_level = is_la57_mode(vcpu) ? 4526c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4527c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4528c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4529c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4530c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4531c50d8ae3SPaolo Bonzini context->root_level = PT32E_ROOT_LEVEL; 4532c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4533c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4534c50d8ae3SPaolo Bonzini } else { 4535c50d8ae3SPaolo Bonzini context->nx = false; 4536c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4537c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4538c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4539c50d8ae3SPaolo Bonzini } 4540c50d8ae3SPaolo Bonzini 4541c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4542c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4543c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4544c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4545c50d8ae3SPaolo Bonzini } 4546c50d8ae3SPaolo Bonzini 4547c50d8ae3SPaolo Bonzini static union kvm_mmu_role 454859505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, bool base_only) 4549c50d8ae3SPaolo Bonzini { 4550c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4551c50d8ae3SPaolo Bonzini 4552c50d8ae3SPaolo Bonzini role.base.smep_andnot_wp = role.ext.cr4_smep && 4553c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4554c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = role.ext.cr4_smap && 4555c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4556c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = !!is_pae(vcpu); 4557c50d8ae3SPaolo Bonzini 455859505b55SSean Christopherson return role; 455959505b55SSean Christopherson } 456059505b55SSean Christopherson 456159505b55SSean Christopherson static union kvm_mmu_role 456259505b55SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 456359505b55SSean Christopherson { 456459505b55SSean Christopherson union kvm_mmu_role role = 456559505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, base_only); 456659505b55SSean Christopherson 456759505b55SSean Christopherson role.base.direct = !is_paging(vcpu); 456859505b55SSean Christopherson 4569c50d8ae3SPaolo Bonzini if (!is_long_mode(vcpu)) 4570c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 4571c50d8ae3SPaolo Bonzini else if (is_la57_mode(vcpu)) 4572c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4573c50d8ae3SPaolo Bonzini else 4574c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4575c50d8ae3SPaolo Bonzini 4576c50d8ae3SPaolo Bonzini return role; 4577c50d8ae3SPaolo Bonzini } 4578c50d8ae3SPaolo Bonzini 45798c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 45808c008659SPaolo Bonzini u32 cr0, u32 cr4, u32 efer, 45818c008659SPaolo Bonzini union kvm_mmu_role new_role) 4582c50d8ae3SPaolo Bonzini { 4583929d1cfaSPaolo Bonzini if (!(cr0 & X86_CR0_PG)) 4584c50d8ae3SPaolo Bonzini nonpaging_init_context(vcpu, context); 4585929d1cfaSPaolo Bonzini else if (efer & EFER_LMA) 4586c50d8ae3SPaolo Bonzini paging64_init_context(vcpu, context); 4587929d1cfaSPaolo Bonzini else if (cr4 & X86_CR4_PAE) 4588c50d8ae3SPaolo Bonzini paging32E_init_context(vcpu, context); 4589c50d8ae3SPaolo Bonzini else 4590c50d8ae3SPaolo Bonzini paging32_init_context(vcpu, context); 4591c50d8ae3SPaolo Bonzini 4592c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4593c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4594c50d8ae3SPaolo Bonzini } 45950f04a2acSVitaly Kuznetsov 45960f04a2acSVitaly Kuznetsov static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer) 45970f04a2acSVitaly Kuznetsov { 45988c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 45990f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 46000f04a2acSVitaly Kuznetsov kvm_calc_shadow_mmu_root_page_role(vcpu, false); 46010f04a2acSVitaly Kuznetsov 46020f04a2acSVitaly Kuznetsov if (new_role.as_u64 != context->mmu_role.as_u64) 46038c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 46040f04a2acSVitaly Kuznetsov } 46050f04a2acSVitaly Kuznetsov 460659505b55SSean Christopherson static union kvm_mmu_role 460759505b55SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu) 460859505b55SSean Christopherson { 460959505b55SSean Christopherson union kvm_mmu_role role = 461059505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, false); 461159505b55SSean Christopherson 461259505b55SSean Christopherson role.base.direct = false; 4613d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 461459505b55SSean Christopherson 461559505b55SSean Christopherson return role; 461659505b55SSean Christopherson } 461759505b55SSean Christopherson 46180f04a2acSVitaly Kuznetsov void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer, 46190f04a2acSVitaly Kuznetsov gpa_t nested_cr3) 46200f04a2acSVitaly Kuznetsov { 46218c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 462259505b55SSean Christopherson union kvm_mmu_role new_role = kvm_calc_shadow_npt_root_page_role(vcpu); 46230f04a2acSVitaly Kuznetsov 4624096586fdSSean Christopherson context->shadow_root_level = new_role.base.level; 4625096586fdSSean Christopherson 4626a506fdd2SVitaly Kuznetsov __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base, false, false); 4627a506fdd2SVitaly Kuznetsov 46280f04a2acSVitaly Kuznetsov if (new_role.as_u64 != context->mmu_role.as_u64) 46298c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 46300f04a2acSVitaly Kuznetsov } 46310f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4632c50d8ae3SPaolo Bonzini 4633c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4634c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4635bb1fcc70SSean Christopherson bool execonly, u8 level) 4636c50d8ae3SPaolo Bonzini { 4637c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4638c50d8ae3SPaolo Bonzini 4639c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4640c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4641c50d8ae3SPaolo Bonzini 4642bb1fcc70SSean Christopherson role.base.level = level; 4643c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4644c50d8ae3SPaolo Bonzini role.base.direct = false; 4645c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4646c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4647c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4648c50d8ae3SPaolo Bonzini 4649c50d8ae3SPaolo Bonzini /* 4650c50d8ae3SPaolo Bonzini * WP=1 and NOT_WP=1 is an impossible combination, use WP and the 4651c50d8ae3SPaolo Bonzini * SMAP variation to denote shadow EPT entries. 4652c50d8ae3SPaolo Bonzini */ 4653c50d8ae3SPaolo Bonzini role.base.cr0_wp = true; 4654c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = true; 4655c50d8ae3SPaolo Bonzini 4656c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4657c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4658c50d8ae3SPaolo Bonzini 4659c50d8ae3SPaolo Bonzini return role; 4660c50d8ae3SPaolo Bonzini } 4661c50d8ae3SPaolo Bonzini 4662c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4663c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 4664c50d8ae3SPaolo Bonzini { 46658c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4666bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4667c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4668c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4669bb1fcc70SSean Christopherson execonly, level); 4670c50d8ae3SPaolo Bonzini 4671be01e8e2SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base, true, true); 4672c50d8ae3SPaolo Bonzini 4673c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4674c50d8ae3SPaolo Bonzini return; 4675c50d8ae3SPaolo Bonzini 4676bb1fcc70SSean Christopherson context->shadow_root_level = level; 4677c50d8ae3SPaolo Bonzini 4678c50d8ae3SPaolo Bonzini context->nx = true; 4679c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4680c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4681c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4682c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4683c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4684bb1fcc70SSean Christopherson context->root_level = level; 4685c50d8ae3SPaolo Bonzini context->direct_map = false; 4686c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4687c50d8ae3SPaolo Bonzini 4688c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, true); 4689c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, true); 4690c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4691c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 4692c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4693c50d8ae3SPaolo Bonzini } 4694c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4695c50d8ae3SPaolo Bonzini 4696c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4697c50d8ae3SPaolo Bonzini { 46988c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4699c50d8ae3SPaolo Bonzini 4700929d1cfaSPaolo Bonzini kvm_init_shadow_mmu(vcpu, 4701929d1cfaSPaolo Bonzini kvm_read_cr0_bits(vcpu, X86_CR0_PG), 4702929d1cfaSPaolo Bonzini kvm_read_cr4_bits(vcpu, X86_CR4_PAE), 4703929d1cfaSPaolo Bonzini vcpu->arch.efer); 4704929d1cfaSPaolo Bonzini 4705d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4706c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4707c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4708c50d8ae3SPaolo Bonzini } 4709c50d8ae3SPaolo Bonzini 4710c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4711c50d8ae3SPaolo Bonzini { 4712c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = kvm_calc_mmu_role_common(vcpu, false); 4713c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4714c50d8ae3SPaolo Bonzini 4715c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4716c50d8ae3SPaolo Bonzini return; 4717c50d8ae3SPaolo Bonzini 4718c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4719d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4720c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4721c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 4722c50d8ae3SPaolo Bonzini 4723c50d8ae3SPaolo Bonzini /* 47245efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 47255efac074SPaolo Bonzini * SPTEs. 47265efac074SPaolo Bonzini */ 47275efac074SPaolo Bonzini g_context->invlpg = NULL; 47285efac074SPaolo Bonzini 47295efac074SPaolo Bonzini /* 4730c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4731c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4732c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4733c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4734c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4735c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4736c50d8ae3SPaolo Bonzini */ 4737c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4738c50d8ae3SPaolo Bonzini g_context->nx = false; 4739c50d8ae3SPaolo Bonzini g_context->root_level = 0; 4740c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 4741c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4742c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 4743c50d8ae3SPaolo Bonzini g_context->root_level = is_la57_mode(vcpu) ? 4744c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4745c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4746c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4747c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4748c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 4749c50d8ae3SPaolo Bonzini g_context->root_level = PT32E_ROOT_LEVEL; 4750c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4751c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4752c50d8ae3SPaolo Bonzini } else { 4753c50d8ae3SPaolo Bonzini g_context->nx = false; 4754c50d8ae3SPaolo Bonzini g_context->root_level = PT32_ROOT_LEVEL; 4755c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4756c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 4757c50d8ae3SPaolo Bonzini } 4758c50d8ae3SPaolo Bonzini 4759c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, g_context, false); 4760c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, g_context, false); 4761c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, g_context); 4762c50d8ae3SPaolo Bonzini } 4763c50d8ae3SPaolo Bonzini 4764c50d8ae3SPaolo Bonzini void kvm_init_mmu(struct kvm_vcpu *vcpu, bool reset_roots) 4765c50d8ae3SPaolo Bonzini { 4766c50d8ae3SPaolo Bonzini if (reset_roots) { 4767c50d8ae3SPaolo Bonzini uint i; 4768c50d8ae3SPaolo Bonzini 4769c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_hpa = INVALID_PAGE; 4770c50d8ae3SPaolo Bonzini 4771c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 4772c50d8ae3SPaolo Bonzini vcpu->arch.mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 4773c50d8ae3SPaolo Bonzini } 4774c50d8ae3SPaolo Bonzini 4775c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4776c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4777c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4778c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4779c50d8ae3SPaolo Bonzini else 4780c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4781c50d8ae3SPaolo Bonzini } 4782c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4783c50d8ae3SPaolo Bonzini 4784c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4785c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4786c50d8ae3SPaolo Bonzini { 4787c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4788c50d8ae3SPaolo Bonzini 4789c50d8ae3SPaolo Bonzini if (tdp_enabled) 4790c50d8ae3SPaolo Bonzini role = kvm_calc_tdp_mmu_root_page_role(vcpu, true); 4791c50d8ae3SPaolo Bonzini else 4792c50d8ae3SPaolo Bonzini role = kvm_calc_shadow_mmu_root_page_role(vcpu, true); 4793c50d8ae3SPaolo Bonzini 4794c50d8ae3SPaolo Bonzini return role.base; 4795c50d8ae3SPaolo Bonzini } 4796c50d8ae3SPaolo Bonzini 4797c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 4798c50d8ae3SPaolo Bonzini { 4799c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 4800c50d8ae3SPaolo Bonzini kvm_init_mmu(vcpu, true); 4801c50d8ae3SPaolo Bonzini } 4802c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 4803c50d8ae3SPaolo Bonzini 4804c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 4805c50d8ae3SPaolo Bonzini { 4806c50d8ae3SPaolo Bonzini int r; 4807c50d8ae3SPaolo Bonzini 4808378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 4809c50d8ae3SPaolo Bonzini if (r) 4810c50d8ae3SPaolo Bonzini goto out; 4811c50d8ae3SPaolo Bonzini r = mmu_alloc_roots(vcpu); 4812c50d8ae3SPaolo Bonzini kvm_mmu_sync_roots(vcpu); 4813c50d8ae3SPaolo Bonzini if (r) 4814c50d8ae3SPaolo Bonzini goto out; 4815727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 4816b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 4817c50d8ae3SPaolo Bonzini out: 4818c50d8ae3SPaolo Bonzini return r; 4819c50d8ae3SPaolo Bonzini } 4820c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_load); 4821c50d8ae3SPaolo Bonzini 4822c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 4823c50d8ae3SPaolo Bonzini { 4824c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 4825c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 4826c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 4827c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 4828c50d8ae3SPaolo Bonzini } 4829c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unload); 4830c50d8ae3SPaolo Bonzini 4831c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 4832c50d8ae3SPaolo Bonzini { 4833c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 4834c50d8ae3SPaolo Bonzini return false; 4835c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 4836c50d8ae3SPaolo Bonzini return true; 4837c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 4838c50d8ae3SPaolo Bonzini return true; 4839c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 4840c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 4841c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 4842c50d8ae3SPaolo Bonzini } 4843c50d8ae3SPaolo Bonzini 4844c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 4845c50d8ae3SPaolo Bonzini int *bytes) 4846c50d8ae3SPaolo Bonzini { 4847c50d8ae3SPaolo Bonzini u64 gentry = 0; 4848c50d8ae3SPaolo Bonzini int r; 4849c50d8ae3SPaolo Bonzini 4850c50d8ae3SPaolo Bonzini /* 4851c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 4852c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 4853c50d8ae3SPaolo Bonzini * when they have the same mode. 4854c50d8ae3SPaolo Bonzini */ 4855c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 4856c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 4857c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 4858c50d8ae3SPaolo Bonzini *bytes = 8; 4859c50d8ae3SPaolo Bonzini } 4860c50d8ae3SPaolo Bonzini 4861c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 4862c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 4863c50d8ae3SPaolo Bonzini if (r) 4864c50d8ae3SPaolo Bonzini gentry = 0; 4865c50d8ae3SPaolo Bonzini } 4866c50d8ae3SPaolo Bonzini 4867c50d8ae3SPaolo Bonzini return gentry; 4868c50d8ae3SPaolo Bonzini } 4869c50d8ae3SPaolo Bonzini 4870c50d8ae3SPaolo Bonzini /* 4871c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 4872c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 4873c50d8ae3SPaolo Bonzini */ 4874c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 4875c50d8ae3SPaolo Bonzini { 4876c50d8ae3SPaolo Bonzini /* 4877c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 4878c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 4879c50d8ae3SPaolo Bonzini */ 48803bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 4881c50d8ae3SPaolo Bonzini return false; 4882c50d8ae3SPaolo Bonzini 4883c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 4884c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 4885c50d8ae3SPaolo Bonzini } 4886c50d8ae3SPaolo Bonzini 4887c50d8ae3SPaolo Bonzini /* 4888c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 4889c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 4890c50d8ae3SPaolo Bonzini */ 4891c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 4892c50d8ae3SPaolo Bonzini int bytes) 4893c50d8ae3SPaolo Bonzini { 4894c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 4895c50d8ae3SPaolo Bonzini 4896c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 4897c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 4898c50d8ae3SPaolo Bonzini 4899c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 4900c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 4901c50d8ae3SPaolo Bonzini 4902c50d8ae3SPaolo Bonzini /* 4903c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 4904c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 4905c50d8ae3SPaolo Bonzini */ 4906c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 4907c50d8ae3SPaolo Bonzini return false; 4908c50d8ae3SPaolo Bonzini 4909c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 4910c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 4911c50d8ae3SPaolo Bonzini 4912c50d8ae3SPaolo Bonzini return misaligned; 4913c50d8ae3SPaolo Bonzini } 4914c50d8ae3SPaolo Bonzini 4915c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 4916c50d8ae3SPaolo Bonzini { 4917c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 4918c50d8ae3SPaolo Bonzini u64 *spte; 4919c50d8ae3SPaolo Bonzini int level; 4920c50d8ae3SPaolo Bonzini 4921c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 4922c50d8ae3SPaolo Bonzini level = sp->role.level; 4923c50d8ae3SPaolo Bonzini *nspte = 1; 4924c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 4925c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 4926c50d8ae3SPaolo Bonzini /* 4927c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 4928c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 4929c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 4930c50d8ae3SPaolo Bonzini */ 4931c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 4932c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 4933c50d8ae3SPaolo Bonzini page_offset <<= 1; 4934c50d8ae3SPaolo Bonzini *nspte = 2; 4935c50d8ae3SPaolo Bonzini } 4936c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 4937c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 4938c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 4939c50d8ae3SPaolo Bonzini return NULL; 4940c50d8ae3SPaolo Bonzini } 4941c50d8ae3SPaolo Bonzini 4942c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 4943c50d8ae3SPaolo Bonzini return spte; 4944c50d8ae3SPaolo Bonzini } 4945c50d8ae3SPaolo Bonzini 4946c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 4947c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 4948c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 4949c50d8ae3SPaolo Bonzini { 4950c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 4951c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 4952c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 4953c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 4954c50d8ae3SPaolo Bonzini int npte; 4955c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 4956c50d8ae3SPaolo Bonzini 4957c50d8ae3SPaolo Bonzini /* 4958c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 4959c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 4960c50d8ae3SPaolo Bonzini */ 4961c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 4962c50d8ae3SPaolo Bonzini return; 4963c50d8ae3SPaolo Bonzini 4964c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 4965c50d8ae3SPaolo Bonzini 4966c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 4967c50d8ae3SPaolo Bonzini 4968c50d8ae3SPaolo Bonzini /* 4969c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 4970c50d8ae3SPaolo Bonzini * or not since pte prefetch is skiped if it does not have 4971c50d8ae3SPaolo Bonzini * enough objects in the cache. 4972c50d8ae3SPaolo Bonzini */ 4973378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 4974c50d8ae3SPaolo Bonzini 4975531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 4976c50d8ae3SPaolo Bonzini 4977c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 4978c50d8ae3SPaolo Bonzini 4979c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 4980c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 4981c50d8ae3SPaolo Bonzini 4982c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 4983c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 4984c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 4985c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 4986c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 4987c50d8ae3SPaolo Bonzini continue; 4988c50d8ae3SPaolo Bonzini } 4989c50d8ae3SPaolo Bonzini 4990c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 4991c50d8ae3SPaolo Bonzini if (!spte) 4992c50d8ae3SPaolo Bonzini continue; 4993c50d8ae3SPaolo Bonzini 4994c50d8ae3SPaolo Bonzini local_flush = true; 4995c50d8ae3SPaolo Bonzini while (npte--) { 4996c50d8ae3SPaolo Bonzini entry = *spte; 49972de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 4998c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 4999c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5000c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5001c50d8ae3SPaolo Bonzini remote_flush = true; 5002c50d8ae3SPaolo Bonzini ++spte; 5003c50d8ae3SPaolo Bonzini } 5004c50d8ae3SPaolo Bonzini } 5005c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5006c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5007531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5008c50d8ae3SPaolo Bonzini } 5009c50d8ae3SPaolo Bonzini 5010c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 5011c50d8ae3SPaolo Bonzini { 5012c50d8ae3SPaolo Bonzini gpa_t gpa; 5013c50d8ae3SPaolo Bonzini int r; 5014c50d8ae3SPaolo Bonzini 5015c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 5016c50d8ae3SPaolo Bonzini return 0; 5017c50d8ae3SPaolo Bonzini 5018c50d8ae3SPaolo Bonzini gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 5019c50d8ae3SPaolo Bonzini 5020c50d8ae3SPaolo Bonzini r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 5021c50d8ae3SPaolo Bonzini 5022c50d8ae3SPaolo Bonzini return r; 5023c50d8ae3SPaolo Bonzini } 5024c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); 5025c50d8ae3SPaolo Bonzini 5026736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5027c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5028c50d8ae3SPaolo Bonzini { 502992daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5030c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5031c50d8ae3SPaolo Bonzini 50326948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5033ddce6208SSean Christopherson return RET_PF_RETRY; 5034ddce6208SSean Christopherson 5035c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5036c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5037736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5038c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5039c50d8ae3SPaolo Bonzini goto emulate; 5040c50d8ae3SPaolo Bonzini } 5041c50d8ae3SPaolo Bonzini 5042c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 50437a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 50447a02674dSSean Christopherson lower_32_bits(error_code), false); 50457b367bc9SSean Christopherson if (WARN_ON_ONCE(r == RET_PF_INVALID)) 50467b367bc9SSean Christopherson return -EIO; 5047c50d8ae3SPaolo Bonzini } 5048c50d8ae3SPaolo Bonzini 5049c50d8ae3SPaolo Bonzini if (r < 0) 5050c50d8ae3SPaolo Bonzini return r; 505183a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 505283a2ba4cSSean Christopherson return 1; 5053c50d8ae3SPaolo Bonzini 5054c50d8ae3SPaolo Bonzini /* 5055c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5056c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5057c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5058c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5059c50d8ae3SPaolo Bonzini * and resume the guest. 5060c50d8ae3SPaolo Bonzini */ 5061c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5062c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5063736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5064c50d8ae3SPaolo Bonzini return 1; 5065c50d8ae3SPaolo Bonzini } 5066c50d8ae3SPaolo Bonzini 5067c50d8ae3SPaolo Bonzini /* 5068c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5069c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5070c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5071c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5072c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5073c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5074c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5075c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5076c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5077c50d8ae3SPaolo Bonzini */ 5078736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 507992daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5080c50d8ae3SPaolo Bonzini emulate: 5081736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5082c50d8ae3SPaolo Bonzini insn_len); 5083c50d8ae3SPaolo Bonzini } 5084c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5085c50d8ae3SPaolo Bonzini 50865efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 50875efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5088c50d8ae3SPaolo Bonzini { 5089c50d8ae3SPaolo Bonzini int i; 5090c50d8ae3SPaolo Bonzini 50915efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 50925efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 50935efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5094c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5095c50d8ae3SPaolo Bonzini return; 5096c50d8ae3SPaolo Bonzini 5097b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 50985efac074SPaolo Bonzini } 50995efac074SPaolo Bonzini 51005efac074SPaolo Bonzini if (!mmu->invlpg) 51015efac074SPaolo Bonzini return; 51025efac074SPaolo Bonzini 51035efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5104c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5105c50d8ae3SPaolo Bonzini 5106c50d8ae3SPaolo Bonzini /* 5107c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5108c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5109c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5110c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5111c50d8ae3SPaolo Bonzini * just always sync it. 5112c50d8ae3SPaolo Bonzini * 5113c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5114c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5115c50d8ae3SPaolo Bonzini * for them. 5116c50d8ae3SPaolo Bonzini */ 5117c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5118c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5119c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 51205efac074SPaolo Bonzini } else { 51215efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 51225efac074SPaolo Bonzini } 51235efac074SPaolo Bonzini } 51245efac074SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invalidate_gva); 5125c50d8ae3SPaolo Bonzini 51265efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 51275efac074SPaolo Bonzini { 51285efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5129c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5130c50d8ae3SPaolo Bonzini } 5131c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5132c50d8ae3SPaolo Bonzini 51335efac074SPaolo Bonzini 5134c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5135c50d8ae3SPaolo Bonzini { 5136c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5137c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5138c50d8ae3SPaolo Bonzini uint i; 5139c50d8ae3SPaolo Bonzini 5140c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5141c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5142c50d8ae3SPaolo Bonzini tlb_flush = true; 5143c50d8ae3SPaolo Bonzini } 5144c50d8ae3SPaolo Bonzini 5145c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5146c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5147be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5148c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5149c50d8ae3SPaolo Bonzini tlb_flush = true; 5150c50d8ae3SPaolo Bonzini } 5151c50d8ae3SPaolo Bonzini } 5152c50d8ae3SPaolo Bonzini 5153c50d8ae3SPaolo Bonzini if (tlb_flush) 5154b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5155c50d8ae3SPaolo Bonzini 5156c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5157c50d8ae3SPaolo Bonzini 5158c50d8ae3SPaolo Bonzini /* 5159c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5160c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5161c50d8ae3SPaolo Bonzini * for them. 5162c50d8ae3SPaolo Bonzini */ 5163c50d8ae3SPaolo Bonzini } 5164c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invpcid_gva); 5165c50d8ae3SPaolo Bonzini 516683013059SSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 516783013059SSean Christopherson int tdp_huge_page_level) 5168c50d8ae3SPaolo Bonzini { 5169bde77235SSean Christopherson tdp_enabled = enable_tdp; 517083013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5171703c335dSSean Christopherson 5172703c335dSSean Christopherson /* 51731d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5174703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5175703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5176703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5177703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5178703c335dSSean Christopherson */ 5179703c335dSSean Christopherson if (tdp_enabled) 51801d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5181703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 51821d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5183703c335dSSean Christopherson else 51841d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5185c50d8ae3SPaolo Bonzini } 5186bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5187c50d8ae3SPaolo Bonzini 5188c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 51890a234f5dSSean Christopherson typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head, 51900a234f5dSSean Christopherson struct kvm_memory_slot *slot); 5191c50d8ae3SPaolo Bonzini 5192c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5193c50d8ae3SPaolo Bonzini static __always_inline bool 5194c50d8ae3SPaolo Bonzini slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot, 5195c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5196c50d8ae3SPaolo Bonzini gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb) 5197c50d8ae3SPaolo Bonzini { 5198c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5199c50d8ae3SPaolo Bonzini bool flush = false; 5200c50d8ae3SPaolo Bonzini 5201c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5202c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5203c50d8ae3SPaolo Bonzini if (iterator.rmap) 52040a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5205c50d8ae3SPaolo Bonzini 5206531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5207c50d8ae3SPaolo Bonzini if (flush && lock_flush_tlb) { 5208c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5209c50d8ae3SPaolo Bonzini start_gfn, 5210c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5211c50d8ae3SPaolo Bonzini flush = false; 5212c50d8ae3SPaolo Bonzini } 5213531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5214c50d8ae3SPaolo Bonzini } 5215c50d8ae3SPaolo Bonzini } 5216c50d8ae3SPaolo Bonzini 5217c50d8ae3SPaolo Bonzini if (flush && lock_flush_tlb) { 5218c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, start_gfn, 5219c50d8ae3SPaolo Bonzini end_gfn - start_gfn + 1); 5220c50d8ae3SPaolo Bonzini flush = false; 5221c50d8ae3SPaolo Bonzini } 5222c50d8ae3SPaolo Bonzini 5223c50d8ae3SPaolo Bonzini return flush; 5224c50d8ae3SPaolo Bonzini } 5225c50d8ae3SPaolo Bonzini 5226c50d8ae3SPaolo Bonzini static __always_inline bool 5227c50d8ae3SPaolo Bonzini slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5228c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5229c50d8ae3SPaolo Bonzini bool lock_flush_tlb) 5230c50d8ae3SPaolo Bonzini { 5231c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5232c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5233c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 5234c50d8ae3SPaolo Bonzini lock_flush_tlb); 5235c50d8ae3SPaolo Bonzini } 5236c50d8ae3SPaolo Bonzini 5237c50d8ae3SPaolo Bonzini static __always_inline bool 5238c50d8ae3SPaolo Bonzini slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5239c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5240c50d8ae3SPaolo Bonzini { 52413bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5242e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); 5243c50d8ae3SPaolo Bonzini } 5244c50d8ae3SPaolo Bonzini 5245c50d8ae3SPaolo Bonzini static __always_inline bool 5246c50d8ae3SPaolo Bonzini slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5247c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5248c50d8ae3SPaolo Bonzini { 52493bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K + 1, 5250e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); 5251c50d8ae3SPaolo Bonzini } 5252c50d8ae3SPaolo Bonzini 5253c50d8ae3SPaolo Bonzini static __always_inline bool 5254c50d8ae3SPaolo Bonzini slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, 5255c50d8ae3SPaolo Bonzini slot_level_handler fn, bool lock_flush_tlb) 5256c50d8ae3SPaolo Bonzini { 52573bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 52583bae0459SSean Christopherson PG_LEVEL_4K, lock_flush_tlb); 5259c50d8ae3SPaolo Bonzini } 5260c50d8ae3SPaolo Bonzini 5261c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5262c50d8ae3SPaolo Bonzini { 5263c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 5264c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->lm_root); 5265c50d8ae3SPaolo Bonzini } 5266c50d8ae3SPaolo Bonzini 526704d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5268c50d8ae3SPaolo Bonzini { 5269c50d8ae3SPaolo Bonzini struct page *page; 5270c50d8ae3SPaolo Bonzini int i; 5271c50d8ae3SPaolo Bonzini 527204d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 527304d28e37SSean Christopherson mmu->root_pgd = 0; 527404d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 527504d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 527604d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 527704d28e37SSean Christopherson 5278c50d8ae3SPaolo Bonzini /* 5279c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5280c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5281c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5282c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 5283c50d8ae3SPaolo Bonzini * 4GB of memory, which happens to fit the DMA32 zone. Except for 5284c50d8ae3SPaolo Bonzini * SVM's 32-bit NPT support, TDP paging doesn't use PAE paging and can 5285c50d8ae3SPaolo Bonzini * skip allocating the PDP table. 5286c50d8ae3SPaolo Bonzini */ 5287d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5288c50d8ae3SPaolo Bonzini return 0; 5289c50d8ae3SPaolo Bonzini 5290c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5291c50d8ae3SPaolo Bonzini if (!page) 5292c50d8ae3SPaolo Bonzini return -ENOMEM; 5293c50d8ae3SPaolo Bonzini 5294c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 5295c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5296c50d8ae3SPaolo Bonzini mmu->pae_root[i] = INVALID_PAGE; 5297c50d8ae3SPaolo Bonzini 5298c50d8ae3SPaolo Bonzini return 0; 5299c50d8ae3SPaolo Bonzini } 5300c50d8ae3SPaolo Bonzini 5301c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5302c50d8ae3SPaolo Bonzini { 5303c50d8ae3SPaolo Bonzini int ret; 5304c50d8ae3SPaolo Bonzini 53055962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 53065f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 53075f6078f9SSean Christopherson 53085962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 53095f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 53105962bfb7SSean Christopherson 531196880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 531296880883SSean Christopherson 5313c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5314c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5315c50d8ae3SPaolo Bonzini 5316c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5317c50d8ae3SPaolo Bonzini 531804d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5319c50d8ae3SPaolo Bonzini if (ret) 5320c50d8ae3SPaolo Bonzini return ret; 5321c50d8ae3SPaolo Bonzini 532204d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5323c50d8ae3SPaolo Bonzini if (ret) 5324c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5325c50d8ae3SPaolo Bonzini 5326c50d8ae3SPaolo Bonzini return ret; 5327c50d8ae3SPaolo Bonzini fail_allocate_root: 5328c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5329c50d8ae3SPaolo Bonzini return ret; 5330c50d8ae3SPaolo Bonzini } 5331c50d8ae3SPaolo Bonzini 5332c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5333c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5334c50d8ae3SPaolo Bonzini { 5335c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5336c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5337c50d8ae3SPaolo Bonzini 5338c50d8ae3SPaolo Bonzini restart: 5339c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5340c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5341c50d8ae3SPaolo Bonzini /* 5342c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5343c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5344c50d8ae3SPaolo Bonzini */ 5345c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5346c50d8ae3SPaolo Bonzini break; 5347c50d8ae3SPaolo Bonzini 5348c50d8ae3SPaolo Bonzini /* 5349f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5350f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5351f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5352c50d8ae3SPaolo Bonzini */ 5353f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5354c50d8ae3SPaolo Bonzini continue; 5355c50d8ae3SPaolo Bonzini 5356c50d8ae3SPaolo Bonzini /* 5357c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5358c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5359c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5360c50d8ae3SPaolo Bonzini * be in active use by the guest. 5361c50d8ae3SPaolo Bonzini */ 5362c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5363531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5364c50d8ae3SPaolo Bonzini batch = 0; 5365c50d8ae3SPaolo Bonzini goto restart; 5366c50d8ae3SPaolo Bonzini } 5367c50d8ae3SPaolo Bonzini 5368c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5369c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5370c50d8ae3SPaolo Bonzini batch += nr_zapped; 5371c50d8ae3SPaolo Bonzini goto restart; 5372c50d8ae3SPaolo Bonzini } 5373c50d8ae3SPaolo Bonzini } 5374c50d8ae3SPaolo Bonzini 5375c50d8ae3SPaolo Bonzini /* 5376c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5377c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5378c50d8ae3SPaolo Bonzini * may reference the pages. 5379c50d8ae3SPaolo Bonzini */ 5380c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5381c50d8ae3SPaolo Bonzini } 5382c50d8ae3SPaolo Bonzini 5383c50d8ae3SPaolo Bonzini /* 5384c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5385c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5386c50d8ae3SPaolo Bonzini * 5387c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5388c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5389c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5390c50d8ae3SPaolo Bonzini * after calling the function. 5391c50d8ae3SPaolo Bonzini */ 5392c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5393c50d8ae3SPaolo Bonzini { 5394c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5395c50d8ae3SPaolo Bonzini 5396531810caSBen Gardon write_lock(&kvm->mmu_lock); 5397c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5398c50d8ae3SPaolo Bonzini 5399c50d8ae3SPaolo Bonzini /* 5400c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5401c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5402c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5403c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5404c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5405c50d8ae3SPaolo Bonzini */ 5406c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5407c50d8ae3SPaolo Bonzini 5408c50d8ae3SPaolo Bonzini /* 5409c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5410c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5411c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5412c50d8ae3SPaolo Bonzini * 5413c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5414c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5415c50d8ae3SPaolo Bonzini */ 5416c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5417c50d8ae3SPaolo Bonzini 5418c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5419faaf05b0SBen Gardon 5420897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5421faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5422faaf05b0SBen Gardon 5423531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5424c50d8ae3SPaolo Bonzini } 5425c50d8ae3SPaolo Bonzini 5426c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5427c50d8ae3SPaolo Bonzini { 5428c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5429c50d8ae3SPaolo Bonzini } 5430c50d8ae3SPaolo Bonzini 5431c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5432c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5433c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5434c50d8ae3SPaolo Bonzini { 5435c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5436c50d8ae3SPaolo Bonzini } 5437c50d8ae3SPaolo Bonzini 5438c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5439c50d8ae3SPaolo Bonzini { 5440c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5441c50d8ae3SPaolo Bonzini 5442fe5db27dSBen Gardon kvm_mmu_init_tdp_mmu(kvm); 5443fe5db27dSBen Gardon 5444c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5445c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5446c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5447c50d8ae3SPaolo Bonzini } 5448c50d8ae3SPaolo Bonzini 5449c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5450c50d8ae3SPaolo Bonzini { 5451c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5452c50d8ae3SPaolo Bonzini 5453c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5454fe5db27dSBen Gardon 5455fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5456c50d8ae3SPaolo Bonzini } 5457c50d8ae3SPaolo Bonzini 5458c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5459c50d8ae3SPaolo Bonzini { 5460c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5461c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5462c50d8ae3SPaolo Bonzini int i; 5463faaf05b0SBen Gardon bool flush; 5464c50d8ae3SPaolo Bonzini 5465531810caSBen Gardon write_lock(&kvm->mmu_lock); 5466c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5467c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5468c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5469c50d8ae3SPaolo Bonzini gfn_t start, end; 5470c50d8ae3SPaolo Bonzini 5471c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5472c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5473c50d8ae3SPaolo Bonzini if (start >= end) 5474c50d8ae3SPaolo Bonzini continue; 5475c50d8ae3SPaolo Bonzini 5476c50d8ae3SPaolo Bonzini slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, 54773bae0459SSean Christopherson PG_LEVEL_4K, 5478e662ec3eSSean Christopherson KVM_MAX_HUGEPAGE_LEVEL, 5479c50d8ae3SPaolo Bonzini start, end - 1, true); 5480c50d8ae3SPaolo Bonzini } 5481c50d8ae3SPaolo Bonzini } 5482c50d8ae3SPaolo Bonzini 5483897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) { 5484faaf05b0SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, gfn_start, gfn_end); 5485faaf05b0SBen Gardon if (flush) 5486faaf05b0SBen Gardon kvm_flush_remote_tlbs(kvm); 5487faaf05b0SBen Gardon } 5488faaf05b0SBen Gardon 5489531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5490c50d8ae3SPaolo Bonzini } 5491c50d8ae3SPaolo Bonzini 5492c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 54930a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 54940a234f5dSSean Christopherson struct kvm_memory_slot *slot) 5495c50d8ae3SPaolo Bonzini { 5496c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5497c50d8ae3SPaolo Bonzini } 5498c50d8ae3SPaolo Bonzini 5499c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 55003c9bd400SJay Zhou struct kvm_memory_slot *memslot, 55013c9bd400SJay Zhou int start_level) 5502c50d8ae3SPaolo Bonzini { 5503c50d8ae3SPaolo Bonzini bool flush; 5504c50d8ae3SPaolo Bonzini 5505531810caSBen Gardon write_lock(&kvm->mmu_lock); 55063c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5507e662ec3eSSean Christopherson start_level, KVM_MAX_HUGEPAGE_LEVEL, false); 5508897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5509a6a0b05dSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, PG_LEVEL_4K); 5510531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5511c50d8ae3SPaolo Bonzini 5512c50d8ae3SPaolo Bonzini /* 5513c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5514c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5515c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5516c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5517c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5518c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 5519c50d8ae3SPaolo Bonzini * have checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE 5520c50d8ae3SPaolo Bonzini * instead of PT_WRITABLE_MASK, that means it does not depend 5521c50d8ae3SPaolo Bonzini * on PT_WRITABLE_MASK anymore. 5522c50d8ae3SPaolo Bonzini */ 5523c50d8ae3SPaolo Bonzini if (flush) 55247f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5525c50d8ae3SPaolo Bonzini } 5526c50d8ae3SPaolo Bonzini 5527c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 55280a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 55290a234f5dSSean Christopherson struct kvm_memory_slot *slot) 5530c50d8ae3SPaolo Bonzini { 5531c50d8ae3SPaolo Bonzini u64 *sptep; 5532c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5533c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5534c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5535c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5536c50d8ae3SPaolo Bonzini 5537c50d8ae3SPaolo Bonzini restart: 5538c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 553957354682SSean Christopherson sp = sptep_to_sp(sptep); 5540c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5541c50d8ae3SPaolo Bonzini 5542c50d8ae3SPaolo Bonzini /* 5543c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5544c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5545c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5546c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5547c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5548c50d8ae3SPaolo Bonzini */ 5549c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 55509eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 55519eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 5552c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 5553c50d8ae3SPaolo Bonzini 5554c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5555c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5556c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5557c50d8ae3SPaolo Bonzini else 5558c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5559c50d8ae3SPaolo Bonzini 5560c50d8ae3SPaolo Bonzini goto restart; 5561c50d8ae3SPaolo Bonzini } 5562c50d8ae3SPaolo Bonzini } 5563c50d8ae3SPaolo Bonzini 5564c50d8ae3SPaolo Bonzini return need_tlb_flush; 5565c50d8ae3SPaolo Bonzini } 5566c50d8ae3SPaolo Bonzini 5567c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5568c50d8ae3SPaolo Bonzini const struct kvm_memory_slot *memslot) 5569c50d8ae3SPaolo Bonzini { 5570c50d8ae3SPaolo Bonzini /* FIXME: const-ify all uses of struct kvm_memory_slot. */ 55719eba50f8SSean Christopherson struct kvm_memory_slot *slot = (struct kvm_memory_slot *)memslot; 55729eba50f8SSean Christopherson 5573531810caSBen Gardon write_lock(&kvm->mmu_lock); 55749eba50f8SSean Christopherson slot_handle_leaf(kvm, slot, kvm_mmu_zap_collapsible_spte, true); 557514881998SBen Gardon 5576897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 55779eba50f8SSean Christopherson kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot); 5578531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5579c50d8ae3SPaolo Bonzini } 5580c50d8ae3SPaolo Bonzini 5581b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 5582b3594ffbSSean Christopherson struct kvm_memory_slot *memslot) 5583b3594ffbSSean Christopherson { 5584b3594ffbSSean Christopherson /* 55857f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 55867f42aa76SSean Christopherson * are related to dirty logging, and do the TLB flush out of mmu_lock. 55877f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 55887f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 55897f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5590b3594ffbSSean Christopherson */ 5591b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5592cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5593cec37648SSean Christopherson memslot->npages); 5594b3594ffbSSean Christopherson } 5595b3594ffbSSean Christopherson 5596c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5597c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5598c50d8ae3SPaolo Bonzini { 5599c50d8ae3SPaolo Bonzini bool flush; 5600c50d8ae3SPaolo Bonzini 5601531810caSBen Gardon write_lock(&kvm->mmu_lock); 5602c50d8ae3SPaolo Bonzini flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false); 5603897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5604a6a0b05dSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 5605531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5606c50d8ae3SPaolo Bonzini 5607c50d8ae3SPaolo Bonzini /* 5608c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5609c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5610c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5611c50d8ae3SPaolo Bonzini * dirty_bitmap. 5612c50d8ae3SPaolo Bonzini */ 5613c50d8ae3SPaolo Bonzini if (flush) 56147f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5615c50d8ae3SPaolo Bonzini } 5616c50d8ae3SPaolo Bonzini 5617c50d8ae3SPaolo Bonzini void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 5618c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5619c50d8ae3SPaolo Bonzini { 5620c50d8ae3SPaolo Bonzini bool flush; 5621c50d8ae3SPaolo Bonzini 5622531810caSBen Gardon write_lock(&kvm->mmu_lock); 5623c50d8ae3SPaolo Bonzini flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect, 5624c50d8ae3SPaolo Bonzini false); 5625897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5626a6a0b05dSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, PG_LEVEL_2M); 5627531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5628c50d8ae3SPaolo Bonzini 5629c50d8ae3SPaolo Bonzini if (flush) 56307f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5631c50d8ae3SPaolo Bonzini } 5632c50d8ae3SPaolo Bonzini 5633c50d8ae3SPaolo Bonzini void kvm_mmu_slot_set_dirty(struct kvm *kvm, 5634c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5635c50d8ae3SPaolo Bonzini { 5636c50d8ae3SPaolo Bonzini bool flush; 5637c50d8ae3SPaolo Bonzini 5638531810caSBen Gardon write_lock(&kvm->mmu_lock); 5639c50d8ae3SPaolo Bonzini flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false); 5640897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5641a6a0b05dSBen Gardon flush |= kvm_tdp_mmu_slot_set_dirty(kvm, memslot); 5642531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5643c50d8ae3SPaolo Bonzini 5644c50d8ae3SPaolo Bonzini if (flush) 56457f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5646c50d8ae3SPaolo Bonzini } 5647c50d8ae3SPaolo Bonzini 5648c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5649c50d8ae3SPaolo Bonzini { 5650c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5651c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5652c50d8ae3SPaolo Bonzini int ign; 5653c50d8ae3SPaolo Bonzini 5654531810caSBen Gardon write_lock(&kvm->mmu_lock); 5655c50d8ae3SPaolo Bonzini restart: 5656c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5657f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5658c50d8ae3SPaolo Bonzini continue; 5659c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5660c50d8ae3SPaolo Bonzini goto restart; 5661531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5662c50d8ae3SPaolo Bonzini goto restart; 5663c50d8ae3SPaolo Bonzini } 5664c50d8ae3SPaolo Bonzini 5665c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5666faaf05b0SBen Gardon 5667897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5668faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5669faaf05b0SBen Gardon 5670531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5671c50d8ae3SPaolo Bonzini } 5672c50d8ae3SPaolo Bonzini 5673c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5674c50d8ae3SPaolo Bonzini { 5675c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5676c50d8ae3SPaolo Bonzini 5677c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5678c50d8ae3SPaolo Bonzini 5679c50d8ae3SPaolo Bonzini /* 5680c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5681c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5682c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5683c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5684c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5685c50d8ae3SPaolo Bonzini */ 5686c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5687c50d8ae3SPaolo Bonzini 5688c50d8ae3SPaolo Bonzini /* 5689c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5690c50d8ae3SPaolo Bonzini * zap all shadow pages. 5691c50d8ae3SPaolo Bonzini */ 5692c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 5693c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 5694c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5695c50d8ae3SPaolo Bonzini } 5696c50d8ae3SPaolo Bonzini } 5697c50d8ae3SPaolo Bonzini 5698c50d8ae3SPaolo Bonzini static unsigned long 5699c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 5700c50d8ae3SPaolo Bonzini { 5701c50d8ae3SPaolo Bonzini struct kvm *kvm; 5702c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 5703c50d8ae3SPaolo Bonzini unsigned long freed = 0; 5704c50d8ae3SPaolo Bonzini 5705c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5706c50d8ae3SPaolo Bonzini 5707c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5708c50d8ae3SPaolo Bonzini int idx; 5709c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5710c50d8ae3SPaolo Bonzini 5711c50d8ae3SPaolo Bonzini /* 5712c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 5713c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 5714c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 5715c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 5716c50d8ae3SPaolo Bonzini */ 5717c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 5718c50d8ae3SPaolo Bonzini break; 5719c50d8ae3SPaolo Bonzini /* 5720c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 5721c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 5722c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 5723c50d8ae3SPaolo Bonzini * anyway. 5724c50d8ae3SPaolo Bonzini */ 5725c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 5726c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 5727c50d8ae3SPaolo Bonzini continue; 5728c50d8ae3SPaolo Bonzini 5729c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 5730531810caSBen Gardon write_lock(&kvm->mmu_lock); 5731c50d8ae3SPaolo Bonzini 5732c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 5733c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 5734c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 5735c50d8ae3SPaolo Bonzini goto unlock; 5736c50d8ae3SPaolo Bonzini } 5737c50d8ae3SPaolo Bonzini 5738ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 5739c50d8ae3SPaolo Bonzini 5740c50d8ae3SPaolo Bonzini unlock: 5741531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5742c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 5743c50d8ae3SPaolo Bonzini 5744c50d8ae3SPaolo Bonzini /* 5745c50d8ae3SPaolo Bonzini * unfair on small ones 5746c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 5747c50d8ae3SPaolo Bonzini * sadness comes quickly 5748c50d8ae3SPaolo Bonzini */ 5749c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 5750c50d8ae3SPaolo Bonzini break; 5751c50d8ae3SPaolo Bonzini } 5752c50d8ae3SPaolo Bonzini 5753c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5754c50d8ae3SPaolo Bonzini return freed; 5755c50d8ae3SPaolo Bonzini } 5756c50d8ae3SPaolo Bonzini 5757c50d8ae3SPaolo Bonzini static unsigned long 5758c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 5759c50d8ae3SPaolo Bonzini { 5760c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 5761c50d8ae3SPaolo Bonzini } 5762c50d8ae3SPaolo Bonzini 5763c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 5764c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 5765c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 5766c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 5767c50d8ae3SPaolo Bonzini }; 5768c50d8ae3SPaolo Bonzini 5769c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 5770c50d8ae3SPaolo Bonzini { 5771c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 5772c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 5773c50d8ae3SPaolo Bonzini } 5774c50d8ae3SPaolo Bonzini 5775c50d8ae3SPaolo Bonzini static void kvm_set_mmio_spte_mask(void) 5776c50d8ae3SPaolo Bonzini { 5777c50d8ae3SPaolo Bonzini u64 mask; 5778c50d8ae3SPaolo Bonzini 5779c50d8ae3SPaolo Bonzini /* 57806129ed87SSean Christopherson * Set a reserved PA bit in MMIO SPTEs to generate page faults with 57816129ed87SSean Christopherson * PFEC.RSVD=1 on MMIO accesses. 64-bit PTEs (PAE, x86-64, and EPT 57826129ed87SSean Christopherson * paging) support a maximum of 52 bits of PA, i.e. if the CPU supports 57836129ed87SSean Christopherson * 52-bit physical addresses then there are no reserved PA bits in the 57846129ed87SSean Christopherson * PTEs and so the reserved PA approach must be disabled. 5785c50d8ae3SPaolo Bonzini */ 57866129ed87SSean Christopherson if (shadow_phys_bits < 52) 57876129ed87SSean Christopherson mask = BIT_ULL(51) | PT_PRESENT_MASK; 57886129ed87SSean Christopherson else 57896129ed87SSean Christopherson mask = 0; 5790c50d8ae3SPaolo Bonzini 5791e7581cacSPaolo Bonzini kvm_mmu_set_mmio_spte_mask(mask, ACC_WRITE_MASK | ACC_USER_MASK); 5792c50d8ae3SPaolo Bonzini } 5793c50d8ae3SPaolo Bonzini 5794c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 5795c50d8ae3SPaolo Bonzini { 5796c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 5797c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 5798c50d8ae3SPaolo Bonzini } 5799c50d8ae3SPaolo Bonzini 5800c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 5801c50d8ae3SPaolo Bonzini { 5802c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 5803c50d8ae3SPaolo Bonzini } 5804c50d8ae3SPaolo Bonzini 5805c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 5806c50d8ae3SPaolo Bonzini { 5807c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 5808c50d8ae3SPaolo Bonzini bool new_val; 5809c50d8ae3SPaolo Bonzini 5810c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 5811c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 5812c50d8ae3SPaolo Bonzini new_val = 0; 5813c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 5814c50d8ae3SPaolo Bonzini new_val = 1; 5815c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 5816c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 5817c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 5818c50d8ae3SPaolo Bonzini return -EINVAL; 5819c50d8ae3SPaolo Bonzini 5820c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 5821c50d8ae3SPaolo Bonzini 5822c50d8ae3SPaolo Bonzini if (new_val != old_val) { 5823c50d8ae3SPaolo Bonzini struct kvm *kvm; 5824c50d8ae3SPaolo Bonzini 5825c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5826c50d8ae3SPaolo Bonzini 5827c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5828c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 5829c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5830c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 5831c50d8ae3SPaolo Bonzini 5832c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5833c50d8ae3SPaolo Bonzini } 5834c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5835c50d8ae3SPaolo Bonzini } 5836c50d8ae3SPaolo Bonzini 5837c50d8ae3SPaolo Bonzini return 0; 5838c50d8ae3SPaolo Bonzini } 5839c50d8ae3SPaolo Bonzini 5840c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 5841c50d8ae3SPaolo Bonzini { 5842c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 5843c50d8ae3SPaolo Bonzini 5844c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 5845c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 5846c50d8ae3SPaolo Bonzini 5847c50d8ae3SPaolo Bonzini /* 5848c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 5849c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 5850c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 5851c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 5852c50d8ae3SPaolo Bonzini */ 5853c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 5854c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 5855c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 5856c50d8ae3SPaolo Bonzini 5857c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 5858c50d8ae3SPaolo Bonzini 5859c50d8ae3SPaolo Bonzini kvm_set_mmio_spte_mask(); 5860c50d8ae3SPaolo Bonzini 5861c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 5862c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 5863c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5864c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 5865c50d8ae3SPaolo Bonzini goto out; 5866c50d8ae3SPaolo Bonzini 5867c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 5868c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 5869c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5870c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 5871c50d8ae3SPaolo Bonzini goto out; 5872c50d8ae3SPaolo Bonzini 5873c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 5874c50d8ae3SPaolo Bonzini goto out; 5875c50d8ae3SPaolo Bonzini 5876c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 5877c50d8ae3SPaolo Bonzini if (ret) 5878c50d8ae3SPaolo Bonzini goto out; 5879c50d8ae3SPaolo Bonzini 5880c50d8ae3SPaolo Bonzini return 0; 5881c50d8ae3SPaolo Bonzini 5882c50d8ae3SPaolo Bonzini out: 5883c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 5884c50d8ae3SPaolo Bonzini return ret; 5885c50d8ae3SPaolo Bonzini } 5886c50d8ae3SPaolo Bonzini 5887c50d8ae3SPaolo Bonzini /* 5888c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 5889c50d8ae3SPaolo Bonzini */ 5890c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 5891c50d8ae3SPaolo Bonzini { 5892c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 5893c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 5894c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5895c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5896c50d8ae3SPaolo Bonzini int i; 5897c50d8ae3SPaolo Bonzini 5898c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5899c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5900c50d8ae3SPaolo Bonzini 5901c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 5902c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 5903c50d8ae3SPaolo Bonzini } 5904c50d8ae3SPaolo Bonzini 5905c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 5906c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 5907c50d8ae3SPaolo Bonzini 5908c50d8ae3SPaolo Bonzini return nr_mmu_pages; 5909c50d8ae3SPaolo Bonzini } 5910c50d8ae3SPaolo Bonzini 5911c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 5912c50d8ae3SPaolo Bonzini { 5913c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 5914c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 5915c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5916c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 5917c50d8ae3SPaolo Bonzini } 5918c50d8ae3SPaolo Bonzini 5919c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 5920c50d8ae3SPaolo Bonzini { 5921c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 5922c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 5923c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 5924c50d8ae3SPaolo Bonzini mmu_audit_disable(); 5925c50d8ae3SPaolo Bonzini } 5926c50d8ae3SPaolo Bonzini 5927c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 5928c50d8ae3SPaolo Bonzini { 5929c50d8ae3SPaolo Bonzini unsigned int old_val; 5930c50d8ae3SPaolo Bonzini int err; 5931c50d8ae3SPaolo Bonzini 5932c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 5933c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 5934c50d8ae3SPaolo Bonzini if (err) 5935c50d8ae3SPaolo Bonzini return err; 5936c50d8ae3SPaolo Bonzini 5937c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 5938c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 5939c50d8ae3SPaolo Bonzini struct kvm *kvm; 5940c50d8ae3SPaolo Bonzini 5941c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5942c50d8ae3SPaolo Bonzini 5943c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 5944c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5945c50d8ae3SPaolo Bonzini 5946c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5947c50d8ae3SPaolo Bonzini } 5948c50d8ae3SPaolo Bonzini 5949c50d8ae3SPaolo Bonzini return err; 5950c50d8ae3SPaolo Bonzini } 5951c50d8ae3SPaolo Bonzini 5952c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 5953c50d8ae3SPaolo Bonzini { 5954c50d8ae3SPaolo Bonzini int rcu_idx; 5955c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5956c50d8ae3SPaolo Bonzini unsigned int ratio; 5957c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5958c50d8ae3SPaolo Bonzini ulong to_zap; 5959c50d8ae3SPaolo Bonzini 5960c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 5961531810caSBen Gardon write_lock(&kvm->mmu_lock); 5962c50d8ae3SPaolo Bonzini 5963c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 5964c50d8ae3SPaolo Bonzini to_zap = ratio ? DIV_ROUND_UP(kvm->stat.nx_lpage_splits, ratio) : 0; 59657d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 59667d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 59677d919c7aSSean Christopherson break; 59687d919c7aSSean Christopherson 5969c50d8ae3SPaolo Bonzini /* 5970c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 5971c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 5972c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 5973c50d8ae3SPaolo Bonzini */ 5974c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 5975c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 5976c50d8ae3SPaolo Bonzini lpage_disallowed_link); 5977c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 5978897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 597929cf0f50SBen Gardon kvm_tdp_mmu_zap_gfn_range(kvm, sp->gfn, 598029cf0f50SBen Gardon sp->gfn + KVM_PAGES_PER_HPAGE(sp->role.level)); 59818d1a182eSBen Gardon } else { 5982c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 5983c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 598429cf0f50SBen Gardon } 5985c50d8ae3SPaolo Bonzini 5986531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5987c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5988531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5989c50d8ae3SPaolo Bonzini } 5990c50d8ae3SPaolo Bonzini } 5991e8950569SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 5992c50d8ae3SPaolo Bonzini 5993531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5994c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 5995c50d8ae3SPaolo Bonzini } 5996c50d8ae3SPaolo Bonzini 5997c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 5998c50d8ae3SPaolo Bonzini { 5999c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6000c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6001c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6002c50d8ae3SPaolo Bonzini } 6003c50d8ae3SPaolo Bonzini 6004c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6005c50d8ae3SPaolo Bonzini { 6006c50d8ae3SPaolo Bonzini u64 start_time; 6007c50d8ae3SPaolo Bonzini long remaining_time; 6008c50d8ae3SPaolo Bonzini 6009c50d8ae3SPaolo Bonzini while (true) { 6010c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6011c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6012c50d8ae3SPaolo Bonzini 6013c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6014c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6015c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6016c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6017c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6018c50d8ae3SPaolo Bonzini } 6019c50d8ae3SPaolo Bonzini 6020c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6021c50d8ae3SPaolo Bonzini 6022c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6023c50d8ae3SPaolo Bonzini return 0; 6024c50d8ae3SPaolo Bonzini 6025c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6026c50d8ae3SPaolo Bonzini } 6027c50d8ae3SPaolo Bonzini } 6028c50d8ae3SPaolo Bonzini 6029c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6030c50d8ae3SPaolo Bonzini { 6031c50d8ae3SPaolo Bonzini int err; 6032c50d8ae3SPaolo Bonzini 6033c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6034c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6035c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6036c50d8ae3SPaolo Bonzini if (!err) 6037c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6038c50d8ae3SPaolo Bonzini 6039c50d8ae3SPaolo Bonzini return err; 6040c50d8ae3SPaolo Bonzini } 6041c50d8ae3SPaolo Bonzini 6042c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6043c50d8ae3SPaolo Bonzini { 6044c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6045c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6046c50d8ae3SPaolo Bonzini } 6047