1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56fc9bf2e0SSean Christopherson #include "paging.h" 57fc9bf2e0SSean Christopherson 58c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 59c50d8ae3SPaolo Bonzini 60a9d6496dSShaokun Zhang int __read_mostly nx_huge_pages = -1; 61c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 62c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 63c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 64c50d8ae3SPaolo Bonzini #else 65c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 66c50d8ae3SPaolo Bonzini #endif 67c50d8ae3SPaolo Bonzini 68c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 69c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 70c50d8ae3SPaolo Bonzini 71d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 72c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 73c50d8ae3SPaolo Bonzini .get = param_get_bool, 74c50d8ae3SPaolo Bonzini }; 75c50d8ae3SPaolo Bonzini 76d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 77c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 78c50d8ae3SPaolo Bonzini .get = param_get_uint, 79c50d8ae3SPaolo Bonzini }; 80c50d8ae3SPaolo Bonzini 81c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 82c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 83c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 84c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 85c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 86c50d8ae3SPaolo Bonzini 8771fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8871fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8971fe7013SSean Christopherson 90c50d8ae3SPaolo Bonzini /* 91c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 92c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 93c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 94c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 95c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 96c50d8ae3SPaolo Bonzini */ 97c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 98c50d8ae3SPaolo Bonzini 991d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 10083013059SSean Christopherson static int max_tdp_level __read_mostly; 101703c335dSSean Christopherson 102c50d8ae3SPaolo Bonzini enum { 103c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 104c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 105c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 106c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 107c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 108c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 109c50d8ae3SPaolo Bonzini }; 110c50d8ae3SPaolo Bonzini 111c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1125a9624afSPaolo Bonzini bool dbg = 0; 113c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 114c50d8ae3SPaolo Bonzini #endif 115c50d8ae3SPaolo Bonzini 116c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 117c50d8ae3SPaolo Bonzini 118c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 119c50d8ae3SPaolo Bonzini 120c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 121c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 122c50d8ae3SPaolo Bonzini 123c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 124c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 125c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 126c50d8ae3SPaolo Bonzini 127c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 128c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 129c50d8ae3SPaolo Bonzini 130c50d8ae3SPaolo Bonzini 131c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 132c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 133c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 134c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 135c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 136c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 137c50d8ae3SPaolo Bonzini 138c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 139c50d8ae3SPaolo Bonzini 140c50d8ae3SPaolo Bonzini /* make pte_list_desc fit well in cache line */ 141c50d8ae3SPaolo Bonzini #define PTE_LIST_EXT 3 142c50d8ae3SPaolo Bonzini 143c50d8ae3SPaolo Bonzini struct pte_list_desc { 144c50d8ae3SPaolo Bonzini u64 *sptes[PTE_LIST_EXT]; 145c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 146c50d8ae3SPaolo Bonzini }; 147c50d8ae3SPaolo Bonzini 148c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 149c50d8ae3SPaolo Bonzini u64 addr; 150c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 151c50d8ae3SPaolo Bonzini u64 *sptep; 152c50d8ae3SPaolo Bonzini int level; 153c50d8ae3SPaolo Bonzini unsigned index; 154c50d8ae3SPaolo Bonzini }; 155c50d8ae3SPaolo Bonzini 156c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 157c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 158c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 159c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 160c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 161c50d8ae3SPaolo Bonzini 162c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 163c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 164c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 165c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 166c50d8ae3SPaolo Bonzini 167c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 168c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 169c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 170c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 171c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 172c50d8ae3SPaolo Bonzini 173c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 17402c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 175c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 176c50d8ae3SPaolo Bonzini 177c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 178c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 179c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 180c50d8ae3SPaolo Bonzini 181594e91a1SSean Christopherson struct kvm_mmu_role_regs { 182594e91a1SSean Christopherson const unsigned long cr0; 183594e91a1SSean Christopherson const unsigned long cr4; 184594e91a1SSean Christopherson const u64 efer; 185594e91a1SSean Christopherson }; 186594e91a1SSean Christopherson 187c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 188c50d8ae3SPaolo Bonzini #include "mmutrace.h" 189c50d8ae3SPaolo Bonzini 190594e91a1SSean Christopherson /* 191594e91a1SSean Christopherson * Yes, lot's of underscores. They're a hint that you probably shouldn't be 192594e91a1SSean Christopherson * reading from the role_regs. Once the mmu_role is constructed, it becomes 193594e91a1SSean Christopherson * the single source of truth for the MMU's state. 194594e91a1SSean Christopherson */ 195594e91a1SSean Christopherson #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \ 196594e91a1SSean Christopherson static inline bool ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\ 197594e91a1SSean Christopherson { \ 198594e91a1SSean Christopherson return !!(regs->reg & flag); \ 199594e91a1SSean Christopherson } 200594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG); 201594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP); 202594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE); 203594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE); 204594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP); 205594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP); 206594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE); 207594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57); 208594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX); 209594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA); 210594e91a1SSean Christopherson 21160667724SSean Christopherson /* 21260667724SSean Christopherson * The MMU itself (with a valid role) is the single source of truth for the 21360667724SSean Christopherson * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The 21460667724SSean Christopherson * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1, 21560667724SSean Christopherson * and the vCPU may be incorrect/irrelevant. 21660667724SSean Christopherson */ 21760667724SSean Christopherson #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \ 21860667724SSean Christopherson static inline bool is_##reg##_##name(struct kvm_mmu *mmu) \ 21960667724SSean Christopherson { \ 22060667724SSean Christopherson return !!(mmu->mmu_role. base_or_ext . reg##_##name); \ 22160667724SSean Christopherson } 22260667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg); 22360667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp); 22460667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse); 22560667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae); 22660667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep); 22760667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap); 22860667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke); 22960667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57); 23060667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, efer, nx); 23160667724SSean Christopherson 232594e91a1SSean Christopherson static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) 233594e91a1SSean Christopherson { 234594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 235594e91a1SSean Christopherson .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS), 236594e91a1SSean Christopherson .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS), 237594e91a1SSean Christopherson .efer = vcpu->arch.efer, 238594e91a1SSean Christopherson }; 239594e91a1SSean Christopherson 240594e91a1SSean Christopherson return regs; 241594e91a1SSean Christopherson } 242c50d8ae3SPaolo Bonzini 243f4bd6f73SSean Christopherson static int role_regs_to_root_level(struct kvm_mmu_role_regs *regs) 244f4bd6f73SSean Christopherson { 245f4bd6f73SSean Christopherson if (!____is_cr0_pg(regs)) 246f4bd6f73SSean Christopherson return 0; 247f4bd6f73SSean Christopherson else if (____is_efer_lma(regs)) 248f4bd6f73SSean Christopherson return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : 249f4bd6f73SSean Christopherson PT64_ROOT_4LEVEL; 250f4bd6f73SSean Christopherson else if (____is_cr4_pae(regs)) 251f4bd6f73SSean Christopherson return PT32E_ROOT_LEVEL; 252f4bd6f73SSean Christopherson else 253f4bd6f73SSean Christopherson return PT32_ROOT_LEVEL; 254f4bd6f73SSean Christopherson } 255c50d8ae3SPaolo Bonzini 256c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 257c50d8ae3SPaolo Bonzini { 258afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 259c50d8ae3SPaolo Bonzini } 260c50d8ae3SPaolo Bonzini 261c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 262c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 263c50d8ae3SPaolo Bonzini { 264c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 265c50d8ae3SPaolo Bonzini 266afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 267b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 268c50d8ae3SPaolo Bonzini 269c50d8ae3SPaolo Bonzini if (ret) 270c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 271c50d8ae3SPaolo Bonzini } 272c50d8ae3SPaolo Bonzini 2732f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 274c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 275c50d8ae3SPaolo Bonzini { 276c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 277c50d8ae3SPaolo Bonzini 278c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 279c50d8ae3SPaolo Bonzini range.pages = pages; 280c50d8ae3SPaolo Bonzini 281c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 282c50d8ae3SPaolo Bonzini } 283c50d8ae3SPaolo Bonzini 2848f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2858f79b064SBen Gardon unsigned int access) 2868f79b064SBen Gardon { 287c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 2888f79b064SBen Gardon 289c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 290c236d962SSean Christopherson mmu_spte_set(sptep, spte); 291c50d8ae3SPaolo Bonzini } 292c50d8ae3SPaolo Bonzini 293c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 294c50d8ae3SPaolo Bonzini { 295c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 296c50d8ae3SPaolo Bonzini 2978a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 298c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 299c50d8ae3SPaolo Bonzini 300c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 301c50d8ae3SPaolo Bonzini } 302c50d8ae3SPaolo Bonzini 303c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 304c50d8ae3SPaolo Bonzini { 305c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 306c50d8ae3SPaolo Bonzini } 307c50d8ae3SPaolo Bonzini 308c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 309c50d8ae3SPaolo Bonzini { 310c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 311c50d8ae3SPaolo Bonzini 312c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 313c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 314c50d8ae3SPaolo Bonzini return false; 315c50d8ae3SPaolo Bonzini 316c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 317c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 318c50d8ae3SPaolo Bonzini 319c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 320c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 321c50d8ae3SPaolo Bonzini } 322c50d8ae3SPaolo Bonzini 323cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 324cd313569SMohammed Gamal struct x86_exception *exception) 325cd313569SMohammed Gamal { 326ec7771abSMohammed Gamal /* Check if guest physical address doesn't exceed guest maximum */ 327dc46515cSSean Christopherson if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) { 328ec7771abSMohammed Gamal exception->error_code |= PFERR_RSVD_MASK; 329ec7771abSMohammed Gamal return UNMAPPED_GVA; 330ec7771abSMohammed Gamal } 331ec7771abSMohammed Gamal 332cd313569SMohammed Gamal return gpa; 333cd313569SMohammed Gamal } 334cd313569SMohammed Gamal 335c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 336c50d8ae3SPaolo Bonzini { 337c50d8ae3SPaolo Bonzini return 1; 338c50d8ae3SPaolo Bonzini } 339c50d8ae3SPaolo Bonzini 340c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 341c50d8ae3SPaolo Bonzini { 342c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 343c50d8ae3SPaolo Bonzini 344c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 345c50d8ae3SPaolo Bonzini } 346c50d8ae3SPaolo Bonzini 347c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 348c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 349c50d8ae3SPaolo Bonzini { 350c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 351c50d8ae3SPaolo Bonzini } 352c50d8ae3SPaolo Bonzini 353c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 354c50d8ae3SPaolo Bonzini { 355c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 356c50d8ae3SPaolo Bonzini } 357c50d8ae3SPaolo Bonzini 358c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 359c50d8ae3SPaolo Bonzini { 360c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 361c50d8ae3SPaolo Bonzini } 362c50d8ae3SPaolo Bonzini 363c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 364c50d8ae3SPaolo Bonzini { 365c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 366c50d8ae3SPaolo Bonzini } 367c50d8ae3SPaolo Bonzini #else 368c50d8ae3SPaolo Bonzini union split_spte { 369c50d8ae3SPaolo Bonzini struct { 370c50d8ae3SPaolo Bonzini u32 spte_low; 371c50d8ae3SPaolo Bonzini u32 spte_high; 372c50d8ae3SPaolo Bonzini }; 373c50d8ae3SPaolo Bonzini u64 spte; 374c50d8ae3SPaolo Bonzini }; 375c50d8ae3SPaolo Bonzini 376c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 377c50d8ae3SPaolo Bonzini { 37857354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 379c50d8ae3SPaolo Bonzini 380c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 381c50d8ae3SPaolo Bonzini return; 382c50d8ae3SPaolo Bonzini 383c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 384c50d8ae3SPaolo Bonzini smp_wmb(); 385c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 386c50d8ae3SPaolo Bonzini } 387c50d8ae3SPaolo Bonzini 388c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 389c50d8ae3SPaolo Bonzini { 390c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 391c50d8ae3SPaolo Bonzini 392c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 393c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 394c50d8ae3SPaolo Bonzini 395c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 396c50d8ae3SPaolo Bonzini 397c50d8ae3SPaolo Bonzini /* 398c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 399c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 400c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 401c50d8ae3SPaolo Bonzini */ 402c50d8ae3SPaolo Bonzini smp_wmb(); 403c50d8ae3SPaolo Bonzini 404c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 405c50d8ae3SPaolo Bonzini } 406c50d8ae3SPaolo Bonzini 407c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 408c50d8ae3SPaolo Bonzini { 409c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 410c50d8ae3SPaolo Bonzini 411c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 412c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 413c50d8ae3SPaolo Bonzini 414c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 415c50d8ae3SPaolo Bonzini 416c50d8ae3SPaolo Bonzini /* 417c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 418c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 419c50d8ae3SPaolo Bonzini */ 420c50d8ae3SPaolo Bonzini smp_wmb(); 421c50d8ae3SPaolo Bonzini 422c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 423c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 424c50d8ae3SPaolo Bonzini } 425c50d8ae3SPaolo Bonzini 426c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 427c50d8ae3SPaolo Bonzini { 428c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 429c50d8ae3SPaolo Bonzini 430c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 431c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 432c50d8ae3SPaolo Bonzini 433c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 434c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 435c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 436c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 437c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 438c50d8ae3SPaolo Bonzini 439c50d8ae3SPaolo Bonzini return orig.spte; 440c50d8ae3SPaolo Bonzini } 441c50d8ae3SPaolo Bonzini 442c50d8ae3SPaolo Bonzini /* 443c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 444c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 445c50d8ae3SPaolo Bonzini * 446c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 447c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 448c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 449c50d8ae3SPaolo Bonzini * 450c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 451c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 452c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 453c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 454c50d8ae3SPaolo Bonzini * 455c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 456c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 457c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 458c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 459c50d8ae3SPaolo Bonzini */ 460c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 461c50d8ae3SPaolo Bonzini { 46257354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 463c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 464c50d8ae3SPaolo Bonzini int count; 465c50d8ae3SPaolo Bonzini 466c50d8ae3SPaolo Bonzini retry: 467c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 468c50d8ae3SPaolo Bonzini smp_rmb(); 469c50d8ae3SPaolo Bonzini 470c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 471c50d8ae3SPaolo Bonzini smp_rmb(); 472c50d8ae3SPaolo Bonzini 473c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 474c50d8ae3SPaolo Bonzini smp_rmb(); 475c50d8ae3SPaolo Bonzini 476c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 477c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 478c50d8ae3SPaolo Bonzini goto retry; 479c50d8ae3SPaolo Bonzini 480c50d8ae3SPaolo Bonzini return spte.spte; 481c50d8ae3SPaolo Bonzini } 482c50d8ae3SPaolo Bonzini #endif 483c50d8ae3SPaolo Bonzini 484c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 485c50d8ae3SPaolo Bonzini { 486c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 487c50d8ae3SPaolo Bonzini return false; 488c50d8ae3SPaolo Bonzini 489c50d8ae3SPaolo Bonzini /* 490c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 491c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 492c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 493c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 494c50d8ae3SPaolo Bonzini */ 495c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 496c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 497c50d8ae3SPaolo Bonzini return true; 498c50d8ae3SPaolo Bonzini 499c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 500c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 501c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 502c50d8ae3SPaolo Bonzini return true; 503c50d8ae3SPaolo Bonzini } 504c50d8ae3SPaolo Bonzini 505c50d8ae3SPaolo Bonzini return false; 506c50d8ae3SPaolo Bonzini } 507c50d8ae3SPaolo Bonzini 508c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 509c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 510c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 511c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 512c50d8ae3SPaolo Bonzini * the spte. 513c50d8ae3SPaolo Bonzini */ 514c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 515c50d8ae3SPaolo Bonzini { 516c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 517c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 518c50d8ae3SPaolo Bonzini } 519c50d8ae3SPaolo Bonzini 520c50d8ae3SPaolo Bonzini /* 521c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 522c50d8ae3SPaolo Bonzini * accessed/dirty status. 523c50d8ae3SPaolo Bonzini */ 524c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 525c50d8ae3SPaolo Bonzini { 526c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 527c50d8ae3SPaolo Bonzini 528c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 529c50d8ae3SPaolo Bonzini 530c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 531c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 532c50d8ae3SPaolo Bonzini return old_spte; 533c50d8ae3SPaolo Bonzini } 534c50d8ae3SPaolo Bonzini 535c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 536c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 537c50d8ae3SPaolo Bonzini else 538c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 539c50d8ae3SPaolo Bonzini 540c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 541c50d8ae3SPaolo Bonzini 542c50d8ae3SPaolo Bonzini return old_spte; 543c50d8ae3SPaolo Bonzini } 544c50d8ae3SPaolo Bonzini 545c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 546c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 547c50d8ae3SPaolo Bonzini * 548c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 549c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 550c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 551c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 552c50d8ae3SPaolo Bonzini * case. 553c50d8ae3SPaolo Bonzini * 554c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 555c50d8ae3SPaolo Bonzini */ 556c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 557c50d8ae3SPaolo Bonzini { 558c50d8ae3SPaolo Bonzini bool flush = false; 559c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 560c50d8ae3SPaolo Bonzini 561c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 562c50d8ae3SPaolo Bonzini return false; 563c50d8ae3SPaolo Bonzini 564c50d8ae3SPaolo Bonzini /* 565c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 566c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 567c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 568c50d8ae3SPaolo Bonzini */ 569c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 570c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 571c50d8ae3SPaolo Bonzini flush = true; 572c50d8ae3SPaolo Bonzini 573c50d8ae3SPaolo Bonzini /* 574c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 575c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 576c50d8ae3SPaolo Bonzini */ 577c50d8ae3SPaolo Bonzini 578c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 579c50d8ae3SPaolo Bonzini flush = true; 580c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 581c50d8ae3SPaolo Bonzini } 582c50d8ae3SPaolo Bonzini 583c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 584c50d8ae3SPaolo Bonzini flush = true; 585c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 586c50d8ae3SPaolo Bonzini } 587c50d8ae3SPaolo Bonzini 588c50d8ae3SPaolo Bonzini return flush; 589c50d8ae3SPaolo Bonzini } 590c50d8ae3SPaolo Bonzini 591c50d8ae3SPaolo Bonzini /* 592c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 593c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 594c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 5957fa2a347SSean Christopherson * Returns the old PTE. 596c50d8ae3SPaolo Bonzini */ 5977fa2a347SSean Christopherson static u64 mmu_spte_clear_track_bits(u64 *sptep) 598c50d8ae3SPaolo Bonzini { 599c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 600c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 601c50d8ae3SPaolo Bonzini 602c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 603c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 604c50d8ae3SPaolo Bonzini else 605c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 606c50d8ae3SPaolo Bonzini 607c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 6087fa2a347SSean Christopherson return old_spte; 609c50d8ae3SPaolo Bonzini 610c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 611c50d8ae3SPaolo Bonzini 612c50d8ae3SPaolo Bonzini /* 613c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 614c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 615c50d8ae3SPaolo Bonzini * unmap it from mmu first. 616c50d8ae3SPaolo Bonzini */ 617c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 618c50d8ae3SPaolo Bonzini 619c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 620c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 621c50d8ae3SPaolo Bonzini 622c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 623c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 624c50d8ae3SPaolo Bonzini 6257fa2a347SSean Christopherson return old_spte; 626c50d8ae3SPaolo Bonzini } 627c50d8ae3SPaolo Bonzini 628c50d8ae3SPaolo Bonzini /* 629c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 630c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 631c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 632c50d8ae3SPaolo Bonzini */ 633c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 634c50d8ae3SPaolo Bonzini { 635c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 636c50d8ae3SPaolo Bonzini } 637c50d8ae3SPaolo Bonzini 638c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 639c50d8ae3SPaolo Bonzini { 640c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 641c50d8ae3SPaolo Bonzini } 642c50d8ae3SPaolo Bonzini 643c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 644c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 645c50d8ae3SPaolo Bonzini { 646c50d8ae3SPaolo Bonzini u64 new_spte = spte; 6478a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 6488a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 649c50d8ae3SPaolo Bonzini 650c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 651c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 652c50d8ae3SPaolo Bonzini 653c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 6548a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 6558a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 656c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 657c50d8ae3SPaolo Bonzini 658c50d8ae3SPaolo Bonzini return new_spte; 659c50d8ae3SPaolo Bonzini } 660c50d8ae3SPaolo Bonzini 661c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 662c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 663c50d8ae3SPaolo Bonzini { 664c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 665c50d8ae3SPaolo Bonzini 666c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 667c50d8ae3SPaolo Bonzini return false; 668c50d8ae3SPaolo Bonzini 669c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 670c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 671c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 672c50d8ae3SPaolo Bonzini } else { 673c50d8ae3SPaolo Bonzini /* 674c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 675c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 676c50d8ae3SPaolo Bonzini */ 677c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 678c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 679c50d8ae3SPaolo Bonzini 680c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 681c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 682c50d8ae3SPaolo Bonzini } 683c50d8ae3SPaolo Bonzini 684c50d8ae3SPaolo Bonzini return true; 685c50d8ae3SPaolo Bonzini } 686c50d8ae3SPaolo Bonzini 687c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 688c50d8ae3SPaolo Bonzini { 689c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 690c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_begin(); 691c5c8c7c5SDavid Matlack } else { 692c50d8ae3SPaolo Bonzini /* 693c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 694c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 695c50d8ae3SPaolo Bonzini */ 696c50d8ae3SPaolo Bonzini local_irq_disable(); 697c50d8ae3SPaolo Bonzini 698c50d8ae3SPaolo Bonzini /* 699c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 700c50d8ae3SPaolo Bonzini * to vcpu->mode. 701c50d8ae3SPaolo Bonzini */ 702c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 703c50d8ae3SPaolo Bonzini } 704c5c8c7c5SDavid Matlack } 705c50d8ae3SPaolo Bonzini 706c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 707c50d8ae3SPaolo Bonzini { 708c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 709c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_end(); 710c5c8c7c5SDavid Matlack } else { 711c50d8ae3SPaolo Bonzini /* 712c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 713c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 714c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 715c50d8ae3SPaolo Bonzini */ 716c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 717c50d8ae3SPaolo Bonzini local_irq_enable(); 718c50d8ae3SPaolo Bonzini } 719c5c8c7c5SDavid Matlack } 720c50d8ae3SPaolo Bonzini 721378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 722c50d8ae3SPaolo Bonzini { 723c50d8ae3SPaolo Bonzini int r; 724c50d8ae3SPaolo Bonzini 725531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 72694ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 727531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 728c50d8ae3SPaolo Bonzini if (r) 729c50d8ae3SPaolo Bonzini return r; 73094ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 731171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 732171a90d7SSean Christopherson if (r) 733171a90d7SSean Christopherson return r; 734378f5cd6SSean Christopherson if (maybe_indirect) { 73594ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 736171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 737c50d8ae3SPaolo Bonzini if (r) 738c50d8ae3SPaolo Bonzini return r; 739378f5cd6SSean Christopherson } 74094ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 741531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 742c50d8ae3SPaolo Bonzini } 743c50d8ae3SPaolo Bonzini 744c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 745c50d8ae3SPaolo Bonzini { 74694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 74794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 74894ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 74994ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 750c50d8ae3SPaolo Bonzini } 751c50d8ae3SPaolo Bonzini 752c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 753c50d8ae3SPaolo Bonzini { 75494ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 755c50d8ae3SPaolo Bonzini } 756c50d8ae3SPaolo Bonzini 757c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 758c50d8ae3SPaolo Bonzini { 759c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 760c50d8ae3SPaolo Bonzini } 761c50d8ae3SPaolo Bonzini 762c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 763c50d8ae3SPaolo Bonzini { 764c50d8ae3SPaolo Bonzini if (!sp->role.direct) 765c50d8ae3SPaolo Bonzini return sp->gfns[index]; 766c50d8ae3SPaolo Bonzini 767c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 768c50d8ae3SPaolo Bonzini } 769c50d8ae3SPaolo Bonzini 770c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 771c50d8ae3SPaolo Bonzini { 772c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 773c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 774c50d8ae3SPaolo Bonzini return; 775c50d8ae3SPaolo Bonzini } 776c50d8ae3SPaolo Bonzini 777c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 778c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 779c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 780c50d8ae3SPaolo Bonzini sp->gfn, 781c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 782c50d8ae3SPaolo Bonzini } 783c50d8ae3SPaolo Bonzini 784c50d8ae3SPaolo Bonzini /* 785c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 786c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 787c50d8ae3SPaolo Bonzini */ 788c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 7898ca6f063SBen Gardon const struct kvm_memory_slot *slot, int level) 790c50d8ae3SPaolo Bonzini { 791c50d8ae3SPaolo Bonzini unsigned long idx; 792c50d8ae3SPaolo Bonzini 793c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 794c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 795c50d8ae3SPaolo Bonzini } 796c50d8ae3SPaolo Bonzini 797*269e9552SHamza Mahfooz static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot, 798c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 799c50d8ae3SPaolo Bonzini { 800c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 801c50d8ae3SPaolo Bonzini int i; 802c50d8ae3SPaolo Bonzini 8033bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 804c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 805c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 806c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 807c50d8ae3SPaolo Bonzini } 808c50d8ae3SPaolo Bonzini } 809c50d8ae3SPaolo Bonzini 810*269e9552SHamza Mahfooz void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 811c50d8ae3SPaolo Bonzini { 812c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 813c50d8ae3SPaolo Bonzini } 814c50d8ae3SPaolo Bonzini 815*269e9552SHamza Mahfooz void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 816c50d8ae3SPaolo Bonzini { 817c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 818c50d8ae3SPaolo Bonzini } 819c50d8ae3SPaolo Bonzini 820c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 821c50d8ae3SPaolo Bonzini { 822c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 823c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 824c50d8ae3SPaolo Bonzini gfn_t gfn; 825c50d8ae3SPaolo Bonzini 826c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 827c50d8ae3SPaolo Bonzini gfn = sp->gfn; 828c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 829c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 830c50d8ae3SPaolo Bonzini 831c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 8323bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 833c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 834c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 835c50d8ae3SPaolo Bonzini 836c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 837c50d8ae3SPaolo Bonzini } 838c50d8ae3SPaolo Bonzini 83929cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 840c50d8ae3SPaolo Bonzini { 841c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 842c50d8ae3SPaolo Bonzini return; 843c50d8ae3SPaolo Bonzini 844c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 845c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 846c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 847c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 848c50d8ae3SPaolo Bonzini } 849c50d8ae3SPaolo Bonzini 850c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 851c50d8ae3SPaolo Bonzini { 852c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 853c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 854c50d8ae3SPaolo Bonzini gfn_t gfn; 855c50d8ae3SPaolo Bonzini 856c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 857c50d8ae3SPaolo Bonzini gfn = sp->gfn; 858c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 859c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 8603bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 861c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 862c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 863c50d8ae3SPaolo Bonzini 864c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 865c50d8ae3SPaolo Bonzini } 866c50d8ae3SPaolo Bonzini 86729cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 868c50d8ae3SPaolo Bonzini { 869c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 870c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 871c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 872c50d8ae3SPaolo Bonzini } 873c50d8ae3SPaolo Bonzini 874c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 875c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 876c50d8ae3SPaolo Bonzini bool no_dirty_log) 877c50d8ae3SPaolo Bonzini { 878c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 879c50d8ae3SPaolo Bonzini 880c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 88191b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 88291b0d268SPaolo Bonzini return NULL; 883044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 88491b0d268SPaolo Bonzini return NULL; 885c50d8ae3SPaolo Bonzini 886c50d8ae3SPaolo Bonzini return slot; 887c50d8ae3SPaolo Bonzini } 888c50d8ae3SPaolo Bonzini 889c50d8ae3SPaolo Bonzini /* 890c50d8ae3SPaolo Bonzini * About rmap_head encoding: 891c50d8ae3SPaolo Bonzini * 892c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 893c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 894c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 895c50d8ae3SPaolo Bonzini */ 896c50d8ae3SPaolo Bonzini 897c50d8ae3SPaolo Bonzini /* 898c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 899c50d8ae3SPaolo Bonzini */ 900c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 901c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 902c50d8ae3SPaolo Bonzini { 903c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 904c50d8ae3SPaolo Bonzini int i, count = 0; 905c50d8ae3SPaolo Bonzini 906c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 907805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 908c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 909c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 910805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 911c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 912c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 913c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 914c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 915c50d8ae3SPaolo Bonzini ++count; 916c50d8ae3SPaolo Bonzini } else { 917805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 918c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 919c6c4f961SLi RongQing while (desc->sptes[PTE_LIST_EXT-1]) { 920c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 921c6c4f961SLi RongQing 922c6c4f961SLi RongQing if (!desc->more) { 923c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 924c50d8ae3SPaolo Bonzini desc = desc->more; 925c6c4f961SLi RongQing break; 926c6c4f961SLi RongQing } 927c6c4f961SLi RongQing desc = desc->more; 928c50d8ae3SPaolo Bonzini } 929c50d8ae3SPaolo Bonzini for (i = 0; desc->sptes[i]; ++i) 930c50d8ae3SPaolo Bonzini ++count; 931c50d8ae3SPaolo Bonzini desc->sptes[i] = spte; 932c50d8ae3SPaolo Bonzini } 933c50d8ae3SPaolo Bonzini return count; 934c50d8ae3SPaolo Bonzini } 935c50d8ae3SPaolo Bonzini 936c50d8ae3SPaolo Bonzini static void 937c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 938c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 939c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 940c50d8ae3SPaolo Bonzini { 941c50d8ae3SPaolo Bonzini int j; 942c50d8ae3SPaolo Bonzini 943c50d8ae3SPaolo Bonzini for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) 944c50d8ae3SPaolo Bonzini ; 945c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 946c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 947c50d8ae3SPaolo Bonzini if (j != 0) 948c50d8ae3SPaolo Bonzini return; 949c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 950fe3c2b4cSMiaohe Lin rmap_head->val = 0; 951c50d8ae3SPaolo Bonzini else 952c50d8ae3SPaolo Bonzini if (prev_desc) 953c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 954c50d8ae3SPaolo Bonzini else 955c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 956c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 957c50d8ae3SPaolo Bonzini } 958c50d8ae3SPaolo Bonzini 959c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 960c50d8ae3SPaolo Bonzini { 961c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 962c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 963c50d8ae3SPaolo Bonzini int i; 964c50d8ae3SPaolo Bonzini 965c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 966c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 967c50d8ae3SPaolo Bonzini BUG(); 968c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 969805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 970c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 971c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 972c50d8ae3SPaolo Bonzini BUG(); 973c50d8ae3SPaolo Bonzini } 974c50d8ae3SPaolo Bonzini rmap_head->val = 0; 975c50d8ae3SPaolo Bonzini } else { 976805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 977c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 978c50d8ae3SPaolo Bonzini prev_desc = NULL; 979c50d8ae3SPaolo Bonzini while (desc) { 980c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { 981c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 982c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 983c50d8ae3SPaolo Bonzini desc, i, prev_desc); 984c50d8ae3SPaolo Bonzini return; 985c50d8ae3SPaolo Bonzini } 986c50d8ae3SPaolo Bonzini } 987c50d8ae3SPaolo Bonzini prev_desc = desc; 988c50d8ae3SPaolo Bonzini desc = desc->more; 989c50d8ae3SPaolo Bonzini } 990c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 991c50d8ae3SPaolo Bonzini BUG(); 992c50d8ae3SPaolo Bonzini } 993c50d8ae3SPaolo Bonzini } 994c50d8ae3SPaolo Bonzini 995c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 996c50d8ae3SPaolo Bonzini { 997c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 998c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 999c50d8ae3SPaolo Bonzini } 1000c50d8ae3SPaolo Bonzini 1001c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 1002*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1003c50d8ae3SPaolo Bonzini { 1004c50d8ae3SPaolo Bonzini unsigned long idx; 1005c50d8ae3SPaolo Bonzini 1006c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 10073bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1008c50d8ae3SPaolo Bonzini } 1009c50d8ae3SPaolo Bonzini 1010c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 1011c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1012c50d8ae3SPaolo Bonzini { 1013c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1014c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1015c50d8ae3SPaolo Bonzini 1016c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1017c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 1018c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 1019c50d8ae3SPaolo Bonzini } 1020c50d8ae3SPaolo Bonzini 1021c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1022c50d8ae3SPaolo Bonzini { 1023356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 1024c50d8ae3SPaolo Bonzini 1025356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 102694ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 1027c50d8ae3SPaolo Bonzini } 1028c50d8ae3SPaolo Bonzini 1029c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1030c50d8ae3SPaolo Bonzini { 1031c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1032c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1033c50d8ae3SPaolo Bonzini 103457354682SSean Christopherson sp = sptep_to_sp(spte); 1035c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 1036c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1037c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 1038c50d8ae3SPaolo Bonzini } 1039c50d8ae3SPaolo Bonzini 1040c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1041c50d8ae3SPaolo Bonzini { 1042c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1043c50d8ae3SPaolo Bonzini gfn_t gfn; 1044c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1045c50d8ae3SPaolo Bonzini 104657354682SSean Christopherson sp = sptep_to_sp(spte); 1047c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1048c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 1049c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1050c50d8ae3SPaolo Bonzini } 1051c50d8ae3SPaolo Bonzini 1052c50d8ae3SPaolo Bonzini /* 1053c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1054c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1055c50d8ae3SPaolo Bonzini */ 1056c50d8ae3SPaolo Bonzini struct rmap_iterator { 1057c50d8ae3SPaolo Bonzini /* private fields */ 1058c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1059c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1060c50d8ae3SPaolo Bonzini }; 1061c50d8ae3SPaolo Bonzini 1062c50d8ae3SPaolo Bonzini /* 1063c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1064c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 10650a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1066c50d8ae3SPaolo Bonzini * 1067c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1068c50d8ae3SPaolo Bonzini */ 1069c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1070c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1071c50d8ae3SPaolo Bonzini { 1072c50d8ae3SPaolo Bonzini u64 *sptep; 1073c50d8ae3SPaolo Bonzini 1074c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1075c50d8ae3SPaolo Bonzini return NULL; 1076c50d8ae3SPaolo Bonzini 1077c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1078c50d8ae3SPaolo Bonzini iter->desc = NULL; 1079c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1080c50d8ae3SPaolo Bonzini goto out; 1081c50d8ae3SPaolo Bonzini } 1082c50d8ae3SPaolo Bonzini 1083c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1084c50d8ae3SPaolo Bonzini iter->pos = 0; 1085c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1086c50d8ae3SPaolo Bonzini out: 1087c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1088c50d8ae3SPaolo Bonzini return sptep; 1089c50d8ae3SPaolo Bonzini } 1090c50d8ae3SPaolo Bonzini 1091c50d8ae3SPaolo Bonzini /* 1092c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1093c50d8ae3SPaolo Bonzini * 1094c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1095c50d8ae3SPaolo Bonzini */ 1096c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1097c50d8ae3SPaolo Bonzini { 1098c50d8ae3SPaolo Bonzini u64 *sptep; 1099c50d8ae3SPaolo Bonzini 1100c50d8ae3SPaolo Bonzini if (iter->desc) { 1101c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1102c50d8ae3SPaolo Bonzini ++iter->pos; 1103c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1104c50d8ae3SPaolo Bonzini if (sptep) 1105c50d8ae3SPaolo Bonzini goto out; 1106c50d8ae3SPaolo Bonzini } 1107c50d8ae3SPaolo Bonzini 1108c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1109c50d8ae3SPaolo Bonzini 1110c50d8ae3SPaolo Bonzini if (iter->desc) { 1111c50d8ae3SPaolo Bonzini iter->pos = 0; 1112c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1113c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1114c50d8ae3SPaolo Bonzini goto out; 1115c50d8ae3SPaolo Bonzini } 1116c50d8ae3SPaolo Bonzini } 1117c50d8ae3SPaolo Bonzini 1118c50d8ae3SPaolo Bonzini return NULL; 1119c50d8ae3SPaolo Bonzini out: 1120c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1121c50d8ae3SPaolo Bonzini return sptep; 1122c50d8ae3SPaolo Bonzini } 1123c50d8ae3SPaolo Bonzini 1124c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1125c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1126c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1127c50d8ae3SPaolo Bonzini 1128c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1129c50d8ae3SPaolo Bonzini { 11307fa2a347SSean Christopherson u64 old_spte = mmu_spte_clear_track_bits(sptep); 11317fa2a347SSean Christopherson 11327fa2a347SSean Christopherson if (is_shadow_present_pte(old_spte)) 1133c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1134c50d8ae3SPaolo Bonzini } 1135c50d8ae3SPaolo Bonzini 1136c50d8ae3SPaolo Bonzini 1137c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1138c50d8ae3SPaolo Bonzini { 1139c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 114057354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1141c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1142c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1143c50d8ae3SPaolo Bonzini return true; 1144c50d8ae3SPaolo Bonzini } 1145c50d8ae3SPaolo Bonzini 1146c50d8ae3SPaolo Bonzini return false; 1147c50d8ae3SPaolo Bonzini } 1148c50d8ae3SPaolo Bonzini 1149c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1150c50d8ae3SPaolo Bonzini { 1151c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 115257354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1153c50d8ae3SPaolo Bonzini 1154c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1155c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1156c50d8ae3SPaolo Bonzini } 1157c50d8ae3SPaolo Bonzini } 1158c50d8ae3SPaolo Bonzini 1159c50d8ae3SPaolo Bonzini /* 1160c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1161c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1162c50d8ae3SPaolo Bonzini * 1163c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1164c50d8ae3SPaolo Bonzini * protection: 1165c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1166c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1167c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1168c50d8ae3SPaolo Bonzini * shadow page. 1169c50d8ae3SPaolo Bonzini * 1170c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1171c50d8ae3SPaolo Bonzini */ 1172c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1173c50d8ae3SPaolo Bonzini { 1174c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1175c50d8ae3SPaolo Bonzini 1176c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1177c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1178c50d8ae3SPaolo Bonzini return false; 1179c50d8ae3SPaolo Bonzini 1180805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1181c50d8ae3SPaolo Bonzini 1182c50d8ae3SPaolo Bonzini if (pt_protect) 11835fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1184c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1185c50d8ae3SPaolo Bonzini 1186c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1187c50d8ae3SPaolo Bonzini } 1188c50d8ae3SPaolo Bonzini 1189c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1190c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1191c50d8ae3SPaolo Bonzini bool pt_protect) 1192c50d8ae3SPaolo Bonzini { 1193c50d8ae3SPaolo Bonzini u64 *sptep; 1194c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1195c50d8ae3SPaolo Bonzini bool flush = false; 1196c50d8ae3SPaolo Bonzini 1197c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1198c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1199c50d8ae3SPaolo Bonzini 1200c50d8ae3SPaolo Bonzini return flush; 1201c50d8ae3SPaolo Bonzini } 1202c50d8ae3SPaolo Bonzini 1203c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1204c50d8ae3SPaolo Bonzini { 1205c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1206c50d8ae3SPaolo Bonzini 1207805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1208c50d8ae3SPaolo Bonzini 1209c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1210c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1211c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1212c50d8ae3SPaolo Bonzini } 1213c50d8ae3SPaolo Bonzini 1214c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1215c50d8ae3SPaolo Bonzini { 1216c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1217c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1218c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1219c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1220c50d8ae3SPaolo Bonzini 1221c50d8ae3SPaolo Bonzini return was_writable; 1222c50d8ae3SPaolo Bonzini } 1223c50d8ae3SPaolo Bonzini 1224c50d8ae3SPaolo Bonzini /* 1225c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1226c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1227c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1228c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1229c50d8ae3SPaolo Bonzini */ 12300a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1231*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1232c50d8ae3SPaolo Bonzini { 1233c50d8ae3SPaolo Bonzini u64 *sptep; 1234c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1235c50d8ae3SPaolo Bonzini bool flush = false; 1236c50d8ae3SPaolo Bonzini 1237c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1238c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1239c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1240c50d8ae3SPaolo Bonzini else 1241c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1242c50d8ae3SPaolo Bonzini 1243c50d8ae3SPaolo Bonzini return flush; 1244c50d8ae3SPaolo Bonzini } 1245c50d8ae3SPaolo Bonzini 1246c50d8ae3SPaolo Bonzini /** 1247c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1248c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1249c50d8ae3SPaolo Bonzini * @slot: slot to protect 1250c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1251c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1252c50d8ae3SPaolo Bonzini * 125389212919SKeqian Zhu * Used when we do not need to care about huge page mappings. 1254c50d8ae3SPaolo Bonzini */ 1255c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1256c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1257c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1258c50d8ae3SPaolo Bonzini { 1259c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1260c50d8ae3SPaolo Bonzini 1261897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1262a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1263a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1264e2209710SBen Gardon 1265e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1266e2209710SBen Gardon return; 1267e2209710SBen Gardon 1268c50d8ae3SPaolo Bonzini while (mask) { 1269c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12703bae0459SSean Christopherson PG_LEVEL_4K, slot); 1271c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1272c50d8ae3SPaolo Bonzini 1273c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1274c50d8ae3SPaolo Bonzini mask &= mask - 1; 1275c50d8ae3SPaolo Bonzini } 1276c50d8ae3SPaolo Bonzini } 1277c50d8ae3SPaolo Bonzini 1278c50d8ae3SPaolo Bonzini /** 1279c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1280c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1281c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1282c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1283c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1284c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1285c50d8ae3SPaolo Bonzini * 1286c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1287c50d8ae3SPaolo Bonzini */ 1288a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1289c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1290c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1291c50d8ae3SPaolo Bonzini { 1292c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1293c50d8ae3SPaolo Bonzini 1294897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1295a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1296a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1297e2209710SBen Gardon 1298e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1299e2209710SBen Gardon return; 1300e2209710SBen Gardon 1301c50d8ae3SPaolo Bonzini while (mask) { 1302c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13033bae0459SSean Christopherson PG_LEVEL_4K, slot); 13040a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1305c50d8ae3SPaolo Bonzini 1306c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1307c50d8ae3SPaolo Bonzini mask &= mask - 1; 1308c50d8ae3SPaolo Bonzini } 1309c50d8ae3SPaolo Bonzini } 1310c50d8ae3SPaolo Bonzini 1311c50d8ae3SPaolo Bonzini /** 1312c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1313c50d8ae3SPaolo Bonzini * PT level pages. 1314c50d8ae3SPaolo Bonzini * 1315c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1316c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1317c50d8ae3SPaolo Bonzini * 131889212919SKeqian Zhu * We need to care about huge page mappings: e.g. during dirty logging we may 131989212919SKeqian Zhu * have such mappings. 1320c50d8ae3SPaolo Bonzini */ 1321c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1322c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1323c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1324c50d8ae3SPaolo Bonzini { 132589212919SKeqian Zhu /* 132689212919SKeqian Zhu * Huge pages are NOT write protected when we start dirty logging in 132789212919SKeqian Zhu * initially-all-set mode; must write protect them here so that they 132889212919SKeqian Zhu * are split to 4K on the first write. 132989212919SKeqian Zhu * 133089212919SKeqian Zhu * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn 133189212919SKeqian Zhu * of memslot has no such restriction, so the range can cross two large 133289212919SKeqian Zhu * pages. 133389212919SKeqian Zhu */ 133489212919SKeqian Zhu if (kvm_dirty_log_manual_protect_and_init_set(kvm)) { 133589212919SKeqian Zhu gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); 133689212919SKeqian Zhu gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); 133789212919SKeqian Zhu 133889212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M); 133989212919SKeqian Zhu 134089212919SKeqian Zhu /* Cross two large pages? */ 134189212919SKeqian Zhu if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) != 134289212919SKeqian Zhu ALIGN(end << PAGE_SHIFT, PMD_SIZE)) 134389212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, end, 134489212919SKeqian Zhu PG_LEVEL_2M); 134589212919SKeqian Zhu } 134689212919SKeqian Zhu 134789212919SKeqian Zhu /* Now handle 4K PTEs. */ 1348a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1349a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1350c50d8ae3SPaolo Bonzini else 1351c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1352c50d8ae3SPaolo Bonzini } 1353c50d8ae3SPaolo Bonzini 1354fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1355fb04a1edSPeter Xu { 13566dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1357fb04a1edSPeter Xu } 1358fb04a1edSPeter Xu 1359c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 13603ad93562SKeqian Zhu struct kvm_memory_slot *slot, u64 gfn, 13613ad93562SKeqian Zhu int min_level) 1362c50d8ae3SPaolo Bonzini { 1363c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1364c50d8ae3SPaolo Bonzini int i; 1365c50d8ae3SPaolo Bonzini bool write_protected = false; 1366c50d8ae3SPaolo Bonzini 1367e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 13683ad93562SKeqian Zhu for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1369c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1370c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1371c50d8ae3SPaolo Bonzini } 1372e2209710SBen Gardon } 1373c50d8ae3SPaolo Bonzini 1374897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 137546044f72SBen Gardon write_protected |= 13763ad93562SKeqian Zhu kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level); 137746044f72SBen Gardon 1378c50d8ae3SPaolo Bonzini return write_protected; 1379c50d8ae3SPaolo Bonzini } 1380c50d8ae3SPaolo Bonzini 1381c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1382c50d8ae3SPaolo Bonzini { 1383c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1384c50d8ae3SPaolo Bonzini 1385c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 13863ad93562SKeqian Zhu return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); 1387c50d8ae3SPaolo Bonzini } 1388c50d8ae3SPaolo Bonzini 13890a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1390*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1391c50d8ae3SPaolo Bonzini { 1392c50d8ae3SPaolo Bonzini u64 *sptep; 1393c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1394c50d8ae3SPaolo Bonzini bool flush = false; 1395c50d8ae3SPaolo Bonzini 1396c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1397805a0f83SStephen Zhang rmap_printk("spte %p %llx.\n", sptep, *sptep); 1398c50d8ae3SPaolo Bonzini 1399c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1400c50d8ae3SPaolo Bonzini flush = true; 1401c50d8ae3SPaolo Bonzini } 1402c50d8ae3SPaolo Bonzini 1403c50d8ae3SPaolo Bonzini return flush; 1404c50d8ae3SPaolo Bonzini } 1405c50d8ae3SPaolo Bonzini 14063039bcc7SSean Christopherson static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1407c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14083039bcc7SSean Christopherson pte_t unused) 1409c50d8ae3SPaolo Bonzini { 14100a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1411c50d8ae3SPaolo Bonzini } 1412c50d8ae3SPaolo Bonzini 14133039bcc7SSean Christopherson static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1414c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14153039bcc7SSean Christopherson pte_t pte) 1416c50d8ae3SPaolo Bonzini { 1417c50d8ae3SPaolo Bonzini u64 *sptep; 1418c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1419c50d8ae3SPaolo Bonzini int need_flush = 0; 1420c50d8ae3SPaolo Bonzini u64 new_spte; 1421c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1422c50d8ae3SPaolo Bonzini 14233039bcc7SSean Christopherson WARN_ON(pte_huge(pte)); 14243039bcc7SSean Christopherson new_pfn = pte_pfn(pte); 1425c50d8ae3SPaolo Bonzini 1426c50d8ae3SPaolo Bonzini restart: 1427c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1428805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1429c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1430c50d8ae3SPaolo Bonzini 1431c50d8ae3SPaolo Bonzini need_flush = 1; 1432c50d8ae3SPaolo Bonzini 14333039bcc7SSean Christopherson if (pte_write(pte)) { 1434c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1435c50d8ae3SPaolo Bonzini goto restart; 1436c50d8ae3SPaolo Bonzini } else { 1437cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1438cb3eedabSPaolo Bonzini *sptep, new_pfn); 1439c50d8ae3SPaolo Bonzini 1440c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1441c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1442c50d8ae3SPaolo Bonzini } 1443c50d8ae3SPaolo Bonzini } 1444c50d8ae3SPaolo Bonzini 1445c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1446c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1447c50d8ae3SPaolo Bonzini return 0; 1448c50d8ae3SPaolo Bonzini } 1449c50d8ae3SPaolo Bonzini 1450c50d8ae3SPaolo Bonzini return need_flush; 1451c50d8ae3SPaolo Bonzini } 1452c50d8ae3SPaolo Bonzini 1453c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1454c50d8ae3SPaolo Bonzini /* input fields. */ 1455*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot; 1456c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1457c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1458c50d8ae3SPaolo Bonzini int start_level; 1459c50d8ae3SPaolo Bonzini int end_level; 1460c50d8ae3SPaolo Bonzini 1461c50d8ae3SPaolo Bonzini /* output fields. */ 1462c50d8ae3SPaolo Bonzini gfn_t gfn; 1463c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1464c50d8ae3SPaolo Bonzini int level; 1465c50d8ae3SPaolo Bonzini 1466c50d8ae3SPaolo Bonzini /* private field. */ 1467c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1468c50d8ae3SPaolo Bonzini }; 1469c50d8ae3SPaolo Bonzini 1470c50d8ae3SPaolo Bonzini static void 1471c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1472c50d8ae3SPaolo Bonzini { 1473c50d8ae3SPaolo Bonzini iterator->level = level; 1474c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1475c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1476c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1477c50d8ae3SPaolo Bonzini iterator->slot); 1478c50d8ae3SPaolo Bonzini } 1479c50d8ae3SPaolo Bonzini 1480c50d8ae3SPaolo Bonzini static void 1481c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1482*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot, int start_level, 1483c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1484c50d8ae3SPaolo Bonzini { 1485c50d8ae3SPaolo Bonzini iterator->slot = slot; 1486c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1487c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1488c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1489c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1490c50d8ae3SPaolo Bonzini 1491c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1492c50d8ae3SPaolo Bonzini } 1493c50d8ae3SPaolo Bonzini 1494c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1495c50d8ae3SPaolo Bonzini { 1496c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1497c50d8ae3SPaolo Bonzini } 1498c50d8ae3SPaolo Bonzini 1499c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1500c50d8ae3SPaolo Bonzini { 1501c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1502c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1503c50d8ae3SPaolo Bonzini return; 1504c50d8ae3SPaolo Bonzini } 1505c50d8ae3SPaolo Bonzini 1506c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1507c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1508c50d8ae3SPaolo Bonzini return; 1509c50d8ae3SPaolo Bonzini } 1510c50d8ae3SPaolo Bonzini 1511c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1512c50d8ae3SPaolo Bonzini } 1513c50d8ae3SPaolo Bonzini 1514c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1515c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1516c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1517c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1518c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1519c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1520c50d8ae3SPaolo Bonzini 15213039bcc7SSean Christopherson typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1522c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 15233039bcc7SSean Christopherson int level, pte_t pte); 1524c1b91493SSean Christopherson 15253039bcc7SSean Christopherson static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm, 15263039bcc7SSean Christopherson struct kvm_gfn_range *range, 1527c1b91493SSean Christopherson rmap_handler_t handler) 1528c50d8ae3SPaolo Bonzini { 1529c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 15303039bcc7SSean Christopherson bool ret = false; 1531c50d8ae3SPaolo Bonzini 15323039bcc7SSean Christopherson for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 15333039bcc7SSean Christopherson range->start, range->end - 1, &iterator) 15343039bcc7SSean Christopherson ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, 15353039bcc7SSean Christopherson iterator.level, range->pte); 1536c50d8ae3SPaolo Bonzini 1537c50d8ae3SPaolo Bonzini return ret; 1538c50d8ae3SPaolo Bonzini } 1539c50d8ae3SPaolo Bonzini 15403039bcc7SSean Christopherson bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 1541c50d8ae3SPaolo Bonzini { 1542e2209710SBen Gardon bool flush = false; 1543c50d8ae3SPaolo Bonzini 1544e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15453039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp); 1546063afacdSBen Gardon 1547897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15483039bcc7SSean Christopherson flush |= kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush); 1549063afacdSBen Gardon 15503039bcc7SSean Christopherson return flush; 1551c50d8ae3SPaolo Bonzini } 1552c50d8ae3SPaolo Bonzini 15533039bcc7SSean Christopherson bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1554c50d8ae3SPaolo Bonzini { 1555e2209710SBen Gardon bool flush = false; 15561d8dd6b3SBen Gardon 1557e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15583039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp); 15591d8dd6b3SBen Gardon 1560897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15613039bcc7SSean Christopherson flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range); 15621d8dd6b3SBen Gardon 15633039bcc7SSean Christopherson return flush; 1564c50d8ae3SPaolo Bonzini } 1565c50d8ae3SPaolo Bonzini 15663039bcc7SSean Christopherson static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1567c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 15683039bcc7SSean Christopherson pte_t unused) 1569c50d8ae3SPaolo Bonzini { 1570c50d8ae3SPaolo Bonzini u64 *sptep; 15713f649ab7SKees Cook struct rmap_iterator iter; 1572c50d8ae3SPaolo Bonzini int young = 0; 1573c50d8ae3SPaolo Bonzini 1574c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1575c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1576c50d8ae3SPaolo Bonzini 1577c50d8ae3SPaolo Bonzini return young; 1578c50d8ae3SPaolo Bonzini } 1579c50d8ae3SPaolo Bonzini 15803039bcc7SSean Christopherson static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1581c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 15823039bcc7SSean Christopherson int level, pte_t unused) 1583c50d8ae3SPaolo Bonzini { 1584c50d8ae3SPaolo Bonzini u64 *sptep; 1585c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1586c50d8ae3SPaolo Bonzini 1587c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1588c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1589c50d8ae3SPaolo Bonzini return 1; 1590c50d8ae3SPaolo Bonzini return 0; 1591c50d8ae3SPaolo Bonzini } 1592c50d8ae3SPaolo Bonzini 1593c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1594c50d8ae3SPaolo Bonzini 1595c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1596c50d8ae3SPaolo Bonzini { 1597c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1598c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1599c50d8ae3SPaolo Bonzini 160057354682SSean Christopherson sp = sptep_to_sp(spte); 1601c50d8ae3SPaolo Bonzini 1602c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1603c50d8ae3SPaolo Bonzini 16043039bcc7SSean Christopherson kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0)); 1605c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1606c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1607c50d8ae3SPaolo Bonzini } 1608c50d8ae3SPaolo Bonzini 16093039bcc7SSean Christopherson bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1610c50d8ae3SPaolo Bonzini { 1611e2209710SBen Gardon bool young = false; 1612f8e14497SBen Gardon 1613e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16143039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp); 16153039bcc7SSean Christopherson 1616897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16173039bcc7SSean Christopherson young |= kvm_tdp_mmu_age_gfn_range(kvm, range); 1618f8e14497SBen Gardon 1619f8e14497SBen Gardon return young; 1620c50d8ae3SPaolo Bonzini } 1621c50d8ae3SPaolo Bonzini 16223039bcc7SSean Christopherson bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1623c50d8ae3SPaolo Bonzini { 1624e2209710SBen Gardon bool young = false; 1625f8e14497SBen Gardon 1626e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16273039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp); 16283039bcc7SSean Christopherson 1629897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16303039bcc7SSean Christopherson young |= kvm_tdp_mmu_test_age_gfn(kvm, range); 1631f8e14497SBen Gardon 1632f8e14497SBen Gardon return young; 1633c50d8ae3SPaolo Bonzini } 1634c50d8ae3SPaolo Bonzini 1635c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1636c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1637c50d8ae3SPaolo Bonzini { 1638c50d8ae3SPaolo Bonzini u64 *pos; 1639c50d8ae3SPaolo Bonzini u64 *end; 1640c50d8ae3SPaolo Bonzini 1641c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1642c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1643c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1644c50d8ae3SPaolo Bonzini pos, *pos); 1645c50d8ae3SPaolo Bonzini return 0; 1646c50d8ae3SPaolo Bonzini } 1647c50d8ae3SPaolo Bonzini return 1; 1648c50d8ae3SPaolo Bonzini } 1649c50d8ae3SPaolo Bonzini #endif 1650c50d8ae3SPaolo Bonzini 1651c50d8ae3SPaolo Bonzini /* 1652c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1653c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1654c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1655c50d8ae3SPaolo Bonzini * faster 1656c50d8ae3SPaolo Bonzini */ 1657c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 1658c50d8ae3SPaolo Bonzini { 1659c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1660c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1661c50d8ae3SPaolo Bonzini } 1662c50d8ae3SPaolo Bonzini 1663c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1664c50d8ae3SPaolo Bonzini { 1665c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1666c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1667c50d8ae3SPaolo Bonzini list_del(&sp->link); 1668c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1669c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1670c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1671c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1672c50d8ae3SPaolo Bonzini } 1673c50d8ae3SPaolo Bonzini 1674c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1675c50d8ae3SPaolo Bonzini { 1676c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1677c50d8ae3SPaolo Bonzini } 1678c50d8ae3SPaolo Bonzini 1679c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1680c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1681c50d8ae3SPaolo Bonzini { 1682c50d8ae3SPaolo Bonzini if (!parent_pte) 1683c50d8ae3SPaolo Bonzini return; 1684c50d8ae3SPaolo Bonzini 1685c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1686c50d8ae3SPaolo Bonzini } 1687c50d8ae3SPaolo Bonzini 1688c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1689c50d8ae3SPaolo Bonzini u64 *parent_pte) 1690c50d8ae3SPaolo Bonzini { 1691c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1692c50d8ae3SPaolo Bonzini } 1693c50d8ae3SPaolo Bonzini 1694c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1695c50d8ae3SPaolo Bonzini u64 *parent_pte) 1696c50d8ae3SPaolo Bonzini { 1697c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1698c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1699c50d8ae3SPaolo Bonzini } 1700c50d8ae3SPaolo Bonzini 1701c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1702c50d8ae3SPaolo Bonzini { 1703c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1704c50d8ae3SPaolo Bonzini 170594ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 170694ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1707c50d8ae3SPaolo Bonzini if (!direct) 170894ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1709c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1710c50d8ae3SPaolo Bonzini 1711c50d8ae3SPaolo Bonzini /* 1712c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1713c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1714c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1715c50d8ae3SPaolo Bonzini */ 1716c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1717c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1718c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1719c50d8ae3SPaolo Bonzini return sp; 1720c50d8ae3SPaolo Bonzini } 1721c50d8ae3SPaolo Bonzini 1722c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1723c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1724c50d8ae3SPaolo Bonzini { 1725c50d8ae3SPaolo Bonzini u64 *sptep; 1726c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1727c50d8ae3SPaolo Bonzini 1728c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1729c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1730c50d8ae3SPaolo Bonzini } 1731c50d8ae3SPaolo Bonzini } 1732c50d8ae3SPaolo Bonzini 1733c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1734c50d8ae3SPaolo Bonzini { 1735c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1736c50d8ae3SPaolo Bonzini unsigned int index; 1737c50d8ae3SPaolo Bonzini 173857354682SSean Christopherson sp = sptep_to_sp(spte); 1739c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1740c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1741c50d8ae3SPaolo Bonzini return; 1742c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1743c50d8ae3SPaolo Bonzini return; 1744c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1745c50d8ae3SPaolo Bonzini } 1746c50d8ae3SPaolo Bonzini 1747c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1748c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1749c50d8ae3SPaolo Bonzini { 1750c50d8ae3SPaolo Bonzini return 0; 1751c50d8ae3SPaolo Bonzini } 1752c50d8ae3SPaolo Bonzini 1753c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1754c50d8ae3SPaolo Bonzini 1755c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1756c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1757c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1758c50d8ae3SPaolo Bonzini unsigned int idx; 1759c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1760c50d8ae3SPaolo Bonzini unsigned int nr; 1761c50d8ae3SPaolo Bonzini }; 1762c50d8ae3SPaolo Bonzini 1763c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1764c50d8ae3SPaolo Bonzini int idx) 1765c50d8ae3SPaolo Bonzini { 1766c50d8ae3SPaolo Bonzini int i; 1767c50d8ae3SPaolo Bonzini 1768c50d8ae3SPaolo Bonzini if (sp->unsync) 1769c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1770c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1771c50d8ae3SPaolo Bonzini return 0; 1772c50d8ae3SPaolo Bonzini 1773c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1774c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1775c50d8ae3SPaolo Bonzini pvec->nr++; 1776c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1777c50d8ae3SPaolo Bonzini } 1778c50d8ae3SPaolo Bonzini 1779c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1780c50d8ae3SPaolo Bonzini { 1781c50d8ae3SPaolo Bonzini --sp->unsync_children; 1782c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1783c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1784c50d8ae3SPaolo Bonzini } 1785c50d8ae3SPaolo Bonzini 1786c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1787c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1788c50d8ae3SPaolo Bonzini { 1789c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1790c50d8ae3SPaolo Bonzini 1791c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1792c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1793c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1794c50d8ae3SPaolo Bonzini 1795c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1796c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1797c50d8ae3SPaolo Bonzini continue; 1798c50d8ae3SPaolo Bonzini } 1799c50d8ae3SPaolo Bonzini 1800e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1801c50d8ae3SPaolo Bonzini 1802c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1803c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1804c50d8ae3SPaolo Bonzini return -ENOSPC; 1805c50d8ae3SPaolo Bonzini 1806c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1807c50d8ae3SPaolo Bonzini if (!ret) { 1808c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1809c50d8ae3SPaolo Bonzini continue; 1810c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1811c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1812c50d8ae3SPaolo Bonzini } else 1813c50d8ae3SPaolo Bonzini return ret; 1814c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1815c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1816c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1817c50d8ae3SPaolo Bonzini return -ENOSPC; 1818c50d8ae3SPaolo Bonzini } else 1819c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1820c50d8ae3SPaolo Bonzini } 1821c50d8ae3SPaolo Bonzini 1822c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1823c50d8ae3SPaolo Bonzini } 1824c50d8ae3SPaolo Bonzini 1825c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1826c50d8ae3SPaolo Bonzini 1827c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1828c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1829c50d8ae3SPaolo Bonzini { 1830c50d8ae3SPaolo Bonzini pvec->nr = 0; 1831c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1832c50d8ae3SPaolo Bonzini return 0; 1833c50d8ae3SPaolo Bonzini 1834c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1835c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1836c50d8ae3SPaolo Bonzini } 1837c50d8ae3SPaolo Bonzini 1838c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1839c50d8ae3SPaolo Bonzini { 1840c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1841c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1842c50d8ae3SPaolo Bonzini sp->unsync = 0; 1843c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1844c50d8ae3SPaolo Bonzini } 1845c50d8ae3SPaolo Bonzini 1846c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1847c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1848c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1849c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1850c50d8ae3SPaolo Bonzini 1851ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1852ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1853c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1854c50d8ae3SPaolo Bonzini } else 1855c50d8ae3SPaolo Bonzini 1856c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1857ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1858ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1859c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1860c50d8ae3SPaolo Bonzini 1861479a1efcSSean Christopherson static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1862c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1863c50d8ae3SPaolo Bonzini { 18642640b086SSean Christopherson if (vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 1865c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1866c50d8ae3SPaolo Bonzini return false; 1867c50d8ae3SPaolo Bonzini } 1868c50d8ae3SPaolo Bonzini 1869c50d8ae3SPaolo Bonzini return true; 1870c50d8ae3SPaolo Bonzini } 1871c50d8ae3SPaolo Bonzini 1872c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1873c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1874c50d8ae3SPaolo Bonzini bool remote_flush) 1875c50d8ae3SPaolo Bonzini { 1876c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1877c50d8ae3SPaolo Bonzini return false; 1878c50d8ae3SPaolo Bonzini 1879c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1880c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1881c50d8ae3SPaolo Bonzini else 1882c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1883c50d8ae3SPaolo Bonzini return true; 1884c50d8ae3SPaolo Bonzini } 1885c50d8ae3SPaolo Bonzini 1886c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 1887c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1888c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 1889c50d8ae3SPaolo Bonzini { 1890c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 1891c50d8ae3SPaolo Bonzini return; 1892c50d8ae3SPaolo Bonzini 1893c50d8ae3SPaolo Bonzini if (local_flush) 18948c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 1895c50d8ae3SPaolo Bonzini } 1896c50d8ae3SPaolo Bonzini 1897c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1898c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1899c50d8ae3SPaolo Bonzini #else 1900c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1901c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1902c50d8ae3SPaolo Bonzini #endif 1903c50d8ae3SPaolo Bonzini 1904c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1905c50d8ae3SPaolo Bonzini { 1906c50d8ae3SPaolo Bonzini return sp->role.invalid || 1907c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1908c50d8ae3SPaolo Bonzini } 1909c50d8ae3SPaolo Bonzini 1910c50d8ae3SPaolo Bonzini struct mmu_page_path { 1911c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1912c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1913c50d8ae3SPaolo Bonzini }; 1914c50d8ae3SPaolo Bonzini 1915c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1916c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1917c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1918c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1919c50d8ae3SPaolo Bonzini 1920c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1921c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1922c50d8ae3SPaolo Bonzini int i) 1923c50d8ae3SPaolo Bonzini { 1924c50d8ae3SPaolo Bonzini int n; 1925c50d8ae3SPaolo Bonzini 1926c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1927c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1928c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1929c50d8ae3SPaolo Bonzini int level = sp->role.level; 1930c50d8ae3SPaolo Bonzini 1931c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 19323bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1933c50d8ae3SPaolo Bonzini break; 1934c50d8ae3SPaolo Bonzini 1935c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1936c50d8ae3SPaolo Bonzini } 1937c50d8ae3SPaolo Bonzini 1938c50d8ae3SPaolo Bonzini return n; 1939c50d8ae3SPaolo Bonzini } 1940c50d8ae3SPaolo Bonzini 1941c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1942c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1943c50d8ae3SPaolo Bonzini { 1944c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1945c50d8ae3SPaolo Bonzini int level; 1946c50d8ae3SPaolo Bonzini 1947c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1948c50d8ae3SPaolo Bonzini return 0; 1949c50d8ae3SPaolo Bonzini 1950c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1951c50d8ae3SPaolo Bonzini 1952c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1953c50d8ae3SPaolo Bonzini level = sp->role.level; 19543bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1955c50d8ae3SPaolo Bonzini 1956c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1957c50d8ae3SPaolo Bonzini 1958c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1959c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1960c50d8ae3SPaolo Bonzini */ 1961c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1962c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1963c50d8ae3SPaolo Bonzini } 1964c50d8ae3SPaolo Bonzini 1965c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1966c50d8ae3SPaolo Bonzini { 1967c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1968c50d8ae3SPaolo Bonzini unsigned int level = 0; 1969c50d8ae3SPaolo Bonzini 1970c50d8ae3SPaolo Bonzini do { 1971c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 1972c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 1973c50d8ae3SPaolo Bonzini if (!sp) 1974c50d8ae3SPaolo Bonzini return; 1975c50d8ae3SPaolo Bonzini 1976c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 1977c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 1978c50d8ae3SPaolo Bonzini level++; 1979c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 1980c50d8ae3SPaolo Bonzini } 1981c50d8ae3SPaolo Bonzini 1982c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 1983c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 1984c50d8ae3SPaolo Bonzini { 1985c50d8ae3SPaolo Bonzini int i; 1986c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1987c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 1988c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 1989c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1990c50d8ae3SPaolo Bonzini bool flush = false; 1991c50d8ae3SPaolo Bonzini 1992c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 1993c50d8ae3SPaolo Bonzini bool protected = false; 1994c50d8ae3SPaolo Bonzini 1995c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 1996c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 1997c50d8ae3SPaolo Bonzini 1998c50d8ae3SPaolo Bonzini if (protected) { 1999c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 2000c50d8ae3SPaolo Bonzini flush = false; 2001c50d8ae3SPaolo Bonzini } 2002c50d8ae3SPaolo Bonzini 2003c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2004479a1efcSSean Christopherson kvm_unlink_unsync_page(vcpu->kvm, sp); 2005c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2006c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2007c50d8ae3SPaolo Bonzini } 2008531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 2009c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2010531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 2011c50d8ae3SPaolo Bonzini flush = false; 2012c50d8ae3SPaolo Bonzini } 2013c50d8ae3SPaolo Bonzini } 2014c50d8ae3SPaolo Bonzini 2015c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2016c50d8ae3SPaolo Bonzini } 2017c50d8ae3SPaolo Bonzini 2018c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2019c50d8ae3SPaolo Bonzini { 2020c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2021c50d8ae3SPaolo Bonzini } 2022c50d8ae3SPaolo Bonzini 2023c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2024c50d8ae3SPaolo Bonzini { 202557354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2026c50d8ae3SPaolo Bonzini } 2027c50d8ae3SPaolo Bonzini 2028c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2029c50d8ae3SPaolo Bonzini gfn_t gfn, 2030c50d8ae3SPaolo Bonzini gva_t gaddr, 2031c50d8ae3SPaolo Bonzini unsigned level, 2032c50d8ae3SPaolo Bonzini int direct, 20330a2b64c5SBen Gardon unsigned int access) 2034c50d8ae3SPaolo Bonzini { 2035fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2036c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2037ac101b7cSSean Christopherson struct hlist_head *sp_list; 2038c50d8ae3SPaolo Bonzini unsigned quadrant; 2039c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2040c50d8ae3SPaolo Bonzini int collisions = 0; 2041c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2042c50d8ae3SPaolo Bonzini 2043c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2044c50d8ae3SPaolo Bonzini role.level = level; 2045c50d8ae3SPaolo Bonzini role.direct = direct; 2046c50d8ae3SPaolo Bonzini if (role.direct) 2047c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2048c50d8ae3SPaolo Bonzini role.access = access; 2049fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2050c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2051c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2052c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2053c50d8ae3SPaolo Bonzini } 2054ac101b7cSSean Christopherson 2055ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2056ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2057c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2058c50d8ae3SPaolo Bonzini collisions++; 2059c50d8ae3SPaolo Bonzini continue; 2060c50d8ae3SPaolo Bonzini } 2061c50d8ae3SPaolo Bonzini 2062ddc16abbSSean Christopherson if (sp->role.word != role.word) { 2063ddc16abbSSean Christopherson /* 2064ddc16abbSSean Christopherson * If the guest is creating an upper-level page, zap 2065ddc16abbSSean Christopherson * unsync pages for the same gfn. While it's possible 2066ddc16abbSSean Christopherson * the guest is using recursive page tables, in all 2067ddc16abbSSean Christopherson * likelihood the guest has stopped using the unsync 2068ddc16abbSSean Christopherson * page and is installing a completely unrelated page. 2069ddc16abbSSean Christopherson * Unsync pages must not be left as is, because the new 2070ddc16abbSSean Christopherson * upper-level page will be write-protected. 2071ddc16abbSSean Christopherson */ 2072ddc16abbSSean Christopherson if (level > PG_LEVEL_4K && sp->unsync) 2073ddc16abbSSean Christopherson kvm_mmu_prepare_zap_page(vcpu->kvm, sp, 2074ddc16abbSSean Christopherson &invalid_list); 2075c50d8ae3SPaolo Bonzini continue; 2076ddc16abbSSean Christopherson } 2077c50d8ae3SPaolo Bonzini 2078fb58a9c3SSean Christopherson if (direct_mmu) 2079fb58a9c3SSean Christopherson goto trace_get_page; 2080fb58a9c3SSean Christopherson 2081c50d8ae3SPaolo Bonzini if (sp->unsync) { 208207dc4f35SSean Christopherson /* 2083479a1efcSSean Christopherson * The page is good, but is stale. kvm_sync_page does 208407dc4f35SSean Christopherson * get the latest guest state, but (unlike mmu_unsync_children) 208507dc4f35SSean Christopherson * it doesn't write-protect the page or mark it synchronized! 208607dc4f35SSean Christopherson * This way the validity of the mapping is ensured, but the 208707dc4f35SSean Christopherson * overhead of write protection is not incurred until the 208807dc4f35SSean Christopherson * guest invalidates the TLB mapping. This allows multiple 208907dc4f35SSean Christopherson * SPs for a single gfn to be unsync. 209007dc4f35SSean Christopherson * 209107dc4f35SSean Christopherson * If the sync fails, the page is zapped. If so, break 209207dc4f35SSean Christopherson * in order to rebuild it. 2093c50d8ae3SPaolo Bonzini */ 2094479a1efcSSean Christopherson if (!kvm_sync_page(vcpu, sp, &invalid_list)) 2095c50d8ae3SPaolo Bonzini break; 2096c50d8ae3SPaolo Bonzini 2097c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 20988c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2099c50d8ae3SPaolo Bonzini } 2100c50d8ae3SPaolo Bonzini 2101c50d8ae3SPaolo Bonzini if (sp->unsync_children) 2102f6f6195bSLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 2103c50d8ae3SPaolo Bonzini 2104c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2105fb58a9c3SSean Christopherson 2106fb58a9c3SSean Christopherson trace_get_page: 2107c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2108c50d8ae3SPaolo Bonzini goto out; 2109c50d8ae3SPaolo Bonzini } 2110c50d8ae3SPaolo Bonzini 2111c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2112c50d8ae3SPaolo Bonzini 2113c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2114c50d8ae3SPaolo Bonzini 2115c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2116c50d8ae3SPaolo Bonzini sp->role = role; 2117ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2118c50d8ae3SPaolo Bonzini if (!direct) { 2119c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 21203bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2121c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2122c50d8ae3SPaolo Bonzini } 2123c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2124c50d8ae3SPaolo Bonzini out: 2125ddc16abbSSean Christopherson kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 2126ddc16abbSSean Christopherson 2127c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2128c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2129c50d8ae3SPaolo Bonzini return sp; 2130c50d8ae3SPaolo Bonzini } 2131c50d8ae3SPaolo Bonzini 2132c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2133c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2134c50d8ae3SPaolo Bonzini u64 addr) 2135c50d8ae3SPaolo Bonzini { 2136c50d8ae3SPaolo Bonzini iterator->addr = addr; 2137c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2138c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2139c50d8ae3SPaolo Bonzini 2140c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2141c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2142c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2143c50d8ae3SPaolo Bonzini --iterator->level; 2144c50d8ae3SPaolo Bonzini 2145c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2146c50d8ae3SPaolo Bonzini /* 2147c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2148c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2149c50d8ae3SPaolo Bonzini */ 2150c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2151c50d8ae3SPaolo Bonzini 2152c50d8ae3SPaolo Bonzini iterator->shadow_addr 2153c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2154c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2155c50d8ae3SPaolo Bonzini --iterator->level; 2156c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2157c50d8ae3SPaolo Bonzini iterator->level = 0; 2158c50d8ae3SPaolo Bonzini } 2159c50d8ae3SPaolo Bonzini } 2160c50d8ae3SPaolo Bonzini 2161c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2162c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2163c50d8ae3SPaolo Bonzini { 2164c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2165c50d8ae3SPaolo Bonzini addr); 2166c50d8ae3SPaolo Bonzini } 2167c50d8ae3SPaolo Bonzini 2168c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2169c50d8ae3SPaolo Bonzini { 21703bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2171c50d8ae3SPaolo Bonzini return false; 2172c50d8ae3SPaolo Bonzini 2173c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2174c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2175c50d8ae3SPaolo Bonzini return true; 2176c50d8ae3SPaolo Bonzini } 2177c50d8ae3SPaolo Bonzini 2178c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2179c50d8ae3SPaolo Bonzini u64 spte) 2180c50d8ae3SPaolo Bonzini { 2181c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2182c50d8ae3SPaolo Bonzini iterator->level = 0; 2183c50d8ae3SPaolo Bonzini return; 2184c50d8ae3SPaolo Bonzini } 2185c50d8ae3SPaolo Bonzini 2186c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2187c50d8ae3SPaolo Bonzini --iterator->level; 2188c50d8ae3SPaolo Bonzini } 2189c50d8ae3SPaolo Bonzini 2190c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2191c50d8ae3SPaolo Bonzini { 2192c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2193c50d8ae3SPaolo Bonzini } 2194c50d8ae3SPaolo Bonzini 2195c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2196c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2197c50d8ae3SPaolo Bonzini { 2198c50d8ae3SPaolo Bonzini u64 spte; 2199c50d8ae3SPaolo Bonzini 2200c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2201c50d8ae3SPaolo Bonzini 2202cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2203c50d8ae3SPaolo Bonzini 2204c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2205c50d8ae3SPaolo Bonzini 2206c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2207c50d8ae3SPaolo Bonzini 2208c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2209c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2210c50d8ae3SPaolo Bonzini } 2211c50d8ae3SPaolo Bonzini 2212c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2213c50d8ae3SPaolo Bonzini unsigned direct_access) 2214c50d8ae3SPaolo Bonzini { 2215c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2216c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2217c50d8ae3SPaolo Bonzini 2218c50d8ae3SPaolo Bonzini /* 2219c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2220c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2221c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2222c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2223c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2224c50d8ae3SPaolo Bonzini */ 2225e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2226c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2227c50d8ae3SPaolo Bonzini return; 2228c50d8ae3SPaolo Bonzini 2229c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2230c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2231c50d8ae3SPaolo Bonzini } 2232c50d8ae3SPaolo Bonzini } 2233c50d8ae3SPaolo Bonzini 22342de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 22352de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 22362de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2237c50d8ae3SPaolo Bonzini { 2238c50d8ae3SPaolo Bonzini u64 pte; 2239c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2240c50d8ae3SPaolo Bonzini 2241c50d8ae3SPaolo Bonzini pte = *spte; 2242c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2243c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2244c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2245c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2246c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2247c50d8ae3SPaolo Bonzini } else { 2248e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2249c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 22502de4085cSBen Gardon 22512de4085cSBen Gardon /* 22522de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 22532de4085cSBen Gardon * unlikely to be used again in the near future. This 22542de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22552de4085cSBen Gardon */ 22562de4085cSBen Gardon if (tdp_enabled && invalid_list && 22572de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22582de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22592de4085cSBen Gardon invalid_list); 2260c50d8ae3SPaolo Bonzini } 2261ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2262c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2263ace569e0SSean Christopherson } 22642de4085cSBen Gardon return 0; 2265c50d8ae3SPaolo Bonzini } 2266c50d8ae3SPaolo Bonzini 22672de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 22682de4085cSBen Gardon struct kvm_mmu_page *sp, 22692de4085cSBen Gardon struct list_head *invalid_list) 2270c50d8ae3SPaolo Bonzini { 22712de4085cSBen Gardon int zapped = 0; 2272c50d8ae3SPaolo Bonzini unsigned i; 2273c50d8ae3SPaolo Bonzini 2274c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 22752de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 22762de4085cSBen Gardon 22772de4085cSBen Gardon return zapped; 2278c50d8ae3SPaolo Bonzini } 2279c50d8ae3SPaolo Bonzini 2280c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2281c50d8ae3SPaolo Bonzini { 2282c50d8ae3SPaolo Bonzini u64 *sptep; 2283c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2284c50d8ae3SPaolo Bonzini 2285c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2286c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2287c50d8ae3SPaolo Bonzini } 2288c50d8ae3SPaolo Bonzini 2289c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2290c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2291c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2292c50d8ae3SPaolo Bonzini { 2293c50d8ae3SPaolo Bonzini int i, zapped = 0; 2294c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2295c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2296c50d8ae3SPaolo Bonzini 22973bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2298c50d8ae3SPaolo Bonzini return 0; 2299c50d8ae3SPaolo Bonzini 2300c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2301c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2302c50d8ae3SPaolo Bonzini 2303c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2304c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2305c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2306c50d8ae3SPaolo Bonzini zapped++; 2307c50d8ae3SPaolo Bonzini } 2308c50d8ae3SPaolo Bonzini } 2309c50d8ae3SPaolo Bonzini 2310c50d8ae3SPaolo Bonzini return zapped; 2311c50d8ae3SPaolo Bonzini } 2312c50d8ae3SPaolo Bonzini 2313c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2314c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2315c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2316c50d8ae3SPaolo Bonzini int *nr_zapped) 2317c50d8ae3SPaolo Bonzini { 2318c50d8ae3SPaolo Bonzini bool list_unstable; 2319c50d8ae3SPaolo Bonzini 2320c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2321c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2322c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 23232de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2324c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2325c50d8ae3SPaolo Bonzini 2326c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2327c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2328c50d8ae3SPaolo Bonzini 2329c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2330c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2331c50d8ae3SPaolo Bonzini 2332c50d8ae3SPaolo Bonzini if (sp->unsync) 2333c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2334c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2335c50d8ae3SPaolo Bonzini /* Count self */ 2336c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2337f95eec9bSSean Christopherson 2338f95eec9bSSean Christopherson /* 2339f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2340f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2341f95eec9bSSean Christopherson * !sp->root_count. 2342f95eec9bSSean Christopherson */ 2343f95eec9bSSean Christopherson if (sp->role.invalid) 2344f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2345f95eec9bSSean Christopherson else 2346c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2347c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2348c50d8ae3SPaolo Bonzini } else { 2349f95eec9bSSean Christopherson /* 2350f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2351f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2352f95eec9bSSean Christopherson */ 2353f95eec9bSSean Christopherson list_del(&sp->link); 2354c50d8ae3SPaolo Bonzini 2355c50d8ae3SPaolo Bonzini /* 2356c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2357c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2358c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2359c50d8ae3SPaolo Bonzini */ 2360c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2361c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2362c50d8ae3SPaolo Bonzini } 2363c50d8ae3SPaolo Bonzini 2364c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2365c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2366c50d8ae3SPaolo Bonzini 2367c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2368c50d8ae3SPaolo Bonzini return list_unstable; 2369c50d8ae3SPaolo Bonzini } 2370c50d8ae3SPaolo Bonzini 2371c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2372c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2373c50d8ae3SPaolo Bonzini { 2374c50d8ae3SPaolo Bonzini int nr_zapped; 2375c50d8ae3SPaolo Bonzini 2376c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2377c50d8ae3SPaolo Bonzini return nr_zapped; 2378c50d8ae3SPaolo Bonzini } 2379c50d8ae3SPaolo Bonzini 2380c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2381c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2382c50d8ae3SPaolo Bonzini { 2383c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2384c50d8ae3SPaolo Bonzini 2385c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2386c50d8ae3SPaolo Bonzini return; 2387c50d8ae3SPaolo Bonzini 2388c50d8ae3SPaolo Bonzini /* 2389c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2390c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2391c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2392c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2393c50d8ae3SPaolo Bonzini * 2394c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2395c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2396c50d8ae3SPaolo Bonzini */ 2397c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2398c50d8ae3SPaolo Bonzini 2399c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2400c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2401c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2402c50d8ae3SPaolo Bonzini } 2403c50d8ae3SPaolo Bonzini } 2404c50d8ae3SPaolo Bonzini 24056b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 24066b82ef2cSSean Christopherson unsigned long nr_to_zap) 2407c50d8ae3SPaolo Bonzini { 24086b82ef2cSSean Christopherson unsigned long total_zapped = 0; 24096b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2410ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 24116b82ef2cSSean Christopherson bool unstable; 24126b82ef2cSSean Christopherson int nr_zapped; 2413c50d8ae3SPaolo Bonzini 2414c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2415ba7888ddSSean Christopherson return 0; 2416c50d8ae3SPaolo Bonzini 24176b82ef2cSSean Christopherson restart: 24188fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 24196b82ef2cSSean Christopherson /* 24206b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 24216b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 24226b82ef2cSSean Christopherson */ 24236b82ef2cSSean Christopherson if (sp->root_count) 24246b82ef2cSSean Christopherson continue; 24256b82ef2cSSean Christopherson 24266b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 24276b82ef2cSSean Christopherson &nr_zapped); 24286b82ef2cSSean Christopherson total_zapped += nr_zapped; 24296b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2430ba7888ddSSean Christopherson break; 2431ba7888ddSSean Christopherson 24326b82ef2cSSean Christopherson if (unstable) 24336b82ef2cSSean Christopherson goto restart; 2434ba7888ddSSean Christopherson } 24356b82ef2cSSean Christopherson 24366b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 24376b82ef2cSSean Christopherson 24386b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 24396b82ef2cSSean Christopherson return total_zapped; 24406b82ef2cSSean Christopherson } 24416b82ef2cSSean Christopherson 2442afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2443afe8d7e6SSean Christopherson { 2444afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2445afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2446afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2447afe8d7e6SSean Christopherson 2448afe8d7e6SSean Christopherson return 0; 2449c50d8ae3SPaolo Bonzini } 2450c50d8ae3SPaolo Bonzini 2451ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2452ba7888ddSSean Christopherson { 24536b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2454ba7888ddSSean Christopherson 24556b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2456ba7888ddSSean Christopherson return 0; 2457ba7888ddSSean Christopherson 24586b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2459ba7888ddSSean Christopherson 24606e6ec584SSean Christopherson /* 24616e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 24626e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 24636e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 24646e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 2465c4342633SIngo Molnar * being too aggressive may unnecessarily kill the guest, and getting an 24666e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 24676e6ec584SSean Christopherson * page fault paths. 24686e6ec584SSean Christopherson */ 2469ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2470ba7888ddSSean Christopherson return -ENOSPC; 2471ba7888ddSSean Christopherson return 0; 2472ba7888ddSSean Christopherson } 2473ba7888ddSSean Christopherson 2474c50d8ae3SPaolo Bonzini /* 2475c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2476c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2477c50d8ae3SPaolo Bonzini */ 2478c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2479c50d8ae3SPaolo Bonzini { 2480531810caSBen Gardon write_lock(&kvm->mmu_lock); 2481c50d8ae3SPaolo Bonzini 2482c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 24836b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 24846b82ef2cSSean Christopherson goal_nr_mmu_pages); 2485c50d8ae3SPaolo Bonzini 2486c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2487c50d8ae3SPaolo Bonzini } 2488c50d8ae3SPaolo Bonzini 2489c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2490c50d8ae3SPaolo Bonzini 2491531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2492c50d8ae3SPaolo Bonzini } 2493c50d8ae3SPaolo Bonzini 2494c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2495c50d8ae3SPaolo Bonzini { 2496c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2497c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2498c50d8ae3SPaolo Bonzini int r; 2499c50d8ae3SPaolo Bonzini 2500c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2501c50d8ae3SPaolo Bonzini r = 0; 2502531810caSBen Gardon write_lock(&kvm->mmu_lock); 2503c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2504c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2505c50d8ae3SPaolo Bonzini sp->role.word); 2506c50d8ae3SPaolo Bonzini r = 1; 2507c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2508c50d8ae3SPaolo Bonzini } 2509c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2510531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2511c50d8ae3SPaolo Bonzini 2512c50d8ae3SPaolo Bonzini return r; 2513c50d8ae3SPaolo Bonzini } 251496ad91aeSSean Christopherson 251596ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 251696ad91aeSSean Christopherson { 251796ad91aeSSean Christopherson gpa_t gpa; 251896ad91aeSSean Christopherson int r; 251996ad91aeSSean Christopherson 252096ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 252196ad91aeSSean Christopherson return 0; 252296ad91aeSSean Christopherson 252396ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 252496ad91aeSSean Christopherson 252596ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 252696ad91aeSSean Christopherson 252796ad91aeSSean Christopherson return r; 252896ad91aeSSean Christopherson } 2529c50d8ae3SPaolo Bonzini 2530c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2531c50d8ae3SPaolo Bonzini { 2532c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2533c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2534c50d8ae3SPaolo Bonzini sp->unsync = 1; 2535c50d8ae3SPaolo Bonzini 2536c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2537c50d8ae3SPaolo Bonzini } 2538c50d8ae3SPaolo Bonzini 25390337f585SSean Christopherson /* 25400337f585SSean Christopherson * Attempt to unsync any shadow pages that can be reached by the specified gfn, 25410337f585SSean Christopherson * KVM is creating a writable mapping for said gfn. Returns 0 if all pages 25420337f585SSean Christopherson * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must 25430337f585SSean Christopherson * be write-protected. 25440337f585SSean Christopherson */ 25450337f585SSean Christopherson int mmu_try_to_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, bool can_unsync) 2546c50d8ae3SPaolo Bonzini { 2547c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2548c50d8ae3SPaolo Bonzini 25490337f585SSean Christopherson /* 25500337f585SSean Christopherson * Force write-protection if the page is being tracked. Note, the page 25510337f585SSean Christopherson * track machinery is used to write-protect upper-level shadow pages, 25520337f585SSean Christopherson * i.e. this guards the role.level == 4K assertion below! 25530337f585SSean Christopherson */ 2554c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 25550337f585SSean Christopherson return -EPERM; 2556c50d8ae3SPaolo Bonzini 25570337f585SSean Christopherson /* 25580337f585SSean Christopherson * The page is not write-tracked, mark existing shadow pages unsync 25590337f585SSean Christopherson * unless KVM is synchronizing an unsync SP (can_unsync = false). In 25600337f585SSean Christopherson * that case, KVM must complete emulation of the guest TLB flush before 25610337f585SSean Christopherson * allowing shadow pages to become unsync (writable by the guest). 25620337f585SSean Christopherson */ 2563c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2564c50d8ae3SPaolo Bonzini if (!can_unsync) 25650337f585SSean Christopherson return -EPERM; 2566c50d8ae3SPaolo Bonzini 2567c50d8ae3SPaolo Bonzini if (sp->unsync) 2568c50d8ae3SPaolo Bonzini continue; 2569c50d8ae3SPaolo Bonzini 25703bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2571c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2572c50d8ae3SPaolo Bonzini } 2573c50d8ae3SPaolo Bonzini 2574c50d8ae3SPaolo Bonzini /* 2575c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2576c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2577c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2578c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2579c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2580c50d8ae3SPaolo Bonzini * following could happen: 2581c50d8ae3SPaolo Bonzini * 2582c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2583c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2584c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2585c50d8ae3SPaolo Bonzini * to be writable 2586c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2587c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2588c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2589c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2590c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2591c50d8ae3SPaolo Bonzini * fault. 2592c50d8ae3SPaolo Bonzini * 2593c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2594c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2595c50d8ae3SPaolo Bonzini * 25960337f585SSean Christopherson * 2.3 Walking of unsync pages sees sp->unsync is 25970337f585SSean Christopherson * false and skips the page. 2598c50d8ae3SPaolo Bonzini * 2599c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2600c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2601c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2602c50d8ae3SPaolo Bonzini * gets used. 2603c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2604c50d8ae3SPaolo Bonzini * as unsync 2605c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2606c50d8ae3SPaolo Bonzini * 2607c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2608c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2609c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2610c50d8ae3SPaolo Bonzini */ 2611c50d8ae3SPaolo Bonzini smp_wmb(); 2612c50d8ae3SPaolo Bonzini 26130337f585SSean Christopherson return 0; 2614c50d8ae3SPaolo Bonzini } 2615c50d8ae3SPaolo Bonzini 2616799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2617799a4190SBen Gardon unsigned int pte_access, int level, 2618799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 2619799a4190SBen Gardon bool can_unsync, bool host_writable) 2620799a4190SBen Gardon { 2621799a4190SBen Gardon u64 spte; 2622799a4190SBen Gardon struct kvm_mmu_page *sp; 2623799a4190SBen Gardon int ret; 2624799a4190SBen Gardon 2625799a4190SBen Gardon sp = sptep_to_sp(sptep); 2626799a4190SBen Gardon 2627799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 2628799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 2629799a4190SBen Gardon 2630799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 2631799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 2632799a4190SBen Gardon 263312703759SSean Christopherson if (*sptep == spte) 263412703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 263512703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 2636c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 2637c50d8ae3SPaolo Bonzini return ret; 2638c50d8ae3SPaolo Bonzini } 2639c50d8ae3SPaolo Bonzini 26400a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2641e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 26420a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 26430a2b64c5SBen Gardon bool host_writable) 2644c50d8ae3SPaolo Bonzini { 2645c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2646c50d8ae3SPaolo Bonzini int rmap_count; 2647c50d8ae3SPaolo Bonzini int set_spte_ret; 2648c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2649c50d8ae3SPaolo Bonzini bool flush = false; 2650c50d8ae3SPaolo Bonzini 2651c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2652c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2653c50d8ae3SPaolo Bonzini 2654a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2655a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2656a54aa15cSSean Christopherson return RET_PF_EMULATE; 2657a54aa15cSSean Christopherson } 2658a54aa15cSSean Christopherson 2659c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2660c50d8ae3SPaolo Bonzini /* 2661c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2662c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2663c50d8ae3SPaolo Bonzini */ 26643bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2665c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2666c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2667c50d8ae3SPaolo Bonzini 2668e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2669c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2670c50d8ae3SPaolo Bonzini flush = true; 2671c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2672c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2673c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2674c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2675c50d8ae3SPaolo Bonzini flush = true; 2676c50d8ae3SPaolo Bonzini } else 2677c50d8ae3SPaolo Bonzini was_rmapped = 1; 2678c50d8ae3SPaolo Bonzini } 2679c50d8ae3SPaolo Bonzini 2680c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 2681c50d8ae3SPaolo Bonzini speculative, true, host_writable); 2682c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 2683c50d8ae3SPaolo Bonzini if (write_fault) 2684c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 26858c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2686c50d8ae3SPaolo Bonzini } 2687c50d8ae3SPaolo Bonzini 2688c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 2689c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2690c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2691c50d8ae3SPaolo Bonzini 269212703759SSean Christopherson /* 269312703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 269412703759SSean Christopherson * are identical, and emulation is not required. 269512703759SSean Christopherson */ 269612703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 269712703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 269812703759SSean Christopherson return RET_PF_SPURIOUS; 269912703759SSean Christopherson } 270012703759SSean Christopherson 2701c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2702c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2703c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 2704c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 2705c50d8ae3SPaolo Bonzini 2706c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2707c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2708c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 2709ec1cf69cSPeter Xu if (rmap_count > vcpu->kvm->stat.max_mmu_rmap_size) 2710ec1cf69cSPeter Xu vcpu->kvm->stat.max_mmu_rmap_size = rmap_count; 2711c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 2712c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 2713c50d8ae3SPaolo Bonzini } 2714c50d8ae3SPaolo Bonzini } 2715c50d8ae3SPaolo Bonzini 2716c50d8ae3SPaolo Bonzini return ret; 2717c50d8ae3SPaolo Bonzini } 2718c50d8ae3SPaolo Bonzini 2719c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 2720c50d8ae3SPaolo Bonzini bool no_dirty_log) 2721c50d8ae3SPaolo Bonzini { 2722c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 2723c50d8ae3SPaolo Bonzini 2724c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 2725c50d8ae3SPaolo Bonzini if (!slot) 2726c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 2727c50d8ae3SPaolo Bonzini 2728c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 2729c50d8ae3SPaolo Bonzini } 2730c50d8ae3SPaolo Bonzini 2731c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2732c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2733c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2734c50d8ae3SPaolo Bonzini { 2735c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2736c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 27370a2b64c5SBen Gardon unsigned int access = sp->role.access; 2738c50d8ae3SPaolo Bonzini int i, ret; 2739c50d8ae3SPaolo Bonzini gfn_t gfn; 2740c50d8ae3SPaolo Bonzini 2741c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2742c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2743c50d8ae3SPaolo Bonzini if (!slot) 2744c50d8ae3SPaolo Bonzini return -1; 2745c50d8ae3SPaolo Bonzini 2746c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2747c50d8ae3SPaolo Bonzini if (ret <= 0) 2748c50d8ae3SPaolo Bonzini return -1; 2749c50d8ae3SPaolo Bonzini 2750c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 2751e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 2752c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 2753c50d8ae3SPaolo Bonzini put_page(pages[i]); 2754c50d8ae3SPaolo Bonzini } 2755c50d8ae3SPaolo Bonzini 2756c50d8ae3SPaolo Bonzini return 0; 2757c50d8ae3SPaolo Bonzini } 2758c50d8ae3SPaolo Bonzini 2759c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2760c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2761c50d8ae3SPaolo Bonzini { 2762c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2763c50d8ae3SPaolo Bonzini int i; 2764c50d8ae3SPaolo Bonzini 2765c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2766c50d8ae3SPaolo Bonzini 2767c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2768c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2769c50d8ae3SPaolo Bonzini 2770c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2771c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2772c50d8ae3SPaolo Bonzini if (!start) 2773c50d8ae3SPaolo Bonzini continue; 2774c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2775c50d8ae3SPaolo Bonzini break; 2776c50d8ae3SPaolo Bonzini start = NULL; 2777c50d8ae3SPaolo Bonzini } else if (!start) 2778c50d8ae3SPaolo Bonzini start = spte; 2779c50d8ae3SPaolo Bonzini } 2780c50d8ae3SPaolo Bonzini } 2781c50d8ae3SPaolo Bonzini 2782c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2783c50d8ae3SPaolo Bonzini { 2784c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2785c50d8ae3SPaolo Bonzini 278657354682SSean Christopherson sp = sptep_to_sp(sptep); 2787c50d8ae3SPaolo Bonzini 2788c50d8ae3SPaolo Bonzini /* 2789c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2790c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2791c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2792c50d8ae3SPaolo Bonzini */ 2793c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2794c50d8ae3SPaolo Bonzini return; 2795c50d8ae3SPaolo Bonzini 27963bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2797c50d8ae3SPaolo Bonzini return; 2798c50d8ae3SPaolo Bonzini 27994a42d848SDavid Stevens /* 28004a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 28014a42d848SDavid Stevens * accidentally prefetching those addresses. 28024a42d848SDavid Stevens */ 28034a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 28044a42d848SDavid Stevens return; 28054a42d848SDavid Stevens 2806c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2807c50d8ae3SPaolo Bonzini } 2808c50d8ae3SPaolo Bonzini 28091b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 28108ca6f063SBen Gardon const struct kvm_memory_slot *slot) 2811db543216SSean Christopherson { 2812db543216SSean Christopherson unsigned long hva; 2813db543216SSean Christopherson pte_t *pte; 2814db543216SSean Christopherson int level; 2815db543216SSean Christopherson 2816e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 28173bae0459SSean Christopherson return PG_LEVEL_4K; 2818db543216SSean Christopherson 2819293e306eSSean Christopherson /* 2820293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2821293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2822293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2823293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2824293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2825293e306eSSean Christopherson * read-only memslot. 2826293e306eSSean Christopherson */ 2827db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2828db543216SSean Christopherson 28291b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2830db543216SSean Christopherson if (unlikely(!pte)) 28313bae0459SSean Christopherson return PG_LEVEL_4K; 2832db543216SSean Christopherson 2833db543216SSean Christopherson return level; 2834db543216SSean Christopherson } 2835db543216SSean Christopherson 28368ca6f063SBen Gardon int kvm_mmu_max_mapping_level(struct kvm *kvm, 28378ca6f063SBen Gardon const struct kvm_memory_slot *slot, gfn_t gfn, 28388ca6f063SBen Gardon kvm_pfn_t pfn, int max_level) 28391b6d9d9eSSean Christopherson { 28401b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 28411b6d9d9eSSean Christopherson 28421b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 28431b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 28441b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 28451b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 28461b6d9d9eSSean Christopherson break; 28471b6d9d9eSSean Christopherson } 28481b6d9d9eSSean Christopherson 28491b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 28501b6d9d9eSSean Christopherson return PG_LEVEL_4K; 28511b6d9d9eSSean Christopherson 28521b6d9d9eSSean Christopherson return host_pfn_mapping_level(kvm, gfn, pfn, slot); 28531b6d9d9eSSean Christopherson } 28541b6d9d9eSSean Christopherson 2855bb18842eSBen Gardon int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 28563cf06612SSean Christopherson int max_level, kvm_pfn_t *pfnp, 28573cf06612SSean Christopherson bool huge_page_disallowed, int *req_level) 28580885904dSSean Christopherson { 2859293e306eSSean Christopherson struct kvm_memory_slot *slot; 28600885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 286117eff019SSean Christopherson kvm_pfn_t mask; 286283f06fa7SSean Christopherson int level; 28630885904dSSean Christopherson 28643cf06612SSean Christopherson *req_level = PG_LEVEL_4K; 28653cf06612SSean Christopherson 28663bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 28673bae0459SSean Christopherson return PG_LEVEL_4K; 286817eff019SSean Christopherson 2869e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 28703bae0459SSean Christopherson return PG_LEVEL_4K; 287117eff019SSean Christopherson 2872293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 2873293e306eSSean Christopherson if (!slot) 28743bae0459SSean Christopherson return PG_LEVEL_4K; 2875293e306eSSean Christopherson 28761b6d9d9eSSean Christopherson level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, gfn, pfn, max_level); 28773bae0459SSean Christopherson if (level == PG_LEVEL_4K) 287883f06fa7SSean Christopherson return level; 287917eff019SSean Christopherson 28803cf06612SSean Christopherson *req_level = level = min(level, max_level); 28813cf06612SSean Christopherson 28823cf06612SSean Christopherson /* 28833cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28843cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28853cf06612SSean Christopherson */ 28863cf06612SSean Christopherson if (huge_page_disallowed) 28873cf06612SSean Christopherson return PG_LEVEL_4K; 28884cd071d1SSean Christopherson 28890885904dSSean Christopherson /* 28904cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 28914cd071d1SSean Christopherson * the pmd can't be split from under us. 28920885904dSSean Christopherson */ 28930885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 28940885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 28954cd071d1SSean Christopherson *pfnp = pfn & ~mask; 289683f06fa7SSean Christopherson 289783f06fa7SSean Christopherson return level; 28980885904dSSean Christopherson } 28990885904dSSean Christopherson 2900bb18842eSBen Gardon void disallowed_hugepage_adjust(u64 spte, gfn_t gfn, int cur_level, 2901bb18842eSBen Gardon kvm_pfn_t *pfnp, int *goal_levelp) 2902c50d8ae3SPaolo Bonzini { 2903bb18842eSBen Gardon int level = *goal_levelp; 2904c50d8ae3SPaolo Bonzini 29057d945312SBen Gardon if (cur_level == level && level > PG_LEVEL_4K && 2906c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2907c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2908c50d8ae3SPaolo Bonzini /* 2909c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2910c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2911c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2912c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2913c50d8ae3SPaolo Bonzini * the address. 2914c50d8ae3SPaolo Bonzini */ 29157d945312SBen Gardon u64 page_mask = KVM_PAGES_PER_HPAGE(level) - 29167d945312SBen Gardon KVM_PAGES_PER_HPAGE(level - 1); 2917c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 2918bb18842eSBen Gardon (*goal_levelp)--; 2919c50d8ae3SPaolo Bonzini } 2920c50d8ae3SPaolo Bonzini } 2921c50d8ae3SPaolo Bonzini 29226c2fd34fSSean Christopherson static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 292383f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 29246c2fd34fSSean Christopherson bool prefault, bool is_tdp) 2925c50d8ae3SPaolo Bonzini { 29266c2fd34fSSean Christopherson bool nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(); 29276c2fd34fSSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 29286c2fd34fSSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 29296c2fd34fSSean Christopherson bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled; 2930c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2931c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 29323cf06612SSean Christopherson int level, req_level, ret; 2933c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 2934c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 2935c50d8ae3SPaolo Bonzini 29363cf06612SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn, 29373cf06612SSean Christopherson huge_page_disallowed, &req_level); 29384cd071d1SSean Christopherson 2939c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 2940c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 2941c50d8ae3SPaolo Bonzini /* 2942c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2943c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2944c50d8ae3SPaolo Bonzini */ 2945dcc70651SSean Christopherson if (nx_huge_page_workaround_enabled) 29467d945312SBen Gardon disallowed_hugepage_adjust(*it.sptep, gfn, it.level, 29477d945312SBen Gardon &pfn, &level); 2948c50d8ae3SPaolo Bonzini 2949c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 2950c50d8ae3SPaolo Bonzini if (it.level == level) 2951c50d8ae3SPaolo Bonzini break; 2952c50d8ae3SPaolo Bonzini 2953c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 295403fffc54SSean Christopherson if (is_shadow_present_pte(*it.sptep)) 295503fffc54SSean Christopherson continue; 295603fffc54SSean Christopherson 2957c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2958c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2959c50d8ae3SPaolo Bonzini 2960c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 29615bcaf3e1SSean Christopherson if (is_tdp && huge_page_disallowed && 29625bcaf3e1SSean Christopherson req_level >= it.level) 2963c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2964c50d8ae3SPaolo Bonzini } 2965c50d8ae3SPaolo Bonzini 2966c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 2967c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 2968c50d8ae3SPaolo Bonzini map_writable); 296912703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 297012703759SSean Christopherson return ret; 297112703759SSean Christopherson 2972c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2973c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2974c50d8ae3SPaolo Bonzini return ret; 2975c50d8ae3SPaolo Bonzini } 2976c50d8ae3SPaolo Bonzini 2977c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2978c50d8ae3SPaolo Bonzini { 2979c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2980c50d8ae3SPaolo Bonzini } 2981c50d8ae3SPaolo Bonzini 2982c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2983c50d8ae3SPaolo Bonzini { 2984c50d8ae3SPaolo Bonzini /* 2985c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2986c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2987c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2988c50d8ae3SPaolo Bonzini */ 2989c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2990c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 2991c50d8ae3SPaolo Bonzini 2992c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 2993c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 2994c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2995c50d8ae3SPaolo Bonzini } 2996c50d8ae3SPaolo Bonzini 2997c50d8ae3SPaolo Bonzini return -EFAULT; 2998c50d8ae3SPaolo Bonzini } 2999c50d8ae3SPaolo Bonzini 3000c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 30010a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 30020a2b64c5SBen Gardon int *ret_val) 3003c50d8ae3SPaolo Bonzini { 3004c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 3005c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 3006c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 3007c50d8ae3SPaolo Bonzini return true; 3008c50d8ae3SPaolo Bonzini } 3009c50d8ae3SPaolo Bonzini 301030ab5901SSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 3011c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 3012c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 301330ab5901SSean Christopherson /* 301430ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 301530ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 301630ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 301730ab5901SSean Christopherson */ 301830ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 301930ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 302030ab5901SSean Christopherson return true; 302130ab5901SSean Christopherson } 302230ab5901SSean Christopherson } 3023c50d8ae3SPaolo Bonzini 3024c50d8ae3SPaolo Bonzini return false; 3025c50d8ae3SPaolo Bonzini } 3026c50d8ae3SPaolo Bonzini 3027c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 3028c50d8ae3SPaolo Bonzini { 3029c50d8ae3SPaolo Bonzini /* 3030c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3031c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3032c50d8ae3SPaolo Bonzini */ 3033c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3034c50d8ae3SPaolo Bonzini return false; 3035c50d8ae3SPaolo Bonzini 3036c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 3037c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 3038c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 3039c50d8ae3SPaolo Bonzini return false; 3040c50d8ae3SPaolo Bonzini 3041c50d8ae3SPaolo Bonzini /* 3042c50d8ae3SPaolo Bonzini * #PF can be fast if: 3043c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3044c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3045c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3046c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3047c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3048c50d8ae3SPaolo Bonzini * 3049c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3050c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3051c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3052c50d8ae3SPaolo Bonzini * accesses to a present page. 3053c50d8ae3SPaolo Bonzini */ 3054c50d8ae3SPaolo Bonzini 3055c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 3056c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 3057c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 3058c50d8ae3SPaolo Bonzini } 3059c50d8ae3SPaolo Bonzini 3060c50d8ae3SPaolo Bonzini /* 3061c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3062c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3063c50d8ae3SPaolo Bonzini */ 3064c50d8ae3SPaolo Bonzini static bool 3065c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 3066c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3067c50d8ae3SPaolo Bonzini { 3068c50d8ae3SPaolo Bonzini gfn_t gfn; 3069c50d8ae3SPaolo Bonzini 3070c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3071c50d8ae3SPaolo Bonzini 3072c50d8ae3SPaolo Bonzini /* 3073c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3074c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3075c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3076c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3077c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3078c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3079c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3080c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3081c50d8ae3SPaolo Bonzini * 3082c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3083c50d8ae3SPaolo Bonzini */ 3084c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3085c50d8ae3SPaolo Bonzini return false; 3086c50d8ae3SPaolo Bonzini 3087c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3088c50d8ae3SPaolo Bonzini /* 3089c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3090c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3091c50d8ae3SPaolo Bonzini */ 3092c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3093c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3094c50d8ae3SPaolo Bonzini } 3095c50d8ae3SPaolo Bonzini 3096c50d8ae3SPaolo Bonzini return true; 3097c50d8ae3SPaolo Bonzini } 3098c50d8ae3SPaolo Bonzini 3099c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3100c50d8ae3SPaolo Bonzini { 3101c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3102c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3103c50d8ae3SPaolo Bonzini 3104c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3105c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3106c50d8ae3SPaolo Bonzini 3107c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3108c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3109c50d8ae3SPaolo Bonzini } 3110c50d8ae3SPaolo Bonzini 3111c50d8ae3SPaolo Bonzini /* 31126e8eb206SDavid Matlack * Returns the last level spte pointer of the shadow page walk for the given 31136e8eb206SDavid Matlack * gpa, and sets *spte to the spte value. This spte may be non-preset. If no 31146e8eb206SDavid Matlack * walk could be performed, returns NULL and *spte does not contain valid data. 31156e8eb206SDavid Matlack * 31166e8eb206SDavid Matlack * Contract: 31176e8eb206SDavid Matlack * - Must be called between walk_shadow_page_lockless_{begin,end}. 31186e8eb206SDavid Matlack * - The returned sptep must not be used after walk_shadow_page_lockless_end. 31196e8eb206SDavid Matlack */ 31206e8eb206SDavid Matlack static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte) 31216e8eb206SDavid Matlack { 31226e8eb206SDavid Matlack struct kvm_shadow_walk_iterator iterator; 31236e8eb206SDavid Matlack u64 old_spte; 31246e8eb206SDavid Matlack u64 *sptep = NULL; 31256e8eb206SDavid Matlack 31266e8eb206SDavid Matlack for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) { 31276e8eb206SDavid Matlack sptep = iterator.sptep; 31286e8eb206SDavid Matlack *spte = old_spte; 31296e8eb206SDavid Matlack 31306e8eb206SDavid Matlack if (!is_shadow_present_pte(old_spte)) 31316e8eb206SDavid Matlack break; 31326e8eb206SDavid Matlack } 31336e8eb206SDavid Matlack 31346e8eb206SDavid Matlack return sptep; 31356e8eb206SDavid Matlack } 31366e8eb206SDavid Matlack 31376e8eb206SDavid Matlack /* 3138c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3139c50d8ae3SPaolo Bonzini */ 314076cd325eSDavid Matlack static int fast_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code) 3141c50d8ae3SPaolo Bonzini { 3142c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3143c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3144c50d8ae3SPaolo Bonzini u64 spte = 0ull; 31456e8eb206SDavid Matlack u64 *sptep = NULL; 3146c50d8ae3SPaolo Bonzini uint retry_count = 0; 3147c50d8ae3SPaolo Bonzini 3148c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3149c4371c2aSSean Christopherson return ret; 3150c50d8ae3SPaolo Bonzini 3151c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3152c50d8ae3SPaolo Bonzini 3153c50d8ae3SPaolo Bonzini do { 3154c50d8ae3SPaolo Bonzini u64 new_spte; 3155c50d8ae3SPaolo Bonzini 31566e8eb206SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 31576e8eb206SDavid Matlack sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, gpa, &spte); 31586e8eb206SDavid Matlack else 31596e8eb206SDavid Matlack sptep = fast_pf_get_last_sptep(vcpu, gpa, &spte); 3160c50d8ae3SPaolo Bonzini 3161ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3162ec89e643SSean Christopherson break; 3163ec89e643SSean Christopherson 31646e8eb206SDavid Matlack sp = sptep_to_sp(sptep); 3165c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3166c50d8ae3SPaolo Bonzini break; 3167c50d8ae3SPaolo Bonzini 3168c50d8ae3SPaolo Bonzini /* 3169c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3170c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3171c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3172c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3173c50d8ae3SPaolo Bonzini * current CPU took the fault. 3174c50d8ae3SPaolo Bonzini * 3175c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3176c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3177c50d8ae3SPaolo Bonzini */ 3178c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3179c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3180c50d8ae3SPaolo Bonzini break; 3181c50d8ae3SPaolo Bonzini } 3182c50d8ae3SPaolo Bonzini 3183c50d8ae3SPaolo Bonzini new_spte = spte; 3184c50d8ae3SPaolo Bonzini 3185c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3186c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3187c50d8ae3SPaolo Bonzini 3188c50d8ae3SPaolo Bonzini /* 3189c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3190c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3191c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3192c50d8ae3SPaolo Bonzini */ 3193c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3194e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3195c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3196c50d8ae3SPaolo Bonzini 3197c50d8ae3SPaolo Bonzini /* 3198c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3199c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3200c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3201c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3202c50d8ae3SPaolo Bonzini * 3203c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3204c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3205c50d8ae3SPaolo Bonzini * 3206c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3207c50d8ae3SPaolo Bonzini */ 32083bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3209c50d8ae3SPaolo Bonzini break; 3210c50d8ae3SPaolo Bonzini } 3211c50d8ae3SPaolo Bonzini 3212c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3213c50d8ae3SPaolo Bonzini if (new_spte == spte || 3214c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3215c50d8ae3SPaolo Bonzini break; 3216c50d8ae3SPaolo Bonzini 3217c50d8ae3SPaolo Bonzini /* 3218c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3219c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 32203ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3221c50d8ae3SPaolo Bonzini */ 32226e8eb206SDavid Matlack if (fast_pf_fix_direct_spte(vcpu, sp, sptep, spte, new_spte)) { 3223c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3224c50d8ae3SPaolo Bonzini break; 3225c4371c2aSSean Christopherson } 3226c50d8ae3SPaolo Bonzini 3227c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3228c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3229c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3230c50d8ae3SPaolo Bonzini break; 3231c50d8ae3SPaolo Bonzini } 3232c50d8ae3SPaolo Bonzini 3233c50d8ae3SPaolo Bonzini } while (true); 3234c50d8ae3SPaolo Bonzini 32356e8eb206SDavid Matlack trace_fast_page_fault(vcpu, gpa, error_code, sptep, spte, ret); 3236c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3237c50d8ae3SPaolo Bonzini 3238c4371c2aSSean Christopherson return ret; 3239c50d8ae3SPaolo Bonzini } 3240c50d8ae3SPaolo Bonzini 3241c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3242c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3243c50d8ae3SPaolo Bonzini { 3244c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3245c50d8ae3SPaolo Bonzini 3246c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3247c50d8ae3SPaolo Bonzini return; 3248c50d8ae3SPaolo Bonzini 3249e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 325002c00b3aSBen Gardon 3251897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 32526103bc07SBen Gardon kvm_tdp_mmu_put_root(kvm, sp, false); 325376eb54e7SBen Gardon else if (!--sp->root_count && sp->role.invalid) 3254c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3255c50d8ae3SPaolo Bonzini 3256c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3257c50d8ae3SPaolo Bonzini } 3258c50d8ae3SPaolo Bonzini 3259c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3260c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3261c50d8ae3SPaolo Bonzini ulong roots_to_free) 3262c50d8ae3SPaolo Bonzini { 32634d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3264c50d8ae3SPaolo Bonzini int i; 3265c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3266c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3267c50d8ae3SPaolo Bonzini 3268c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3269c50d8ae3SPaolo Bonzini 3270c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3271c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3272c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3273c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3274c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3275c50d8ae3SPaolo Bonzini break; 3276c50d8ae3SPaolo Bonzini 3277c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3278c50d8ae3SPaolo Bonzini return; 3279c50d8ae3SPaolo Bonzini } 3280c50d8ae3SPaolo Bonzini 3281531810caSBen Gardon write_lock(&kvm->mmu_lock); 3282c50d8ae3SPaolo Bonzini 3283c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3284c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 32854d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3286c50d8ae3SPaolo Bonzini &invalid_list); 3287c50d8ae3SPaolo Bonzini 3288c50d8ae3SPaolo Bonzini if (free_active_root) { 3289c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3290c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 32914d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 329204d45551SSean Christopherson } else if (mmu->pae_root) { 3293c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3294c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3295c834e5e4SSean Christopherson continue; 3296c834e5e4SSean Christopherson 3297c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3298c50d8ae3SPaolo Bonzini &invalid_list); 3299c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3300c50d8ae3SPaolo Bonzini } 3301c50d8ae3SPaolo Bonzini } 330204d45551SSean Christopherson mmu->root_hpa = INVALID_PAGE; 3303be01e8e2SSean Christopherson mmu->root_pgd = 0; 3304c50d8ae3SPaolo Bonzini } 3305c50d8ae3SPaolo Bonzini 33064d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3307531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3308c50d8ae3SPaolo Bonzini } 3309c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3310c50d8ae3SPaolo Bonzini 331125b62c62SSean Christopherson void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 331225b62c62SSean Christopherson { 331325b62c62SSean Christopherson unsigned long roots_to_free = 0; 331425b62c62SSean Christopherson hpa_t root_hpa; 331525b62c62SSean Christopherson int i; 331625b62c62SSean Christopherson 331725b62c62SSean Christopherson /* 331825b62c62SSean Christopherson * This should not be called while L2 is active, L2 can't invalidate 331925b62c62SSean Christopherson * _only_ its own roots, e.g. INVVPID unconditionally exits. 332025b62c62SSean Christopherson */ 332125b62c62SSean Christopherson WARN_ON_ONCE(mmu->mmu_role.base.guest_mode); 332225b62c62SSean Christopherson 332325b62c62SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 332425b62c62SSean Christopherson root_hpa = mmu->prev_roots[i].hpa; 332525b62c62SSean Christopherson if (!VALID_PAGE(root_hpa)) 332625b62c62SSean Christopherson continue; 332725b62c62SSean Christopherson 332825b62c62SSean Christopherson if (!to_shadow_page(root_hpa) || 332925b62c62SSean Christopherson to_shadow_page(root_hpa)->role.guest_mode) 333025b62c62SSean Christopherson roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 333125b62c62SSean Christopherson } 333225b62c62SSean Christopherson 333325b62c62SSean Christopherson kvm_mmu_free_roots(vcpu, mmu, roots_to_free); 333425b62c62SSean Christopherson } 333525b62c62SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots); 333625b62c62SSean Christopherson 333725b62c62SSean Christopherson 3338c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3339c50d8ae3SPaolo Bonzini { 3340c50d8ae3SPaolo Bonzini int ret = 0; 3341c50d8ae3SPaolo Bonzini 3342995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3343c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3344c50d8ae3SPaolo Bonzini ret = 1; 3345c50d8ae3SPaolo Bonzini } 3346c50d8ae3SPaolo Bonzini 3347c50d8ae3SPaolo Bonzini return ret; 3348c50d8ae3SPaolo Bonzini } 3349c50d8ae3SPaolo Bonzini 33508123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 33518123f265SSean Christopherson u8 level, bool direct) 3352c50d8ae3SPaolo Bonzini { 3353c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 33548123f265SSean Christopherson 33558123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 33568123f265SSean Christopherson ++sp->root_count; 33578123f265SSean Christopherson 33588123f265SSean Christopherson return __pa(sp->spt); 33598123f265SSean Christopherson } 33608123f265SSean Christopherson 33618123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 33628123f265SSean Christopherson { 3363b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3364b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 33658123f265SSean Christopherson hpa_t root; 3366c50d8ae3SPaolo Bonzini unsigned i; 33674a38162eSPaolo Bonzini int r; 33684a38162eSPaolo Bonzini 33694a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 33704a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 33714a38162eSPaolo Bonzini if (r < 0) 33724a38162eSPaolo Bonzini goto out_unlock; 3373c50d8ae3SPaolo Bonzini 3374897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 337502c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3376b37233c9SSean Christopherson mmu->root_hpa = root; 337702c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 33786e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3379b37233c9SSean Christopherson mmu->root_hpa = root; 33808123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 33814a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 33824a38162eSPaolo Bonzini r = -EIO; 33834a38162eSPaolo Bonzini goto out_unlock; 33844a38162eSPaolo Bonzini } 338573ad1606SSean Christopherson 3386c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3387c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3388c50d8ae3SPaolo Bonzini 33898123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 33908123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 339117e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 339217e368d9SSean Christopherson shadow_me_mask; 3393c50d8ae3SPaolo Bonzini } 3394b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 339573ad1606SSean Christopherson } else { 339673ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 33974a38162eSPaolo Bonzini r = -EIO; 33984a38162eSPaolo Bonzini goto out_unlock; 339973ad1606SSean Christopherson } 34003651c7fcSSean Christopherson 3401be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3402b37233c9SSean Christopherson mmu->root_pgd = 0; 34034a38162eSPaolo Bonzini out_unlock: 34044a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 34054a38162eSPaolo Bonzini return r; 3406c50d8ae3SPaolo Bonzini } 3407c50d8ae3SPaolo Bonzini 3408c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3409c50d8ae3SPaolo Bonzini { 3410b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 34116e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3412be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 34138123f265SSean Christopherson hpa_t root; 34144a38162eSPaolo Bonzini unsigned i; 34154a38162eSPaolo Bonzini int r; 3416c50d8ae3SPaolo Bonzini 3417b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3418be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3419c50d8ae3SPaolo Bonzini 3420c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3421c50d8ae3SPaolo Bonzini return 1; 3422c50d8ae3SPaolo Bonzini 3423c50d8ae3SPaolo Bonzini /* 34244a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 34254a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 34264a38162eSPaolo Bonzini */ 34276e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34286e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 34296e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 34306e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 34316e0918aeSSean Christopherson continue; 34326e0918aeSSean Christopherson 34336e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 34346e0918aeSSean Christopherson return 1; 34356e0918aeSSean Christopherson } 34366e0918aeSSean Christopherson } 34376e0918aeSSean Christopherson 3438d501f747SBen Gardon r = alloc_all_memslots_rmaps(vcpu->kvm); 3439d501f747SBen Gardon if (r) 3440d501f747SBen Gardon return r; 3441d501f747SBen Gardon 34424a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 34434a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 34444a38162eSPaolo Bonzini if (r < 0) 34454a38162eSPaolo Bonzini goto out_unlock; 34464a38162eSPaolo Bonzini 3447c50d8ae3SPaolo Bonzini /* 3448c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3449c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3450c50d8ae3SPaolo Bonzini */ 3451b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 34528123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3453b37233c9SSean Christopherson mmu->shadow_root_level, false); 3454b37233c9SSean Christopherson mmu->root_hpa = root; 3455be01e8e2SSean Christopherson goto set_root_pgd; 3456c50d8ae3SPaolo Bonzini } 3457c50d8ae3SPaolo Bonzini 34584a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 34594a38162eSPaolo Bonzini r = -EIO; 34604a38162eSPaolo Bonzini goto out_unlock; 34614a38162eSPaolo Bonzini } 346273ad1606SSean Christopherson 3463c50d8ae3SPaolo Bonzini /* 3464c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3465c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3466c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3467c50d8ae3SPaolo Bonzini */ 346817e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3469748e52b9SSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3470c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3471c50d8ae3SPaolo Bonzini 347203ca4589SSean Christopherson if (WARN_ON_ONCE(!mmu->pml4_root)) { 34734a38162eSPaolo Bonzini r = -EIO; 34744a38162eSPaolo Bonzini goto out_unlock; 34754a38162eSPaolo Bonzini } 347673ad1606SSean Christopherson 347703ca4589SSean Christopherson mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; 347804d45551SSean Christopherson } 347904d45551SSean Christopherson 3480c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3481c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 34826e6ec584SSean Christopherson 3483b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34846e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3485c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3486c50d8ae3SPaolo Bonzini continue; 3487c50d8ae3SPaolo Bonzini } 34886e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3489c50d8ae3SPaolo Bonzini } 3490c50d8ae3SPaolo Bonzini 34918123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 34928123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3493b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3494c50d8ae3SPaolo Bonzini } 3495c50d8ae3SPaolo Bonzini 3496ba0a194fSSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 349703ca4589SSean Christopherson mmu->root_hpa = __pa(mmu->pml4_root); 3498ba0a194fSSean Christopherson else 3499ba0a194fSSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 3500c50d8ae3SPaolo Bonzini 3501be01e8e2SSean Christopherson set_root_pgd: 3502b37233c9SSean Christopherson mmu->root_pgd = root_pgd; 35034a38162eSPaolo Bonzini out_unlock: 35044a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3505c50d8ae3SPaolo Bonzini 3506c50d8ae3SPaolo Bonzini return 0; 3507c50d8ae3SPaolo Bonzini } 3508c50d8ae3SPaolo Bonzini 3509748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3510c50d8ae3SPaolo Bonzini { 3511748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 351203ca4589SSean Christopherson u64 *pml4_root, *pae_root; 3513748e52b9SSean Christopherson 3514748e52b9SSean Christopherson /* 3515748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3516748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3517748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3518748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3519748e52b9SSean Christopherson */ 3520748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3521748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3522748e52b9SSean Christopherson return 0; 3523748e52b9SSean Christopherson 3524748e52b9SSean Christopherson /* 3525748e52b9SSean Christopherson * This mess only works with 4-level paging and needs to be updated to 3526748e52b9SSean Christopherson * work with 5-level paging. 3527748e52b9SSean Christopherson */ 3528748e52b9SSean Christopherson if (WARN_ON_ONCE(mmu->shadow_root_level != PT64_ROOT_4LEVEL)) 3529748e52b9SSean Christopherson return -EIO; 3530748e52b9SSean Christopherson 353103ca4589SSean Christopherson if (mmu->pae_root && mmu->pml4_root) 3532748e52b9SSean Christopherson return 0; 3533748e52b9SSean Christopherson 3534748e52b9SSean Christopherson /* 3535748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3536748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3537748e52b9SSean Christopherson */ 353803ca4589SSean Christopherson if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root)) 3539748e52b9SSean Christopherson return -EIO; 3540748e52b9SSean Christopherson 35414a98623dSSean Christopherson /* 35424a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 35434a98623dSSean Christopherson * doesn't need to be decrypted. 35444a98623dSSean Christopherson */ 3545748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3546748e52b9SSean Christopherson if (!pae_root) 3547748e52b9SSean Christopherson return -ENOMEM; 3548748e52b9SSean Christopherson 354903ca4589SSean Christopherson pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 355003ca4589SSean Christopherson if (!pml4_root) { 3551748e52b9SSean Christopherson free_page((unsigned long)pae_root); 3552748e52b9SSean Christopherson return -ENOMEM; 3553748e52b9SSean Christopherson } 3554748e52b9SSean Christopherson 3555748e52b9SSean Christopherson mmu->pae_root = pae_root; 355603ca4589SSean Christopherson mmu->pml4_root = pml4_root; 3557748e52b9SSean Christopherson 3558748e52b9SSean Christopherson return 0; 3559c50d8ae3SPaolo Bonzini } 3560c50d8ae3SPaolo Bonzini 3561c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3562c50d8ae3SPaolo Bonzini { 3563c50d8ae3SPaolo Bonzini int i; 3564c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3565c50d8ae3SPaolo Bonzini 3566c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3567c50d8ae3SPaolo Bonzini return; 3568c50d8ae3SPaolo Bonzini 3569c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3570c50d8ae3SPaolo Bonzini return; 3571c50d8ae3SPaolo Bonzini 3572c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3573c50d8ae3SPaolo Bonzini 3574c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3575c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3576e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3577c50d8ae3SPaolo Bonzini 3578c50d8ae3SPaolo Bonzini /* 3579c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3580c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3581c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3582c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3583c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3584c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 35850337f585SSean Christopherson * mmu_try_to_unsync_pages() describe what could go wrong if 35860337f585SSean Christopherson * this requirement isn't satisfied. 3587c50d8ae3SPaolo Bonzini */ 3588c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3589c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3590c50d8ae3SPaolo Bonzini return; 3591c50d8ae3SPaolo Bonzini 3592531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3593c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3594c50d8ae3SPaolo Bonzini 3595c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3596c50d8ae3SPaolo Bonzini 3597c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3598531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3599c50d8ae3SPaolo Bonzini return; 3600c50d8ae3SPaolo Bonzini } 3601c50d8ae3SPaolo Bonzini 3602531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3603c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3604c50d8ae3SPaolo Bonzini 3605c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3606c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3607c50d8ae3SPaolo Bonzini 3608c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3609c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3610e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3611c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3612c50d8ae3SPaolo Bonzini } 3613c50d8ae3SPaolo Bonzini } 3614c50d8ae3SPaolo Bonzini 3615c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3616531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3617c50d8ae3SPaolo Bonzini } 3618c50d8ae3SPaolo Bonzini 3619736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3620c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3621c50d8ae3SPaolo Bonzini { 3622c50d8ae3SPaolo Bonzini if (exception) 3623c50d8ae3SPaolo Bonzini exception->error_code = 0; 3624c50d8ae3SPaolo Bonzini return vaddr; 3625c50d8ae3SPaolo Bonzini } 3626c50d8ae3SPaolo Bonzini 3627736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3628c50d8ae3SPaolo Bonzini u32 access, 3629c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3630c50d8ae3SPaolo Bonzini { 3631c50d8ae3SPaolo Bonzini if (exception) 3632c50d8ae3SPaolo Bonzini exception->error_code = 0; 3633c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3634c50d8ae3SPaolo Bonzini } 3635c50d8ae3SPaolo Bonzini 3636c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3637c50d8ae3SPaolo Bonzini { 3638c50d8ae3SPaolo Bonzini /* 3639c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3640c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3641c50d8ae3SPaolo Bonzini */ 3642c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3643c50d8ae3SPaolo Bonzini return false; 3644c50d8ae3SPaolo Bonzini 3645c50d8ae3SPaolo Bonzini if (direct) 3646c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3647c50d8ae3SPaolo Bonzini 3648c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3649c50d8ae3SPaolo Bonzini } 3650c50d8ae3SPaolo Bonzini 365195fb5b02SBen Gardon /* 365295fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 365395fb5b02SBen Gardon * That SPTE may be non-present. 3654c5c8c7c5SDavid Matlack * 3655c5c8c7c5SDavid Matlack * Must be called between walk_shadow_page_lockless_{begin,end}. 365695fb5b02SBen Gardon */ 365739b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3658c50d8ae3SPaolo Bonzini { 3659c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 36602aa07893SSean Christopherson int leaf = -1; 366195fb5b02SBen Gardon u64 spte; 3662c50d8ae3SPaolo Bonzini 366339b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 366439b4d43eSSean Christopherson *root_level = iterator.level; 3665c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3666c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 366795fb5b02SBen Gardon leaf = iterator.level; 3668c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3669c50d8ae3SPaolo Bonzini 3670dde81f94SSean Christopherson sptes[leaf] = spte; 3671c50d8ae3SPaolo Bonzini 3672c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3673c50d8ae3SPaolo Bonzini break; 367495fb5b02SBen Gardon } 367595fb5b02SBen Gardon 367695fb5b02SBen Gardon return leaf; 367795fb5b02SBen Gardon } 367895fb5b02SBen Gardon 36799aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 368095fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 368195fb5b02SBen Gardon { 3682dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 368395fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 368439b4d43eSSean Christopherson int root, leaf, level; 368595fb5b02SBen Gardon bool reserved = false; 368695fb5b02SBen Gardon 3687c5c8c7c5SDavid Matlack walk_shadow_page_lockless_begin(vcpu); 3688c5c8c7c5SDavid Matlack 368963c0cac9SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 369039b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 369195fb5b02SBen Gardon else 369239b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 369395fb5b02SBen Gardon 3694c5c8c7c5SDavid Matlack walk_shadow_page_lockless_end(vcpu); 3695c5c8c7c5SDavid Matlack 36962aa07893SSean Christopherson if (unlikely(leaf < 0)) { 36972aa07893SSean Christopherson *sptep = 0ull; 36982aa07893SSean Christopherson return reserved; 36992aa07893SSean Christopherson } 37002aa07893SSean Christopherson 37019aa41879SSean Christopherson *sptep = sptes[leaf]; 37029aa41879SSean Christopherson 37039aa41879SSean Christopherson /* 37049aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 37059aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 37069aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 37079aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 37089aa41879SSean Christopherson */ 37099aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 37109aa41879SSean Christopherson leaf++; 371195fb5b02SBen Gardon 371295fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 371395fb5b02SBen Gardon 37149aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3715961f8445SSean Christopherson reserved |= is_rsvd_spte(rsvd_check, sptes[level], level); 3716c50d8ae3SPaolo Bonzini 3717c50d8ae3SPaolo Bonzini if (reserved) { 3718bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3719c50d8ae3SPaolo Bonzini __func__, addr); 372095fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3721bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3722bb4cdf3aSSean Christopherson sptes[level], level, 3723961f8445SSean Christopherson get_rsvd_bits(rsvd_check, sptes[level], level)); 3724c50d8ae3SPaolo Bonzini } 3725ddce6208SSean Christopherson 3726c50d8ae3SPaolo Bonzini return reserved; 3727c50d8ae3SPaolo Bonzini } 3728c50d8ae3SPaolo Bonzini 3729c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3730c50d8ae3SPaolo Bonzini { 3731c50d8ae3SPaolo Bonzini u64 spte; 3732c50d8ae3SPaolo Bonzini bool reserved; 3733c50d8ae3SPaolo Bonzini 3734c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3735c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3736c50d8ae3SPaolo Bonzini 373795fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3738c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3739c50d8ae3SPaolo Bonzini return -EINVAL; 3740c50d8ae3SPaolo Bonzini 3741c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3742c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 37430a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3744c50d8ae3SPaolo Bonzini 3745c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3746c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3747c50d8ae3SPaolo Bonzini 3748c50d8ae3SPaolo Bonzini if (direct) 3749c50d8ae3SPaolo Bonzini addr = 0; 3750c50d8ae3SPaolo Bonzini 3751c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3752c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3753c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3754c50d8ae3SPaolo Bonzini } 3755c50d8ae3SPaolo Bonzini 3756c50d8ae3SPaolo Bonzini /* 3757c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3758c50d8ae3SPaolo Bonzini * the address. 3759c50d8ae3SPaolo Bonzini */ 3760c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3761c50d8ae3SPaolo Bonzini } 3762c50d8ae3SPaolo Bonzini 3763c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3764c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 3765c50d8ae3SPaolo Bonzini { 3766c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3767c50d8ae3SPaolo Bonzini return false; 3768c50d8ae3SPaolo Bonzini 3769c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 3770c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 3771c50d8ae3SPaolo Bonzini return false; 3772c50d8ae3SPaolo Bonzini 3773c50d8ae3SPaolo Bonzini /* 3774c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3775c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3776c50d8ae3SPaolo Bonzini */ 3777c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 3778c50d8ae3SPaolo Bonzini return true; 3779c50d8ae3SPaolo Bonzini 3780c50d8ae3SPaolo Bonzini return false; 3781c50d8ae3SPaolo Bonzini } 3782c50d8ae3SPaolo Bonzini 3783c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3784c50d8ae3SPaolo Bonzini { 3785c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3786c50d8ae3SPaolo Bonzini u64 spte; 3787c50d8ae3SPaolo Bonzini 3788c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3789c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 3790c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3791c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3792c50d8ae3SPaolo Bonzini break; 3793c50d8ae3SPaolo Bonzini } 3794c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3795c50d8ae3SPaolo Bonzini } 3796c50d8ae3SPaolo Bonzini 3797e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 37989f1a8526SSean Christopherson gfn_t gfn) 3799c50d8ae3SPaolo Bonzini { 3800c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3801c50d8ae3SPaolo Bonzini 3802c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3803c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3804c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3805d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3806c50d8ae3SPaolo Bonzini 38079f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 38089f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3809c50d8ae3SPaolo Bonzini } 3810c50d8ae3SPaolo Bonzini 3811c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 38124a42d848SDavid Stevens gpa_t cr2_or_gpa, kvm_pfn_t *pfn, hva_t *hva, 38134a42d848SDavid Stevens bool write, bool *writable) 3814c50d8ae3SPaolo Bonzini { 3815c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 3816c50d8ae3SPaolo Bonzini bool async; 3817c50d8ae3SPaolo Bonzini 3818e0c37868SSean Christopherson /* 3819e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3820e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3821e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3822e0c37868SSean Christopherson */ 3823e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 3824e0c37868SSean Christopherson return true; 3825e0c37868SSean Christopherson 3826c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 3827c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 3828c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 3829c583eed6SSean Christopherson *writable = false; 3830c50d8ae3SPaolo Bonzini return false; 3831c50d8ae3SPaolo Bonzini } 3832c50d8ae3SPaolo Bonzini 3833c50d8ae3SPaolo Bonzini async = false; 38344a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, 38354a42d848SDavid Stevens write, writable, hva); 3836c50d8ae3SPaolo Bonzini if (!async) 3837c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3838c50d8ae3SPaolo Bonzini 3839c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 38409f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 3841c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 38429f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 3843c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 3844c50d8ae3SPaolo Bonzini return true; 38459f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 3846c50d8ae3SPaolo Bonzini return true; 3847c50d8ae3SPaolo Bonzini } 3848c50d8ae3SPaolo Bonzini 38494a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, 38504a42d848SDavid Stevens write, writable, hva); 3851c50d8ae3SPaolo Bonzini return false; 3852c50d8ae3SPaolo Bonzini } 3853c50d8ae3SPaolo Bonzini 38540f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 38550f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 3856c50d8ae3SPaolo Bonzini { 385763c0cac9SDavid Matlack bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); 3858367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 38590f90e1c1SSean Christopherson bool map_writable; 3860c50d8ae3SPaolo Bonzini 38610f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 38620f90e1c1SSean Christopherson unsigned long mmu_seq; 38630f90e1c1SSean Christopherson kvm_pfn_t pfn; 38644a42d848SDavid Stevens hva_t hva; 386583f06fa7SSean Christopherson int r; 3866c50d8ae3SPaolo Bonzini 3867c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 3868c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3869c50d8ae3SPaolo Bonzini 3870c4371c2aSSean Christopherson r = fast_page_fault(vcpu, gpa, error_code); 3871c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3872c4371c2aSSean Christopherson return r; 387383291445SSean Christopherson 3874378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3875c50d8ae3SPaolo Bonzini if (r) 3876c50d8ae3SPaolo Bonzini return r; 3877c50d8ae3SPaolo Bonzini 3878367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3879367fd790SSean Christopherson smp_rmb(); 3880367fd790SSean Christopherson 38814a42d848SDavid Stevens if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, &hva, 38824a42d848SDavid Stevens write, &map_writable)) 3883367fd790SSean Christopherson return RET_PF_RETRY; 3884367fd790SSean Christopherson 38850f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 3886367fd790SSean Christopherson return r; 3887367fd790SSean Christopherson 3888367fd790SSean Christopherson r = RET_PF_RETRY; 3889a2855afcSBen Gardon 38900b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3891a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3892a2855afcSBen Gardon else 3893531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3894a2855afcSBen Gardon 38954a42d848SDavid Stevens if (!is_noslot_pfn(pfn) && mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, hva)) 3896367fd790SSean Christopherson goto out_unlock; 38977bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 38987bd7ded6SSean Christopherson if (r) 3899367fd790SSean Christopherson goto out_unlock; 3900bb18842eSBen Gardon 39010b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3902bb18842eSBen Gardon r = kvm_tdp_mmu_map(vcpu, gpa, error_code, map_writable, max_level, 3903bb18842eSBen Gardon pfn, prefault); 3904bb18842eSBen Gardon else 39056c2fd34fSSean Christopherson r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, 39066c2fd34fSSean Christopherson prefault, is_tdp); 39070f90e1c1SSean Christopherson 3908367fd790SSean Christopherson out_unlock: 39090b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3910a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 3911a2855afcSBen Gardon else 3912531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3913367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 3914367fd790SSean Christopherson return r; 3915c50d8ae3SPaolo Bonzini } 3916c50d8ae3SPaolo Bonzini 39170f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 39180f90e1c1SSean Christopherson u32 error_code, bool prefault) 39190f90e1c1SSean Christopherson { 39200f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 39210f90e1c1SSean Christopherson 39220f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 39230f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 39243bae0459SSean Christopherson PG_LEVEL_2M, false); 39250f90e1c1SSean Christopherson } 39260f90e1c1SSean Christopherson 3927c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 3928c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 3929c50d8ae3SPaolo Bonzini { 3930c50d8ae3SPaolo Bonzini int r = 1; 39319ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 3932c50d8ae3SPaolo Bonzini 3933736c291cSSean Christopherson #ifndef CONFIG_X86_64 3934736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 3935736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 3936736c291cSSean Christopherson return -EFAULT; 3937736c291cSSean Christopherson #endif 3938736c291cSSean Christopherson 3939c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 39409ce372b3SVitaly Kuznetsov if (!flags) { 3941c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 3942c50d8ae3SPaolo Bonzini 3943c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 3944c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 3945c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 3946c50d8ae3SPaolo Bonzini insn_len); 39479ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 394868fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 3949c50d8ae3SPaolo Bonzini local_irq_disable(); 39506bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 3951c50d8ae3SPaolo Bonzini local_irq_enable(); 39529ce372b3SVitaly Kuznetsov } else { 39539ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 3954c50d8ae3SPaolo Bonzini } 39559ce372b3SVitaly Kuznetsov 3956c50d8ae3SPaolo Bonzini return r; 3957c50d8ae3SPaolo Bonzini } 3958c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 3959c50d8ae3SPaolo Bonzini 39607a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 3961c50d8ae3SPaolo Bonzini bool prefault) 3962c50d8ae3SPaolo Bonzini { 3963cb9b88c6SSean Christopherson int max_level; 3964c50d8ae3SPaolo Bonzini 3965e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 39663bae0459SSean Christopherson max_level > PG_LEVEL_4K; 3967cb9b88c6SSean Christopherson max_level--) { 3968cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 39690f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 3970c50d8ae3SPaolo Bonzini 3971cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 3972cb9b88c6SSean Christopherson break; 3973c50d8ae3SPaolo Bonzini } 3974c50d8ae3SPaolo Bonzini 39750f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 39760f90e1c1SSean Christopherson max_level, true); 3977c50d8ae3SPaolo Bonzini } 3978c50d8ae3SPaolo Bonzini 397984a16226SSean Christopherson static void nonpaging_init_context(struct kvm_mmu *context) 3980c50d8ae3SPaolo Bonzini { 3981c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 3982c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 3983c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 39845efac074SPaolo Bonzini context->invlpg = NULL; 3985c50d8ae3SPaolo Bonzini context->direct_map = true; 3986c50d8ae3SPaolo Bonzini } 3987c50d8ae3SPaolo Bonzini 3988be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 39890be44352SSean Christopherson union kvm_mmu_page_role role) 39900be44352SSean Christopherson { 3991be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 3992e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 3993e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 39940be44352SSean Christopherson } 39950be44352SSean Christopherson 3996c50d8ae3SPaolo Bonzini /* 3997be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 3998c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 3999c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 4000c50d8ae3SPaolo Bonzini * returned. 4001c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 4002c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4003c50d8ae3SPaolo Bonzini */ 4004be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4005c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4006c50d8ae3SPaolo Bonzini { 4007c50d8ae3SPaolo Bonzini uint i; 4008c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 4009c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4010c50d8ae3SPaolo Bonzini 4011be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 4012c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 4013c50d8ae3SPaolo Bonzini 4014be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 40150be44352SSean Christopherson return true; 40160be44352SSean Christopherson 4017c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4018c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 4019c50d8ae3SPaolo Bonzini 4020be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 4021c50d8ae3SPaolo Bonzini break; 4022c50d8ae3SPaolo Bonzini } 4023c50d8ae3SPaolo Bonzini 4024c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 4025be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 4026c50d8ae3SPaolo Bonzini 4027c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4028c50d8ae3SPaolo Bonzini } 4029c50d8ae3SPaolo Bonzini 4030be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4031b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4032c50d8ae3SPaolo Bonzini { 4033c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4034c50d8ae3SPaolo Bonzini 4035c50d8ae3SPaolo Bonzini /* 4036c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4037c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4038c50d8ae3SPaolo Bonzini * later if necessary. 4039c50d8ae3SPaolo Bonzini */ 4040c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4041b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4042fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 4043c50d8ae3SPaolo Bonzini 4044c50d8ae3SPaolo Bonzini return false; 4045c50d8ae3SPaolo Bonzini } 4046c50d8ae3SPaolo Bonzini 4047be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4048b5129100SSean Christopherson union kvm_mmu_page_role new_role) 4049c50d8ae3SPaolo Bonzini { 4050be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4051b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4052b869855bSSean Christopherson return; 4053c50d8ae3SPaolo Bonzini } 4054c50d8ae3SPaolo Bonzini 4055c50d8ae3SPaolo Bonzini /* 4056b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4057b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4058b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4059b869855bSSean Christopherson * free the root set here and allocate a new one. 4060b869855bSSean Christopherson */ 4061b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4062b869855bSSean Christopherson 4063b5129100SSean Christopherson if (force_flush_and_sync_on_reuse) { 4064b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 4065b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4066b5129100SSean Christopherson } 4067b869855bSSean Christopherson 4068b869855bSSean Christopherson /* 4069b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4070b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4071b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4072b869855bSSean Christopherson * the shadow page tables. 4073c50d8ae3SPaolo Bonzini */ 4074c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4075c50d8ae3SPaolo Bonzini 4076daa5b6c1SBen Gardon /* 4077daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 4078daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 4079daa5b6c1SBen Gardon */ 4080daa5b6c1SBen Gardon if (!new_role.direct) 4081daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 4082daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 4083c50d8ae3SPaolo Bonzini } 4084c50d8ae3SPaolo Bonzini 4085b5129100SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd) 4086c50d8ae3SPaolo Bonzini { 4087b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu)); 4088c50d8ae3SPaolo Bonzini } 4089be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4090c50d8ae3SPaolo Bonzini 4091c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4092c50d8ae3SPaolo Bonzini { 4093c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4094c50d8ae3SPaolo Bonzini } 4095c50d8ae3SPaolo Bonzini 4096c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 40970a2b64c5SBen Gardon unsigned int access, int *nr_present) 4098c50d8ae3SPaolo Bonzini { 4099c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4100c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4101c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4102c50d8ae3SPaolo Bonzini return true; 4103c50d8ae3SPaolo Bonzini } 4104c50d8ae3SPaolo Bonzini 4105c50d8ae3SPaolo Bonzini (*nr_present)++; 4106c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4107c50d8ae3SPaolo Bonzini return true; 4108c50d8ae3SPaolo Bonzini } 4109c50d8ae3SPaolo Bonzini 4110c50d8ae3SPaolo Bonzini return false; 4111c50d8ae3SPaolo Bonzini } 4112c50d8ae3SPaolo Bonzini 4113c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4114c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4115c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4116c50d8ae3SPaolo Bonzini #undef PTTYPE 4117c50d8ae3SPaolo Bonzini 4118c50d8ae3SPaolo Bonzini #define PTTYPE 64 4119c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4120c50d8ae3SPaolo Bonzini #undef PTTYPE 4121c50d8ae3SPaolo Bonzini 4122c50d8ae3SPaolo Bonzini #define PTTYPE 32 4123c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4124c50d8ae3SPaolo Bonzini #undef PTTYPE 4125c50d8ae3SPaolo Bonzini 4126c50d8ae3SPaolo Bonzini static void 4127b705a277SSean Christopherson __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check, 41285b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4129c50d8ae3SPaolo Bonzini bool pse, bool amd) 4130c50d8ae3SPaolo Bonzini { 4131c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4132c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 41335b7f575cSSean Christopherson u64 high_bits_rsvd; 4134c50d8ae3SPaolo Bonzini 4135c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4136c50d8ae3SPaolo Bonzini 4137c50d8ae3SPaolo Bonzini if (!gbpages) 4138c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4139c50d8ae3SPaolo Bonzini 41405b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 41415b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 41425b7f575cSSean Christopherson else 41435b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 41445b7f575cSSean Christopherson 41455b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 41465b7f575cSSean Christopherson if (!nx) 41475b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 41485b7f575cSSean Christopherson 4149c50d8ae3SPaolo Bonzini /* 4150c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4151c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4152c50d8ae3SPaolo Bonzini */ 4153c50d8ae3SPaolo Bonzini if (amd) 4154c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4155c50d8ae3SPaolo Bonzini 4156c50d8ae3SPaolo Bonzini switch (level) { 4157c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4158c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4159c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4160c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4161c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4162c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4163c50d8ae3SPaolo Bonzini 4164c50d8ae3SPaolo Bonzini if (!pse) { 4165c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4166c50d8ae3SPaolo Bonzini break; 4167c50d8ae3SPaolo Bonzini } 4168c50d8ae3SPaolo Bonzini 4169c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4170c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4171c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4172c50d8ae3SPaolo Bonzini else 4173c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4174c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4175c50d8ae3SPaolo Bonzini break; 4176c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 41775b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 41785b7f575cSSean Christopherson high_bits_rsvd | 41795b7f575cSSean Christopherson rsvd_bits(5, 8) | 41805b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 41815b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 41825b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 41835b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4184c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4185c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4186c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4187c50d8ae3SPaolo Bonzini break; 4188c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 41895b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 41905b7f575cSSean Christopherson nonleaf_bit8_rsvd | 41915b7f575cSSean Christopherson rsvd_bits(7, 7); 4192c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4193c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4194df561f66SGustavo A. R. Silva fallthrough; 4195c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 41965b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 41975b7f575cSSean Christopherson nonleaf_bit8_rsvd | 41985b7f575cSSean Christopherson rsvd_bits(7, 7); 41995b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 42005b7f575cSSean Christopherson gbpages_bit_rsvd; 42015b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 42025b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4203c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4204c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 42055b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 42065b7f575cSSean Christopherson gbpages_bit_rsvd | 4207c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 42085b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4209c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4210c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4211c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4212c50d8ae3SPaolo Bonzini break; 4213c50d8ae3SPaolo Bonzini } 4214c50d8ae3SPaolo Bonzini } 4215c50d8ae3SPaolo Bonzini 421627de9250SSean Christopherson static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu) 421727de9250SSean Christopherson { 421827de9250SSean Christopherson /* 421927de9250SSean Christopherson * If TDP is enabled, let the guest use GBPAGES if they're supported in 422027de9250SSean Christopherson * hardware. The hardware page walker doesn't let KVM disable GBPAGES, 422127de9250SSean Christopherson * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA 422227de9250SSean Christopherson * walk for performance and complexity reasons. Not to mention KVM 422327de9250SSean Christopherson * _can't_ solve the problem because GVA->GPA walks aren't visible to 422427de9250SSean Christopherson * KVM once a TDP translation is installed. Mimic hardware behavior so 422527de9250SSean Christopherson * that KVM's is at least consistent, i.e. doesn't randomly inject #PF. 422627de9250SSean Christopherson */ 422727de9250SSean Christopherson return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) : 422827de9250SSean Christopherson guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES); 422927de9250SSean Christopherson } 423027de9250SSean Christopherson 4231c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4232c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4233c50d8ae3SPaolo Bonzini { 4234b705a277SSean Christopherson __reset_rsvds_bits_mask(&context->guest_rsvd_check, 42355b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 423690599c28SSean Christopherson context->root_level, is_efer_nx(context), 423727de9250SSean Christopherson guest_can_use_gbpages(vcpu), 42384e9c0d80SSean Christopherson is_cr4_pse(context), 423923493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4240c50d8ae3SPaolo Bonzini } 4241c50d8ae3SPaolo Bonzini 4242c50d8ae3SPaolo Bonzini static void 4243c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 42445b7f575cSSean Christopherson u64 pa_bits_rsvd, bool execonly) 4245c50d8ae3SPaolo Bonzini { 42465b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 4247c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4248c50d8ae3SPaolo Bonzini 42495b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 42505b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 42515b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6); 42525b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6); 42535b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4254c50d8ae3SPaolo Bonzini 4255c50d8ae3SPaolo Bonzini /* large page */ 4256c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4257c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 42585b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29); 42595b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20); 4260c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4261c50d8ae3SPaolo Bonzini 4262c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4263c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4264c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4265c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4266c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4267c50d8ae3SPaolo Bonzini if (!execonly) { 4268c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4269c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4270c50d8ae3SPaolo Bonzini } 4271c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4272c50d8ae3SPaolo Bonzini } 4273c50d8ae3SPaolo Bonzini 4274c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4275c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4276c50d8ae3SPaolo Bonzini { 4277c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 42785b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, execonly); 4279c50d8ae3SPaolo Bonzini } 4280c50d8ae3SPaolo Bonzini 42816f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 42826f8e65a6SSean Christopherson { 42836f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 42846f8e65a6SSean Christopherson } 42856f8e65a6SSean Christopherson 4286c50d8ae3SPaolo Bonzini /* 4287c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4288c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4289c50d8ae3SPaolo Bonzini * follow the features in guest. 4290c50d8ae3SPaolo Bonzini */ 429116be1d12SSean Christopherson static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 429216be1d12SSean Christopherson struct kvm_mmu *context) 4293c50d8ae3SPaolo Bonzini { 4294112022bdSSean Christopherson /* 4295112022bdSSean Christopherson * KVM uses NX when TDP is disabled to handle a variety of scenarios, 4296112022bdSSean Christopherson * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and 4297112022bdSSean Christopherson * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0. 4298112022bdSSean Christopherson * The iTLB multi-hit workaround can be toggled at any time, so assume 4299112022bdSSean Christopherson * NX can be used by any non-nested shadow MMU to avoid having to reset 4300112022bdSSean Christopherson * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled. 4301112022bdSSean Christopherson */ 430290599c28SSean Christopherson bool uses_nx = is_efer_nx(context) || !tdp_enabled; 43038c985b2dSSean Christopherson 43048c985b2dSSean Christopherson /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */ 43058c985b2dSSean Christopherson bool is_amd = true; 43068c985b2dSSean Christopherson /* KVM doesn't use 2-level page tables for the shadow MMU. */ 43078c985b2dSSean Christopherson bool is_pse = false; 4308c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4309c50d8ae3SPaolo Bonzini int i; 4310c50d8ae3SPaolo Bonzini 43118c985b2dSSean Christopherson WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL); 43128c985b2dSSean Christopherson 4313c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4314b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4315c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 431627de9250SSean Christopherson guest_can_use_gbpages(vcpu), is_pse, is_amd); 4317c50d8ae3SPaolo Bonzini 4318c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4319c50d8ae3SPaolo Bonzini return; 4320c50d8ae3SPaolo Bonzini 4321c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4322c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4323c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4324c50d8ae3SPaolo Bonzini } 4325c50d8ae3SPaolo Bonzini 4326c50d8ae3SPaolo Bonzini } 4327c50d8ae3SPaolo Bonzini 4328c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4329c50d8ae3SPaolo Bonzini { 4330c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4331c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4332c50d8ae3SPaolo Bonzini } 4333c50d8ae3SPaolo Bonzini 4334c50d8ae3SPaolo Bonzini /* 4335c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4336c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4337c50d8ae3SPaolo Bonzini */ 4338c50d8ae3SPaolo Bonzini static void 4339c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4340c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4341c50d8ae3SPaolo Bonzini { 4342c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4343c50d8ae3SPaolo Bonzini int i; 4344c50d8ae3SPaolo Bonzini 4345c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4346c50d8ae3SPaolo Bonzini 4347c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4348b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4349c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4350c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 43518c985b2dSSean Christopherson false, true); 4352c50d8ae3SPaolo Bonzini else 4353c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 43546f8e65a6SSean Christopherson reserved_hpa_bits(), false); 4355c50d8ae3SPaolo Bonzini 4356c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4357c50d8ae3SPaolo Bonzini return; 4358c50d8ae3SPaolo Bonzini 4359c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4360c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4361c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4362c50d8ae3SPaolo Bonzini } 4363c50d8ae3SPaolo Bonzini } 4364c50d8ae3SPaolo Bonzini 4365c50d8ae3SPaolo Bonzini /* 4366c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4367c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4368c50d8ae3SPaolo Bonzini */ 4369c50d8ae3SPaolo Bonzini static void 4370c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4371c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4372c50d8ae3SPaolo Bonzini { 4373c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 43746f8e65a6SSean Christopherson reserved_hpa_bits(), execonly); 4375c50d8ae3SPaolo Bonzini } 4376c50d8ae3SPaolo Bonzini 4377c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4378c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4379c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4380c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4381c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4382c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4383c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4384c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4385c50d8ae3SPaolo Bonzini 4386c50d8ae3SPaolo Bonzini 4387c596f147SSean Christopherson static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept) 4388c50d8ae3SPaolo Bonzini { 4389c50d8ae3SPaolo Bonzini unsigned byte; 4390c50d8ae3SPaolo Bonzini 4391c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4392c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4393c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4394c50d8ae3SPaolo Bonzini 4395c596f147SSean Christopherson bool cr4_smep = is_cr4_smep(mmu); 4396c596f147SSean Christopherson bool cr4_smap = is_cr4_smap(mmu); 4397c596f147SSean Christopherson bool cr0_wp = is_cr0_wp(mmu); 439890599c28SSean Christopherson bool efer_nx = is_efer_nx(mmu); 4399c50d8ae3SPaolo Bonzini 4400c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4401c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4402c50d8ae3SPaolo Bonzini 4403c50d8ae3SPaolo Bonzini /* 4404c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4405c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4406c50d8ae3SPaolo Bonzini */ 4407c50d8ae3SPaolo Bonzini 4408c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4409c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4410c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4411c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4412c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4413c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4414c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4415c50d8ae3SPaolo Bonzini u8 smepf = 0; 4416c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4417c50d8ae3SPaolo Bonzini u8 smapf = 0; 4418c50d8ae3SPaolo Bonzini 4419c50d8ae3SPaolo Bonzini if (!ept) { 4420c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4421c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4422c50d8ae3SPaolo Bonzini 4423c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 442490599c28SSean Christopherson if (!efer_nx) 4425c50d8ae3SPaolo Bonzini ff = 0; 4426c50d8ae3SPaolo Bonzini 4427c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4428c50d8ae3SPaolo Bonzini if (!cr0_wp) 4429c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4430c50d8ae3SPaolo Bonzini 4431c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4432c50d8ae3SPaolo Bonzini if (cr4_smep) 4433c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4434c50d8ae3SPaolo Bonzini 4435c50d8ae3SPaolo Bonzini /* 4436c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4437c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4438c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4439c50d8ae3SPaolo Bonzini * conditions are true: 4440c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4441c50d8ae3SPaolo Bonzini * - A user page is accessed 4442c50d8ae3SPaolo Bonzini * - The access is not a fetch 4443c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4444c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4445c50d8ae3SPaolo Bonzini * 4446c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4447c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4448c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4449c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4450c50d8ae3SPaolo Bonzini */ 4451c50d8ae3SPaolo Bonzini if (cr4_smap) 4452c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4453c50d8ae3SPaolo Bonzini } 4454c50d8ae3SPaolo Bonzini 4455c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4456c50d8ae3SPaolo Bonzini } 4457c50d8ae3SPaolo Bonzini } 4458c50d8ae3SPaolo Bonzini 4459c50d8ae3SPaolo Bonzini /* 4460c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4461c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4462c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4463c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4464c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4465c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4466c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4467c50d8ae3SPaolo Bonzini * 4468c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4469c50d8ae3SPaolo Bonzini * page tables and the machine state: 4470c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4471c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4472c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4473c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4474c50d8ae3SPaolo Bonzini * 4475c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4476c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4477c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4478c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4479c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4480c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4481c50d8ae3SPaolo Bonzini * only will be masked away. 4482c50d8ae3SPaolo Bonzini */ 44832e4c0661SSean Christopherson static void update_pkru_bitmask(struct kvm_mmu *mmu) 4484c50d8ae3SPaolo Bonzini { 4485c50d8ae3SPaolo Bonzini unsigned bit; 4486c50d8ae3SPaolo Bonzini bool wp; 4487c50d8ae3SPaolo Bonzini 44882e4c0661SSean Christopherson if (!is_cr4_pke(mmu)) { 4489c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4490c50d8ae3SPaolo Bonzini return; 4491c50d8ae3SPaolo Bonzini } 4492c50d8ae3SPaolo Bonzini 44932e4c0661SSean Christopherson wp = is_cr0_wp(mmu); 4494c50d8ae3SPaolo Bonzini 4495c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4496c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4497c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4498c50d8ae3SPaolo Bonzini 4499c50d8ae3SPaolo Bonzini pfec = bit << 1; 4500c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4501c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4502c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4503c50d8ae3SPaolo Bonzini 4504c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4505c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4506c50d8ae3SPaolo Bonzini 4507c50d8ae3SPaolo Bonzini /* 4508c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4509c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4510c50d8ae3SPaolo Bonzini */ 4511c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4512c50d8ae3SPaolo Bonzini /* 4513c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4514c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4515c50d8ae3SPaolo Bonzini */ 4516c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4517c50d8ae3SPaolo Bonzini 4518c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4519c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4520c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4521c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4522c50d8ae3SPaolo Bonzini 4523c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4524c50d8ae3SPaolo Bonzini } 4525c50d8ae3SPaolo Bonzini } 4526c50d8ae3SPaolo Bonzini 4527533f9a4bSSean Christopherson static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu, 4528533f9a4bSSean Christopherson struct kvm_mmu *mmu) 4529c50d8ae3SPaolo Bonzini { 4530533f9a4bSSean Christopherson if (!is_cr0_pg(mmu)) 4531533f9a4bSSean Christopherson return; 4532c50d8ae3SPaolo Bonzini 4533533f9a4bSSean Christopherson reset_rsvds_bits_mask(vcpu, mmu); 4534533f9a4bSSean Christopherson update_permission_bitmask(mmu, false); 4535533f9a4bSSean Christopherson update_pkru_bitmask(mmu); 4536c50d8ae3SPaolo Bonzini } 4537c50d8ae3SPaolo Bonzini 4538fe660f72SSean Christopherson static void paging64_init_context(struct kvm_mmu *context) 4539c50d8ae3SPaolo Bonzini { 4540c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4541c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4542c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4543c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4544c50d8ae3SPaolo Bonzini context->direct_map = false; 4545c50d8ae3SPaolo Bonzini } 4546c50d8ae3SPaolo Bonzini 454784a16226SSean Christopherson static void paging32_init_context(struct kvm_mmu *context) 4548c50d8ae3SPaolo Bonzini { 4549c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4550c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4551c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4552c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4553c50d8ae3SPaolo Bonzini context->direct_map = false; 4554c50d8ae3SPaolo Bonzini } 4555c50d8ae3SPaolo Bonzini 45568626c120SSean Christopherson static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu, 45578626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 4558c50d8ae3SPaolo Bonzini { 4559c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4560c50d8ae3SPaolo Bonzini 4561ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4562ca8d664fSSean Christopherson ext.cr0_pg = 1; 45638626c120SSean Christopherson ext.cr4_pae = ____is_cr4_pae(regs); 45648626c120SSean Christopherson ext.cr4_smep = ____is_cr4_smep(regs); 45658626c120SSean Christopherson ext.cr4_smap = ____is_cr4_smap(regs); 45668626c120SSean Christopherson ext.cr4_pse = ____is_cr4_pse(regs); 456784c679f5SSean Christopherson 456884c679f5SSean Christopherson /* PKEY and LA57 are active iff long mode is active. */ 456984c679f5SSean Christopherson ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs); 457084c679f5SSean Christopherson ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs); 4571ca8d664fSSean Christopherson } 4572c50d8ae3SPaolo Bonzini 4573c50d8ae3SPaolo Bonzini ext.valid = 1; 4574c50d8ae3SPaolo Bonzini 4575c50d8ae3SPaolo Bonzini return ext; 4576c50d8ae3SPaolo Bonzini } 4577c50d8ae3SPaolo Bonzini 4578c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 45798626c120SSean Christopherson struct kvm_mmu_role_regs *regs, 4580c50d8ae3SPaolo Bonzini bool base_only) 4581c50d8ae3SPaolo Bonzini { 4582c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4583c50d8ae3SPaolo Bonzini 4584c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4585ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4586167f8a5cSSean Christopherson role.base.efer_nx = ____is_efer_nx(regs); 45878626c120SSean Christopherson role.base.cr0_wp = ____is_cr0_wp(regs); 4588ca8d664fSSean Christopherson } 4589c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4590c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4591c50d8ae3SPaolo Bonzini 4592c50d8ae3SPaolo Bonzini if (base_only) 4593c50d8ae3SPaolo Bonzini return role; 4594c50d8ae3SPaolo Bonzini 45958626c120SSean Christopherson role.ext = kvm_calc_mmu_role_ext(vcpu, regs); 4596c50d8ae3SPaolo Bonzini 4597c50d8ae3SPaolo Bonzini return role; 4598c50d8ae3SPaolo Bonzini } 4599c50d8ae3SPaolo Bonzini 4600d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4601d468d94bSSean Christopherson { 4602d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 460383013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4604d468d94bSSean Christopherson return 4; 4605d468d94bSSean Christopherson 460683013059SSean Christopherson return max_tdp_level; 4607d468d94bSSean Christopherson } 4608d468d94bSSean Christopherson 4609c50d8ae3SPaolo Bonzini static union kvm_mmu_role 46108626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, 46118626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4612c50d8ae3SPaolo Bonzini { 46138626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4614c50d8ae3SPaolo Bonzini 4615c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4616d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4617c50d8ae3SPaolo Bonzini role.base.direct = true; 4618c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4619c50d8ae3SPaolo Bonzini 4620c50d8ae3SPaolo Bonzini return role; 4621c50d8ae3SPaolo Bonzini } 4622c50d8ae3SPaolo Bonzini 4623c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4624c50d8ae3SPaolo Bonzini { 46258c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 46268626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4627c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 46288626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, false); 4629c50d8ae3SPaolo Bonzini 4630c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4631c50d8ae3SPaolo Bonzini return; 4632c50d8ae3SPaolo Bonzini 4633c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 46347a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4635c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 46365efac074SPaolo Bonzini context->invlpg = NULL; 4637d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4638c50d8ae3SPaolo Bonzini context->direct_map = true; 4639d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4640c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4641c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4642f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(®s); 4643c50d8ae3SPaolo Bonzini 464436f26787SSean Christopherson if (!is_cr0_pg(context)) 4645c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 464636f26787SSean Christopherson else if (is_cr4_pae(context)) 4647c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4648f4bd6f73SSean Christopherson else 4649c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4650c50d8ae3SPaolo Bonzini 4651533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4652c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4653c50d8ae3SPaolo Bonzini } 4654c50d8ae3SPaolo Bonzini 4655c50d8ae3SPaolo Bonzini static union kvm_mmu_role 46568626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, 46578626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4658c50d8ae3SPaolo Bonzini { 46598626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4660c50d8ae3SPaolo Bonzini 46618626c120SSean Christopherson role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs); 46628626c120SSean Christopherson role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs); 4663ca8d664fSSean Christopherson role.base.gpte_is_8_bytes = ____is_cr0_pg(regs) && ____is_cr4_pae(regs); 4664c50d8ae3SPaolo Bonzini 466559505b55SSean Christopherson return role; 466659505b55SSean Christopherson } 466759505b55SSean Christopherson 466859505b55SSean Christopherson static union kvm_mmu_role 46698626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, 46708626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 467159505b55SSean Christopherson { 467259505b55SSean Christopherson union kvm_mmu_role role = 46738626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, base_only); 467459505b55SSean Christopherson 46758626c120SSean Christopherson role.base.direct = !____is_cr0_pg(regs); 467659505b55SSean Christopherson 46778626c120SSean Christopherson if (!____is_efer_lma(regs)) 4678c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 46798626c120SSean Christopherson else if (____is_cr4_la57(regs)) 4680c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4681c50d8ae3SPaolo Bonzini else 4682c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4683c50d8ae3SPaolo Bonzini 4684c50d8ae3SPaolo Bonzini return role; 4685c50d8ae3SPaolo Bonzini } 4686c50d8ae3SPaolo Bonzini 46878c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 4688594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs, 46898c008659SPaolo Bonzini union kvm_mmu_role new_role) 4690c50d8ae3SPaolo Bonzini { 469118db1b17SSean Christopherson if (new_role.as_u64 == context->mmu_role.as_u64) 469218db1b17SSean Christopherson return; 4693c50d8ae3SPaolo Bonzini 4694c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 469518db1b17SSean Christopherson 469636f26787SSean Christopherson if (!is_cr0_pg(context)) 469784a16226SSean Christopherson nonpaging_init_context(context); 469836f26787SSean Christopherson else if (is_cr4_pae(context)) 4699fe660f72SSean Christopherson paging64_init_context(context); 4700c50d8ae3SPaolo Bonzini else 470184a16226SSean Christopherson paging32_init_context(context); 4702f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(regs); 4703c50d8ae3SPaolo Bonzini 4704533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4705d555f705SSean Christopherson context->shadow_root_level = new_role.base.level; 4706d555f705SSean Christopherson 4707c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4708c50d8ae3SPaolo Bonzini } 47090f04a2acSVitaly Kuznetsov 4710594e91a1SSean Christopherson static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, 4711594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs) 47120f04a2acSVitaly Kuznetsov { 47138c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 47140f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 47158626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false); 47160f04a2acSVitaly Kuznetsov 4717594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, regs, new_role); 47180f04a2acSVitaly Kuznetsov } 47190f04a2acSVitaly Kuznetsov 472059505b55SSean Christopherson static union kvm_mmu_role 47218626c120SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu, 47228626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 472359505b55SSean Christopherson { 472459505b55SSean Christopherson union kvm_mmu_role role = 47258626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 472659505b55SSean Christopherson 472759505b55SSean Christopherson role.base.direct = false; 4728d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 472959505b55SSean Christopherson 473059505b55SSean Christopherson return role; 473159505b55SSean Christopherson } 473259505b55SSean Christopherson 4733dbc4739bSSean Christopherson void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4734dbc4739bSSean Christopherson unsigned long cr4, u64 efer, gpa_t nested_cr3) 47350f04a2acSVitaly Kuznetsov { 47368c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4737594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 4738594e91a1SSean Christopherson .cr0 = cr0, 4739594e91a1SSean Christopherson .cr4 = cr4, 4740594e91a1SSean Christopherson .efer = efer, 4741594e91a1SSean Christopherson }; 47428626c120SSean Christopherson union kvm_mmu_role new_role; 47430f04a2acSVitaly Kuznetsov 47448626c120SSean Christopherson new_role = kvm_calc_shadow_npt_root_page_role(vcpu, ®s); 4745a506fdd2SVitaly Kuznetsov 4746b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base); 4747a3322d5cSSean Christopherson 4748594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, ®s, new_role); 47490f04a2acSVitaly Kuznetsov } 47500f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4751c50d8ae3SPaolo Bonzini 4752c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4753c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4754bb1fcc70SSean Christopherson bool execonly, u8 level) 4755c50d8ae3SPaolo Bonzini { 4756c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4757c50d8ae3SPaolo Bonzini 4758c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4759c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4760c50d8ae3SPaolo Bonzini 4761bb1fcc70SSean Christopherson role.base.level = level; 4762c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4763c50d8ae3SPaolo Bonzini role.base.direct = false; 4764c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4765c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4766c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4767c50d8ae3SPaolo Bonzini 4768cd6767c3SSean Christopherson /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */ 4769cd6767c3SSean Christopherson role.ext.word = 0; 4770c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4771cd6767c3SSean Christopherson role.ext.valid = 1; 4772c50d8ae3SPaolo Bonzini 4773c50d8ae3SPaolo Bonzini return role; 4774c50d8ae3SPaolo Bonzini } 4775c50d8ae3SPaolo Bonzini 4776c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4777c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 4778c50d8ae3SPaolo Bonzini { 47798c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4780bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4781c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4782c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4783bb1fcc70SSean Christopherson execonly, level); 4784c50d8ae3SPaolo Bonzini 4785b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base); 4786c50d8ae3SPaolo Bonzini 4787c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4788c50d8ae3SPaolo Bonzini return; 4789c50d8ae3SPaolo Bonzini 479018db1b17SSean Christopherson context->mmu_role.as_u64 = new_role.as_u64; 479118db1b17SSean Christopherson 4792bb1fcc70SSean Christopherson context->shadow_root_level = level; 4793c50d8ae3SPaolo Bonzini 4794c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4795c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4796c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4797c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4798c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4799bb1fcc70SSean Christopherson context->root_level = level; 4800c50d8ae3SPaolo Bonzini context->direct_map = false; 4801c50d8ae3SPaolo Bonzini 4802c596f147SSean Christopherson update_permission_bitmask(context, true); 48032e4c0661SSean Christopherson update_pkru_bitmask(context); 4804c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 4805c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4806c50d8ae3SPaolo Bonzini } 4807c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4808c50d8ae3SPaolo Bonzini 4809c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4810c50d8ae3SPaolo Bonzini { 48118c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4812594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4813c50d8ae3SPaolo Bonzini 4814594e91a1SSean Christopherson kvm_init_shadow_mmu(vcpu, ®s); 4815929d1cfaSPaolo Bonzini 4816d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4817c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4818c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4819c50d8ae3SPaolo Bonzini } 4820c50d8ae3SPaolo Bonzini 48218626c120SSean Christopherson static union kvm_mmu_role 48228626c120SSean Christopherson kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu, struct kvm_mmu_role_regs *regs) 4823654430efSSean Christopherson { 48248626c120SSean Christopherson union kvm_mmu_role role; 48258626c120SSean Christopherson 48268626c120SSean Christopherson role = kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 4827654430efSSean Christopherson 4828654430efSSean Christopherson /* 4829654430efSSean Christopherson * Nested MMUs are used only for walking L2's gva->gpa, they never have 4830654430efSSean Christopherson * shadow pages of their own and so "direct" has no meaning. Set it 4831654430efSSean Christopherson * to "true" to try to detect bogus usage of the nested MMU. 4832654430efSSean Christopherson */ 4833654430efSSean Christopherson role.base.direct = true; 4834f4bd6f73SSean Christopherson role.base.level = role_regs_to_root_level(regs); 4835654430efSSean Christopherson return role; 4836654430efSSean Christopherson } 4837654430efSSean Christopherson 4838c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4839c50d8ae3SPaolo Bonzini { 48408626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 48418626c120SSean Christopherson union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu, ®s); 4842c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4843c50d8ae3SPaolo Bonzini 4844c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4845c50d8ae3SPaolo Bonzini return; 4846c50d8ae3SPaolo Bonzini 4847c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4848d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4849c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4850c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 48515472fcd4SSean Christopherson g_context->root_level = new_role.base.level; 4852c50d8ae3SPaolo Bonzini 4853c50d8ae3SPaolo Bonzini /* 48545efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 48555efac074SPaolo Bonzini * SPTEs. 48565efac074SPaolo Bonzini */ 48575efac074SPaolo Bonzini g_context->invlpg = NULL; 48585efac074SPaolo Bonzini 48595efac074SPaolo Bonzini /* 4860c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4861c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4862c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4863c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4864c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4865c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4866c50d8ae3SPaolo Bonzini */ 4867fa4b5588SSean Christopherson if (!is_paging(vcpu)) 4868c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 4869fa4b5588SSean Christopherson else if (is_long_mode(vcpu)) 4870c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4871fa4b5588SSean Christopherson else if (is_pae(vcpu)) 4872c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4873fa4b5588SSean Christopherson else 4874c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 4875fa4b5588SSean Christopherson 4876533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, g_context); 4877c50d8ae3SPaolo Bonzini } 4878c50d8ae3SPaolo Bonzini 4879c9060662SSean Christopherson void kvm_init_mmu(struct kvm_vcpu *vcpu) 4880c50d8ae3SPaolo Bonzini { 4881c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4882c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4883c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4884c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4885c50d8ae3SPaolo Bonzini else 4886c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4887c50d8ae3SPaolo Bonzini } 4888c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4889c50d8ae3SPaolo Bonzini 4890c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4891c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4892c50d8ae3SPaolo Bonzini { 48938626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4894c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4895c50d8ae3SPaolo Bonzini 4896c50d8ae3SPaolo Bonzini if (tdp_enabled) 48978626c120SSean Christopherson role = kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, true); 4898c50d8ae3SPaolo Bonzini else 48998626c120SSean Christopherson role = kvm_calc_shadow_mmu_root_page_role(vcpu, ®s, true); 4900c50d8ae3SPaolo Bonzini 4901c50d8ae3SPaolo Bonzini return role.base; 4902c50d8ae3SPaolo Bonzini } 4903c50d8ae3SPaolo Bonzini 490449c6f875SSean Christopherson void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) 490549c6f875SSean Christopherson { 490649c6f875SSean Christopherson /* 490749c6f875SSean Christopherson * Invalidate all MMU roles to force them to reinitialize as CPUID 490849c6f875SSean Christopherson * information is factored into reserved bit calculations. 490949c6f875SSean Christopherson */ 491049c6f875SSean Christopherson vcpu->arch.root_mmu.mmu_role.ext.valid = 0; 491149c6f875SSean Christopherson vcpu->arch.guest_mmu.mmu_role.ext.valid = 0; 491249c6f875SSean Christopherson vcpu->arch.nested_mmu.mmu_role.ext.valid = 0; 491349c6f875SSean Christopherson kvm_mmu_reset_context(vcpu); 491463f5a190SSean Christopherson 491563f5a190SSean Christopherson /* 491663f5a190SSean Christopherson * KVM does not correctly handle changing guest CPUID after KVM_RUN, as 491763f5a190SSean Christopherson * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't 491863f5a190SSean Christopherson * tracked in kvm_mmu_page_role. As a result, KVM may miss guest page 491963f5a190SSean Christopherson * faults due to reusing SPs/SPTEs. Alert userspace, but otherwise 492063f5a190SSean Christopherson * sweep the problem under the rug. 492163f5a190SSean Christopherson * 492263f5a190SSean Christopherson * KVM's horrific CPUID ABI makes the problem all but impossible to 492363f5a190SSean Christopherson * solve, as correctly handling multiple vCPU models (with respect to 492463f5a190SSean Christopherson * paging and physical address properties) in a single VM would require 492563f5a190SSean Christopherson * tracking all relevant CPUID information in kvm_mmu_page_role. That 492663f5a190SSean Christopherson * is very undesirable as it would double the memory requirements for 492763f5a190SSean Christopherson * gfn_track (see struct kvm_mmu_page_role comments), and in practice 492863f5a190SSean Christopherson * no sane VMM mucks with the core vCPU model on the fly. 492963f5a190SSean Christopherson */ 493063f5a190SSean Christopherson if (vcpu->arch.last_vmentry_cpu != -1) { 493163f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} after KVM_RUN may cause guest instability\n"); 493263f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} will fail after KVM_RUN starting with Linux 5.16\n"); 493363f5a190SSean Christopherson } 493449c6f875SSean Christopherson } 493549c6f875SSean Christopherson 4936c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 4937c50d8ae3SPaolo Bonzini { 4938c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 4939c9060662SSean Christopherson kvm_init_mmu(vcpu); 4940c50d8ae3SPaolo Bonzini } 4941c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 4942c50d8ae3SPaolo Bonzini 4943c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 4944c50d8ae3SPaolo Bonzini { 4945c50d8ae3SPaolo Bonzini int r; 4946c50d8ae3SPaolo Bonzini 4947378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 4948c50d8ae3SPaolo Bonzini if (r) 4949c50d8ae3SPaolo Bonzini goto out; 4950748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 4951c50d8ae3SPaolo Bonzini if (r) 4952c50d8ae3SPaolo Bonzini goto out; 49534a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 49546e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 49556e6ec584SSean Christopherson else 49566e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 4957c50d8ae3SPaolo Bonzini if (r) 4958c50d8ae3SPaolo Bonzini goto out; 4959a91f387bSSean Christopherson 4960a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 4961a91f387bSSean Christopherson 4962727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 4963b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 4964c50d8ae3SPaolo Bonzini out: 4965c50d8ae3SPaolo Bonzini return r; 4966c50d8ae3SPaolo Bonzini } 4967c50d8ae3SPaolo Bonzini 4968c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 4969c50d8ae3SPaolo Bonzini { 4970c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 4971c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 4972c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 4973c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 4974c50d8ae3SPaolo Bonzini } 4975c50d8ae3SPaolo Bonzini 4976c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 4977c50d8ae3SPaolo Bonzini { 4978c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 4979c50d8ae3SPaolo Bonzini return false; 4980c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 4981c50d8ae3SPaolo Bonzini return true; 4982c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 4983c50d8ae3SPaolo Bonzini return true; 4984c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 4985c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 4986c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 4987c50d8ae3SPaolo Bonzini } 4988c50d8ae3SPaolo Bonzini 4989c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 4990c50d8ae3SPaolo Bonzini int *bytes) 4991c50d8ae3SPaolo Bonzini { 4992c50d8ae3SPaolo Bonzini u64 gentry = 0; 4993c50d8ae3SPaolo Bonzini int r; 4994c50d8ae3SPaolo Bonzini 4995c50d8ae3SPaolo Bonzini /* 4996c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 4997c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 4998c50d8ae3SPaolo Bonzini * when they have the same mode. 4999c50d8ae3SPaolo Bonzini */ 5000c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5001c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5002c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5003c50d8ae3SPaolo Bonzini *bytes = 8; 5004c50d8ae3SPaolo Bonzini } 5005c50d8ae3SPaolo Bonzini 5006c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5007c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5008c50d8ae3SPaolo Bonzini if (r) 5009c50d8ae3SPaolo Bonzini gentry = 0; 5010c50d8ae3SPaolo Bonzini } 5011c50d8ae3SPaolo Bonzini 5012c50d8ae3SPaolo Bonzini return gentry; 5013c50d8ae3SPaolo Bonzini } 5014c50d8ae3SPaolo Bonzini 5015c50d8ae3SPaolo Bonzini /* 5016c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5017c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5018c50d8ae3SPaolo Bonzini */ 5019c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5020c50d8ae3SPaolo Bonzini { 5021c50d8ae3SPaolo Bonzini /* 5022c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5023c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5024c50d8ae3SPaolo Bonzini */ 50253bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5026c50d8ae3SPaolo Bonzini return false; 5027c50d8ae3SPaolo Bonzini 5028c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5029c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5030c50d8ae3SPaolo Bonzini } 5031c50d8ae3SPaolo Bonzini 5032c50d8ae3SPaolo Bonzini /* 5033c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5034c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5035c50d8ae3SPaolo Bonzini */ 5036c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5037c50d8ae3SPaolo Bonzini int bytes) 5038c50d8ae3SPaolo Bonzini { 5039c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5040c50d8ae3SPaolo Bonzini 5041c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5042c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5043c50d8ae3SPaolo Bonzini 5044c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5045c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 5046c50d8ae3SPaolo Bonzini 5047c50d8ae3SPaolo Bonzini /* 5048c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5049c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5050c50d8ae3SPaolo Bonzini */ 5051c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5052c50d8ae3SPaolo Bonzini return false; 5053c50d8ae3SPaolo Bonzini 5054c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5055c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5056c50d8ae3SPaolo Bonzini 5057c50d8ae3SPaolo Bonzini return misaligned; 5058c50d8ae3SPaolo Bonzini } 5059c50d8ae3SPaolo Bonzini 5060c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5061c50d8ae3SPaolo Bonzini { 5062c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5063c50d8ae3SPaolo Bonzini u64 *spte; 5064c50d8ae3SPaolo Bonzini int level; 5065c50d8ae3SPaolo Bonzini 5066c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5067c50d8ae3SPaolo Bonzini level = sp->role.level; 5068c50d8ae3SPaolo Bonzini *nspte = 1; 5069c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 5070c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5071c50d8ae3SPaolo Bonzini /* 5072c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5073c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5074c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5075c50d8ae3SPaolo Bonzini */ 5076c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5077c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5078c50d8ae3SPaolo Bonzini page_offset <<= 1; 5079c50d8ae3SPaolo Bonzini *nspte = 2; 5080c50d8ae3SPaolo Bonzini } 5081c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5082c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5083c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5084c50d8ae3SPaolo Bonzini return NULL; 5085c50d8ae3SPaolo Bonzini } 5086c50d8ae3SPaolo Bonzini 5087c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5088c50d8ae3SPaolo Bonzini return spte; 5089c50d8ae3SPaolo Bonzini } 5090c50d8ae3SPaolo Bonzini 5091c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5092c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5093c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5094c50d8ae3SPaolo Bonzini { 5095c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5096c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5097c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5098c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5099c50d8ae3SPaolo Bonzini int npte; 5100c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 5101c50d8ae3SPaolo Bonzini 5102c50d8ae3SPaolo Bonzini /* 5103c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5104c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5105c50d8ae3SPaolo Bonzini */ 5106c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5107c50d8ae3SPaolo Bonzini return; 5108c50d8ae3SPaolo Bonzini 5109c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 5110c50d8ae3SPaolo Bonzini 5111c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5112c50d8ae3SPaolo Bonzini 5113c50d8ae3SPaolo Bonzini /* 5114c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5115d9f6e12fSIngo Molnar * or not since pte prefetch is skipped if it does not have 5116c50d8ae3SPaolo Bonzini * enough objects in the cache. 5117c50d8ae3SPaolo Bonzini */ 5118378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5119c50d8ae3SPaolo Bonzini 5120531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5121c50d8ae3SPaolo Bonzini 5122c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5123c50d8ae3SPaolo Bonzini 5124c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5125c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5126c50d8ae3SPaolo Bonzini 5127c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5128c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5129c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5130c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5131c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5132c50d8ae3SPaolo Bonzini continue; 5133c50d8ae3SPaolo Bonzini } 5134c50d8ae3SPaolo Bonzini 5135c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5136c50d8ae3SPaolo Bonzini if (!spte) 5137c50d8ae3SPaolo Bonzini continue; 5138c50d8ae3SPaolo Bonzini 5139c50d8ae3SPaolo Bonzini local_flush = true; 5140c50d8ae3SPaolo Bonzini while (npte--) { 5141c50d8ae3SPaolo Bonzini entry = *spte; 51422de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5143c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5144c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5145c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5146c50d8ae3SPaolo Bonzini remote_flush = true; 5147c50d8ae3SPaolo Bonzini ++spte; 5148c50d8ae3SPaolo Bonzini } 5149c50d8ae3SPaolo Bonzini } 5150c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5151c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5152531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5153c50d8ae3SPaolo Bonzini } 5154c50d8ae3SPaolo Bonzini 5155736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5156c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5157c50d8ae3SPaolo Bonzini { 515892daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5159c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5160c50d8ae3SPaolo Bonzini 51616948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5162ddce6208SSean Christopherson return RET_PF_RETRY; 5163ddce6208SSean Christopherson 5164c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5165c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5166736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5167c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5168c50d8ae3SPaolo Bonzini goto emulate; 5169c50d8ae3SPaolo Bonzini } 5170c50d8ae3SPaolo Bonzini 5171c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 51727a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 51737a02674dSSean Christopherson lower_32_bits(error_code), false); 517419025e7bSSean Christopherson if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) 51757b367bc9SSean Christopherson return -EIO; 5176c50d8ae3SPaolo Bonzini } 5177c50d8ae3SPaolo Bonzini 5178c50d8ae3SPaolo Bonzini if (r < 0) 5179c50d8ae3SPaolo Bonzini return r; 518083a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 518183a2ba4cSSean Christopherson return 1; 5182c50d8ae3SPaolo Bonzini 5183c50d8ae3SPaolo Bonzini /* 5184c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5185c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5186c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5187c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5188c50d8ae3SPaolo Bonzini * and resume the guest. 5189c50d8ae3SPaolo Bonzini */ 5190c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5191c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5192736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5193c50d8ae3SPaolo Bonzini return 1; 5194c50d8ae3SPaolo Bonzini } 5195c50d8ae3SPaolo Bonzini 5196c50d8ae3SPaolo Bonzini /* 5197c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5198c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5199c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5200c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5201c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5202c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5203c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5204c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5205c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5206c50d8ae3SPaolo Bonzini */ 5207736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 520892daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5209c50d8ae3SPaolo Bonzini emulate: 5210736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5211c50d8ae3SPaolo Bonzini insn_len); 5212c50d8ae3SPaolo Bonzini } 5213c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5214c50d8ae3SPaolo Bonzini 52155efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 52165efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5217c50d8ae3SPaolo Bonzini { 5218c50d8ae3SPaolo Bonzini int i; 5219c50d8ae3SPaolo Bonzini 52205efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 52215efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 52225efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5223c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5224c50d8ae3SPaolo Bonzini return; 5225c50d8ae3SPaolo Bonzini 5226b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 52275efac074SPaolo Bonzini } 52285efac074SPaolo Bonzini 52295efac074SPaolo Bonzini if (!mmu->invlpg) 52305efac074SPaolo Bonzini return; 52315efac074SPaolo Bonzini 52325efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5233c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5234c50d8ae3SPaolo Bonzini 5235c50d8ae3SPaolo Bonzini /* 5236c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5237c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5238c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5239c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5240c50d8ae3SPaolo Bonzini * just always sync it. 5241c50d8ae3SPaolo Bonzini * 5242c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5243c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5244c50d8ae3SPaolo Bonzini * for them. 5245c50d8ae3SPaolo Bonzini */ 5246c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5247c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5248c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 52495efac074SPaolo Bonzini } else { 52505efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 52515efac074SPaolo Bonzini } 52525efac074SPaolo Bonzini } 5253c50d8ae3SPaolo Bonzini 52545efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 52555efac074SPaolo Bonzini { 52565efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5257c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5258c50d8ae3SPaolo Bonzini } 5259c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5260c50d8ae3SPaolo Bonzini 52615efac074SPaolo Bonzini 5262c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5263c50d8ae3SPaolo Bonzini { 5264c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5265c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5266c50d8ae3SPaolo Bonzini uint i; 5267c50d8ae3SPaolo Bonzini 5268c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5269c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5270c50d8ae3SPaolo Bonzini tlb_flush = true; 5271c50d8ae3SPaolo Bonzini } 5272c50d8ae3SPaolo Bonzini 5273c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5274c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5275be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5276c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5277c50d8ae3SPaolo Bonzini tlb_flush = true; 5278c50d8ae3SPaolo Bonzini } 5279c50d8ae3SPaolo Bonzini } 5280c50d8ae3SPaolo Bonzini 5281c50d8ae3SPaolo Bonzini if (tlb_flush) 5282b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5283c50d8ae3SPaolo Bonzini 5284c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5285c50d8ae3SPaolo Bonzini 5286c50d8ae3SPaolo Bonzini /* 5287c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5288c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5289c50d8ae3SPaolo Bonzini * for them. 5290c50d8ae3SPaolo Bonzini */ 5291c50d8ae3SPaolo Bonzini } 5292c50d8ae3SPaolo Bonzini 529383013059SSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 529483013059SSean Christopherson int tdp_huge_page_level) 5295c50d8ae3SPaolo Bonzini { 5296bde77235SSean Christopherson tdp_enabled = enable_tdp; 529783013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5298703c335dSSean Christopherson 5299703c335dSSean Christopherson /* 53001d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5301703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5302703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5303703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5304703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5305703c335dSSean Christopherson */ 5306703c335dSSean Christopherson if (tdp_enabled) 53071d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5308703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 53091d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5310703c335dSSean Christopherson else 53111d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5312c50d8ae3SPaolo Bonzini } 5313bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5314c50d8ae3SPaolo Bonzini 5315c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5316*269e9552SHamza Mahfooz typedef bool (*slot_level_handler) (struct kvm *kvm, 5317*269e9552SHamza Mahfooz struct kvm_rmap_head *rmap_head, 5318*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot); 5319c50d8ae3SPaolo Bonzini 5320c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5321c50d8ae3SPaolo Bonzini static __always_inline bool 5322*269e9552SHamza Mahfooz slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5323c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 53241a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 53251a61b7dbSSean Christopherson bool flush) 5326c50d8ae3SPaolo Bonzini { 5327c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5328c50d8ae3SPaolo Bonzini 5329c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5330c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5331c50d8ae3SPaolo Bonzini if (iterator.rmap) 53320a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5333c50d8ae3SPaolo Bonzini 5334531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5335302695a5SSean Christopherson if (flush && flush_on_yield) { 5336c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5337c50d8ae3SPaolo Bonzini start_gfn, 5338c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5339c50d8ae3SPaolo Bonzini flush = false; 5340c50d8ae3SPaolo Bonzini } 5341531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5342c50d8ae3SPaolo Bonzini } 5343c50d8ae3SPaolo Bonzini } 5344c50d8ae3SPaolo Bonzini 5345c50d8ae3SPaolo Bonzini return flush; 5346c50d8ae3SPaolo Bonzini } 5347c50d8ae3SPaolo Bonzini 5348c50d8ae3SPaolo Bonzini static __always_inline bool 5349*269e9552SHamza Mahfooz slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5350c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5351302695a5SSean Christopherson bool flush_on_yield) 5352c50d8ae3SPaolo Bonzini { 5353c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5354c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5355c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 53561a61b7dbSSean Christopherson flush_on_yield, false); 5357c50d8ae3SPaolo Bonzini } 5358c50d8ae3SPaolo Bonzini 5359c50d8ae3SPaolo Bonzini static __always_inline bool 5360*269e9552SHamza Mahfooz slot_handle_leaf(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5361302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5362c50d8ae3SPaolo Bonzini { 53633bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5364302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5365c50d8ae3SPaolo Bonzini } 5366c50d8ae3SPaolo Bonzini 5367c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5368c50d8ae3SPaolo Bonzini { 53694a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 53704a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5371c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 537203ca4589SSean Christopherson free_page((unsigned long)mmu->pml4_root); 5373c50d8ae3SPaolo Bonzini } 5374c50d8ae3SPaolo Bonzini 537504d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5376c50d8ae3SPaolo Bonzini { 5377c50d8ae3SPaolo Bonzini struct page *page; 5378c50d8ae3SPaolo Bonzini int i; 5379c50d8ae3SPaolo Bonzini 538004d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 538104d28e37SSean Christopherson mmu->root_pgd = 0; 538204d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 538304d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 538404d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 538504d28e37SSean Christopherson 5386c50d8ae3SPaolo Bonzini /* 5387c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5388c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5389c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5390c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 539104d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 539204d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 539304d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 539404d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 539504d45551SSean Christopherson * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots(). 5396c50d8ae3SPaolo Bonzini */ 5397d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5398c50d8ae3SPaolo Bonzini return 0; 5399c50d8ae3SPaolo Bonzini 5400c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5401c50d8ae3SPaolo Bonzini if (!page) 5402c50d8ae3SPaolo Bonzini return -ENOMEM; 5403c50d8ae3SPaolo Bonzini 5404c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 54054a98623dSSean Christopherson 54064a98623dSSean Christopherson /* 54074a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 54084a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 54094a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 54104a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 54114a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 54124a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 54134a98623dSSean Christopherson */ 54144a98623dSSean Christopherson if (!tdp_enabled) 54154a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 54164a98623dSSean Christopherson else 54174a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 54184a98623dSSean Christopherson 5419c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5420c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5421c50d8ae3SPaolo Bonzini 5422c50d8ae3SPaolo Bonzini return 0; 5423c50d8ae3SPaolo Bonzini } 5424c50d8ae3SPaolo Bonzini 5425c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5426c50d8ae3SPaolo Bonzini { 5427c50d8ae3SPaolo Bonzini int ret; 5428c50d8ae3SPaolo Bonzini 54295962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 54305f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 54315f6078f9SSean Christopherson 54325962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 54335f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 54345962bfb7SSean Christopherson 543596880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 543696880883SSean Christopherson 5437c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5438c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5439c50d8ae3SPaolo Bonzini 5440c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5441c50d8ae3SPaolo Bonzini 544204d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5443c50d8ae3SPaolo Bonzini if (ret) 5444c50d8ae3SPaolo Bonzini return ret; 5445c50d8ae3SPaolo Bonzini 544604d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5447c50d8ae3SPaolo Bonzini if (ret) 5448c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5449c50d8ae3SPaolo Bonzini 5450c50d8ae3SPaolo Bonzini return ret; 5451c50d8ae3SPaolo Bonzini fail_allocate_root: 5452c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5453c50d8ae3SPaolo Bonzini return ret; 5454c50d8ae3SPaolo Bonzini } 5455c50d8ae3SPaolo Bonzini 5456c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5457c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5458c50d8ae3SPaolo Bonzini { 5459c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5460c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5461c50d8ae3SPaolo Bonzini 5462c50d8ae3SPaolo Bonzini restart: 5463c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5464c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5465c50d8ae3SPaolo Bonzini /* 5466c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5467c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5468c50d8ae3SPaolo Bonzini */ 5469c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5470c50d8ae3SPaolo Bonzini break; 5471c50d8ae3SPaolo Bonzini 5472c50d8ae3SPaolo Bonzini /* 5473f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5474f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5475f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5476c50d8ae3SPaolo Bonzini */ 5477f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5478c50d8ae3SPaolo Bonzini continue; 5479c50d8ae3SPaolo Bonzini 5480c50d8ae3SPaolo Bonzini /* 5481c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5482c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5483c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5484c50d8ae3SPaolo Bonzini * be in active use by the guest. 5485c50d8ae3SPaolo Bonzini */ 5486c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5487531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5488c50d8ae3SPaolo Bonzini batch = 0; 5489c50d8ae3SPaolo Bonzini goto restart; 5490c50d8ae3SPaolo Bonzini } 5491c50d8ae3SPaolo Bonzini 5492c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5493c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5494c50d8ae3SPaolo Bonzini batch += nr_zapped; 5495c50d8ae3SPaolo Bonzini goto restart; 5496c50d8ae3SPaolo Bonzini } 5497c50d8ae3SPaolo Bonzini } 5498c50d8ae3SPaolo Bonzini 5499c50d8ae3SPaolo Bonzini /* 5500c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5501c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5502c50d8ae3SPaolo Bonzini * may reference the pages. 5503c50d8ae3SPaolo Bonzini */ 5504c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5505c50d8ae3SPaolo Bonzini } 5506c50d8ae3SPaolo Bonzini 5507c50d8ae3SPaolo Bonzini /* 5508c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5509c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5510c50d8ae3SPaolo Bonzini * 5511c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5512c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5513c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5514c50d8ae3SPaolo Bonzini * after calling the function. 5515c50d8ae3SPaolo Bonzini */ 5516c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5517c50d8ae3SPaolo Bonzini { 5518c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5519c50d8ae3SPaolo Bonzini 5520531810caSBen Gardon write_lock(&kvm->mmu_lock); 5521c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5522c50d8ae3SPaolo Bonzini 5523c50d8ae3SPaolo Bonzini /* 5524c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5525c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5526c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5527c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5528c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5529c50d8ae3SPaolo Bonzini */ 5530c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5531c50d8ae3SPaolo Bonzini 5532b7cccd39SBen Gardon /* In order to ensure all threads see this change when 5533b7cccd39SBen Gardon * handling the MMU reload signal, this must happen in the 5534b7cccd39SBen Gardon * same critical section as kvm_reload_remote_mmus, and 5535b7cccd39SBen Gardon * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages 5536b7cccd39SBen Gardon * could drop the MMU lock and yield. 5537b7cccd39SBen Gardon */ 5538b7cccd39SBen Gardon if (is_tdp_mmu_enabled(kvm)) 5539b7cccd39SBen Gardon kvm_tdp_mmu_invalidate_all_roots(kvm); 5540b7cccd39SBen Gardon 5541c50d8ae3SPaolo Bonzini /* 5542c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5543c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5544c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5545c50d8ae3SPaolo Bonzini * 5546c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5547c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5548c50d8ae3SPaolo Bonzini */ 5549c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5550c50d8ae3SPaolo Bonzini 5551c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5552faaf05b0SBen Gardon 5553531810caSBen Gardon write_unlock(&kvm->mmu_lock); 55544c6654bdSBen Gardon 55554c6654bdSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 55564c6654bdSBen Gardon read_lock(&kvm->mmu_lock); 55574c6654bdSBen Gardon kvm_tdp_mmu_zap_invalidated_roots(kvm); 55584c6654bdSBen Gardon read_unlock(&kvm->mmu_lock); 55594c6654bdSBen Gardon } 5560c50d8ae3SPaolo Bonzini } 5561c50d8ae3SPaolo Bonzini 5562c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5563c50d8ae3SPaolo Bonzini { 5564c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5565c50d8ae3SPaolo Bonzini } 5566c50d8ae3SPaolo Bonzini 5567c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5568c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5569c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5570c50d8ae3SPaolo Bonzini { 5571c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5572c50d8ae3SPaolo Bonzini } 5573c50d8ae3SPaolo Bonzini 5574c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5575c50d8ae3SPaolo Bonzini { 5576c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5577c50d8ae3SPaolo Bonzini 5578d501f747SBen Gardon if (!kvm_mmu_init_tdp_mmu(kvm)) 5579d501f747SBen Gardon /* 5580d501f747SBen Gardon * No smp_load/store wrappers needed here as we are in 5581d501f747SBen Gardon * VM init and there cannot be any memslots / other threads 5582d501f747SBen Gardon * accessing this struct kvm yet. 5583d501f747SBen Gardon */ 5584a2557408SBen Gardon kvm->arch.memslots_have_rmaps = true; 5585fe5db27dSBen Gardon 5586c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5587c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5588c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5589c50d8ae3SPaolo Bonzini } 5590c50d8ae3SPaolo Bonzini 5591c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5592c50d8ae3SPaolo Bonzini { 5593c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5594c50d8ae3SPaolo Bonzini 5595c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5596fe5db27dSBen Gardon 5597fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5598c50d8ae3SPaolo Bonzini } 5599c50d8ae3SPaolo Bonzini 5600c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5601c50d8ae3SPaolo Bonzini { 5602c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5603c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5604c50d8ae3SPaolo Bonzini int i; 56051a61b7dbSSean Christopherson bool flush = false; 5606c50d8ae3SPaolo Bonzini 5607e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5608531810caSBen Gardon write_lock(&kvm->mmu_lock); 5609c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5610c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5611c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5612c50d8ae3SPaolo Bonzini gfn_t start, end; 5613c50d8ae3SPaolo Bonzini 5614c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5615c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5616c50d8ae3SPaolo Bonzini if (start >= end) 5617c50d8ae3SPaolo Bonzini continue; 5618c50d8ae3SPaolo Bonzini 5619*269e9552SHamza Mahfooz flush = slot_handle_level_range(kvm, 5620*269e9552SHamza Mahfooz (const struct kvm_memory_slot *) memslot, 5621e2209710SBen Gardon kvm_zap_rmapp, PG_LEVEL_4K, 5622e2209710SBen Gardon KVM_MAX_HUGEPAGE_LEVEL, start, 5623e2209710SBen Gardon end - 1, true, flush); 5624c50d8ae3SPaolo Bonzini } 5625c50d8ae3SPaolo Bonzini } 5626faaf05b0SBen Gardon if (flush) 56271a61b7dbSSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, gfn_end); 5628531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5629e2209710SBen Gardon } 56306103bc07SBen Gardon 56316103bc07SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 56326103bc07SBen Gardon flush = false; 56336103bc07SBen Gardon 56346103bc07SBen Gardon read_lock(&kvm->mmu_lock); 56356103bc07SBen Gardon for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 56366103bc07SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 56376103bc07SBen Gardon gfn_end, flush, true); 56386103bc07SBen Gardon if (flush) 56396103bc07SBen Gardon kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 56406103bc07SBen Gardon gfn_end); 56416103bc07SBen Gardon 56426103bc07SBen Gardon read_unlock(&kvm->mmu_lock); 56436103bc07SBen Gardon } 5644c50d8ae3SPaolo Bonzini } 5645c50d8ae3SPaolo Bonzini 5646c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 56470a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5648*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5649c50d8ae3SPaolo Bonzini { 5650c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5651c50d8ae3SPaolo Bonzini } 5652c50d8ae3SPaolo Bonzini 5653c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 5654*269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot, 56553c9bd400SJay Zhou int start_level) 5656c50d8ae3SPaolo Bonzini { 5657e2209710SBen Gardon bool flush = false; 5658c50d8ae3SPaolo Bonzini 5659e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5660531810caSBen Gardon write_lock(&kvm->mmu_lock); 56613c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5662e2209710SBen Gardon start_level, KVM_MAX_HUGEPAGE_LEVEL, 5663e2209710SBen Gardon false); 5664531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5665e2209710SBen Gardon } 5666c50d8ae3SPaolo Bonzini 566724ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 566824ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 566924ae4cfaSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 567024ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 567124ae4cfaSBen Gardon } 567224ae4cfaSBen Gardon 5673c50d8ae3SPaolo Bonzini /* 5674c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5675c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5676c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5677c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5678c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5679c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 56805fc3424fSSean Christopherson * have checked Host-writable | MMU-writable instead of 56815fc3424fSSean Christopherson * PT_WRITABLE_MASK, that means it does not depend on PT_WRITABLE_MASK 56825fc3424fSSean Christopherson * anymore. 5683c50d8ae3SPaolo Bonzini */ 5684c50d8ae3SPaolo Bonzini if (flush) 56857f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5686c50d8ae3SPaolo Bonzini } 5687c50d8ae3SPaolo Bonzini 5688c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 56890a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5690*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5691c50d8ae3SPaolo Bonzini { 5692c50d8ae3SPaolo Bonzini u64 *sptep; 5693c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5694c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5695c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5696c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5697c50d8ae3SPaolo Bonzini 5698c50d8ae3SPaolo Bonzini restart: 5699c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 570057354682SSean Christopherson sp = sptep_to_sp(sptep); 5701c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5702c50d8ae3SPaolo Bonzini 5703c50d8ae3SPaolo Bonzini /* 5704c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5705c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5706c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5707c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5708c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5709c50d8ae3SPaolo Bonzini */ 5710c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 57119eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 57129eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 5713c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 5714c50d8ae3SPaolo Bonzini 5715c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5716c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5717c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5718c50d8ae3SPaolo Bonzini else 5719c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5720c50d8ae3SPaolo Bonzini 5721c50d8ae3SPaolo Bonzini goto restart; 5722c50d8ae3SPaolo Bonzini } 5723c50d8ae3SPaolo Bonzini } 5724c50d8ae3SPaolo Bonzini 5725c50d8ae3SPaolo Bonzini return need_tlb_flush; 5726c50d8ae3SPaolo Bonzini } 5727c50d8ae3SPaolo Bonzini 5728c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5729*269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5730c50d8ae3SPaolo Bonzini { 573131c65657SColin Ian King bool flush = false; 57329eba50f8SSean Christopherson 5733e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5734531810caSBen Gardon write_lock(&kvm->mmu_lock); 5735302695a5SSean Christopherson flush = slot_handle_leaf(kvm, slot, kvm_mmu_zap_collapsible_spte, true); 5736302695a5SSean Christopherson if (flush) 5737302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 5738531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5739e2209710SBen Gardon } 57402db6f772SBen Gardon 57412db6f772SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57422db6f772SBen Gardon read_lock(&kvm->mmu_lock); 57432db6f772SBen Gardon flush = kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot, flush); 57442db6f772SBen Gardon if (flush) 57452db6f772SBen Gardon kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 57462db6f772SBen Gardon read_unlock(&kvm->mmu_lock); 57472db6f772SBen Gardon } 5748c50d8ae3SPaolo Bonzini } 5749c50d8ae3SPaolo Bonzini 5750b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 57516c9dd6d2SPaolo Bonzini const struct kvm_memory_slot *memslot) 5752b3594ffbSSean Christopherson { 5753b3594ffbSSean Christopherson /* 57547f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5755302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 57567f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 57577f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 57587f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5759b3594ffbSSean Christopherson */ 5760b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5761cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5762cec37648SSean Christopherson memslot->npages); 5763b3594ffbSSean Christopherson } 5764b3594ffbSSean Christopherson 5765c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5766*269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot) 5767c50d8ae3SPaolo Bonzini { 5768e2209710SBen Gardon bool flush = false; 5769c50d8ae3SPaolo Bonzini 5770e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5771531810caSBen Gardon write_lock(&kvm->mmu_lock); 5772e2209710SBen Gardon flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, 5773e2209710SBen Gardon false); 5774531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5775e2209710SBen Gardon } 5776c50d8ae3SPaolo Bonzini 577724ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 577824ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 577924ae4cfaSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 578024ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 578124ae4cfaSBen Gardon } 578224ae4cfaSBen Gardon 5783c50d8ae3SPaolo Bonzini /* 5784c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5785c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5786c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5787c50d8ae3SPaolo Bonzini * dirty_bitmap. 5788c50d8ae3SPaolo Bonzini */ 5789c50d8ae3SPaolo Bonzini if (flush) 57907f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5791c50d8ae3SPaolo Bonzini } 5792c50d8ae3SPaolo Bonzini 5793c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5794c50d8ae3SPaolo Bonzini { 5795c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5796c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5797c50d8ae3SPaolo Bonzini int ign; 5798c50d8ae3SPaolo Bonzini 5799531810caSBen Gardon write_lock(&kvm->mmu_lock); 5800c50d8ae3SPaolo Bonzini restart: 5801c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5802f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5803c50d8ae3SPaolo Bonzini continue; 5804c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5805c50d8ae3SPaolo Bonzini goto restart; 5806531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5807c50d8ae3SPaolo Bonzini goto restart; 5808c50d8ae3SPaolo Bonzini } 5809c50d8ae3SPaolo Bonzini 5810c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5811faaf05b0SBen Gardon 5812897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5813faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5814faaf05b0SBen Gardon 5815531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5816c50d8ae3SPaolo Bonzini } 5817c50d8ae3SPaolo Bonzini 5818c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5819c50d8ae3SPaolo Bonzini { 5820c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5821c50d8ae3SPaolo Bonzini 5822c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5823c50d8ae3SPaolo Bonzini 5824c50d8ae3SPaolo Bonzini /* 5825c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5826c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5827c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5828c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5829c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5830c50d8ae3SPaolo Bonzini */ 5831c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5832c50d8ae3SPaolo Bonzini 5833c50d8ae3SPaolo Bonzini /* 5834c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5835c50d8ae3SPaolo Bonzini * zap all shadow pages. 5836c50d8ae3SPaolo Bonzini */ 5837c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 5838c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 5839c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5840c50d8ae3SPaolo Bonzini } 5841c50d8ae3SPaolo Bonzini } 5842c50d8ae3SPaolo Bonzini 5843c50d8ae3SPaolo Bonzini static unsigned long 5844c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 5845c50d8ae3SPaolo Bonzini { 5846c50d8ae3SPaolo Bonzini struct kvm *kvm; 5847c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 5848c50d8ae3SPaolo Bonzini unsigned long freed = 0; 5849c50d8ae3SPaolo Bonzini 5850c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5851c50d8ae3SPaolo Bonzini 5852c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5853c50d8ae3SPaolo Bonzini int idx; 5854c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5855c50d8ae3SPaolo Bonzini 5856c50d8ae3SPaolo Bonzini /* 5857c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 5858c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 5859c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 5860c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 5861c50d8ae3SPaolo Bonzini */ 5862c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 5863c50d8ae3SPaolo Bonzini break; 5864c50d8ae3SPaolo Bonzini /* 5865c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 5866c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 5867c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 5868c50d8ae3SPaolo Bonzini * anyway. 5869c50d8ae3SPaolo Bonzini */ 5870c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 5871c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 5872c50d8ae3SPaolo Bonzini continue; 5873c50d8ae3SPaolo Bonzini 5874c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 5875531810caSBen Gardon write_lock(&kvm->mmu_lock); 5876c50d8ae3SPaolo Bonzini 5877c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 5878c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 5879c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 5880c50d8ae3SPaolo Bonzini goto unlock; 5881c50d8ae3SPaolo Bonzini } 5882c50d8ae3SPaolo Bonzini 5883ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 5884c50d8ae3SPaolo Bonzini 5885c50d8ae3SPaolo Bonzini unlock: 5886531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5887c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 5888c50d8ae3SPaolo Bonzini 5889c50d8ae3SPaolo Bonzini /* 5890c50d8ae3SPaolo Bonzini * unfair on small ones 5891c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 5892c50d8ae3SPaolo Bonzini * sadness comes quickly 5893c50d8ae3SPaolo Bonzini */ 5894c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 5895c50d8ae3SPaolo Bonzini break; 5896c50d8ae3SPaolo Bonzini } 5897c50d8ae3SPaolo Bonzini 5898c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5899c50d8ae3SPaolo Bonzini return freed; 5900c50d8ae3SPaolo Bonzini } 5901c50d8ae3SPaolo Bonzini 5902c50d8ae3SPaolo Bonzini static unsigned long 5903c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 5904c50d8ae3SPaolo Bonzini { 5905c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 5906c50d8ae3SPaolo Bonzini } 5907c50d8ae3SPaolo Bonzini 5908c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 5909c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 5910c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 5911c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 5912c50d8ae3SPaolo Bonzini }; 5913c50d8ae3SPaolo Bonzini 5914c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 5915c50d8ae3SPaolo Bonzini { 5916c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 5917c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 5918c50d8ae3SPaolo Bonzini } 5919c50d8ae3SPaolo Bonzini 5920c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 5921c50d8ae3SPaolo Bonzini { 5922c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 5923c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 5924c50d8ae3SPaolo Bonzini } 5925c50d8ae3SPaolo Bonzini 5926c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 5927c50d8ae3SPaolo Bonzini { 5928c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 5929c50d8ae3SPaolo Bonzini } 5930c50d8ae3SPaolo Bonzini 5931c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 5932c50d8ae3SPaolo Bonzini { 5933c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 5934c50d8ae3SPaolo Bonzini bool new_val; 5935c50d8ae3SPaolo Bonzini 5936c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 5937c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 5938c50d8ae3SPaolo Bonzini new_val = 0; 5939c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 5940c50d8ae3SPaolo Bonzini new_val = 1; 5941c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 5942c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 5943c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 5944c50d8ae3SPaolo Bonzini return -EINVAL; 5945c50d8ae3SPaolo Bonzini 5946c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 5947c50d8ae3SPaolo Bonzini 5948c50d8ae3SPaolo Bonzini if (new_val != old_val) { 5949c50d8ae3SPaolo Bonzini struct kvm *kvm; 5950c50d8ae3SPaolo Bonzini 5951c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5952c50d8ae3SPaolo Bonzini 5953c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5954c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 5955c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5956c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 5957c50d8ae3SPaolo Bonzini 5958c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5959c50d8ae3SPaolo Bonzini } 5960c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5961c50d8ae3SPaolo Bonzini } 5962c50d8ae3SPaolo Bonzini 5963c50d8ae3SPaolo Bonzini return 0; 5964c50d8ae3SPaolo Bonzini } 5965c50d8ae3SPaolo Bonzini 5966c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 5967c50d8ae3SPaolo Bonzini { 5968c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 5969c50d8ae3SPaolo Bonzini 5970c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 5971c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 5972c50d8ae3SPaolo Bonzini 5973c50d8ae3SPaolo Bonzini /* 5974c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 5975c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 5976c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 5977c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 5978c50d8ae3SPaolo Bonzini */ 5979c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 5980c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 5981c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 5982c50d8ae3SPaolo Bonzini 5983c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 5984c50d8ae3SPaolo Bonzini 5985c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 5986c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 5987c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5988c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 5989c50d8ae3SPaolo Bonzini goto out; 5990c50d8ae3SPaolo Bonzini 5991c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 5992c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 5993c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5994c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 5995c50d8ae3SPaolo Bonzini goto out; 5996c50d8ae3SPaolo Bonzini 5997c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 5998c50d8ae3SPaolo Bonzini goto out; 5999c50d8ae3SPaolo Bonzini 6000c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6001c50d8ae3SPaolo Bonzini if (ret) 6002c50d8ae3SPaolo Bonzini goto out; 6003c50d8ae3SPaolo Bonzini 6004c50d8ae3SPaolo Bonzini return 0; 6005c50d8ae3SPaolo Bonzini 6006c50d8ae3SPaolo Bonzini out: 6007c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6008c50d8ae3SPaolo Bonzini return ret; 6009c50d8ae3SPaolo Bonzini } 6010c50d8ae3SPaolo Bonzini 6011c50d8ae3SPaolo Bonzini /* 6012c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 6013c50d8ae3SPaolo Bonzini */ 6014c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 6015c50d8ae3SPaolo Bonzini { 6016c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 6017c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 6018c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 6019c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 6020c50d8ae3SPaolo Bonzini int i; 6021c50d8ae3SPaolo Bonzini 6022c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 6023c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 6024c50d8ae3SPaolo Bonzini 6025c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 6026c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 6027c50d8ae3SPaolo Bonzini } 6028c50d8ae3SPaolo Bonzini 6029c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 6030c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 6031c50d8ae3SPaolo Bonzini 6032c50d8ae3SPaolo Bonzini return nr_mmu_pages; 6033c50d8ae3SPaolo Bonzini } 6034c50d8ae3SPaolo Bonzini 6035c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6036c50d8ae3SPaolo Bonzini { 6037c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6038c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6039c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6040c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6041c50d8ae3SPaolo Bonzini } 6042c50d8ae3SPaolo Bonzini 6043c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6044c50d8ae3SPaolo Bonzini { 6045c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6046c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6047c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6048c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6049c50d8ae3SPaolo Bonzini } 6050c50d8ae3SPaolo Bonzini 6051c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 6052c50d8ae3SPaolo Bonzini { 6053c50d8ae3SPaolo Bonzini unsigned int old_val; 6054c50d8ae3SPaolo Bonzini int err; 6055c50d8ae3SPaolo Bonzini 6056c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 6057c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6058c50d8ae3SPaolo Bonzini if (err) 6059c50d8ae3SPaolo Bonzini return err; 6060c50d8ae3SPaolo Bonzini 6061c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 6062c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 6063c50d8ae3SPaolo Bonzini struct kvm *kvm; 6064c50d8ae3SPaolo Bonzini 6065c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6066c50d8ae3SPaolo Bonzini 6067c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6068c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6069c50d8ae3SPaolo Bonzini 6070c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6071c50d8ae3SPaolo Bonzini } 6072c50d8ae3SPaolo Bonzini 6073c50d8ae3SPaolo Bonzini return err; 6074c50d8ae3SPaolo Bonzini } 6075c50d8ae3SPaolo Bonzini 6076c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6077c50d8ae3SPaolo Bonzini { 6078ade74e14SSean Christopherson unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; 6079c50d8ae3SPaolo Bonzini int rcu_idx; 6080c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6081c50d8ae3SPaolo Bonzini unsigned int ratio; 6082c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6083048f4980SSean Christopherson bool flush = false; 6084c50d8ae3SPaolo Bonzini ulong to_zap; 6085c50d8ae3SPaolo Bonzini 6086c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6087531810caSBen Gardon write_lock(&kvm->mmu_lock); 6088c50d8ae3SPaolo Bonzini 6089c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6090ade74e14SSean Christopherson to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0; 60917d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 60927d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 60937d919c7aSSean Christopherson break; 60947d919c7aSSean Christopherson 6095c50d8ae3SPaolo Bonzini /* 6096c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6097c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6098c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6099c50d8ae3SPaolo Bonzini */ 6100c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6101c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6102c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6103c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6104897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 6105315f02c6SPaolo Bonzini flush |= kvm_tdp_mmu_zap_sp(kvm, sp); 61068d1a182eSBen Gardon } else { 6107c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6108c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 610929cf0f50SBen Gardon } 6110c50d8ae3SPaolo Bonzini 6111531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 6112048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6113531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 6114048f4980SSean Christopherson flush = false; 6115c50d8ae3SPaolo Bonzini } 6116c50d8ae3SPaolo Bonzini } 6117048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6118c50d8ae3SPaolo Bonzini 6119531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6120c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6121c50d8ae3SPaolo Bonzini } 6122c50d8ae3SPaolo Bonzini 6123c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6124c50d8ae3SPaolo Bonzini { 6125c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6126c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6127c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6128c50d8ae3SPaolo Bonzini } 6129c50d8ae3SPaolo Bonzini 6130c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6131c50d8ae3SPaolo Bonzini { 6132c50d8ae3SPaolo Bonzini u64 start_time; 6133c50d8ae3SPaolo Bonzini long remaining_time; 6134c50d8ae3SPaolo Bonzini 6135c50d8ae3SPaolo Bonzini while (true) { 6136c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6137c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6138c50d8ae3SPaolo Bonzini 6139c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6140c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6141c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6142c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6143c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6144c50d8ae3SPaolo Bonzini } 6145c50d8ae3SPaolo Bonzini 6146c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6147c50d8ae3SPaolo Bonzini 6148c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6149c50d8ae3SPaolo Bonzini return 0; 6150c50d8ae3SPaolo Bonzini 6151c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6152c50d8ae3SPaolo Bonzini } 6153c50d8ae3SPaolo Bonzini } 6154c50d8ae3SPaolo Bonzini 6155c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6156c50d8ae3SPaolo Bonzini { 6157c50d8ae3SPaolo Bonzini int err; 6158c50d8ae3SPaolo Bonzini 6159c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6160c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6161c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6162c50d8ae3SPaolo Bonzini if (!err) 6163c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6164c50d8ae3SPaolo Bonzini 6165c50d8ae3SPaolo Bonzini return err; 6166c50d8ae3SPaolo Bonzini } 6167c50d8ae3SPaolo Bonzini 6168c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6169c50d8ae3SPaolo Bonzini { 6170c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6171c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6172c50d8ae3SPaolo Bonzini } 6173