1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 57c50d8ae3SPaolo Bonzini 58a9d6496dSShaokun Zhang int __read_mostly nx_huge_pages = -1; 59c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 60c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 61c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 62c50d8ae3SPaolo Bonzini #else 63c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 64c50d8ae3SPaolo Bonzini #endif 65c50d8ae3SPaolo Bonzini 66c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 67c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 68c50d8ae3SPaolo Bonzini 69d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 70c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 71c50d8ae3SPaolo Bonzini .get = param_get_bool, 72c50d8ae3SPaolo Bonzini }; 73c50d8ae3SPaolo Bonzini 74d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 75c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 76c50d8ae3SPaolo Bonzini .get = param_get_uint, 77c50d8ae3SPaolo Bonzini }; 78c50d8ae3SPaolo Bonzini 79c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 80c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 81c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 82c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 83c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 84c50d8ae3SPaolo Bonzini 8571fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8671fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8771fe7013SSean Christopherson 88c50d8ae3SPaolo Bonzini /* 89c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 90c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 91c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 92c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 93c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 94c50d8ae3SPaolo Bonzini */ 95c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 96c50d8ae3SPaolo Bonzini 971d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 9883013059SSean Christopherson static int max_tdp_level __read_mostly; 99703c335dSSean Christopherson 100c50d8ae3SPaolo Bonzini enum { 101c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 102c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 103c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 104c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 105c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 106c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 107c50d8ae3SPaolo Bonzini }; 108c50d8ae3SPaolo Bonzini 109c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1105a9624afSPaolo Bonzini bool dbg = 0; 111c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 112c50d8ae3SPaolo Bonzini #endif 113c50d8ae3SPaolo Bonzini 114c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 115c50d8ae3SPaolo Bonzini 116c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 117c50d8ae3SPaolo Bonzini 118c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 119c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 120c50d8ae3SPaolo Bonzini 121c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 122c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 123c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 124c50d8ae3SPaolo Bonzini 125c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 126c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 127c50d8ae3SPaolo Bonzini 128c50d8ae3SPaolo Bonzini 129c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 130c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 131c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 132c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 133c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 134c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 135c50d8ae3SPaolo Bonzini 136c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 137c50d8ae3SPaolo Bonzini 138c50d8ae3SPaolo Bonzini /* make pte_list_desc fit well in cache line */ 139c50d8ae3SPaolo Bonzini #define PTE_LIST_EXT 3 140c50d8ae3SPaolo Bonzini 141c50d8ae3SPaolo Bonzini struct pte_list_desc { 142c50d8ae3SPaolo Bonzini u64 *sptes[PTE_LIST_EXT]; 143c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 144c50d8ae3SPaolo Bonzini }; 145c50d8ae3SPaolo Bonzini 146c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 147c50d8ae3SPaolo Bonzini u64 addr; 148c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 149c50d8ae3SPaolo Bonzini u64 *sptep; 150c50d8ae3SPaolo Bonzini int level; 151c50d8ae3SPaolo Bonzini unsigned index; 152c50d8ae3SPaolo Bonzini }; 153c50d8ae3SPaolo Bonzini 154c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 155c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 156c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 157c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 158c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 159c50d8ae3SPaolo Bonzini 160c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 161c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 162c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 163c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 164c50d8ae3SPaolo Bonzini 165c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 166c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 167c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 168c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 169c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 170c50d8ae3SPaolo Bonzini 171c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 17202c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 173c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 174c50d8ae3SPaolo Bonzini 175c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 176c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 177c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 178c50d8ae3SPaolo Bonzini 179c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 180c50d8ae3SPaolo Bonzini #include "mmutrace.h" 181c50d8ae3SPaolo Bonzini 182c50d8ae3SPaolo Bonzini 183c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 184c50d8ae3SPaolo Bonzini { 185afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 186c50d8ae3SPaolo Bonzini } 187c50d8ae3SPaolo Bonzini 188c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 189c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 190c50d8ae3SPaolo Bonzini { 191c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 192c50d8ae3SPaolo Bonzini 193afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 194b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 195c50d8ae3SPaolo Bonzini 196c50d8ae3SPaolo Bonzini if (ret) 197c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 198c50d8ae3SPaolo Bonzini } 199c50d8ae3SPaolo Bonzini 2002f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 201c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 202c50d8ae3SPaolo Bonzini { 203c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 204c50d8ae3SPaolo Bonzini 205c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 206c50d8ae3SPaolo Bonzini range.pages = pages; 207c50d8ae3SPaolo Bonzini 208c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 209c50d8ae3SPaolo Bonzini } 210c50d8ae3SPaolo Bonzini 2118f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2128f79b064SBen Gardon unsigned int access) 2138f79b064SBen Gardon { 214c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 2158f79b064SBen Gardon 216c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 217c236d962SSean Christopherson mmu_spte_set(sptep, spte); 218c50d8ae3SPaolo Bonzini } 219c50d8ae3SPaolo Bonzini 220c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 221c50d8ae3SPaolo Bonzini { 222c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 223c50d8ae3SPaolo Bonzini 2248a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 225c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 226c50d8ae3SPaolo Bonzini 227c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 228c50d8ae3SPaolo Bonzini } 229c50d8ae3SPaolo Bonzini 230c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 231c50d8ae3SPaolo Bonzini { 232c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 233c50d8ae3SPaolo Bonzini } 234c50d8ae3SPaolo Bonzini 235c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 236c50d8ae3SPaolo Bonzini { 237c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 238c50d8ae3SPaolo Bonzini 239c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 240c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 241c50d8ae3SPaolo Bonzini return false; 242c50d8ae3SPaolo Bonzini 243c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 244c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 245c50d8ae3SPaolo Bonzini 246c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 247c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 248c50d8ae3SPaolo Bonzini } 249c50d8ae3SPaolo Bonzini 250cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 251cd313569SMohammed Gamal struct x86_exception *exception) 252cd313569SMohammed Gamal { 253ec7771abSMohammed Gamal /* Check if guest physical address doesn't exceed guest maximum */ 254dc46515cSSean Christopherson if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) { 255ec7771abSMohammed Gamal exception->error_code |= PFERR_RSVD_MASK; 256ec7771abSMohammed Gamal return UNMAPPED_GVA; 257ec7771abSMohammed Gamal } 258ec7771abSMohammed Gamal 259cd313569SMohammed Gamal return gpa; 260cd313569SMohammed Gamal } 261cd313569SMohammed Gamal 262c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 263c50d8ae3SPaolo Bonzini { 264c50d8ae3SPaolo Bonzini return 1; 265c50d8ae3SPaolo Bonzini } 266c50d8ae3SPaolo Bonzini 267c50d8ae3SPaolo Bonzini static int is_nx(struct kvm_vcpu *vcpu) 268c50d8ae3SPaolo Bonzini { 269c50d8ae3SPaolo Bonzini return vcpu->arch.efer & EFER_NX; 270c50d8ae3SPaolo Bonzini } 271c50d8ae3SPaolo Bonzini 272c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 273c50d8ae3SPaolo Bonzini { 274c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 275c50d8ae3SPaolo Bonzini 276c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 277c50d8ae3SPaolo Bonzini } 278c50d8ae3SPaolo Bonzini 279c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 280c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 281c50d8ae3SPaolo Bonzini { 282c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 283c50d8ae3SPaolo Bonzini } 284c50d8ae3SPaolo Bonzini 285c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 286c50d8ae3SPaolo Bonzini { 287c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 288c50d8ae3SPaolo Bonzini } 289c50d8ae3SPaolo Bonzini 290c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 291c50d8ae3SPaolo Bonzini { 292c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 293c50d8ae3SPaolo Bonzini } 294c50d8ae3SPaolo Bonzini 295c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 296c50d8ae3SPaolo Bonzini { 297c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 298c50d8ae3SPaolo Bonzini } 299c50d8ae3SPaolo Bonzini #else 300c50d8ae3SPaolo Bonzini union split_spte { 301c50d8ae3SPaolo Bonzini struct { 302c50d8ae3SPaolo Bonzini u32 spte_low; 303c50d8ae3SPaolo Bonzini u32 spte_high; 304c50d8ae3SPaolo Bonzini }; 305c50d8ae3SPaolo Bonzini u64 spte; 306c50d8ae3SPaolo Bonzini }; 307c50d8ae3SPaolo Bonzini 308c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 309c50d8ae3SPaolo Bonzini { 31057354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 311c50d8ae3SPaolo Bonzini 312c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 313c50d8ae3SPaolo Bonzini return; 314c50d8ae3SPaolo Bonzini 315c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 316c50d8ae3SPaolo Bonzini smp_wmb(); 317c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 318c50d8ae3SPaolo Bonzini } 319c50d8ae3SPaolo Bonzini 320c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 321c50d8ae3SPaolo Bonzini { 322c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 323c50d8ae3SPaolo Bonzini 324c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 325c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 326c50d8ae3SPaolo Bonzini 327c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 328c50d8ae3SPaolo Bonzini 329c50d8ae3SPaolo Bonzini /* 330c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 331c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 332c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 333c50d8ae3SPaolo Bonzini */ 334c50d8ae3SPaolo Bonzini smp_wmb(); 335c50d8ae3SPaolo Bonzini 336c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 337c50d8ae3SPaolo Bonzini } 338c50d8ae3SPaolo Bonzini 339c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 340c50d8ae3SPaolo Bonzini { 341c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 342c50d8ae3SPaolo Bonzini 343c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 344c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 345c50d8ae3SPaolo Bonzini 346c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 347c50d8ae3SPaolo Bonzini 348c50d8ae3SPaolo Bonzini /* 349c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 350c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 351c50d8ae3SPaolo Bonzini */ 352c50d8ae3SPaolo Bonzini smp_wmb(); 353c50d8ae3SPaolo Bonzini 354c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 355c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 356c50d8ae3SPaolo Bonzini } 357c50d8ae3SPaolo Bonzini 358c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 359c50d8ae3SPaolo Bonzini { 360c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 361c50d8ae3SPaolo Bonzini 362c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 363c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 364c50d8ae3SPaolo Bonzini 365c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 366c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 367c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 368c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 369c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 370c50d8ae3SPaolo Bonzini 371c50d8ae3SPaolo Bonzini return orig.spte; 372c50d8ae3SPaolo Bonzini } 373c50d8ae3SPaolo Bonzini 374c50d8ae3SPaolo Bonzini /* 375c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 376c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 377c50d8ae3SPaolo Bonzini * 378c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 379c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 380c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 381c50d8ae3SPaolo Bonzini * 382c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 383c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 384c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 385c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 386c50d8ae3SPaolo Bonzini * 387c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 388c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 389c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 390c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 391c50d8ae3SPaolo Bonzini */ 392c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 393c50d8ae3SPaolo Bonzini { 39457354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 395c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 396c50d8ae3SPaolo Bonzini int count; 397c50d8ae3SPaolo Bonzini 398c50d8ae3SPaolo Bonzini retry: 399c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 400c50d8ae3SPaolo Bonzini smp_rmb(); 401c50d8ae3SPaolo Bonzini 402c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 403c50d8ae3SPaolo Bonzini smp_rmb(); 404c50d8ae3SPaolo Bonzini 405c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 406c50d8ae3SPaolo Bonzini smp_rmb(); 407c50d8ae3SPaolo Bonzini 408c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 409c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 410c50d8ae3SPaolo Bonzini goto retry; 411c50d8ae3SPaolo Bonzini 412c50d8ae3SPaolo Bonzini return spte.spte; 413c50d8ae3SPaolo Bonzini } 414c50d8ae3SPaolo Bonzini #endif 415c50d8ae3SPaolo Bonzini 416c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 417c50d8ae3SPaolo Bonzini { 418c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 419c50d8ae3SPaolo Bonzini return false; 420c50d8ae3SPaolo Bonzini 421c50d8ae3SPaolo Bonzini /* 422c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 423c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 424c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 425c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 426c50d8ae3SPaolo Bonzini */ 427c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 428c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 429c50d8ae3SPaolo Bonzini return true; 430c50d8ae3SPaolo Bonzini 431c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 432c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 433c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 434c50d8ae3SPaolo Bonzini return true; 435c50d8ae3SPaolo Bonzini } 436c50d8ae3SPaolo Bonzini 437c50d8ae3SPaolo Bonzini return false; 438c50d8ae3SPaolo Bonzini } 439c50d8ae3SPaolo Bonzini 440c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 441c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 442c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 443c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 444c50d8ae3SPaolo Bonzini * the spte. 445c50d8ae3SPaolo Bonzini */ 446c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 447c50d8ae3SPaolo Bonzini { 448c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 449c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 450c50d8ae3SPaolo Bonzini } 451c50d8ae3SPaolo Bonzini 452c50d8ae3SPaolo Bonzini /* 453c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 454c50d8ae3SPaolo Bonzini * accessed/dirty status. 455c50d8ae3SPaolo Bonzini */ 456c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 457c50d8ae3SPaolo Bonzini { 458c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 459c50d8ae3SPaolo Bonzini 460c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 461c50d8ae3SPaolo Bonzini 462c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 463c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 464c50d8ae3SPaolo Bonzini return old_spte; 465c50d8ae3SPaolo Bonzini } 466c50d8ae3SPaolo Bonzini 467c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 468c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 469c50d8ae3SPaolo Bonzini else 470c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 471c50d8ae3SPaolo Bonzini 472c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 473c50d8ae3SPaolo Bonzini 474c50d8ae3SPaolo Bonzini return old_spte; 475c50d8ae3SPaolo Bonzini } 476c50d8ae3SPaolo Bonzini 477c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 478c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 479c50d8ae3SPaolo Bonzini * 480c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 481c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 482c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 483c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 484c50d8ae3SPaolo Bonzini * case. 485c50d8ae3SPaolo Bonzini * 486c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 487c50d8ae3SPaolo Bonzini */ 488c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 489c50d8ae3SPaolo Bonzini { 490c50d8ae3SPaolo Bonzini bool flush = false; 491c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 492c50d8ae3SPaolo Bonzini 493c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 494c50d8ae3SPaolo Bonzini return false; 495c50d8ae3SPaolo Bonzini 496c50d8ae3SPaolo Bonzini /* 497c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 498c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 499c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 500c50d8ae3SPaolo Bonzini */ 501c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 502c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 503c50d8ae3SPaolo Bonzini flush = true; 504c50d8ae3SPaolo Bonzini 505c50d8ae3SPaolo Bonzini /* 506c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 507c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 508c50d8ae3SPaolo Bonzini */ 509c50d8ae3SPaolo Bonzini 510c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 511c50d8ae3SPaolo Bonzini flush = true; 512c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 513c50d8ae3SPaolo Bonzini } 514c50d8ae3SPaolo Bonzini 515c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 516c50d8ae3SPaolo Bonzini flush = true; 517c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 518c50d8ae3SPaolo Bonzini } 519c50d8ae3SPaolo Bonzini 520c50d8ae3SPaolo Bonzini return flush; 521c50d8ae3SPaolo Bonzini } 522c50d8ae3SPaolo Bonzini 523c50d8ae3SPaolo Bonzini /* 524c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 525c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 526c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 527c50d8ae3SPaolo Bonzini * Returns non-zero if the PTE was previously valid. 528c50d8ae3SPaolo Bonzini */ 529c50d8ae3SPaolo Bonzini static int mmu_spte_clear_track_bits(u64 *sptep) 530c50d8ae3SPaolo Bonzini { 531c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 532c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 533c50d8ae3SPaolo Bonzini 534c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 535c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 536c50d8ae3SPaolo Bonzini else 537c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 538c50d8ae3SPaolo Bonzini 539c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 540c50d8ae3SPaolo Bonzini return 0; 541c50d8ae3SPaolo Bonzini 542c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 543c50d8ae3SPaolo Bonzini 544c50d8ae3SPaolo Bonzini /* 545c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 546c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 547c50d8ae3SPaolo Bonzini * unmap it from mmu first. 548c50d8ae3SPaolo Bonzini */ 549c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 550c50d8ae3SPaolo Bonzini 551c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 552c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 553c50d8ae3SPaolo Bonzini 554c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 555c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 556c50d8ae3SPaolo Bonzini 557c50d8ae3SPaolo Bonzini return 1; 558c50d8ae3SPaolo Bonzini } 559c50d8ae3SPaolo Bonzini 560c50d8ae3SPaolo Bonzini /* 561c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 562c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 563c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 564c50d8ae3SPaolo Bonzini */ 565c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 566c50d8ae3SPaolo Bonzini { 567c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 568c50d8ae3SPaolo Bonzini } 569c50d8ae3SPaolo Bonzini 570c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 571c50d8ae3SPaolo Bonzini { 572c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 573c50d8ae3SPaolo Bonzini } 574c50d8ae3SPaolo Bonzini 575c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 576c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 577c50d8ae3SPaolo Bonzini { 578c50d8ae3SPaolo Bonzini u64 new_spte = spte; 5798a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 5808a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 581c50d8ae3SPaolo Bonzini 582c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 583c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 584c50d8ae3SPaolo Bonzini 585c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 5868a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 5878a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 588c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 589c50d8ae3SPaolo Bonzini 590c50d8ae3SPaolo Bonzini return new_spte; 591c50d8ae3SPaolo Bonzini } 592c50d8ae3SPaolo Bonzini 593c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 594c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 595c50d8ae3SPaolo Bonzini { 596c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 597c50d8ae3SPaolo Bonzini 598c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 599c50d8ae3SPaolo Bonzini return false; 600c50d8ae3SPaolo Bonzini 601c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 602c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 603c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 604c50d8ae3SPaolo Bonzini } else { 605c50d8ae3SPaolo Bonzini /* 606c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 607c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 608c50d8ae3SPaolo Bonzini */ 609c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 610c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 611c50d8ae3SPaolo Bonzini 612c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 613c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 614c50d8ae3SPaolo Bonzini } 615c50d8ae3SPaolo Bonzini 616c50d8ae3SPaolo Bonzini return true; 617c50d8ae3SPaolo Bonzini } 618c50d8ae3SPaolo Bonzini 619c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 620c50d8ae3SPaolo Bonzini { 621c50d8ae3SPaolo Bonzini /* 622c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 623c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 624c50d8ae3SPaolo Bonzini */ 625c50d8ae3SPaolo Bonzini local_irq_disable(); 626c50d8ae3SPaolo Bonzini 627c50d8ae3SPaolo Bonzini /* 628c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 629c50d8ae3SPaolo Bonzini * to vcpu->mode. 630c50d8ae3SPaolo Bonzini */ 631c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 632c50d8ae3SPaolo Bonzini } 633c50d8ae3SPaolo Bonzini 634c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 635c50d8ae3SPaolo Bonzini { 636c50d8ae3SPaolo Bonzini /* 637c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 638c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 639c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 640c50d8ae3SPaolo Bonzini */ 641c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 642c50d8ae3SPaolo Bonzini local_irq_enable(); 643c50d8ae3SPaolo Bonzini } 644c50d8ae3SPaolo Bonzini 645378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 646c50d8ae3SPaolo Bonzini { 647c50d8ae3SPaolo Bonzini int r; 648c50d8ae3SPaolo Bonzini 649531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 65094ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 651531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 652c50d8ae3SPaolo Bonzini if (r) 653c50d8ae3SPaolo Bonzini return r; 65494ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 655171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 656171a90d7SSean Christopherson if (r) 657171a90d7SSean Christopherson return r; 658378f5cd6SSean Christopherson if (maybe_indirect) { 65994ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 660171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 661c50d8ae3SPaolo Bonzini if (r) 662c50d8ae3SPaolo Bonzini return r; 663378f5cd6SSean Christopherson } 66494ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 665531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 666c50d8ae3SPaolo Bonzini } 667c50d8ae3SPaolo Bonzini 668c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 669c50d8ae3SPaolo Bonzini { 67094ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 67194ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 67294ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 67394ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 674c50d8ae3SPaolo Bonzini } 675c50d8ae3SPaolo Bonzini 676c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 677c50d8ae3SPaolo Bonzini { 67894ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 679c50d8ae3SPaolo Bonzini } 680c50d8ae3SPaolo Bonzini 681c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 682c50d8ae3SPaolo Bonzini { 683c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 684c50d8ae3SPaolo Bonzini } 685c50d8ae3SPaolo Bonzini 686c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 687c50d8ae3SPaolo Bonzini { 688c50d8ae3SPaolo Bonzini if (!sp->role.direct) 689c50d8ae3SPaolo Bonzini return sp->gfns[index]; 690c50d8ae3SPaolo Bonzini 691c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 692c50d8ae3SPaolo Bonzini } 693c50d8ae3SPaolo Bonzini 694c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 695c50d8ae3SPaolo Bonzini { 696c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 697c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 698c50d8ae3SPaolo Bonzini return; 699c50d8ae3SPaolo Bonzini } 700c50d8ae3SPaolo Bonzini 701c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 702c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 703c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 704c50d8ae3SPaolo Bonzini sp->gfn, 705c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 706c50d8ae3SPaolo Bonzini } 707c50d8ae3SPaolo Bonzini 708c50d8ae3SPaolo Bonzini /* 709c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 710c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 711c50d8ae3SPaolo Bonzini */ 712c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 7138ca6f063SBen Gardon const struct kvm_memory_slot *slot, int level) 714c50d8ae3SPaolo Bonzini { 715c50d8ae3SPaolo Bonzini unsigned long idx; 716c50d8ae3SPaolo Bonzini 717c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 718c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 719c50d8ae3SPaolo Bonzini } 720c50d8ae3SPaolo Bonzini 721c50d8ae3SPaolo Bonzini static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot, 722c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 723c50d8ae3SPaolo Bonzini { 724c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 725c50d8ae3SPaolo Bonzini int i; 726c50d8ae3SPaolo Bonzini 7273bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 728c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 729c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 730c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 731c50d8ae3SPaolo Bonzini } 732c50d8ae3SPaolo Bonzini } 733c50d8ae3SPaolo Bonzini 734c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 735c50d8ae3SPaolo Bonzini { 736c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 737c50d8ae3SPaolo Bonzini } 738c50d8ae3SPaolo Bonzini 739c50d8ae3SPaolo Bonzini void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) 740c50d8ae3SPaolo Bonzini { 741c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 742c50d8ae3SPaolo Bonzini } 743c50d8ae3SPaolo Bonzini 744c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 745c50d8ae3SPaolo Bonzini { 746c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 747c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 748c50d8ae3SPaolo Bonzini gfn_t gfn; 749c50d8ae3SPaolo Bonzini 750c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 751c50d8ae3SPaolo Bonzini gfn = sp->gfn; 752c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 753c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 754c50d8ae3SPaolo Bonzini 755c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 7563bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 757c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 758c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 759c50d8ae3SPaolo Bonzini 760c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 761c50d8ae3SPaolo Bonzini } 762c50d8ae3SPaolo Bonzini 76329cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 764c50d8ae3SPaolo Bonzini { 765c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 766c50d8ae3SPaolo Bonzini return; 767c50d8ae3SPaolo Bonzini 768c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 769c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 770c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 771c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 772c50d8ae3SPaolo Bonzini } 773c50d8ae3SPaolo Bonzini 774c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 775c50d8ae3SPaolo Bonzini { 776c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 777c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 778c50d8ae3SPaolo Bonzini gfn_t gfn; 779c50d8ae3SPaolo Bonzini 780c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 781c50d8ae3SPaolo Bonzini gfn = sp->gfn; 782c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 783c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 7843bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 785c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 786c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 787c50d8ae3SPaolo Bonzini 788c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 789c50d8ae3SPaolo Bonzini } 790c50d8ae3SPaolo Bonzini 79129cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 792c50d8ae3SPaolo Bonzini { 793c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 794c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 795c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 796c50d8ae3SPaolo Bonzini } 797c50d8ae3SPaolo Bonzini 798c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 799c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 800c50d8ae3SPaolo Bonzini bool no_dirty_log) 801c50d8ae3SPaolo Bonzini { 802c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 803c50d8ae3SPaolo Bonzini 804c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 80591b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 80691b0d268SPaolo Bonzini return NULL; 807044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 80891b0d268SPaolo Bonzini return NULL; 809c50d8ae3SPaolo Bonzini 810c50d8ae3SPaolo Bonzini return slot; 811c50d8ae3SPaolo Bonzini } 812c50d8ae3SPaolo Bonzini 813c50d8ae3SPaolo Bonzini /* 814c50d8ae3SPaolo Bonzini * About rmap_head encoding: 815c50d8ae3SPaolo Bonzini * 816c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 817c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 818c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 819c50d8ae3SPaolo Bonzini */ 820c50d8ae3SPaolo Bonzini 821c50d8ae3SPaolo Bonzini /* 822c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 823c50d8ae3SPaolo Bonzini */ 824c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 825c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 826c50d8ae3SPaolo Bonzini { 827c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 828c50d8ae3SPaolo Bonzini int i, count = 0; 829c50d8ae3SPaolo Bonzini 830c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 831805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 832c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 833c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 834805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 835c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 836c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 837c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 838c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 839c50d8ae3SPaolo Bonzini ++count; 840c50d8ae3SPaolo Bonzini } else { 841805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 842c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 843c6c4f961SLi RongQing while (desc->sptes[PTE_LIST_EXT-1]) { 844c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 845c6c4f961SLi RongQing 846c6c4f961SLi RongQing if (!desc->more) { 847c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 848c50d8ae3SPaolo Bonzini desc = desc->more; 849c6c4f961SLi RongQing break; 850c6c4f961SLi RongQing } 851c6c4f961SLi RongQing desc = desc->more; 852c50d8ae3SPaolo Bonzini } 853c50d8ae3SPaolo Bonzini for (i = 0; desc->sptes[i]; ++i) 854c50d8ae3SPaolo Bonzini ++count; 855c50d8ae3SPaolo Bonzini desc->sptes[i] = spte; 856c50d8ae3SPaolo Bonzini } 857c50d8ae3SPaolo Bonzini return count; 858c50d8ae3SPaolo Bonzini } 859c50d8ae3SPaolo Bonzini 860c50d8ae3SPaolo Bonzini static void 861c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 862c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 863c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 864c50d8ae3SPaolo Bonzini { 865c50d8ae3SPaolo Bonzini int j; 866c50d8ae3SPaolo Bonzini 867c50d8ae3SPaolo Bonzini for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) 868c50d8ae3SPaolo Bonzini ; 869c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 870c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 871c50d8ae3SPaolo Bonzini if (j != 0) 872c50d8ae3SPaolo Bonzini return; 873c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 874fe3c2b4cSMiaohe Lin rmap_head->val = 0; 875c50d8ae3SPaolo Bonzini else 876c50d8ae3SPaolo Bonzini if (prev_desc) 877c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 878c50d8ae3SPaolo Bonzini else 879c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 880c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 881c50d8ae3SPaolo Bonzini } 882c50d8ae3SPaolo Bonzini 883c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 884c50d8ae3SPaolo Bonzini { 885c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 886c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 887c50d8ae3SPaolo Bonzini int i; 888c50d8ae3SPaolo Bonzini 889c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 890c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 891c50d8ae3SPaolo Bonzini BUG(); 892c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 893805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 894c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 895c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 896c50d8ae3SPaolo Bonzini BUG(); 897c50d8ae3SPaolo Bonzini } 898c50d8ae3SPaolo Bonzini rmap_head->val = 0; 899c50d8ae3SPaolo Bonzini } else { 900805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 901c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 902c50d8ae3SPaolo Bonzini prev_desc = NULL; 903c50d8ae3SPaolo Bonzini while (desc) { 904c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { 905c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 906c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 907c50d8ae3SPaolo Bonzini desc, i, prev_desc); 908c50d8ae3SPaolo Bonzini return; 909c50d8ae3SPaolo Bonzini } 910c50d8ae3SPaolo Bonzini } 911c50d8ae3SPaolo Bonzini prev_desc = desc; 912c50d8ae3SPaolo Bonzini desc = desc->more; 913c50d8ae3SPaolo Bonzini } 914c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 915c50d8ae3SPaolo Bonzini BUG(); 916c50d8ae3SPaolo Bonzini } 917c50d8ae3SPaolo Bonzini } 918c50d8ae3SPaolo Bonzini 919c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 920c50d8ae3SPaolo Bonzini { 921c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 922c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 923c50d8ae3SPaolo Bonzini } 924c50d8ae3SPaolo Bonzini 925c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 926c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot) 927c50d8ae3SPaolo Bonzini { 928c50d8ae3SPaolo Bonzini unsigned long idx; 929c50d8ae3SPaolo Bonzini 930c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 9313bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 932c50d8ae3SPaolo Bonzini } 933c50d8ae3SPaolo Bonzini 934c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 935c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 936c50d8ae3SPaolo Bonzini { 937c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 938c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 939c50d8ae3SPaolo Bonzini 940c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 941c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 942c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 943c50d8ae3SPaolo Bonzini } 944c50d8ae3SPaolo Bonzini 945c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 946c50d8ae3SPaolo Bonzini { 947356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 948c50d8ae3SPaolo Bonzini 949356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 95094ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 951c50d8ae3SPaolo Bonzini } 952c50d8ae3SPaolo Bonzini 953c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 954c50d8ae3SPaolo Bonzini { 955c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 956c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 957c50d8ae3SPaolo Bonzini 95857354682SSean Christopherson sp = sptep_to_sp(spte); 959c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 960c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 961c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 962c50d8ae3SPaolo Bonzini } 963c50d8ae3SPaolo Bonzini 964c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 965c50d8ae3SPaolo Bonzini { 966c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 967c50d8ae3SPaolo Bonzini gfn_t gfn; 968c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 969c50d8ae3SPaolo Bonzini 97057354682SSean Christopherson sp = sptep_to_sp(spte); 971c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 972c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 973c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 974c50d8ae3SPaolo Bonzini } 975c50d8ae3SPaolo Bonzini 976c50d8ae3SPaolo Bonzini /* 977c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 978c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 979c50d8ae3SPaolo Bonzini */ 980c50d8ae3SPaolo Bonzini struct rmap_iterator { 981c50d8ae3SPaolo Bonzini /* private fields */ 982c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 983c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 984c50d8ae3SPaolo Bonzini }; 985c50d8ae3SPaolo Bonzini 986c50d8ae3SPaolo Bonzini /* 987c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 988c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 9890a03cbdaSMiaohe Lin * information in the iterator may not be valid. 990c50d8ae3SPaolo Bonzini * 991c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 992c50d8ae3SPaolo Bonzini */ 993c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 994c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 995c50d8ae3SPaolo Bonzini { 996c50d8ae3SPaolo Bonzini u64 *sptep; 997c50d8ae3SPaolo Bonzini 998c50d8ae3SPaolo Bonzini if (!rmap_head->val) 999c50d8ae3SPaolo Bonzini return NULL; 1000c50d8ae3SPaolo Bonzini 1001c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1002c50d8ae3SPaolo Bonzini iter->desc = NULL; 1003c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1004c50d8ae3SPaolo Bonzini goto out; 1005c50d8ae3SPaolo Bonzini } 1006c50d8ae3SPaolo Bonzini 1007c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1008c50d8ae3SPaolo Bonzini iter->pos = 0; 1009c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1010c50d8ae3SPaolo Bonzini out: 1011c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1012c50d8ae3SPaolo Bonzini return sptep; 1013c50d8ae3SPaolo Bonzini } 1014c50d8ae3SPaolo Bonzini 1015c50d8ae3SPaolo Bonzini /* 1016c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1017c50d8ae3SPaolo Bonzini * 1018c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1019c50d8ae3SPaolo Bonzini */ 1020c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1021c50d8ae3SPaolo Bonzini { 1022c50d8ae3SPaolo Bonzini u64 *sptep; 1023c50d8ae3SPaolo Bonzini 1024c50d8ae3SPaolo Bonzini if (iter->desc) { 1025c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1026c50d8ae3SPaolo Bonzini ++iter->pos; 1027c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1028c50d8ae3SPaolo Bonzini if (sptep) 1029c50d8ae3SPaolo Bonzini goto out; 1030c50d8ae3SPaolo Bonzini } 1031c50d8ae3SPaolo Bonzini 1032c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1033c50d8ae3SPaolo Bonzini 1034c50d8ae3SPaolo Bonzini if (iter->desc) { 1035c50d8ae3SPaolo Bonzini iter->pos = 0; 1036c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1037c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1038c50d8ae3SPaolo Bonzini goto out; 1039c50d8ae3SPaolo Bonzini } 1040c50d8ae3SPaolo Bonzini } 1041c50d8ae3SPaolo Bonzini 1042c50d8ae3SPaolo Bonzini return NULL; 1043c50d8ae3SPaolo Bonzini out: 1044c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1045c50d8ae3SPaolo Bonzini return sptep; 1046c50d8ae3SPaolo Bonzini } 1047c50d8ae3SPaolo Bonzini 1048c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1049c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1050c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1051c50d8ae3SPaolo Bonzini 1052c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1053c50d8ae3SPaolo Bonzini { 1054c50d8ae3SPaolo Bonzini if (mmu_spte_clear_track_bits(sptep)) 1055c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1056c50d8ae3SPaolo Bonzini } 1057c50d8ae3SPaolo Bonzini 1058c50d8ae3SPaolo Bonzini 1059c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1060c50d8ae3SPaolo Bonzini { 1061c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 106257354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1063c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1064c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1065c50d8ae3SPaolo Bonzini return true; 1066c50d8ae3SPaolo Bonzini } 1067c50d8ae3SPaolo Bonzini 1068c50d8ae3SPaolo Bonzini return false; 1069c50d8ae3SPaolo Bonzini } 1070c50d8ae3SPaolo Bonzini 1071c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1072c50d8ae3SPaolo Bonzini { 1073c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 107457354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1075c50d8ae3SPaolo Bonzini 1076c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1077c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1078c50d8ae3SPaolo Bonzini } 1079c50d8ae3SPaolo Bonzini } 1080c50d8ae3SPaolo Bonzini 1081c50d8ae3SPaolo Bonzini /* 1082c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1083c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1084c50d8ae3SPaolo Bonzini * 1085c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1086c50d8ae3SPaolo Bonzini * protection: 1087c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1088c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1089c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1090c50d8ae3SPaolo Bonzini * shadow page. 1091c50d8ae3SPaolo Bonzini * 1092c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1093c50d8ae3SPaolo Bonzini */ 1094c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1095c50d8ae3SPaolo Bonzini { 1096c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1097c50d8ae3SPaolo Bonzini 1098c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1099c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1100c50d8ae3SPaolo Bonzini return false; 1101c50d8ae3SPaolo Bonzini 1102805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1103c50d8ae3SPaolo Bonzini 1104c50d8ae3SPaolo Bonzini if (pt_protect) 11055fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1106c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1107c50d8ae3SPaolo Bonzini 1108c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1109c50d8ae3SPaolo Bonzini } 1110c50d8ae3SPaolo Bonzini 1111c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1112c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1113c50d8ae3SPaolo Bonzini bool pt_protect) 1114c50d8ae3SPaolo Bonzini { 1115c50d8ae3SPaolo Bonzini u64 *sptep; 1116c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1117c50d8ae3SPaolo Bonzini bool flush = false; 1118c50d8ae3SPaolo Bonzini 1119c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1120c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1121c50d8ae3SPaolo Bonzini 1122c50d8ae3SPaolo Bonzini return flush; 1123c50d8ae3SPaolo Bonzini } 1124c50d8ae3SPaolo Bonzini 1125c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1126c50d8ae3SPaolo Bonzini { 1127c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1128c50d8ae3SPaolo Bonzini 1129805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1130c50d8ae3SPaolo Bonzini 1131c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1132c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1133c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1134c50d8ae3SPaolo Bonzini } 1135c50d8ae3SPaolo Bonzini 1136c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1137c50d8ae3SPaolo Bonzini { 1138c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1139c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1140c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1141c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1142c50d8ae3SPaolo Bonzini 1143c50d8ae3SPaolo Bonzini return was_writable; 1144c50d8ae3SPaolo Bonzini } 1145c50d8ae3SPaolo Bonzini 1146c50d8ae3SPaolo Bonzini /* 1147c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1148c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1149c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1150c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1151c50d8ae3SPaolo Bonzini */ 11520a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 11530a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1154c50d8ae3SPaolo Bonzini { 1155c50d8ae3SPaolo Bonzini u64 *sptep; 1156c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1157c50d8ae3SPaolo Bonzini bool flush = false; 1158c50d8ae3SPaolo Bonzini 1159c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1160c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1161c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1162c50d8ae3SPaolo Bonzini else 1163c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1164c50d8ae3SPaolo Bonzini 1165c50d8ae3SPaolo Bonzini return flush; 1166c50d8ae3SPaolo Bonzini } 1167c50d8ae3SPaolo Bonzini 1168c50d8ae3SPaolo Bonzini /** 1169c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1170c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1171c50d8ae3SPaolo Bonzini * @slot: slot to protect 1172c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1173c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1174c50d8ae3SPaolo Bonzini * 117589212919SKeqian Zhu * Used when we do not need to care about huge page mappings. 1176c50d8ae3SPaolo Bonzini */ 1177c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1178c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1179c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1180c50d8ae3SPaolo Bonzini { 1181c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1182c50d8ae3SPaolo Bonzini 1183897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1184a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1185a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1186e2209710SBen Gardon 1187e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1188e2209710SBen Gardon return; 1189e2209710SBen Gardon 1190c50d8ae3SPaolo Bonzini while (mask) { 1191c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 11923bae0459SSean Christopherson PG_LEVEL_4K, slot); 1193c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1194c50d8ae3SPaolo Bonzini 1195c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1196c50d8ae3SPaolo Bonzini mask &= mask - 1; 1197c50d8ae3SPaolo Bonzini } 1198c50d8ae3SPaolo Bonzini } 1199c50d8ae3SPaolo Bonzini 1200c50d8ae3SPaolo Bonzini /** 1201c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1202c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1203c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1204c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1205c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1206c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1207c50d8ae3SPaolo Bonzini * 1208c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1209c50d8ae3SPaolo Bonzini */ 1210a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1211c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1212c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1213c50d8ae3SPaolo Bonzini { 1214c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1215c50d8ae3SPaolo Bonzini 1216897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1217a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1218a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1219e2209710SBen Gardon 1220e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1221e2209710SBen Gardon return; 1222e2209710SBen Gardon 1223c50d8ae3SPaolo Bonzini while (mask) { 1224c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12253bae0459SSean Christopherson PG_LEVEL_4K, slot); 12260a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1227c50d8ae3SPaolo Bonzini 1228c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1229c50d8ae3SPaolo Bonzini mask &= mask - 1; 1230c50d8ae3SPaolo Bonzini } 1231c50d8ae3SPaolo Bonzini } 1232c50d8ae3SPaolo Bonzini 1233c50d8ae3SPaolo Bonzini /** 1234c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1235c50d8ae3SPaolo Bonzini * PT level pages. 1236c50d8ae3SPaolo Bonzini * 1237c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1238c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1239c50d8ae3SPaolo Bonzini * 124089212919SKeqian Zhu * We need to care about huge page mappings: e.g. during dirty logging we may 124189212919SKeqian Zhu * have such mappings. 1242c50d8ae3SPaolo Bonzini */ 1243c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1244c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1245c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1246c50d8ae3SPaolo Bonzini { 124789212919SKeqian Zhu /* 124889212919SKeqian Zhu * Huge pages are NOT write protected when we start dirty logging in 124989212919SKeqian Zhu * initially-all-set mode; must write protect them here so that they 125089212919SKeqian Zhu * are split to 4K on the first write. 125189212919SKeqian Zhu * 125289212919SKeqian Zhu * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn 125389212919SKeqian Zhu * of memslot has no such restriction, so the range can cross two large 125489212919SKeqian Zhu * pages. 125589212919SKeqian Zhu */ 125689212919SKeqian Zhu if (kvm_dirty_log_manual_protect_and_init_set(kvm)) { 125789212919SKeqian Zhu gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); 125889212919SKeqian Zhu gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); 125989212919SKeqian Zhu 126089212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M); 126189212919SKeqian Zhu 126289212919SKeqian Zhu /* Cross two large pages? */ 126389212919SKeqian Zhu if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) != 126489212919SKeqian Zhu ALIGN(end << PAGE_SHIFT, PMD_SIZE)) 126589212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, end, 126689212919SKeqian Zhu PG_LEVEL_2M); 126789212919SKeqian Zhu } 126889212919SKeqian Zhu 126989212919SKeqian Zhu /* Now handle 4K PTEs. */ 1270a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1271a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1272c50d8ae3SPaolo Bonzini else 1273c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1274c50d8ae3SPaolo Bonzini } 1275c50d8ae3SPaolo Bonzini 1276fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1277fb04a1edSPeter Xu { 12786dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1279fb04a1edSPeter Xu } 1280fb04a1edSPeter Xu 1281c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 12823ad93562SKeqian Zhu struct kvm_memory_slot *slot, u64 gfn, 12833ad93562SKeqian Zhu int min_level) 1284c50d8ae3SPaolo Bonzini { 1285c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1286c50d8ae3SPaolo Bonzini int i; 1287c50d8ae3SPaolo Bonzini bool write_protected = false; 1288c50d8ae3SPaolo Bonzini 1289e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 12903ad93562SKeqian Zhu for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1291c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1292c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1293c50d8ae3SPaolo Bonzini } 1294e2209710SBen Gardon } 1295c50d8ae3SPaolo Bonzini 1296897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 129746044f72SBen Gardon write_protected |= 12983ad93562SKeqian Zhu kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level); 129946044f72SBen Gardon 1300c50d8ae3SPaolo Bonzini return write_protected; 1301c50d8ae3SPaolo Bonzini } 1302c50d8ae3SPaolo Bonzini 1303c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1304c50d8ae3SPaolo Bonzini { 1305c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1306c50d8ae3SPaolo Bonzini 1307c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 13083ad93562SKeqian Zhu return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); 1309c50d8ae3SPaolo Bonzini } 1310c50d8ae3SPaolo Bonzini 13110a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 13120a234f5dSSean Christopherson struct kvm_memory_slot *slot) 1313c50d8ae3SPaolo Bonzini { 1314c50d8ae3SPaolo Bonzini u64 *sptep; 1315c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1316c50d8ae3SPaolo Bonzini bool flush = false; 1317c50d8ae3SPaolo Bonzini 1318c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1319805a0f83SStephen Zhang rmap_printk("spte %p %llx.\n", sptep, *sptep); 1320c50d8ae3SPaolo Bonzini 1321c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1322c50d8ae3SPaolo Bonzini flush = true; 1323c50d8ae3SPaolo Bonzini } 1324c50d8ae3SPaolo Bonzini 1325c50d8ae3SPaolo Bonzini return flush; 1326c50d8ae3SPaolo Bonzini } 1327c50d8ae3SPaolo Bonzini 13283039bcc7SSean Christopherson static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1329c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 13303039bcc7SSean Christopherson pte_t unused) 1331c50d8ae3SPaolo Bonzini { 13320a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1333c50d8ae3SPaolo Bonzini } 1334c50d8ae3SPaolo Bonzini 13353039bcc7SSean Christopherson static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1336c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 13373039bcc7SSean Christopherson pte_t pte) 1338c50d8ae3SPaolo Bonzini { 1339c50d8ae3SPaolo Bonzini u64 *sptep; 1340c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1341c50d8ae3SPaolo Bonzini int need_flush = 0; 1342c50d8ae3SPaolo Bonzini u64 new_spte; 1343c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1344c50d8ae3SPaolo Bonzini 13453039bcc7SSean Christopherson WARN_ON(pte_huge(pte)); 13463039bcc7SSean Christopherson new_pfn = pte_pfn(pte); 1347c50d8ae3SPaolo Bonzini 1348c50d8ae3SPaolo Bonzini restart: 1349c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1350805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1351c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1352c50d8ae3SPaolo Bonzini 1353c50d8ae3SPaolo Bonzini need_flush = 1; 1354c50d8ae3SPaolo Bonzini 13553039bcc7SSean Christopherson if (pte_write(pte)) { 1356c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1357c50d8ae3SPaolo Bonzini goto restart; 1358c50d8ae3SPaolo Bonzini } else { 1359cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1360cb3eedabSPaolo Bonzini *sptep, new_pfn); 1361c50d8ae3SPaolo Bonzini 1362c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1363c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1364c50d8ae3SPaolo Bonzini } 1365c50d8ae3SPaolo Bonzini } 1366c50d8ae3SPaolo Bonzini 1367c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1368c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1369c50d8ae3SPaolo Bonzini return 0; 1370c50d8ae3SPaolo Bonzini } 1371c50d8ae3SPaolo Bonzini 1372c50d8ae3SPaolo Bonzini return need_flush; 1373c50d8ae3SPaolo Bonzini } 1374c50d8ae3SPaolo Bonzini 1375c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1376c50d8ae3SPaolo Bonzini /* input fields. */ 1377c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1378c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1379c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1380c50d8ae3SPaolo Bonzini int start_level; 1381c50d8ae3SPaolo Bonzini int end_level; 1382c50d8ae3SPaolo Bonzini 1383c50d8ae3SPaolo Bonzini /* output fields. */ 1384c50d8ae3SPaolo Bonzini gfn_t gfn; 1385c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1386c50d8ae3SPaolo Bonzini int level; 1387c50d8ae3SPaolo Bonzini 1388c50d8ae3SPaolo Bonzini /* private field. */ 1389c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1390c50d8ae3SPaolo Bonzini }; 1391c50d8ae3SPaolo Bonzini 1392c50d8ae3SPaolo Bonzini static void 1393c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1394c50d8ae3SPaolo Bonzini { 1395c50d8ae3SPaolo Bonzini iterator->level = level; 1396c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1397c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1398c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1399c50d8ae3SPaolo Bonzini iterator->slot); 1400c50d8ae3SPaolo Bonzini } 1401c50d8ae3SPaolo Bonzini 1402c50d8ae3SPaolo Bonzini static void 1403c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1404c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, int start_level, 1405c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1406c50d8ae3SPaolo Bonzini { 1407c50d8ae3SPaolo Bonzini iterator->slot = slot; 1408c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1409c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1410c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1411c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1412c50d8ae3SPaolo Bonzini 1413c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1414c50d8ae3SPaolo Bonzini } 1415c50d8ae3SPaolo Bonzini 1416c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1417c50d8ae3SPaolo Bonzini { 1418c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1419c50d8ae3SPaolo Bonzini } 1420c50d8ae3SPaolo Bonzini 1421c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1422c50d8ae3SPaolo Bonzini { 1423c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1424c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1425c50d8ae3SPaolo Bonzini return; 1426c50d8ae3SPaolo Bonzini } 1427c50d8ae3SPaolo Bonzini 1428c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1429c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1430c50d8ae3SPaolo Bonzini return; 1431c50d8ae3SPaolo Bonzini } 1432c50d8ae3SPaolo Bonzini 1433c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1434c50d8ae3SPaolo Bonzini } 1435c50d8ae3SPaolo Bonzini 1436c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1437c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1438c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1439c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1440c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1441c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1442c50d8ae3SPaolo Bonzini 14433039bcc7SSean Christopherson typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1444c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 14453039bcc7SSean Christopherson int level, pte_t pte); 1446c1b91493SSean Christopherson 14473039bcc7SSean Christopherson static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm, 14483039bcc7SSean Christopherson struct kvm_gfn_range *range, 1449c1b91493SSean Christopherson rmap_handler_t handler) 1450c50d8ae3SPaolo Bonzini { 1451c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 14523039bcc7SSean Christopherson bool ret = false; 1453c50d8ae3SPaolo Bonzini 14543039bcc7SSean Christopherson for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 14553039bcc7SSean Christopherson range->start, range->end - 1, &iterator) 14563039bcc7SSean Christopherson ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, 14573039bcc7SSean Christopherson iterator.level, range->pte); 1458c50d8ae3SPaolo Bonzini 1459c50d8ae3SPaolo Bonzini return ret; 1460c50d8ae3SPaolo Bonzini } 1461c50d8ae3SPaolo Bonzini 14623039bcc7SSean Christopherson bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 1463c50d8ae3SPaolo Bonzini { 1464e2209710SBen Gardon bool flush = false; 1465c50d8ae3SPaolo Bonzini 1466e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 14673039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp); 1468063afacdSBen Gardon 1469897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 14703039bcc7SSean Christopherson flush |= kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush); 1471063afacdSBen Gardon 14723039bcc7SSean Christopherson return flush; 1473c50d8ae3SPaolo Bonzini } 1474c50d8ae3SPaolo Bonzini 14753039bcc7SSean Christopherson bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1476c50d8ae3SPaolo Bonzini { 1477e2209710SBen Gardon bool flush = false; 14781d8dd6b3SBen Gardon 1479e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 14803039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp); 14811d8dd6b3SBen Gardon 1482897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 14833039bcc7SSean Christopherson flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range); 14841d8dd6b3SBen Gardon 14853039bcc7SSean Christopherson return flush; 1486c50d8ae3SPaolo Bonzini } 1487c50d8ae3SPaolo Bonzini 14883039bcc7SSean Christopherson static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1489c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14903039bcc7SSean Christopherson pte_t unused) 1491c50d8ae3SPaolo Bonzini { 1492c50d8ae3SPaolo Bonzini u64 *sptep; 14933f649ab7SKees Cook struct rmap_iterator iter; 1494c50d8ae3SPaolo Bonzini int young = 0; 1495c50d8ae3SPaolo Bonzini 1496c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1497c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1498c50d8ae3SPaolo Bonzini 1499c50d8ae3SPaolo Bonzini return young; 1500c50d8ae3SPaolo Bonzini } 1501c50d8ae3SPaolo Bonzini 15023039bcc7SSean Christopherson static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1503c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 15043039bcc7SSean Christopherson int level, pte_t unused) 1505c50d8ae3SPaolo Bonzini { 1506c50d8ae3SPaolo Bonzini u64 *sptep; 1507c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1508c50d8ae3SPaolo Bonzini 1509c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1510c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1511c50d8ae3SPaolo Bonzini return 1; 1512c50d8ae3SPaolo Bonzini return 0; 1513c50d8ae3SPaolo Bonzini } 1514c50d8ae3SPaolo Bonzini 1515c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1516c50d8ae3SPaolo Bonzini 1517c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1518c50d8ae3SPaolo Bonzini { 1519c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1520c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1521c50d8ae3SPaolo Bonzini 152257354682SSean Christopherson sp = sptep_to_sp(spte); 1523c50d8ae3SPaolo Bonzini 1524c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1525c50d8ae3SPaolo Bonzini 15263039bcc7SSean Christopherson kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0)); 1527c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1528c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1529c50d8ae3SPaolo Bonzini } 1530c50d8ae3SPaolo Bonzini 15313039bcc7SSean Christopherson bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1532c50d8ae3SPaolo Bonzini { 1533e2209710SBen Gardon bool young = false; 1534f8e14497SBen Gardon 1535e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15363039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp); 15373039bcc7SSean Christopherson 1538897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15393039bcc7SSean Christopherson young |= kvm_tdp_mmu_age_gfn_range(kvm, range); 1540f8e14497SBen Gardon 1541f8e14497SBen Gardon return young; 1542c50d8ae3SPaolo Bonzini } 1543c50d8ae3SPaolo Bonzini 15443039bcc7SSean Christopherson bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1545c50d8ae3SPaolo Bonzini { 1546e2209710SBen Gardon bool young = false; 1547f8e14497SBen Gardon 1548e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15493039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp); 15503039bcc7SSean Christopherson 1551897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15523039bcc7SSean Christopherson young |= kvm_tdp_mmu_test_age_gfn(kvm, range); 1553f8e14497SBen Gardon 1554f8e14497SBen Gardon return young; 1555c50d8ae3SPaolo Bonzini } 1556c50d8ae3SPaolo Bonzini 1557c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1558c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1559c50d8ae3SPaolo Bonzini { 1560c50d8ae3SPaolo Bonzini u64 *pos; 1561c50d8ae3SPaolo Bonzini u64 *end; 1562c50d8ae3SPaolo Bonzini 1563c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1564c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1565c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1566c50d8ae3SPaolo Bonzini pos, *pos); 1567c50d8ae3SPaolo Bonzini return 0; 1568c50d8ae3SPaolo Bonzini } 1569c50d8ae3SPaolo Bonzini return 1; 1570c50d8ae3SPaolo Bonzini } 1571c50d8ae3SPaolo Bonzini #endif 1572c50d8ae3SPaolo Bonzini 1573c50d8ae3SPaolo Bonzini /* 1574c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1575c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1576c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1577c50d8ae3SPaolo Bonzini * faster 1578c50d8ae3SPaolo Bonzini */ 1579c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 1580c50d8ae3SPaolo Bonzini { 1581c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1582c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1583c50d8ae3SPaolo Bonzini } 1584c50d8ae3SPaolo Bonzini 1585c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1586c50d8ae3SPaolo Bonzini { 1587c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1588c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1589c50d8ae3SPaolo Bonzini list_del(&sp->link); 1590c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1591c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1592c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1593c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1594c50d8ae3SPaolo Bonzini } 1595c50d8ae3SPaolo Bonzini 1596c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1597c50d8ae3SPaolo Bonzini { 1598c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1599c50d8ae3SPaolo Bonzini } 1600c50d8ae3SPaolo Bonzini 1601c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1602c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1603c50d8ae3SPaolo Bonzini { 1604c50d8ae3SPaolo Bonzini if (!parent_pte) 1605c50d8ae3SPaolo Bonzini return; 1606c50d8ae3SPaolo Bonzini 1607c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1608c50d8ae3SPaolo Bonzini } 1609c50d8ae3SPaolo Bonzini 1610c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1611c50d8ae3SPaolo Bonzini u64 *parent_pte) 1612c50d8ae3SPaolo Bonzini { 1613c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1614c50d8ae3SPaolo Bonzini } 1615c50d8ae3SPaolo Bonzini 1616c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1617c50d8ae3SPaolo Bonzini u64 *parent_pte) 1618c50d8ae3SPaolo Bonzini { 1619c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1620c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1621c50d8ae3SPaolo Bonzini } 1622c50d8ae3SPaolo Bonzini 1623c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1624c50d8ae3SPaolo Bonzini { 1625c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1626c50d8ae3SPaolo Bonzini 162794ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 162894ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1629c50d8ae3SPaolo Bonzini if (!direct) 163094ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1631c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1632c50d8ae3SPaolo Bonzini 1633c50d8ae3SPaolo Bonzini /* 1634c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1635c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1636c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1637c50d8ae3SPaolo Bonzini */ 1638c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1639c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1640c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1641c50d8ae3SPaolo Bonzini return sp; 1642c50d8ae3SPaolo Bonzini } 1643c50d8ae3SPaolo Bonzini 1644c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1645c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1646c50d8ae3SPaolo Bonzini { 1647c50d8ae3SPaolo Bonzini u64 *sptep; 1648c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1649c50d8ae3SPaolo Bonzini 1650c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1651c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1652c50d8ae3SPaolo Bonzini } 1653c50d8ae3SPaolo Bonzini } 1654c50d8ae3SPaolo Bonzini 1655c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1656c50d8ae3SPaolo Bonzini { 1657c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1658c50d8ae3SPaolo Bonzini unsigned int index; 1659c50d8ae3SPaolo Bonzini 166057354682SSean Christopherson sp = sptep_to_sp(spte); 1661c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1662c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1663c50d8ae3SPaolo Bonzini return; 1664c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1665c50d8ae3SPaolo Bonzini return; 1666c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1667c50d8ae3SPaolo Bonzini } 1668c50d8ae3SPaolo Bonzini 1669c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1670c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1671c50d8ae3SPaolo Bonzini { 1672c50d8ae3SPaolo Bonzini return 0; 1673c50d8ae3SPaolo Bonzini } 1674c50d8ae3SPaolo Bonzini 1675c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1676c50d8ae3SPaolo Bonzini 1677c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1678c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1679c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1680c50d8ae3SPaolo Bonzini unsigned int idx; 1681c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1682c50d8ae3SPaolo Bonzini unsigned int nr; 1683c50d8ae3SPaolo Bonzini }; 1684c50d8ae3SPaolo Bonzini 1685c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1686c50d8ae3SPaolo Bonzini int idx) 1687c50d8ae3SPaolo Bonzini { 1688c50d8ae3SPaolo Bonzini int i; 1689c50d8ae3SPaolo Bonzini 1690c50d8ae3SPaolo Bonzini if (sp->unsync) 1691c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1692c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1693c50d8ae3SPaolo Bonzini return 0; 1694c50d8ae3SPaolo Bonzini 1695c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1696c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1697c50d8ae3SPaolo Bonzini pvec->nr++; 1698c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1699c50d8ae3SPaolo Bonzini } 1700c50d8ae3SPaolo Bonzini 1701c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1702c50d8ae3SPaolo Bonzini { 1703c50d8ae3SPaolo Bonzini --sp->unsync_children; 1704c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1705c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1706c50d8ae3SPaolo Bonzini } 1707c50d8ae3SPaolo Bonzini 1708c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1709c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1710c50d8ae3SPaolo Bonzini { 1711c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1712c50d8ae3SPaolo Bonzini 1713c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1714c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1715c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1716c50d8ae3SPaolo Bonzini 1717c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1718c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1719c50d8ae3SPaolo Bonzini continue; 1720c50d8ae3SPaolo Bonzini } 1721c50d8ae3SPaolo Bonzini 1722e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1723c50d8ae3SPaolo Bonzini 1724c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1725c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1726c50d8ae3SPaolo Bonzini return -ENOSPC; 1727c50d8ae3SPaolo Bonzini 1728c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1729c50d8ae3SPaolo Bonzini if (!ret) { 1730c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1731c50d8ae3SPaolo Bonzini continue; 1732c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1733c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1734c50d8ae3SPaolo Bonzini } else 1735c50d8ae3SPaolo Bonzini return ret; 1736c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1737c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1738c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1739c50d8ae3SPaolo Bonzini return -ENOSPC; 1740c50d8ae3SPaolo Bonzini } else 1741c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1742c50d8ae3SPaolo Bonzini } 1743c50d8ae3SPaolo Bonzini 1744c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1745c50d8ae3SPaolo Bonzini } 1746c50d8ae3SPaolo Bonzini 1747c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1748c50d8ae3SPaolo Bonzini 1749c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1750c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1751c50d8ae3SPaolo Bonzini { 1752c50d8ae3SPaolo Bonzini pvec->nr = 0; 1753c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1754c50d8ae3SPaolo Bonzini return 0; 1755c50d8ae3SPaolo Bonzini 1756c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1757c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1758c50d8ae3SPaolo Bonzini } 1759c50d8ae3SPaolo Bonzini 1760c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1761c50d8ae3SPaolo Bonzini { 1762c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1763c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1764c50d8ae3SPaolo Bonzini sp->unsync = 0; 1765c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1766c50d8ae3SPaolo Bonzini } 1767c50d8ae3SPaolo Bonzini 1768c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1769c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1770c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1771c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1772c50d8ae3SPaolo Bonzini 1773ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1774ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1775c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1776c50d8ae3SPaolo Bonzini } else 1777c50d8ae3SPaolo Bonzini 1778c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1779ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1780ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1781c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1782c50d8ae3SPaolo Bonzini 1783479a1efcSSean Christopherson static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1784c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1785c50d8ae3SPaolo Bonzini { 17862640b086SSean Christopherson if (vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 1787c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1788c50d8ae3SPaolo Bonzini return false; 1789c50d8ae3SPaolo Bonzini } 1790c50d8ae3SPaolo Bonzini 1791c50d8ae3SPaolo Bonzini return true; 1792c50d8ae3SPaolo Bonzini } 1793c50d8ae3SPaolo Bonzini 1794c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1795c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1796c50d8ae3SPaolo Bonzini bool remote_flush) 1797c50d8ae3SPaolo Bonzini { 1798c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1799c50d8ae3SPaolo Bonzini return false; 1800c50d8ae3SPaolo Bonzini 1801c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1802c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1803c50d8ae3SPaolo Bonzini else 1804c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1805c50d8ae3SPaolo Bonzini return true; 1806c50d8ae3SPaolo Bonzini } 1807c50d8ae3SPaolo Bonzini 1808c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 1809c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1810c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 1811c50d8ae3SPaolo Bonzini { 1812c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 1813c50d8ae3SPaolo Bonzini return; 1814c50d8ae3SPaolo Bonzini 1815c50d8ae3SPaolo Bonzini if (local_flush) 18168c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 1817c50d8ae3SPaolo Bonzini } 1818c50d8ae3SPaolo Bonzini 1819c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1820c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1821c50d8ae3SPaolo Bonzini #else 1822c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1823c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1824c50d8ae3SPaolo Bonzini #endif 1825c50d8ae3SPaolo Bonzini 1826c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1827c50d8ae3SPaolo Bonzini { 1828c50d8ae3SPaolo Bonzini return sp->role.invalid || 1829c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1830c50d8ae3SPaolo Bonzini } 1831c50d8ae3SPaolo Bonzini 1832c50d8ae3SPaolo Bonzini struct mmu_page_path { 1833c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1834c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1835c50d8ae3SPaolo Bonzini }; 1836c50d8ae3SPaolo Bonzini 1837c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1838c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1839c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1840c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1841c50d8ae3SPaolo Bonzini 1842c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1843c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1844c50d8ae3SPaolo Bonzini int i) 1845c50d8ae3SPaolo Bonzini { 1846c50d8ae3SPaolo Bonzini int n; 1847c50d8ae3SPaolo Bonzini 1848c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1849c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1850c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1851c50d8ae3SPaolo Bonzini int level = sp->role.level; 1852c50d8ae3SPaolo Bonzini 1853c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 18543bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1855c50d8ae3SPaolo Bonzini break; 1856c50d8ae3SPaolo Bonzini 1857c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1858c50d8ae3SPaolo Bonzini } 1859c50d8ae3SPaolo Bonzini 1860c50d8ae3SPaolo Bonzini return n; 1861c50d8ae3SPaolo Bonzini } 1862c50d8ae3SPaolo Bonzini 1863c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1864c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1865c50d8ae3SPaolo Bonzini { 1866c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1867c50d8ae3SPaolo Bonzini int level; 1868c50d8ae3SPaolo Bonzini 1869c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1870c50d8ae3SPaolo Bonzini return 0; 1871c50d8ae3SPaolo Bonzini 1872c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1873c50d8ae3SPaolo Bonzini 1874c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1875c50d8ae3SPaolo Bonzini level = sp->role.level; 18763bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1877c50d8ae3SPaolo Bonzini 1878c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1879c50d8ae3SPaolo Bonzini 1880c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1881c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1882c50d8ae3SPaolo Bonzini */ 1883c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1884c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1885c50d8ae3SPaolo Bonzini } 1886c50d8ae3SPaolo Bonzini 1887c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1888c50d8ae3SPaolo Bonzini { 1889c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1890c50d8ae3SPaolo Bonzini unsigned int level = 0; 1891c50d8ae3SPaolo Bonzini 1892c50d8ae3SPaolo Bonzini do { 1893c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 1894c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 1895c50d8ae3SPaolo Bonzini if (!sp) 1896c50d8ae3SPaolo Bonzini return; 1897c50d8ae3SPaolo Bonzini 1898c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 1899c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 1900c50d8ae3SPaolo Bonzini level++; 1901c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 1902c50d8ae3SPaolo Bonzini } 1903c50d8ae3SPaolo Bonzini 1904c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 1905c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 1906c50d8ae3SPaolo Bonzini { 1907c50d8ae3SPaolo Bonzini int i; 1908c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1909c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 1910c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 1911c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1912c50d8ae3SPaolo Bonzini bool flush = false; 1913c50d8ae3SPaolo Bonzini 1914c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 1915c50d8ae3SPaolo Bonzini bool protected = false; 1916c50d8ae3SPaolo Bonzini 1917c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 1918c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 1919c50d8ae3SPaolo Bonzini 1920c50d8ae3SPaolo Bonzini if (protected) { 1921c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 1922c50d8ae3SPaolo Bonzini flush = false; 1923c50d8ae3SPaolo Bonzini } 1924c50d8ae3SPaolo Bonzini 1925c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 1926479a1efcSSean Christopherson kvm_unlink_unsync_page(vcpu->kvm, sp); 1927c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 1928c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 1929c50d8ae3SPaolo Bonzini } 1930531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 1931c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 1932531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 1933c50d8ae3SPaolo Bonzini flush = false; 1934c50d8ae3SPaolo Bonzini } 1935c50d8ae3SPaolo Bonzini } 1936c50d8ae3SPaolo Bonzini 1937c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 1938c50d8ae3SPaolo Bonzini } 1939c50d8ae3SPaolo Bonzini 1940c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 1941c50d8ae3SPaolo Bonzini { 1942c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 1943c50d8ae3SPaolo Bonzini } 1944c50d8ae3SPaolo Bonzini 1945c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 1946c50d8ae3SPaolo Bonzini { 194757354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 1948c50d8ae3SPaolo Bonzini } 1949c50d8ae3SPaolo Bonzini 1950c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 1951c50d8ae3SPaolo Bonzini gfn_t gfn, 1952c50d8ae3SPaolo Bonzini gva_t gaddr, 1953c50d8ae3SPaolo Bonzini unsigned level, 1954c50d8ae3SPaolo Bonzini int direct, 19550a2b64c5SBen Gardon unsigned int access) 1956c50d8ae3SPaolo Bonzini { 1957fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 1958c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 1959ac101b7cSSean Christopherson struct hlist_head *sp_list; 1960c50d8ae3SPaolo Bonzini unsigned quadrant; 1961c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1962c50d8ae3SPaolo Bonzini int collisions = 0; 1963c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1964c50d8ae3SPaolo Bonzini 1965c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 1966c50d8ae3SPaolo Bonzini role.level = level; 1967c50d8ae3SPaolo Bonzini role.direct = direct; 1968c50d8ae3SPaolo Bonzini if (role.direct) 1969c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 1970c50d8ae3SPaolo Bonzini role.access = access; 1971fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 1972c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 1973c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 1974c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 1975c50d8ae3SPaolo Bonzini } 1976ac101b7cSSean Christopherson 1977ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 1978ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 1979c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 1980c50d8ae3SPaolo Bonzini collisions++; 1981c50d8ae3SPaolo Bonzini continue; 1982c50d8ae3SPaolo Bonzini } 1983c50d8ae3SPaolo Bonzini 1984ddc16abbSSean Christopherson if (sp->role.word != role.word) { 1985ddc16abbSSean Christopherson /* 1986ddc16abbSSean Christopherson * If the guest is creating an upper-level page, zap 1987ddc16abbSSean Christopherson * unsync pages for the same gfn. While it's possible 1988ddc16abbSSean Christopherson * the guest is using recursive page tables, in all 1989ddc16abbSSean Christopherson * likelihood the guest has stopped using the unsync 1990ddc16abbSSean Christopherson * page and is installing a completely unrelated page. 1991ddc16abbSSean Christopherson * Unsync pages must not be left as is, because the new 1992ddc16abbSSean Christopherson * upper-level page will be write-protected. 1993ddc16abbSSean Christopherson */ 1994ddc16abbSSean Christopherson if (level > PG_LEVEL_4K && sp->unsync) 1995ddc16abbSSean Christopherson kvm_mmu_prepare_zap_page(vcpu->kvm, sp, 1996ddc16abbSSean Christopherson &invalid_list); 1997c50d8ae3SPaolo Bonzini continue; 1998ddc16abbSSean Christopherson } 1999c50d8ae3SPaolo Bonzini 2000fb58a9c3SSean Christopherson if (direct_mmu) 2001fb58a9c3SSean Christopherson goto trace_get_page; 2002fb58a9c3SSean Christopherson 2003c50d8ae3SPaolo Bonzini if (sp->unsync) { 200407dc4f35SSean Christopherson /* 2005479a1efcSSean Christopherson * The page is good, but is stale. kvm_sync_page does 200607dc4f35SSean Christopherson * get the latest guest state, but (unlike mmu_unsync_children) 200707dc4f35SSean Christopherson * it doesn't write-protect the page or mark it synchronized! 200807dc4f35SSean Christopherson * This way the validity of the mapping is ensured, but the 200907dc4f35SSean Christopherson * overhead of write protection is not incurred until the 201007dc4f35SSean Christopherson * guest invalidates the TLB mapping. This allows multiple 201107dc4f35SSean Christopherson * SPs for a single gfn to be unsync. 201207dc4f35SSean Christopherson * 201307dc4f35SSean Christopherson * If the sync fails, the page is zapped. If so, break 201407dc4f35SSean Christopherson * in order to rebuild it. 2015c50d8ae3SPaolo Bonzini */ 2016479a1efcSSean Christopherson if (!kvm_sync_page(vcpu, sp, &invalid_list)) 2017c50d8ae3SPaolo Bonzini break; 2018c50d8ae3SPaolo Bonzini 2019c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 20208c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2021c50d8ae3SPaolo Bonzini } 2022c50d8ae3SPaolo Bonzini 2023c50d8ae3SPaolo Bonzini if (sp->unsync_children) 2024f6f6195bSLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 2025c50d8ae3SPaolo Bonzini 2026c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2027fb58a9c3SSean Christopherson 2028fb58a9c3SSean Christopherson trace_get_page: 2029c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2030c50d8ae3SPaolo Bonzini goto out; 2031c50d8ae3SPaolo Bonzini } 2032c50d8ae3SPaolo Bonzini 2033c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2034c50d8ae3SPaolo Bonzini 2035c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2036c50d8ae3SPaolo Bonzini 2037c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2038c50d8ae3SPaolo Bonzini sp->role = role; 2039ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2040c50d8ae3SPaolo Bonzini if (!direct) { 2041c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 20423bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2043c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2044c50d8ae3SPaolo Bonzini } 2045c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2046c50d8ae3SPaolo Bonzini out: 2047ddc16abbSSean Christopherson kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 2048ddc16abbSSean Christopherson 2049c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2050c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2051c50d8ae3SPaolo Bonzini return sp; 2052c50d8ae3SPaolo Bonzini } 2053c50d8ae3SPaolo Bonzini 2054c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2055c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2056c50d8ae3SPaolo Bonzini u64 addr) 2057c50d8ae3SPaolo Bonzini { 2058c50d8ae3SPaolo Bonzini iterator->addr = addr; 2059c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2060c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2061c50d8ae3SPaolo Bonzini 2062c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2063c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2064c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2065c50d8ae3SPaolo Bonzini --iterator->level; 2066c50d8ae3SPaolo Bonzini 2067c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2068c50d8ae3SPaolo Bonzini /* 2069c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2070c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2071c50d8ae3SPaolo Bonzini */ 2072c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2073c50d8ae3SPaolo Bonzini 2074c50d8ae3SPaolo Bonzini iterator->shadow_addr 2075c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2076c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2077c50d8ae3SPaolo Bonzini --iterator->level; 2078c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2079c50d8ae3SPaolo Bonzini iterator->level = 0; 2080c50d8ae3SPaolo Bonzini } 2081c50d8ae3SPaolo Bonzini } 2082c50d8ae3SPaolo Bonzini 2083c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2084c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2085c50d8ae3SPaolo Bonzini { 2086c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2087c50d8ae3SPaolo Bonzini addr); 2088c50d8ae3SPaolo Bonzini } 2089c50d8ae3SPaolo Bonzini 2090c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2091c50d8ae3SPaolo Bonzini { 20923bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2093c50d8ae3SPaolo Bonzini return false; 2094c50d8ae3SPaolo Bonzini 2095c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2096c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2097c50d8ae3SPaolo Bonzini return true; 2098c50d8ae3SPaolo Bonzini } 2099c50d8ae3SPaolo Bonzini 2100c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2101c50d8ae3SPaolo Bonzini u64 spte) 2102c50d8ae3SPaolo Bonzini { 2103c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2104c50d8ae3SPaolo Bonzini iterator->level = 0; 2105c50d8ae3SPaolo Bonzini return; 2106c50d8ae3SPaolo Bonzini } 2107c50d8ae3SPaolo Bonzini 2108c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2109c50d8ae3SPaolo Bonzini --iterator->level; 2110c50d8ae3SPaolo Bonzini } 2111c50d8ae3SPaolo Bonzini 2112c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2113c50d8ae3SPaolo Bonzini { 2114c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2115c50d8ae3SPaolo Bonzini } 2116c50d8ae3SPaolo Bonzini 2117c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2118c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2119c50d8ae3SPaolo Bonzini { 2120c50d8ae3SPaolo Bonzini u64 spte; 2121c50d8ae3SPaolo Bonzini 2122c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2123c50d8ae3SPaolo Bonzini 2124cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2125c50d8ae3SPaolo Bonzini 2126c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2127c50d8ae3SPaolo Bonzini 2128c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2129c50d8ae3SPaolo Bonzini 2130c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2131c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2132c50d8ae3SPaolo Bonzini } 2133c50d8ae3SPaolo Bonzini 2134c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2135c50d8ae3SPaolo Bonzini unsigned direct_access) 2136c50d8ae3SPaolo Bonzini { 2137c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2138c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2139c50d8ae3SPaolo Bonzini 2140c50d8ae3SPaolo Bonzini /* 2141c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2142c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2143c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2144c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2145c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2146c50d8ae3SPaolo Bonzini */ 2147e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2148c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2149c50d8ae3SPaolo Bonzini return; 2150c50d8ae3SPaolo Bonzini 2151c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2152c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2153c50d8ae3SPaolo Bonzini } 2154c50d8ae3SPaolo Bonzini } 2155c50d8ae3SPaolo Bonzini 21562de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 21572de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 21582de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2159c50d8ae3SPaolo Bonzini { 2160c50d8ae3SPaolo Bonzini u64 pte; 2161c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2162c50d8ae3SPaolo Bonzini 2163c50d8ae3SPaolo Bonzini pte = *spte; 2164c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2165c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2166c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2167c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2168c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2169c50d8ae3SPaolo Bonzini } else { 2170e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2171c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 21722de4085cSBen Gardon 21732de4085cSBen Gardon /* 21742de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 21752de4085cSBen Gardon * unlikely to be used again in the near future. This 21762de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 21772de4085cSBen Gardon */ 21782de4085cSBen Gardon if (tdp_enabled && invalid_list && 21792de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 21802de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 21812de4085cSBen Gardon invalid_list); 2182c50d8ae3SPaolo Bonzini } 2183ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2184c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2185ace569e0SSean Christopherson } 21862de4085cSBen Gardon return 0; 2187c50d8ae3SPaolo Bonzini } 2188c50d8ae3SPaolo Bonzini 21892de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 21902de4085cSBen Gardon struct kvm_mmu_page *sp, 21912de4085cSBen Gardon struct list_head *invalid_list) 2192c50d8ae3SPaolo Bonzini { 21932de4085cSBen Gardon int zapped = 0; 2194c50d8ae3SPaolo Bonzini unsigned i; 2195c50d8ae3SPaolo Bonzini 2196c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 21972de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 21982de4085cSBen Gardon 21992de4085cSBen Gardon return zapped; 2200c50d8ae3SPaolo Bonzini } 2201c50d8ae3SPaolo Bonzini 2202c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2203c50d8ae3SPaolo Bonzini { 2204c50d8ae3SPaolo Bonzini u64 *sptep; 2205c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2206c50d8ae3SPaolo Bonzini 2207c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2208c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2209c50d8ae3SPaolo Bonzini } 2210c50d8ae3SPaolo Bonzini 2211c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2212c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2213c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2214c50d8ae3SPaolo Bonzini { 2215c50d8ae3SPaolo Bonzini int i, zapped = 0; 2216c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2217c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2218c50d8ae3SPaolo Bonzini 22193bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2220c50d8ae3SPaolo Bonzini return 0; 2221c50d8ae3SPaolo Bonzini 2222c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2223c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2224c50d8ae3SPaolo Bonzini 2225c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2226c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2227c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2228c50d8ae3SPaolo Bonzini zapped++; 2229c50d8ae3SPaolo Bonzini } 2230c50d8ae3SPaolo Bonzini } 2231c50d8ae3SPaolo Bonzini 2232c50d8ae3SPaolo Bonzini return zapped; 2233c50d8ae3SPaolo Bonzini } 2234c50d8ae3SPaolo Bonzini 2235c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2236c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2237c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2238c50d8ae3SPaolo Bonzini int *nr_zapped) 2239c50d8ae3SPaolo Bonzini { 2240c50d8ae3SPaolo Bonzini bool list_unstable; 2241c50d8ae3SPaolo Bonzini 2242c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2243c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2244c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 22452de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2246c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2247c50d8ae3SPaolo Bonzini 2248c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2249c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2250c50d8ae3SPaolo Bonzini 2251c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2252c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2253c50d8ae3SPaolo Bonzini 2254c50d8ae3SPaolo Bonzini if (sp->unsync) 2255c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2256c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2257c50d8ae3SPaolo Bonzini /* Count self */ 2258c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2259f95eec9bSSean Christopherson 2260f95eec9bSSean Christopherson /* 2261f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2262f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2263f95eec9bSSean Christopherson * !sp->root_count. 2264f95eec9bSSean Christopherson */ 2265f95eec9bSSean Christopherson if (sp->role.invalid) 2266f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2267f95eec9bSSean Christopherson else 2268c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2269c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2270c50d8ae3SPaolo Bonzini } else { 2271f95eec9bSSean Christopherson /* 2272f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2273f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2274f95eec9bSSean Christopherson */ 2275f95eec9bSSean Christopherson list_del(&sp->link); 2276c50d8ae3SPaolo Bonzini 2277c50d8ae3SPaolo Bonzini /* 2278c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2279c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2280c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2281c50d8ae3SPaolo Bonzini */ 2282c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2283c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2284c50d8ae3SPaolo Bonzini } 2285c50d8ae3SPaolo Bonzini 2286c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2287c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2288c50d8ae3SPaolo Bonzini 2289c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2290c50d8ae3SPaolo Bonzini return list_unstable; 2291c50d8ae3SPaolo Bonzini } 2292c50d8ae3SPaolo Bonzini 2293c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2294c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2295c50d8ae3SPaolo Bonzini { 2296c50d8ae3SPaolo Bonzini int nr_zapped; 2297c50d8ae3SPaolo Bonzini 2298c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2299c50d8ae3SPaolo Bonzini return nr_zapped; 2300c50d8ae3SPaolo Bonzini } 2301c50d8ae3SPaolo Bonzini 2302c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2303c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2304c50d8ae3SPaolo Bonzini { 2305c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2306c50d8ae3SPaolo Bonzini 2307c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2308c50d8ae3SPaolo Bonzini return; 2309c50d8ae3SPaolo Bonzini 2310c50d8ae3SPaolo Bonzini /* 2311c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2312c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2313c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2314c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2315c50d8ae3SPaolo Bonzini * 2316c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2317c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2318c50d8ae3SPaolo Bonzini */ 2319c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2320c50d8ae3SPaolo Bonzini 2321c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2322c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2323c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2324c50d8ae3SPaolo Bonzini } 2325c50d8ae3SPaolo Bonzini } 2326c50d8ae3SPaolo Bonzini 23276b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 23286b82ef2cSSean Christopherson unsigned long nr_to_zap) 2329c50d8ae3SPaolo Bonzini { 23306b82ef2cSSean Christopherson unsigned long total_zapped = 0; 23316b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2332ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 23336b82ef2cSSean Christopherson bool unstable; 23346b82ef2cSSean Christopherson int nr_zapped; 2335c50d8ae3SPaolo Bonzini 2336c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2337ba7888ddSSean Christopherson return 0; 2338c50d8ae3SPaolo Bonzini 23396b82ef2cSSean Christopherson restart: 23408fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 23416b82ef2cSSean Christopherson /* 23426b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 23436b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 23446b82ef2cSSean Christopherson */ 23456b82ef2cSSean Christopherson if (sp->root_count) 23466b82ef2cSSean Christopherson continue; 23476b82ef2cSSean Christopherson 23486b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 23496b82ef2cSSean Christopherson &nr_zapped); 23506b82ef2cSSean Christopherson total_zapped += nr_zapped; 23516b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2352ba7888ddSSean Christopherson break; 2353ba7888ddSSean Christopherson 23546b82ef2cSSean Christopherson if (unstable) 23556b82ef2cSSean Christopherson goto restart; 2356ba7888ddSSean Christopherson } 23576b82ef2cSSean Christopherson 23586b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 23596b82ef2cSSean Christopherson 23606b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 23616b82ef2cSSean Christopherson return total_zapped; 23626b82ef2cSSean Christopherson } 23636b82ef2cSSean Christopherson 2364afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2365afe8d7e6SSean Christopherson { 2366afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2367afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2368afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2369afe8d7e6SSean Christopherson 2370afe8d7e6SSean Christopherson return 0; 2371c50d8ae3SPaolo Bonzini } 2372c50d8ae3SPaolo Bonzini 2373ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2374ba7888ddSSean Christopherson { 23756b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2376ba7888ddSSean Christopherson 23776b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2378ba7888ddSSean Christopherson return 0; 2379ba7888ddSSean Christopherson 23806b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2381ba7888ddSSean Christopherson 23826e6ec584SSean Christopherson /* 23836e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 23846e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 23856e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 23866e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 23876e6ec584SSean Christopherson * being too agressive may unnecessarily kill the guest, and getting an 23886e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 23896e6ec584SSean Christopherson * page fault paths. 23906e6ec584SSean Christopherson */ 2391ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2392ba7888ddSSean Christopherson return -ENOSPC; 2393ba7888ddSSean Christopherson return 0; 2394ba7888ddSSean Christopherson } 2395ba7888ddSSean Christopherson 2396c50d8ae3SPaolo Bonzini /* 2397c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2398c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2399c50d8ae3SPaolo Bonzini */ 2400c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2401c50d8ae3SPaolo Bonzini { 2402531810caSBen Gardon write_lock(&kvm->mmu_lock); 2403c50d8ae3SPaolo Bonzini 2404c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 24056b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 24066b82ef2cSSean Christopherson goal_nr_mmu_pages); 2407c50d8ae3SPaolo Bonzini 2408c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2409c50d8ae3SPaolo Bonzini } 2410c50d8ae3SPaolo Bonzini 2411c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2412c50d8ae3SPaolo Bonzini 2413531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2414c50d8ae3SPaolo Bonzini } 2415c50d8ae3SPaolo Bonzini 2416c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2417c50d8ae3SPaolo Bonzini { 2418c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2419c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2420c50d8ae3SPaolo Bonzini int r; 2421c50d8ae3SPaolo Bonzini 2422c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2423c50d8ae3SPaolo Bonzini r = 0; 2424531810caSBen Gardon write_lock(&kvm->mmu_lock); 2425c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2426c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2427c50d8ae3SPaolo Bonzini sp->role.word); 2428c50d8ae3SPaolo Bonzini r = 1; 2429c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2430c50d8ae3SPaolo Bonzini } 2431c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2432531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2433c50d8ae3SPaolo Bonzini 2434c50d8ae3SPaolo Bonzini return r; 2435c50d8ae3SPaolo Bonzini } 243696ad91aeSSean Christopherson 243796ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 243896ad91aeSSean Christopherson { 243996ad91aeSSean Christopherson gpa_t gpa; 244096ad91aeSSean Christopherson int r; 244196ad91aeSSean Christopherson 244296ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 244396ad91aeSSean Christopherson return 0; 244496ad91aeSSean Christopherson 244596ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 244696ad91aeSSean Christopherson 244796ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 244896ad91aeSSean Christopherson 244996ad91aeSSean Christopherson return r; 245096ad91aeSSean Christopherson } 2451c50d8ae3SPaolo Bonzini 2452c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2453c50d8ae3SPaolo Bonzini { 2454c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2455c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2456c50d8ae3SPaolo Bonzini sp->unsync = 1; 2457c50d8ae3SPaolo Bonzini 2458c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2459c50d8ae3SPaolo Bonzini } 2460c50d8ae3SPaolo Bonzini 24610337f585SSean Christopherson /* 24620337f585SSean Christopherson * Attempt to unsync any shadow pages that can be reached by the specified gfn, 24630337f585SSean Christopherson * KVM is creating a writable mapping for said gfn. Returns 0 if all pages 24640337f585SSean Christopherson * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must 24650337f585SSean Christopherson * be write-protected. 24660337f585SSean Christopherson */ 24670337f585SSean Christopherson int mmu_try_to_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, bool can_unsync) 2468c50d8ae3SPaolo Bonzini { 2469c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2470c50d8ae3SPaolo Bonzini 24710337f585SSean Christopherson /* 24720337f585SSean Christopherson * Force write-protection if the page is being tracked. Note, the page 24730337f585SSean Christopherson * track machinery is used to write-protect upper-level shadow pages, 24740337f585SSean Christopherson * i.e. this guards the role.level == 4K assertion below! 24750337f585SSean Christopherson */ 2476c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 24770337f585SSean Christopherson return -EPERM; 2478c50d8ae3SPaolo Bonzini 24790337f585SSean Christopherson /* 24800337f585SSean Christopherson * The page is not write-tracked, mark existing shadow pages unsync 24810337f585SSean Christopherson * unless KVM is synchronizing an unsync SP (can_unsync = false). In 24820337f585SSean Christopherson * that case, KVM must complete emulation of the guest TLB flush before 24830337f585SSean Christopherson * allowing shadow pages to become unsync (writable by the guest). 24840337f585SSean Christopherson */ 2485c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2486c50d8ae3SPaolo Bonzini if (!can_unsync) 24870337f585SSean Christopherson return -EPERM; 2488c50d8ae3SPaolo Bonzini 2489c50d8ae3SPaolo Bonzini if (sp->unsync) 2490c50d8ae3SPaolo Bonzini continue; 2491c50d8ae3SPaolo Bonzini 24923bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2493c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2494c50d8ae3SPaolo Bonzini } 2495c50d8ae3SPaolo Bonzini 2496c50d8ae3SPaolo Bonzini /* 2497c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2498c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2499c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2500c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2501c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2502c50d8ae3SPaolo Bonzini * following could happen: 2503c50d8ae3SPaolo Bonzini * 2504c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2505c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2506c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2507c50d8ae3SPaolo Bonzini * to be writable 2508c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2509c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2510c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2511c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2512c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2513c50d8ae3SPaolo Bonzini * fault. 2514c50d8ae3SPaolo Bonzini * 2515c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2516c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2517c50d8ae3SPaolo Bonzini * 25180337f585SSean Christopherson * 2.3 Walking of unsync pages sees sp->unsync is 25190337f585SSean Christopherson * false and skips the page. 2520c50d8ae3SPaolo Bonzini * 2521c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2522c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2523c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2524c50d8ae3SPaolo Bonzini * gets used. 2525c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2526c50d8ae3SPaolo Bonzini * as unsync 2527c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2528c50d8ae3SPaolo Bonzini * 2529c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2530c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2531c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2532c50d8ae3SPaolo Bonzini */ 2533c50d8ae3SPaolo Bonzini smp_wmb(); 2534c50d8ae3SPaolo Bonzini 25350337f585SSean Christopherson return 0; 2536c50d8ae3SPaolo Bonzini } 2537c50d8ae3SPaolo Bonzini 2538799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2539799a4190SBen Gardon unsigned int pte_access, int level, 2540799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 2541799a4190SBen Gardon bool can_unsync, bool host_writable) 2542799a4190SBen Gardon { 2543799a4190SBen Gardon u64 spte; 2544799a4190SBen Gardon struct kvm_mmu_page *sp; 2545799a4190SBen Gardon int ret; 2546799a4190SBen Gardon 2547799a4190SBen Gardon sp = sptep_to_sp(sptep); 2548799a4190SBen Gardon 2549799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 2550799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 2551799a4190SBen Gardon 2552799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 2553799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 2554799a4190SBen Gardon 255512703759SSean Christopherson if (*sptep == spte) 255612703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 255712703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 2558c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 2559c50d8ae3SPaolo Bonzini return ret; 2560c50d8ae3SPaolo Bonzini } 2561c50d8ae3SPaolo Bonzini 25620a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2563e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 25640a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 25650a2b64c5SBen Gardon bool host_writable) 2566c50d8ae3SPaolo Bonzini { 2567c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2568c50d8ae3SPaolo Bonzini int rmap_count; 2569c50d8ae3SPaolo Bonzini int set_spte_ret; 2570c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2571c50d8ae3SPaolo Bonzini bool flush = false; 2572c50d8ae3SPaolo Bonzini 2573c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2574c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2575c50d8ae3SPaolo Bonzini 2576a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2577a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2578a54aa15cSSean Christopherson return RET_PF_EMULATE; 2579a54aa15cSSean Christopherson } 2580a54aa15cSSean Christopherson 2581c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2582c50d8ae3SPaolo Bonzini /* 2583c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2584c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2585c50d8ae3SPaolo Bonzini */ 25863bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2587c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2588c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2589c50d8ae3SPaolo Bonzini 2590e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2591c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2592c50d8ae3SPaolo Bonzini flush = true; 2593c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2594c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2595c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2596c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2597c50d8ae3SPaolo Bonzini flush = true; 2598c50d8ae3SPaolo Bonzini } else 2599c50d8ae3SPaolo Bonzini was_rmapped = 1; 2600c50d8ae3SPaolo Bonzini } 2601c50d8ae3SPaolo Bonzini 2602c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 2603c50d8ae3SPaolo Bonzini speculative, true, host_writable); 2604c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 2605c50d8ae3SPaolo Bonzini if (write_fault) 2606c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 26078c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2608c50d8ae3SPaolo Bonzini } 2609c50d8ae3SPaolo Bonzini 2610c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 2611c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2612c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2613c50d8ae3SPaolo Bonzini 261412703759SSean Christopherson /* 261512703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 261612703759SSean Christopherson * are identical, and emulation is not required. 261712703759SSean Christopherson */ 261812703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 261912703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 262012703759SSean Christopherson return RET_PF_SPURIOUS; 262112703759SSean Christopherson } 262212703759SSean Christopherson 2623c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2624c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2625c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 2626c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 2627c50d8ae3SPaolo Bonzini 2628c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2629c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2630c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 2631c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 2632c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 2633c50d8ae3SPaolo Bonzini } 2634c50d8ae3SPaolo Bonzini } 2635c50d8ae3SPaolo Bonzini 2636c50d8ae3SPaolo Bonzini return ret; 2637c50d8ae3SPaolo Bonzini } 2638c50d8ae3SPaolo Bonzini 2639c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 2640c50d8ae3SPaolo Bonzini bool no_dirty_log) 2641c50d8ae3SPaolo Bonzini { 2642c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 2643c50d8ae3SPaolo Bonzini 2644c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 2645c50d8ae3SPaolo Bonzini if (!slot) 2646c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 2647c50d8ae3SPaolo Bonzini 2648c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 2649c50d8ae3SPaolo Bonzini } 2650c50d8ae3SPaolo Bonzini 2651c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2652c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2653c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2654c50d8ae3SPaolo Bonzini { 2655c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2656c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 26570a2b64c5SBen Gardon unsigned int access = sp->role.access; 2658c50d8ae3SPaolo Bonzini int i, ret; 2659c50d8ae3SPaolo Bonzini gfn_t gfn; 2660c50d8ae3SPaolo Bonzini 2661c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2662c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2663c50d8ae3SPaolo Bonzini if (!slot) 2664c50d8ae3SPaolo Bonzini return -1; 2665c50d8ae3SPaolo Bonzini 2666c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2667c50d8ae3SPaolo Bonzini if (ret <= 0) 2668c50d8ae3SPaolo Bonzini return -1; 2669c50d8ae3SPaolo Bonzini 2670c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 2671e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 2672c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 2673c50d8ae3SPaolo Bonzini put_page(pages[i]); 2674c50d8ae3SPaolo Bonzini } 2675c50d8ae3SPaolo Bonzini 2676c50d8ae3SPaolo Bonzini return 0; 2677c50d8ae3SPaolo Bonzini } 2678c50d8ae3SPaolo Bonzini 2679c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2680c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2681c50d8ae3SPaolo Bonzini { 2682c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2683c50d8ae3SPaolo Bonzini int i; 2684c50d8ae3SPaolo Bonzini 2685c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2686c50d8ae3SPaolo Bonzini 2687c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2688c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2689c50d8ae3SPaolo Bonzini 2690c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2691c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2692c50d8ae3SPaolo Bonzini if (!start) 2693c50d8ae3SPaolo Bonzini continue; 2694c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2695c50d8ae3SPaolo Bonzini break; 2696c50d8ae3SPaolo Bonzini start = NULL; 2697c50d8ae3SPaolo Bonzini } else if (!start) 2698c50d8ae3SPaolo Bonzini start = spte; 2699c50d8ae3SPaolo Bonzini } 2700c50d8ae3SPaolo Bonzini } 2701c50d8ae3SPaolo Bonzini 2702c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2703c50d8ae3SPaolo Bonzini { 2704c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2705c50d8ae3SPaolo Bonzini 270657354682SSean Christopherson sp = sptep_to_sp(sptep); 2707c50d8ae3SPaolo Bonzini 2708c50d8ae3SPaolo Bonzini /* 2709c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2710c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2711c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2712c50d8ae3SPaolo Bonzini */ 2713c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2714c50d8ae3SPaolo Bonzini return; 2715c50d8ae3SPaolo Bonzini 27163bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2717c50d8ae3SPaolo Bonzini return; 2718c50d8ae3SPaolo Bonzini 27194a42d848SDavid Stevens /* 27204a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 27214a42d848SDavid Stevens * accidentally prefetching those addresses. 27224a42d848SDavid Stevens */ 27234a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 27244a42d848SDavid Stevens return; 27254a42d848SDavid Stevens 2726c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2727c50d8ae3SPaolo Bonzini } 2728c50d8ae3SPaolo Bonzini 27291b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 27308ca6f063SBen Gardon const struct kvm_memory_slot *slot) 2731db543216SSean Christopherson { 2732db543216SSean Christopherson unsigned long hva; 2733db543216SSean Christopherson pte_t *pte; 2734db543216SSean Christopherson int level; 2735db543216SSean Christopherson 2736e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 27373bae0459SSean Christopherson return PG_LEVEL_4K; 2738db543216SSean Christopherson 2739293e306eSSean Christopherson /* 2740293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2741293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2742293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2743293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2744293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2745293e306eSSean Christopherson * read-only memslot. 2746293e306eSSean Christopherson */ 2747db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2748db543216SSean Christopherson 27491b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2750db543216SSean Christopherson if (unlikely(!pte)) 27513bae0459SSean Christopherson return PG_LEVEL_4K; 2752db543216SSean Christopherson 2753db543216SSean Christopherson return level; 2754db543216SSean Christopherson } 2755db543216SSean Christopherson 27568ca6f063SBen Gardon int kvm_mmu_max_mapping_level(struct kvm *kvm, 27578ca6f063SBen Gardon const struct kvm_memory_slot *slot, gfn_t gfn, 27588ca6f063SBen Gardon kvm_pfn_t pfn, int max_level) 27591b6d9d9eSSean Christopherson { 27601b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 27611b6d9d9eSSean Christopherson 27621b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 27631b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 27641b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 27651b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 27661b6d9d9eSSean Christopherson break; 27671b6d9d9eSSean Christopherson } 27681b6d9d9eSSean Christopherson 27691b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 27701b6d9d9eSSean Christopherson return PG_LEVEL_4K; 27711b6d9d9eSSean Christopherson 27721b6d9d9eSSean Christopherson return host_pfn_mapping_level(kvm, gfn, pfn, slot); 27731b6d9d9eSSean Christopherson } 27741b6d9d9eSSean Christopherson 2775bb18842eSBen Gardon int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 27763cf06612SSean Christopherson int max_level, kvm_pfn_t *pfnp, 27773cf06612SSean Christopherson bool huge_page_disallowed, int *req_level) 27780885904dSSean Christopherson { 2779293e306eSSean Christopherson struct kvm_memory_slot *slot; 27800885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 278117eff019SSean Christopherson kvm_pfn_t mask; 278283f06fa7SSean Christopherson int level; 27830885904dSSean Christopherson 27843cf06612SSean Christopherson *req_level = PG_LEVEL_4K; 27853cf06612SSean Christopherson 27863bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 27873bae0459SSean Christopherson return PG_LEVEL_4K; 278817eff019SSean Christopherson 2789e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 27903bae0459SSean Christopherson return PG_LEVEL_4K; 279117eff019SSean Christopherson 2792293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 2793293e306eSSean Christopherson if (!slot) 27943bae0459SSean Christopherson return PG_LEVEL_4K; 2795293e306eSSean Christopherson 27961b6d9d9eSSean Christopherson level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, gfn, pfn, max_level); 27973bae0459SSean Christopherson if (level == PG_LEVEL_4K) 279883f06fa7SSean Christopherson return level; 279917eff019SSean Christopherson 28003cf06612SSean Christopherson *req_level = level = min(level, max_level); 28013cf06612SSean Christopherson 28023cf06612SSean Christopherson /* 28033cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28043cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28053cf06612SSean Christopherson */ 28063cf06612SSean Christopherson if (huge_page_disallowed) 28073cf06612SSean Christopherson return PG_LEVEL_4K; 28084cd071d1SSean Christopherson 28090885904dSSean Christopherson /* 28104cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 28114cd071d1SSean Christopherson * the pmd can't be split from under us. 28120885904dSSean Christopherson */ 28130885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 28140885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 28154cd071d1SSean Christopherson *pfnp = pfn & ~mask; 281683f06fa7SSean Christopherson 281783f06fa7SSean Christopherson return level; 28180885904dSSean Christopherson } 28190885904dSSean Christopherson 2820bb18842eSBen Gardon void disallowed_hugepage_adjust(u64 spte, gfn_t gfn, int cur_level, 2821bb18842eSBen Gardon kvm_pfn_t *pfnp, int *goal_levelp) 2822c50d8ae3SPaolo Bonzini { 2823bb18842eSBen Gardon int level = *goal_levelp; 2824c50d8ae3SPaolo Bonzini 28257d945312SBen Gardon if (cur_level == level && level > PG_LEVEL_4K && 2826c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2827c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2828c50d8ae3SPaolo Bonzini /* 2829c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2830c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2831c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2832c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2833c50d8ae3SPaolo Bonzini * the address. 2834c50d8ae3SPaolo Bonzini */ 28357d945312SBen Gardon u64 page_mask = KVM_PAGES_PER_HPAGE(level) - 28367d945312SBen Gardon KVM_PAGES_PER_HPAGE(level - 1); 2837c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 2838bb18842eSBen Gardon (*goal_levelp)--; 2839c50d8ae3SPaolo Bonzini } 2840c50d8ae3SPaolo Bonzini } 2841c50d8ae3SPaolo Bonzini 28426c2fd34fSSean Christopherson static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 284383f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 28446c2fd34fSSean Christopherson bool prefault, bool is_tdp) 2845c50d8ae3SPaolo Bonzini { 28466c2fd34fSSean Christopherson bool nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(); 28476c2fd34fSSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 28486c2fd34fSSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 28496c2fd34fSSean Christopherson bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled; 2850c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2851c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 28523cf06612SSean Christopherson int level, req_level, ret; 2853c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 2854c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 2855c50d8ae3SPaolo Bonzini 28563cf06612SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn, 28573cf06612SSean Christopherson huge_page_disallowed, &req_level); 28584cd071d1SSean Christopherson 2859c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 2860c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 2861c50d8ae3SPaolo Bonzini /* 2862c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2863c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2864c50d8ae3SPaolo Bonzini */ 2865dcc70651SSean Christopherson if (nx_huge_page_workaround_enabled) 28667d945312SBen Gardon disallowed_hugepage_adjust(*it.sptep, gfn, it.level, 28677d945312SBen Gardon &pfn, &level); 2868c50d8ae3SPaolo Bonzini 2869c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 2870c50d8ae3SPaolo Bonzini if (it.level == level) 2871c50d8ae3SPaolo Bonzini break; 2872c50d8ae3SPaolo Bonzini 2873c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 2874c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(*it.sptep)) { 2875c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2876c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2877c50d8ae3SPaolo Bonzini 2878c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 28795bcaf3e1SSean Christopherson if (is_tdp && huge_page_disallowed && 28805bcaf3e1SSean Christopherson req_level >= it.level) 2881c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2882c50d8ae3SPaolo Bonzini } 2883c50d8ae3SPaolo Bonzini } 2884c50d8ae3SPaolo Bonzini 2885c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 2886c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 2887c50d8ae3SPaolo Bonzini map_writable); 288812703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 288912703759SSean Christopherson return ret; 289012703759SSean Christopherson 2891c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2892c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2893c50d8ae3SPaolo Bonzini return ret; 2894c50d8ae3SPaolo Bonzini } 2895c50d8ae3SPaolo Bonzini 2896c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2897c50d8ae3SPaolo Bonzini { 2898c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2899c50d8ae3SPaolo Bonzini } 2900c50d8ae3SPaolo Bonzini 2901c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2902c50d8ae3SPaolo Bonzini { 2903c50d8ae3SPaolo Bonzini /* 2904c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2905c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2906c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2907c50d8ae3SPaolo Bonzini */ 2908c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2909c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 2910c50d8ae3SPaolo Bonzini 2911c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 2912c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 2913c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 2914c50d8ae3SPaolo Bonzini } 2915c50d8ae3SPaolo Bonzini 2916c50d8ae3SPaolo Bonzini return -EFAULT; 2917c50d8ae3SPaolo Bonzini } 2918c50d8ae3SPaolo Bonzini 2919c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 29200a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 29210a2b64c5SBen Gardon int *ret_val) 2922c50d8ae3SPaolo Bonzini { 2923c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 2924c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 2925c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 2926c50d8ae3SPaolo Bonzini return true; 2927c50d8ae3SPaolo Bonzini } 2928c50d8ae3SPaolo Bonzini 292930ab5901SSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2930c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 2931c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 293230ab5901SSean Christopherson /* 293330ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 293430ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 293530ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 293630ab5901SSean Christopherson */ 293730ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 293830ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 293930ab5901SSean Christopherson return true; 294030ab5901SSean Christopherson } 294130ab5901SSean Christopherson } 2942c50d8ae3SPaolo Bonzini 2943c50d8ae3SPaolo Bonzini return false; 2944c50d8ae3SPaolo Bonzini } 2945c50d8ae3SPaolo Bonzini 2946c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 2947c50d8ae3SPaolo Bonzini { 2948c50d8ae3SPaolo Bonzini /* 2949c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 2950c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 2951c50d8ae3SPaolo Bonzini */ 2952c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 2953c50d8ae3SPaolo Bonzini return false; 2954c50d8ae3SPaolo Bonzini 2955c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 2956c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 2957c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 2958c50d8ae3SPaolo Bonzini return false; 2959c50d8ae3SPaolo Bonzini 2960c50d8ae3SPaolo Bonzini /* 2961c50d8ae3SPaolo Bonzini * #PF can be fast if: 2962c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 2963c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 2964c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 2965c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 2966c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 2967c50d8ae3SPaolo Bonzini * 2968c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 2969c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 2970c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 2971c50d8ae3SPaolo Bonzini * accesses to a present page. 2972c50d8ae3SPaolo Bonzini */ 2973c50d8ae3SPaolo Bonzini 2974c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 2975c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 2976c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 2977c50d8ae3SPaolo Bonzini } 2978c50d8ae3SPaolo Bonzini 2979c50d8ae3SPaolo Bonzini /* 2980c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 2981c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 2982c50d8ae3SPaolo Bonzini */ 2983c50d8ae3SPaolo Bonzini static bool 2984c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 2985c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 2986c50d8ae3SPaolo Bonzini { 2987c50d8ae3SPaolo Bonzini gfn_t gfn; 2988c50d8ae3SPaolo Bonzini 2989c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2990c50d8ae3SPaolo Bonzini 2991c50d8ae3SPaolo Bonzini /* 2992c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 2993c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 2994c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 2995c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 2996c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 2997c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 2998c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 2999c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3000c50d8ae3SPaolo Bonzini * 3001c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3002c50d8ae3SPaolo Bonzini */ 3003c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3004c50d8ae3SPaolo Bonzini return false; 3005c50d8ae3SPaolo Bonzini 3006c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3007c50d8ae3SPaolo Bonzini /* 3008c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3009c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3010c50d8ae3SPaolo Bonzini */ 3011c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3012c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3013c50d8ae3SPaolo Bonzini } 3014c50d8ae3SPaolo Bonzini 3015c50d8ae3SPaolo Bonzini return true; 3016c50d8ae3SPaolo Bonzini } 3017c50d8ae3SPaolo Bonzini 3018c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3019c50d8ae3SPaolo Bonzini { 3020c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3021c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3022c50d8ae3SPaolo Bonzini 3023c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3024c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3025c50d8ae3SPaolo Bonzini 3026c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3027c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3028c50d8ae3SPaolo Bonzini } 3029c50d8ae3SPaolo Bonzini 3030c50d8ae3SPaolo Bonzini /* 3031c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3032c50d8ae3SPaolo Bonzini */ 3033c4371c2aSSean Christopherson static int fast_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 3034c50d8ae3SPaolo Bonzini u32 error_code) 3035c50d8ae3SPaolo Bonzini { 3036c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3037c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3038c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3039c50d8ae3SPaolo Bonzini u64 spte = 0ull; 3040c50d8ae3SPaolo Bonzini uint retry_count = 0; 3041c50d8ae3SPaolo Bonzini 3042c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3043c4371c2aSSean Christopherson return ret; 3044c50d8ae3SPaolo Bonzini 3045c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3046c50d8ae3SPaolo Bonzini 3047c50d8ae3SPaolo Bonzini do { 3048c50d8ae3SPaolo Bonzini u64 new_spte; 3049c50d8ae3SPaolo Bonzini 3050736c291cSSean Christopherson for_each_shadow_entry_lockless(vcpu, cr2_or_gpa, iterator, spte) 3051f9fa2509SSean Christopherson if (!is_shadow_present_pte(spte)) 3052c50d8ae3SPaolo Bonzini break; 3053c50d8ae3SPaolo Bonzini 3054ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3055ec89e643SSean Christopherson break; 3056ec89e643SSean Christopherson 305757354682SSean Christopherson sp = sptep_to_sp(iterator.sptep); 3058c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3059c50d8ae3SPaolo Bonzini break; 3060c50d8ae3SPaolo Bonzini 3061c50d8ae3SPaolo Bonzini /* 3062c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3063c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3064c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3065c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3066c50d8ae3SPaolo Bonzini * current CPU took the fault. 3067c50d8ae3SPaolo Bonzini * 3068c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3069c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3070c50d8ae3SPaolo Bonzini */ 3071c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3072c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3073c50d8ae3SPaolo Bonzini break; 3074c50d8ae3SPaolo Bonzini } 3075c50d8ae3SPaolo Bonzini 3076c50d8ae3SPaolo Bonzini new_spte = spte; 3077c50d8ae3SPaolo Bonzini 3078c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3079c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3080c50d8ae3SPaolo Bonzini 3081c50d8ae3SPaolo Bonzini /* 3082c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3083c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3084c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3085c50d8ae3SPaolo Bonzini */ 3086c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3087e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3088c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3089c50d8ae3SPaolo Bonzini 3090c50d8ae3SPaolo Bonzini /* 3091c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3092c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3093c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3094c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3095c50d8ae3SPaolo Bonzini * 3096c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3097c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3098c50d8ae3SPaolo Bonzini * 3099c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3100c50d8ae3SPaolo Bonzini */ 31013bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3102c50d8ae3SPaolo Bonzini break; 3103c50d8ae3SPaolo Bonzini } 3104c50d8ae3SPaolo Bonzini 3105c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3106c50d8ae3SPaolo Bonzini if (new_spte == spte || 3107c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3108c50d8ae3SPaolo Bonzini break; 3109c50d8ae3SPaolo Bonzini 3110c50d8ae3SPaolo Bonzini /* 3111c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3112c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 31133ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3114c50d8ae3SPaolo Bonzini */ 3115c4371c2aSSean Christopherson if (fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte, 3116c4371c2aSSean Christopherson new_spte)) { 3117c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3118c50d8ae3SPaolo Bonzini break; 3119c4371c2aSSean Christopherson } 3120c50d8ae3SPaolo Bonzini 3121c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3122c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3123c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3124c50d8ae3SPaolo Bonzini break; 3125c50d8ae3SPaolo Bonzini } 3126c50d8ae3SPaolo Bonzini 3127c50d8ae3SPaolo Bonzini } while (true); 3128c50d8ae3SPaolo Bonzini 3129736c291cSSean Christopherson trace_fast_page_fault(vcpu, cr2_or_gpa, error_code, iterator.sptep, 3130c4371c2aSSean Christopherson spte, ret); 3131c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3132c50d8ae3SPaolo Bonzini 3133c4371c2aSSean Christopherson return ret; 3134c50d8ae3SPaolo Bonzini } 3135c50d8ae3SPaolo Bonzini 3136c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3137c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3138c50d8ae3SPaolo Bonzini { 3139c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3140c50d8ae3SPaolo Bonzini 3141c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3142c50d8ae3SPaolo Bonzini return; 3143c50d8ae3SPaolo Bonzini 3144e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 314502c00b3aSBen Gardon 3146897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 31476103bc07SBen Gardon kvm_tdp_mmu_put_root(kvm, sp, false); 314876eb54e7SBen Gardon else if (!--sp->root_count && sp->role.invalid) 3149c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3150c50d8ae3SPaolo Bonzini 3151c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3152c50d8ae3SPaolo Bonzini } 3153c50d8ae3SPaolo Bonzini 3154c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3155c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3156c50d8ae3SPaolo Bonzini ulong roots_to_free) 3157c50d8ae3SPaolo Bonzini { 31584d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3159c50d8ae3SPaolo Bonzini int i; 3160c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3161c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3162c50d8ae3SPaolo Bonzini 3163c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3164c50d8ae3SPaolo Bonzini 3165c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3166c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3167c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3168c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3169c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3170c50d8ae3SPaolo Bonzini break; 3171c50d8ae3SPaolo Bonzini 3172c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3173c50d8ae3SPaolo Bonzini return; 3174c50d8ae3SPaolo Bonzini } 3175c50d8ae3SPaolo Bonzini 3176531810caSBen Gardon write_lock(&kvm->mmu_lock); 3177c50d8ae3SPaolo Bonzini 3178c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3179c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 31804d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3181c50d8ae3SPaolo Bonzini &invalid_list); 3182c50d8ae3SPaolo Bonzini 3183c50d8ae3SPaolo Bonzini if (free_active_root) { 3184c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3185c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 31864d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 318704d45551SSean Christopherson } else if (mmu->pae_root) { 3188c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3189c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3190c834e5e4SSean Christopherson continue; 3191c834e5e4SSean Christopherson 3192c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3193c50d8ae3SPaolo Bonzini &invalid_list); 3194c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3195c50d8ae3SPaolo Bonzini } 3196c50d8ae3SPaolo Bonzini } 319704d45551SSean Christopherson mmu->root_hpa = INVALID_PAGE; 3198be01e8e2SSean Christopherson mmu->root_pgd = 0; 3199c50d8ae3SPaolo Bonzini } 3200c50d8ae3SPaolo Bonzini 32014d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3202531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3203c50d8ae3SPaolo Bonzini } 3204c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3205c50d8ae3SPaolo Bonzini 320625b62c62SSean Christopherson void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 320725b62c62SSean Christopherson { 320825b62c62SSean Christopherson unsigned long roots_to_free = 0; 320925b62c62SSean Christopherson hpa_t root_hpa; 321025b62c62SSean Christopherson int i; 321125b62c62SSean Christopherson 321225b62c62SSean Christopherson /* 321325b62c62SSean Christopherson * This should not be called while L2 is active, L2 can't invalidate 321425b62c62SSean Christopherson * _only_ its own roots, e.g. INVVPID unconditionally exits. 321525b62c62SSean Christopherson */ 321625b62c62SSean Christopherson WARN_ON_ONCE(mmu->mmu_role.base.guest_mode); 321725b62c62SSean Christopherson 321825b62c62SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 321925b62c62SSean Christopherson root_hpa = mmu->prev_roots[i].hpa; 322025b62c62SSean Christopherson if (!VALID_PAGE(root_hpa)) 322125b62c62SSean Christopherson continue; 322225b62c62SSean Christopherson 322325b62c62SSean Christopherson if (!to_shadow_page(root_hpa) || 322425b62c62SSean Christopherson to_shadow_page(root_hpa)->role.guest_mode) 322525b62c62SSean Christopherson roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 322625b62c62SSean Christopherson } 322725b62c62SSean Christopherson 322825b62c62SSean Christopherson kvm_mmu_free_roots(vcpu, mmu, roots_to_free); 322925b62c62SSean Christopherson } 323025b62c62SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots); 323125b62c62SSean Christopherson 323225b62c62SSean Christopherson 3233c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3234c50d8ae3SPaolo Bonzini { 3235c50d8ae3SPaolo Bonzini int ret = 0; 3236c50d8ae3SPaolo Bonzini 3237995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3238c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3239c50d8ae3SPaolo Bonzini ret = 1; 3240c50d8ae3SPaolo Bonzini } 3241c50d8ae3SPaolo Bonzini 3242c50d8ae3SPaolo Bonzini return ret; 3243c50d8ae3SPaolo Bonzini } 3244c50d8ae3SPaolo Bonzini 32458123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 32468123f265SSean Christopherson u8 level, bool direct) 3247c50d8ae3SPaolo Bonzini { 3248c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 32498123f265SSean Christopherson 32508123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 32518123f265SSean Christopherson ++sp->root_count; 32528123f265SSean Christopherson 32538123f265SSean Christopherson return __pa(sp->spt); 32548123f265SSean Christopherson } 32558123f265SSean Christopherson 32568123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 32578123f265SSean Christopherson { 3258b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3259b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 32608123f265SSean Christopherson hpa_t root; 3261c50d8ae3SPaolo Bonzini unsigned i; 32624a38162eSPaolo Bonzini int r; 32634a38162eSPaolo Bonzini 32644a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 32654a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 32664a38162eSPaolo Bonzini if (r < 0) 32674a38162eSPaolo Bonzini goto out_unlock; 3268c50d8ae3SPaolo Bonzini 3269897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 327002c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3271b37233c9SSean Christopherson mmu->root_hpa = root; 327202c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 32736e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3274b37233c9SSean Christopherson mmu->root_hpa = root; 32758123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 32764a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 32774a38162eSPaolo Bonzini r = -EIO; 32784a38162eSPaolo Bonzini goto out_unlock; 32794a38162eSPaolo Bonzini } 328073ad1606SSean Christopherson 3281c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3282c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3283c50d8ae3SPaolo Bonzini 32848123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 32858123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 328617e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 328717e368d9SSean Christopherson shadow_me_mask; 3288c50d8ae3SPaolo Bonzini } 3289b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 329073ad1606SSean Christopherson } else { 329173ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 32924a38162eSPaolo Bonzini r = -EIO; 32934a38162eSPaolo Bonzini goto out_unlock; 329473ad1606SSean Christopherson } 32953651c7fcSSean Christopherson 3296be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3297b37233c9SSean Christopherson mmu->root_pgd = 0; 32984a38162eSPaolo Bonzini out_unlock: 32994a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 33004a38162eSPaolo Bonzini return r; 3301c50d8ae3SPaolo Bonzini } 3302c50d8ae3SPaolo Bonzini 3303c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3304c50d8ae3SPaolo Bonzini { 3305b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 33066e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3307be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 33088123f265SSean Christopherson hpa_t root; 33094a38162eSPaolo Bonzini unsigned i; 33104a38162eSPaolo Bonzini int r; 3311c50d8ae3SPaolo Bonzini 3312b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3313be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3314c50d8ae3SPaolo Bonzini 3315c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3316c50d8ae3SPaolo Bonzini return 1; 3317c50d8ae3SPaolo Bonzini 3318c50d8ae3SPaolo Bonzini /* 33194a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 33204a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 33214a38162eSPaolo Bonzini */ 33226e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 33236e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 33246e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 33256e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 33266e0918aeSSean Christopherson continue; 33276e0918aeSSean Christopherson 33286e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 33296e0918aeSSean Christopherson return 1; 33306e0918aeSSean Christopherson } 33316e0918aeSSean Christopherson } 33326e0918aeSSean Christopherson 3333d501f747SBen Gardon r = alloc_all_memslots_rmaps(vcpu->kvm); 3334d501f747SBen Gardon if (r) 3335d501f747SBen Gardon return r; 3336d501f747SBen Gardon 33374a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 33384a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 33394a38162eSPaolo Bonzini if (r < 0) 33404a38162eSPaolo Bonzini goto out_unlock; 33414a38162eSPaolo Bonzini 3342c50d8ae3SPaolo Bonzini /* 3343c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3344c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3345c50d8ae3SPaolo Bonzini */ 3346b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 33478123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3348b37233c9SSean Christopherson mmu->shadow_root_level, false); 3349b37233c9SSean Christopherson mmu->root_hpa = root; 3350be01e8e2SSean Christopherson goto set_root_pgd; 3351c50d8ae3SPaolo Bonzini } 3352c50d8ae3SPaolo Bonzini 33534a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 33544a38162eSPaolo Bonzini r = -EIO; 33554a38162eSPaolo Bonzini goto out_unlock; 33564a38162eSPaolo Bonzini } 335773ad1606SSean Christopherson 3358c50d8ae3SPaolo Bonzini /* 3359c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3360c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3361c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3362c50d8ae3SPaolo Bonzini */ 336317e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3364748e52b9SSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3365c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3366c50d8ae3SPaolo Bonzini 336703ca4589SSean Christopherson if (WARN_ON_ONCE(!mmu->pml4_root)) { 33684a38162eSPaolo Bonzini r = -EIO; 33694a38162eSPaolo Bonzini goto out_unlock; 33704a38162eSPaolo Bonzini } 337173ad1606SSean Christopherson 337203ca4589SSean Christopherson mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; 337304d45551SSean Christopherson } 337404d45551SSean Christopherson 3375c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3376c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 33776e6ec584SSean Christopherson 3378b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 33796e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3380c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3381c50d8ae3SPaolo Bonzini continue; 3382c50d8ae3SPaolo Bonzini } 33836e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3384c50d8ae3SPaolo Bonzini } 3385c50d8ae3SPaolo Bonzini 33868123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 33878123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3388b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3389c50d8ae3SPaolo Bonzini } 3390c50d8ae3SPaolo Bonzini 3391ba0a194fSSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 339203ca4589SSean Christopherson mmu->root_hpa = __pa(mmu->pml4_root); 3393ba0a194fSSean Christopherson else 3394ba0a194fSSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 3395c50d8ae3SPaolo Bonzini 3396be01e8e2SSean Christopherson set_root_pgd: 3397b37233c9SSean Christopherson mmu->root_pgd = root_pgd; 33984a38162eSPaolo Bonzini out_unlock: 33994a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3400c50d8ae3SPaolo Bonzini 3401c50d8ae3SPaolo Bonzini return 0; 3402c50d8ae3SPaolo Bonzini } 3403c50d8ae3SPaolo Bonzini 3404748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3405c50d8ae3SPaolo Bonzini { 3406748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 340703ca4589SSean Christopherson u64 *pml4_root, *pae_root; 3408748e52b9SSean Christopherson 3409748e52b9SSean Christopherson /* 3410748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3411748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3412748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3413748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3414748e52b9SSean Christopherson */ 3415748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3416748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3417748e52b9SSean Christopherson return 0; 3418748e52b9SSean Christopherson 3419748e52b9SSean Christopherson /* 3420748e52b9SSean Christopherson * This mess only works with 4-level paging and needs to be updated to 3421748e52b9SSean Christopherson * work with 5-level paging. 3422748e52b9SSean Christopherson */ 3423748e52b9SSean Christopherson if (WARN_ON_ONCE(mmu->shadow_root_level != PT64_ROOT_4LEVEL)) 3424748e52b9SSean Christopherson return -EIO; 3425748e52b9SSean Christopherson 342603ca4589SSean Christopherson if (mmu->pae_root && mmu->pml4_root) 3427748e52b9SSean Christopherson return 0; 3428748e52b9SSean Christopherson 3429748e52b9SSean Christopherson /* 3430748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3431748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3432748e52b9SSean Christopherson */ 343303ca4589SSean Christopherson if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root)) 3434748e52b9SSean Christopherson return -EIO; 3435748e52b9SSean Christopherson 34364a98623dSSean Christopherson /* 34374a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 34384a98623dSSean Christopherson * doesn't need to be decrypted. 34394a98623dSSean Christopherson */ 3440748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3441748e52b9SSean Christopherson if (!pae_root) 3442748e52b9SSean Christopherson return -ENOMEM; 3443748e52b9SSean Christopherson 344403ca4589SSean Christopherson pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 344503ca4589SSean Christopherson if (!pml4_root) { 3446748e52b9SSean Christopherson free_page((unsigned long)pae_root); 3447748e52b9SSean Christopherson return -ENOMEM; 3448748e52b9SSean Christopherson } 3449748e52b9SSean Christopherson 3450748e52b9SSean Christopherson mmu->pae_root = pae_root; 345103ca4589SSean Christopherson mmu->pml4_root = pml4_root; 3452748e52b9SSean Christopherson 3453748e52b9SSean Christopherson return 0; 3454c50d8ae3SPaolo Bonzini } 3455c50d8ae3SPaolo Bonzini 3456c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3457c50d8ae3SPaolo Bonzini { 3458c50d8ae3SPaolo Bonzini int i; 3459c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3460c50d8ae3SPaolo Bonzini 3461c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3462c50d8ae3SPaolo Bonzini return; 3463c50d8ae3SPaolo Bonzini 3464c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3465c50d8ae3SPaolo Bonzini return; 3466c50d8ae3SPaolo Bonzini 3467c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3468c50d8ae3SPaolo Bonzini 3469c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3470c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3471e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3472c50d8ae3SPaolo Bonzini 3473c50d8ae3SPaolo Bonzini /* 3474c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3475c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3476c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3477c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3478c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3479c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 34800337f585SSean Christopherson * mmu_try_to_unsync_pages() describe what could go wrong if 34810337f585SSean Christopherson * this requirement isn't satisfied. 3482c50d8ae3SPaolo Bonzini */ 3483c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3484c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3485c50d8ae3SPaolo Bonzini return; 3486c50d8ae3SPaolo Bonzini 3487531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3488c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3489c50d8ae3SPaolo Bonzini 3490c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3491c50d8ae3SPaolo Bonzini 3492c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3493531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3494c50d8ae3SPaolo Bonzini return; 3495c50d8ae3SPaolo Bonzini } 3496c50d8ae3SPaolo Bonzini 3497531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3498c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3499c50d8ae3SPaolo Bonzini 3500c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3501c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3502c50d8ae3SPaolo Bonzini 3503c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3504c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3505e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3506c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3507c50d8ae3SPaolo Bonzini } 3508c50d8ae3SPaolo Bonzini } 3509c50d8ae3SPaolo Bonzini 3510c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3511531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3512c50d8ae3SPaolo Bonzini } 3513c50d8ae3SPaolo Bonzini 3514736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3515c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3516c50d8ae3SPaolo Bonzini { 3517c50d8ae3SPaolo Bonzini if (exception) 3518c50d8ae3SPaolo Bonzini exception->error_code = 0; 3519c50d8ae3SPaolo Bonzini return vaddr; 3520c50d8ae3SPaolo Bonzini } 3521c50d8ae3SPaolo Bonzini 3522736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3523c50d8ae3SPaolo Bonzini u32 access, 3524c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3525c50d8ae3SPaolo Bonzini { 3526c50d8ae3SPaolo Bonzini if (exception) 3527c50d8ae3SPaolo Bonzini exception->error_code = 0; 3528c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3529c50d8ae3SPaolo Bonzini } 3530c50d8ae3SPaolo Bonzini 3531c50d8ae3SPaolo Bonzini static bool 3532c50d8ae3SPaolo Bonzini __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) 3533c50d8ae3SPaolo Bonzini { 3534b5c3c1b3SSean Christopherson int bit7 = (pte >> 7) & 1; 3535c50d8ae3SPaolo Bonzini 3536b5c3c1b3SSean Christopherson return pte & rsvd_check->rsvd_bits_mask[bit7][level-1]; 3537c50d8ae3SPaolo Bonzini } 3538c50d8ae3SPaolo Bonzini 3539b5c3c1b3SSean Christopherson static bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, u64 pte) 3540c50d8ae3SPaolo Bonzini { 3541b5c3c1b3SSean Christopherson return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f); 3542c50d8ae3SPaolo Bonzini } 3543c50d8ae3SPaolo Bonzini 3544c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3545c50d8ae3SPaolo Bonzini { 3546c50d8ae3SPaolo Bonzini /* 3547c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3548c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3549c50d8ae3SPaolo Bonzini */ 3550c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3551c50d8ae3SPaolo Bonzini return false; 3552c50d8ae3SPaolo Bonzini 3553c50d8ae3SPaolo Bonzini if (direct) 3554c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3555c50d8ae3SPaolo Bonzini 3556c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3557c50d8ae3SPaolo Bonzini } 3558c50d8ae3SPaolo Bonzini 355995fb5b02SBen Gardon /* 356095fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 356195fb5b02SBen Gardon * That SPTE may be non-present. 356295fb5b02SBen Gardon */ 356339b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3564c50d8ae3SPaolo Bonzini { 3565c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 35662aa07893SSean Christopherson int leaf = -1; 356795fb5b02SBen Gardon u64 spte; 3568c50d8ae3SPaolo Bonzini 3569c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3570c50d8ae3SPaolo Bonzini 357139b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 357239b4d43eSSean Christopherson *root_level = iterator.level; 3573c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3574c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 357595fb5b02SBen Gardon leaf = iterator.level; 3576c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3577c50d8ae3SPaolo Bonzini 3578dde81f94SSean Christopherson sptes[leaf] = spte; 3579c50d8ae3SPaolo Bonzini 3580c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3581c50d8ae3SPaolo Bonzini break; 358295fb5b02SBen Gardon } 358395fb5b02SBen Gardon 358495fb5b02SBen Gardon walk_shadow_page_lockless_end(vcpu); 358595fb5b02SBen Gardon 358695fb5b02SBen Gardon return leaf; 358795fb5b02SBen Gardon } 358895fb5b02SBen Gardon 35899aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 359095fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 359195fb5b02SBen Gardon { 3592dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 359395fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 359439b4d43eSSean Christopherson int root, leaf, level; 359595fb5b02SBen Gardon bool reserved = false; 359695fb5b02SBen Gardon 359763c0cac9SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 359839b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 359995fb5b02SBen Gardon else 360039b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 360195fb5b02SBen Gardon 36022aa07893SSean Christopherson if (unlikely(leaf < 0)) { 36032aa07893SSean Christopherson *sptep = 0ull; 36042aa07893SSean Christopherson return reserved; 36052aa07893SSean Christopherson } 36062aa07893SSean Christopherson 36079aa41879SSean Christopherson *sptep = sptes[leaf]; 36089aa41879SSean Christopherson 36099aa41879SSean Christopherson /* 36109aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 36119aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 36129aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 36139aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 36149aa41879SSean Christopherson */ 36159aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 36169aa41879SSean Christopherson leaf++; 361795fb5b02SBen Gardon 361895fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 361995fb5b02SBen Gardon 36209aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3621b5c3c1b3SSean Christopherson /* 3622b5c3c1b3SSean Christopherson * Use a bitwise-OR instead of a logical-OR to aggregate the 3623b5c3c1b3SSean Christopherson * reserved bit and EPT's invalid memtype/XWR checks to avoid 3624b5c3c1b3SSean Christopherson * adding a Jcc in the loop. 3625b5c3c1b3SSean Christopherson */ 3626dde81f94SSean Christopherson reserved |= __is_bad_mt_xwr(rsvd_check, sptes[level]) | 3627dde81f94SSean Christopherson __is_rsvd_bits_set(rsvd_check, sptes[level], level); 3628c50d8ae3SPaolo Bonzini 3629c50d8ae3SPaolo Bonzini if (reserved) { 3630bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3631c50d8ae3SPaolo Bonzini __func__, addr); 363295fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3633bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3634bb4cdf3aSSean Christopherson sptes[level], level, 3635bb4cdf3aSSean Christopherson rsvd_check->rsvd_bits_mask[(sptes[level] >> 7) & 1][level-1]); 3636c50d8ae3SPaolo Bonzini } 3637ddce6208SSean Christopherson 3638c50d8ae3SPaolo Bonzini return reserved; 3639c50d8ae3SPaolo Bonzini } 3640c50d8ae3SPaolo Bonzini 3641c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3642c50d8ae3SPaolo Bonzini { 3643c50d8ae3SPaolo Bonzini u64 spte; 3644c50d8ae3SPaolo Bonzini bool reserved; 3645c50d8ae3SPaolo Bonzini 3646c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3647c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3648c50d8ae3SPaolo Bonzini 364995fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3650c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3651c50d8ae3SPaolo Bonzini return -EINVAL; 3652c50d8ae3SPaolo Bonzini 3653c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3654c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 36550a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3656c50d8ae3SPaolo Bonzini 3657c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3658c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3659c50d8ae3SPaolo Bonzini 3660c50d8ae3SPaolo Bonzini if (direct) 3661c50d8ae3SPaolo Bonzini addr = 0; 3662c50d8ae3SPaolo Bonzini 3663c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3664c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3665c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3666c50d8ae3SPaolo Bonzini } 3667c50d8ae3SPaolo Bonzini 3668c50d8ae3SPaolo Bonzini /* 3669c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3670c50d8ae3SPaolo Bonzini * the address. 3671c50d8ae3SPaolo Bonzini */ 3672c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3673c50d8ae3SPaolo Bonzini } 3674c50d8ae3SPaolo Bonzini 3675c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3676c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 3677c50d8ae3SPaolo Bonzini { 3678c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3679c50d8ae3SPaolo Bonzini return false; 3680c50d8ae3SPaolo Bonzini 3681c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 3682c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 3683c50d8ae3SPaolo Bonzini return false; 3684c50d8ae3SPaolo Bonzini 3685c50d8ae3SPaolo Bonzini /* 3686c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3687c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3688c50d8ae3SPaolo Bonzini */ 3689c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 3690c50d8ae3SPaolo Bonzini return true; 3691c50d8ae3SPaolo Bonzini 3692c50d8ae3SPaolo Bonzini return false; 3693c50d8ae3SPaolo Bonzini } 3694c50d8ae3SPaolo Bonzini 3695c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3696c50d8ae3SPaolo Bonzini { 3697c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3698c50d8ae3SPaolo Bonzini u64 spte; 3699c50d8ae3SPaolo Bonzini 3700c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3701c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 3702c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3703c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3704c50d8ae3SPaolo Bonzini break; 3705c50d8ae3SPaolo Bonzini } 3706c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3707c50d8ae3SPaolo Bonzini } 3708c50d8ae3SPaolo Bonzini 3709e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 37109f1a8526SSean Christopherson gfn_t gfn) 3711c50d8ae3SPaolo Bonzini { 3712c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3713c50d8ae3SPaolo Bonzini 3714c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3715c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3716c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3717d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3718c50d8ae3SPaolo Bonzini 37199f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 37209f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3721c50d8ae3SPaolo Bonzini } 3722c50d8ae3SPaolo Bonzini 3723c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 37244a42d848SDavid Stevens gpa_t cr2_or_gpa, kvm_pfn_t *pfn, hva_t *hva, 37254a42d848SDavid Stevens bool write, bool *writable) 3726c50d8ae3SPaolo Bonzini { 3727c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 3728c50d8ae3SPaolo Bonzini bool async; 3729c50d8ae3SPaolo Bonzini 3730e0c37868SSean Christopherson /* 3731e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3732e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3733e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3734e0c37868SSean Christopherson */ 3735e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 3736e0c37868SSean Christopherson return true; 3737e0c37868SSean Christopherson 3738c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 3739c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 3740c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 3741c583eed6SSean Christopherson *writable = false; 3742c50d8ae3SPaolo Bonzini return false; 3743c50d8ae3SPaolo Bonzini } 3744c50d8ae3SPaolo Bonzini 3745c50d8ae3SPaolo Bonzini async = false; 37464a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, 37474a42d848SDavid Stevens write, writable, hva); 3748c50d8ae3SPaolo Bonzini if (!async) 3749c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3750c50d8ae3SPaolo Bonzini 3751c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 37529f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 3753c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 37549f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 3755c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 3756c50d8ae3SPaolo Bonzini return true; 37579f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 3758c50d8ae3SPaolo Bonzini return true; 3759c50d8ae3SPaolo Bonzini } 3760c50d8ae3SPaolo Bonzini 37614a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, 37624a42d848SDavid Stevens write, writable, hva); 3763c50d8ae3SPaolo Bonzini return false; 3764c50d8ae3SPaolo Bonzini } 3765c50d8ae3SPaolo Bonzini 37660f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 37670f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 3768c50d8ae3SPaolo Bonzini { 376963c0cac9SDavid Matlack bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); 3770367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 37710f90e1c1SSean Christopherson bool map_writable; 3772c50d8ae3SPaolo Bonzini 37730f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 37740f90e1c1SSean Christopherson unsigned long mmu_seq; 37750f90e1c1SSean Christopherson kvm_pfn_t pfn; 37764a42d848SDavid Stevens hva_t hva; 377783f06fa7SSean Christopherson int r; 3778c50d8ae3SPaolo Bonzini 3779c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 3780c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3781c50d8ae3SPaolo Bonzini 37820b873fd7SDavid Matlack if (!is_tdp_mmu_fault) { 3783c4371c2aSSean Christopherson r = fast_page_fault(vcpu, gpa, error_code); 3784c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3785c4371c2aSSean Christopherson return r; 3786bb18842eSBen Gardon } 378783291445SSean Christopherson 3788378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3789c50d8ae3SPaolo Bonzini if (r) 3790c50d8ae3SPaolo Bonzini return r; 3791c50d8ae3SPaolo Bonzini 3792367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3793367fd790SSean Christopherson smp_rmb(); 3794367fd790SSean Christopherson 37954a42d848SDavid Stevens if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, &hva, 37964a42d848SDavid Stevens write, &map_writable)) 3797367fd790SSean Christopherson return RET_PF_RETRY; 3798367fd790SSean Christopherson 37990f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 3800367fd790SSean Christopherson return r; 3801367fd790SSean Christopherson 3802367fd790SSean Christopherson r = RET_PF_RETRY; 3803a2855afcSBen Gardon 38040b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3805a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3806a2855afcSBen Gardon else 3807531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3808a2855afcSBen Gardon 38094a42d848SDavid Stevens if (!is_noslot_pfn(pfn) && mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, hva)) 3810367fd790SSean Christopherson goto out_unlock; 38117bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 38127bd7ded6SSean Christopherson if (r) 3813367fd790SSean Christopherson goto out_unlock; 3814bb18842eSBen Gardon 38150b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3816bb18842eSBen Gardon r = kvm_tdp_mmu_map(vcpu, gpa, error_code, map_writable, max_level, 3817bb18842eSBen Gardon pfn, prefault); 3818bb18842eSBen Gardon else 38196c2fd34fSSean Christopherson r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, 38206c2fd34fSSean Christopherson prefault, is_tdp); 38210f90e1c1SSean Christopherson 3822367fd790SSean Christopherson out_unlock: 38230b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3824a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 3825a2855afcSBen Gardon else 3826531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3827367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 3828367fd790SSean Christopherson return r; 3829c50d8ae3SPaolo Bonzini } 3830c50d8ae3SPaolo Bonzini 38310f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 38320f90e1c1SSean Christopherson u32 error_code, bool prefault) 38330f90e1c1SSean Christopherson { 38340f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 38350f90e1c1SSean Christopherson 38360f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 38370f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 38383bae0459SSean Christopherson PG_LEVEL_2M, false); 38390f90e1c1SSean Christopherson } 38400f90e1c1SSean Christopherson 3841c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 3842c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 3843c50d8ae3SPaolo Bonzini { 3844c50d8ae3SPaolo Bonzini int r = 1; 38459ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 3846c50d8ae3SPaolo Bonzini 3847736c291cSSean Christopherson #ifndef CONFIG_X86_64 3848736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 3849736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 3850736c291cSSean Christopherson return -EFAULT; 3851736c291cSSean Christopherson #endif 3852736c291cSSean Christopherson 3853c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 38549ce372b3SVitaly Kuznetsov if (!flags) { 3855c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 3856c50d8ae3SPaolo Bonzini 3857c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 3858c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 3859c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 3860c50d8ae3SPaolo Bonzini insn_len); 38619ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 386268fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 3863c50d8ae3SPaolo Bonzini local_irq_disable(); 38646bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 3865c50d8ae3SPaolo Bonzini local_irq_enable(); 38669ce372b3SVitaly Kuznetsov } else { 38679ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 3868c50d8ae3SPaolo Bonzini } 38699ce372b3SVitaly Kuznetsov 3870c50d8ae3SPaolo Bonzini return r; 3871c50d8ae3SPaolo Bonzini } 3872c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 3873c50d8ae3SPaolo Bonzini 38747a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 3875c50d8ae3SPaolo Bonzini bool prefault) 3876c50d8ae3SPaolo Bonzini { 3877cb9b88c6SSean Christopherson int max_level; 3878c50d8ae3SPaolo Bonzini 3879e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 38803bae0459SSean Christopherson max_level > PG_LEVEL_4K; 3881cb9b88c6SSean Christopherson max_level--) { 3882cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 38830f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 3884c50d8ae3SPaolo Bonzini 3885cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 3886cb9b88c6SSean Christopherson break; 3887c50d8ae3SPaolo Bonzini } 3888c50d8ae3SPaolo Bonzini 38890f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 38900f90e1c1SSean Christopherson max_level, true); 3891c50d8ae3SPaolo Bonzini } 3892c50d8ae3SPaolo Bonzini 3893c50d8ae3SPaolo Bonzini static void nonpaging_init_context(struct kvm_vcpu *vcpu, 3894c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 3895c50d8ae3SPaolo Bonzini { 3896c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 3897c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 3898c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 38995efac074SPaolo Bonzini context->invlpg = NULL; 3900c50d8ae3SPaolo Bonzini context->root_level = 0; 3901c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 3902c50d8ae3SPaolo Bonzini context->direct_map = true; 3903c50d8ae3SPaolo Bonzini context->nx = false; 3904c50d8ae3SPaolo Bonzini } 3905c50d8ae3SPaolo Bonzini 3906be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 39070be44352SSean Christopherson union kvm_mmu_page_role role) 39080be44352SSean Christopherson { 3909be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 3910e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 3911e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 39120be44352SSean Christopherson } 39130be44352SSean Christopherson 3914c50d8ae3SPaolo Bonzini /* 3915be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 3916c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 3917c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 3918c50d8ae3SPaolo Bonzini * returned. 3919c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 3920c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 3921c50d8ae3SPaolo Bonzini */ 3922be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3923c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 3924c50d8ae3SPaolo Bonzini { 3925c50d8ae3SPaolo Bonzini uint i; 3926c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 3927c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 3928c50d8ae3SPaolo Bonzini 3929be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 3930c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 3931c50d8ae3SPaolo Bonzini 3932be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 39330be44352SSean Christopherson return true; 39340be44352SSean Christopherson 3935c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 3936c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 3937c50d8ae3SPaolo Bonzini 3938be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 3939c50d8ae3SPaolo Bonzini break; 3940c50d8ae3SPaolo Bonzini } 3941c50d8ae3SPaolo Bonzini 3942c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 3943be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 3944c50d8ae3SPaolo Bonzini 3945c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 3946c50d8ae3SPaolo Bonzini } 3947c50d8ae3SPaolo Bonzini 3948be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3949b869855bSSean Christopherson union kvm_mmu_page_role new_role) 3950c50d8ae3SPaolo Bonzini { 3951c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 3952c50d8ae3SPaolo Bonzini 3953c50d8ae3SPaolo Bonzini /* 3954c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 3955c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 3956c50d8ae3SPaolo Bonzini * later if necessary. 3957c50d8ae3SPaolo Bonzini */ 3958c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3959b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 3960fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 3961c50d8ae3SPaolo Bonzini 3962c50d8ae3SPaolo Bonzini return false; 3963c50d8ae3SPaolo Bonzini } 3964c50d8ae3SPaolo Bonzini 3965be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 3966b5129100SSean Christopherson union kvm_mmu_page_role new_role) 3967c50d8ae3SPaolo Bonzini { 3968be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 3969b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 3970b869855bSSean Christopherson return; 3971c50d8ae3SPaolo Bonzini } 3972c50d8ae3SPaolo Bonzini 3973c50d8ae3SPaolo Bonzini /* 3974b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 3975b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 3976b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 3977b869855bSSean Christopherson * free the root set here and allocate a new one. 3978b869855bSSean Christopherson */ 3979b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 3980b869855bSSean Christopherson 3981b5129100SSean Christopherson if (force_flush_and_sync_on_reuse) { 3982b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 3983b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 3984b5129100SSean Christopherson } 3985b869855bSSean Christopherson 3986b869855bSSean Christopherson /* 3987b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 3988b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 3989b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 3990b869855bSSean Christopherson * the shadow page tables. 3991c50d8ae3SPaolo Bonzini */ 3992c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3993c50d8ae3SPaolo Bonzini 3994daa5b6c1SBen Gardon /* 3995daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 3996daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 3997daa5b6c1SBen Gardon */ 3998daa5b6c1SBen Gardon if (!new_role.direct) 3999daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 4000daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 4001c50d8ae3SPaolo Bonzini } 4002c50d8ae3SPaolo Bonzini 4003b5129100SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd) 4004c50d8ae3SPaolo Bonzini { 4005b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu)); 4006c50d8ae3SPaolo Bonzini } 4007be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4008c50d8ae3SPaolo Bonzini 4009c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4010c50d8ae3SPaolo Bonzini { 4011c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4012c50d8ae3SPaolo Bonzini } 4013c50d8ae3SPaolo Bonzini 4014c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 40150a2b64c5SBen Gardon unsigned int access, int *nr_present) 4016c50d8ae3SPaolo Bonzini { 4017c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4018c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4019c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4020c50d8ae3SPaolo Bonzini return true; 4021c50d8ae3SPaolo Bonzini } 4022c50d8ae3SPaolo Bonzini 4023c50d8ae3SPaolo Bonzini (*nr_present)++; 4024c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4025c50d8ae3SPaolo Bonzini return true; 4026c50d8ae3SPaolo Bonzini } 4027c50d8ae3SPaolo Bonzini 4028c50d8ae3SPaolo Bonzini return false; 4029c50d8ae3SPaolo Bonzini } 4030c50d8ae3SPaolo Bonzini 4031c50d8ae3SPaolo Bonzini static inline bool is_last_gpte(struct kvm_mmu *mmu, 4032c50d8ae3SPaolo Bonzini unsigned level, unsigned gpte) 4033c50d8ae3SPaolo Bonzini { 4034c50d8ae3SPaolo Bonzini /* 4035c50d8ae3SPaolo Bonzini * The RHS has bit 7 set iff level < mmu->last_nonleaf_level. 4036c50d8ae3SPaolo Bonzini * If it is clear, there are no large pages at this level, so clear 4037c50d8ae3SPaolo Bonzini * PT_PAGE_SIZE_MASK in gpte if that is the case. 4038c50d8ae3SPaolo Bonzini */ 4039c50d8ae3SPaolo Bonzini gpte &= level - mmu->last_nonleaf_level; 4040c50d8ae3SPaolo Bonzini 4041c50d8ae3SPaolo Bonzini /* 40423bae0459SSean Christopherson * PG_LEVEL_4K always terminates. The RHS has bit 7 set 40433bae0459SSean Christopherson * iff level <= PG_LEVEL_4K, which for our purpose means 40443bae0459SSean Christopherson * level == PG_LEVEL_4K; set PT_PAGE_SIZE_MASK in gpte then. 4045c50d8ae3SPaolo Bonzini */ 40463bae0459SSean Christopherson gpte |= level - PG_LEVEL_4K - 1; 4047c50d8ae3SPaolo Bonzini 4048c50d8ae3SPaolo Bonzini return gpte & PT_PAGE_SIZE_MASK; 4049c50d8ae3SPaolo Bonzini } 4050c50d8ae3SPaolo Bonzini 4051c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4052c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4053c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4054c50d8ae3SPaolo Bonzini #undef PTTYPE 4055c50d8ae3SPaolo Bonzini 4056c50d8ae3SPaolo Bonzini #define PTTYPE 64 4057c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4058c50d8ae3SPaolo Bonzini #undef PTTYPE 4059c50d8ae3SPaolo Bonzini 4060c50d8ae3SPaolo Bonzini #define PTTYPE 32 4061c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4062c50d8ae3SPaolo Bonzini #undef PTTYPE 4063c50d8ae3SPaolo Bonzini 4064c50d8ae3SPaolo Bonzini static void 4065c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4066c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *rsvd_check, 40675b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4068c50d8ae3SPaolo Bonzini bool pse, bool amd) 4069c50d8ae3SPaolo Bonzini { 4070c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4071c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 40725b7f575cSSean Christopherson u64 high_bits_rsvd; 4073c50d8ae3SPaolo Bonzini 4074c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4075c50d8ae3SPaolo Bonzini 4076c50d8ae3SPaolo Bonzini if (!gbpages) 4077c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4078c50d8ae3SPaolo Bonzini 40795b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 40805b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 40815b7f575cSSean Christopherson else 40825b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 40835b7f575cSSean Christopherson 40845b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 40855b7f575cSSean Christopherson if (!nx) 40865b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 40875b7f575cSSean Christopherson 4088c50d8ae3SPaolo Bonzini /* 4089c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4090c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4091c50d8ae3SPaolo Bonzini */ 4092c50d8ae3SPaolo Bonzini if (amd) 4093c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4094c50d8ae3SPaolo Bonzini 4095c50d8ae3SPaolo Bonzini switch (level) { 4096c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4097c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4098c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4099c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4100c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4101c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4102c50d8ae3SPaolo Bonzini 4103c50d8ae3SPaolo Bonzini if (!pse) { 4104c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4105c50d8ae3SPaolo Bonzini break; 4106c50d8ae3SPaolo Bonzini } 4107c50d8ae3SPaolo Bonzini 4108c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4109c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4110c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4111c50d8ae3SPaolo Bonzini else 4112c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4113c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4114c50d8ae3SPaolo Bonzini break; 4115c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 41165b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 41175b7f575cSSean Christopherson high_bits_rsvd | 41185b7f575cSSean Christopherson rsvd_bits(5, 8) | 41195b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 41205b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 41215b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 41225b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4123c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4124c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4125c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4126c50d8ae3SPaolo Bonzini break; 4127c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 41285b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 41295b7f575cSSean Christopherson nonleaf_bit8_rsvd | 41305b7f575cSSean Christopherson rsvd_bits(7, 7); 4131c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4132c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4133df561f66SGustavo A. R. Silva fallthrough; 4134c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 41355b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 41365b7f575cSSean Christopherson nonleaf_bit8_rsvd | 41375b7f575cSSean Christopherson rsvd_bits(7, 7); 41385b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 41395b7f575cSSean Christopherson gbpages_bit_rsvd; 41405b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 41415b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4142c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4143c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 41445b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 41455b7f575cSSean Christopherson gbpages_bit_rsvd | 4146c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 41475b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4148c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4149c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4150c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4151c50d8ae3SPaolo Bonzini break; 4152c50d8ae3SPaolo Bonzini } 4153c50d8ae3SPaolo Bonzini } 4154c50d8ae3SPaolo Bonzini 4155c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4156c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4157c50d8ae3SPaolo Bonzini { 4158c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, 41595b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 41605b7f575cSSean Christopherson context->root_level, context->nx, 4161c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 416223493d0aSSean Christopherson is_pse(vcpu), 416323493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4164c50d8ae3SPaolo Bonzini } 4165c50d8ae3SPaolo Bonzini 4166c50d8ae3SPaolo Bonzini static void 4167c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 41685b7f575cSSean Christopherson u64 pa_bits_rsvd, bool execonly) 4169c50d8ae3SPaolo Bonzini { 41705b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 4171c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4172c50d8ae3SPaolo Bonzini 41735b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 41745b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 41755b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6); 41765b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6); 41775b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4178c50d8ae3SPaolo Bonzini 4179c50d8ae3SPaolo Bonzini /* large page */ 4180c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4181c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 41825b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29); 41835b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20); 4184c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4185c50d8ae3SPaolo Bonzini 4186c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4187c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4188c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4189c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4190c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4191c50d8ae3SPaolo Bonzini if (!execonly) { 4192c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4193c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4194c50d8ae3SPaolo Bonzini } 4195c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4196c50d8ae3SPaolo Bonzini } 4197c50d8ae3SPaolo Bonzini 4198c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4199c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4200c50d8ae3SPaolo Bonzini { 4201c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 42025b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, execonly); 4203c50d8ae3SPaolo Bonzini } 4204c50d8ae3SPaolo Bonzini 42056f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 42066f8e65a6SSean Christopherson { 42076f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 42086f8e65a6SSean Christopherson } 42096f8e65a6SSean Christopherson 4210c50d8ae3SPaolo Bonzini /* 4211c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4212c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4213c50d8ae3SPaolo Bonzini * follow the features in guest. 4214c50d8ae3SPaolo Bonzini */ 4215*16be1d12SSean Christopherson static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4216*16be1d12SSean Christopherson struct kvm_mmu *context) 4217c50d8ae3SPaolo Bonzini { 4218112022bdSSean Christopherson /* 4219112022bdSSean Christopherson * KVM uses NX when TDP is disabled to handle a variety of scenarios, 4220112022bdSSean Christopherson * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and 4221112022bdSSean Christopherson * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0. 4222112022bdSSean Christopherson * The iTLB multi-hit workaround can be toggled at any time, so assume 4223112022bdSSean Christopherson * NX can be used by any non-nested shadow MMU to avoid having to reset 4224112022bdSSean Christopherson * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled. 4225112022bdSSean Christopherson */ 422618feaad3SSean Christopherson bool uses_nx = context->nx || !tdp_enabled; 4227c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4228c50d8ae3SPaolo Bonzini int i; 4229c50d8ae3SPaolo Bonzini 4230c50d8ae3SPaolo Bonzini /* 4231c50d8ae3SPaolo Bonzini * Passing "true" to the last argument is okay; it adds a check 4232c50d8ae3SPaolo Bonzini * on bit 8 of the SPTEs which KVM doesn't use anyway. 4233c50d8ae3SPaolo Bonzini */ 4234c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4235c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 42366f8e65a6SSean Christopherson reserved_hpa_bits(), 4237c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 4238c50d8ae3SPaolo Bonzini guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), 4239c50d8ae3SPaolo Bonzini is_pse(vcpu), true); 4240c50d8ae3SPaolo Bonzini 4241c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4242c50d8ae3SPaolo Bonzini return; 4243c50d8ae3SPaolo Bonzini 4244c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4245c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4246c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4247c50d8ae3SPaolo Bonzini } 4248c50d8ae3SPaolo Bonzini 4249c50d8ae3SPaolo Bonzini } 4250c50d8ae3SPaolo Bonzini 4251c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4252c50d8ae3SPaolo Bonzini { 4253c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4254c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4255c50d8ae3SPaolo Bonzini } 4256c50d8ae3SPaolo Bonzini 4257c50d8ae3SPaolo Bonzini /* 4258c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4259c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4260c50d8ae3SPaolo Bonzini */ 4261c50d8ae3SPaolo Bonzini static void 4262c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4263c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4264c50d8ae3SPaolo Bonzini { 4265c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4266c50d8ae3SPaolo Bonzini int i; 4267c50d8ae3SPaolo Bonzini 4268c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4269c50d8ae3SPaolo Bonzini 4270c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4271c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask(vcpu, shadow_zero_check, 42726f8e65a6SSean Christopherson reserved_hpa_bits(), 4273c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4274c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 4275c50d8ae3SPaolo Bonzini true, true); 4276c50d8ae3SPaolo Bonzini else 4277c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 42786f8e65a6SSean Christopherson reserved_hpa_bits(), false); 4279c50d8ae3SPaolo Bonzini 4280c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4281c50d8ae3SPaolo Bonzini return; 4282c50d8ae3SPaolo Bonzini 4283c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4284c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4285c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4286c50d8ae3SPaolo Bonzini } 4287c50d8ae3SPaolo Bonzini } 4288c50d8ae3SPaolo Bonzini 4289c50d8ae3SPaolo Bonzini /* 4290c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4291c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4292c50d8ae3SPaolo Bonzini */ 4293c50d8ae3SPaolo Bonzini static void 4294c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4295c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4296c50d8ae3SPaolo Bonzini { 4297c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 42986f8e65a6SSean Christopherson reserved_hpa_bits(), execonly); 4299c50d8ae3SPaolo Bonzini } 4300c50d8ae3SPaolo Bonzini 4301c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4302c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4303c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4304c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4305c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4306c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4307c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4308c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4309c50d8ae3SPaolo Bonzini 4310c50d8ae3SPaolo Bonzini 4311c50d8ae3SPaolo Bonzini static void update_permission_bitmask(struct kvm_vcpu *vcpu, 4312c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu, bool ept) 4313c50d8ae3SPaolo Bonzini { 4314c50d8ae3SPaolo Bonzini unsigned byte; 4315c50d8ae3SPaolo Bonzini 4316c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4317c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4318c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4319c50d8ae3SPaolo Bonzini 4320c50d8ae3SPaolo Bonzini bool cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP) != 0; 4321c50d8ae3SPaolo Bonzini bool cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP) != 0; 4322c50d8ae3SPaolo Bonzini bool cr0_wp = is_write_protection(vcpu); 4323c50d8ae3SPaolo Bonzini 4324c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4325c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4326c50d8ae3SPaolo Bonzini 4327c50d8ae3SPaolo Bonzini /* 4328c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4329c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4330c50d8ae3SPaolo Bonzini */ 4331c50d8ae3SPaolo Bonzini 4332c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4333c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4334c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4335c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4336c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4337c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4338c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4339c50d8ae3SPaolo Bonzini u8 smepf = 0; 4340c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4341c50d8ae3SPaolo Bonzini u8 smapf = 0; 4342c50d8ae3SPaolo Bonzini 4343c50d8ae3SPaolo Bonzini if (!ept) { 4344c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4345c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4346c50d8ae3SPaolo Bonzini 4347c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 4348c50d8ae3SPaolo Bonzini if (!mmu->nx) 4349c50d8ae3SPaolo Bonzini ff = 0; 4350c50d8ae3SPaolo Bonzini 4351c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4352c50d8ae3SPaolo Bonzini if (!cr0_wp) 4353c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4354c50d8ae3SPaolo Bonzini 4355c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4356c50d8ae3SPaolo Bonzini if (cr4_smep) 4357c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4358c50d8ae3SPaolo Bonzini 4359c50d8ae3SPaolo Bonzini /* 4360c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4361c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4362c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4363c50d8ae3SPaolo Bonzini * conditions are true: 4364c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4365c50d8ae3SPaolo Bonzini * - A user page is accessed 4366c50d8ae3SPaolo Bonzini * - The access is not a fetch 4367c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4368c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4369c50d8ae3SPaolo Bonzini * 4370c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4371c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4372c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4373c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4374c50d8ae3SPaolo Bonzini */ 4375c50d8ae3SPaolo Bonzini if (cr4_smap) 4376c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4377c50d8ae3SPaolo Bonzini } 4378c50d8ae3SPaolo Bonzini 4379c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4380c50d8ae3SPaolo Bonzini } 4381c50d8ae3SPaolo Bonzini } 4382c50d8ae3SPaolo Bonzini 4383c50d8ae3SPaolo Bonzini /* 4384c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4385c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4386c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4387c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4388c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4389c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4390c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4391c50d8ae3SPaolo Bonzini * 4392c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4393c50d8ae3SPaolo Bonzini * page tables and the machine state: 4394c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4395c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4396c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4397c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4398c50d8ae3SPaolo Bonzini * 4399c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4400c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4401c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4402c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4403c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4404c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4405c50d8ae3SPaolo Bonzini * only will be masked away. 4406c50d8ae3SPaolo Bonzini */ 4407c50d8ae3SPaolo Bonzini static void update_pkru_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 4408c50d8ae3SPaolo Bonzini bool ept) 4409c50d8ae3SPaolo Bonzini { 4410c50d8ae3SPaolo Bonzini unsigned bit; 4411c50d8ae3SPaolo Bonzini bool wp; 4412c50d8ae3SPaolo Bonzini 4413c50d8ae3SPaolo Bonzini if (ept) { 4414c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4415c50d8ae3SPaolo Bonzini return; 4416c50d8ae3SPaolo Bonzini } 4417c50d8ae3SPaolo Bonzini 4418c50d8ae3SPaolo Bonzini /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */ 4419c50d8ae3SPaolo Bonzini if (!kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || !is_long_mode(vcpu)) { 4420c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4421c50d8ae3SPaolo Bonzini return; 4422c50d8ae3SPaolo Bonzini } 4423c50d8ae3SPaolo Bonzini 4424c50d8ae3SPaolo Bonzini wp = is_write_protection(vcpu); 4425c50d8ae3SPaolo Bonzini 4426c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4427c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4428c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4429c50d8ae3SPaolo Bonzini 4430c50d8ae3SPaolo Bonzini pfec = bit << 1; 4431c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4432c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4433c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4434c50d8ae3SPaolo Bonzini 4435c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4436c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4437c50d8ae3SPaolo Bonzini 4438c50d8ae3SPaolo Bonzini /* 4439c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4440c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4441c50d8ae3SPaolo Bonzini */ 4442c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4443c50d8ae3SPaolo Bonzini /* 4444c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4445c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4446c50d8ae3SPaolo Bonzini */ 4447c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4448c50d8ae3SPaolo Bonzini 4449c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4450c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4451c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4452c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4453c50d8ae3SPaolo Bonzini 4454c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4455c50d8ae3SPaolo Bonzini } 4456c50d8ae3SPaolo Bonzini } 4457c50d8ae3SPaolo Bonzini 4458c50d8ae3SPaolo Bonzini static void update_last_nonleaf_level(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 4459c50d8ae3SPaolo Bonzini { 4460c50d8ae3SPaolo Bonzini unsigned root_level = mmu->root_level; 4461c50d8ae3SPaolo Bonzini 4462c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level = root_level; 4463c50d8ae3SPaolo Bonzini if (root_level == PT32_ROOT_LEVEL && is_pse(vcpu)) 4464c50d8ae3SPaolo Bonzini mmu->last_nonleaf_level++; 4465c50d8ae3SPaolo Bonzini } 4466c50d8ae3SPaolo Bonzini 4467c50d8ae3SPaolo Bonzini static void paging64_init_context_common(struct kvm_vcpu *vcpu, 4468c50d8ae3SPaolo Bonzini struct kvm_mmu *context, 4469c50d8ae3SPaolo Bonzini int level) 4470c50d8ae3SPaolo Bonzini { 4471c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4472c50d8ae3SPaolo Bonzini context->root_level = level; 4473c50d8ae3SPaolo Bonzini 4474c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4475c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4476c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4477c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4478c50d8ae3SPaolo Bonzini 4479c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_pae(vcpu)); 4480c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4481c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4482c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4483c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4484c50d8ae3SPaolo Bonzini context->shadow_root_level = level; 4485c50d8ae3SPaolo Bonzini context->direct_map = false; 4486c50d8ae3SPaolo Bonzini } 4487c50d8ae3SPaolo Bonzini 4488c50d8ae3SPaolo Bonzini static void paging64_init_context(struct kvm_vcpu *vcpu, 4489c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4490c50d8ae3SPaolo Bonzini { 4491c50d8ae3SPaolo Bonzini int root_level = is_la57_mode(vcpu) ? 4492c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4493c50d8ae3SPaolo Bonzini 4494c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, root_level); 4495c50d8ae3SPaolo Bonzini } 4496c50d8ae3SPaolo Bonzini 4497c50d8ae3SPaolo Bonzini static void paging32_init_context(struct kvm_vcpu *vcpu, 4498c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4499c50d8ae3SPaolo Bonzini { 4500c50d8ae3SPaolo Bonzini context->nx = false; 4501c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4502c50d8ae3SPaolo Bonzini 4503c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4504c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4505c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4506c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4507c50d8ae3SPaolo Bonzini 4508c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4509c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4510c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4511c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4512c50d8ae3SPaolo Bonzini context->shadow_root_level = PT32E_ROOT_LEVEL; 4513c50d8ae3SPaolo Bonzini context->direct_map = false; 4514c50d8ae3SPaolo Bonzini } 4515c50d8ae3SPaolo Bonzini 4516c50d8ae3SPaolo Bonzini static void paging32E_init_context(struct kvm_vcpu *vcpu, 4517c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4518c50d8ae3SPaolo Bonzini { 4519c50d8ae3SPaolo Bonzini paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL); 4520c50d8ae3SPaolo Bonzini } 4521c50d8ae3SPaolo Bonzini 4522c50d8ae3SPaolo Bonzini static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu) 4523c50d8ae3SPaolo Bonzini { 4524c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4525c50d8ae3SPaolo Bonzini 4526c50d8ae3SPaolo Bonzini ext.cr0_pg = !!is_paging(vcpu); 4527c50d8ae3SPaolo Bonzini ext.cr4_pae = !!is_pae(vcpu); 4528c50d8ae3SPaolo Bonzini ext.cr4_smep = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); 4529c50d8ae3SPaolo Bonzini ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); 4530c50d8ae3SPaolo Bonzini ext.cr4_pse = !!is_pse(vcpu); 4531c50d8ae3SPaolo Bonzini ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE); 4532f71a53d1SSean Christopherson ext.cr4_la57 = !!kvm_read_cr4_bits(vcpu, X86_CR4_LA57); 4533c50d8ae3SPaolo Bonzini 4534c50d8ae3SPaolo Bonzini ext.valid = 1; 4535c50d8ae3SPaolo Bonzini 4536c50d8ae3SPaolo Bonzini return ext; 4537c50d8ae3SPaolo Bonzini } 4538c50d8ae3SPaolo Bonzini 4539c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 4540c50d8ae3SPaolo Bonzini bool base_only) 4541c50d8ae3SPaolo Bonzini { 4542c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4543c50d8ae3SPaolo Bonzini 4544c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4545c50d8ae3SPaolo Bonzini role.base.nxe = !!is_nx(vcpu); 4546c50d8ae3SPaolo Bonzini role.base.cr0_wp = is_write_protection(vcpu); 4547c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4548c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4549c50d8ae3SPaolo Bonzini 4550c50d8ae3SPaolo Bonzini if (base_only) 4551c50d8ae3SPaolo Bonzini return role; 4552c50d8ae3SPaolo Bonzini 4553c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4554c50d8ae3SPaolo Bonzini 4555c50d8ae3SPaolo Bonzini return role; 4556c50d8ae3SPaolo Bonzini } 4557c50d8ae3SPaolo Bonzini 4558d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4559d468d94bSSean Christopherson { 4560d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 456183013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4562d468d94bSSean Christopherson return 4; 4563d468d94bSSean Christopherson 456483013059SSean Christopherson return max_tdp_level; 4565d468d94bSSean Christopherson } 4566d468d94bSSean Christopherson 4567c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4568c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 4569c50d8ae3SPaolo Bonzini { 4570c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4571c50d8ae3SPaolo Bonzini 4572c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4573d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4574c50d8ae3SPaolo Bonzini role.base.direct = true; 4575c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4576c50d8ae3SPaolo Bonzini 4577c50d8ae3SPaolo Bonzini return role; 4578c50d8ae3SPaolo Bonzini } 4579c50d8ae3SPaolo Bonzini 4580c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4581c50d8ae3SPaolo Bonzini { 45828c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4583c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4584c50d8ae3SPaolo Bonzini kvm_calc_tdp_mmu_root_page_role(vcpu, false); 4585c50d8ae3SPaolo Bonzini 4586c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4587c50d8ae3SPaolo Bonzini return; 4588c50d8ae3SPaolo Bonzini 4589c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 45907a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4591c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 45925efac074SPaolo Bonzini context->invlpg = NULL; 4593d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4594c50d8ae3SPaolo Bonzini context->direct_map = true; 4595d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4596c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4597c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4598c50d8ae3SPaolo Bonzini 4599c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4600c50d8ae3SPaolo Bonzini context->nx = false; 4601c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 4602c50d8ae3SPaolo Bonzini context->root_level = 0; 4603c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4604c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4605c50d8ae3SPaolo Bonzini context->root_level = is_la57_mode(vcpu) ? 4606c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4607c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4608c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4609c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4610c50d8ae3SPaolo Bonzini context->nx = is_nx(vcpu); 4611c50d8ae3SPaolo Bonzini context->root_level = PT32E_ROOT_LEVEL; 4612c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4613c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4614c50d8ae3SPaolo Bonzini } else { 4615c50d8ae3SPaolo Bonzini context->nx = false; 4616c50d8ae3SPaolo Bonzini context->root_level = PT32_ROOT_LEVEL; 4617c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, context); 4618c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4619c50d8ae3SPaolo Bonzini } 4620c50d8ae3SPaolo Bonzini 4621c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, false); 4622c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, false); 4623c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4624c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4625c50d8ae3SPaolo Bonzini } 4626c50d8ae3SPaolo Bonzini 4627c50d8ae3SPaolo Bonzini static union kvm_mmu_role 462859505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, bool base_only) 4629c50d8ae3SPaolo Bonzini { 4630c50d8ae3SPaolo Bonzini union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only); 4631c50d8ae3SPaolo Bonzini 4632c50d8ae3SPaolo Bonzini role.base.smep_andnot_wp = role.ext.cr4_smep && 4633c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4634c50d8ae3SPaolo Bonzini role.base.smap_andnot_wp = role.ext.cr4_smap && 4635c50d8ae3SPaolo Bonzini !is_write_protection(vcpu); 4636c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = !!is_pae(vcpu); 4637c50d8ae3SPaolo Bonzini 463859505b55SSean Christopherson return role; 463959505b55SSean Christopherson } 464059505b55SSean Christopherson 464159505b55SSean Christopherson static union kvm_mmu_role 464259505b55SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only) 464359505b55SSean Christopherson { 464459505b55SSean Christopherson union kvm_mmu_role role = 464559505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, base_only); 464659505b55SSean Christopherson 464759505b55SSean Christopherson role.base.direct = !is_paging(vcpu); 464859505b55SSean Christopherson 4649c50d8ae3SPaolo Bonzini if (!is_long_mode(vcpu)) 4650c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 4651c50d8ae3SPaolo Bonzini else if (is_la57_mode(vcpu)) 4652c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4653c50d8ae3SPaolo Bonzini else 4654c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4655c50d8ae3SPaolo Bonzini 4656c50d8ae3SPaolo Bonzini return role; 4657c50d8ae3SPaolo Bonzini } 4658c50d8ae3SPaolo Bonzini 46598c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 4660dbc4739bSSean Christopherson unsigned long cr0, unsigned long cr4, 4661dbc4739bSSean Christopherson u64 efer, union kvm_mmu_role new_role) 4662c50d8ae3SPaolo Bonzini { 4663929d1cfaSPaolo Bonzini if (!(cr0 & X86_CR0_PG)) 4664c50d8ae3SPaolo Bonzini nonpaging_init_context(vcpu, context); 4665929d1cfaSPaolo Bonzini else if (efer & EFER_LMA) 4666c50d8ae3SPaolo Bonzini paging64_init_context(vcpu, context); 4667929d1cfaSPaolo Bonzini else if (cr4 & X86_CR4_PAE) 4668c50d8ae3SPaolo Bonzini paging32E_init_context(vcpu, context); 4669c50d8ae3SPaolo Bonzini else 4670c50d8ae3SPaolo Bonzini paging32_init_context(vcpu, context); 4671c50d8ae3SPaolo Bonzini 4672c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4673c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4674c50d8ae3SPaolo Bonzini } 46750f04a2acSVitaly Kuznetsov 4676dbc4739bSSean Christopherson static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4677dbc4739bSSean Christopherson unsigned long cr4, u64 efer) 46780f04a2acSVitaly Kuznetsov { 46798c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 46800f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 46810f04a2acSVitaly Kuznetsov kvm_calc_shadow_mmu_root_page_role(vcpu, false); 46820f04a2acSVitaly Kuznetsov 46830f04a2acSVitaly Kuznetsov if (new_role.as_u64 != context->mmu_role.as_u64) 46848c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 46850f04a2acSVitaly Kuznetsov } 46860f04a2acSVitaly Kuznetsov 468759505b55SSean Christopherson static union kvm_mmu_role 468859505b55SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu) 468959505b55SSean Christopherson { 469059505b55SSean Christopherson union kvm_mmu_role role = 469159505b55SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, false); 469259505b55SSean Christopherson 469359505b55SSean Christopherson role.base.direct = false; 4694d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 469559505b55SSean Christopherson 469659505b55SSean Christopherson return role; 469759505b55SSean Christopherson } 469859505b55SSean Christopherson 4699dbc4739bSSean Christopherson void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4700dbc4739bSSean Christopherson unsigned long cr4, u64 efer, gpa_t nested_cr3) 47010f04a2acSVitaly Kuznetsov { 47028c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 470359505b55SSean Christopherson union kvm_mmu_role new_role = kvm_calc_shadow_npt_root_page_role(vcpu); 47040f04a2acSVitaly Kuznetsov 4705b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base); 4706a506fdd2SVitaly Kuznetsov 4707a3322d5cSSean Christopherson if (new_role.as_u64 != context->mmu_role.as_u64) { 47088c008659SPaolo Bonzini shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); 4709a3322d5cSSean Christopherson 4710a3322d5cSSean Christopherson /* 4711a3322d5cSSean Christopherson * Override the level set by the common init helper, nested TDP 4712a3322d5cSSean Christopherson * always uses the host's TDP configuration. 4713a3322d5cSSean Christopherson */ 4714a3322d5cSSean Christopherson context->shadow_root_level = new_role.base.level; 4715a3322d5cSSean Christopherson } 4716*16be1d12SSean Christopherson 4717*16be1d12SSean Christopherson /* 4718*16be1d12SSean Christopherson * Redo the shadow bits, the reset done by shadow_mmu_init_context() 4719*16be1d12SSean Christopherson * (above) may use the wrong shadow_root_level. 4720*16be1d12SSean Christopherson */ 4721*16be1d12SSean Christopherson reset_shadow_zero_bits_mask(vcpu, context); 47220f04a2acSVitaly Kuznetsov } 47230f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4724c50d8ae3SPaolo Bonzini 4725c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4726c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4727bb1fcc70SSean Christopherson bool execonly, u8 level) 4728c50d8ae3SPaolo Bonzini { 4729c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4730c50d8ae3SPaolo Bonzini 4731c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4732c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4733c50d8ae3SPaolo Bonzini 4734bb1fcc70SSean Christopherson role.base.level = level; 4735c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4736c50d8ae3SPaolo Bonzini role.base.direct = false; 4737c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4738c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4739c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4740c50d8ae3SPaolo Bonzini 4741c50d8ae3SPaolo Bonzini role.ext = kvm_calc_mmu_role_ext(vcpu); 4742c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4743c50d8ae3SPaolo Bonzini 4744c50d8ae3SPaolo Bonzini return role; 4745c50d8ae3SPaolo Bonzini } 4746c50d8ae3SPaolo Bonzini 4747c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4748c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 4749c50d8ae3SPaolo Bonzini { 47508c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4751bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4752c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4753c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4754bb1fcc70SSean Christopherson execonly, level); 4755c50d8ae3SPaolo Bonzini 4756b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base); 4757c50d8ae3SPaolo Bonzini 4758c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4759c50d8ae3SPaolo Bonzini return; 4760c50d8ae3SPaolo Bonzini 4761bb1fcc70SSean Christopherson context->shadow_root_level = level; 4762c50d8ae3SPaolo Bonzini 4763c50d8ae3SPaolo Bonzini context->nx = true; 4764c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4765c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4766c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4767c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4768c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4769bb1fcc70SSean Christopherson context->root_level = level; 4770c50d8ae3SPaolo Bonzini context->direct_map = false; 4771c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 4772c50d8ae3SPaolo Bonzini 4773c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, context, true); 4774c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, context, true); 4775c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, context); 4776c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 4777c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4778c50d8ae3SPaolo Bonzini } 4779c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4780c50d8ae3SPaolo Bonzini 4781c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4782c50d8ae3SPaolo Bonzini { 47838c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4784c50d8ae3SPaolo Bonzini 4785929d1cfaSPaolo Bonzini kvm_init_shadow_mmu(vcpu, 478620f632bdSSean Christopherson kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS), 478720f632bdSSean Christopherson kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS), 4788929d1cfaSPaolo Bonzini vcpu->arch.efer); 4789929d1cfaSPaolo Bonzini 4790d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4791c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4792c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4793c50d8ae3SPaolo Bonzini } 4794c50d8ae3SPaolo Bonzini 4795654430efSSean Christopherson static union kvm_mmu_role kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu) 4796654430efSSean Christopherson { 4797654430efSSean Christopherson union kvm_mmu_role role = kvm_calc_shadow_root_page_role_common(vcpu, false); 4798654430efSSean Christopherson 4799654430efSSean Christopherson /* 4800654430efSSean Christopherson * Nested MMUs are used only for walking L2's gva->gpa, they never have 4801654430efSSean Christopherson * shadow pages of their own and so "direct" has no meaning. Set it 4802654430efSSean Christopherson * to "true" to try to detect bogus usage of the nested MMU. 4803654430efSSean Christopherson */ 4804654430efSSean Christopherson role.base.direct = true; 4805654430efSSean Christopherson 4806654430efSSean Christopherson if (!is_paging(vcpu)) 4807654430efSSean Christopherson role.base.level = 0; 4808654430efSSean Christopherson else if (is_long_mode(vcpu)) 4809654430efSSean Christopherson role.base.level = is_la57_mode(vcpu) ? PT64_ROOT_5LEVEL : 4810654430efSSean Christopherson PT64_ROOT_4LEVEL; 4811654430efSSean Christopherson else if (is_pae(vcpu)) 4812654430efSSean Christopherson role.base.level = PT32E_ROOT_LEVEL; 4813654430efSSean Christopherson else 4814654430efSSean Christopherson role.base.level = PT32_ROOT_LEVEL; 4815654430efSSean Christopherson 4816654430efSSean Christopherson return role; 4817654430efSSean Christopherson } 4818654430efSSean Christopherson 4819c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4820c50d8ae3SPaolo Bonzini { 4821654430efSSean Christopherson union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu); 4822c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4823c50d8ae3SPaolo Bonzini 4824c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4825c50d8ae3SPaolo Bonzini return; 4826c50d8ae3SPaolo Bonzini 4827c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4828d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4829c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4830c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 4831c50d8ae3SPaolo Bonzini 4832c50d8ae3SPaolo Bonzini /* 48335efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 48345efac074SPaolo Bonzini * SPTEs. 48355efac074SPaolo Bonzini */ 48365efac074SPaolo Bonzini g_context->invlpg = NULL; 48375efac074SPaolo Bonzini 48385efac074SPaolo Bonzini /* 4839c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4840c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4841c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4842c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4843c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4844c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4845c50d8ae3SPaolo Bonzini */ 4846c50d8ae3SPaolo Bonzini if (!is_paging(vcpu)) { 4847c50d8ae3SPaolo Bonzini g_context->nx = false; 4848c50d8ae3SPaolo Bonzini g_context->root_level = 0; 4849c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 4850c50d8ae3SPaolo Bonzini } else if (is_long_mode(vcpu)) { 4851c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 4852c50d8ae3SPaolo Bonzini g_context->root_level = is_la57_mode(vcpu) ? 4853c50d8ae3SPaolo Bonzini PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; 4854c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4855c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4856c50d8ae3SPaolo Bonzini } else if (is_pae(vcpu)) { 4857c50d8ae3SPaolo Bonzini g_context->nx = is_nx(vcpu); 4858c50d8ae3SPaolo Bonzini g_context->root_level = PT32E_ROOT_LEVEL; 4859c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4860c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4861c50d8ae3SPaolo Bonzini } else { 4862c50d8ae3SPaolo Bonzini g_context->nx = false; 4863c50d8ae3SPaolo Bonzini g_context->root_level = PT32_ROOT_LEVEL; 4864c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask(vcpu, g_context); 4865c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 4866c50d8ae3SPaolo Bonzini } 4867c50d8ae3SPaolo Bonzini 4868c50d8ae3SPaolo Bonzini update_permission_bitmask(vcpu, g_context, false); 4869c50d8ae3SPaolo Bonzini update_pkru_bitmask(vcpu, g_context, false); 4870c50d8ae3SPaolo Bonzini update_last_nonleaf_level(vcpu, g_context); 4871c50d8ae3SPaolo Bonzini } 4872c50d8ae3SPaolo Bonzini 4873c9060662SSean Christopherson void kvm_init_mmu(struct kvm_vcpu *vcpu) 4874c50d8ae3SPaolo Bonzini { 4875c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4876c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4877c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4878c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4879c50d8ae3SPaolo Bonzini else 4880c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4881c50d8ae3SPaolo Bonzini } 4882c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4883c50d8ae3SPaolo Bonzini 4884c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4885c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4886c50d8ae3SPaolo Bonzini { 4887c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4888c50d8ae3SPaolo Bonzini 4889c50d8ae3SPaolo Bonzini if (tdp_enabled) 4890c50d8ae3SPaolo Bonzini role = kvm_calc_tdp_mmu_root_page_role(vcpu, true); 4891c50d8ae3SPaolo Bonzini else 4892c50d8ae3SPaolo Bonzini role = kvm_calc_shadow_mmu_root_page_role(vcpu, true); 4893c50d8ae3SPaolo Bonzini 4894c50d8ae3SPaolo Bonzini return role.base; 4895c50d8ae3SPaolo Bonzini } 4896c50d8ae3SPaolo Bonzini 489749c6f875SSean Christopherson void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) 489849c6f875SSean Christopherson { 489949c6f875SSean Christopherson /* 490049c6f875SSean Christopherson * Invalidate all MMU roles to force them to reinitialize as CPUID 490149c6f875SSean Christopherson * information is factored into reserved bit calculations. 490249c6f875SSean Christopherson */ 490349c6f875SSean Christopherson vcpu->arch.root_mmu.mmu_role.ext.valid = 0; 490449c6f875SSean Christopherson vcpu->arch.guest_mmu.mmu_role.ext.valid = 0; 490549c6f875SSean Christopherson vcpu->arch.nested_mmu.mmu_role.ext.valid = 0; 490649c6f875SSean Christopherson kvm_mmu_reset_context(vcpu); 490763f5a190SSean Christopherson 490863f5a190SSean Christopherson /* 490963f5a190SSean Christopherson * KVM does not correctly handle changing guest CPUID after KVM_RUN, as 491063f5a190SSean Christopherson * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't 491163f5a190SSean Christopherson * tracked in kvm_mmu_page_role. As a result, KVM may miss guest page 491263f5a190SSean Christopherson * faults due to reusing SPs/SPTEs. Alert userspace, but otherwise 491363f5a190SSean Christopherson * sweep the problem under the rug. 491463f5a190SSean Christopherson * 491563f5a190SSean Christopherson * KVM's horrific CPUID ABI makes the problem all but impossible to 491663f5a190SSean Christopherson * solve, as correctly handling multiple vCPU models (with respect to 491763f5a190SSean Christopherson * paging and physical address properties) in a single VM would require 491863f5a190SSean Christopherson * tracking all relevant CPUID information in kvm_mmu_page_role. That 491963f5a190SSean Christopherson * is very undesirable as it would double the memory requirements for 492063f5a190SSean Christopherson * gfn_track (see struct kvm_mmu_page_role comments), and in practice 492163f5a190SSean Christopherson * no sane VMM mucks with the core vCPU model on the fly. 492263f5a190SSean Christopherson */ 492363f5a190SSean Christopherson if (vcpu->arch.last_vmentry_cpu != -1) { 492463f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} after KVM_RUN may cause guest instability\n"); 492563f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} will fail after KVM_RUN starting with Linux 5.16\n"); 492663f5a190SSean Christopherson } 492749c6f875SSean Christopherson } 492849c6f875SSean Christopherson 4929c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 4930c50d8ae3SPaolo Bonzini { 4931c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 4932c9060662SSean Christopherson kvm_init_mmu(vcpu); 4933c50d8ae3SPaolo Bonzini } 4934c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 4935c50d8ae3SPaolo Bonzini 4936c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 4937c50d8ae3SPaolo Bonzini { 4938c50d8ae3SPaolo Bonzini int r; 4939c50d8ae3SPaolo Bonzini 4940378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 4941c50d8ae3SPaolo Bonzini if (r) 4942c50d8ae3SPaolo Bonzini goto out; 4943748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 4944c50d8ae3SPaolo Bonzini if (r) 4945c50d8ae3SPaolo Bonzini goto out; 49464a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 49476e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 49486e6ec584SSean Christopherson else 49496e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 4950c50d8ae3SPaolo Bonzini if (r) 4951c50d8ae3SPaolo Bonzini goto out; 4952a91f387bSSean Christopherson 4953a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 4954a91f387bSSean Christopherson 4955727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 4956b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 4957c50d8ae3SPaolo Bonzini out: 4958c50d8ae3SPaolo Bonzini return r; 4959c50d8ae3SPaolo Bonzini } 4960c50d8ae3SPaolo Bonzini 4961c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 4962c50d8ae3SPaolo Bonzini { 4963c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 4964c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 4965c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 4966c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 4967c50d8ae3SPaolo Bonzini } 4968c50d8ae3SPaolo Bonzini 4969c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 4970c50d8ae3SPaolo Bonzini { 4971c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 4972c50d8ae3SPaolo Bonzini return false; 4973c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 4974c50d8ae3SPaolo Bonzini return true; 4975c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 4976c50d8ae3SPaolo Bonzini return true; 4977c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 4978c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 4979c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 4980c50d8ae3SPaolo Bonzini } 4981c50d8ae3SPaolo Bonzini 4982c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 4983c50d8ae3SPaolo Bonzini int *bytes) 4984c50d8ae3SPaolo Bonzini { 4985c50d8ae3SPaolo Bonzini u64 gentry = 0; 4986c50d8ae3SPaolo Bonzini int r; 4987c50d8ae3SPaolo Bonzini 4988c50d8ae3SPaolo Bonzini /* 4989c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 4990c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 4991c50d8ae3SPaolo Bonzini * when they have the same mode. 4992c50d8ae3SPaolo Bonzini */ 4993c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 4994c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 4995c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 4996c50d8ae3SPaolo Bonzini *bytes = 8; 4997c50d8ae3SPaolo Bonzini } 4998c50d8ae3SPaolo Bonzini 4999c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5000c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5001c50d8ae3SPaolo Bonzini if (r) 5002c50d8ae3SPaolo Bonzini gentry = 0; 5003c50d8ae3SPaolo Bonzini } 5004c50d8ae3SPaolo Bonzini 5005c50d8ae3SPaolo Bonzini return gentry; 5006c50d8ae3SPaolo Bonzini } 5007c50d8ae3SPaolo Bonzini 5008c50d8ae3SPaolo Bonzini /* 5009c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5010c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5011c50d8ae3SPaolo Bonzini */ 5012c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5013c50d8ae3SPaolo Bonzini { 5014c50d8ae3SPaolo Bonzini /* 5015c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5016c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5017c50d8ae3SPaolo Bonzini */ 50183bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5019c50d8ae3SPaolo Bonzini return false; 5020c50d8ae3SPaolo Bonzini 5021c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5022c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5023c50d8ae3SPaolo Bonzini } 5024c50d8ae3SPaolo Bonzini 5025c50d8ae3SPaolo Bonzini /* 5026c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5027c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5028c50d8ae3SPaolo Bonzini */ 5029c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5030c50d8ae3SPaolo Bonzini int bytes) 5031c50d8ae3SPaolo Bonzini { 5032c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5033c50d8ae3SPaolo Bonzini 5034c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5035c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5036c50d8ae3SPaolo Bonzini 5037c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5038c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 5039c50d8ae3SPaolo Bonzini 5040c50d8ae3SPaolo Bonzini /* 5041c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5042c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5043c50d8ae3SPaolo Bonzini */ 5044c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5045c50d8ae3SPaolo Bonzini return false; 5046c50d8ae3SPaolo Bonzini 5047c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5048c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5049c50d8ae3SPaolo Bonzini 5050c50d8ae3SPaolo Bonzini return misaligned; 5051c50d8ae3SPaolo Bonzini } 5052c50d8ae3SPaolo Bonzini 5053c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5054c50d8ae3SPaolo Bonzini { 5055c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5056c50d8ae3SPaolo Bonzini u64 *spte; 5057c50d8ae3SPaolo Bonzini int level; 5058c50d8ae3SPaolo Bonzini 5059c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5060c50d8ae3SPaolo Bonzini level = sp->role.level; 5061c50d8ae3SPaolo Bonzini *nspte = 1; 5062c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 5063c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5064c50d8ae3SPaolo Bonzini /* 5065c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5066c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5067c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5068c50d8ae3SPaolo Bonzini */ 5069c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5070c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5071c50d8ae3SPaolo Bonzini page_offset <<= 1; 5072c50d8ae3SPaolo Bonzini *nspte = 2; 5073c50d8ae3SPaolo Bonzini } 5074c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5075c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5076c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5077c50d8ae3SPaolo Bonzini return NULL; 5078c50d8ae3SPaolo Bonzini } 5079c50d8ae3SPaolo Bonzini 5080c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5081c50d8ae3SPaolo Bonzini return spte; 5082c50d8ae3SPaolo Bonzini } 5083c50d8ae3SPaolo Bonzini 5084c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5085c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5086c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5087c50d8ae3SPaolo Bonzini { 5088c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5089c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5090c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5091c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5092c50d8ae3SPaolo Bonzini int npte; 5093c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 5094c50d8ae3SPaolo Bonzini 5095c50d8ae3SPaolo Bonzini /* 5096c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5097c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5098c50d8ae3SPaolo Bonzini */ 5099c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5100c50d8ae3SPaolo Bonzini return; 5101c50d8ae3SPaolo Bonzini 5102c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 5103c50d8ae3SPaolo Bonzini 5104c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5105c50d8ae3SPaolo Bonzini 5106c50d8ae3SPaolo Bonzini /* 5107c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5108d9f6e12fSIngo Molnar * or not since pte prefetch is skipped if it does not have 5109c50d8ae3SPaolo Bonzini * enough objects in the cache. 5110c50d8ae3SPaolo Bonzini */ 5111378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5112c50d8ae3SPaolo Bonzini 5113531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5114c50d8ae3SPaolo Bonzini 5115c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5116c50d8ae3SPaolo Bonzini 5117c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5118c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5119c50d8ae3SPaolo Bonzini 5120c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5121c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5122c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5123c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5124c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5125c50d8ae3SPaolo Bonzini continue; 5126c50d8ae3SPaolo Bonzini } 5127c50d8ae3SPaolo Bonzini 5128c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5129c50d8ae3SPaolo Bonzini if (!spte) 5130c50d8ae3SPaolo Bonzini continue; 5131c50d8ae3SPaolo Bonzini 5132c50d8ae3SPaolo Bonzini local_flush = true; 5133c50d8ae3SPaolo Bonzini while (npte--) { 5134c50d8ae3SPaolo Bonzini entry = *spte; 51352de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5136c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5137c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5138c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5139c50d8ae3SPaolo Bonzini remote_flush = true; 5140c50d8ae3SPaolo Bonzini ++spte; 5141c50d8ae3SPaolo Bonzini } 5142c50d8ae3SPaolo Bonzini } 5143c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5144c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5145531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5146c50d8ae3SPaolo Bonzini } 5147c50d8ae3SPaolo Bonzini 5148736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5149c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5150c50d8ae3SPaolo Bonzini { 515192daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5152c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5153c50d8ae3SPaolo Bonzini 51546948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5155ddce6208SSean Christopherson return RET_PF_RETRY; 5156ddce6208SSean Christopherson 5157c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5158c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5159736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5160c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5161c50d8ae3SPaolo Bonzini goto emulate; 5162c50d8ae3SPaolo Bonzini } 5163c50d8ae3SPaolo Bonzini 5164c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 51657a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 51667a02674dSSean Christopherson lower_32_bits(error_code), false); 51677b367bc9SSean Christopherson if (WARN_ON_ONCE(r == RET_PF_INVALID)) 51687b367bc9SSean Christopherson return -EIO; 5169c50d8ae3SPaolo Bonzini } 5170c50d8ae3SPaolo Bonzini 5171c50d8ae3SPaolo Bonzini if (r < 0) 5172c50d8ae3SPaolo Bonzini return r; 517383a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 517483a2ba4cSSean Christopherson return 1; 5175c50d8ae3SPaolo Bonzini 5176c50d8ae3SPaolo Bonzini /* 5177c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5178c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5179c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5180c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5181c50d8ae3SPaolo Bonzini * and resume the guest. 5182c50d8ae3SPaolo Bonzini */ 5183c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5184c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5185736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5186c50d8ae3SPaolo Bonzini return 1; 5187c50d8ae3SPaolo Bonzini } 5188c50d8ae3SPaolo Bonzini 5189c50d8ae3SPaolo Bonzini /* 5190c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5191c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5192c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5193c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5194c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5195c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5196c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5197c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5198c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5199c50d8ae3SPaolo Bonzini */ 5200736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 520192daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5202c50d8ae3SPaolo Bonzini emulate: 5203736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5204c50d8ae3SPaolo Bonzini insn_len); 5205c50d8ae3SPaolo Bonzini } 5206c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5207c50d8ae3SPaolo Bonzini 52085efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 52095efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5210c50d8ae3SPaolo Bonzini { 5211c50d8ae3SPaolo Bonzini int i; 5212c50d8ae3SPaolo Bonzini 52135efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 52145efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 52155efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5216c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5217c50d8ae3SPaolo Bonzini return; 5218c50d8ae3SPaolo Bonzini 5219b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 52205efac074SPaolo Bonzini } 52215efac074SPaolo Bonzini 52225efac074SPaolo Bonzini if (!mmu->invlpg) 52235efac074SPaolo Bonzini return; 52245efac074SPaolo Bonzini 52255efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5226c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5227c50d8ae3SPaolo Bonzini 5228c50d8ae3SPaolo Bonzini /* 5229c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5230c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5231c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5232c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5233c50d8ae3SPaolo Bonzini * just always sync it. 5234c50d8ae3SPaolo Bonzini * 5235c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5236c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5237c50d8ae3SPaolo Bonzini * for them. 5238c50d8ae3SPaolo Bonzini */ 5239c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5240c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5241c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 52425efac074SPaolo Bonzini } else { 52435efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 52445efac074SPaolo Bonzini } 52455efac074SPaolo Bonzini } 5246c50d8ae3SPaolo Bonzini 52475efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 52485efac074SPaolo Bonzini { 52495efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5250c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5251c50d8ae3SPaolo Bonzini } 5252c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5253c50d8ae3SPaolo Bonzini 52545efac074SPaolo Bonzini 5255c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5256c50d8ae3SPaolo Bonzini { 5257c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5258c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5259c50d8ae3SPaolo Bonzini uint i; 5260c50d8ae3SPaolo Bonzini 5261c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5262c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5263c50d8ae3SPaolo Bonzini tlb_flush = true; 5264c50d8ae3SPaolo Bonzini } 5265c50d8ae3SPaolo Bonzini 5266c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5267c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5268be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5269c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5270c50d8ae3SPaolo Bonzini tlb_flush = true; 5271c50d8ae3SPaolo Bonzini } 5272c50d8ae3SPaolo Bonzini } 5273c50d8ae3SPaolo Bonzini 5274c50d8ae3SPaolo Bonzini if (tlb_flush) 5275b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5276c50d8ae3SPaolo Bonzini 5277c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5278c50d8ae3SPaolo Bonzini 5279c50d8ae3SPaolo Bonzini /* 5280c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5281c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5282c50d8ae3SPaolo Bonzini * for them. 5283c50d8ae3SPaolo Bonzini */ 5284c50d8ae3SPaolo Bonzini } 5285c50d8ae3SPaolo Bonzini 528683013059SSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 528783013059SSean Christopherson int tdp_huge_page_level) 5288c50d8ae3SPaolo Bonzini { 5289bde77235SSean Christopherson tdp_enabled = enable_tdp; 529083013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5291703c335dSSean Christopherson 5292703c335dSSean Christopherson /* 52931d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5294703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5295703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5296703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5297703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5298703c335dSSean Christopherson */ 5299703c335dSSean Christopherson if (tdp_enabled) 53001d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5301703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 53021d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5303703c335dSSean Christopherson else 53041d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5305c50d8ae3SPaolo Bonzini } 5306bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5307c50d8ae3SPaolo Bonzini 5308c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 53090a234f5dSSean Christopherson typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head, 53100a234f5dSSean Christopherson struct kvm_memory_slot *slot); 5311c50d8ae3SPaolo Bonzini 5312c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5313c50d8ae3SPaolo Bonzini static __always_inline bool 5314c50d8ae3SPaolo Bonzini slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot, 5315c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 53161a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 53171a61b7dbSSean Christopherson bool flush) 5318c50d8ae3SPaolo Bonzini { 5319c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5320c50d8ae3SPaolo Bonzini 5321c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5322c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5323c50d8ae3SPaolo Bonzini if (iterator.rmap) 53240a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5325c50d8ae3SPaolo Bonzini 5326531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5327302695a5SSean Christopherson if (flush && flush_on_yield) { 5328c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5329c50d8ae3SPaolo Bonzini start_gfn, 5330c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5331c50d8ae3SPaolo Bonzini flush = false; 5332c50d8ae3SPaolo Bonzini } 5333531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5334c50d8ae3SPaolo Bonzini } 5335c50d8ae3SPaolo Bonzini } 5336c50d8ae3SPaolo Bonzini 5337c50d8ae3SPaolo Bonzini return flush; 5338c50d8ae3SPaolo Bonzini } 5339c50d8ae3SPaolo Bonzini 5340c50d8ae3SPaolo Bonzini static __always_inline bool 5341c50d8ae3SPaolo Bonzini slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot, 5342c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5343302695a5SSean Christopherson bool flush_on_yield) 5344c50d8ae3SPaolo Bonzini { 5345c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5346c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5347c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 53481a61b7dbSSean Christopherson flush_on_yield, false); 5349c50d8ae3SPaolo Bonzini } 5350c50d8ae3SPaolo Bonzini 5351c50d8ae3SPaolo Bonzini static __always_inline bool 5352c50d8ae3SPaolo Bonzini slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, 5353302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5354c50d8ae3SPaolo Bonzini { 53553bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5356302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5357c50d8ae3SPaolo Bonzini } 5358c50d8ae3SPaolo Bonzini 5359c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5360c50d8ae3SPaolo Bonzini { 53614a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 53624a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5363c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 536403ca4589SSean Christopherson free_page((unsigned long)mmu->pml4_root); 5365c50d8ae3SPaolo Bonzini } 5366c50d8ae3SPaolo Bonzini 536704d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5368c50d8ae3SPaolo Bonzini { 5369c50d8ae3SPaolo Bonzini struct page *page; 5370c50d8ae3SPaolo Bonzini int i; 5371c50d8ae3SPaolo Bonzini 537204d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 537304d28e37SSean Christopherson mmu->root_pgd = 0; 537404d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 537504d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 537604d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 537704d28e37SSean Christopherson 5378c50d8ae3SPaolo Bonzini /* 5379c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5380c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5381c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5382c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 538304d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 538404d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 538504d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 538604d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 538704d45551SSean Christopherson * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots(). 5388c50d8ae3SPaolo Bonzini */ 5389d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5390c50d8ae3SPaolo Bonzini return 0; 5391c50d8ae3SPaolo Bonzini 5392c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5393c50d8ae3SPaolo Bonzini if (!page) 5394c50d8ae3SPaolo Bonzini return -ENOMEM; 5395c50d8ae3SPaolo Bonzini 5396c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 53974a98623dSSean Christopherson 53984a98623dSSean Christopherson /* 53994a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 54004a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 54014a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 54024a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 54034a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 54044a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 54054a98623dSSean Christopherson */ 54064a98623dSSean Christopherson if (!tdp_enabled) 54074a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 54084a98623dSSean Christopherson else 54094a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 54104a98623dSSean Christopherson 5411c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5412c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5413c50d8ae3SPaolo Bonzini 5414c50d8ae3SPaolo Bonzini return 0; 5415c50d8ae3SPaolo Bonzini } 5416c50d8ae3SPaolo Bonzini 5417c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5418c50d8ae3SPaolo Bonzini { 5419c50d8ae3SPaolo Bonzini int ret; 5420c50d8ae3SPaolo Bonzini 54215962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 54225f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 54235f6078f9SSean Christopherson 54245962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 54255f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 54265962bfb7SSean Christopherson 542796880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 542896880883SSean Christopherson 5429c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5430c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5431c50d8ae3SPaolo Bonzini 5432c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5433c50d8ae3SPaolo Bonzini 543404d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5435c50d8ae3SPaolo Bonzini if (ret) 5436c50d8ae3SPaolo Bonzini return ret; 5437c50d8ae3SPaolo Bonzini 543804d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5439c50d8ae3SPaolo Bonzini if (ret) 5440c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5441c50d8ae3SPaolo Bonzini 5442c50d8ae3SPaolo Bonzini return ret; 5443c50d8ae3SPaolo Bonzini fail_allocate_root: 5444c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5445c50d8ae3SPaolo Bonzini return ret; 5446c50d8ae3SPaolo Bonzini } 5447c50d8ae3SPaolo Bonzini 5448c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5449c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5450c50d8ae3SPaolo Bonzini { 5451c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5452c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5453c50d8ae3SPaolo Bonzini 5454c50d8ae3SPaolo Bonzini restart: 5455c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5456c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5457c50d8ae3SPaolo Bonzini /* 5458c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5459c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5460c50d8ae3SPaolo Bonzini */ 5461c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5462c50d8ae3SPaolo Bonzini break; 5463c50d8ae3SPaolo Bonzini 5464c50d8ae3SPaolo Bonzini /* 5465f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5466f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5467f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5468c50d8ae3SPaolo Bonzini */ 5469f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5470c50d8ae3SPaolo Bonzini continue; 5471c50d8ae3SPaolo Bonzini 5472c50d8ae3SPaolo Bonzini /* 5473c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5474c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5475c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5476c50d8ae3SPaolo Bonzini * be in active use by the guest. 5477c50d8ae3SPaolo Bonzini */ 5478c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5479531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5480c50d8ae3SPaolo Bonzini batch = 0; 5481c50d8ae3SPaolo Bonzini goto restart; 5482c50d8ae3SPaolo Bonzini } 5483c50d8ae3SPaolo Bonzini 5484c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5485c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5486c50d8ae3SPaolo Bonzini batch += nr_zapped; 5487c50d8ae3SPaolo Bonzini goto restart; 5488c50d8ae3SPaolo Bonzini } 5489c50d8ae3SPaolo Bonzini } 5490c50d8ae3SPaolo Bonzini 5491c50d8ae3SPaolo Bonzini /* 5492c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5493c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5494c50d8ae3SPaolo Bonzini * may reference the pages. 5495c50d8ae3SPaolo Bonzini */ 5496c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5497c50d8ae3SPaolo Bonzini } 5498c50d8ae3SPaolo Bonzini 5499c50d8ae3SPaolo Bonzini /* 5500c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5501c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5502c50d8ae3SPaolo Bonzini * 5503c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5504c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5505c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5506c50d8ae3SPaolo Bonzini * after calling the function. 5507c50d8ae3SPaolo Bonzini */ 5508c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5509c50d8ae3SPaolo Bonzini { 5510c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5511c50d8ae3SPaolo Bonzini 5512531810caSBen Gardon write_lock(&kvm->mmu_lock); 5513c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5514c50d8ae3SPaolo Bonzini 5515c50d8ae3SPaolo Bonzini /* 5516c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5517c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5518c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5519c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5520c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5521c50d8ae3SPaolo Bonzini */ 5522c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5523c50d8ae3SPaolo Bonzini 5524b7cccd39SBen Gardon /* In order to ensure all threads see this change when 5525b7cccd39SBen Gardon * handling the MMU reload signal, this must happen in the 5526b7cccd39SBen Gardon * same critical section as kvm_reload_remote_mmus, and 5527b7cccd39SBen Gardon * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages 5528b7cccd39SBen Gardon * could drop the MMU lock and yield. 5529b7cccd39SBen Gardon */ 5530b7cccd39SBen Gardon if (is_tdp_mmu_enabled(kvm)) 5531b7cccd39SBen Gardon kvm_tdp_mmu_invalidate_all_roots(kvm); 5532b7cccd39SBen Gardon 5533c50d8ae3SPaolo Bonzini /* 5534c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5535c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5536c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5537c50d8ae3SPaolo Bonzini * 5538c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5539c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5540c50d8ae3SPaolo Bonzini */ 5541c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5542c50d8ae3SPaolo Bonzini 5543c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5544faaf05b0SBen Gardon 5545531810caSBen Gardon write_unlock(&kvm->mmu_lock); 55464c6654bdSBen Gardon 55474c6654bdSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 55484c6654bdSBen Gardon read_lock(&kvm->mmu_lock); 55494c6654bdSBen Gardon kvm_tdp_mmu_zap_invalidated_roots(kvm); 55504c6654bdSBen Gardon read_unlock(&kvm->mmu_lock); 55514c6654bdSBen Gardon } 5552c50d8ae3SPaolo Bonzini } 5553c50d8ae3SPaolo Bonzini 5554c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5555c50d8ae3SPaolo Bonzini { 5556c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5557c50d8ae3SPaolo Bonzini } 5558c50d8ae3SPaolo Bonzini 5559c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5560c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5561c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5562c50d8ae3SPaolo Bonzini { 5563c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5564c50d8ae3SPaolo Bonzini } 5565c50d8ae3SPaolo Bonzini 5566c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5567c50d8ae3SPaolo Bonzini { 5568c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5569c50d8ae3SPaolo Bonzini 5570d501f747SBen Gardon if (!kvm_mmu_init_tdp_mmu(kvm)) 5571d501f747SBen Gardon /* 5572d501f747SBen Gardon * No smp_load/store wrappers needed here as we are in 5573d501f747SBen Gardon * VM init and there cannot be any memslots / other threads 5574d501f747SBen Gardon * accessing this struct kvm yet. 5575d501f747SBen Gardon */ 5576a2557408SBen Gardon kvm->arch.memslots_have_rmaps = true; 5577a2557408SBen Gardon 5578c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5579c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5580c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5581c50d8ae3SPaolo Bonzini } 5582c50d8ae3SPaolo Bonzini 5583c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5584c50d8ae3SPaolo Bonzini { 5585c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5586c50d8ae3SPaolo Bonzini 5587c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5588fe5db27dSBen Gardon 5589fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5590c50d8ae3SPaolo Bonzini } 5591c50d8ae3SPaolo Bonzini 5592c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5593c50d8ae3SPaolo Bonzini { 5594c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5595c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5596c50d8ae3SPaolo Bonzini int i; 55971a61b7dbSSean Christopherson bool flush = false; 5598c50d8ae3SPaolo Bonzini 5599e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5600531810caSBen Gardon write_lock(&kvm->mmu_lock); 5601c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5602c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5603c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5604c50d8ae3SPaolo Bonzini gfn_t start, end; 5605c50d8ae3SPaolo Bonzini 5606c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5607c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5608c50d8ae3SPaolo Bonzini if (start >= end) 5609c50d8ae3SPaolo Bonzini continue; 5610c50d8ae3SPaolo Bonzini 5611e2209710SBen Gardon flush = slot_handle_level_range(kvm, memslot, 5612e2209710SBen Gardon kvm_zap_rmapp, PG_LEVEL_4K, 5613e2209710SBen Gardon KVM_MAX_HUGEPAGE_LEVEL, start, 5614e2209710SBen Gardon end - 1, true, flush); 5615c50d8ae3SPaolo Bonzini } 5616c50d8ae3SPaolo Bonzini } 5617faaf05b0SBen Gardon if (flush) 56181a61b7dbSSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, gfn_end); 5619531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5620e2209710SBen Gardon } 56216103bc07SBen Gardon 56226103bc07SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 56236103bc07SBen Gardon flush = false; 56246103bc07SBen Gardon 56256103bc07SBen Gardon read_lock(&kvm->mmu_lock); 56266103bc07SBen Gardon for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 56276103bc07SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 56286103bc07SBen Gardon gfn_end, flush, true); 56296103bc07SBen Gardon if (flush) 56306103bc07SBen Gardon kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 56316103bc07SBen Gardon gfn_end); 56326103bc07SBen Gardon 56336103bc07SBen Gardon read_unlock(&kvm->mmu_lock); 56346103bc07SBen Gardon } 5635c50d8ae3SPaolo Bonzini } 5636c50d8ae3SPaolo Bonzini 5637c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 56380a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 56390a234f5dSSean Christopherson struct kvm_memory_slot *slot) 5640c50d8ae3SPaolo Bonzini { 5641c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5642c50d8ae3SPaolo Bonzini } 5643c50d8ae3SPaolo Bonzini 5644c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 56453c9bd400SJay Zhou struct kvm_memory_slot *memslot, 56463c9bd400SJay Zhou int start_level) 5647c50d8ae3SPaolo Bonzini { 5648e2209710SBen Gardon bool flush = false; 5649c50d8ae3SPaolo Bonzini 5650e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5651531810caSBen Gardon write_lock(&kvm->mmu_lock); 56523c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5653e2209710SBen Gardon start_level, KVM_MAX_HUGEPAGE_LEVEL, 5654e2209710SBen Gardon false); 5655531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5656e2209710SBen Gardon } 5657c50d8ae3SPaolo Bonzini 565824ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 565924ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 566024ae4cfaSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 566124ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 566224ae4cfaSBen Gardon } 566324ae4cfaSBen Gardon 5664c50d8ae3SPaolo Bonzini /* 5665c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5666c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5667c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5668c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5669c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5670c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 56715fc3424fSSean Christopherson * have checked Host-writable | MMU-writable instead of 56725fc3424fSSean Christopherson * PT_WRITABLE_MASK, that means it does not depend on PT_WRITABLE_MASK 56735fc3424fSSean Christopherson * anymore. 5674c50d8ae3SPaolo Bonzini */ 5675c50d8ae3SPaolo Bonzini if (flush) 56767f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5677c50d8ae3SPaolo Bonzini } 5678c50d8ae3SPaolo Bonzini 5679c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 56800a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 56810a234f5dSSean Christopherson struct kvm_memory_slot *slot) 5682c50d8ae3SPaolo Bonzini { 5683c50d8ae3SPaolo Bonzini u64 *sptep; 5684c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5685c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5686c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5687c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5688c50d8ae3SPaolo Bonzini 5689c50d8ae3SPaolo Bonzini restart: 5690c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 569157354682SSean Christopherson sp = sptep_to_sp(sptep); 5692c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5693c50d8ae3SPaolo Bonzini 5694c50d8ae3SPaolo Bonzini /* 5695c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5696c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5697c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5698c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5699c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5700c50d8ae3SPaolo Bonzini */ 5701c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 57029eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 57039eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 5704c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 5705c50d8ae3SPaolo Bonzini 5706c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5707c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5708c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5709c50d8ae3SPaolo Bonzini else 5710c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5711c50d8ae3SPaolo Bonzini 5712c50d8ae3SPaolo Bonzini goto restart; 5713c50d8ae3SPaolo Bonzini } 5714c50d8ae3SPaolo Bonzini } 5715c50d8ae3SPaolo Bonzini 5716c50d8ae3SPaolo Bonzini return need_tlb_flush; 5717c50d8ae3SPaolo Bonzini } 5718c50d8ae3SPaolo Bonzini 5719c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5720c50d8ae3SPaolo Bonzini const struct kvm_memory_slot *memslot) 5721c50d8ae3SPaolo Bonzini { 5722c50d8ae3SPaolo Bonzini /* FIXME: const-ify all uses of struct kvm_memory_slot. */ 57239eba50f8SSean Christopherson struct kvm_memory_slot *slot = (struct kvm_memory_slot *)memslot; 572431c65657SColin Ian King bool flush = false; 57259eba50f8SSean Christopherson 5726e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5727531810caSBen Gardon write_lock(&kvm->mmu_lock); 5728302695a5SSean Christopherson flush = slot_handle_leaf(kvm, slot, kvm_mmu_zap_collapsible_spte, true); 5729302695a5SSean Christopherson if (flush) 5730302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 5731531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5732e2209710SBen Gardon } 57332db6f772SBen Gardon 57342db6f772SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57352db6f772SBen Gardon read_lock(&kvm->mmu_lock); 57362db6f772SBen Gardon flush = kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot, flush); 57372db6f772SBen Gardon if (flush) 57382db6f772SBen Gardon kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 57392db6f772SBen Gardon read_unlock(&kvm->mmu_lock); 57402db6f772SBen Gardon } 5741c50d8ae3SPaolo Bonzini } 5742c50d8ae3SPaolo Bonzini 5743b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 57446c9dd6d2SPaolo Bonzini const struct kvm_memory_slot *memslot) 5745b3594ffbSSean Christopherson { 5746b3594ffbSSean Christopherson /* 57477f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5748302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 57497f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 57507f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 57517f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5752b3594ffbSSean Christopherson */ 5753b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5754cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5755cec37648SSean Christopherson memslot->npages); 5756b3594ffbSSean Christopherson } 5757b3594ffbSSean Christopherson 5758c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5759c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot) 5760c50d8ae3SPaolo Bonzini { 5761e2209710SBen Gardon bool flush = false; 5762c50d8ae3SPaolo Bonzini 5763e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5764531810caSBen Gardon write_lock(&kvm->mmu_lock); 5765e2209710SBen Gardon flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, 5766e2209710SBen Gardon false); 5767531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5768e2209710SBen Gardon } 5769c50d8ae3SPaolo Bonzini 577024ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 577124ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 577224ae4cfaSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 577324ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 577424ae4cfaSBen Gardon } 577524ae4cfaSBen Gardon 5776c50d8ae3SPaolo Bonzini /* 5777c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5778c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5779c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5780c50d8ae3SPaolo Bonzini * dirty_bitmap. 5781c50d8ae3SPaolo Bonzini */ 5782c50d8ae3SPaolo Bonzini if (flush) 57837f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5784c50d8ae3SPaolo Bonzini } 5785c50d8ae3SPaolo Bonzini 5786c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5787c50d8ae3SPaolo Bonzini { 5788c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5789c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5790c50d8ae3SPaolo Bonzini int ign; 5791c50d8ae3SPaolo Bonzini 5792531810caSBen Gardon write_lock(&kvm->mmu_lock); 5793c50d8ae3SPaolo Bonzini restart: 5794c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5795f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5796c50d8ae3SPaolo Bonzini continue; 5797c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5798c50d8ae3SPaolo Bonzini goto restart; 5799531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5800c50d8ae3SPaolo Bonzini goto restart; 5801c50d8ae3SPaolo Bonzini } 5802c50d8ae3SPaolo Bonzini 5803c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5804faaf05b0SBen Gardon 5805897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5806faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5807faaf05b0SBen Gardon 5808531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5809c50d8ae3SPaolo Bonzini } 5810c50d8ae3SPaolo Bonzini 5811c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5812c50d8ae3SPaolo Bonzini { 5813c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5814c50d8ae3SPaolo Bonzini 5815c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5816c50d8ae3SPaolo Bonzini 5817c50d8ae3SPaolo Bonzini /* 5818c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5819c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5820c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5821c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5822c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5823c50d8ae3SPaolo Bonzini */ 5824c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5825c50d8ae3SPaolo Bonzini 5826c50d8ae3SPaolo Bonzini /* 5827c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5828c50d8ae3SPaolo Bonzini * zap all shadow pages. 5829c50d8ae3SPaolo Bonzini */ 5830c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 5831c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 5832c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5833c50d8ae3SPaolo Bonzini } 5834c50d8ae3SPaolo Bonzini } 5835c50d8ae3SPaolo Bonzini 5836c50d8ae3SPaolo Bonzini static unsigned long 5837c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 5838c50d8ae3SPaolo Bonzini { 5839c50d8ae3SPaolo Bonzini struct kvm *kvm; 5840c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 5841c50d8ae3SPaolo Bonzini unsigned long freed = 0; 5842c50d8ae3SPaolo Bonzini 5843c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5844c50d8ae3SPaolo Bonzini 5845c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5846c50d8ae3SPaolo Bonzini int idx; 5847c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5848c50d8ae3SPaolo Bonzini 5849c50d8ae3SPaolo Bonzini /* 5850c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 5851c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 5852c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 5853c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 5854c50d8ae3SPaolo Bonzini */ 5855c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 5856c50d8ae3SPaolo Bonzini break; 5857c50d8ae3SPaolo Bonzini /* 5858c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 5859c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 5860c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 5861c50d8ae3SPaolo Bonzini * anyway. 5862c50d8ae3SPaolo Bonzini */ 5863c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 5864c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 5865c50d8ae3SPaolo Bonzini continue; 5866c50d8ae3SPaolo Bonzini 5867c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 5868531810caSBen Gardon write_lock(&kvm->mmu_lock); 5869c50d8ae3SPaolo Bonzini 5870c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 5871c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 5872c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 5873c50d8ae3SPaolo Bonzini goto unlock; 5874c50d8ae3SPaolo Bonzini } 5875c50d8ae3SPaolo Bonzini 5876ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 5877c50d8ae3SPaolo Bonzini 5878c50d8ae3SPaolo Bonzini unlock: 5879531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5880c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 5881c50d8ae3SPaolo Bonzini 5882c50d8ae3SPaolo Bonzini /* 5883c50d8ae3SPaolo Bonzini * unfair on small ones 5884c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 5885c50d8ae3SPaolo Bonzini * sadness comes quickly 5886c50d8ae3SPaolo Bonzini */ 5887c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 5888c50d8ae3SPaolo Bonzini break; 5889c50d8ae3SPaolo Bonzini } 5890c50d8ae3SPaolo Bonzini 5891c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5892c50d8ae3SPaolo Bonzini return freed; 5893c50d8ae3SPaolo Bonzini } 5894c50d8ae3SPaolo Bonzini 5895c50d8ae3SPaolo Bonzini static unsigned long 5896c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 5897c50d8ae3SPaolo Bonzini { 5898c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 5899c50d8ae3SPaolo Bonzini } 5900c50d8ae3SPaolo Bonzini 5901c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 5902c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 5903c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 5904c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 5905c50d8ae3SPaolo Bonzini }; 5906c50d8ae3SPaolo Bonzini 5907c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 5908c50d8ae3SPaolo Bonzini { 5909c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 5910c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 5911c50d8ae3SPaolo Bonzini } 5912c50d8ae3SPaolo Bonzini 5913c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 5914c50d8ae3SPaolo Bonzini { 5915c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 5916c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 5917c50d8ae3SPaolo Bonzini } 5918c50d8ae3SPaolo Bonzini 5919c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 5920c50d8ae3SPaolo Bonzini { 5921c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 5922c50d8ae3SPaolo Bonzini } 5923c50d8ae3SPaolo Bonzini 5924c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 5925c50d8ae3SPaolo Bonzini { 5926c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 5927c50d8ae3SPaolo Bonzini bool new_val; 5928c50d8ae3SPaolo Bonzini 5929c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 5930c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 5931c50d8ae3SPaolo Bonzini new_val = 0; 5932c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 5933c50d8ae3SPaolo Bonzini new_val = 1; 5934c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 5935c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 5936c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 5937c50d8ae3SPaolo Bonzini return -EINVAL; 5938c50d8ae3SPaolo Bonzini 5939c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 5940c50d8ae3SPaolo Bonzini 5941c50d8ae3SPaolo Bonzini if (new_val != old_val) { 5942c50d8ae3SPaolo Bonzini struct kvm *kvm; 5943c50d8ae3SPaolo Bonzini 5944c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5945c50d8ae3SPaolo Bonzini 5946c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5947c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 5948c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5949c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 5950c50d8ae3SPaolo Bonzini 5951c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5952c50d8ae3SPaolo Bonzini } 5953c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5954c50d8ae3SPaolo Bonzini } 5955c50d8ae3SPaolo Bonzini 5956c50d8ae3SPaolo Bonzini return 0; 5957c50d8ae3SPaolo Bonzini } 5958c50d8ae3SPaolo Bonzini 5959c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 5960c50d8ae3SPaolo Bonzini { 5961c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 5962c50d8ae3SPaolo Bonzini 5963c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 5964c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 5965c50d8ae3SPaolo Bonzini 5966c50d8ae3SPaolo Bonzini /* 5967c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 5968c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 5969c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 5970c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 5971c50d8ae3SPaolo Bonzini */ 5972c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 5973c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 5974c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 5975c50d8ae3SPaolo Bonzini 5976c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 5977c50d8ae3SPaolo Bonzini 5978c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 5979c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 5980c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5981c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 5982c50d8ae3SPaolo Bonzini goto out; 5983c50d8ae3SPaolo Bonzini 5984c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 5985c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 5986c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5987c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 5988c50d8ae3SPaolo Bonzini goto out; 5989c50d8ae3SPaolo Bonzini 5990c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 5991c50d8ae3SPaolo Bonzini goto out; 5992c50d8ae3SPaolo Bonzini 5993c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 5994c50d8ae3SPaolo Bonzini if (ret) 5995c50d8ae3SPaolo Bonzini goto out; 5996c50d8ae3SPaolo Bonzini 5997c50d8ae3SPaolo Bonzini return 0; 5998c50d8ae3SPaolo Bonzini 5999c50d8ae3SPaolo Bonzini out: 6000c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6001c50d8ae3SPaolo Bonzini return ret; 6002c50d8ae3SPaolo Bonzini } 6003c50d8ae3SPaolo Bonzini 6004c50d8ae3SPaolo Bonzini /* 6005c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 6006c50d8ae3SPaolo Bonzini */ 6007c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 6008c50d8ae3SPaolo Bonzini { 6009c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 6010c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 6011c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 6012c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 6013c50d8ae3SPaolo Bonzini int i; 6014c50d8ae3SPaolo Bonzini 6015c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 6016c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 6017c50d8ae3SPaolo Bonzini 6018c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 6019c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 6020c50d8ae3SPaolo Bonzini } 6021c50d8ae3SPaolo Bonzini 6022c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 6023c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 6024c50d8ae3SPaolo Bonzini 6025c50d8ae3SPaolo Bonzini return nr_mmu_pages; 6026c50d8ae3SPaolo Bonzini } 6027c50d8ae3SPaolo Bonzini 6028c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6029c50d8ae3SPaolo Bonzini { 6030c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6031c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6032c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6033c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6034c50d8ae3SPaolo Bonzini } 6035c50d8ae3SPaolo Bonzini 6036c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6037c50d8ae3SPaolo Bonzini { 6038c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6039c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6040c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6041c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6042c50d8ae3SPaolo Bonzini } 6043c50d8ae3SPaolo Bonzini 6044c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 6045c50d8ae3SPaolo Bonzini { 6046c50d8ae3SPaolo Bonzini unsigned int old_val; 6047c50d8ae3SPaolo Bonzini int err; 6048c50d8ae3SPaolo Bonzini 6049c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 6050c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6051c50d8ae3SPaolo Bonzini if (err) 6052c50d8ae3SPaolo Bonzini return err; 6053c50d8ae3SPaolo Bonzini 6054c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 6055c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 6056c50d8ae3SPaolo Bonzini struct kvm *kvm; 6057c50d8ae3SPaolo Bonzini 6058c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6059c50d8ae3SPaolo Bonzini 6060c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6061c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6062c50d8ae3SPaolo Bonzini 6063c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6064c50d8ae3SPaolo Bonzini } 6065c50d8ae3SPaolo Bonzini 6066c50d8ae3SPaolo Bonzini return err; 6067c50d8ae3SPaolo Bonzini } 6068c50d8ae3SPaolo Bonzini 6069c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6070c50d8ae3SPaolo Bonzini { 6071ade74e14SSean Christopherson unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; 6072c50d8ae3SPaolo Bonzini int rcu_idx; 6073c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6074c50d8ae3SPaolo Bonzini unsigned int ratio; 6075c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6076048f4980SSean Christopherson bool flush = false; 6077c50d8ae3SPaolo Bonzini ulong to_zap; 6078c50d8ae3SPaolo Bonzini 6079c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6080531810caSBen Gardon write_lock(&kvm->mmu_lock); 6081c50d8ae3SPaolo Bonzini 6082c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6083ade74e14SSean Christopherson to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0; 60847d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 60857d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 60867d919c7aSSean Christopherson break; 60877d919c7aSSean Christopherson 6088c50d8ae3SPaolo Bonzini /* 6089c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6090c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6091c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6092c50d8ae3SPaolo Bonzini */ 6093c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6094c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6095c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6096c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6097897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 6098315f02c6SPaolo Bonzini flush |= kvm_tdp_mmu_zap_sp(kvm, sp); 60998d1a182eSBen Gardon } else { 6100c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6101c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 610229cf0f50SBen Gardon } 6103c50d8ae3SPaolo Bonzini 6104531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 6105048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6106531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 6107048f4980SSean Christopherson flush = false; 6108c50d8ae3SPaolo Bonzini } 6109c50d8ae3SPaolo Bonzini } 6110048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6111c50d8ae3SPaolo Bonzini 6112531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6113c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6114c50d8ae3SPaolo Bonzini } 6115c50d8ae3SPaolo Bonzini 6116c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6117c50d8ae3SPaolo Bonzini { 6118c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6119c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6120c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6121c50d8ae3SPaolo Bonzini } 6122c50d8ae3SPaolo Bonzini 6123c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6124c50d8ae3SPaolo Bonzini { 6125c50d8ae3SPaolo Bonzini u64 start_time; 6126c50d8ae3SPaolo Bonzini long remaining_time; 6127c50d8ae3SPaolo Bonzini 6128c50d8ae3SPaolo Bonzini while (true) { 6129c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6130c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6131c50d8ae3SPaolo Bonzini 6132c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6133c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6134c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6135c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6136c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6137c50d8ae3SPaolo Bonzini } 6138c50d8ae3SPaolo Bonzini 6139c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6140c50d8ae3SPaolo Bonzini 6141c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6142c50d8ae3SPaolo Bonzini return 0; 6143c50d8ae3SPaolo Bonzini 6144c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6145c50d8ae3SPaolo Bonzini } 6146c50d8ae3SPaolo Bonzini } 6147c50d8ae3SPaolo Bonzini 6148c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6149c50d8ae3SPaolo Bonzini { 6150c50d8ae3SPaolo Bonzini int err; 6151c50d8ae3SPaolo Bonzini 6152c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6153c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6154c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6155c50d8ae3SPaolo Bonzini if (!err) 6156c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6157c50d8ae3SPaolo Bonzini 6158c50d8ae3SPaolo Bonzini return err; 6159c50d8ae3SPaolo Bonzini } 6160c50d8ae3SPaolo Bonzini 6161c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6162c50d8ae3SPaolo Bonzini { 6163c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6164c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6165c50d8ae3SPaolo Bonzini } 6166