1c50d8ae3SPaolo Bonzini // SPDX-License-Identifier: GPL-2.0-only 2c50d8ae3SPaolo Bonzini /* 3c50d8ae3SPaolo Bonzini * Kernel-based Virtual Machine driver for Linux 4c50d8ae3SPaolo Bonzini * 5c50d8ae3SPaolo Bonzini * This module enables machines with Intel VT-x extensions to run virtual 6c50d8ae3SPaolo Bonzini * machines without emulation or binary translation. 7c50d8ae3SPaolo Bonzini * 8c50d8ae3SPaolo Bonzini * MMU support 9c50d8ae3SPaolo Bonzini * 10c50d8ae3SPaolo Bonzini * Copyright (C) 2006 Qumranet, Inc. 11c50d8ae3SPaolo Bonzini * Copyright 2010 Red Hat, Inc. and/or its affiliates. 12c50d8ae3SPaolo Bonzini * 13c50d8ae3SPaolo Bonzini * Authors: 14c50d8ae3SPaolo Bonzini * Yaniv Kamay <yaniv@qumranet.com> 15c50d8ae3SPaolo Bonzini * Avi Kivity <avi@qumranet.com> 16c50d8ae3SPaolo Bonzini */ 17c50d8ae3SPaolo Bonzini 18c50d8ae3SPaolo Bonzini #include "irq.h" 1988197e6aS彭浩(Richard) #include "ioapic.h" 20c50d8ae3SPaolo Bonzini #include "mmu.h" 216ca9a6f3SSean Christopherson #include "mmu_internal.h" 22fe5db27dSBen Gardon #include "tdp_mmu.h" 23c50d8ae3SPaolo Bonzini #include "x86.h" 24c50d8ae3SPaolo Bonzini #include "kvm_cache_regs.h" 252f728d66SSean Christopherson #include "kvm_emulate.h" 26c50d8ae3SPaolo Bonzini #include "cpuid.h" 275a9624afSPaolo Bonzini #include "spte.h" 28c50d8ae3SPaolo Bonzini 29c50d8ae3SPaolo Bonzini #include <linux/kvm_host.h> 30c50d8ae3SPaolo Bonzini #include <linux/types.h> 31c50d8ae3SPaolo Bonzini #include <linux/string.h> 32c50d8ae3SPaolo Bonzini #include <linux/mm.h> 33c50d8ae3SPaolo Bonzini #include <linux/highmem.h> 34c50d8ae3SPaolo Bonzini #include <linux/moduleparam.h> 35c50d8ae3SPaolo Bonzini #include <linux/export.h> 36c50d8ae3SPaolo Bonzini #include <linux/swap.h> 37c50d8ae3SPaolo Bonzini #include <linux/hugetlb.h> 38c50d8ae3SPaolo Bonzini #include <linux/compiler.h> 39c50d8ae3SPaolo Bonzini #include <linux/srcu.h> 40c50d8ae3SPaolo Bonzini #include <linux/slab.h> 41c50d8ae3SPaolo Bonzini #include <linux/sched/signal.h> 42c50d8ae3SPaolo Bonzini #include <linux/uaccess.h> 43c50d8ae3SPaolo Bonzini #include <linux/hash.h> 44c50d8ae3SPaolo Bonzini #include <linux/kern_levels.h> 45c50d8ae3SPaolo Bonzini #include <linux/kthread.h> 46c50d8ae3SPaolo Bonzini 47c50d8ae3SPaolo Bonzini #include <asm/page.h> 48eb243d1dSIngo Molnar #include <asm/memtype.h> 49c50d8ae3SPaolo Bonzini #include <asm/cmpxchg.h> 50c50d8ae3SPaolo Bonzini #include <asm/io.h> 514a98623dSSean Christopherson #include <asm/set_memory.h> 52c50d8ae3SPaolo Bonzini #include <asm/vmx.h> 53c50d8ae3SPaolo Bonzini #include <asm/kvm_page_track.h> 54c50d8ae3SPaolo Bonzini #include "trace.h" 55c50d8ae3SPaolo Bonzini 56fc9bf2e0SSean Christopherson #include "paging.h" 57fc9bf2e0SSean Christopherson 58c50d8ae3SPaolo Bonzini extern bool itlb_multihit_kvm_mitigation; 59c50d8ae3SPaolo Bonzini 60a9d6496dSShaokun Zhang int __read_mostly nx_huge_pages = -1; 61c50d8ae3SPaolo Bonzini #ifdef CONFIG_PREEMPT_RT 62c50d8ae3SPaolo Bonzini /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */ 63c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 0; 64c50d8ae3SPaolo Bonzini #else 65c50d8ae3SPaolo Bonzini static uint __read_mostly nx_huge_pages_recovery_ratio = 60; 66c50d8ae3SPaolo Bonzini #endif 67c50d8ae3SPaolo Bonzini 68c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp); 69c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp); 70c50d8ae3SPaolo Bonzini 71d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_ops = { 72c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages, 73c50d8ae3SPaolo Bonzini .get = param_get_bool, 74c50d8ae3SPaolo Bonzini }; 75c50d8ae3SPaolo Bonzini 76d5d6c18dSJoe Perches static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops = { 77c50d8ae3SPaolo Bonzini .set = set_nx_huge_pages_recovery_ratio, 78c50d8ae3SPaolo Bonzini .get = param_get_uint, 79c50d8ae3SPaolo Bonzini }; 80c50d8ae3SPaolo Bonzini 81c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644); 82c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages, "bool"); 83c50d8ae3SPaolo Bonzini module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_ratio_ops, 84c50d8ae3SPaolo Bonzini &nx_huge_pages_recovery_ratio, 0644); 85c50d8ae3SPaolo Bonzini __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint"); 86c50d8ae3SPaolo Bonzini 8771fe7013SSean Christopherson static bool __read_mostly force_flush_and_sync_on_reuse; 8871fe7013SSean Christopherson module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644); 8971fe7013SSean Christopherson 90c50d8ae3SPaolo Bonzini /* 91c50d8ae3SPaolo Bonzini * When setting this variable to true it enables Two-Dimensional-Paging 92c50d8ae3SPaolo Bonzini * where the hardware walks 2 page tables: 93c50d8ae3SPaolo Bonzini * 1. the guest-virtual to guest-physical 94c50d8ae3SPaolo Bonzini * 2. while doing 1. it walks guest-physical to host-physical 95c50d8ae3SPaolo Bonzini * If the hardware supports that we don't need to do shadow paging. 96c50d8ae3SPaolo Bonzini */ 97c50d8ae3SPaolo Bonzini bool tdp_enabled = false; 98c50d8ae3SPaolo Bonzini 991d92d2e8SSean Christopherson static int max_huge_page_level __read_mostly; 10083013059SSean Christopherson static int max_tdp_level __read_mostly; 101703c335dSSean Christopherson 102c50d8ae3SPaolo Bonzini enum { 103c50d8ae3SPaolo Bonzini AUDIT_PRE_PAGE_FAULT, 104c50d8ae3SPaolo Bonzini AUDIT_POST_PAGE_FAULT, 105c50d8ae3SPaolo Bonzini AUDIT_PRE_PTE_WRITE, 106c50d8ae3SPaolo Bonzini AUDIT_POST_PTE_WRITE, 107c50d8ae3SPaolo Bonzini AUDIT_PRE_SYNC, 108c50d8ae3SPaolo Bonzini AUDIT_POST_SYNC 109c50d8ae3SPaolo Bonzini }; 110c50d8ae3SPaolo Bonzini 111c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1125a9624afSPaolo Bonzini bool dbg = 0; 113c50d8ae3SPaolo Bonzini module_param(dbg, bool, 0644); 114c50d8ae3SPaolo Bonzini #endif 115c50d8ae3SPaolo Bonzini 116c50d8ae3SPaolo Bonzini #define PTE_PREFETCH_NUM 8 117c50d8ae3SPaolo Bonzini 118c50d8ae3SPaolo Bonzini #define PT32_LEVEL_BITS 10 119c50d8ae3SPaolo Bonzini 120c50d8ae3SPaolo Bonzini #define PT32_LEVEL_SHIFT(level) \ 121c50d8ae3SPaolo Bonzini (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) 122c50d8ae3SPaolo Bonzini 123c50d8ae3SPaolo Bonzini #define PT32_LVL_OFFSET_MASK(level) \ 124c50d8ae3SPaolo Bonzini (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ 125c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 126c50d8ae3SPaolo Bonzini 127c50d8ae3SPaolo Bonzini #define PT32_INDEX(address, level)\ 128c50d8ae3SPaolo Bonzini (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) 129c50d8ae3SPaolo Bonzini 130c50d8ae3SPaolo Bonzini 131c50d8ae3SPaolo Bonzini #define PT32_BASE_ADDR_MASK PAGE_MASK 132c50d8ae3SPaolo Bonzini #define PT32_DIR_BASE_ADDR_MASK \ 133c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) 134c50d8ae3SPaolo Bonzini #define PT32_LVL_ADDR_MASK(level) \ 135c50d8ae3SPaolo Bonzini (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ 136c50d8ae3SPaolo Bonzini * PT32_LEVEL_BITS))) - 1)) 137c50d8ae3SPaolo Bonzini 138c50d8ae3SPaolo Bonzini #include <trace/events/kvm.h> 139c50d8ae3SPaolo Bonzini 140dc1cff96SPeter Xu /* make pte_list_desc fit well in cache lines */ 141*13236e25SPeter Xu #define PTE_LIST_EXT 14 142c50d8ae3SPaolo Bonzini 143*13236e25SPeter Xu /* 144*13236e25SPeter Xu * Slight optimization of cacheline layout, by putting `more' and `spte_count' 145*13236e25SPeter Xu * at the start; then accessing it will only use one single cacheline for 146*13236e25SPeter Xu * either full (entries==PTE_LIST_EXT) case or entries<=6. 147*13236e25SPeter Xu */ 148c50d8ae3SPaolo Bonzini struct pte_list_desc { 149c50d8ae3SPaolo Bonzini struct pte_list_desc *more; 150*13236e25SPeter Xu /* 151*13236e25SPeter Xu * Stores number of entries stored in the pte_list_desc. No need to be 152*13236e25SPeter Xu * u64 but just for easier alignment. When PTE_LIST_EXT, means full. 153*13236e25SPeter Xu */ 154*13236e25SPeter Xu u64 spte_count; 155*13236e25SPeter Xu u64 *sptes[PTE_LIST_EXT]; 156c50d8ae3SPaolo Bonzini }; 157c50d8ae3SPaolo Bonzini 158c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator { 159c50d8ae3SPaolo Bonzini u64 addr; 160c50d8ae3SPaolo Bonzini hpa_t shadow_addr; 161c50d8ae3SPaolo Bonzini u64 *sptep; 162c50d8ae3SPaolo Bonzini int level; 163c50d8ae3SPaolo Bonzini unsigned index; 164c50d8ae3SPaolo Bonzini }; 165c50d8ae3SPaolo Bonzini 166c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \ 167c50d8ae3SPaolo Bonzini for (shadow_walk_init_using_root(&(_walker), (_vcpu), \ 168c50d8ae3SPaolo Bonzini (_root), (_addr)); \ 169c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 170c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 171c50d8ae3SPaolo Bonzini 172c50d8ae3SPaolo Bonzini #define for_each_shadow_entry(_vcpu, _addr, _walker) \ 173c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 174c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)); \ 175c50d8ae3SPaolo Bonzini shadow_walk_next(&(_walker))) 176c50d8ae3SPaolo Bonzini 177c50d8ae3SPaolo Bonzini #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ 178c50d8ae3SPaolo Bonzini for (shadow_walk_init(&(_walker), _vcpu, _addr); \ 179c50d8ae3SPaolo Bonzini shadow_walk_okay(&(_walker)) && \ 180c50d8ae3SPaolo Bonzini ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ 181c50d8ae3SPaolo Bonzini __shadow_walk_next(&(_walker), spte)) 182c50d8ae3SPaolo Bonzini 183c50d8ae3SPaolo Bonzini static struct kmem_cache *pte_list_desc_cache; 18402c00b3aSBen Gardon struct kmem_cache *mmu_page_header_cache; 185c50d8ae3SPaolo Bonzini static struct percpu_counter kvm_total_used_mmu_pages; 186c50d8ae3SPaolo Bonzini 187c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 spte); 188c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 189c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu); 190c50d8ae3SPaolo Bonzini 191594e91a1SSean Christopherson struct kvm_mmu_role_regs { 192594e91a1SSean Christopherson const unsigned long cr0; 193594e91a1SSean Christopherson const unsigned long cr4; 194594e91a1SSean Christopherson const u64 efer; 195594e91a1SSean Christopherson }; 196594e91a1SSean Christopherson 197c50d8ae3SPaolo Bonzini #define CREATE_TRACE_POINTS 198c50d8ae3SPaolo Bonzini #include "mmutrace.h" 199c50d8ae3SPaolo Bonzini 200594e91a1SSean Christopherson /* 201594e91a1SSean Christopherson * Yes, lot's of underscores. They're a hint that you probably shouldn't be 202594e91a1SSean Christopherson * reading from the role_regs. Once the mmu_role is constructed, it becomes 203594e91a1SSean Christopherson * the single source of truth for the MMU's state. 204594e91a1SSean Christopherson */ 205594e91a1SSean Christopherson #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \ 206594e91a1SSean Christopherson static inline bool ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\ 207594e91a1SSean Christopherson { \ 208594e91a1SSean Christopherson return !!(regs->reg & flag); \ 209594e91a1SSean Christopherson } 210594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG); 211594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP); 212594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE); 213594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE); 214594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP); 215594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP); 216594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE); 217594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57); 218594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX); 219594e91a1SSean Christopherson BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA); 220594e91a1SSean Christopherson 22160667724SSean Christopherson /* 22260667724SSean Christopherson * The MMU itself (with a valid role) is the single source of truth for the 22360667724SSean Christopherson * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The 22460667724SSean Christopherson * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1, 22560667724SSean Christopherson * and the vCPU may be incorrect/irrelevant. 22660667724SSean Christopherson */ 22760667724SSean Christopherson #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \ 22860667724SSean Christopherson static inline bool is_##reg##_##name(struct kvm_mmu *mmu) \ 22960667724SSean Christopherson { \ 23060667724SSean Christopherson return !!(mmu->mmu_role. base_or_ext . reg##_##name); \ 23160667724SSean Christopherson } 23260667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg); 23360667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp); 23460667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse); 23560667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae); 23660667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep); 23760667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap); 23860667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke); 23960667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57); 24060667724SSean Christopherson BUILD_MMU_ROLE_ACCESSOR(base, efer, nx); 24160667724SSean Christopherson 242594e91a1SSean Christopherson static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) 243594e91a1SSean Christopherson { 244594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 245594e91a1SSean Christopherson .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS), 246594e91a1SSean Christopherson .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS), 247594e91a1SSean Christopherson .efer = vcpu->arch.efer, 248594e91a1SSean Christopherson }; 249594e91a1SSean Christopherson 250594e91a1SSean Christopherson return regs; 251594e91a1SSean Christopherson } 252c50d8ae3SPaolo Bonzini 253f4bd6f73SSean Christopherson static int role_regs_to_root_level(struct kvm_mmu_role_regs *regs) 254f4bd6f73SSean Christopherson { 255f4bd6f73SSean Christopherson if (!____is_cr0_pg(regs)) 256f4bd6f73SSean Christopherson return 0; 257f4bd6f73SSean Christopherson else if (____is_efer_lma(regs)) 258f4bd6f73SSean Christopherson return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : 259f4bd6f73SSean Christopherson PT64_ROOT_4LEVEL; 260f4bd6f73SSean Christopherson else if (____is_cr4_pae(regs)) 261f4bd6f73SSean Christopherson return PT32E_ROOT_LEVEL; 262f4bd6f73SSean Christopherson else 263f4bd6f73SSean Christopherson return PT32_ROOT_LEVEL; 264f4bd6f73SSean Christopherson } 265c50d8ae3SPaolo Bonzini 266c50d8ae3SPaolo Bonzini static inline bool kvm_available_flush_tlb_with_range(void) 267c50d8ae3SPaolo Bonzini { 268afaf0b2fSSean Christopherson return kvm_x86_ops.tlb_remote_flush_with_range; 269c50d8ae3SPaolo Bonzini } 270c50d8ae3SPaolo Bonzini 271c50d8ae3SPaolo Bonzini static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, 272c50d8ae3SPaolo Bonzini struct kvm_tlb_range *range) 273c50d8ae3SPaolo Bonzini { 274c50d8ae3SPaolo Bonzini int ret = -ENOTSUPP; 275c50d8ae3SPaolo Bonzini 276afaf0b2fSSean Christopherson if (range && kvm_x86_ops.tlb_remote_flush_with_range) 277b3646477SJason Baron ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range); 278c50d8ae3SPaolo Bonzini 279c50d8ae3SPaolo Bonzini if (ret) 280c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 281c50d8ae3SPaolo Bonzini } 282c50d8ae3SPaolo Bonzini 2832f2fad08SBen Gardon void kvm_flush_remote_tlbs_with_address(struct kvm *kvm, 284c50d8ae3SPaolo Bonzini u64 start_gfn, u64 pages) 285c50d8ae3SPaolo Bonzini { 286c50d8ae3SPaolo Bonzini struct kvm_tlb_range range; 287c50d8ae3SPaolo Bonzini 288c50d8ae3SPaolo Bonzini range.start_gfn = start_gfn; 289c50d8ae3SPaolo Bonzini range.pages = pages; 290c50d8ae3SPaolo Bonzini 291c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_range(kvm, &range); 292c50d8ae3SPaolo Bonzini } 293c50d8ae3SPaolo Bonzini 2948f79b064SBen Gardon static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, 2958f79b064SBen Gardon unsigned int access) 2968f79b064SBen Gardon { 297c236d962SSean Christopherson u64 spte = make_mmio_spte(vcpu, gfn, access); 2988f79b064SBen Gardon 299c236d962SSean Christopherson trace_mark_mmio_spte(sptep, gfn, spte); 300c236d962SSean Christopherson mmu_spte_set(sptep, spte); 301c50d8ae3SPaolo Bonzini } 302c50d8ae3SPaolo Bonzini 303c50d8ae3SPaolo Bonzini static gfn_t get_mmio_spte_gfn(u64 spte) 304c50d8ae3SPaolo Bonzini { 305c50d8ae3SPaolo Bonzini u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask; 306c50d8ae3SPaolo Bonzini 3078a967d65SPaolo Bonzini gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN) 308c50d8ae3SPaolo Bonzini & shadow_nonpresent_or_rsvd_mask; 309c50d8ae3SPaolo Bonzini 310c50d8ae3SPaolo Bonzini return gpa >> PAGE_SHIFT; 311c50d8ae3SPaolo Bonzini } 312c50d8ae3SPaolo Bonzini 313c50d8ae3SPaolo Bonzini static unsigned get_mmio_spte_access(u64 spte) 314c50d8ae3SPaolo Bonzini { 315c50d8ae3SPaolo Bonzini return spte & shadow_mmio_access_mask; 316c50d8ae3SPaolo Bonzini } 317c50d8ae3SPaolo Bonzini 318c50d8ae3SPaolo Bonzini static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) 319c50d8ae3SPaolo Bonzini { 320c50d8ae3SPaolo Bonzini u64 kvm_gen, spte_gen, gen; 321c50d8ae3SPaolo Bonzini 322c50d8ae3SPaolo Bonzini gen = kvm_vcpu_memslots(vcpu)->generation; 323c50d8ae3SPaolo Bonzini if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 324c50d8ae3SPaolo Bonzini return false; 325c50d8ae3SPaolo Bonzini 326c50d8ae3SPaolo Bonzini kvm_gen = gen & MMIO_SPTE_GEN_MASK; 327c50d8ae3SPaolo Bonzini spte_gen = get_mmio_spte_generation(spte); 328c50d8ae3SPaolo Bonzini 329c50d8ae3SPaolo Bonzini trace_check_mmio_spte(spte, kvm_gen, spte_gen); 330c50d8ae3SPaolo Bonzini return likely(kvm_gen == spte_gen); 331c50d8ae3SPaolo Bonzini } 332c50d8ae3SPaolo Bonzini 333cd313569SMohammed Gamal static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 334cd313569SMohammed Gamal struct x86_exception *exception) 335cd313569SMohammed Gamal { 336ec7771abSMohammed Gamal /* Check if guest physical address doesn't exceed guest maximum */ 337dc46515cSSean Christopherson if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) { 338ec7771abSMohammed Gamal exception->error_code |= PFERR_RSVD_MASK; 339ec7771abSMohammed Gamal return UNMAPPED_GVA; 340ec7771abSMohammed Gamal } 341ec7771abSMohammed Gamal 342cd313569SMohammed Gamal return gpa; 343cd313569SMohammed Gamal } 344cd313569SMohammed Gamal 345c50d8ae3SPaolo Bonzini static int is_cpuid_PSE36(void) 346c50d8ae3SPaolo Bonzini { 347c50d8ae3SPaolo Bonzini return 1; 348c50d8ae3SPaolo Bonzini } 349c50d8ae3SPaolo Bonzini 350c50d8ae3SPaolo Bonzini static gfn_t pse36_gfn_delta(u32 gpte) 351c50d8ae3SPaolo Bonzini { 352c50d8ae3SPaolo Bonzini int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; 353c50d8ae3SPaolo Bonzini 354c50d8ae3SPaolo Bonzini return (gpte & PT32_DIR_PSE36_MASK) << shift; 355c50d8ae3SPaolo Bonzini } 356c50d8ae3SPaolo Bonzini 357c50d8ae3SPaolo Bonzini #ifdef CONFIG_X86_64 358c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 359c50d8ae3SPaolo Bonzini { 360c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 361c50d8ae3SPaolo Bonzini } 362c50d8ae3SPaolo Bonzini 363c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 364c50d8ae3SPaolo Bonzini { 365c50d8ae3SPaolo Bonzini WRITE_ONCE(*sptep, spte); 366c50d8ae3SPaolo Bonzini } 367c50d8ae3SPaolo Bonzini 368c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 369c50d8ae3SPaolo Bonzini { 370c50d8ae3SPaolo Bonzini return xchg(sptep, spte); 371c50d8ae3SPaolo Bonzini } 372c50d8ae3SPaolo Bonzini 373c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 374c50d8ae3SPaolo Bonzini { 375c50d8ae3SPaolo Bonzini return READ_ONCE(*sptep); 376c50d8ae3SPaolo Bonzini } 377c50d8ae3SPaolo Bonzini #else 378c50d8ae3SPaolo Bonzini union split_spte { 379c50d8ae3SPaolo Bonzini struct { 380c50d8ae3SPaolo Bonzini u32 spte_low; 381c50d8ae3SPaolo Bonzini u32 spte_high; 382c50d8ae3SPaolo Bonzini }; 383c50d8ae3SPaolo Bonzini u64 spte; 384c50d8ae3SPaolo Bonzini }; 385c50d8ae3SPaolo Bonzini 386c50d8ae3SPaolo Bonzini static void count_spte_clear(u64 *sptep, u64 spte) 387c50d8ae3SPaolo Bonzini { 38857354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 389c50d8ae3SPaolo Bonzini 390c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(spte)) 391c50d8ae3SPaolo Bonzini return; 392c50d8ae3SPaolo Bonzini 393c50d8ae3SPaolo Bonzini /* Ensure the spte is completely set before we increase the count */ 394c50d8ae3SPaolo Bonzini smp_wmb(); 395c50d8ae3SPaolo Bonzini sp->clear_spte_count++; 396c50d8ae3SPaolo Bonzini } 397c50d8ae3SPaolo Bonzini 398c50d8ae3SPaolo Bonzini static void __set_spte(u64 *sptep, u64 spte) 399c50d8ae3SPaolo Bonzini { 400c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 401c50d8ae3SPaolo Bonzini 402c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 403c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 404c50d8ae3SPaolo Bonzini 405c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 406c50d8ae3SPaolo Bonzini 407c50d8ae3SPaolo Bonzini /* 408c50d8ae3SPaolo Bonzini * If we map the spte from nonpresent to present, We should store 409c50d8ae3SPaolo Bonzini * the high bits firstly, then set present bit, so cpu can not 410c50d8ae3SPaolo Bonzini * fetch this spte while we are setting the spte. 411c50d8ae3SPaolo Bonzini */ 412c50d8ae3SPaolo Bonzini smp_wmb(); 413c50d8ae3SPaolo Bonzini 414c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 415c50d8ae3SPaolo Bonzini } 416c50d8ae3SPaolo Bonzini 417c50d8ae3SPaolo Bonzini static void __update_clear_spte_fast(u64 *sptep, u64 spte) 418c50d8ae3SPaolo Bonzini { 419c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte; 420c50d8ae3SPaolo Bonzini 421c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 422c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 423c50d8ae3SPaolo Bonzini 424c50d8ae3SPaolo Bonzini WRITE_ONCE(ssptep->spte_low, sspte.spte_low); 425c50d8ae3SPaolo Bonzini 426c50d8ae3SPaolo Bonzini /* 427c50d8ae3SPaolo Bonzini * If we map the spte from present to nonpresent, we should clear 428c50d8ae3SPaolo Bonzini * present bit firstly to avoid vcpu fetch the old high bits. 429c50d8ae3SPaolo Bonzini */ 430c50d8ae3SPaolo Bonzini smp_wmb(); 431c50d8ae3SPaolo Bonzini 432c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 433c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 434c50d8ae3SPaolo Bonzini } 435c50d8ae3SPaolo Bonzini 436c50d8ae3SPaolo Bonzini static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) 437c50d8ae3SPaolo Bonzini { 438c50d8ae3SPaolo Bonzini union split_spte *ssptep, sspte, orig; 439c50d8ae3SPaolo Bonzini 440c50d8ae3SPaolo Bonzini ssptep = (union split_spte *)sptep; 441c50d8ae3SPaolo Bonzini sspte = (union split_spte)spte; 442c50d8ae3SPaolo Bonzini 443c50d8ae3SPaolo Bonzini /* xchg acts as a barrier before the setting of the high bits */ 444c50d8ae3SPaolo Bonzini orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); 445c50d8ae3SPaolo Bonzini orig.spte_high = ssptep->spte_high; 446c50d8ae3SPaolo Bonzini ssptep->spte_high = sspte.spte_high; 447c50d8ae3SPaolo Bonzini count_spte_clear(sptep, spte); 448c50d8ae3SPaolo Bonzini 449c50d8ae3SPaolo Bonzini return orig.spte; 450c50d8ae3SPaolo Bonzini } 451c50d8ae3SPaolo Bonzini 452c50d8ae3SPaolo Bonzini /* 453c50d8ae3SPaolo Bonzini * The idea using the light way get the spte on x86_32 guest is from 454c50d8ae3SPaolo Bonzini * gup_get_pte (mm/gup.c). 455c50d8ae3SPaolo Bonzini * 456c50d8ae3SPaolo Bonzini * An spte tlb flush may be pending, because kvm_set_pte_rmapp 457c50d8ae3SPaolo Bonzini * coalesces them and we are running out of the MMU lock. Therefore 458c50d8ae3SPaolo Bonzini * we need to protect against in-progress updates of the spte. 459c50d8ae3SPaolo Bonzini * 460c50d8ae3SPaolo Bonzini * Reading the spte while an update is in progress may get the old value 461c50d8ae3SPaolo Bonzini * for the high part of the spte. The race is fine for a present->non-present 462c50d8ae3SPaolo Bonzini * change (because the high part of the spte is ignored for non-present spte), 463c50d8ae3SPaolo Bonzini * but for a present->present change we must reread the spte. 464c50d8ae3SPaolo Bonzini * 465c50d8ae3SPaolo Bonzini * All such changes are done in two steps (present->non-present and 466c50d8ae3SPaolo Bonzini * non-present->present), hence it is enough to count the number of 467c50d8ae3SPaolo Bonzini * present->non-present updates: if it changed while reading the spte, 468c50d8ae3SPaolo Bonzini * we might have hit the race. This is done using clear_spte_count. 469c50d8ae3SPaolo Bonzini */ 470c50d8ae3SPaolo Bonzini static u64 __get_spte_lockless(u64 *sptep) 471c50d8ae3SPaolo Bonzini { 47257354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 473c50d8ae3SPaolo Bonzini union split_spte spte, *orig = (union split_spte *)sptep; 474c50d8ae3SPaolo Bonzini int count; 475c50d8ae3SPaolo Bonzini 476c50d8ae3SPaolo Bonzini retry: 477c50d8ae3SPaolo Bonzini count = sp->clear_spte_count; 478c50d8ae3SPaolo Bonzini smp_rmb(); 479c50d8ae3SPaolo Bonzini 480c50d8ae3SPaolo Bonzini spte.spte_low = orig->spte_low; 481c50d8ae3SPaolo Bonzini smp_rmb(); 482c50d8ae3SPaolo Bonzini 483c50d8ae3SPaolo Bonzini spte.spte_high = orig->spte_high; 484c50d8ae3SPaolo Bonzini smp_rmb(); 485c50d8ae3SPaolo Bonzini 486c50d8ae3SPaolo Bonzini if (unlikely(spte.spte_low != orig->spte_low || 487c50d8ae3SPaolo Bonzini count != sp->clear_spte_count)) 488c50d8ae3SPaolo Bonzini goto retry; 489c50d8ae3SPaolo Bonzini 490c50d8ae3SPaolo Bonzini return spte.spte; 491c50d8ae3SPaolo Bonzini } 492c50d8ae3SPaolo Bonzini #endif 493c50d8ae3SPaolo Bonzini 494c50d8ae3SPaolo Bonzini static bool spte_has_volatile_bits(u64 spte) 495c50d8ae3SPaolo Bonzini { 496c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 497c50d8ae3SPaolo Bonzini return false; 498c50d8ae3SPaolo Bonzini 499c50d8ae3SPaolo Bonzini /* 500c50d8ae3SPaolo Bonzini * Always atomically update spte if it can be updated 501c50d8ae3SPaolo Bonzini * out of mmu-lock, it can ensure dirty bit is not lost, 502c50d8ae3SPaolo Bonzini * also, it can help us to get a stable is_writable_pte() 503c50d8ae3SPaolo Bonzini * to ensure tlb flush is not missed. 504c50d8ae3SPaolo Bonzini */ 505c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(spte) || 506c50d8ae3SPaolo Bonzini is_access_track_spte(spte)) 507c50d8ae3SPaolo Bonzini return true; 508c50d8ae3SPaolo Bonzini 509c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 510c50d8ae3SPaolo Bonzini if ((spte & shadow_accessed_mask) == 0 || 511c50d8ae3SPaolo Bonzini (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0)) 512c50d8ae3SPaolo Bonzini return true; 513c50d8ae3SPaolo Bonzini } 514c50d8ae3SPaolo Bonzini 515c50d8ae3SPaolo Bonzini return false; 516c50d8ae3SPaolo Bonzini } 517c50d8ae3SPaolo Bonzini 518c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_set: 519c50d8ae3SPaolo Bonzini * Set the sptep from nonpresent to present. 520c50d8ae3SPaolo Bonzini * Note: the sptep being assigned *must* be either not present 521c50d8ae3SPaolo Bonzini * or in a state where the hardware will not attempt to update 522c50d8ae3SPaolo Bonzini * the spte. 523c50d8ae3SPaolo Bonzini */ 524c50d8ae3SPaolo Bonzini static void mmu_spte_set(u64 *sptep, u64 new_spte) 525c50d8ae3SPaolo Bonzini { 526c50d8ae3SPaolo Bonzini WARN_ON(is_shadow_present_pte(*sptep)); 527c50d8ae3SPaolo Bonzini __set_spte(sptep, new_spte); 528c50d8ae3SPaolo Bonzini } 529c50d8ae3SPaolo Bonzini 530c50d8ae3SPaolo Bonzini /* 531c50d8ae3SPaolo Bonzini * Update the SPTE (excluding the PFN), but do not track changes in its 532c50d8ae3SPaolo Bonzini * accessed/dirty status. 533c50d8ae3SPaolo Bonzini */ 534c50d8ae3SPaolo Bonzini static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte) 535c50d8ae3SPaolo Bonzini { 536c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 537c50d8ae3SPaolo Bonzini 538c50d8ae3SPaolo Bonzini WARN_ON(!is_shadow_present_pte(new_spte)); 539c50d8ae3SPaolo Bonzini 540c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) { 541c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 542c50d8ae3SPaolo Bonzini return old_spte; 543c50d8ae3SPaolo Bonzini } 544c50d8ae3SPaolo Bonzini 545c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 546c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, new_spte); 547c50d8ae3SPaolo Bonzini else 548c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, new_spte); 549c50d8ae3SPaolo Bonzini 550c50d8ae3SPaolo Bonzini WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte)); 551c50d8ae3SPaolo Bonzini 552c50d8ae3SPaolo Bonzini return old_spte; 553c50d8ae3SPaolo Bonzini } 554c50d8ae3SPaolo Bonzini 555c50d8ae3SPaolo Bonzini /* Rules for using mmu_spte_update: 556c50d8ae3SPaolo Bonzini * Update the state bits, it means the mapped pfn is not changed. 557c50d8ae3SPaolo Bonzini * 558c50d8ae3SPaolo Bonzini * Whenever we overwrite a writable spte with a read-only one we 559c50d8ae3SPaolo Bonzini * should flush remote TLBs. Otherwise rmap_write_protect 560c50d8ae3SPaolo Bonzini * will find a read-only spte, even though the writable spte 561c50d8ae3SPaolo Bonzini * might be cached on a CPU's TLB, the return value indicates this 562c50d8ae3SPaolo Bonzini * case. 563c50d8ae3SPaolo Bonzini * 564c50d8ae3SPaolo Bonzini * Returns true if the TLB needs to be flushed 565c50d8ae3SPaolo Bonzini */ 566c50d8ae3SPaolo Bonzini static bool mmu_spte_update(u64 *sptep, u64 new_spte) 567c50d8ae3SPaolo Bonzini { 568c50d8ae3SPaolo Bonzini bool flush = false; 569c50d8ae3SPaolo Bonzini u64 old_spte = mmu_spte_update_no_track(sptep, new_spte); 570c50d8ae3SPaolo Bonzini 571c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 572c50d8ae3SPaolo Bonzini return false; 573c50d8ae3SPaolo Bonzini 574c50d8ae3SPaolo Bonzini /* 575c50d8ae3SPaolo Bonzini * For the spte updated out of mmu-lock is safe, since 576c50d8ae3SPaolo Bonzini * we always atomically update it, see the comments in 577c50d8ae3SPaolo Bonzini * spte_has_volatile_bits(). 578c50d8ae3SPaolo Bonzini */ 579c50d8ae3SPaolo Bonzini if (spte_can_locklessly_be_made_writable(old_spte) && 580c50d8ae3SPaolo Bonzini !is_writable_pte(new_spte)) 581c50d8ae3SPaolo Bonzini flush = true; 582c50d8ae3SPaolo Bonzini 583c50d8ae3SPaolo Bonzini /* 584c50d8ae3SPaolo Bonzini * Flush TLB when accessed/dirty states are changed in the page tables, 585c50d8ae3SPaolo Bonzini * to guarantee consistency between TLB and page tables. 586c50d8ae3SPaolo Bonzini */ 587c50d8ae3SPaolo Bonzini 588c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) { 589c50d8ae3SPaolo Bonzini flush = true; 590c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(spte_to_pfn(old_spte)); 591c50d8ae3SPaolo Bonzini } 592c50d8ae3SPaolo Bonzini 593c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) { 594c50d8ae3SPaolo Bonzini flush = true; 595c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(old_spte)); 596c50d8ae3SPaolo Bonzini } 597c50d8ae3SPaolo Bonzini 598c50d8ae3SPaolo Bonzini return flush; 599c50d8ae3SPaolo Bonzini } 600c50d8ae3SPaolo Bonzini 601c50d8ae3SPaolo Bonzini /* 602c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_track_bits: 603c50d8ae3SPaolo Bonzini * It sets the sptep from present to nonpresent, and track the 604c50d8ae3SPaolo Bonzini * state bits, it is used to clear the last level sptep. 6057fa2a347SSean Christopherson * Returns the old PTE. 606c50d8ae3SPaolo Bonzini */ 6077fa2a347SSean Christopherson static u64 mmu_spte_clear_track_bits(u64 *sptep) 608c50d8ae3SPaolo Bonzini { 609c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 610c50d8ae3SPaolo Bonzini u64 old_spte = *sptep; 611c50d8ae3SPaolo Bonzini 612c50d8ae3SPaolo Bonzini if (!spte_has_volatile_bits(old_spte)) 613c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 614c50d8ae3SPaolo Bonzini else 615c50d8ae3SPaolo Bonzini old_spte = __update_clear_spte_slow(sptep, 0ull); 616c50d8ae3SPaolo Bonzini 617c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old_spte)) 6187fa2a347SSean Christopherson return old_spte; 619c50d8ae3SPaolo Bonzini 620c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(old_spte); 621c50d8ae3SPaolo Bonzini 622c50d8ae3SPaolo Bonzini /* 623c50d8ae3SPaolo Bonzini * KVM does not hold the refcount of the page used by 624c50d8ae3SPaolo Bonzini * kvm mmu, before reclaiming the page, we should 625c50d8ae3SPaolo Bonzini * unmap it from mmu first. 626c50d8ae3SPaolo Bonzini */ 627c50d8ae3SPaolo Bonzini WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); 628c50d8ae3SPaolo Bonzini 629c50d8ae3SPaolo Bonzini if (is_accessed_spte(old_spte)) 630c50d8ae3SPaolo Bonzini kvm_set_pfn_accessed(pfn); 631c50d8ae3SPaolo Bonzini 632c50d8ae3SPaolo Bonzini if (is_dirty_spte(old_spte)) 633c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(pfn); 634c50d8ae3SPaolo Bonzini 6357fa2a347SSean Christopherson return old_spte; 636c50d8ae3SPaolo Bonzini } 637c50d8ae3SPaolo Bonzini 638c50d8ae3SPaolo Bonzini /* 639c50d8ae3SPaolo Bonzini * Rules for using mmu_spte_clear_no_track: 640c50d8ae3SPaolo Bonzini * Directly clear spte without caring the state bits of sptep, 641c50d8ae3SPaolo Bonzini * it is used to set the upper level spte. 642c50d8ae3SPaolo Bonzini */ 643c50d8ae3SPaolo Bonzini static void mmu_spte_clear_no_track(u64 *sptep) 644c50d8ae3SPaolo Bonzini { 645c50d8ae3SPaolo Bonzini __update_clear_spte_fast(sptep, 0ull); 646c50d8ae3SPaolo Bonzini } 647c50d8ae3SPaolo Bonzini 648c50d8ae3SPaolo Bonzini static u64 mmu_spte_get_lockless(u64 *sptep) 649c50d8ae3SPaolo Bonzini { 650c50d8ae3SPaolo Bonzini return __get_spte_lockless(sptep); 651c50d8ae3SPaolo Bonzini } 652c50d8ae3SPaolo Bonzini 653c50d8ae3SPaolo Bonzini /* Restore an acc-track PTE back to a regular PTE */ 654c50d8ae3SPaolo Bonzini static u64 restore_acc_track_spte(u64 spte) 655c50d8ae3SPaolo Bonzini { 656c50d8ae3SPaolo Bonzini u64 new_spte = spte; 6578a967d65SPaolo Bonzini u64 saved_bits = (spte >> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT) 6588a967d65SPaolo Bonzini & SHADOW_ACC_TRACK_SAVED_BITS_MASK; 659c50d8ae3SPaolo Bonzini 660c50d8ae3SPaolo Bonzini WARN_ON_ONCE(spte_ad_enabled(spte)); 661c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!is_access_track_spte(spte)); 662c50d8ae3SPaolo Bonzini 663c50d8ae3SPaolo Bonzini new_spte &= ~shadow_acc_track_mask; 6648a967d65SPaolo Bonzini new_spte &= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK << 6658a967d65SPaolo Bonzini SHADOW_ACC_TRACK_SAVED_BITS_SHIFT); 666c50d8ae3SPaolo Bonzini new_spte |= saved_bits; 667c50d8ae3SPaolo Bonzini 668c50d8ae3SPaolo Bonzini return new_spte; 669c50d8ae3SPaolo Bonzini } 670c50d8ae3SPaolo Bonzini 671c50d8ae3SPaolo Bonzini /* Returns the Accessed status of the PTE and resets it at the same time. */ 672c50d8ae3SPaolo Bonzini static bool mmu_spte_age(u64 *sptep) 673c50d8ae3SPaolo Bonzini { 674c50d8ae3SPaolo Bonzini u64 spte = mmu_spte_get_lockless(sptep); 675c50d8ae3SPaolo Bonzini 676c50d8ae3SPaolo Bonzini if (!is_accessed_spte(spte)) 677c50d8ae3SPaolo Bonzini return false; 678c50d8ae3SPaolo Bonzini 679c50d8ae3SPaolo Bonzini if (spte_ad_enabled(spte)) { 680c50d8ae3SPaolo Bonzini clear_bit((ffs(shadow_accessed_mask) - 1), 681c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 682c50d8ae3SPaolo Bonzini } else { 683c50d8ae3SPaolo Bonzini /* 684c50d8ae3SPaolo Bonzini * Capture the dirty status of the page, so that it doesn't get 685c50d8ae3SPaolo Bonzini * lost when the SPTE is marked for access tracking. 686c50d8ae3SPaolo Bonzini */ 687c50d8ae3SPaolo Bonzini if (is_writable_pte(spte)) 688c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(spte)); 689c50d8ae3SPaolo Bonzini 690c50d8ae3SPaolo Bonzini spte = mark_spte_for_access_track(spte); 691c50d8ae3SPaolo Bonzini mmu_spte_update_no_track(sptep, spte); 692c50d8ae3SPaolo Bonzini } 693c50d8ae3SPaolo Bonzini 694c50d8ae3SPaolo Bonzini return true; 695c50d8ae3SPaolo Bonzini } 696c50d8ae3SPaolo Bonzini 697c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) 698c50d8ae3SPaolo Bonzini { 699c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 700c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_begin(); 701c5c8c7c5SDavid Matlack } else { 702c50d8ae3SPaolo Bonzini /* 703c50d8ae3SPaolo Bonzini * Prevent page table teardown by making any free-er wait during 704c50d8ae3SPaolo Bonzini * kvm_flush_remote_tlbs() IPI to all active vcpus. 705c50d8ae3SPaolo Bonzini */ 706c50d8ae3SPaolo Bonzini local_irq_disable(); 707c50d8ae3SPaolo Bonzini 708c50d8ae3SPaolo Bonzini /* 709c50d8ae3SPaolo Bonzini * Make sure a following spte read is not reordered ahead of the write 710c50d8ae3SPaolo Bonzini * to vcpu->mode. 711c50d8ae3SPaolo Bonzini */ 712c50d8ae3SPaolo Bonzini smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); 713c50d8ae3SPaolo Bonzini } 714c5c8c7c5SDavid Matlack } 715c50d8ae3SPaolo Bonzini 716c50d8ae3SPaolo Bonzini static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) 717c50d8ae3SPaolo Bonzini { 718c5c8c7c5SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) { 719c5c8c7c5SDavid Matlack kvm_tdp_mmu_walk_lockless_end(); 720c5c8c7c5SDavid Matlack } else { 721c50d8ae3SPaolo Bonzini /* 722c50d8ae3SPaolo Bonzini * Make sure the write to vcpu->mode is not reordered in front of 723c50d8ae3SPaolo Bonzini * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us 724c50d8ae3SPaolo Bonzini * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. 725c50d8ae3SPaolo Bonzini */ 726c50d8ae3SPaolo Bonzini smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); 727c50d8ae3SPaolo Bonzini local_irq_enable(); 728c50d8ae3SPaolo Bonzini } 729c5c8c7c5SDavid Matlack } 730c50d8ae3SPaolo Bonzini 731378f5cd6SSean Christopherson static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 732c50d8ae3SPaolo Bonzini { 733c50d8ae3SPaolo Bonzini int r; 734c50d8ae3SPaolo Bonzini 735531281adSSean Christopherson /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */ 73694ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, 737531281adSSean Christopherson 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM); 738c50d8ae3SPaolo Bonzini if (r) 739c50d8ae3SPaolo Bonzini return r; 74094ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, 741171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 742171a90d7SSean Christopherson if (r) 743171a90d7SSean Christopherson return r; 744378f5cd6SSean Christopherson if (maybe_indirect) { 74594ce87efSSean Christopherson r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache, 746171a90d7SSean Christopherson PT64_ROOT_MAX_LEVEL); 747c50d8ae3SPaolo Bonzini if (r) 748c50d8ae3SPaolo Bonzini return r; 749378f5cd6SSean Christopherson } 75094ce87efSSean Christopherson return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, 751531281adSSean Christopherson PT64_ROOT_MAX_LEVEL); 752c50d8ae3SPaolo Bonzini } 753c50d8ae3SPaolo Bonzini 754c50d8ae3SPaolo Bonzini static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) 755c50d8ae3SPaolo Bonzini { 75694ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); 75794ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); 75894ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache); 75994ce87efSSean Christopherson kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); 760c50d8ae3SPaolo Bonzini } 761c50d8ae3SPaolo Bonzini 762c50d8ae3SPaolo Bonzini static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) 763c50d8ae3SPaolo Bonzini { 76494ce87efSSean Christopherson return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); 765c50d8ae3SPaolo Bonzini } 766c50d8ae3SPaolo Bonzini 767c50d8ae3SPaolo Bonzini static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) 768c50d8ae3SPaolo Bonzini { 769c50d8ae3SPaolo Bonzini kmem_cache_free(pte_list_desc_cache, pte_list_desc); 770c50d8ae3SPaolo Bonzini } 771c50d8ae3SPaolo Bonzini 772c50d8ae3SPaolo Bonzini static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) 773c50d8ae3SPaolo Bonzini { 774c50d8ae3SPaolo Bonzini if (!sp->role.direct) 775c50d8ae3SPaolo Bonzini return sp->gfns[index]; 776c50d8ae3SPaolo Bonzini 777c50d8ae3SPaolo Bonzini return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); 778c50d8ae3SPaolo Bonzini } 779c50d8ae3SPaolo Bonzini 780c50d8ae3SPaolo Bonzini static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) 781c50d8ae3SPaolo Bonzini { 782c50d8ae3SPaolo Bonzini if (!sp->role.direct) { 783c50d8ae3SPaolo Bonzini sp->gfns[index] = gfn; 784c50d8ae3SPaolo Bonzini return; 785c50d8ae3SPaolo Bonzini } 786c50d8ae3SPaolo Bonzini 787c50d8ae3SPaolo Bonzini if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index))) 788c50d8ae3SPaolo Bonzini pr_err_ratelimited("gfn mismatch under direct page %llx " 789c50d8ae3SPaolo Bonzini "(expected %llx, got %llx)\n", 790c50d8ae3SPaolo Bonzini sp->gfn, 791c50d8ae3SPaolo Bonzini kvm_mmu_page_get_gfn(sp, index), gfn); 792c50d8ae3SPaolo Bonzini } 793c50d8ae3SPaolo Bonzini 794c50d8ae3SPaolo Bonzini /* 795c50d8ae3SPaolo Bonzini * Return the pointer to the large page information for a given gfn, 796c50d8ae3SPaolo Bonzini * handling slots that are not large page aligned. 797c50d8ae3SPaolo Bonzini */ 798c50d8ae3SPaolo Bonzini static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, 7998ca6f063SBen Gardon const struct kvm_memory_slot *slot, int level) 800c50d8ae3SPaolo Bonzini { 801c50d8ae3SPaolo Bonzini unsigned long idx; 802c50d8ae3SPaolo Bonzini 803c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 804c50d8ae3SPaolo Bonzini return &slot->arch.lpage_info[level - 2][idx]; 805c50d8ae3SPaolo Bonzini } 806c50d8ae3SPaolo Bonzini 807269e9552SHamza Mahfooz static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot, 808c50d8ae3SPaolo Bonzini gfn_t gfn, int count) 809c50d8ae3SPaolo Bonzini { 810c50d8ae3SPaolo Bonzini struct kvm_lpage_info *linfo; 811c50d8ae3SPaolo Bonzini int i; 812c50d8ae3SPaolo Bonzini 8133bae0459SSean Christopherson for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 814c50d8ae3SPaolo Bonzini linfo = lpage_info_slot(gfn, slot, i); 815c50d8ae3SPaolo Bonzini linfo->disallow_lpage += count; 816c50d8ae3SPaolo Bonzini WARN_ON(linfo->disallow_lpage < 0); 817c50d8ae3SPaolo Bonzini } 818c50d8ae3SPaolo Bonzini } 819c50d8ae3SPaolo Bonzini 820269e9552SHamza Mahfooz void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 821c50d8ae3SPaolo Bonzini { 822c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, 1); 823c50d8ae3SPaolo Bonzini } 824c50d8ae3SPaolo Bonzini 825269e9552SHamza Mahfooz void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn) 826c50d8ae3SPaolo Bonzini { 827c50d8ae3SPaolo Bonzini update_gfn_disallow_lpage_count(slot, gfn, -1); 828c50d8ae3SPaolo Bonzini } 829c50d8ae3SPaolo Bonzini 830c50d8ae3SPaolo Bonzini static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 831c50d8ae3SPaolo Bonzini { 832c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 833c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 834c50d8ae3SPaolo Bonzini gfn_t gfn; 835c50d8ae3SPaolo Bonzini 836c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages++; 837c50d8ae3SPaolo Bonzini gfn = sp->gfn; 838c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 839c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 840c50d8ae3SPaolo Bonzini 841c50d8ae3SPaolo Bonzini /* the non-leaf shadow pages are keeping readonly. */ 8423bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 843c50d8ae3SPaolo Bonzini return kvm_slot_page_track_add_page(kvm, slot, gfn, 844c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 845c50d8ae3SPaolo Bonzini 846c50d8ae3SPaolo Bonzini kvm_mmu_gfn_disallow_lpage(slot, gfn); 847c50d8ae3SPaolo Bonzini } 848c50d8ae3SPaolo Bonzini 84929cf0f50SBen Gardon void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 850c50d8ae3SPaolo Bonzini { 851c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 852c50d8ae3SPaolo Bonzini return; 853c50d8ae3SPaolo Bonzini 854c50d8ae3SPaolo Bonzini ++kvm->stat.nx_lpage_splits; 855c50d8ae3SPaolo Bonzini list_add_tail(&sp->lpage_disallowed_link, 856c50d8ae3SPaolo Bonzini &kvm->arch.lpage_disallowed_mmu_pages); 857c50d8ae3SPaolo Bonzini sp->lpage_disallowed = true; 858c50d8ae3SPaolo Bonzini } 859c50d8ae3SPaolo Bonzini 860c50d8ae3SPaolo Bonzini static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) 861c50d8ae3SPaolo Bonzini { 862c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 863c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 864c50d8ae3SPaolo Bonzini gfn_t gfn; 865c50d8ae3SPaolo Bonzini 866c50d8ae3SPaolo Bonzini kvm->arch.indirect_shadow_pages--; 867c50d8ae3SPaolo Bonzini gfn = sp->gfn; 868c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 869c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 8703bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 871c50d8ae3SPaolo Bonzini return kvm_slot_page_track_remove_page(kvm, slot, gfn, 872c50d8ae3SPaolo Bonzini KVM_PAGE_TRACK_WRITE); 873c50d8ae3SPaolo Bonzini 874c50d8ae3SPaolo Bonzini kvm_mmu_gfn_allow_lpage(slot, gfn); 875c50d8ae3SPaolo Bonzini } 876c50d8ae3SPaolo Bonzini 87729cf0f50SBen Gardon void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp) 878c50d8ae3SPaolo Bonzini { 879c50d8ae3SPaolo Bonzini --kvm->stat.nx_lpage_splits; 880c50d8ae3SPaolo Bonzini sp->lpage_disallowed = false; 881c50d8ae3SPaolo Bonzini list_del(&sp->lpage_disallowed_link); 882c50d8ae3SPaolo Bonzini } 883c50d8ae3SPaolo Bonzini 884c50d8ae3SPaolo Bonzini static struct kvm_memory_slot * 885c50d8ae3SPaolo Bonzini gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, 886c50d8ae3SPaolo Bonzini bool no_dirty_log) 887c50d8ae3SPaolo Bonzini { 888c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 889c50d8ae3SPaolo Bonzini 890c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 89191b0d268SPaolo Bonzini if (!slot || slot->flags & KVM_MEMSLOT_INVALID) 89291b0d268SPaolo Bonzini return NULL; 893044c59c4SPeter Xu if (no_dirty_log && kvm_slot_dirty_track_enabled(slot)) 89491b0d268SPaolo Bonzini return NULL; 895c50d8ae3SPaolo Bonzini 896c50d8ae3SPaolo Bonzini return slot; 897c50d8ae3SPaolo Bonzini } 898c50d8ae3SPaolo Bonzini 899c50d8ae3SPaolo Bonzini /* 900c50d8ae3SPaolo Bonzini * About rmap_head encoding: 901c50d8ae3SPaolo Bonzini * 902c50d8ae3SPaolo Bonzini * If the bit zero of rmap_head->val is clear, then it points to the only spte 903c50d8ae3SPaolo Bonzini * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct 904c50d8ae3SPaolo Bonzini * pte_list_desc containing more mappings. 905c50d8ae3SPaolo Bonzini */ 906c50d8ae3SPaolo Bonzini 907c50d8ae3SPaolo Bonzini /* 908c50d8ae3SPaolo Bonzini * Returns the number of pointers in the rmap chain, not counting the new one. 909c50d8ae3SPaolo Bonzini */ 910c50d8ae3SPaolo Bonzini static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, 911c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head) 912c50d8ae3SPaolo Bonzini { 913c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 914*13236e25SPeter Xu int count = 0; 915c50d8ae3SPaolo Bonzini 916c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 917805a0f83SStephen Zhang rmap_printk("%p %llx 0->1\n", spte, *spte); 918c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)spte; 919c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 920805a0f83SStephen Zhang rmap_printk("%p %llx 1->many\n", spte, *spte); 921c50d8ae3SPaolo Bonzini desc = mmu_alloc_pte_list_desc(vcpu); 922c50d8ae3SPaolo Bonzini desc->sptes[0] = (u64 *)rmap_head->val; 923c50d8ae3SPaolo Bonzini desc->sptes[1] = spte; 924*13236e25SPeter Xu desc->spte_count = 2; 925c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc | 1; 926c50d8ae3SPaolo Bonzini ++count; 927c50d8ae3SPaolo Bonzini } else { 928805a0f83SStephen Zhang rmap_printk("%p %llx many->many\n", spte, *spte); 929c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 930*13236e25SPeter Xu while (desc->spte_count == PTE_LIST_EXT) { 931c50d8ae3SPaolo Bonzini count += PTE_LIST_EXT; 932c6c4f961SLi RongQing if (!desc->more) { 933c50d8ae3SPaolo Bonzini desc->more = mmu_alloc_pte_list_desc(vcpu); 934c50d8ae3SPaolo Bonzini desc = desc->more; 935*13236e25SPeter Xu desc->spte_count = 0; 936c6c4f961SLi RongQing break; 937c6c4f961SLi RongQing } 938c6c4f961SLi RongQing desc = desc->more; 939c50d8ae3SPaolo Bonzini } 940*13236e25SPeter Xu count += desc->spte_count; 941*13236e25SPeter Xu desc->sptes[desc->spte_count++] = spte; 942c50d8ae3SPaolo Bonzini } 943c50d8ae3SPaolo Bonzini return count; 944c50d8ae3SPaolo Bonzini } 945c50d8ae3SPaolo Bonzini 946c50d8ae3SPaolo Bonzini static void 947c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, 948c50d8ae3SPaolo Bonzini struct pte_list_desc *desc, int i, 949c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc) 950c50d8ae3SPaolo Bonzini { 951*13236e25SPeter Xu int j = desc->spte_count - 1; 952c50d8ae3SPaolo Bonzini 953c50d8ae3SPaolo Bonzini desc->sptes[i] = desc->sptes[j]; 954c50d8ae3SPaolo Bonzini desc->sptes[j] = NULL; 955*13236e25SPeter Xu desc->spte_count--; 956*13236e25SPeter Xu if (desc->spte_count) 957c50d8ae3SPaolo Bonzini return; 958c50d8ae3SPaolo Bonzini if (!prev_desc && !desc->more) 959fe3c2b4cSMiaohe Lin rmap_head->val = 0; 960c50d8ae3SPaolo Bonzini else 961c50d8ae3SPaolo Bonzini if (prev_desc) 962c50d8ae3SPaolo Bonzini prev_desc->more = desc->more; 963c50d8ae3SPaolo Bonzini else 964c50d8ae3SPaolo Bonzini rmap_head->val = (unsigned long)desc->more | 1; 965c50d8ae3SPaolo Bonzini mmu_free_pte_list_desc(desc); 966c50d8ae3SPaolo Bonzini } 967c50d8ae3SPaolo Bonzini 968c50d8ae3SPaolo Bonzini static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) 969c50d8ae3SPaolo Bonzini { 970c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; 971c50d8ae3SPaolo Bonzini struct pte_list_desc *prev_desc; 972c50d8ae3SPaolo Bonzini int i; 973c50d8ae3SPaolo Bonzini 974c50d8ae3SPaolo Bonzini if (!rmap_head->val) { 975c50d8ae3SPaolo Bonzini pr_err("%s: %p 0->BUG\n", __func__, spte); 976c50d8ae3SPaolo Bonzini BUG(); 977c50d8ae3SPaolo Bonzini } else if (!(rmap_head->val & 1)) { 978805a0f83SStephen Zhang rmap_printk("%p 1->0\n", spte); 979c50d8ae3SPaolo Bonzini if ((u64 *)rmap_head->val != spte) { 980c50d8ae3SPaolo Bonzini pr_err("%s: %p 1->BUG\n", __func__, spte); 981c50d8ae3SPaolo Bonzini BUG(); 982c50d8ae3SPaolo Bonzini } 983c50d8ae3SPaolo Bonzini rmap_head->val = 0; 984c50d8ae3SPaolo Bonzini } else { 985805a0f83SStephen Zhang rmap_printk("%p many->many\n", spte); 986c50d8ae3SPaolo Bonzini desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 987c50d8ae3SPaolo Bonzini prev_desc = NULL; 988c50d8ae3SPaolo Bonzini while (desc) { 989*13236e25SPeter Xu for (i = 0; i < desc->spte_count; ++i) { 990c50d8ae3SPaolo Bonzini if (desc->sptes[i] == spte) { 991c50d8ae3SPaolo Bonzini pte_list_desc_remove_entry(rmap_head, 992c50d8ae3SPaolo Bonzini desc, i, prev_desc); 993c50d8ae3SPaolo Bonzini return; 994c50d8ae3SPaolo Bonzini } 995c50d8ae3SPaolo Bonzini } 996c50d8ae3SPaolo Bonzini prev_desc = desc; 997c50d8ae3SPaolo Bonzini desc = desc->more; 998c50d8ae3SPaolo Bonzini } 999c50d8ae3SPaolo Bonzini pr_err("%s: %p many->many\n", __func__, spte); 1000c50d8ae3SPaolo Bonzini BUG(); 1001c50d8ae3SPaolo Bonzini } 1002c50d8ae3SPaolo Bonzini } 1003c50d8ae3SPaolo Bonzini 1004c50d8ae3SPaolo Bonzini static void pte_list_remove(struct kvm_rmap_head *rmap_head, u64 *sptep) 1005c50d8ae3SPaolo Bonzini { 1006c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1007c50d8ae3SPaolo Bonzini __pte_list_remove(sptep, rmap_head); 1008c50d8ae3SPaolo Bonzini } 1009c50d8ae3SPaolo Bonzini 1010c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, 1011269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1012c50d8ae3SPaolo Bonzini { 1013c50d8ae3SPaolo Bonzini unsigned long idx; 1014c50d8ae3SPaolo Bonzini 1015c50d8ae3SPaolo Bonzini idx = gfn_to_index(gfn, slot->base_gfn, level); 10163bae0459SSean Christopherson return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; 1017c50d8ae3SPaolo Bonzini } 1018c50d8ae3SPaolo Bonzini 1019c50d8ae3SPaolo Bonzini static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, 1020c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1021c50d8ae3SPaolo Bonzini { 1022c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 1023c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1024c50d8ae3SPaolo Bonzini 1025c50d8ae3SPaolo Bonzini slots = kvm_memslots_for_spte_role(kvm, sp->role); 1026c50d8ae3SPaolo Bonzini slot = __gfn_to_memslot(slots, gfn); 1027c50d8ae3SPaolo Bonzini return __gfn_to_rmap(gfn, sp->role.level, slot); 1028c50d8ae3SPaolo Bonzini } 1029c50d8ae3SPaolo Bonzini 1030c50d8ae3SPaolo Bonzini static bool rmap_can_add(struct kvm_vcpu *vcpu) 1031c50d8ae3SPaolo Bonzini { 1032356ec69aSSean Christopherson struct kvm_mmu_memory_cache *mc; 1033c50d8ae3SPaolo Bonzini 1034356ec69aSSean Christopherson mc = &vcpu->arch.mmu_pte_list_desc_cache; 103594ce87efSSean Christopherson return kvm_mmu_memory_cache_nr_free_objects(mc); 1036c50d8ae3SPaolo Bonzini } 1037c50d8ae3SPaolo Bonzini 1038c50d8ae3SPaolo Bonzini static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1039c50d8ae3SPaolo Bonzini { 1040c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1041c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1042c50d8ae3SPaolo Bonzini 104357354682SSean Christopherson sp = sptep_to_sp(spte); 1044c50d8ae3SPaolo Bonzini kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); 1045c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1046c50d8ae3SPaolo Bonzini return pte_list_add(vcpu, spte, rmap_head); 1047c50d8ae3SPaolo Bonzini } 1048c50d8ae3SPaolo Bonzini 1049c50d8ae3SPaolo Bonzini static void rmap_remove(struct kvm *kvm, u64 *spte) 1050c50d8ae3SPaolo Bonzini { 1051c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1052c50d8ae3SPaolo Bonzini gfn_t gfn; 1053c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1054c50d8ae3SPaolo Bonzini 105557354682SSean Christopherson sp = sptep_to_sp(spte); 1056c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); 1057c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(kvm, gfn, sp); 1058c50d8ae3SPaolo Bonzini __pte_list_remove(spte, rmap_head); 1059c50d8ae3SPaolo Bonzini } 1060c50d8ae3SPaolo Bonzini 1061c50d8ae3SPaolo Bonzini /* 1062c50d8ae3SPaolo Bonzini * Used by the following functions to iterate through the sptes linked by a 1063c50d8ae3SPaolo Bonzini * rmap. All fields are private and not assumed to be used outside. 1064c50d8ae3SPaolo Bonzini */ 1065c50d8ae3SPaolo Bonzini struct rmap_iterator { 1066c50d8ae3SPaolo Bonzini /* private fields */ 1067c50d8ae3SPaolo Bonzini struct pte_list_desc *desc; /* holds the sptep if not NULL */ 1068c50d8ae3SPaolo Bonzini int pos; /* index of the sptep */ 1069c50d8ae3SPaolo Bonzini }; 1070c50d8ae3SPaolo Bonzini 1071c50d8ae3SPaolo Bonzini /* 1072c50d8ae3SPaolo Bonzini * Iteration must be started by this function. This should also be used after 1073c50d8ae3SPaolo Bonzini * removing/dropping sptes from the rmap link because in such cases the 10740a03cbdaSMiaohe Lin * information in the iterator may not be valid. 1075c50d8ae3SPaolo Bonzini * 1076c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1077c50d8ae3SPaolo Bonzini */ 1078c50d8ae3SPaolo Bonzini static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, 1079c50d8ae3SPaolo Bonzini struct rmap_iterator *iter) 1080c50d8ae3SPaolo Bonzini { 1081c50d8ae3SPaolo Bonzini u64 *sptep; 1082c50d8ae3SPaolo Bonzini 1083c50d8ae3SPaolo Bonzini if (!rmap_head->val) 1084c50d8ae3SPaolo Bonzini return NULL; 1085c50d8ae3SPaolo Bonzini 1086c50d8ae3SPaolo Bonzini if (!(rmap_head->val & 1)) { 1087c50d8ae3SPaolo Bonzini iter->desc = NULL; 1088c50d8ae3SPaolo Bonzini sptep = (u64 *)rmap_head->val; 1089c50d8ae3SPaolo Bonzini goto out; 1090c50d8ae3SPaolo Bonzini } 1091c50d8ae3SPaolo Bonzini 1092c50d8ae3SPaolo Bonzini iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); 1093c50d8ae3SPaolo Bonzini iter->pos = 0; 1094c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1095c50d8ae3SPaolo Bonzini out: 1096c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1097c50d8ae3SPaolo Bonzini return sptep; 1098c50d8ae3SPaolo Bonzini } 1099c50d8ae3SPaolo Bonzini 1100c50d8ae3SPaolo Bonzini /* 1101c50d8ae3SPaolo Bonzini * Must be used with a valid iterator: e.g. after rmap_get_first(). 1102c50d8ae3SPaolo Bonzini * 1103c50d8ae3SPaolo Bonzini * Returns sptep if found, NULL otherwise. 1104c50d8ae3SPaolo Bonzini */ 1105c50d8ae3SPaolo Bonzini static u64 *rmap_get_next(struct rmap_iterator *iter) 1106c50d8ae3SPaolo Bonzini { 1107c50d8ae3SPaolo Bonzini u64 *sptep; 1108c50d8ae3SPaolo Bonzini 1109c50d8ae3SPaolo Bonzini if (iter->desc) { 1110c50d8ae3SPaolo Bonzini if (iter->pos < PTE_LIST_EXT - 1) { 1111c50d8ae3SPaolo Bonzini ++iter->pos; 1112c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1113c50d8ae3SPaolo Bonzini if (sptep) 1114c50d8ae3SPaolo Bonzini goto out; 1115c50d8ae3SPaolo Bonzini } 1116c50d8ae3SPaolo Bonzini 1117c50d8ae3SPaolo Bonzini iter->desc = iter->desc->more; 1118c50d8ae3SPaolo Bonzini 1119c50d8ae3SPaolo Bonzini if (iter->desc) { 1120c50d8ae3SPaolo Bonzini iter->pos = 0; 1121c50d8ae3SPaolo Bonzini /* desc->sptes[0] cannot be NULL */ 1122c50d8ae3SPaolo Bonzini sptep = iter->desc->sptes[iter->pos]; 1123c50d8ae3SPaolo Bonzini goto out; 1124c50d8ae3SPaolo Bonzini } 1125c50d8ae3SPaolo Bonzini } 1126c50d8ae3SPaolo Bonzini 1127c50d8ae3SPaolo Bonzini return NULL; 1128c50d8ae3SPaolo Bonzini out: 1129c50d8ae3SPaolo Bonzini BUG_ON(!is_shadow_present_pte(*sptep)); 1130c50d8ae3SPaolo Bonzini return sptep; 1131c50d8ae3SPaolo Bonzini } 1132c50d8ae3SPaolo Bonzini 1133c50d8ae3SPaolo Bonzini #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ 1134c50d8ae3SPaolo Bonzini for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ 1135c50d8ae3SPaolo Bonzini _spte_; _spte_ = rmap_get_next(_iter_)) 1136c50d8ae3SPaolo Bonzini 1137c50d8ae3SPaolo Bonzini static void drop_spte(struct kvm *kvm, u64 *sptep) 1138c50d8ae3SPaolo Bonzini { 11397fa2a347SSean Christopherson u64 old_spte = mmu_spte_clear_track_bits(sptep); 11407fa2a347SSean Christopherson 11417fa2a347SSean Christopherson if (is_shadow_present_pte(old_spte)) 1142c50d8ae3SPaolo Bonzini rmap_remove(kvm, sptep); 1143c50d8ae3SPaolo Bonzini } 1144c50d8ae3SPaolo Bonzini 1145c50d8ae3SPaolo Bonzini 1146c50d8ae3SPaolo Bonzini static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) 1147c50d8ae3SPaolo Bonzini { 1148c50d8ae3SPaolo Bonzini if (is_large_pte(*sptep)) { 114957354682SSean Christopherson WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K); 1150c50d8ae3SPaolo Bonzini drop_spte(kvm, sptep); 1151c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 1152c50d8ae3SPaolo Bonzini return true; 1153c50d8ae3SPaolo Bonzini } 1154c50d8ae3SPaolo Bonzini 1155c50d8ae3SPaolo Bonzini return false; 1156c50d8ae3SPaolo Bonzini } 1157c50d8ae3SPaolo Bonzini 1158c50d8ae3SPaolo Bonzini static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) 1159c50d8ae3SPaolo Bonzini { 1160c50d8ae3SPaolo Bonzini if (__drop_large_spte(vcpu->kvm, sptep)) { 116157354682SSean Christopherson struct kvm_mmu_page *sp = sptep_to_sp(sptep); 1162c50d8ae3SPaolo Bonzini 1163c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1164c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1165c50d8ae3SPaolo Bonzini } 1166c50d8ae3SPaolo Bonzini } 1167c50d8ae3SPaolo Bonzini 1168c50d8ae3SPaolo Bonzini /* 1169c50d8ae3SPaolo Bonzini * Write-protect on the specified @sptep, @pt_protect indicates whether 1170c50d8ae3SPaolo Bonzini * spte write-protection is caused by protecting shadow page table. 1171c50d8ae3SPaolo Bonzini * 1172c50d8ae3SPaolo Bonzini * Note: write protection is difference between dirty logging and spte 1173c50d8ae3SPaolo Bonzini * protection: 1174c50d8ae3SPaolo Bonzini * - for dirty logging, the spte can be set to writable at anytime if 1175c50d8ae3SPaolo Bonzini * its dirty bitmap is properly set. 1176c50d8ae3SPaolo Bonzini * - for spte protection, the spte can be writable only after unsync-ing 1177c50d8ae3SPaolo Bonzini * shadow page. 1178c50d8ae3SPaolo Bonzini * 1179c50d8ae3SPaolo Bonzini * Return true if tlb need be flushed. 1180c50d8ae3SPaolo Bonzini */ 1181c50d8ae3SPaolo Bonzini static bool spte_write_protect(u64 *sptep, bool pt_protect) 1182c50d8ae3SPaolo Bonzini { 1183c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1184c50d8ae3SPaolo Bonzini 1185c50d8ae3SPaolo Bonzini if (!is_writable_pte(spte) && 1186c50d8ae3SPaolo Bonzini !(pt_protect && spte_can_locklessly_be_made_writable(spte))) 1187c50d8ae3SPaolo Bonzini return false; 1188c50d8ae3SPaolo Bonzini 1189805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1190c50d8ae3SPaolo Bonzini 1191c50d8ae3SPaolo Bonzini if (pt_protect) 11925fc3424fSSean Christopherson spte &= ~shadow_mmu_writable_mask; 1193c50d8ae3SPaolo Bonzini spte = spte & ~PT_WRITABLE_MASK; 1194c50d8ae3SPaolo Bonzini 1195c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1196c50d8ae3SPaolo Bonzini } 1197c50d8ae3SPaolo Bonzini 1198c50d8ae3SPaolo Bonzini static bool __rmap_write_protect(struct kvm *kvm, 1199c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head, 1200c50d8ae3SPaolo Bonzini bool pt_protect) 1201c50d8ae3SPaolo Bonzini { 1202c50d8ae3SPaolo Bonzini u64 *sptep; 1203c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1204c50d8ae3SPaolo Bonzini bool flush = false; 1205c50d8ae3SPaolo Bonzini 1206c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1207c50d8ae3SPaolo Bonzini flush |= spte_write_protect(sptep, pt_protect); 1208c50d8ae3SPaolo Bonzini 1209c50d8ae3SPaolo Bonzini return flush; 1210c50d8ae3SPaolo Bonzini } 1211c50d8ae3SPaolo Bonzini 1212c50d8ae3SPaolo Bonzini static bool spte_clear_dirty(u64 *sptep) 1213c50d8ae3SPaolo Bonzini { 1214c50d8ae3SPaolo Bonzini u64 spte = *sptep; 1215c50d8ae3SPaolo Bonzini 1216805a0f83SStephen Zhang rmap_printk("spte %p %llx\n", sptep, *sptep); 1217c50d8ae3SPaolo Bonzini 1218c50d8ae3SPaolo Bonzini MMU_WARN_ON(!spte_ad_enabled(spte)); 1219c50d8ae3SPaolo Bonzini spte &= ~shadow_dirty_mask; 1220c50d8ae3SPaolo Bonzini return mmu_spte_update(sptep, spte); 1221c50d8ae3SPaolo Bonzini } 1222c50d8ae3SPaolo Bonzini 1223c50d8ae3SPaolo Bonzini static bool spte_wrprot_for_clear_dirty(u64 *sptep) 1224c50d8ae3SPaolo Bonzini { 1225c50d8ae3SPaolo Bonzini bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, 1226c50d8ae3SPaolo Bonzini (unsigned long *)sptep); 1227c50d8ae3SPaolo Bonzini if (was_writable && !spte_ad_enabled(*sptep)) 1228c50d8ae3SPaolo Bonzini kvm_set_pfn_dirty(spte_to_pfn(*sptep)); 1229c50d8ae3SPaolo Bonzini 1230c50d8ae3SPaolo Bonzini return was_writable; 1231c50d8ae3SPaolo Bonzini } 1232c50d8ae3SPaolo Bonzini 1233c50d8ae3SPaolo Bonzini /* 1234c50d8ae3SPaolo Bonzini * Gets the GFN ready for another round of dirty logging by clearing the 1235c50d8ae3SPaolo Bonzini * - D bit on ad-enabled SPTEs, and 1236c50d8ae3SPaolo Bonzini * - W bit on ad-disabled SPTEs. 1237c50d8ae3SPaolo Bonzini * Returns true iff any D or W bits were cleared. 1238c50d8ae3SPaolo Bonzini */ 12390a234f5dSSean Christopherson static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1240269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1241c50d8ae3SPaolo Bonzini { 1242c50d8ae3SPaolo Bonzini u64 *sptep; 1243c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1244c50d8ae3SPaolo Bonzini bool flush = false; 1245c50d8ae3SPaolo Bonzini 1246c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1247c50d8ae3SPaolo Bonzini if (spte_ad_need_write_protect(*sptep)) 1248c50d8ae3SPaolo Bonzini flush |= spte_wrprot_for_clear_dirty(sptep); 1249c50d8ae3SPaolo Bonzini else 1250c50d8ae3SPaolo Bonzini flush |= spte_clear_dirty(sptep); 1251c50d8ae3SPaolo Bonzini 1252c50d8ae3SPaolo Bonzini return flush; 1253c50d8ae3SPaolo Bonzini } 1254c50d8ae3SPaolo Bonzini 1255c50d8ae3SPaolo Bonzini /** 1256c50d8ae3SPaolo Bonzini * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages 1257c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1258c50d8ae3SPaolo Bonzini * @slot: slot to protect 1259c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1260c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should protect 1261c50d8ae3SPaolo Bonzini * 126289212919SKeqian Zhu * Used when we do not need to care about huge page mappings. 1263c50d8ae3SPaolo Bonzini */ 1264c50d8ae3SPaolo Bonzini static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 1265c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1266c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1267c50d8ae3SPaolo Bonzini { 1268c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1269c50d8ae3SPaolo Bonzini 1270897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1271a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1272a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, true); 1273e2209710SBen Gardon 1274e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1275e2209710SBen Gardon return; 1276e2209710SBen Gardon 1277c50d8ae3SPaolo Bonzini while (mask) { 1278c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 12793bae0459SSean Christopherson PG_LEVEL_4K, slot); 1280c50d8ae3SPaolo Bonzini __rmap_write_protect(kvm, rmap_head, false); 1281c50d8ae3SPaolo Bonzini 1282c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1283c50d8ae3SPaolo Bonzini mask &= mask - 1; 1284c50d8ae3SPaolo Bonzini } 1285c50d8ae3SPaolo Bonzini } 1286c50d8ae3SPaolo Bonzini 1287c50d8ae3SPaolo Bonzini /** 1288c50d8ae3SPaolo Bonzini * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write 1289c50d8ae3SPaolo Bonzini * protect the page if the D-bit isn't supported. 1290c50d8ae3SPaolo Bonzini * @kvm: kvm instance 1291c50d8ae3SPaolo Bonzini * @slot: slot to clear D-bit 1292c50d8ae3SPaolo Bonzini * @gfn_offset: start of the BITS_PER_LONG pages we care about 1293c50d8ae3SPaolo Bonzini * @mask: indicates which pages we should clear D-bit 1294c50d8ae3SPaolo Bonzini * 1295c50d8ae3SPaolo Bonzini * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. 1296c50d8ae3SPaolo Bonzini */ 1297a018eba5SSean Christopherson static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1298c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1299c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1300c50d8ae3SPaolo Bonzini { 1301c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1302c50d8ae3SPaolo Bonzini 1303897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 1304a6a0b05dSBen Gardon kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot, 1305a6a0b05dSBen Gardon slot->base_gfn + gfn_offset, mask, false); 1306e2209710SBen Gardon 1307e2209710SBen Gardon if (!kvm_memslots_have_rmaps(kvm)) 1308e2209710SBen Gardon return; 1309e2209710SBen Gardon 1310c50d8ae3SPaolo Bonzini while (mask) { 1311c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), 13123bae0459SSean Christopherson PG_LEVEL_4K, slot); 13130a234f5dSSean Christopherson __rmap_clear_dirty(kvm, rmap_head, slot); 1314c50d8ae3SPaolo Bonzini 1315c50d8ae3SPaolo Bonzini /* clear the first set bit */ 1316c50d8ae3SPaolo Bonzini mask &= mask - 1; 1317c50d8ae3SPaolo Bonzini } 1318c50d8ae3SPaolo Bonzini } 1319c50d8ae3SPaolo Bonzini 1320c50d8ae3SPaolo Bonzini /** 1321c50d8ae3SPaolo Bonzini * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected 1322c50d8ae3SPaolo Bonzini * PT level pages. 1323c50d8ae3SPaolo Bonzini * 1324c50d8ae3SPaolo Bonzini * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to 1325c50d8ae3SPaolo Bonzini * enable dirty logging for them. 1326c50d8ae3SPaolo Bonzini * 132789212919SKeqian Zhu * We need to care about huge page mappings: e.g. during dirty logging we may 132889212919SKeqian Zhu * have such mappings. 1329c50d8ae3SPaolo Bonzini */ 1330c50d8ae3SPaolo Bonzini void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, 1331c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 1332c50d8ae3SPaolo Bonzini gfn_t gfn_offset, unsigned long mask) 1333c50d8ae3SPaolo Bonzini { 133489212919SKeqian Zhu /* 133589212919SKeqian Zhu * Huge pages are NOT write protected when we start dirty logging in 133689212919SKeqian Zhu * initially-all-set mode; must write protect them here so that they 133789212919SKeqian Zhu * are split to 4K on the first write. 133889212919SKeqian Zhu * 133989212919SKeqian Zhu * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn 134089212919SKeqian Zhu * of memslot has no such restriction, so the range can cross two large 134189212919SKeqian Zhu * pages. 134289212919SKeqian Zhu */ 134389212919SKeqian Zhu if (kvm_dirty_log_manual_protect_and_init_set(kvm)) { 134489212919SKeqian Zhu gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); 134589212919SKeqian Zhu gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); 134689212919SKeqian Zhu 134789212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M); 134889212919SKeqian Zhu 134989212919SKeqian Zhu /* Cross two large pages? */ 135089212919SKeqian Zhu if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) != 135189212919SKeqian Zhu ALIGN(end << PAGE_SHIFT, PMD_SIZE)) 135289212919SKeqian Zhu kvm_mmu_slot_gfn_write_protect(kvm, slot, end, 135389212919SKeqian Zhu PG_LEVEL_2M); 135489212919SKeqian Zhu } 135589212919SKeqian Zhu 135689212919SKeqian Zhu /* Now handle 4K PTEs. */ 1357a018eba5SSean Christopherson if (kvm_x86_ops.cpu_dirty_log_size) 1358a018eba5SSean Christopherson kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask); 1359c50d8ae3SPaolo Bonzini else 1360c50d8ae3SPaolo Bonzini kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); 1361c50d8ae3SPaolo Bonzini } 1362c50d8ae3SPaolo Bonzini 1363fb04a1edSPeter Xu int kvm_cpu_dirty_log_size(void) 1364fb04a1edSPeter Xu { 13656dd03800SSean Christopherson return kvm_x86_ops.cpu_dirty_log_size; 1366fb04a1edSPeter Xu } 1367fb04a1edSPeter Xu 1368c50d8ae3SPaolo Bonzini bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, 13693ad93562SKeqian Zhu struct kvm_memory_slot *slot, u64 gfn, 13703ad93562SKeqian Zhu int min_level) 1371c50d8ae3SPaolo Bonzini { 1372c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1373c50d8ae3SPaolo Bonzini int i; 1374c50d8ae3SPaolo Bonzini bool write_protected = false; 1375c50d8ae3SPaolo Bonzini 1376e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 13773ad93562SKeqian Zhu for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) { 1378c50d8ae3SPaolo Bonzini rmap_head = __gfn_to_rmap(gfn, i, slot); 1379c50d8ae3SPaolo Bonzini write_protected |= __rmap_write_protect(kvm, rmap_head, true); 1380c50d8ae3SPaolo Bonzini } 1381e2209710SBen Gardon } 1382c50d8ae3SPaolo Bonzini 1383897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 138446044f72SBen Gardon write_protected |= 13853ad93562SKeqian Zhu kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level); 138646044f72SBen Gardon 1387c50d8ae3SPaolo Bonzini return write_protected; 1388c50d8ae3SPaolo Bonzini } 1389c50d8ae3SPaolo Bonzini 1390c50d8ae3SPaolo Bonzini static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 1391c50d8ae3SPaolo Bonzini { 1392c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 1393c50d8ae3SPaolo Bonzini 1394c50d8ae3SPaolo Bonzini slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 13953ad93562SKeqian Zhu return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); 1396c50d8ae3SPaolo Bonzini } 1397c50d8ae3SPaolo Bonzini 13980a234f5dSSean Christopherson static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1399269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 1400c50d8ae3SPaolo Bonzini { 1401c50d8ae3SPaolo Bonzini u64 *sptep; 1402c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1403c50d8ae3SPaolo Bonzini bool flush = false; 1404c50d8ae3SPaolo Bonzini 1405c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(rmap_head, &iter))) { 1406805a0f83SStephen Zhang rmap_printk("spte %p %llx.\n", sptep, *sptep); 1407c50d8ae3SPaolo Bonzini 1408c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1409c50d8ae3SPaolo Bonzini flush = true; 1410c50d8ae3SPaolo Bonzini } 1411c50d8ae3SPaolo Bonzini 1412c50d8ae3SPaolo Bonzini return flush; 1413c50d8ae3SPaolo Bonzini } 1414c50d8ae3SPaolo Bonzini 14153039bcc7SSean Christopherson static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1416c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14173039bcc7SSean Christopherson pte_t unused) 1418c50d8ae3SPaolo Bonzini { 14190a234f5dSSean Christopherson return kvm_zap_rmapp(kvm, rmap_head, slot); 1420c50d8ae3SPaolo Bonzini } 1421c50d8ae3SPaolo Bonzini 14223039bcc7SSean Christopherson static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1423c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 14243039bcc7SSean Christopherson pte_t pte) 1425c50d8ae3SPaolo Bonzini { 1426c50d8ae3SPaolo Bonzini u64 *sptep; 1427c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1428c50d8ae3SPaolo Bonzini int need_flush = 0; 1429c50d8ae3SPaolo Bonzini u64 new_spte; 1430c50d8ae3SPaolo Bonzini kvm_pfn_t new_pfn; 1431c50d8ae3SPaolo Bonzini 14323039bcc7SSean Christopherson WARN_ON(pte_huge(pte)); 14333039bcc7SSean Christopherson new_pfn = pte_pfn(pte); 1434c50d8ae3SPaolo Bonzini 1435c50d8ae3SPaolo Bonzini restart: 1436c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 1437805a0f83SStephen Zhang rmap_printk("spte %p %llx gfn %llx (%d)\n", 1438c50d8ae3SPaolo Bonzini sptep, *sptep, gfn, level); 1439c50d8ae3SPaolo Bonzini 1440c50d8ae3SPaolo Bonzini need_flush = 1; 1441c50d8ae3SPaolo Bonzini 14423039bcc7SSean Christopherson if (pte_write(pte)) { 1443c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 1444c50d8ae3SPaolo Bonzini goto restart; 1445c50d8ae3SPaolo Bonzini } else { 1446cb3eedabSPaolo Bonzini new_spte = kvm_mmu_changed_pte_notifier_make_spte( 1447cb3eedabSPaolo Bonzini *sptep, new_pfn); 1448c50d8ae3SPaolo Bonzini 1449c50d8ae3SPaolo Bonzini mmu_spte_clear_track_bits(sptep); 1450c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, new_spte); 1451c50d8ae3SPaolo Bonzini } 1452c50d8ae3SPaolo Bonzini } 1453c50d8ae3SPaolo Bonzini 1454c50d8ae3SPaolo Bonzini if (need_flush && kvm_available_flush_tlb_with_range()) { 1455c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, gfn, 1); 1456c50d8ae3SPaolo Bonzini return 0; 1457c50d8ae3SPaolo Bonzini } 1458c50d8ae3SPaolo Bonzini 1459c50d8ae3SPaolo Bonzini return need_flush; 1460c50d8ae3SPaolo Bonzini } 1461c50d8ae3SPaolo Bonzini 1462c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator { 1463c50d8ae3SPaolo Bonzini /* input fields. */ 1464269e9552SHamza Mahfooz const struct kvm_memory_slot *slot; 1465c50d8ae3SPaolo Bonzini gfn_t start_gfn; 1466c50d8ae3SPaolo Bonzini gfn_t end_gfn; 1467c50d8ae3SPaolo Bonzini int start_level; 1468c50d8ae3SPaolo Bonzini int end_level; 1469c50d8ae3SPaolo Bonzini 1470c50d8ae3SPaolo Bonzini /* output fields. */ 1471c50d8ae3SPaolo Bonzini gfn_t gfn; 1472c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap; 1473c50d8ae3SPaolo Bonzini int level; 1474c50d8ae3SPaolo Bonzini 1475c50d8ae3SPaolo Bonzini /* private field. */ 1476c50d8ae3SPaolo Bonzini struct kvm_rmap_head *end_rmap; 1477c50d8ae3SPaolo Bonzini }; 1478c50d8ae3SPaolo Bonzini 1479c50d8ae3SPaolo Bonzini static void 1480c50d8ae3SPaolo Bonzini rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) 1481c50d8ae3SPaolo Bonzini { 1482c50d8ae3SPaolo Bonzini iterator->level = level; 1483c50d8ae3SPaolo Bonzini iterator->gfn = iterator->start_gfn; 1484c50d8ae3SPaolo Bonzini iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); 1485c50d8ae3SPaolo Bonzini iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, 1486c50d8ae3SPaolo Bonzini iterator->slot); 1487c50d8ae3SPaolo Bonzini } 1488c50d8ae3SPaolo Bonzini 1489c50d8ae3SPaolo Bonzini static void 1490c50d8ae3SPaolo Bonzini slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, 1491269e9552SHamza Mahfooz const struct kvm_memory_slot *slot, int start_level, 1492c50d8ae3SPaolo Bonzini int end_level, gfn_t start_gfn, gfn_t end_gfn) 1493c50d8ae3SPaolo Bonzini { 1494c50d8ae3SPaolo Bonzini iterator->slot = slot; 1495c50d8ae3SPaolo Bonzini iterator->start_level = start_level; 1496c50d8ae3SPaolo Bonzini iterator->end_level = end_level; 1497c50d8ae3SPaolo Bonzini iterator->start_gfn = start_gfn; 1498c50d8ae3SPaolo Bonzini iterator->end_gfn = end_gfn; 1499c50d8ae3SPaolo Bonzini 1500c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->start_level); 1501c50d8ae3SPaolo Bonzini } 1502c50d8ae3SPaolo Bonzini 1503c50d8ae3SPaolo Bonzini static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) 1504c50d8ae3SPaolo Bonzini { 1505c50d8ae3SPaolo Bonzini return !!iterator->rmap; 1506c50d8ae3SPaolo Bonzini } 1507c50d8ae3SPaolo Bonzini 1508c50d8ae3SPaolo Bonzini static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) 1509c50d8ae3SPaolo Bonzini { 1510c50d8ae3SPaolo Bonzini if (++iterator->rmap <= iterator->end_rmap) { 1511c50d8ae3SPaolo Bonzini iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); 1512c50d8ae3SPaolo Bonzini return; 1513c50d8ae3SPaolo Bonzini } 1514c50d8ae3SPaolo Bonzini 1515c50d8ae3SPaolo Bonzini if (++iterator->level > iterator->end_level) { 1516c50d8ae3SPaolo Bonzini iterator->rmap = NULL; 1517c50d8ae3SPaolo Bonzini return; 1518c50d8ae3SPaolo Bonzini } 1519c50d8ae3SPaolo Bonzini 1520c50d8ae3SPaolo Bonzini rmap_walk_init_level(iterator, iterator->level); 1521c50d8ae3SPaolo Bonzini } 1522c50d8ae3SPaolo Bonzini 1523c50d8ae3SPaolo Bonzini #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ 1524c50d8ae3SPaolo Bonzini _start_gfn, _end_gfn, _iter_) \ 1525c50d8ae3SPaolo Bonzini for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ 1526c50d8ae3SPaolo Bonzini _end_level_, _start_gfn, _end_gfn); \ 1527c50d8ae3SPaolo Bonzini slot_rmap_walk_okay(_iter_); \ 1528c50d8ae3SPaolo Bonzini slot_rmap_walk_next(_iter_)) 1529c50d8ae3SPaolo Bonzini 15303039bcc7SSean Christopherson typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1531c1b91493SSean Christopherson struct kvm_memory_slot *slot, gfn_t gfn, 15323039bcc7SSean Christopherson int level, pte_t pte); 1533c1b91493SSean Christopherson 15343039bcc7SSean Christopherson static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm, 15353039bcc7SSean Christopherson struct kvm_gfn_range *range, 1536c1b91493SSean Christopherson rmap_handler_t handler) 1537c50d8ae3SPaolo Bonzini { 1538c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 15393039bcc7SSean Christopherson bool ret = false; 1540c50d8ae3SPaolo Bonzini 15413039bcc7SSean Christopherson for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, 15423039bcc7SSean Christopherson range->start, range->end - 1, &iterator) 15433039bcc7SSean Christopherson ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, 15443039bcc7SSean Christopherson iterator.level, range->pte); 1545c50d8ae3SPaolo Bonzini 1546c50d8ae3SPaolo Bonzini return ret; 1547c50d8ae3SPaolo Bonzini } 1548c50d8ae3SPaolo Bonzini 15493039bcc7SSean Christopherson bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 1550c50d8ae3SPaolo Bonzini { 1551e2209710SBen Gardon bool flush = false; 1552c50d8ae3SPaolo Bonzini 1553e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15543039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp); 1555063afacdSBen Gardon 1556897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15573039bcc7SSean Christopherson flush |= kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush); 1558063afacdSBen Gardon 15593039bcc7SSean Christopherson return flush; 1560c50d8ae3SPaolo Bonzini } 1561c50d8ae3SPaolo Bonzini 15623039bcc7SSean Christopherson bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1563c50d8ae3SPaolo Bonzini { 1564e2209710SBen Gardon bool flush = false; 15651d8dd6b3SBen Gardon 1566e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 15673039bcc7SSean Christopherson flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp); 15681d8dd6b3SBen Gardon 1569897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 15703039bcc7SSean Christopherson flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range); 15711d8dd6b3SBen Gardon 15723039bcc7SSean Christopherson return flush; 1573c50d8ae3SPaolo Bonzini } 1574c50d8ae3SPaolo Bonzini 15753039bcc7SSean Christopherson static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1576c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, int level, 15773039bcc7SSean Christopherson pte_t unused) 1578c50d8ae3SPaolo Bonzini { 1579c50d8ae3SPaolo Bonzini u64 *sptep; 15803f649ab7SKees Cook struct rmap_iterator iter; 1581c50d8ae3SPaolo Bonzini int young = 0; 1582c50d8ae3SPaolo Bonzini 1583c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1584c50d8ae3SPaolo Bonzini young |= mmu_spte_age(sptep); 1585c50d8ae3SPaolo Bonzini 1586c50d8ae3SPaolo Bonzini return young; 1587c50d8ae3SPaolo Bonzini } 1588c50d8ae3SPaolo Bonzini 15893039bcc7SSean Christopherson static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, 1590c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, gfn_t gfn, 15913039bcc7SSean Christopherson int level, pte_t unused) 1592c50d8ae3SPaolo Bonzini { 1593c50d8ae3SPaolo Bonzini u64 *sptep; 1594c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1595c50d8ae3SPaolo Bonzini 1596c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) 1597c50d8ae3SPaolo Bonzini if (is_accessed_spte(*sptep)) 1598c50d8ae3SPaolo Bonzini return 1; 1599c50d8ae3SPaolo Bonzini return 0; 1600c50d8ae3SPaolo Bonzini } 1601c50d8ae3SPaolo Bonzini 1602c50d8ae3SPaolo Bonzini #define RMAP_RECYCLE_THRESHOLD 1000 1603c50d8ae3SPaolo Bonzini 1604c50d8ae3SPaolo Bonzini static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) 1605c50d8ae3SPaolo Bonzini { 1606c50d8ae3SPaolo Bonzini struct kvm_rmap_head *rmap_head; 1607c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1608c50d8ae3SPaolo Bonzini 160957354682SSean Christopherson sp = sptep_to_sp(spte); 1610c50d8ae3SPaolo Bonzini 1611c50d8ae3SPaolo Bonzini rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); 1612c50d8ae3SPaolo Bonzini 16133039bcc7SSean Christopherson kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0)); 1614c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn, 1615c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 1616c50d8ae3SPaolo Bonzini } 1617c50d8ae3SPaolo Bonzini 16183039bcc7SSean Christopherson bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1619c50d8ae3SPaolo Bonzini { 1620e2209710SBen Gardon bool young = false; 1621f8e14497SBen Gardon 1622e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16233039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp); 16243039bcc7SSean Christopherson 1625897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16263039bcc7SSean Christopherson young |= kvm_tdp_mmu_age_gfn_range(kvm, range); 1627f8e14497SBen Gardon 1628f8e14497SBen Gardon return young; 1629c50d8ae3SPaolo Bonzini } 1630c50d8ae3SPaolo Bonzini 16313039bcc7SSean Christopherson bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 1632c50d8ae3SPaolo Bonzini { 1633e2209710SBen Gardon bool young = false; 1634f8e14497SBen Gardon 1635e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) 16363039bcc7SSean Christopherson young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp); 16373039bcc7SSean Christopherson 1638897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 16393039bcc7SSean Christopherson young |= kvm_tdp_mmu_test_age_gfn(kvm, range); 1640f8e14497SBen Gardon 1641f8e14497SBen Gardon return young; 1642c50d8ae3SPaolo Bonzini } 1643c50d8ae3SPaolo Bonzini 1644c50d8ae3SPaolo Bonzini #ifdef MMU_DEBUG 1645c50d8ae3SPaolo Bonzini static int is_empty_shadow_page(u64 *spt) 1646c50d8ae3SPaolo Bonzini { 1647c50d8ae3SPaolo Bonzini u64 *pos; 1648c50d8ae3SPaolo Bonzini u64 *end; 1649c50d8ae3SPaolo Bonzini 1650c50d8ae3SPaolo Bonzini for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) 1651c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*pos)) { 1652c50d8ae3SPaolo Bonzini printk(KERN_ERR "%s: %p %llx\n", __func__, 1653c50d8ae3SPaolo Bonzini pos, *pos); 1654c50d8ae3SPaolo Bonzini return 0; 1655c50d8ae3SPaolo Bonzini } 1656c50d8ae3SPaolo Bonzini return 1; 1657c50d8ae3SPaolo Bonzini } 1658c50d8ae3SPaolo Bonzini #endif 1659c50d8ae3SPaolo Bonzini 1660c50d8ae3SPaolo Bonzini /* 1661c50d8ae3SPaolo Bonzini * This value is the sum of all of the kvm instances's 1662c50d8ae3SPaolo Bonzini * kvm->arch.n_used_mmu_pages values. We need a global, 1663c50d8ae3SPaolo Bonzini * aggregate version in order to make the slab shrinker 1664c50d8ae3SPaolo Bonzini * faster 1665c50d8ae3SPaolo Bonzini */ 1666c50d8ae3SPaolo Bonzini static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, unsigned long nr) 1667c50d8ae3SPaolo Bonzini { 1668c50d8ae3SPaolo Bonzini kvm->arch.n_used_mmu_pages += nr; 1669c50d8ae3SPaolo Bonzini percpu_counter_add(&kvm_total_used_mmu_pages, nr); 1670c50d8ae3SPaolo Bonzini } 1671c50d8ae3SPaolo Bonzini 1672c50d8ae3SPaolo Bonzini static void kvm_mmu_free_page(struct kvm_mmu_page *sp) 1673c50d8ae3SPaolo Bonzini { 1674c50d8ae3SPaolo Bonzini MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); 1675c50d8ae3SPaolo Bonzini hlist_del(&sp->hash_link); 1676c50d8ae3SPaolo Bonzini list_del(&sp->link); 1677c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->spt); 1678c50d8ae3SPaolo Bonzini if (!sp->role.direct) 1679c50d8ae3SPaolo Bonzini free_page((unsigned long)sp->gfns); 1680c50d8ae3SPaolo Bonzini kmem_cache_free(mmu_page_header_cache, sp); 1681c50d8ae3SPaolo Bonzini } 1682c50d8ae3SPaolo Bonzini 1683c50d8ae3SPaolo Bonzini static unsigned kvm_page_table_hashfn(gfn_t gfn) 1684c50d8ae3SPaolo Bonzini { 1685c50d8ae3SPaolo Bonzini return hash_64(gfn, KVM_MMU_HASH_SHIFT); 1686c50d8ae3SPaolo Bonzini } 1687c50d8ae3SPaolo Bonzini 1688c50d8ae3SPaolo Bonzini static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, 1689c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *parent_pte) 1690c50d8ae3SPaolo Bonzini { 1691c50d8ae3SPaolo Bonzini if (!parent_pte) 1692c50d8ae3SPaolo Bonzini return; 1693c50d8ae3SPaolo Bonzini 1694c50d8ae3SPaolo Bonzini pte_list_add(vcpu, parent_pte, &sp->parent_ptes); 1695c50d8ae3SPaolo Bonzini } 1696c50d8ae3SPaolo Bonzini 1697c50d8ae3SPaolo Bonzini static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, 1698c50d8ae3SPaolo Bonzini u64 *parent_pte) 1699c50d8ae3SPaolo Bonzini { 1700c50d8ae3SPaolo Bonzini __pte_list_remove(parent_pte, &sp->parent_ptes); 1701c50d8ae3SPaolo Bonzini } 1702c50d8ae3SPaolo Bonzini 1703c50d8ae3SPaolo Bonzini static void drop_parent_pte(struct kvm_mmu_page *sp, 1704c50d8ae3SPaolo Bonzini u64 *parent_pte) 1705c50d8ae3SPaolo Bonzini { 1706c50d8ae3SPaolo Bonzini mmu_page_remove_parent_pte(sp, parent_pte); 1707c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(parent_pte); 1708c50d8ae3SPaolo Bonzini } 1709c50d8ae3SPaolo Bonzini 1710c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) 1711c50d8ae3SPaolo Bonzini { 1712c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1713c50d8ae3SPaolo Bonzini 171494ce87efSSean Christopherson sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); 171594ce87efSSean Christopherson sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache); 1716c50d8ae3SPaolo Bonzini if (!direct) 171794ce87efSSean Christopherson sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache); 1718c50d8ae3SPaolo Bonzini set_page_private(virt_to_page(sp->spt), (unsigned long)sp); 1719c50d8ae3SPaolo Bonzini 1720c50d8ae3SPaolo Bonzini /* 1721c50d8ae3SPaolo Bonzini * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages() 1722c50d8ae3SPaolo Bonzini * depends on valid pages being added to the head of the list. See 1723c50d8ae3SPaolo Bonzini * comments in kvm_zap_obsolete_pages(). 1724c50d8ae3SPaolo Bonzini */ 1725c50d8ae3SPaolo Bonzini sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; 1726c50d8ae3SPaolo Bonzini list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); 1727c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(vcpu->kvm, +1); 1728c50d8ae3SPaolo Bonzini return sp; 1729c50d8ae3SPaolo Bonzini } 1730c50d8ae3SPaolo Bonzini 1731c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte); 1732c50d8ae3SPaolo Bonzini static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) 1733c50d8ae3SPaolo Bonzini { 1734c50d8ae3SPaolo Bonzini u64 *sptep; 1735c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 1736c50d8ae3SPaolo Bonzini 1737c50d8ae3SPaolo Bonzini for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { 1738c50d8ae3SPaolo Bonzini mark_unsync(sptep); 1739c50d8ae3SPaolo Bonzini } 1740c50d8ae3SPaolo Bonzini } 1741c50d8ae3SPaolo Bonzini 1742c50d8ae3SPaolo Bonzini static void mark_unsync(u64 *spte) 1743c50d8ae3SPaolo Bonzini { 1744c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1745c50d8ae3SPaolo Bonzini unsigned int index; 1746c50d8ae3SPaolo Bonzini 174757354682SSean Christopherson sp = sptep_to_sp(spte); 1748c50d8ae3SPaolo Bonzini index = spte - sp->spt; 1749c50d8ae3SPaolo Bonzini if (__test_and_set_bit(index, sp->unsync_child_bitmap)) 1750c50d8ae3SPaolo Bonzini return; 1751c50d8ae3SPaolo Bonzini if (sp->unsync_children++) 1752c50d8ae3SPaolo Bonzini return; 1753c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 1754c50d8ae3SPaolo Bonzini } 1755c50d8ae3SPaolo Bonzini 1756c50d8ae3SPaolo Bonzini static int nonpaging_sync_page(struct kvm_vcpu *vcpu, 1757c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 1758c50d8ae3SPaolo Bonzini { 1759c50d8ae3SPaolo Bonzini return 0; 1760c50d8ae3SPaolo Bonzini } 1761c50d8ae3SPaolo Bonzini 1762c50d8ae3SPaolo Bonzini #define KVM_PAGE_ARRAY_NR 16 1763c50d8ae3SPaolo Bonzini 1764c50d8ae3SPaolo Bonzini struct kvm_mmu_pages { 1765c50d8ae3SPaolo Bonzini struct mmu_page_and_offset { 1766c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1767c50d8ae3SPaolo Bonzini unsigned int idx; 1768c50d8ae3SPaolo Bonzini } page[KVM_PAGE_ARRAY_NR]; 1769c50d8ae3SPaolo Bonzini unsigned int nr; 1770c50d8ae3SPaolo Bonzini }; 1771c50d8ae3SPaolo Bonzini 1772c50d8ae3SPaolo Bonzini static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, 1773c50d8ae3SPaolo Bonzini int idx) 1774c50d8ae3SPaolo Bonzini { 1775c50d8ae3SPaolo Bonzini int i; 1776c50d8ae3SPaolo Bonzini 1777c50d8ae3SPaolo Bonzini if (sp->unsync) 1778c50d8ae3SPaolo Bonzini for (i=0; i < pvec->nr; i++) 1779c50d8ae3SPaolo Bonzini if (pvec->page[i].sp == sp) 1780c50d8ae3SPaolo Bonzini return 0; 1781c50d8ae3SPaolo Bonzini 1782c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].sp = sp; 1783c50d8ae3SPaolo Bonzini pvec->page[pvec->nr].idx = idx; 1784c50d8ae3SPaolo Bonzini pvec->nr++; 1785c50d8ae3SPaolo Bonzini return (pvec->nr == KVM_PAGE_ARRAY_NR); 1786c50d8ae3SPaolo Bonzini } 1787c50d8ae3SPaolo Bonzini 1788c50d8ae3SPaolo Bonzini static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) 1789c50d8ae3SPaolo Bonzini { 1790c50d8ae3SPaolo Bonzini --sp->unsync_children; 1791c50d8ae3SPaolo Bonzini WARN_ON((int)sp->unsync_children < 0); 1792c50d8ae3SPaolo Bonzini __clear_bit(idx, sp->unsync_child_bitmap); 1793c50d8ae3SPaolo Bonzini } 1794c50d8ae3SPaolo Bonzini 1795c50d8ae3SPaolo Bonzini static int __mmu_unsync_walk(struct kvm_mmu_page *sp, 1796c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1797c50d8ae3SPaolo Bonzini { 1798c50d8ae3SPaolo Bonzini int i, ret, nr_unsync_leaf = 0; 1799c50d8ae3SPaolo Bonzini 1800c50d8ae3SPaolo Bonzini for_each_set_bit(i, sp->unsync_child_bitmap, 512) { 1801c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 1802c50d8ae3SPaolo Bonzini u64 ent = sp->spt[i]; 1803c50d8ae3SPaolo Bonzini 1804c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { 1805c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1806c50d8ae3SPaolo Bonzini continue; 1807c50d8ae3SPaolo Bonzini } 1808c50d8ae3SPaolo Bonzini 1809e47c4aeeSSean Christopherson child = to_shadow_page(ent & PT64_BASE_ADDR_MASK); 1810c50d8ae3SPaolo Bonzini 1811c50d8ae3SPaolo Bonzini if (child->unsync_children) { 1812c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1813c50d8ae3SPaolo Bonzini return -ENOSPC; 1814c50d8ae3SPaolo Bonzini 1815c50d8ae3SPaolo Bonzini ret = __mmu_unsync_walk(child, pvec); 1816c50d8ae3SPaolo Bonzini if (!ret) { 1817c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1818c50d8ae3SPaolo Bonzini continue; 1819c50d8ae3SPaolo Bonzini } else if (ret > 0) { 1820c50d8ae3SPaolo Bonzini nr_unsync_leaf += ret; 1821c50d8ae3SPaolo Bonzini } else 1822c50d8ae3SPaolo Bonzini return ret; 1823c50d8ae3SPaolo Bonzini } else if (child->unsync) { 1824c50d8ae3SPaolo Bonzini nr_unsync_leaf++; 1825c50d8ae3SPaolo Bonzini if (mmu_pages_add(pvec, child, i)) 1826c50d8ae3SPaolo Bonzini return -ENOSPC; 1827c50d8ae3SPaolo Bonzini } else 1828c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, i); 1829c50d8ae3SPaolo Bonzini } 1830c50d8ae3SPaolo Bonzini 1831c50d8ae3SPaolo Bonzini return nr_unsync_leaf; 1832c50d8ae3SPaolo Bonzini } 1833c50d8ae3SPaolo Bonzini 1834c50d8ae3SPaolo Bonzini #define INVALID_INDEX (-1) 1835c50d8ae3SPaolo Bonzini 1836c50d8ae3SPaolo Bonzini static int mmu_unsync_walk(struct kvm_mmu_page *sp, 1837c50d8ae3SPaolo Bonzini struct kvm_mmu_pages *pvec) 1838c50d8ae3SPaolo Bonzini { 1839c50d8ae3SPaolo Bonzini pvec->nr = 0; 1840c50d8ae3SPaolo Bonzini if (!sp->unsync_children) 1841c50d8ae3SPaolo Bonzini return 0; 1842c50d8ae3SPaolo Bonzini 1843c50d8ae3SPaolo Bonzini mmu_pages_add(pvec, sp, INVALID_INDEX); 1844c50d8ae3SPaolo Bonzini return __mmu_unsync_walk(sp, pvec); 1845c50d8ae3SPaolo Bonzini } 1846c50d8ae3SPaolo Bonzini 1847c50d8ae3SPaolo Bonzini static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1848c50d8ae3SPaolo Bonzini { 1849c50d8ae3SPaolo Bonzini WARN_ON(!sp->unsync); 1850c50d8ae3SPaolo Bonzini trace_kvm_mmu_sync_page(sp); 1851c50d8ae3SPaolo Bonzini sp->unsync = 0; 1852c50d8ae3SPaolo Bonzini --kvm->stat.mmu_unsync; 1853c50d8ae3SPaolo Bonzini } 1854c50d8ae3SPaolo Bonzini 1855c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 1856c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1857c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 1858c50d8ae3SPaolo Bonzini struct list_head *invalid_list); 1859c50d8ae3SPaolo Bonzini 1860ac101b7cSSean Christopherson #define for_each_valid_sp(_kvm, _sp, _list) \ 1861ac101b7cSSean Christopherson hlist_for_each_entry(_sp, _list, hash_link) \ 1862c50d8ae3SPaolo Bonzini if (is_obsolete_sp((_kvm), (_sp))) { \ 1863c50d8ae3SPaolo Bonzini } else 1864c50d8ae3SPaolo Bonzini 1865c50d8ae3SPaolo Bonzini #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ 1866ac101b7cSSean Christopherson for_each_valid_sp(_kvm, _sp, \ 1867ac101b7cSSean Christopherson &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \ 1868c50d8ae3SPaolo Bonzini if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else 1869c50d8ae3SPaolo Bonzini 1870479a1efcSSean Christopherson static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 1871c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 1872c50d8ae3SPaolo Bonzini { 18732640b086SSean Christopherson if (vcpu->arch.mmu->sync_page(vcpu, sp) == 0) { 1874c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); 1875c50d8ae3SPaolo Bonzini return false; 1876c50d8ae3SPaolo Bonzini } 1877c50d8ae3SPaolo Bonzini 1878c50d8ae3SPaolo Bonzini return true; 1879c50d8ae3SPaolo Bonzini } 1880c50d8ae3SPaolo Bonzini 1881c50d8ae3SPaolo Bonzini static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm, 1882c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1883c50d8ae3SPaolo Bonzini bool remote_flush) 1884c50d8ae3SPaolo Bonzini { 1885c50d8ae3SPaolo Bonzini if (!remote_flush && list_empty(invalid_list)) 1886c50d8ae3SPaolo Bonzini return false; 1887c50d8ae3SPaolo Bonzini 1888c50d8ae3SPaolo Bonzini if (!list_empty(invalid_list)) 1889c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, invalid_list); 1890c50d8ae3SPaolo Bonzini else 1891c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 1892c50d8ae3SPaolo Bonzini return true; 1893c50d8ae3SPaolo Bonzini } 1894c50d8ae3SPaolo Bonzini 1895c50d8ae3SPaolo Bonzini static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, 1896c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 1897c50d8ae3SPaolo Bonzini bool remote_flush, bool local_flush) 1898c50d8ae3SPaolo Bonzini { 1899c50d8ae3SPaolo Bonzini if (kvm_mmu_remote_flush_or_zap(vcpu->kvm, invalid_list, remote_flush)) 1900c50d8ae3SPaolo Bonzini return; 1901c50d8ae3SPaolo Bonzini 1902c50d8ae3SPaolo Bonzini if (local_flush) 19038c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 1904c50d8ae3SPaolo Bonzini } 1905c50d8ae3SPaolo Bonzini 1906c50d8ae3SPaolo Bonzini #ifdef CONFIG_KVM_MMU_AUDIT 1907c50d8ae3SPaolo Bonzini #include "mmu_audit.c" 1908c50d8ae3SPaolo Bonzini #else 1909c50d8ae3SPaolo Bonzini static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } 1910c50d8ae3SPaolo Bonzini static void mmu_audit_disable(void) { } 1911c50d8ae3SPaolo Bonzini #endif 1912c50d8ae3SPaolo Bonzini 1913c50d8ae3SPaolo Bonzini static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) 1914c50d8ae3SPaolo Bonzini { 1915c50d8ae3SPaolo Bonzini return sp->role.invalid || 1916c50d8ae3SPaolo Bonzini unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); 1917c50d8ae3SPaolo Bonzini } 1918c50d8ae3SPaolo Bonzini 1919c50d8ae3SPaolo Bonzini struct mmu_page_path { 1920c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL]; 1921c50d8ae3SPaolo Bonzini unsigned int idx[PT64_ROOT_MAX_LEVEL]; 1922c50d8ae3SPaolo Bonzini }; 1923c50d8ae3SPaolo Bonzini 1924c50d8ae3SPaolo Bonzini #define for_each_sp(pvec, sp, parents, i) \ 1925c50d8ae3SPaolo Bonzini for (i = mmu_pages_first(&pvec, &parents); \ 1926c50d8ae3SPaolo Bonzini i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ 1927c50d8ae3SPaolo Bonzini i = mmu_pages_next(&pvec, &parents, i)) 1928c50d8ae3SPaolo Bonzini 1929c50d8ae3SPaolo Bonzini static int mmu_pages_next(struct kvm_mmu_pages *pvec, 1930c50d8ae3SPaolo Bonzini struct mmu_page_path *parents, 1931c50d8ae3SPaolo Bonzini int i) 1932c50d8ae3SPaolo Bonzini { 1933c50d8ae3SPaolo Bonzini int n; 1934c50d8ae3SPaolo Bonzini 1935c50d8ae3SPaolo Bonzini for (n = i+1; n < pvec->nr; n++) { 1936c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp = pvec->page[n].sp; 1937c50d8ae3SPaolo Bonzini unsigned idx = pvec->page[n].idx; 1938c50d8ae3SPaolo Bonzini int level = sp->role.level; 1939c50d8ae3SPaolo Bonzini 1940c50d8ae3SPaolo Bonzini parents->idx[level-1] = idx; 19413bae0459SSean Christopherson if (level == PG_LEVEL_4K) 1942c50d8ae3SPaolo Bonzini break; 1943c50d8ae3SPaolo Bonzini 1944c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1945c50d8ae3SPaolo Bonzini } 1946c50d8ae3SPaolo Bonzini 1947c50d8ae3SPaolo Bonzini return n; 1948c50d8ae3SPaolo Bonzini } 1949c50d8ae3SPaolo Bonzini 1950c50d8ae3SPaolo Bonzini static int mmu_pages_first(struct kvm_mmu_pages *pvec, 1951c50d8ae3SPaolo Bonzini struct mmu_page_path *parents) 1952c50d8ae3SPaolo Bonzini { 1953c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1954c50d8ae3SPaolo Bonzini int level; 1955c50d8ae3SPaolo Bonzini 1956c50d8ae3SPaolo Bonzini if (pvec->nr == 0) 1957c50d8ae3SPaolo Bonzini return 0; 1958c50d8ae3SPaolo Bonzini 1959c50d8ae3SPaolo Bonzini WARN_ON(pvec->page[0].idx != INVALID_INDEX); 1960c50d8ae3SPaolo Bonzini 1961c50d8ae3SPaolo Bonzini sp = pvec->page[0].sp; 1962c50d8ae3SPaolo Bonzini level = sp->role.level; 19633bae0459SSean Christopherson WARN_ON(level == PG_LEVEL_4K); 1964c50d8ae3SPaolo Bonzini 1965c50d8ae3SPaolo Bonzini parents->parent[level-2] = sp; 1966c50d8ae3SPaolo Bonzini 1967c50d8ae3SPaolo Bonzini /* Also set up a sentinel. Further entries in pvec are all 1968c50d8ae3SPaolo Bonzini * children of sp, so this element is never overwritten. 1969c50d8ae3SPaolo Bonzini */ 1970c50d8ae3SPaolo Bonzini parents->parent[level-1] = NULL; 1971c50d8ae3SPaolo Bonzini return mmu_pages_next(pvec, parents, 0); 1972c50d8ae3SPaolo Bonzini } 1973c50d8ae3SPaolo Bonzini 1974c50d8ae3SPaolo Bonzini static void mmu_pages_clear_parents(struct mmu_page_path *parents) 1975c50d8ae3SPaolo Bonzini { 1976c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1977c50d8ae3SPaolo Bonzini unsigned int level = 0; 1978c50d8ae3SPaolo Bonzini 1979c50d8ae3SPaolo Bonzini do { 1980c50d8ae3SPaolo Bonzini unsigned int idx = parents->idx[level]; 1981c50d8ae3SPaolo Bonzini sp = parents->parent[level]; 1982c50d8ae3SPaolo Bonzini if (!sp) 1983c50d8ae3SPaolo Bonzini return; 1984c50d8ae3SPaolo Bonzini 1985c50d8ae3SPaolo Bonzini WARN_ON(idx == INVALID_INDEX); 1986c50d8ae3SPaolo Bonzini clear_unsync_child_bit(sp, idx); 1987c50d8ae3SPaolo Bonzini level++; 1988c50d8ae3SPaolo Bonzini } while (!sp->unsync_children); 1989c50d8ae3SPaolo Bonzini } 1990c50d8ae3SPaolo Bonzini 1991c50d8ae3SPaolo Bonzini static void mmu_sync_children(struct kvm_vcpu *vcpu, 1992c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent) 1993c50d8ae3SPaolo Bonzini { 1994c50d8ae3SPaolo Bonzini int i; 1995c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 1996c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 1997c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 1998c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 1999c50d8ae3SPaolo Bonzini bool flush = false; 2000c50d8ae3SPaolo Bonzini 2001c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2002c50d8ae3SPaolo Bonzini bool protected = false; 2003c50d8ae3SPaolo Bonzini 2004c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) 2005c50d8ae3SPaolo Bonzini protected |= rmap_write_protect(vcpu, sp->gfn); 2006c50d8ae3SPaolo Bonzini 2007c50d8ae3SPaolo Bonzini if (protected) { 2008c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(vcpu->kvm); 2009c50d8ae3SPaolo Bonzini flush = false; 2010c50d8ae3SPaolo Bonzini } 2011c50d8ae3SPaolo Bonzini 2012c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2013479a1efcSSean Christopherson kvm_unlink_unsync_page(vcpu->kvm, sp); 2014c50d8ae3SPaolo Bonzini flush |= kvm_sync_page(vcpu, sp, &invalid_list); 2015c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2016c50d8ae3SPaolo Bonzini } 2017531810caSBen Gardon if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { 2018c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2019531810caSBen Gardon cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); 2020c50d8ae3SPaolo Bonzini flush = false; 2021c50d8ae3SPaolo Bonzini } 2022c50d8ae3SPaolo Bonzini } 2023c50d8ae3SPaolo Bonzini 2024c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); 2025c50d8ae3SPaolo Bonzini } 2026c50d8ae3SPaolo Bonzini 2027c50d8ae3SPaolo Bonzini static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) 2028c50d8ae3SPaolo Bonzini { 2029c50d8ae3SPaolo Bonzini atomic_set(&sp->write_flooding_count, 0); 2030c50d8ae3SPaolo Bonzini } 2031c50d8ae3SPaolo Bonzini 2032c50d8ae3SPaolo Bonzini static void clear_sp_write_flooding_count(u64 *spte) 2033c50d8ae3SPaolo Bonzini { 203457354682SSean Christopherson __clear_sp_write_flooding_count(sptep_to_sp(spte)); 2035c50d8ae3SPaolo Bonzini } 2036c50d8ae3SPaolo Bonzini 2037c50d8ae3SPaolo Bonzini static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 2038c50d8ae3SPaolo Bonzini gfn_t gfn, 2039c50d8ae3SPaolo Bonzini gva_t gaddr, 2040c50d8ae3SPaolo Bonzini unsigned level, 2041c50d8ae3SPaolo Bonzini int direct, 20420a2b64c5SBen Gardon unsigned int access) 2043c50d8ae3SPaolo Bonzini { 2044fb58a9c3SSean Christopherson bool direct_mmu = vcpu->arch.mmu->direct_map; 2045c50d8ae3SPaolo Bonzini union kvm_mmu_page_role role; 2046ac101b7cSSean Christopherson struct hlist_head *sp_list; 2047c50d8ae3SPaolo Bonzini unsigned quadrant; 2048c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2049c50d8ae3SPaolo Bonzini int collisions = 0; 2050c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2051c50d8ae3SPaolo Bonzini 2052c50d8ae3SPaolo Bonzini role = vcpu->arch.mmu->mmu_role.base; 2053c50d8ae3SPaolo Bonzini role.level = level; 2054c50d8ae3SPaolo Bonzini role.direct = direct; 2055c50d8ae3SPaolo Bonzini if (role.direct) 2056c50d8ae3SPaolo Bonzini role.gpte_is_8_bytes = true; 2057c50d8ae3SPaolo Bonzini role.access = access; 2058fb58a9c3SSean Christopherson if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) { 2059c50d8ae3SPaolo Bonzini quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); 2060c50d8ae3SPaolo Bonzini quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; 2061c50d8ae3SPaolo Bonzini role.quadrant = quadrant; 2062c50d8ae3SPaolo Bonzini } 2063ac101b7cSSean Christopherson 2064ac101b7cSSean Christopherson sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; 2065ac101b7cSSean Christopherson for_each_valid_sp(vcpu->kvm, sp, sp_list) { 2066c50d8ae3SPaolo Bonzini if (sp->gfn != gfn) { 2067c50d8ae3SPaolo Bonzini collisions++; 2068c50d8ae3SPaolo Bonzini continue; 2069c50d8ae3SPaolo Bonzini } 2070c50d8ae3SPaolo Bonzini 2071ddc16abbSSean Christopherson if (sp->role.word != role.word) { 2072ddc16abbSSean Christopherson /* 2073ddc16abbSSean Christopherson * If the guest is creating an upper-level page, zap 2074ddc16abbSSean Christopherson * unsync pages for the same gfn. While it's possible 2075ddc16abbSSean Christopherson * the guest is using recursive page tables, in all 2076ddc16abbSSean Christopherson * likelihood the guest has stopped using the unsync 2077ddc16abbSSean Christopherson * page and is installing a completely unrelated page. 2078ddc16abbSSean Christopherson * Unsync pages must not be left as is, because the new 2079ddc16abbSSean Christopherson * upper-level page will be write-protected. 2080ddc16abbSSean Christopherson */ 2081ddc16abbSSean Christopherson if (level > PG_LEVEL_4K && sp->unsync) 2082ddc16abbSSean Christopherson kvm_mmu_prepare_zap_page(vcpu->kvm, sp, 2083ddc16abbSSean Christopherson &invalid_list); 2084c50d8ae3SPaolo Bonzini continue; 2085ddc16abbSSean Christopherson } 2086c50d8ae3SPaolo Bonzini 2087fb58a9c3SSean Christopherson if (direct_mmu) 2088fb58a9c3SSean Christopherson goto trace_get_page; 2089fb58a9c3SSean Christopherson 2090c50d8ae3SPaolo Bonzini if (sp->unsync) { 209107dc4f35SSean Christopherson /* 2092479a1efcSSean Christopherson * The page is good, but is stale. kvm_sync_page does 209307dc4f35SSean Christopherson * get the latest guest state, but (unlike mmu_unsync_children) 209407dc4f35SSean Christopherson * it doesn't write-protect the page or mark it synchronized! 209507dc4f35SSean Christopherson * This way the validity of the mapping is ensured, but the 209607dc4f35SSean Christopherson * overhead of write protection is not incurred until the 209707dc4f35SSean Christopherson * guest invalidates the TLB mapping. This allows multiple 209807dc4f35SSean Christopherson * SPs for a single gfn to be unsync. 209907dc4f35SSean Christopherson * 210007dc4f35SSean Christopherson * If the sync fails, the page is zapped. If so, break 210107dc4f35SSean Christopherson * in order to rebuild it. 2102c50d8ae3SPaolo Bonzini */ 2103479a1efcSSean Christopherson if (!kvm_sync_page(vcpu, sp, &invalid_list)) 2104c50d8ae3SPaolo Bonzini break; 2105c50d8ae3SPaolo Bonzini 2106c50d8ae3SPaolo Bonzini WARN_ON(!list_empty(&invalid_list)); 21078c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2108c50d8ae3SPaolo Bonzini } 2109c50d8ae3SPaolo Bonzini 2110c50d8ae3SPaolo Bonzini if (sp->unsync_children) 2111f6f6195bSLai Jiangshan kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 2112c50d8ae3SPaolo Bonzini 2113c50d8ae3SPaolo Bonzini __clear_sp_write_flooding_count(sp); 2114fb58a9c3SSean Christopherson 2115fb58a9c3SSean Christopherson trace_get_page: 2116c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, false); 2117c50d8ae3SPaolo Bonzini goto out; 2118c50d8ae3SPaolo Bonzini } 2119c50d8ae3SPaolo Bonzini 2120c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_cache_miss; 2121c50d8ae3SPaolo Bonzini 2122c50d8ae3SPaolo Bonzini sp = kvm_mmu_alloc_page(vcpu, direct); 2123c50d8ae3SPaolo Bonzini 2124c50d8ae3SPaolo Bonzini sp->gfn = gfn; 2125c50d8ae3SPaolo Bonzini sp->role = role; 2126ac101b7cSSean Christopherson hlist_add_head(&sp->hash_link, sp_list); 2127c50d8ae3SPaolo Bonzini if (!direct) { 2128c50d8ae3SPaolo Bonzini account_shadowed(vcpu->kvm, sp); 21293bae0459SSean Christopherson if (level == PG_LEVEL_4K && rmap_write_protect(vcpu, gfn)) 2130c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1); 2131c50d8ae3SPaolo Bonzini } 2132c50d8ae3SPaolo Bonzini trace_kvm_mmu_get_page(sp, true); 2133c50d8ae3SPaolo Bonzini out: 2134ddc16abbSSean Christopherson kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); 2135ddc16abbSSean Christopherson 2136c50d8ae3SPaolo Bonzini if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions) 2137c50d8ae3SPaolo Bonzini vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions; 2138c50d8ae3SPaolo Bonzini return sp; 2139c50d8ae3SPaolo Bonzini } 2140c50d8ae3SPaolo Bonzini 2141c50d8ae3SPaolo Bonzini static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator, 2142c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, hpa_t root, 2143c50d8ae3SPaolo Bonzini u64 addr) 2144c50d8ae3SPaolo Bonzini { 2145c50d8ae3SPaolo Bonzini iterator->addr = addr; 2146c50d8ae3SPaolo Bonzini iterator->shadow_addr = root; 2147c50d8ae3SPaolo Bonzini iterator->level = vcpu->arch.mmu->shadow_root_level; 2148c50d8ae3SPaolo Bonzini 2149c50d8ae3SPaolo Bonzini if (iterator->level == PT64_ROOT_4LEVEL && 2150c50d8ae3SPaolo Bonzini vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL && 2151c50d8ae3SPaolo Bonzini !vcpu->arch.mmu->direct_map) 2152c50d8ae3SPaolo Bonzini --iterator->level; 2153c50d8ae3SPaolo Bonzini 2154c50d8ae3SPaolo Bonzini if (iterator->level == PT32E_ROOT_LEVEL) { 2155c50d8ae3SPaolo Bonzini /* 2156c50d8ae3SPaolo Bonzini * prev_root is currently only used for 64-bit hosts. So only 2157c50d8ae3SPaolo Bonzini * the active root_hpa is valid here. 2158c50d8ae3SPaolo Bonzini */ 2159c50d8ae3SPaolo Bonzini BUG_ON(root != vcpu->arch.mmu->root_hpa); 2160c50d8ae3SPaolo Bonzini 2161c50d8ae3SPaolo Bonzini iterator->shadow_addr 2162c50d8ae3SPaolo Bonzini = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; 2163c50d8ae3SPaolo Bonzini iterator->shadow_addr &= PT64_BASE_ADDR_MASK; 2164c50d8ae3SPaolo Bonzini --iterator->level; 2165c50d8ae3SPaolo Bonzini if (!iterator->shadow_addr) 2166c50d8ae3SPaolo Bonzini iterator->level = 0; 2167c50d8ae3SPaolo Bonzini } 2168c50d8ae3SPaolo Bonzini } 2169c50d8ae3SPaolo Bonzini 2170c50d8ae3SPaolo Bonzini static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, 2171c50d8ae3SPaolo Bonzini struct kvm_vcpu *vcpu, u64 addr) 2172c50d8ae3SPaolo Bonzini { 2173c50d8ae3SPaolo Bonzini shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root_hpa, 2174c50d8ae3SPaolo Bonzini addr); 2175c50d8ae3SPaolo Bonzini } 2176c50d8ae3SPaolo Bonzini 2177c50d8ae3SPaolo Bonzini static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) 2178c50d8ae3SPaolo Bonzini { 21793bae0459SSean Christopherson if (iterator->level < PG_LEVEL_4K) 2180c50d8ae3SPaolo Bonzini return false; 2181c50d8ae3SPaolo Bonzini 2182c50d8ae3SPaolo Bonzini iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); 2183c50d8ae3SPaolo Bonzini iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; 2184c50d8ae3SPaolo Bonzini return true; 2185c50d8ae3SPaolo Bonzini } 2186c50d8ae3SPaolo Bonzini 2187c50d8ae3SPaolo Bonzini static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, 2188c50d8ae3SPaolo Bonzini u64 spte) 2189c50d8ae3SPaolo Bonzini { 2190c50d8ae3SPaolo Bonzini if (is_last_spte(spte, iterator->level)) { 2191c50d8ae3SPaolo Bonzini iterator->level = 0; 2192c50d8ae3SPaolo Bonzini return; 2193c50d8ae3SPaolo Bonzini } 2194c50d8ae3SPaolo Bonzini 2195c50d8ae3SPaolo Bonzini iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; 2196c50d8ae3SPaolo Bonzini --iterator->level; 2197c50d8ae3SPaolo Bonzini } 2198c50d8ae3SPaolo Bonzini 2199c50d8ae3SPaolo Bonzini static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) 2200c50d8ae3SPaolo Bonzini { 2201c50d8ae3SPaolo Bonzini __shadow_walk_next(iterator, *iterator->sptep); 2202c50d8ae3SPaolo Bonzini } 2203c50d8ae3SPaolo Bonzini 2204c50d8ae3SPaolo Bonzini static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, 2205c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp) 2206c50d8ae3SPaolo Bonzini { 2207c50d8ae3SPaolo Bonzini u64 spte; 2208c50d8ae3SPaolo Bonzini 2209c50d8ae3SPaolo Bonzini BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); 2210c50d8ae3SPaolo Bonzini 2211cc4674d0SBen Gardon spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); 2212c50d8ae3SPaolo Bonzini 2213c50d8ae3SPaolo Bonzini mmu_spte_set(sptep, spte); 2214c50d8ae3SPaolo Bonzini 2215c50d8ae3SPaolo Bonzini mmu_page_add_parent_pte(vcpu, sp, sptep); 2216c50d8ae3SPaolo Bonzini 2217c50d8ae3SPaolo Bonzini if (sp->unsync_children || sp->unsync) 2218c50d8ae3SPaolo Bonzini mark_unsync(sptep); 2219c50d8ae3SPaolo Bonzini } 2220c50d8ae3SPaolo Bonzini 2221c50d8ae3SPaolo Bonzini static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2222c50d8ae3SPaolo Bonzini unsigned direct_access) 2223c50d8ae3SPaolo Bonzini { 2224c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { 2225c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2226c50d8ae3SPaolo Bonzini 2227c50d8ae3SPaolo Bonzini /* 2228c50d8ae3SPaolo Bonzini * For the direct sp, if the guest pte's dirty bit 2229c50d8ae3SPaolo Bonzini * changed form clean to dirty, it will corrupt the 2230c50d8ae3SPaolo Bonzini * sp's access: allow writable in the read-only sp, 2231c50d8ae3SPaolo Bonzini * so we should update the spte at this point to get 2232c50d8ae3SPaolo Bonzini * a new sp with the correct access. 2233c50d8ae3SPaolo Bonzini */ 2234e47c4aeeSSean Christopherson child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK); 2235c50d8ae3SPaolo Bonzini if (child->role.access == direct_access) 2236c50d8ae3SPaolo Bonzini return; 2237c50d8ae3SPaolo Bonzini 2238c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2239c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1); 2240c50d8ae3SPaolo Bonzini } 2241c50d8ae3SPaolo Bonzini } 2242c50d8ae3SPaolo Bonzini 22432de4085cSBen Gardon /* Returns the number of zapped non-leaf child shadow pages. */ 22442de4085cSBen Gardon static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, 22452de4085cSBen Gardon u64 *spte, struct list_head *invalid_list) 2246c50d8ae3SPaolo Bonzini { 2247c50d8ae3SPaolo Bonzini u64 pte; 2248c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2249c50d8ae3SPaolo Bonzini 2250c50d8ae3SPaolo Bonzini pte = *spte; 2251c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(pte)) { 2252c50d8ae3SPaolo Bonzini if (is_last_spte(pte, sp->role.level)) { 2253c50d8ae3SPaolo Bonzini drop_spte(kvm, spte); 2254c50d8ae3SPaolo Bonzini if (is_large_pte(pte)) 2255c50d8ae3SPaolo Bonzini --kvm->stat.lpages; 2256c50d8ae3SPaolo Bonzini } else { 2257e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2258c50d8ae3SPaolo Bonzini drop_parent_pte(child, spte); 22592de4085cSBen Gardon 22602de4085cSBen Gardon /* 22612de4085cSBen Gardon * Recursively zap nested TDP SPs, parentless SPs are 22622de4085cSBen Gardon * unlikely to be used again in the near future. This 22632de4085cSBen Gardon * avoids retaining a large number of stale nested SPs. 22642de4085cSBen Gardon */ 22652de4085cSBen Gardon if (tdp_enabled && invalid_list && 22662de4085cSBen Gardon child->role.guest_mode && !child->parent_ptes.val) 22672de4085cSBen Gardon return kvm_mmu_prepare_zap_page(kvm, child, 22682de4085cSBen Gardon invalid_list); 2269c50d8ae3SPaolo Bonzini } 2270ace569e0SSean Christopherson } else if (is_mmio_spte(pte)) { 2271c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(spte); 2272ace569e0SSean Christopherson } 22732de4085cSBen Gardon return 0; 2274c50d8ae3SPaolo Bonzini } 2275c50d8ae3SPaolo Bonzini 22762de4085cSBen Gardon static int kvm_mmu_page_unlink_children(struct kvm *kvm, 22772de4085cSBen Gardon struct kvm_mmu_page *sp, 22782de4085cSBen Gardon struct list_head *invalid_list) 2279c50d8ae3SPaolo Bonzini { 22802de4085cSBen Gardon int zapped = 0; 2281c50d8ae3SPaolo Bonzini unsigned i; 2282c50d8ae3SPaolo Bonzini 2283c50d8ae3SPaolo Bonzini for (i = 0; i < PT64_ENT_PER_PAGE; ++i) 22842de4085cSBen Gardon zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); 22852de4085cSBen Gardon 22862de4085cSBen Gardon return zapped; 2287c50d8ae3SPaolo Bonzini } 2288c50d8ae3SPaolo Bonzini 2289c50d8ae3SPaolo Bonzini static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) 2290c50d8ae3SPaolo Bonzini { 2291c50d8ae3SPaolo Bonzini u64 *sptep; 2292c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 2293c50d8ae3SPaolo Bonzini 2294c50d8ae3SPaolo Bonzini while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) 2295c50d8ae3SPaolo Bonzini drop_parent_pte(sp, sptep); 2296c50d8ae3SPaolo Bonzini } 2297c50d8ae3SPaolo Bonzini 2298c50d8ae3SPaolo Bonzini static int mmu_zap_unsync_children(struct kvm *kvm, 2299c50d8ae3SPaolo Bonzini struct kvm_mmu_page *parent, 2300c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2301c50d8ae3SPaolo Bonzini { 2302c50d8ae3SPaolo Bonzini int i, zapped = 0; 2303c50d8ae3SPaolo Bonzini struct mmu_page_path parents; 2304c50d8ae3SPaolo Bonzini struct kvm_mmu_pages pages; 2305c50d8ae3SPaolo Bonzini 23063bae0459SSean Christopherson if (parent->role.level == PG_LEVEL_4K) 2307c50d8ae3SPaolo Bonzini return 0; 2308c50d8ae3SPaolo Bonzini 2309c50d8ae3SPaolo Bonzini while (mmu_unsync_walk(parent, &pages)) { 2310c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2311c50d8ae3SPaolo Bonzini 2312c50d8ae3SPaolo Bonzini for_each_sp(pages, sp, parents, i) { 2313c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 2314c50d8ae3SPaolo Bonzini mmu_pages_clear_parents(&parents); 2315c50d8ae3SPaolo Bonzini zapped++; 2316c50d8ae3SPaolo Bonzini } 2317c50d8ae3SPaolo Bonzini } 2318c50d8ae3SPaolo Bonzini 2319c50d8ae3SPaolo Bonzini return zapped; 2320c50d8ae3SPaolo Bonzini } 2321c50d8ae3SPaolo Bonzini 2322c50d8ae3SPaolo Bonzini static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm, 2323c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2324c50d8ae3SPaolo Bonzini struct list_head *invalid_list, 2325c50d8ae3SPaolo Bonzini int *nr_zapped) 2326c50d8ae3SPaolo Bonzini { 2327c50d8ae3SPaolo Bonzini bool list_unstable; 2328c50d8ae3SPaolo Bonzini 2329c50d8ae3SPaolo Bonzini trace_kvm_mmu_prepare_zap_page(sp); 2330c50d8ae3SPaolo Bonzini ++kvm->stat.mmu_shadow_zapped; 2331c50d8ae3SPaolo Bonzini *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list); 23322de4085cSBen Gardon *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list); 2333c50d8ae3SPaolo Bonzini kvm_mmu_unlink_parents(kvm, sp); 2334c50d8ae3SPaolo Bonzini 2335c50d8ae3SPaolo Bonzini /* Zapping children means active_mmu_pages has become unstable. */ 2336c50d8ae3SPaolo Bonzini list_unstable = *nr_zapped; 2337c50d8ae3SPaolo Bonzini 2338c50d8ae3SPaolo Bonzini if (!sp->role.invalid && !sp->role.direct) 2339c50d8ae3SPaolo Bonzini unaccount_shadowed(kvm, sp); 2340c50d8ae3SPaolo Bonzini 2341c50d8ae3SPaolo Bonzini if (sp->unsync) 2342c50d8ae3SPaolo Bonzini kvm_unlink_unsync_page(kvm, sp); 2343c50d8ae3SPaolo Bonzini if (!sp->root_count) { 2344c50d8ae3SPaolo Bonzini /* Count self */ 2345c50d8ae3SPaolo Bonzini (*nr_zapped)++; 2346f95eec9bSSean Christopherson 2347f95eec9bSSean Christopherson /* 2348f95eec9bSSean Christopherson * Already invalid pages (previously active roots) are not on 2349f95eec9bSSean Christopherson * the active page list. See list_del() in the "else" case of 2350f95eec9bSSean Christopherson * !sp->root_count. 2351f95eec9bSSean Christopherson */ 2352f95eec9bSSean Christopherson if (sp->role.invalid) 2353f95eec9bSSean Christopherson list_add(&sp->link, invalid_list); 2354f95eec9bSSean Christopherson else 2355c50d8ae3SPaolo Bonzini list_move(&sp->link, invalid_list); 2356c50d8ae3SPaolo Bonzini kvm_mod_used_mmu_pages(kvm, -1); 2357c50d8ae3SPaolo Bonzini } else { 2358f95eec9bSSean Christopherson /* 2359f95eec9bSSean Christopherson * Remove the active root from the active page list, the root 2360f95eec9bSSean Christopherson * will be explicitly freed when the root_count hits zero. 2361f95eec9bSSean Christopherson */ 2362f95eec9bSSean Christopherson list_del(&sp->link); 2363c50d8ae3SPaolo Bonzini 2364c50d8ae3SPaolo Bonzini /* 2365c50d8ae3SPaolo Bonzini * Obsolete pages cannot be used on any vCPUs, see the comment 2366c50d8ae3SPaolo Bonzini * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also 2367c50d8ae3SPaolo Bonzini * treats invalid shadow pages as being obsolete. 2368c50d8ae3SPaolo Bonzini */ 2369c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 2370c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 2371c50d8ae3SPaolo Bonzini } 2372c50d8ae3SPaolo Bonzini 2373c50d8ae3SPaolo Bonzini if (sp->lpage_disallowed) 2374c50d8ae3SPaolo Bonzini unaccount_huge_nx_page(kvm, sp); 2375c50d8ae3SPaolo Bonzini 2376c50d8ae3SPaolo Bonzini sp->role.invalid = 1; 2377c50d8ae3SPaolo Bonzini return list_unstable; 2378c50d8ae3SPaolo Bonzini } 2379c50d8ae3SPaolo Bonzini 2380c50d8ae3SPaolo Bonzini static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, 2381c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2382c50d8ae3SPaolo Bonzini { 2383c50d8ae3SPaolo Bonzini int nr_zapped; 2384c50d8ae3SPaolo Bonzini 2385c50d8ae3SPaolo Bonzini __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped); 2386c50d8ae3SPaolo Bonzini return nr_zapped; 2387c50d8ae3SPaolo Bonzini } 2388c50d8ae3SPaolo Bonzini 2389c50d8ae3SPaolo Bonzini static void kvm_mmu_commit_zap_page(struct kvm *kvm, 2390c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 2391c50d8ae3SPaolo Bonzini { 2392c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *nsp; 2393c50d8ae3SPaolo Bonzini 2394c50d8ae3SPaolo Bonzini if (list_empty(invalid_list)) 2395c50d8ae3SPaolo Bonzini return; 2396c50d8ae3SPaolo Bonzini 2397c50d8ae3SPaolo Bonzini /* 2398c50d8ae3SPaolo Bonzini * We need to make sure everyone sees our modifications to 2399c50d8ae3SPaolo Bonzini * the page tables and see changes to vcpu->mode here. The barrier 2400c50d8ae3SPaolo Bonzini * in the kvm_flush_remote_tlbs() achieves this. This pairs 2401c50d8ae3SPaolo Bonzini * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. 2402c50d8ae3SPaolo Bonzini * 2403c50d8ae3SPaolo Bonzini * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit 2404c50d8ae3SPaolo Bonzini * guest mode and/or lockless shadow page table walks. 2405c50d8ae3SPaolo Bonzini */ 2406c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs(kvm); 2407c50d8ae3SPaolo Bonzini 2408c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, nsp, invalid_list, link) { 2409c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.invalid || sp->root_count); 2410c50d8ae3SPaolo Bonzini kvm_mmu_free_page(sp); 2411c50d8ae3SPaolo Bonzini } 2412c50d8ae3SPaolo Bonzini } 2413c50d8ae3SPaolo Bonzini 24146b82ef2cSSean Christopherson static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm, 24156b82ef2cSSean Christopherson unsigned long nr_to_zap) 2416c50d8ae3SPaolo Bonzini { 24176b82ef2cSSean Christopherson unsigned long total_zapped = 0; 24186b82ef2cSSean Christopherson struct kvm_mmu_page *sp, *tmp; 2419ba7888ddSSean Christopherson LIST_HEAD(invalid_list); 24206b82ef2cSSean Christopherson bool unstable; 24216b82ef2cSSean Christopherson int nr_zapped; 2422c50d8ae3SPaolo Bonzini 2423c50d8ae3SPaolo Bonzini if (list_empty(&kvm->arch.active_mmu_pages)) 2424ba7888ddSSean Christopherson return 0; 2425c50d8ae3SPaolo Bonzini 24266b82ef2cSSean Christopherson restart: 24278fc51726SSean Christopherson list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { 24286b82ef2cSSean Christopherson /* 24296b82ef2cSSean Christopherson * Don't zap active root pages, the page itself can't be freed 24306b82ef2cSSean Christopherson * and zapping it will just force vCPUs to realloc and reload. 24316b82ef2cSSean Christopherson */ 24326b82ef2cSSean Christopherson if (sp->root_count) 24336b82ef2cSSean Christopherson continue; 24346b82ef2cSSean Christopherson 24356b82ef2cSSean Christopherson unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, 24366b82ef2cSSean Christopherson &nr_zapped); 24376b82ef2cSSean Christopherson total_zapped += nr_zapped; 24386b82ef2cSSean Christopherson if (total_zapped >= nr_to_zap) 2439ba7888ddSSean Christopherson break; 2440ba7888ddSSean Christopherson 24416b82ef2cSSean Christopherson if (unstable) 24426b82ef2cSSean Christopherson goto restart; 2443ba7888ddSSean Christopherson } 24446b82ef2cSSean Christopherson 24456b82ef2cSSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 24466b82ef2cSSean Christopherson 24476b82ef2cSSean Christopherson kvm->stat.mmu_recycled += total_zapped; 24486b82ef2cSSean Christopherson return total_zapped; 24496b82ef2cSSean Christopherson } 24506b82ef2cSSean Christopherson 2451afe8d7e6SSean Christopherson static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm) 2452afe8d7e6SSean Christopherson { 2453afe8d7e6SSean Christopherson if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) 2454afe8d7e6SSean Christopherson return kvm->arch.n_max_mmu_pages - 2455afe8d7e6SSean Christopherson kvm->arch.n_used_mmu_pages; 2456afe8d7e6SSean Christopherson 2457afe8d7e6SSean Christopherson return 0; 2458c50d8ae3SPaolo Bonzini } 2459c50d8ae3SPaolo Bonzini 2460ba7888ddSSean Christopherson static int make_mmu_pages_available(struct kvm_vcpu *vcpu) 2461ba7888ddSSean Christopherson { 24626b82ef2cSSean Christopherson unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); 2463ba7888ddSSean Christopherson 24646b82ef2cSSean Christopherson if (likely(avail >= KVM_MIN_FREE_MMU_PAGES)) 2465ba7888ddSSean Christopherson return 0; 2466ba7888ddSSean Christopherson 24676b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); 2468ba7888ddSSean Christopherson 24696e6ec584SSean Christopherson /* 24706e6ec584SSean Christopherson * Note, this check is intentionally soft, it only guarantees that one 24716e6ec584SSean Christopherson * page is available, while the caller may end up allocating as many as 24726e6ec584SSean Christopherson * four pages, e.g. for PAE roots or for 5-level paging. Temporarily 24736e6ec584SSean Christopherson * exceeding the (arbitrary by default) limit will not harm the host, 2474c4342633SIngo Molnar * being too aggressive may unnecessarily kill the guest, and getting an 24756e6ec584SSean Christopherson * exact count is far more trouble than it's worth, especially in the 24766e6ec584SSean Christopherson * page fault paths. 24776e6ec584SSean Christopherson */ 2478ba7888ddSSean Christopherson if (!kvm_mmu_available_pages(vcpu->kvm)) 2479ba7888ddSSean Christopherson return -ENOSPC; 2480ba7888ddSSean Christopherson return 0; 2481ba7888ddSSean Christopherson } 2482ba7888ddSSean Christopherson 2483c50d8ae3SPaolo Bonzini /* 2484c50d8ae3SPaolo Bonzini * Changing the number of mmu pages allocated to the vm 2485c50d8ae3SPaolo Bonzini * Note: if goal_nr_mmu_pages is too small, you will get dead lock 2486c50d8ae3SPaolo Bonzini */ 2487c50d8ae3SPaolo Bonzini void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages) 2488c50d8ae3SPaolo Bonzini { 2489531810caSBen Gardon write_lock(&kvm->mmu_lock); 2490c50d8ae3SPaolo Bonzini 2491c50d8ae3SPaolo Bonzini if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { 24926b82ef2cSSean Christopherson kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - 24936b82ef2cSSean Christopherson goal_nr_mmu_pages); 2494c50d8ae3SPaolo Bonzini 2495c50d8ae3SPaolo Bonzini goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; 2496c50d8ae3SPaolo Bonzini } 2497c50d8ae3SPaolo Bonzini 2498c50d8ae3SPaolo Bonzini kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; 2499c50d8ae3SPaolo Bonzini 2500531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2501c50d8ae3SPaolo Bonzini } 2502c50d8ae3SPaolo Bonzini 2503c50d8ae3SPaolo Bonzini int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) 2504c50d8ae3SPaolo Bonzini { 2505c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2506c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 2507c50d8ae3SPaolo Bonzini int r; 2508c50d8ae3SPaolo Bonzini 2509c50d8ae3SPaolo Bonzini pgprintk("%s: looking for gfn %llx\n", __func__, gfn); 2510c50d8ae3SPaolo Bonzini r = 0; 2511531810caSBen Gardon write_lock(&kvm->mmu_lock); 2512c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { 2513c50d8ae3SPaolo Bonzini pgprintk("%s: gfn %llx role %x\n", __func__, gfn, 2514c50d8ae3SPaolo Bonzini sp->role.word); 2515c50d8ae3SPaolo Bonzini r = 1; 2516c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 2517c50d8ae3SPaolo Bonzini } 2518c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 2519531810caSBen Gardon write_unlock(&kvm->mmu_lock); 2520c50d8ae3SPaolo Bonzini 2521c50d8ae3SPaolo Bonzini return r; 2522c50d8ae3SPaolo Bonzini } 252396ad91aeSSean Christopherson 252496ad91aeSSean Christopherson static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) 252596ad91aeSSean Christopherson { 252696ad91aeSSean Christopherson gpa_t gpa; 252796ad91aeSSean Christopherson int r; 252896ad91aeSSean Christopherson 252996ad91aeSSean Christopherson if (vcpu->arch.mmu->direct_map) 253096ad91aeSSean Christopherson return 0; 253196ad91aeSSean Christopherson 253296ad91aeSSean Christopherson gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); 253396ad91aeSSean Christopherson 253496ad91aeSSean Christopherson r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); 253596ad91aeSSean Christopherson 253696ad91aeSSean Christopherson return r; 253796ad91aeSSean Christopherson } 2538c50d8ae3SPaolo Bonzini 2539c50d8ae3SPaolo Bonzini static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) 2540c50d8ae3SPaolo Bonzini { 2541c50d8ae3SPaolo Bonzini trace_kvm_mmu_unsync_page(sp); 2542c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_unsync; 2543c50d8ae3SPaolo Bonzini sp->unsync = 1; 2544c50d8ae3SPaolo Bonzini 2545c50d8ae3SPaolo Bonzini kvm_mmu_mark_parents_unsync(sp); 2546c50d8ae3SPaolo Bonzini } 2547c50d8ae3SPaolo Bonzini 25480337f585SSean Christopherson /* 25490337f585SSean Christopherson * Attempt to unsync any shadow pages that can be reached by the specified gfn, 25500337f585SSean Christopherson * KVM is creating a writable mapping for said gfn. Returns 0 if all pages 25510337f585SSean Christopherson * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must 25520337f585SSean Christopherson * be write-protected. 25530337f585SSean Christopherson */ 25540337f585SSean Christopherson int mmu_try_to_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, bool can_unsync) 2555c50d8ae3SPaolo Bonzini { 2556c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2557c50d8ae3SPaolo Bonzini 25580337f585SSean Christopherson /* 25590337f585SSean Christopherson * Force write-protection if the page is being tracked. Note, the page 25600337f585SSean Christopherson * track machinery is used to write-protect upper-level shadow pages, 25610337f585SSean Christopherson * i.e. this guards the role.level == 4K assertion below! 25620337f585SSean Christopherson */ 2563c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 25640337f585SSean Christopherson return -EPERM; 2565c50d8ae3SPaolo Bonzini 25660337f585SSean Christopherson /* 25670337f585SSean Christopherson * The page is not write-tracked, mark existing shadow pages unsync 25680337f585SSean Christopherson * unless KVM is synchronizing an unsync SP (can_unsync = false). In 25690337f585SSean Christopherson * that case, KVM must complete emulation of the guest TLB flush before 25700337f585SSean Christopherson * allowing shadow pages to become unsync (writable by the guest). 25710337f585SSean Christopherson */ 2572c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 2573c50d8ae3SPaolo Bonzini if (!can_unsync) 25740337f585SSean Christopherson return -EPERM; 2575c50d8ae3SPaolo Bonzini 2576c50d8ae3SPaolo Bonzini if (sp->unsync) 2577c50d8ae3SPaolo Bonzini continue; 2578c50d8ae3SPaolo Bonzini 25793bae0459SSean Christopherson WARN_ON(sp->role.level != PG_LEVEL_4K); 2580c50d8ae3SPaolo Bonzini kvm_unsync_page(vcpu, sp); 2581c50d8ae3SPaolo Bonzini } 2582c50d8ae3SPaolo Bonzini 2583c50d8ae3SPaolo Bonzini /* 2584c50d8ae3SPaolo Bonzini * We need to ensure that the marking of unsync pages is visible 2585c50d8ae3SPaolo Bonzini * before the SPTE is updated to allow writes because 2586c50d8ae3SPaolo Bonzini * kvm_mmu_sync_roots() checks the unsync flags without holding 2587c50d8ae3SPaolo Bonzini * the MMU lock and so can race with this. If the SPTE was updated 2588c50d8ae3SPaolo Bonzini * before the page had been marked as unsync-ed, something like the 2589c50d8ae3SPaolo Bonzini * following could happen: 2590c50d8ae3SPaolo Bonzini * 2591c50d8ae3SPaolo Bonzini * CPU 1 CPU 2 2592c50d8ae3SPaolo Bonzini * --------------------------------------------------------------------- 2593c50d8ae3SPaolo Bonzini * 1.2 Host updates SPTE 2594c50d8ae3SPaolo Bonzini * to be writable 2595c50d8ae3SPaolo Bonzini * 2.1 Guest writes a GPTE for GVA X. 2596c50d8ae3SPaolo Bonzini * (GPTE being in the guest page table shadowed 2597c50d8ae3SPaolo Bonzini * by the SP from CPU 1.) 2598c50d8ae3SPaolo Bonzini * This reads SPTE during the page table walk. 2599c50d8ae3SPaolo Bonzini * Since SPTE.W is read as 1, there is no 2600c50d8ae3SPaolo Bonzini * fault. 2601c50d8ae3SPaolo Bonzini * 2602c50d8ae3SPaolo Bonzini * 2.2 Guest issues TLB flush. 2603c50d8ae3SPaolo Bonzini * That causes a VM Exit. 2604c50d8ae3SPaolo Bonzini * 26050337f585SSean Christopherson * 2.3 Walking of unsync pages sees sp->unsync is 26060337f585SSean Christopherson * false and skips the page. 2607c50d8ae3SPaolo Bonzini * 2608c50d8ae3SPaolo Bonzini * 2.4 Guest accesses GVA X. 2609c50d8ae3SPaolo Bonzini * Since the mapping in the SP was not updated, 2610c50d8ae3SPaolo Bonzini * so the old mapping for GVA X incorrectly 2611c50d8ae3SPaolo Bonzini * gets used. 2612c50d8ae3SPaolo Bonzini * 1.1 Host marks SP 2613c50d8ae3SPaolo Bonzini * as unsync 2614c50d8ae3SPaolo Bonzini * (sp->unsync = true) 2615c50d8ae3SPaolo Bonzini * 2616c50d8ae3SPaolo Bonzini * The write barrier below ensures that 1.1 happens before 1.2 and thus 2617c50d8ae3SPaolo Bonzini * the situation in 2.4 does not arise. The implicit barrier in 2.2 2618c50d8ae3SPaolo Bonzini * pairs with this write barrier. 2619c50d8ae3SPaolo Bonzini */ 2620c50d8ae3SPaolo Bonzini smp_wmb(); 2621c50d8ae3SPaolo Bonzini 26220337f585SSean Christopherson return 0; 2623c50d8ae3SPaolo Bonzini } 2624c50d8ae3SPaolo Bonzini 2625799a4190SBen Gardon static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2626799a4190SBen Gardon unsigned int pte_access, int level, 2627799a4190SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 2628799a4190SBen Gardon bool can_unsync, bool host_writable) 2629799a4190SBen Gardon { 2630799a4190SBen Gardon u64 spte; 2631799a4190SBen Gardon struct kvm_mmu_page *sp; 2632799a4190SBen Gardon int ret; 2633799a4190SBen Gardon 2634799a4190SBen Gardon sp = sptep_to_sp(sptep); 2635799a4190SBen Gardon 2636799a4190SBen Gardon ret = make_spte(vcpu, pte_access, level, gfn, pfn, *sptep, speculative, 2637799a4190SBen Gardon can_unsync, host_writable, sp_ad_disabled(sp), &spte); 2638799a4190SBen Gardon 2639799a4190SBen Gardon if (spte & PT_WRITABLE_MASK) 2640799a4190SBen Gardon kvm_vcpu_mark_page_dirty(vcpu, gfn); 2641799a4190SBen Gardon 264212703759SSean Christopherson if (*sptep == spte) 264312703759SSean Christopherson ret |= SET_SPTE_SPURIOUS; 264412703759SSean Christopherson else if (mmu_spte_update(sptep, spte)) 2645c50d8ae3SPaolo Bonzini ret |= SET_SPTE_NEED_REMOTE_TLB_FLUSH; 2646c50d8ae3SPaolo Bonzini return ret; 2647c50d8ae3SPaolo Bonzini } 2648c50d8ae3SPaolo Bonzini 26490a2b64c5SBen Gardon static int mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, 2650e88b8093SSean Christopherson unsigned int pte_access, bool write_fault, int level, 26510a2b64c5SBen Gardon gfn_t gfn, kvm_pfn_t pfn, bool speculative, 26520a2b64c5SBen Gardon bool host_writable) 2653c50d8ae3SPaolo Bonzini { 2654c50d8ae3SPaolo Bonzini int was_rmapped = 0; 2655c50d8ae3SPaolo Bonzini int rmap_count; 2656c50d8ae3SPaolo Bonzini int set_spte_ret; 2657c4371c2aSSean Christopherson int ret = RET_PF_FIXED; 2658c50d8ae3SPaolo Bonzini bool flush = false; 2659c50d8ae3SPaolo Bonzini 2660c50d8ae3SPaolo Bonzini pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, 2661c50d8ae3SPaolo Bonzini *sptep, write_fault, gfn); 2662c50d8ae3SPaolo Bonzini 2663a54aa15cSSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 2664a54aa15cSSean Christopherson mark_mmio_spte(vcpu, sptep, gfn, pte_access); 2665a54aa15cSSean Christopherson return RET_PF_EMULATE; 2666a54aa15cSSean Christopherson } 2667a54aa15cSSean Christopherson 2668c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2669c50d8ae3SPaolo Bonzini /* 2670c50d8ae3SPaolo Bonzini * If we overwrite a PTE page pointer with a 2MB PMD, unlink 2671c50d8ae3SPaolo Bonzini * the parent of the now unreachable PTE. 2672c50d8ae3SPaolo Bonzini */ 26733bae0459SSean Christopherson if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) { 2674c50d8ae3SPaolo Bonzini struct kvm_mmu_page *child; 2675c50d8ae3SPaolo Bonzini u64 pte = *sptep; 2676c50d8ae3SPaolo Bonzini 2677e47c4aeeSSean Christopherson child = to_shadow_page(pte & PT64_BASE_ADDR_MASK); 2678c50d8ae3SPaolo Bonzini drop_parent_pte(child, sptep); 2679c50d8ae3SPaolo Bonzini flush = true; 2680c50d8ae3SPaolo Bonzini } else if (pfn != spte_to_pfn(*sptep)) { 2681c50d8ae3SPaolo Bonzini pgprintk("hfn old %llx new %llx\n", 2682c50d8ae3SPaolo Bonzini spte_to_pfn(*sptep), pfn); 2683c50d8ae3SPaolo Bonzini drop_spte(vcpu->kvm, sptep); 2684c50d8ae3SPaolo Bonzini flush = true; 2685c50d8ae3SPaolo Bonzini } else 2686c50d8ae3SPaolo Bonzini was_rmapped = 1; 2687c50d8ae3SPaolo Bonzini } 2688c50d8ae3SPaolo Bonzini 2689c50d8ae3SPaolo Bonzini set_spte_ret = set_spte(vcpu, sptep, pte_access, level, gfn, pfn, 2690c50d8ae3SPaolo Bonzini speculative, true, host_writable); 2691c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_WRITE_PROTECTED_PT) { 2692c50d8ae3SPaolo Bonzini if (write_fault) 2693c50d8ae3SPaolo Bonzini ret = RET_PF_EMULATE; 26948c8560b8SSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 2695c50d8ae3SPaolo Bonzini } 2696c50d8ae3SPaolo Bonzini 2697c50d8ae3SPaolo Bonzini if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH || flush) 2698c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 2699c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(level)); 2700c50d8ae3SPaolo Bonzini 270112703759SSean Christopherson /* 270212703759SSean Christopherson * The fault is fully spurious if and only if the new SPTE and old SPTE 270312703759SSean Christopherson * are identical, and emulation is not required. 270412703759SSean Christopherson */ 270512703759SSean Christopherson if ((set_spte_ret & SET_SPTE_SPURIOUS) && ret == RET_PF_FIXED) { 270612703759SSean Christopherson WARN_ON_ONCE(!was_rmapped); 270712703759SSean Christopherson return RET_PF_SPURIOUS; 270812703759SSean Christopherson } 270912703759SSean Christopherson 2710c50d8ae3SPaolo Bonzini pgprintk("%s: setting spte %llx\n", __func__, *sptep); 2711c50d8ae3SPaolo Bonzini trace_kvm_mmu_set_spte(level, gfn, sptep); 2712c50d8ae3SPaolo Bonzini if (!was_rmapped && is_large_pte(*sptep)) 2713c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.lpages; 2714c50d8ae3SPaolo Bonzini 2715c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*sptep)) { 2716c50d8ae3SPaolo Bonzini if (!was_rmapped) { 2717c50d8ae3SPaolo Bonzini rmap_count = rmap_add(vcpu, sptep, gfn); 2718ec1cf69cSPeter Xu if (rmap_count > vcpu->kvm->stat.max_mmu_rmap_size) 2719ec1cf69cSPeter Xu vcpu->kvm->stat.max_mmu_rmap_size = rmap_count; 2720c50d8ae3SPaolo Bonzini if (rmap_count > RMAP_RECYCLE_THRESHOLD) 2721c50d8ae3SPaolo Bonzini rmap_recycle(vcpu, sptep, gfn); 2722c50d8ae3SPaolo Bonzini } 2723c50d8ae3SPaolo Bonzini } 2724c50d8ae3SPaolo Bonzini 2725c50d8ae3SPaolo Bonzini return ret; 2726c50d8ae3SPaolo Bonzini } 2727c50d8ae3SPaolo Bonzini 2728c50d8ae3SPaolo Bonzini static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 2729c50d8ae3SPaolo Bonzini bool no_dirty_log) 2730c50d8ae3SPaolo Bonzini { 2731c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 2732c50d8ae3SPaolo Bonzini 2733c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); 2734c50d8ae3SPaolo Bonzini if (!slot) 2735c50d8ae3SPaolo Bonzini return KVM_PFN_ERR_FAULT; 2736c50d8ae3SPaolo Bonzini 2737c50d8ae3SPaolo Bonzini return gfn_to_pfn_memslot_atomic(slot, gfn); 2738c50d8ae3SPaolo Bonzini } 2739c50d8ae3SPaolo Bonzini 2740c50d8ae3SPaolo Bonzini static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, 2741c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, 2742c50d8ae3SPaolo Bonzini u64 *start, u64 *end) 2743c50d8ae3SPaolo Bonzini { 2744c50d8ae3SPaolo Bonzini struct page *pages[PTE_PREFETCH_NUM]; 2745c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot; 27460a2b64c5SBen Gardon unsigned int access = sp->role.access; 2747c50d8ae3SPaolo Bonzini int i, ret; 2748c50d8ae3SPaolo Bonzini gfn_t gfn; 2749c50d8ae3SPaolo Bonzini 2750c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); 2751c50d8ae3SPaolo Bonzini slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); 2752c50d8ae3SPaolo Bonzini if (!slot) 2753c50d8ae3SPaolo Bonzini return -1; 2754c50d8ae3SPaolo Bonzini 2755c50d8ae3SPaolo Bonzini ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); 2756c50d8ae3SPaolo Bonzini if (ret <= 0) 2757c50d8ae3SPaolo Bonzini return -1; 2758c50d8ae3SPaolo Bonzini 2759c50d8ae3SPaolo Bonzini for (i = 0; i < ret; i++, gfn++, start++) { 2760e88b8093SSean Christopherson mmu_set_spte(vcpu, start, access, false, sp->role.level, gfn, 2761c50d8ae3SPaolo Bonzini page_to_pfn(pages[i]), true, true); 2762c50d8ae3SPaolo Bonzini put_page(pages[i]); 2763c50d8ae3SPaolo Bonzini } 2764c50d8ae3SPaolo Bonzini 2765c50d8ae3SPaolo Bonzini return 0; 2766c50d8ae3SPaolo Bonzini } 2767c50d8ae3SPaolo Bonzini 2768c50d8ae3SPaolo Bonzini static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, 2769c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, u64 *sptep) 2770c50d8ae3SPaolo Bonzini { 2771c50d8ae3SPaolo Bonzini u64 *spte, *start = NULL; 2772c50d8ae3SPaolo Bonzini int i; 2773c50d8ae3SPaolo Bonzini 2774c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 2775c50d8ae3SPaolo Bonzini 2776c50d8ae3SPaolo Bonzini i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); 2777c50d8ae3SPaolo Bonzini spte = sp->spt + i; 2778c50d8ae3SPaolo Bonzini 2779c50d8ae3SPaolo Bonzini for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { 2780c50d8ae3SPaolo Bonzini if (is_shadow_present_pte(*spte) || spte == sptep) { 2781c50d8ae3SPaolo Bonzini if (!start) 2782c50d8ae3SPaolo Bonzini continue; 2783c50d8ae3SPaolo Bonzini if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) 2784c50d8ae3SPaolo Bonzini break; 2785c50d8ae3SPaolo Bonzini start = NULL; 2786c50d8ae3SPaolo Bonzini } else if (!start) 2787c50d8ae3SPaolo Bonzini start = spte; 2788c50d8ae3SPaolo Bonzini } 2789c50d8ae3SPaolo Bonzini } 2790c50d8ae3SPaolo Bonzini 2791c50d8ae3SPaolo Bonzini static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) 2792c50d8ae3SPaolo Bonzini { 2793c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 2794c50d8ae3SPaolo Bonzini 279557354682SSean Christopherson sp = sptep_to_sp(sptep); 2796c50d8ae3SPaolo Bonzini 2797c50d8ae3SPaolo Bonzini /* 2798c50d8ae3SPaolo Bonzini * Without accessed bits, there's no way to distinguish between 2799c50d8ae3SPaolo Bonzini * actually accessed translations and prefetched, so disable pte 2800c50d8ae3SPaolo Bonzini * prefetch if accessed bits aren't available. 2801c50d8ae3SPaolo Bonzini */ 2802c50d8ae3SPaolo Bonzini if (sp_ad_disabled(sp)) 2803c50d8ae3SPaolo Bonzini return; 2804c50d8ae3SPaolo Bonzini 28053bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 2806c50d8ae3SPaolo Bonzini return; 2807c50d8ae3SPaolo Bonzini 28084a42d848SDavid Stevens /* 28094a42d848SDavid Stevens * If addresses are being invalidated, skip prefetching to avoid 28104a42d848SDavid Stevens * accidentally prefetching those addresses. 28114a42d848SDavid Stevens */ 28124a42d848SDavid Stevens if (unlikely(vcpu->kvm->mmu_notifier_count)) 28134a42d848SDavid Stevens return; 28144a42d848SDavid Stevens 2815c50d8ae3SPaolo Bonzini __direct_pte_prefetch(vcpu, sp, sptep); 2816c50d8ae3SPaolo Bonzini } 2817c50d8ae3SPaolo Bonzini 28181b6d9d9eSSean Christopherson static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, 28198ca6f063SBen Gardon const struct kvm_memory_slot *slot) 2820db543216SSean Christopherson { 2821db543216SSean Christopherson unsigned long hva; 2822db543216SSean Christopherson pte_t *pte; 2823db543216SSean Christopherson int level; 2824db543216SSean Christopherson 2825e851265aSSean Christopherson if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) 28263bae0459SSean Christopherson return PG_LEVEL_4K; 2827db543216SSean Christopherson 2828293e306eSSean Christopherson /* 2829293e306eSSean Christopherson * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() 2830293e306eSSean Christopherson * is not solely for performance, it's also necessary to avoid the 2831293e306eSSean Christopherson * "writable" check in __gfn_to_hva_many(), which will always fail on 2832293e306eSSean Christopherson * read-only memslots due to gfn_to_hva() assuming writes. Earlier 2833293e306eSSean Christopherson * page fault steps have already verified the guest isn't writing a 2834293e306eSSean Christopherson * read-only memslot. 2835293e306eSSean Christopherson */ 2836db543216SSean Christopherson hva = __gfn_to_hva_memslot(slot, gfn); 2837db543216SSean Christopherson 28381b6d9d9eSSean Christopherson pte = lookup_address_in_mm(kvm->mm, hva, &level); 2839db543216SSean Christopherson if (unlikely(!pte)) 28403bae0459SSean Christopherson return PG_LEVEL_4K; 2841db543216SSean Christopherson 2842db543216SSean Christopherson return level; 2843db543216SSean Christopherson } 2844db543216SSean Christopherson 28458ca6f063SBen Gardon int kvm_mmu_max_mapping_level(struct kvm *kvm, 28468ca6f063SBen Gardon const struct kvm_memory_slot *slot, gfn_t gfn, 28478ca6f063SBen Gardon kvm_pfn_t pfn, int max_level) 28481b6d9d9eSSean Christopherson { 28491b6d9d9eSSean Christopherson struct kvm_lpage_info *linfo; 28501b6d9d9eSSean Christopherson 28511b6d9d9eSSean Christopherson max_level = min(max_level, max_huge_page_level); 28521b6d9d9eSSean Christopherson for ( ; max_level > PG_LEVEL_4K; max_level--) { 28531b6d9d9eSSean Christopherson linfo = lpage_info_slot(gfn, slot, max_level); 28541b6d9d9eSSean Christopherson if (!linfo->disallow_lpage) 28551b6d9d9eSSean Christopherson break; 28561b6d9d9eSSean Christopherson } 28571b6d9d9eSSean Christopherson 28581b6d9d9eSSean Christopherson if (max_level == PG_LEVEL_4K) 28591b6d9d9eSSean Christopherson return PG_LEVEL_4K; 28601b6d9d9eSSean Christopherson 28611b6d9d9eSSean Christopherson return host_pfn_mapping_level(kvm, gfn, pfn, slot); 28621b6d9d9eSSean Christopherson } 28631b6d9d9eSSean Christopherson 2864bb18842eSBen Gardon int kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, gfn_t gfn, 28653cf06612SSean Christopherson int max_level, kvm_pfn_t *pfnp, 28663cf06612SSean Christopherson bool huge_page_disallowed, int *req_level) 28670885904dSSean Christopherson { 2868293e306eSSean Christopherson struct kvm_memory_slot *slot; 28690885904dSSean Christopherson kvm_pfn_t pfn = *pfnp; 287017eff019SSean Christopherson kvm_pfn_t mask; 287183f06fa7SSean Christopherson int level; 28720885904dSSean Christopherson 28733cf06612SSean Christopherson *req_level = PG_LEVEL_4K; 28743cf06612SSean Christopherson 28753bae0459SSean Christopherson if (unlikely(max_level == PG_LEVEL_4K)) 28763bae0459SSean Christopherson return PG_LEVEL_4K; 287717eff019SSean Christopherson 2878e851265aSSean Christopherson if (is_error_noslot_pfn(pfn) || kvm_is_reserved_pfn(pfn)) 28793bae0459SSean Christopherson return PG_LEVEL_4K; 288017eff019SSean Christopherson 2881293e306eSSean Christopherson slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, true); 2882293e306eSSean Christopherson if (!slot) 28833bae0459SSean Christopherson return PG_LEVEL_4K; 2884293e306eSSean Christopherson 28851b6d9d9eSSean Christopherson level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, gfn, pfn, max_level); 28863bae0459SSean Christopherson if (level == PG_LEVEL_4K) 288783f06fa7SSean Christopherson return level; 288817eff019SSean Christopherson 28893cf06612SSean Christopherson *req_level = level = min(level, max_level); 28903cf06612SSean Christopherson 28913cf06612SSean Christopherson /* 28923cf06612SSean Christopherson * Enforce the iTLB multihit workaround after capturing the requested 28933cf06612SSean Christopherson * level, which will be used to do precise, accurate accounting. 28943cf06612SSean Christopherson */ 28953cf06612SSean Christopherson if (huge_page_disallowed) 28963cf06612SSean Christopherson return PG_LEVEL_4K; 28974cd071d1SSean Christopherson 28980885904dSSean Christopherson /* 28994cd071d1SSean Christopherson * mmu_notifier_retry() was successful and mmu_lock is held, so 29004cd071d1SSean Christopherson * the pmd can't be split from under us. 29010885904dSSean Christopherson */ 29020885904dSSean Christopherson mask = KVM_PAGES_PER_HPAGE(level) - 1; 29030885904dSSean Christopherson VM_BUG_ON((gfn & mask) != (pfn & mask)); 29044cd071d1SSean Christopherson *pfnp = pfn & ~mask; 290583f06fa7SSean Christopherson 290683f06fa7SSean Christopherson return level; 29070885904dSSean Christopherson } 29080885904dSSean Christopherson 2909bb18842eSBen Gardon void disallowed_hugepage_adjust(u64 spte, gfn_t gfn, int cur_level, 2910bb18842eSBen Gardon kvm_pfn_t *pfnp, int *goal_levelp) 2911c50d8ae3SPaolo Bonzini { 2912bb18842eSBen Gardon int level = *goal_levelp; 2913c50d8ae3SPaolo Bonzini 29147d945312SBen Gardon if (cur_level == level && level > PG_LEVEL_4K && 2915c50d8ae3SPaolo Bonzini is_shadow_present_pte(spte) && 2916c50d8ae3SPaolo Bonzini !is_large_pte(spte)) { 2917c50d8ae3SPaolo Bonzini /* 2918c50d8ae3SPaolo Bonzini * A small SPTE exists for this pfn, but FNAME(fetch) 2919c50d8ae3SPaolo Bonzini * and __direct_map would like to create a large PTE 2920c50d8ae3SPaolo Bonzini * instead: just force them to go down another level, 2921c50d8ae3SPaolo Bonzini * patching back for them into pfn the next 9 bits of 2922c50d8ae3SPaolo Bonzini * the address. 2923c50d8ae3SPaolo Bonzini */ 29247d945312SBen Gardon u64 page_mask = KVM_PAGES_PER_HPAGE(level) - 29257d945312SBen Gardon KVM_PAGES_PER_HPAGE(level - 1); 2926c50d8ae3SPaolo Bonzini *pfnp |= gfn & page_mask; 2927bb18842eSBen Gardon (*goal_levelp)--; 2928c50d8ae3SPaolo Bonzini } 2929c50d8ae3SPaolo Bonzini } 2930c50d8ae3SPaolo Bonzini 29316c2fd34fSSean Christopherson static int __direct_map(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 293283f06fa7SSean Christopherson int map_writable, int max_level, kvm_pfn_t pfn, 29336c2fd34fSSean Christopherson bool prefault, bool is_tdp) 2934c50d8ae3SPaolo Bonzini { 29356c2fd34fSSean Christopherson bool nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(); 29366c2fd34fSSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 29376c2fd34fSSean Christopherson bool exec = error_code & PFERR_FETCH_MASK; 29386c2fd34fSSean Christopherson bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled; 2939c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator it; 2940c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 29413cf06612SSean Christopherson int level, req_level, ret; 2942c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 2943c50d8ae3SPaolo Bonzini gfn_t base_gfn = gfn; 2944c50d8ae3SPaolo Bonzini 29453cf06612SSean Christopherson level = kvm_mmu_hugepage_adjust(vcpu, gfn, max_level, &pfn, 29463cf06612SSean Christopherson huge_page_disallowed, &req_level); 29474cd071d1SSean Christopherson 2948c50d8ae3SPaolo Bonzini trace_kvm_mmu_spte_requested(gpa, level, pfn); 2949c50d8ae3SPaolo Bonzini for_each_shadow_entry(vcpu, gpa, it) { 2950c50d8ae3SPaolo Bonzini /* 2951c50d8ae3SPaolo Bonzini * We cannot overwrite existing page tables with an NX 2952c50d8ae3SPaolo Bonzini * large page, as the leaf could be executable. 2953c50d8ae3SPaolo Bonzini */ 2954dcc70651SSean Christopherson if (nx_huge_page_workaround_enabled) 29557d945312SBen Gardon disallowed_hugepage_adjust(*it.sptep, gfn, it.level, 29567d945312SBen Gardon &pfn, &level); 2957c50d8ae3SPaolo Bonzini 2958c50d8ae3SPaolo Bonzini base_gfn = gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1); 2959c50d8ae3SPaolo Bonzini if (it.level == level) 2960c50d8ae3SPaolo Bonzini break; 2961c50d8ae3SPaolo Bonzini 2962c50d8ae3SPaolo Bonzini drop_large_spte(vcpu, it.sptep); 296303fffc54SSean Christopherson if (is_shadow_present_pte(*it.sptep)) 296403fffc54SSean Christopherson continue; 296503fffc54SSean Christopherson 2966c50d8ae3SPaolo Bonzini sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr, 2967c50d8ae3SPaolo Bonzini it.level - 1, true, ACC_ALL); 2968c50d8ae3SPaolo Bonzini 2969c50d8ae3SPaolo Bonzini link_shadow_page(vcpu, it.sptep, sp); 29705bcaf3e1SSean Christopherson if (is_tdp && huge_page_disallowed && 29715bcaf3e1SSean Christopherson req_level >= it.level) 2972c50d8ae3SPaolo Bonzini account_huge_nx_page(vcpu->kvm, sp); 2973c50d8ae3SPaolo Bonzini } 2974c50d8ae3SPaolo Bonzini 2975c50d8ae3SPaolo Bonzini ret = mmu_set_spte(vcpu, it.sptep, ACC_ALL, 2976c50d8ae3SPaolo Bonzini write, level, base_gfn, pfn, prefault, 2977c50d8ae3SPaolo Bonzini map_writable); 297812703759SSean Christopherson if (ret == RET_PF_SPURIOUS) 297912703759SSean Christopherson return ret; 298012703759SSean Christopherson 2981c50d8ae3SPaolo Bonzini direct_pte_prefetch(vcpu, it.sptep); 2982c50d8ae3SPaolo Bonzini ++vcpu->stat.pf_fixed; 2983c50d8ae3SPaolo Bonzini return ret; 2984c50d8ae3SPaolo Bonzini } 2985c50d8ae3SPaolo Bonzini 2986c50d8ae3SPaolo Bonzini static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) 2987c50d8ae3SPaolo Bonzini { 2988c50d8ae3SPaolo Bonzini send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk); 2989c50d8ae3SPaolo Bonzini } 2990c50d8ae3SPaolo Bonzini 2991c50d8ae3SPaolo Bonzini static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) 2992c50d8ae3SPaolo Bonzini { 2993c50d8ae3SPaolo Bonzini /* 2994c50d8ae3SPaolo Bonzini * Do not cache the mmio info caused by writing the readonly gfn 2995c50d8ae3SPaolo Bonzini * into the spte otherwise read access on readonly gfn also can 2996c50d8ae3SPaolo Bonzini * caused mmio page fault and treat it as mmio access. 2997c50d8ae3SPaolo Bonzini */ 2998c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_RO_FAULT) 2999c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3000c50d8ae3SPaolo Bonzini 3001c50d8ae3SPaolo Bonzini if (pfn == KVM_PFN_ERR_HWPOISON) { 3002c50d8ae3SPaolo Bonzini kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); 3003c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3004c50d8ae3SPaolo Bonzini } 3005c50d8ae3SPaolo Bonzini 3006c50d8ae3SPaolo Bonzini return -EFAULT; 3007c50d8ae3SPaolo Bonzini } 3008c50d8ae3SPaolo Bonzini 3009c50d8ae3SPaolo Bonzini static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, 30100a2b64c5SBen Gardon kvm_pfn_t pfn, unsigned int access, 30110a2b64c5SBen Gardon int *ret_val) 3012c50d8ae3SPaolo Bonzini { 3013c50d8ae3SPaolo Bonzini /* The pfn is invalid, report the error! */ 3014c50d8ae3SPaolo Bonzini if (unlikely(is_error_pfn(pfn))) { 3015c50d8ae3SPaolo Bonzini *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); 3016c50d8ae3SPaolo Bonzini return true; 3017c50d8ae3SPaolo Bonzini } 3018c50d8ae3SPaolo Bonzini 301930ab5901SSean Christopherson if (unlikely(is_noslot_pfn(pfn))) { 3020c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, gva, gfn, 3021c50d8ae3SPaolo Bonzini access & shadow_mmio_access_mask); 302230ab5901SSean Christopherson /* 302330ab5901SSean Christopherson * If MMIO caching is disabled, emulate immediately without 302430ab5901SSean Christopherson * touching the shadow page tables as attempting to install an 302530ab5901SSean Christopherson * MMIO SPTE will just be an expensive nop. 302630ab5901SSean Christopherson */ 302730ab5901SSean Christopherson if (unlikely(!shadow_mmio_value)) { 302830ab5901SSean Christopherson *ret_val = RET_PF_EMULATE; 302930ab5901SSean Christopherson return true; 303030ab5901SSean Christopherson } 303130ab5901SSean Christopherson } 3032c50d8ae3SPaolo Bonzini 3033c50d8ae3SPaolo Bonzini return false; 3034c50d8ae3SPaolo Bonzini } 3035c50d8ae3SPaolo Bonzini 3036c50d8ae3SPaolo Bonzini static bool page_fault_can_be_fast(u32 error_code) 3037c50d8ae3SPaolo Bonzini { 3038c50d8ae3SPaolo Bonzini /* 3039c50d8ae3SPaolo Bonzini * Do not fix the mmio spte with invalid generation number which 3040c50d8ae3SPaolo Bonzini * need to be updated by slow page fault path. 3041c50d8ae3SPaolo Bonzini */ 3042c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3043c50d8ae3SPaolo Bonzini return false; 3044c50d8ae3SPaolo Bonzini 3045c50d8ae3SPaolo Bonzini /* See if the page fault is due to an NX violation */ 3046c50d8ae3SPaolo Bonzini if (unlikely(((error_code & (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)) 3047c50d8ae3SPaolo Bonzini == (PFERR_FETCH_MASK | PFERR_PRESENT_MASK)))) 3048c50d8ae3SPaolo Bonzini return false; 3049c50d8ae3SPaolo Bonzini 3050c50d8ae3SPaolo Bonzini /* 3051c50d8ae3SPaolo Bonzini * #PF can be fast if: 3052c50d8ae3SPaolo Bonzini * 1. The shadow page table entry is not present, which could mean that 3053c50d8ae3SPaolo Bonzini * the fault is potentially caused by access tracking (if enabled). 3054c50d8ae3SPaolo Bonzini * 2. The shadow page table entry is present and the fault 3055c50d8ae3SPaolo Bonzini * is caused by write-protect, that means we just need change the W 3056c50d8ae3SPaolo Bonzini * bit of the spte which can be done out of mmu-lock. 3057c50d8ae3SPaolo Bonzini * 3058c50d8ae3SPaolo Bonzini * However, if access tracking is disabled we know that a non-present 3059c50d8ae3SPaolo Bonzini * page must be a genuine page fault where we have to create a new SPTE. 3060c50d8ae3SPaolo Bonzini * So, if access tracking is disabled, we return true only for write 3061c50d8ae3SPaolo Bonzini * accesses to a present page. 3062c50d8ae3SPaolo Bonzini */ 3063c50d8ae3SPaolo Bonzini 3064c50d8ae3SPaolo Bonzini return shadow_acc_track_mask != 0 || 3065c50d8ae3SPaolo Bonzini ((error_code & (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)) 3066c50d8ae3SPaolo Bonzini == (PFERR_WRITE_MASK | PFERR_PRESENT_MASK)); 3067c50d8ae3SPaolo Bonzini } 3068c50d8ae3SPaolo Bonzini 3069c50d8ae3SPaolo Bonzini /* 3070c50d8ae3SPaolo Bonzini * Returns true if the SPTE was fixed successfully. Otherwise, 3071c50d8ae3SPaolo Bonzini * someone else modified the SPTE from its original value. 3072c50d8ae3SPaolo Bonzini */ 3073c50d8ae3SPaolo Bonzini static bool 3074c50d8ae3SPaolo Bonzini fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 3075c50d8ae3SPaolo Bonzini u64 *sptep, u64 old_spte, u64 new_spte) 3076c50d8ae3SPaolo Bonzini { 3077c50d8ae3SPaolo Bonzini gfn_t gfn; 3078c50d8ae3SPaolo Bonzini 3079c50d8ae3SPaolo Bonzini WARN_ON(!sp->role.direct); 3080c50d8ae3SPaolo Bonzini 3081c50d8ae3SPaolo Bonzini /* 3082c50d8ae3SPaolo Bonzini * Theoretically we could also set dirty bit (and flush TLB) here in 3083c50d8ae3SPaolo Bonzini * order to eliminate unnecessary PML logging. See comments in 3084c50d8ae3SPaolo Bonzini * set_spte. But fast_page_fault is very unlikely to happen with PML 3085c50d8ae3SPaolo Bonzini * enabled, so we do not do this. This might result in the same GPA 3086c50d8ae3SPaolo Bonzini * to be logged in PML buffer again when the write really happens, and 3087c50d8ae3SPaolo Bonzini * eventually to be called by mark_page_dirty twice. But it's also no 3088c50d8ae3SPaolo Bonzini * harm. This also avoids the TLB flush needed after setting dirty bit 3089c50d8ae3SPaolo Bonzini * so non-PML cases won't be impacted. 3090c50d8ae3SPaolo Bonzini * 3091c50d8ae3SPaolo Bonzini * Compare with set_spte where instead shadow_dirty_mask is set. 3092c50d8ae3SPaolo Bonzini */ 3093c50d8ae3SPaolo Bonzini if (cmpxchg64(sptep, old_spte, new_spte) != old_spte) 3094c50d8ae3SPaolo Bonzini return false; 3095c50d8ae3SPaolo Bonzini 3096c50d8ae3SPaolo Bonzini if (is_writable_pte(new_spte) && !is_writable_pte(old_spte)) { 3097c50d8ae3SPaolo Bonzini /* 3098c50d8ae3SPaolo Bonzini * The gfn of direct spte is stable since it is 3099c50d8ae3SPaolo Bonzini * calculated by sp->gfn. 3100c50d8ae3SPaolo Bonzini */ 3101c50d8ae3SPaolo Bonzini gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); 3102c50d8ae3SPaolo Bonzini kvm_vcpu_mark_page_dirty(vcpu, gfn); 3103c50d8ae3SPaolo Bonzini } 3104c50d8ae3SPaolo Bonzini 3105c50d8ae3SPaolo Bonzini return true; 3106c50d8ae3SPaolo Bonzini } 3107c50d8ae3SPaolo Bonzini 3108c50d8ae3SPaolo Bonzini static bool is_access_allowed(u32 fault_err_code, u64 spte) 3109c50d8ae3SPaolo Bonzini { 3110c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_FETCH_MASK) 3111c50d8ae3SPaolo Bonzini return is_executable_pte(spte); 3112c50d8ae3SPaolo Bonzini 3113c50d8ae3SPaolo Bonzini if (fault_err_code & PFERR_WRITE_MASK) 3114c50d8ae3SPaolo Bonzini return is_writable_pte(spte); 3115c50d8ae3SPaolo Bonzini 3116c50d8ae3SPaolo Bonzini /* Fault was on Read access */ 3117c50d8ae3SPaolo Bonzini return spte & PT_PRESENT_MASK; 3118c50d8ae3SPaolo Bonzini } 3119c50d8ae3SPaolo Bonzini 3120c50d8ae3SPaolo Bonzini /* 31216e8eb206SDavid Matlack * Returns the last level spte pointer of the shadow page walk for the given 31226e8eb206SDavid Matlack * gpa, and sets *spte to the spte value. This spte may be non-preset. If no 31236e8eb206SDavid Matlack * walk could be performed, returns NULL and *spte does not contain valid data. 31246e8eb206SDavid Matlack * 31256e8eb206SDavid Matlack * Contract: 31266e8eb206SDavid Matlack * - Must be called between walk_shadow_page_lockless_{begin,end}. 31276e8eb206SDavid Matlack * - The returned sptep must not be used after walk_shadow_page_lockless_end. 31286e8eb206SDavid Matlack */ 31296e8eb206SDavid Matlack static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte) 31306e8eb206SDavid Matlack { 31316e8eb206SDavid Matlack struct kvm_shadow_walk_iterator iterator; 31326e8eb206SDavid Matlack u64 old_spte; 31336e8eb206SDavid Matlack u64 *sptep = NULL; 31346e8eb206SDavid Matlack 31356e8eb206SDavid Matlack for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) { 31366e8eb206SDavid Matlack sptep = iterator.sptep; 31376e8eb206SDavid Matlack *spte = old_spte; 31386e8eb206SDavid Matlack 31396e8eb206SDavid Matlack if (!is_shadow_present_pte(old_spte)) 31406e8eb206SDavid Matlack break; 31416e8eb206SDavid Matlack } 31426e8eb206SDavid Matlack 31436e8eb206SDavid Matlack return sptep; 31446e8eb206SDavid Matlack } 31456e8eb206SDavid Matlack 31466e8eb206SDavid Matlack /* 3147c4371c2aSSean Christopherson * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS. 3148c50d8ae3SPaolo Bonzini */ 314976cd325eSDavid Matlack static int fast_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code) 3150c50d8ae3SPaolo Bonzini { 3151c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3152c4371c2aSSean Christopherson int ret = RET_PF_INVALID; 3153c50d8ae3SPaolo Bonzini u64 spte = 0ull; 31546e8eb206SDavid Matlack u64 *sptep = NULL; 3155c50d8ae3SPaolo Bonzini uint retry_count = 0; 3156c50d8ae3SPaolo Bonzini 3157c50d8ae3SPaolo Bonzini if (!page_fault_can_be_fast(error_code)) 3158c4371c2aSSean Christopherson return ret; 3159c50d8ae3SPaolo Bonzini 3160c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3161c50d8ae3SPaolo Bonzini 3162c50d8ae3SPaolo Bonzini do { 3163c50d8ae3SPaolo Bonzini u64 new_spte; 3164c50d8ae3SPaolo Bonzini 31656e8eb206SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 31666e8eb206SDavid Matlack sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, gpa, &spte); 31676e8eb206SDavid Matlack else 31686e8eb206SDavid Matlack sptep = fast_pf_get_last_sptep(vcpu, gpa, &spte); 3169c50d8ae3SPaolo Bonzini 3170ec89e643SSean Christopherson if (!is_shadow_present_pte(spte)) 3171ec89e643SSean Christopherson break; 3172ec89e643SSean Christopherson 31736e8eb206SDavid Matlack sp = sptep_to_sp(sptep); 3174c50d8ae3SPaolo Bonzini if (!is_last_spte(spte, sp->role.level)) 3175c50d8ae3SPaolo Bonzini break; 3176c50d8ae3SPaolo Bonzini 3177c50d8ae3SPaolo Bonzini /* 3178c50d8ae3SPaolo Bonzini * Check whether the memory access that caused the fault would 3179c50d8ae3SPaolo Bonzini * still cause it if it were to be performed right now. If not, 3180c50d8ae3SPaolo Bonzini * then this is a spurious fault caused by TLB lazily flushed, 3181c50d8ae3SPaolo Bonzini * or some other CPU has already fixed the PTE after the 3182c50d8ae3SPaolo Bonzini * current CPU took the fault. 3183c50d8ae3SPaolo Bonzini * 3184c50d8ae3SPaolo Bonzini * Need not check the access of upper level table entries since 3185c50d8ae3SPaolo Bonzini * they are always ACC_ALL. 3186c50d8ae3SPaolo Bonzini */ 3187c50d8ae3SPaolo Bonzini if (is_access_allowed(error_code, spte)) { 3188c4371c2aSSean Christopherson ret = RET_PF_SPURIOUS; 3189c50d8ae3SPaolo Bonzini break; 3190c50d8ae3SPaolo Bonzini } 3191c50d8ae3SPaolo Bonzini 3192c50d8ae3SPaolo Bonzini new_spte = spte; 3193c50d8ae3SPaolo Bonzini 3194c50d8ae3SPaolo Bonzini if (is_access_track_spte(spte)) 3195c50d8ae3SPaolo Bonzini new_spte = restore_acc_track_spte(new_spte); 3196c50d8ae3SPaolo Bonzini 3197c50d8ae3SPaolo Bonzini /* 3198c50d8ae3SPaolo Bonzini * Currently, to simplify the code, write-protection can 3199c50d8ae3SPaolo Bonzini * be removed in the fast path only if the SPTE was 3200c50d8ae3SPaolo Bonzini * write-protected for dirty-logging or access tracking. 3201c50d8ae3SPaolo Bonzini */ 3202c50d8ae3SPaolo Bonzini if ((error_code & PFERR_WRITE_MASK) && 3203e6302698SMiaohe Lin spte_can_locklessly_be_made_writable(spte)) { 3204c50d8ae3SPaolo Bonzini new_spte |= PT_WRITABLE_MASK; 3205c50d8ae3SPaolo Bonzini 3206c50d8ae3SPaolo Bonzini /* 3207c50d8ae3SPaolo Bonzini * Do not fix write-permission on the large spte. Since 3208c50d8ae3SPaolo Bonzini * we only dirty the first page into the dirty-bitmap in 3209c50d8ae3SPaolo Bonzini * fast_pf_fix_direct_spte(), other pages are missed 3210c50d8ae3SPaolo Bonzini * if its slot has dirty logging enabled. 3211c50d8ae3SPaolo Bonzini * 3212c50d8ae3SPaolo Bonzini * Instead, we let the slow page fault path create a 3213c50d8ae3SPaolo Bonzini * normal spte to fix the access. 3214c50d8ae3SPaolo Bonzini * 3215c50d8ae3SPaolo Bonzini * See the comments in kvm_arch_commit_memory_region(). 3216c50d8ae3SPaolo Bonzini */ 32173bae0459SSean Christopherson if (sp->role.level > PG_LEVEL_4K) 3218c50d8ae3SPaolo Bonzini break; 3219c50d8ae3SPaolo Bonzini } 3220c50d8ae3SPaolo Bonzini 3221c50d8ae3SPaolo Bonzini /* Verify that the fault can be handled in the fast path */ 3222c50d8ae3SPaolo Bonzini if (new_spte == spte || 3223c50d8ae3SPaolo Bonzini !is_access_allowed(error_code, new_spte)) 3224c50d8ae3SPaolo Bonzini break; 3225c50d8ae3SPaolo Bonzini 3226c50d8ae3SPaolo Bonzini /* 3227c50d8ae3SPaolo Bonzini * Currently, fast page fault only works for direct mapping 3228c50d8ae3SPaolo Bonzini * since the gfn is not stable for indirect shadow page. See 32293ecad8c2SMauro Carvalho Chehab * Documentation/virt/kvm/locking.rst to get more detail. 3230c50d8ae3SPaolo Bonzini */ 32316e8eb206SDavid Matlack if (fast_pf_fix_direct_spte(vcpu, sp, sptep, spte, new_spte)) { 3232c4371c2aSSean Christopherson ret = RET_PF_FIXED; 3233c50d8ae3SPaolo Bonzini break; 3234c4371c2aSSean Christopherson } 3235c50d8ae3SPaolo Bonzini 3236c50d8ae3SPaolo Bonzini if (++retry_count > 4) { 3237c50d8ae3SPaolo Bonzini printk_once(KERN_WARNING 3238c50d8ae3SPaolo Bonzini "kvm: Fast #PF retrying more than 4 times.\n"); 3239c50d8ae3SPaolo Bonzini break; 3240c50d8ae3SPaolo Bonzini } 3241c50d8ae3SPaolo Bonzini 3242c50d8ae3SPaolo Bonzini } while (true); 3243c50d8ae3SPaolo Bonzini 32446e8eb206SDavid Matlack trace_fast_page_fault(vcpu, gpa, error_code, sptep, spte, ret); 3245c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3246c50d8ae3SPaolo Bonzini 3247c4371c2aSSean Christopherson return ret; 3248c50d8ae3SPaolo Bonzini } 3249c50d8ae3SPaolo Bonzini 3250c50d8ae3SPaolo Bonzini static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa, 3251c50d8ae3SPaolo Bonzini struct list_head *invalid_list) 3252c50d8ae3SPaolo Bonzini { 3253c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3254c50d8ae3SPaolo Bonzini 3255c50d8ae3SPaolo Bonzini if (!VALID_PAGE(*root_hpa)) 3256c50d8ae3SPaolo Bonzini return; 3257c50d8ae3SPaolo Bonzini 3258e47c4aeeSSean Christopherson sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK); 325902c00b3aSBen Gardon 3260897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) 32616103bc07SBen Gardon kvm_tdp_mmu_put_root(kvm, sp, false); 326276eb54e7SBen Gardon else if (!--sp->root_count && sp->role.invalid) 3263c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); 3264c50d8ae3SPaolo Bonzini 3265c50d8ae3SPaolo Bonzini *root_hpa = INVALID_PAGE; 3266c50d8ae3SPaolo Bonzini } 3267c50d8ae3SPaolo Bonzini 3268c50d8ae3SPaolo Bonzini /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */ 3269c50d8ae3SPaolo Bonzini void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 3270c50d8ae3SPaolo Bonzini ulong roots_to_free) 3271c50d8ae3SPaolo Bonzini { 32724d710de9SSean Christopherson struct kvm *kvm = vcpu->kvm; 3273c50d8ae3SPaolo Bonzini int i; 3274c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 3275c50d8ae3SPaolo Bonzini bool free_active_root = roots_to_free & KVM_MMU_ROOT_CURRENT; 3276c50d8ae3SPaolo Bonzini 3277c50d8ae3SPaolo Bonzini BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG); 3278c50d8ae3SPaolo Bonzini 3279c50d8ae3SPaolo Bonzini /* Before acquiring the MMU lock, see if we need to do any real work. */ 3280c50d8ae3SPaolo Bonzini if (!(free_active_root && VALID_PAGE(mmu->root_hpa))) { 3281c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3282c50d8ae3SPaolo Bonzini if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) && 3283c50d8ae3SPaolo Bonzini VALID_PAGE(mmu->prev_roots[i].hpa)) 3284c50d8ae3SPaolo Bonzini break; 3285c50d8ae3SPaolo Bonzini 3286c50d8ae3SPaolo Bonzini if (i == KVM_MMU_NUM_PREV_ROOTS) 3287c50d8ae3SPaolo Bonzini return; 3288c50d8ae3SPaolo Bonzini } 3289c50d8ae3SPaolo Bonzini 3290531810caSBen Gardon write_lock(&kvm->mmu_lock); 3291c50d8ae3SPaolo Bonzini 3292c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 3293c50d8ae3SPaolo Bonzini if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) 32944d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, 3295c50d8ae3SPaolo Bonzini &invalid_list); 3296c50d8ae3SPaolo Bonzini 3297c50d8ae3SPaolo Bonzini if (free_active_root) { 3298c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 3299c50d8ae3SPaolo Bonzini (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { 33004d710de9SSean Christopherson mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); 330104d45551SSean Christopherson } else if (mmu->pae_root) { 3302c834e5e4SSean Christopherson for (i = 0; i < 4; ++i) { 3303c834e5e4SSean Christopherson if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) 3304c834e5e4SSean Christopherson continue; 3305c834e5e4SSean Christopherson 3306c834e5e4SSean Christopherson mmu_free_root_page(kvm, &mmu->pae_root[i], 3307c50d8ae3SPaolo Bonzini &invalid_list); 3308c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3309c50d8ae3SPaolo Bonzini } 3310c50d8ae3SPaolo Bonzini } 331104d45551SSean Christopherson mmu->root_hpa = INVALID_PAGE; 3312be01e8e2SSean Christopherson mmu->root_pgd = 0; 3313c50d8ae3SPaolo Bonzini } 3314c50d8ae3SPaolo Bonzini 33154d710de9SSean Christopherson kvm_mmu_commit_zap_page(kvm, &invalid_list); 3316531810caSBen Gardon write_unlock(&kvm->mmu_lock); 3317c50d8ae3SPaolo Bonzini } 3318c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_free_roots); 3319c50d8ae3SPaolo Bonzini 332025b62c62SSean Christopherson void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 332125b62c62SSean Christopherson { 332225b62c62SSean Christopherson unsigned long roots_to_free = 0; 332325b62c62SSean Christopherson hpa_t root_hpa; 332425b62c62SSean Christopherson int i; 332525b62c62SSean Christopherson 332625b62c62SSean Christopherson /* 332725b62c62SSean Christopherson * This should not be called while L2 is active, L2 can't invalidate 332825b62c62SSean Christopherson * _only_ its own roots, e.g. INVVPID unconditionally exits. 332925b62c62SSean Christopherson */ 333025b62c62SSean Christopherson WARN_ON_ONCE(mmu->mmu_role.base.guest_mode); 333125b62c62SSean Christopherson 333225b62c62SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 333325b62c62SSean Christopherson root_hpa = mmu->prev_roots[i].hpa; 333425b62c62SSean Christopherson if (!VALID_PAGE(root_hpa)) 333525b62c62SSean Christopherson continue; 333625b62c62SSean Christopherson 333725b62c62SSean Christopherson if (!to_shadow_page(root_hpa) || 333825b62c62SSean Christopherson to_shadow_page(root_hpa)->role.guest_mode) 333925b62c62SSean Christopherson roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i); 334025b62c62SSean Christopherson } 334125b62c62SSean Christopherson 334225b62c62SSean Christopherson kvm_mmu_free_roots(vcpu, mmu, roots_to_free); 334325b62c62SSean Christopherson } 334425b62c62SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots); 334525b62c62SSean Christopherson 334625b62c62SSean Christopherson 3347c50d8ae3SPaolo Bonzini static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) 3348c50d8ae3SPaolo Bonzini { 3349c50d8ae3SPaolo Bonzini int ret = 0; 3350c50d8ae3SPaolo Bonzini 3351995decb6SVitaly Kuznetsov if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) { 3352c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); 3353c50d8ae3SPaolo Bonzini ret = 1; 3354c50d8ae3SPaolo Bonzini } 3355c50d8ae3SPaolo Bonzini 3356c50d8ae3SPaolo Bonzini return ret; 3357c50d8ae3SPaolo Bonzini } 3358c50d8ae3SPaolo Bonzini 33598123f265SSean Christopherson static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva, 33608123f265SSean Christopherson u8 level, bool direct) 3361c50d8ae3SPaolo Bonzini { 3362c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 33638123f265SSean Christopherson 33648123f265SSean Christopherson sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL); 33658123f265SSean Christopherson ++sp->root_count; 33668123f265SSean Christopherson 33678123f265SSean Christopherson return __pa(sp->spt); 33688123f265SSean Christopherson } 33698123f265SSean Christopherson 33708123f265SSean Christopherson static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) 33718123f265SSean Christopherson { 3372b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 3373b37233c9SSean Christopherson u8 shadow_root_level = mmu->shadow_root_level; 33748123f265SSean Christopherson hpa_t root; 3375c50d8ae3SPaolo Bonzini unsigned i; 33764a38162eSPaolo Bonzini int r; 33774a38162eSPaolo Bonzini 33784a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 33794a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 33804a38162eSPaolo Bonzini if (r < 0) 33814a38162eSPaolo Bonzini goto out_unlock; 3382c50d8ae3SPaolo Bonzini 3383897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(vcpu->kvm)) { 338402c00b3aSBen Gardon root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu); 3385b37233c9SSean Christopherson mmu->root_hpa = root; 338602c00b3aSBen Gardon } else if (shadow_root_level >= PT64_ROOT_4LEVEL) { 33876e6ec584SSean Christopherson root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true); 3388b37233c9SSean Christopherson mmu->root_hpa = root; 33898123f265SSean Christopherson } else if (shadow_root_level == PT32E_ROOT_LEVEL) { 33904a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 33914a38162eSPaolo Bonzini r = -EIO; 33924a38162eSPaolo Bonzini goto out_unlock; 33934a38162eSPaolo Bonzini } 339473ad1606SSean Christopherson 3395c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3396c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 3397c50d8ae3SPaolo Bonzini 33988123f265SSean Christopherson root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 33998123f265SSean Christopherson i << 30, PT32_ROOT_LEVEL, true); 340017e368d9SSean Christopherson mmu->pae_root[i] = root | PT_PRESENT_MASK | 340117e368d9SSean Christopherson shadow_me_mask; 3402c50d8ae3SPaolo Bonzini } 3403b37233c9SSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 340473ad1606SSean Christopherson } else { 340573ad1606SSean Christopherson WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level); 34064a38162eSPaolo Bonzini r = -EIO; 34074a38162eSPaolo Bonzini goto out_unlock; 340873ad1606SSean Christopherson } 34093651c7fcSSean Christopherson 3410be01e8e2SSean Christopherson /* root_pgd is ignored for direct MMUs. */ 3411b37233c9SSean Christopherson mmu->root_pgd = 0; 34124a38162eSPaolo Bonzini out_unlock: 34134a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 34144a38162eSPaolo Bonzini return r; 3415c50d8ae3SPaolo Bonzini } 3416c50d8ae3SPaolo Bonzini 3417c50d8ae3SPaolo Bonzini static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) 3418c50d8ae3SPaolo Bonzini { 3419b37233c9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 34206e0918aeSSean Christopherson u64 pdptrs[4], pm_mask; 3421be01e8e2SSean Christopherson gfn_t root_gfn, root_pgd; 34228123f265SSean Christopherson hpa_t root; 34234a38162eSPaolo Bonzini unsigned i; 34244a38162eSPaolo Bonzini int r; 3425c50d8ae3SPaolo Bonzini 3426b37233c9SSean Christopherson root_pgd = mmu->get_guest_pgd(vcpu); 3427be01e8e2SSean Christopherson root_gfn = root_pgd >> PAGE_SHIFT; 3428c50d8ae3SPaolo Bonzini 3429c50d8ae3SPaolo Bonzini if (mmu_check_root(vcpu, root_gfn)) 3430c50d8ae3SPaolo Bonzini return 1; 3431c50d8ae3SPaolo Bonzini 3432c50d8ae3SPaolo Bonzini /* 34334a38162eSPaolo Bonzini * On SVM, reading PDPTRs might access guest memory, which might fault 34344a38162eSPaolo Bonzini * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock. 34354a38162eSPaolo Bonzini */ 34366e0918aeSSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34376e0918aeSSean Christopherson for (i = 0; i < 4; ++i) { 34386e0918aeSSean Christopherson pdptrs[i] = mmu->get_pdptr(vcpu, i); 34396e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) 34406e0918aeSSean Christopherson continue; 34416e0918aeSSean Christopherson 34426e0918aeSSean Christopherson if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT)) 34436e0918aeSSean Christopherson return 1; 34446e0918aeSSean Christopherson } 34456e0918aeSSean Christopherson } 34466e0918aeSSean Christopherson 3447d501f747SBen Gardon r = alloc_all_memslots_rmaps(vcpu->kvm); 3448d501f747SBen Gardon if (r) 3449d501f747SBen Gardon return r; 3450d501f747SBen Gardon 34514a38162eSPaolo Bonzini write_lock(&vcpu->kvm->mmu_lock); 34524a38162eSPaolo Bonzini r = make_mmu_pages_available(vcpu); 34534a38162eSPaolo Bonzini if (r < 0) 34544a38162eSPaolo Bonzini goto out_unlock; 34554a38162eSPaolo Bonzini 3456c50d8ae3SPaolo Bonzini /* 3457c50d8ae3SPaolo Bonzini * Do we shadow a long mode page table? If so we need to 3458c50d8ae3SPaolo Bonzini * write-protect the guests page table root. 3459c50d8ae3SPaolo Bonzini */ 3460b37233c9SSean Christopherson if (mmu->root_level >= PT64_ROOT_4LEVEL) { 34618123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, 0, 3462b37233c9SSean Christopherson mmu->shadow_root_level, false); 3463b37233c9SSean Christopherson mmu->root_hpa = root; 3464be01e8e2SSean Christopherson goto set_root_pgd; 3465c50d8ae3SPaolo Bonzini } 3466c50d8ae3SPaolo Bonzini 34674a38162eSPaolo Bonzini if (WARN_ON_ONCE(!mmu->pae_root)) { 34684a38162eSPaolo Bonzini r = -EIO; 34694a38162eSPaolo Bonzini goto out_unlock; 34704a38162eSPaolo Bonzini } 347173ad1606SSean Christopherson 3472c50d8ae3SPaolo Bonzini /* 3473c50d8ae3SPaolo Bonzini * We shadow a 32 bit page table. This may be a legacy 2-level 3474c50d8ae3SPaolo Bonzini * or a PAE 3-level page table. In either case we need to be aware that 3475c50d8ae3SPaolo Bonzini * the shadow page table may be a PAE or a long mode page table. 3476c50d8ae3SPaolo Bonzini */ 347717e368d9SSean Christopherson pm_mask = PT_PRESENT_MASK | shadow_me_mask; 3478748e52b9SSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) { 3479c50d8ae3SPaolo Bonzini pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; 3480c50d8ae3SPaolo Bonzini 348103ca4589SSean Christopherson if (WARN_ON_ONCE(!mmu->pml4_root)) { 34824a38162eSPaolo Bonzini r = -EIO; 34834a38162eSPaolo Bonzini goto out_unlock; 34844a38162eSPaolo Bonzini } 348573ad1606SSean Christopherson 348603ca4589SSean Christopherson mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; 348704d45551SSean Christopherson } 348804d45551SSean Christopherson 3489c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3490c834e5e4SSean Christopherson WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); 34916e6ec584SSean Christopherson 3492b37233c9SSean Christopherson if (mmu->root_level == PT32E_ROOT_LEVEL) { 34936e0918aeSSean Christopherson if (!(pdptrs[i] & PT_PRESENT_MASK)) { 3494c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 3495c50d8ae3SPaolo Bonzini continue; 3496c50d8ae3SPaolo Bonzini } 34976e0918aeSSean Christopherson root_gfn = pdptrs[i] >> PAGE_SHIFT; 3498c50d8ae3SPaolo Bonzini } 3499c50d8ae3SPaolo Bonzini 35008123f265SSean Christopherson root = mmu_alloc_root(vcpu, root_gfn, i << 30, 35018123f265SSean Christopherson PT32_ROOT_LEVEL, false); 3502b37233c9SSean Christopherson mmu->pae_root[i] = root | pm_mask; 3503c50d8ae3SPaolo Bonzini } 3504c50d8ae3SPaolo Bonzini 3505ba0a194fSSean Christopherson if (mmu->shadow_root_level == PT64_ROOT_4LEVEL) 350603ca4589SSean Christopherson mmu->root_hpa = __pa(mmu->pml4_root); 3507ba0a194fSSean Christopherson else 3508ba0a194fSSean Christopherson mmu->root_hpa = __pa(mmu->pae_root); 3509c50d8ae3SPaolo Bonzini 3510be01e8e2SSean Christopherson set_root_pgd: 3511b37233c9SSean Christopherson mmu->root_pgd = root_pgd; 35124a38162eSPaolo Bonzini out_unlock: 35134a38162eSPaolo Bonzini write_unlock(&vcpu->kvm->mmu_lock); 3514c50d8ae3SPaolo Bonzini 3515c50d8ae3SPaolo Bonzini return 0; 3516c50d8ae3SPaolo Bonzini } 3517c50d8ae3SPaolo Bonzini 3518748e52b9SSean Christopherson static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) 3519c50d8ae3SPaolo Bonzini { 3520748e52b9SSean Christopherson struct kvm_mmu *mmu = vcpu->arch.mmu; 352103ca4589SSean Christopherson u64 *pml4_root, *pae_root; 3522748e52b9SSean Christopherson 3523748e52b9SSean Christopherson /* 3524748e52b9SSean Christopherson * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP 3525748e52b9SSean Christopherson * tables are allocated and initialized at root creation as there is no 3526748e52b9SSean Christopherson * equivalent level in the guest's NPT to shadow. Allocate the tables 3527748e52b9SSean Christopherson * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. 3528748e52b9SSean Christopherson */ 3529748e52b9SSean Christopherson if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL || 3530748e52b9SSean Christopherson mmu->shadow_root_level < PT64_ROOT_4LEVEL) 3531748e52b9SSean Christopherson return 0; 3532748e52b9SSean Christopherson 3533748e52b9SSean Christopherson /* 3534748e52b9SSean Christopherson * This mess only works with 4-level paging and needs to be updated to 3535748e52b9SSean Christopherson * work with 5-level paging. 3536748e52b9SSean Christopherson */ 3537748e52b9SSean Christopherson if (WARN_ON_ONCE(mmu->shadow_root_level != PT64_ROOT_4LEVEL)) 3538748e52b9SSean Christopherson return -EIO; 3539748e52b9SSean Christopherson 354003ca4589SSean Christopherson if (mmu->pae_root && mmu->pml4_root) 3541748e52b9SSean Christopherson return 0; 3542748e52b9SSean Christopherson 3543748e52b9SSean Christopherson /* 3544748e52b9SSean Christopherson * The special roots should always be allocated in concert. Yell and 3545748e52b9SSean Christopherson * bail if KVM ends up in a state where only one of the roots is valid. 3546748e52b9SSean Christopherson */ 354703ca4589SSean Christopherson if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root)) 3548748e52b9SSean Christopherson return -EIO; 3549748e52b9SSean Christopherson 35504a98623dSSean Christopherson /* 35514a98623dSSean Christopherson * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and 35524a98623dSSean Christopherson * doesn't need to be decrypted. 35534a98623dSSean Christopherson */ 3554748e52b9SSean Christopherson pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 3555748e52b9SSean Christopherson if (!pae_root) 3556748e52b9SSean Christopherson return -ENOMEM; 3557748e52b9SSean Christopherson 355803ca4589SSean Christopherson pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); 355903ca4589SSean Christopherson if (!pml4_root) { 3560748e52b9SSean Christopherson free_page((unsigned long)pae_root); 3561748e52b9SSean Christopherson return -ENOMEM; 3562748e52b9SSean Christopherson } 3563748e52b9SSean Christopherson 3564748e52b9SSean Christopherson mmu->pae_root = pae_root; 356503ca4589SSean Christopherson mmu->pml4_root = pml4_root; 3566748e52b9SSean Christopherson 3567748e52b9SSean Christopherson return 0; 3568c50d8ae3SPaolo Bonzini } 3569c50d8ae3SPaolo Bonzini 3570c50d8ae3SPaolo Bonzini void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) 3571c50d8ae3SPaolo Bonzini { 3572c50d8ae3SPaolo Bonzini int i; 3573c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 3574c50d8ae3SPaolo Bonzini 3575c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map) 3576c50d8ae3SPaolo Bonzini return; 3577c50d8ae3SPaolo Bonzini 3578c50d8ae3SPaolo Bonzini if (!VALID_PAGE(vcpu->arch.mmu->root_hpa)) 3579c50d8ae3SPaolo Bonzini return; 3580c50d8ae3SPaolo Bonzini 3581c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 3582c50d8ae3SPaolo Bonzini 3583c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) { 3584c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->root_hpa; 3585e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3586c50d8ae3SPaolo Bonzini 3587c50d8ae3SPaolo Bonzini /* 3588c50d8ae3SPaolo Bonzini * Even if another CPU was marking the SP as unsync-ed 3589c50d8ae3SPaolo Bonzini * simultaneously, any guest page table changes are not 3590c50d8ae3SPaolo Bonzini * guaranteed to be visible anyway until this VCPU issues a TLB 3591c50d8ae3SPaolo Bonzini * flush strictly after those changes are made. We only need to 3592c50d8ae3SPaolo Bonzini * ensure that the other CPU sets these flags before any actual 3593c50d8ae3SPaolo Bonzini * changes to the page tables are made. The comments in 35940337f585SSean Christopherson * mmu_try_to_unsync_pages() describe what could go wrong if 35950337f585SSean Christopherson * this requirement isn't satisfied. 3596c50d8ae3SPaolo Bonzini */ 3597c50d8ae3SPaolo Bonzini if (!smp_load_acquire(&sp->unsync) && 3598c50d8ae3SPaolo Bonzini !smp_load_acquire(&sp->unsync_children)) 3599c50d8ae3SPaolo Bonzini return; 3600c50d8ae3SPaolo Bonzini 3601531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3602c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3603c50d8ae3SPaolo Bonzini 3604c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3605c50d8ae3SPaolo Bonzini 3606c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3607531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3608c50d8ae3SPaolo Bonzini return; 3609c50d8ae3SPaolo Bonzini } 3610c50d8ae3SPaolo Bonzini 3611531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3612c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); 3613c50d8ae3SPaolo Bonzini 3614c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) { 3615c50d8ae3SPaolo Bonzini hpa_t root = vcpu->arch.mmu->pae_root[i]; 3616c50d8ae3SPaolo Bonzini 3617c834e5e4SSean Christopherson if (IS_VALID_PAE_ROOT(root)) { 3618c50d8ae3SPaolo Bonzini root &= PT64_BASE_ADDR_MASK; 3619e47c4aeeSSean Christopherson sp = to_shadow_page(root); 3620c50d8ae3SPaolo Bonzini mmu_sync_children(vcpu, sp); 3621c50d8ae3SPaolo Bonzini } 3622c50d8ae3SPaolo Bonzini } 3623c50d8ae3SPaolo Bonzini 3624c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); 3625531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3626c50d8ae3SPaolo Bonzini } 3627c50d8ae3SPaolo Bonzini 3628736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gpa_t vaddr, 3629c50d8ae3SPaolo Bonzini u32 access, struct x86_exception *exception) 3630c50d8ae3SPaolo Bonzini { 3631c50d8ae3SPaolo Bonzini if (exception) 3632c50d8ae3SPaolo Bonzini exception->error_code = 0; 3633c50d8ae3SPaolo Bonzini return vaddr; 3634c50d8ae3SPaolo Bonzini } 3635c50d8ae3SPaolo Bonzini 3636736c291cSSean Christopherson static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gpa_t vaddr, 3637c50d8ae3SPaolo Bonzini u32 access, 3638c50d8ae3SPaolo Bonzini struct x86_exception *exception) 3639c50d8ae3SPaolo Bonzini { 3640c50d8ae3SPaolo Bonzini if (exception) 3641c50d8ae3SPaolo Bonzini exception->error_code = 0; 3642c50d8ae3SPaolo Bonzini return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); 3643c50d8ae3SPaolo Bonzini } 3644c50d8ae3SPaolo Bonzini 3645c50d8ae3SPaolo Bonzini static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3646c50d8ae3SPaolo Bonzini { 3647c50d8ae3SPaolo Bonzini /* 3648c50d8ae3SPaolo Bonzini * A nested guest cannot use the MMIO cache if it is using nested 3649c50d8ae3SPaolo Bonzini * page tables, because cr2 is a nGPA while the cache stores GPAs. 3650c50d8ae3SPaolo Bonzini */ 3651c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 3652c50d8ae3SPaolo Bonzini return false; 3653c50d8ae3SPaolo Bonzini 3654c50d8ae3SPaolo Bonzini if (direct) 3655c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gpa(vcpu, addr); 3656c50d8ae3SPaolo Bonzini 3657c50d8ae3SPaolo Bonzini return vcpu_match_mmio_gva(vcpu, addr); 3658c50d8ae3SPaolo Bonzini } 3659c50d8ae3SPaolo Bonzini 366095fb5b02SBen Gardon /* 366195fb5b02SBen Gardon * Return the level of the lowest level SPTE added to sptes. 366295fb5b02SBen Gardon * That SPTE may be non-present. 3663c5c8c7c5SDavid Matlack * 3664c5c8c7c5SDavid Matlack * Must be called between walk_shadow_page_lockless_{begin,end}. 366595fb5b02SBen Gardon */ 366639b4d43eSSean Christopherson static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level) 3667c50d8ae3SPaolo Bonzini { 3668c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 36692aa07893SSean Christopherson int leaf = -1; 367095fb5b02SBen Gardon u64 spte; 3671c50d8ae3SPaolo Bonzini 367239b4d43eSSean Christopherson for (shadow_walk_init(&iterator, vcpu, addr), 367339b4d43eSSean Christopherson *root_level = iterator.level; 3674c50d8ae3SPaolo Bonzini shadow_walk_okay(&iterator); 3675c50d8ae3SPaolo Bonzini __shadow_walk_next(&iterator, spte)) { 367695fb5b02SBen Gardon leaf = iterator.level; 3677c50d8ae3SPaolo Bonzini spte = mmu_spte_get_lockless(iterator.sptep); 3678c50d8ae3SPaolo Bonzini 3679dde81f94SSean Christopherson sptes[leaf] = spte; 3680c50d8ae3SPaolo Bonzini 3681c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3682c50d8ae3SPaolo Bonzini break; 368395fb5b02SBen Gardon } 368495fb5b02SBen Gardon 368595fb5b02SBen Gardon return leaf; 368695fb5b02SBen Gardon } 368795fb5b02SBen Gardon 36889aa41879SSean Christopherson /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */ 368995fb5b02SBen Gardon static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) 369095fb5b02SBen Gardon { 3691dde81f94SSean Christopherson u64 sptes[PT64_ROOT_MAX_LEVEL + 1]; 369295fb5b02SBen Gardon struct rsvd_bits_validate *rsvd_check; 369339b4d43eSSean Christopherson int root, leaf, level; 369495fb5b02SBen Gardon bool reserved = false; 369595fb5b02SBen Gardon 3696c5c8c7c5SDavid Matlack walk_shadow_page_lockless_begin(vcpu); 3697c5c8c7c5SDavid Matlack 369863c0cac9SDavid Matlack if (is_tdp_mmu(vcpu->arch.mmu)) 369939b4d43eSSean Christopherson leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root); 370095fb5b02SBen Gardon else 370139b4d43eSSean Christopherson leaf = get_walk(vcpu, addr, sptes, &root); 370295fb5b02SBen Gardon 3703c5c8c7c5SDavid Matlack walk_shadow_page_lockless_end(vcpu); 3704c5c8c7c5SDavid Matlack 37052aa07893SSean Christopherson if (unlikely(leaf < 0)) { 37062aa07893SSean Christopherson *sptep = 0ull; 37072aa07893SSean Christopherson return reserved; 37082aa07893SSean Christopherson } 37092aa07893SSean Christopherson 37109aa41879SSean Christopherson *sptep = sptes[leaf]; 37119aa41879SSean Christopherson 37129aa41879SSean Christopherson /* 37139aa41879SSean Christopherson * Skip reserved bits checks on the terminal leaf if it's not a valid 37149aa41879SSean Christopherson * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by 37159aa41879SSean Christopherson * design, always have reserved bits set. The purpose of the checks is 37169aa41879SSean Christopherson * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. 37179aa41879SSean Christopherson */ 37189aa41879SSean Christopherson if (!is_shadow_present_pte(sptes[leaf])) 37199aa41879SSean Christopherson leaf++; 372095fb5b02SBen Gardon 372195fb5b02SBen Gardon rsvd_check = &vcpu->arch.mmu->shadow_zero_check; 372295fb5b02SBen Gardon 37239aa41879SSean Christopherson for (level = root; level >= leaf; level--) 3724961f8445SSean Christopherson reserved |= is_rsvd_spte(rsvd_check, sptes[level], level); 3725c50d8ae3SPaolo Bonzini 3726c50d8ae3SPaolo Bonzini if (reserved) { 3727bb4cdf3aSSean Christopherson pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", 3728c50d8ae3SPaolo Bonzini __func__, addr); 372995fb5b02SBen Gardon for (level = root; level >= leaf; level--) 3730bb4cdf3aSSean Christopherson pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", 3731bb4cdf3aSSean Christopherson sptes[level], level, 3732961f8445SSean Christopherson get_rsvd_bits(rsvd_check, sptes[level], level)); 3733c50d8ae3SPaolo Bonzini } 3734ddce6208SSean Christopherson 3735c50d8ae3SPaolo Bonzini return reserved; 3736c50d8ae3SPaolo Bonzini } 3737c50d8ae3SPaolo Bonzini 3738c50d8ae3SPaolo Bonzini static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) 3739c50d8ae3SPaolo Bonzini { 3740c50d8ae3SPaolo Bonzini u64 spte; 3741c50d8ae3SPaolo Bonzini bool reserved; 3742c50d8ae3SPaolo Bonzini 3743c50d8ae3SPaolo Bonzini if (mmio_info_in_cache(vcpu, addr, direct)) 3744c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3745c50d8ae3SPaolo Bonzini 374695fb5b02SBen Gardon reserved = get_mmio_spte(vcpu, addr, &spte); 3747c50d8ae3SPaolo Bonzini if (WARN_ON(reserved)) 3748c50d8ae3SPaolo Bonzini return -EINVAL; 3749c50d8ae3SPaolo Bonzini 3750c50d8ae3SPaolo Bonzini if (is_mmio_spte(spte)) { 3751c50d8ae3SPaolo Bonzini gfn_t gfn = get_mmio_spte_gfn(spte); 37520a2b64c5SBen Gardon unsigned int access = get_mmio_spte_access(spte); 3753c50d8ae3SPaolo Bonzini 3754c50d8ae3SPaolo Bonzini if (!check_mmio_spte(vcpu, spte)) 3755c50d8ae3SPaolo Bonzini return RET_PF_INVALID; 3756c50d8ae3SPaolo Bonzini 3757c50d8ae3SPaolo Bonzini if (direct) 3758c50d8ae3SPaolo Bonzini addr = 0; 3759c50d8ae3SPaolo Bonzini 3760c50d8ae3SPaolo Bonzini trace_handle_mmio_page_fault(addr, gfn, access); 3761c50d8ae3SPaolo Bonzini vcpu_cache_mmio_info(vcpu, addr, gfn, access); 3762c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3763c50d8ae3SPaolo Bonzini } 3764c50d8ae3SPaolo Bonzini 3765c50d8ae3SPaolo Bonzini /* 3766c50d8ae3SPaolo Bonzini * If the page table is zapped by other cpus, let CPU fault again on 3767c50d8ae3SPaolo Bonzini * the address. 3768c50d8ae3SPaolo Bonzini */ 3769c50d8ae3SPaolo Bonzini return RET_PF_RETRY; 3770c50d8ae3SPaolo Bonzini } 3771c50d8ae3SPaolo Bonzini 3772c50d8ae3SPaolo Bonzini static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, 3773c50d8ae3SPaolo Bonzini u32 error_code, gfn_t gfn) 3774c50d8ae3SPaolo Bonzini { 3775c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) 3776c50d8ae3SPaolo Bonzini return false; 3777c50d8ae3SPaolo Bonzini 3778c50d8ae3SPaolo Bonzini if (!(error_code & PFERR_PRESENT_MASK) || 3779c50d8ae3SPaolo Bonzini !(error_code & PFERR_WRITE_MASK)) 3780c50d8ae3SPaolo Bonzini return false; 3781c50d8ae3SPaolo Bonzini 3782c50d8ae3SPaolo Bonzini /* 3783c50d8ae3SPaolo Bonzini * guest is writing the page which is write tracked which can 3784c50d8ae3SPaolo Bonzini * not be fixed by page fault handler. 3785c50d8ae3SPaolo Bonzini */ 3786c50d8ae3SPaolo Bonzini if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) 3787c50d8ae3SPaolo Bonzini return true; 3788c50d8ae3SPaolo Bonzini 3789c50d8ae3SPaolo Bonzini return false; 3790c50d8ae3SPaolo Bonzini } 3791c50d8ae3SPaolo Bonzini 3792c50d8ae3SPaolo Bonzini static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) 3793c50d8ae3SPaolo Bonzini { 3794c50d8ae3SPaolo Bonzini struct kvm_shadow_walk_iterator iterator; 3795c50d8ae3SPaolo Bonzini u64 spte; 3796c50d8ae3SPaolo Bonzini 3797c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_begin(vcpu); 3798c50d8ae3SPaolo Bonzini for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { 3799c50d8ae3SPaolo Bonzini clear_sp_write_flooding_count(iterator.sptep); 3800c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(spte)) 3801c50d8ae3SPaolo Bonzini break; 3802c50d8ae3SPaolo Bonzini } 3803c50d8ae3SPaolo Bonzini walk_shadow_page_lockless_end(vcpu); 3804c50d8ae3SPaolo Bonzini } 3805c50d8ae3SPaolo Bonzini 3806e8c22266SVitaly Kuznetsov static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 38079f1a8526SSean Christopherson gfn_t gfn) 3808c50d8ae3SPaolo Bonzini { 3809c50d8ae3SPaolo Bonzini struct kvm_arch_async_pf arch; 3810c50d8ae3SPaolo Bonzini 3811c50d8ae3SPaolo Bonzini arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; 3812c50d8ae3SPaolo Bonzini arch.gfn = gfn; 3813c50d8ae3SPaolo Bonzini arch.direct_map = vcpu->arch.mmu->direct_map; 3814d8dd54e0SSean Christopherson arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu); 3815c50d8ae3SPaolo Bonzini 38169f1a8526SSean Christopherson return kvm_setup_async_pf(vcpu, cr2_or_gpa, 38179f1a8526SSean Christopherson kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); 3818c50d8ae3SPaolo Bonzini } 3819c50d8ae3SPaolo Bonzini 3820c50d8ae3SPaolo Bonzini static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, 38214a42d848SDavid Stevens gpa_t cr2_or_gpa, kvm_pfn_t *pfn, hva_t *hva, 38224a42d848SDavid Stevens bool write, bool *writable) 3823c50d8ae3SPaolo Bonzini { 3824c36b7150SPaolo Bonzini struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); 3825c50d8ae3SPaolo Bonzini bool async; 3826c50d8ae3SPaolo Bonzini 3827e0c37868SSean Christopherson /* 3828e0c37868SSean Christopherson * Retry the page fault if the gfn hit a memslot that is being deleted 3829e0c37868SSean Christopherson * or moved. This ensures any existing SPTEs for the old memslot will 3830e0c37868SSean Christopherson * be zapped before KVM inserts a new MMIO SPTE for the gfn. 3831e0c37868SSean Christopherson */ 3832e0c37868SSean Christopherson if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) 3833e0c37868SSean Christopherson return true; 3834e0c37868SSean Christopherson 3835c36b7150SPaolo Bonzini /* Don't expose private memslots to L2. */ 3836c36b7150SPaolo Bonzini if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { 3837c50d8ae3SPaolo Bonzini *pfn = KVM_PFN_NOSLOT; 3838c583eed6SSean Christopherson *writable = false; 3839c50d8ae3SPaolo Bonzini return false; 3840c50d8ae3SPaolo Bonzini } 3841c50d8ae3SPaolo Bonzini 3842c50d8ae3SPaolo Bonzini async = false; 38434a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, 38444a42d848SDavid Stevens write, writable, hva); 3845c50d8ae3SPaolo Bonzini if (!async) 3846c50d8ae3SPaolo Bonzini return false; /* *pfn has correct page already */ 3847c50d8ae3SPaolo Bonzini 3848c50d8ae3SPaolo Bonzini if (!prefault && kvm_can_do_async_pf(vcpu)) { 38499f1a8526SSean Christopherson trace_kvm_try_async_get_page(cr2_or_gpa, gfn); 3850c50d8ae3SPaolo Bonzini if (kvm_find_async_pf_gfn(vcpu, gfn)) { 38519f1a8526SSean Christopherson trace_kvm_async_pf_doublefault(cr2_or_gpa, gfn); 3852c50d8ae3SPaolo Bonzini kvm_make_request(KVM_REQ_APF_HALT, vcpu); 3853c50d8ae3SPaolo Bonzini return true; 38549f1a8526SSean Christopherson } else if (kvm_arch_setup_async_pf(vcpu, cr2_or_gpa, gfn)) 3855c50d8ae3SPaolo Bonzini return true; 3856c50d8ae3SPaolo Bonzini } 3857c50d8ae3SPaolo Bonzini 38584a42d848SDavid Stevens *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, 38594a42d848SDavid Stevens write, writable, hva); 3860c50d8ae3SPaolo Bonzini return false; 3861c50d8ae3SPaolo Bonzini } 3862c50d8ae3SPaolo Bonzini 38630f90e1c1SSean Christopherson static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 38640f90e1c1SSean Christopherson bool prefault, int max_level, bool is_tdp) 3865c50d8ae3SPaolo Bonzini { 386663c0cac9SDavid Matlack bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); 3867367fd790SSean Christopherson bool write = error_code & PFERR_WRITE_MASK; 38680f90e1c1SSean Christopherson bool map_writable; 3869c50d8ae3SPaolo Bonzini 38700f90e1c1SSean Christopherson gfn_t gfn = gpa >> PAGE_SHIFT; 38710f90e1c1SSean Christopherson unsigned long mmu_seq; 38720f90e1c1SSean Christopherson kvm_pfn_t pfn; 38734a42d848SDavid Stevens hva_t hva; 387483f06fa7SSean Christopherson int r; 3875c50d8ae3SPaolo Bonzini 3876c50d8ae3SPaolo Bonzini if (page_fault_handle_page_track(vcpu, error_code, gfn)) 3877c50d8ae3SPaolo Bonzini return RET_PF_EMULATE; 3878c50d8ae3SPaolo Bonzini 3879c4371c2aSSean Christopherson r = fast_page_fault(vcpu, gpa, error_code); 3880c4371c2aSSean Christopherson if (r != RET_PF_INVALID) 3881c4371c2aSSean Christopherson return r; 388283291445SSean Christopherson 3883378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, false); 3884c50d8ae3SPaolo Bonzini if (r) 3885c50d8ae3SPaolo Bonzini return r; 3886c50d8ae3SPaolo Bonzini 3887367fd790SSean Christopherson mmu_seq = vcpu->kvm->mmu_notifier_seq; 3888367fd790SSean Christopherson smp_rmb(); 3889367fd790SSean Christopherson 38904a42d848SDavid Stevens if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, &hva, 38914a42d848SDavid Stevens write, &map_writable)) 3892367fd790SSean Christopherson return RET_PF_RETRY; 3893367fd790SSean Christopherson 38940f90e1c1SSean Christopherson if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) 3895367fd790SSean Christopherson return r; 3896367fd790SSean Christopherson 3897367fd790SSean Christopherson r = RET_PF_RETRY; 3898a2855afcSBen Gardon 38990b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3900a2855afcSBen Gardon read_lock(&vcpu->kvm->mmu_lock); 3901a2855afcSBen Gardon else 3902531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 3903a2855afcSBen Gardon 39044a42d848SDavid Stevens if (!is_noslot_pfn(pfn) && mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, hva)) 3905367fd790SSean Christopherson goto out_unlock; 39067bd7ded6SSean Christopherson r = make_mmu_pages_available(vcpu); 39077bd7ded6SSean Christopherson if (r) 3908367fd790SSean Christopherson goto out_unlock; 3909bb18842eSBen Gardon 39100b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3911bb18842eSBen Gardon r = kvm_tdp_mmu_map(vcpu, gpa, error_code, map_writable, max_level, 3912bb18842eSBen Gardon pfn, prefault); 3913bb18842eSBen Gardon else 39146c2fd34fSSean Christopherson r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, 39156c2fd34fSSean Christopherson prefault, is_tdp); 39160f90e1c1SSean Christopherson 3917367fd790SSean Christopherson out_unlock: 39180b873fd7SDavid Matlack if (is_tdp_mmu_fault) 3919a2855afcSBen Gardon read_unlock(&vcpu->kvm->mmu_lock); 3920a2855afcSBen Gardon else 3921531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 3922367fd790SSean Christopherson kvm_release_pfn_clean(pfn); 3923367fd790SSean Christopherson return r; 3924c50d8ae3SPaolo Bonzini } 3925c50d8ae3SPaolo Bonzini 39260f90e1c1SSean Christopherson static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, 39270f90e1c1SSean Christopherson u32 error_code, bool prefault) 39280f90e1c1SSean Christopherson { 39290f90e1c1SSean Christopherson pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); 39300f90e1c1SSean Christopherson 39310f90e1c1SSean Christopherson /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ 39320f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, 39333bae0459SSean Christopherson PG_LEVEL_2M, false); 39340f90e1c1SSean Christopherson } 39350f90e1c1SSean Christopherson 3936c50d8ae3SPaolo Bonzini int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, 3937c50d8ae3SPaolo Bonzini u64 fault_address, char *insn, int insn_len) 3938c50d8ae3SPaolo Bonzini { 3939c50d8ae3SPaolo Bonzini int r = 1; 39409ce372b3SVitaly Kuznetsov u32 flags = vcpu->arch.apf.host_apf_flags; 3941c50d8ae3SPaolo Bonzini 3942736c291cSSean Christopherson #ifndef CONFIG_X86_64 3943736c291cSSean Christopherson /* A 64-bit CR2 should be impossible on 32-bit KVM. */ 3944736c291cSSean Christopherson if (WARN_ON_ONCE(fault_address >> 32)) 3945736c291cSSean Christopherson return -EFAULT; 3946736c291cSSean Christopherson #endif 3947736c291cSSean Christopherson 3948c50d8ae3SPaolo Bonzini vcpu->arch.l1tf_flush_l1d = true; 39499ce372b3SVitaly Kuznetsov if (!flags) { 3950c50d8ae3SPaolo Bonzini trace_kvm_page_fault(fault_address, error_code); 3951c50d8ae3SPaolo Bonzini 3952c50d8ae3SPaolo Bonzini if (kvm_event_needs_reinjection(vcpu)) 3953c50d8ae3SPaolo Bonzini kvm_mmu_unprotect_page_virt(vcpu, fault_address); 3954c50d8ae3SPaolo Bonzini r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn, 3955c50d8ae3SPaolo Bonzini insn_len); 39569ce372b3SVitaly Kuznetsov } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) { 395768fd66f1SVitaly Kuznetsov vcpu->arch.apf.host_apf_flags = 0; 3958c50d8ae3SPaolo Bonzini local_irq_disable(); 39596bca69adSThomas Gleixner kvm_async_pf_task_wait_schedule(fault_address); 3960c50d8ae3SPaolo Bonzini local_irq_enable(); 39619ce372b3SVitaly Kuznetsov } else { 39629ce372b3SVitaly Kuznetsov WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags); 3963c50d8ae3SPaolo Bonzini } 39649ce372b3SVitaly Kuznetsov 3965c50d8ae3SPaolo Bonzini return r; 3966c50d8ae3SPaolo Bonzini } 3967c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_handle_page_fault); 3968c50d8ae3SPaolo Bonzini 39697a02674dSSean Christopherson int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, 3970c50d8ae3SPaolo Bonzini bool prefault) 3971c50d8ae3SPaolo Bonzini { 3972cb9b88c6SSean Christopherson int max_level; 3973c50d8ae3SPaolo Bonzini 3974e662ec3eSSean Christopherson for (max_level = KVM_MAX_HUGEPAGE_LEVEL; 39753bae0459SSean Christopherson max_level > PG_LEVEL_4K; 3976cb9b88c6SSean Christopherson max_level--) { 3977cb9b88c6SSean Christopherson int page_num = KVM_PAGES_PER_HPAGE(max_level); 39780f90e1c1SSean Christopherson gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1); 3979c50d8ae3SPaolo Bonzini 3980cb9b88c6SSean Christopherson if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num)) 3981cb9b88c6SSean Christopherson break; 3982c50d8ae3SPaolo Bonzini } 3983c50d8ae3SPaolo Bonzini 39840f90e1c1SSean Christopherson return direct_page_fault(vcpu, gpa, error_code, prefault, 39850f90e1c1SSean Christopherson max_level, true); 3986c50d8ae3SPaolo Bonzini } 3987c50d8ae3SPaolo Bonzini 398884a16226SSean Christopherson static void nonpaging_init_context(struct kvm_mmu *context) 3989c50d8ae3SPaolo Bonzini { 3990c50d8ae3SPaolo Bonzini context->page_fault = nonpaging_page_fault; 3991c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 3992c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 39935efac074SPaolo Bonzini context->invlpg = NULL; 3994c50d8ae3SPaolo Bonzini context->direct_map = true; 3995c50d8ae3SPaolo Bonzini } 3996c50d8ae3SPaolo Bonzini 3997be01e8e2SSean Christopherson static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd, 39980be44352SSean Christopherson union kvm_mmu_page_role role) 39990be44352SSean Christopherson { 4000be01e8e2SSean Christopherson return (role.direct || pgd == root->pgd) && 4001e47c4aeeSSean Christopherson VALID_PAGE(root->hpa) && to_shadow_page(root->hpa) && 4002e47c4aeeSSean Christopherson role.word == to_shadow_page(root->hpa)->role.word; 40030be44352SSean Christopherson } 40040be44352SSean Christopherson 4005c50d8ae3SPaolo Bonzini /* 4006be01e8e2SSean Christopherson * Find out if a previously cached root matching the new pgd/role is available. 4007c50d8ae3SPaolo Bonzini * The current root is also inserted into the cache. 4008c50d8ae3SPaolo Bonzini * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is 4009c50d8ae3SPaolo Bonzini * returned. 4010c50d8ae3SPaolo Bonzini * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and 4011c50d8ae3SPaolo Bonzini * false is returned. This root should now be freed by the caller. 4012c50d8ae3SPaolo Bonzini */ 4013be01e8e2SSean Christopherson static bool cached_root_available(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4014c50d8ae3SPaolo Bonzini union kvm_mmu_page_role new_role) 4015c50d8ae3SPaolo Bonzini { 4016c50d8ae3SPaolo Bonzini uint i; 4017c50d8ae3SPaolo Bonzini struct kvm_mmu_root_info root; 4018c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4019c50d8ae3SPaolo Bonzini 4020be01e8e2SSean Christopherson root.pgd = mmu->root_pgd; 4021c50d8ae3SPaolo Bonzini root.hpa = mmu->root_hpa; 4022c50d8ae3SPaolo Bonzini 4023be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 40240be44352SSean Christopherson return true; 40250be44352SSean Christopherson 4026c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 4027c50d8ae3SPaolo Bonzini swap(root, mmu->prev_roots[i]); 4028c50d8ae3SPaolo Bonzini 4029be01e8e2SSean Christopherson if (is_root_usable(&root, new_pgd, new_role)) 4030c50d8ae3SPaolo Bonzini break; 4031c50d8ae3SPaolo Bonzini } 4032c50d8ae3SPaolo Bonzini 4033c50d8ae3SPaolo Bonzini mmu->root_hpa = root.hpa; 4034be01e8e2SSean Christopherson mmu->root_pgd = root.pgd; 4035c50d8ae3SPaolo Bonzini 4036c50d8ae3SPaolo Bonzini return i < KVM_MMU_NUM_PREV_ROOTS; 4037c50d8ae3SPaolo Bonzini } 4038c50d8ae3SPaolo Bonzini 4039be01e8e2SSean Christopherson static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4040b869855bSSean Christopherson union kvm_mmu_page_role new_role) 4041c50d8ae3SPaolo Bonzini { 4042c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 4043c50d8ae3SPaolo Bonzini 4044c50d8ae3SPaolo Bonzini /* 4045c50d8ae3SPaolo Bonzini * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid 4046c50d8ae3SPaolo Bonzini * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs 4047c50d8ae3SPaolo Bonzini * later if necessary. 4048c50d8ae3SPaolo Bonzini */ 4049c50d8ae3SPaolo Bonzini if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && 4050b869855bSSean Christopherson mmu->root_level >= PT64_ROOT_4LEVEL) 4051fe9304d3SVitaly Kuznetsov return cached_root_available(vcpu, new_pgd, new_role); 4052c50d8ae3SPaolo Bonzini 4053c50d8ae3SPaolo Bonzini return false; 4054c50d8ae3SPaolo Bonzini } 4055c50d8ae3SPaolo Bonzini 4056be01e8e2SSean Christopherson static void __kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, 4057b5129100SSean Christopherson union kvm_mmu_page_role new_role) 4058c50d8ae3SPaolo Bonzini { 4059be01e8e2SSean Christopherson if (!fast_pgd_switch(vcpu, new_pgd, new_role)) { 4060b869855bSSean Christopherson kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT); 4061b869855bSSean Christopherson return; 4062c50d8ae3SPaolo Bonzini } 4063c50d8ae3SPaolo Bonzini 4064c50d8ae3SPaolo Bonzini /* 4065b869855bSSean Christopherson * It's possible that the cached previous root page is obsolete because 4066b869855bSSean Christopherson * of a change in the MMU generation number. However, changing the 4067b869855bSSean Christopherson * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will 4068b869855bSSean Christopherson * free the root set here and allocate a new one. 4069b869855bSSean Christopherson */ 4070b869855bSSean Christopherson kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu); 4071b869855bSSean Christopherson 4072b5129100SSean Christopherson if (force_flush_and_sync_on_reuse) { 4073b869855bSSean Christopherson kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 4074b869855bSSean Christopherson kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 4075b5129100SSean Christopherson } 4076b869855bSSean Christopherson 4077b869855bSSean Christopherson /* 4078b869855bSSean Christopherson * The last MMIO access's GVA and GPA are cached in the VCPU. When 4079b869855bSSean Christopherson * switching to a new CR3, that GVA->GPA mapping may no longer be 4080b869855bSSean Christopherson * valid. So clear any cached MMIO info even when we don't need to sync 4081b869855bSSean Christopherson * the shadow page tables. 4082c50d8ae3SPaolo Bonzini */ 4083c50d8ae3SPaolo Bonzini vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); 4084c50d8ae3SPaolo Bonzini 4085daa5b6c1SBen Gardon /* 4086daa5b6c1SBen Gardon * If this is a direct root page, it doesn't have a write flooding 4087daa5b6c1SBen Gardon * count. Otherwise, clear the write flooding count. 4088daa5b6c1SBen Gardon */ 4089daa5b6c1SBen Gardon if (!new_role.direct) 4090daa5b6c1SBen Gardon __clear_sp_write_flooding_count( 4091daa5b6c1SBen Gardon to_shadow_page(vcpu->arch.mmu->root_hpa)); 4092c50d8ae3SPaolo Bonzini } 4093c50d8ae3SPaolo Bonzini 4094b5129100SSean Christopherson void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd) 4095c50d8ae3SPaolo Bonzini { 4096b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_pgd, kvm_mmu_calc_root_page_role(vcpu)); 4097c50d8ae3SPaolo Bonzini } 4098be01e8e2SSean Christopherson EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); 4099c50d8ae3SPaolo Bonzini 4100c50d8ae3SPaolo Bonzini static unsigned long get_cr3(struct kvm_vcpu *vcpu) 4101c50d8ae3SPaolo Bonzini { 4102c50d8ae3SPaolo Bonzini return kvm_read_cr3(vcpu); 4103c50d8ae3SPaolo Bonzini } 4104c50d8ae3SPaolo Bonzini 4105c50d8ae3SPaolo Bonzini static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, 41060a2b64c5SBen Gardon unsigned int access, int *nr_present) 4107c50d8ae3SPaolo Bonzini { 4108c50d8ae3SPaolo Bonzini if (unlikely(is_mmio_spte(*sptep))) { 4109c50d8ae3SPaolo Bonzini if (gfn != get_mmio_spte_gfn(*sptep)) { 4110c50d8ae3SPaolo Bonzini mmu_spte_clear_no_track(sptep); 4111c50d8ae3SPaolo Bonzini return true; 4112c50d8ae3SPaolo Bonzini } 4113c50d8ae3SPaolo Bonzini 4114c50d8ae3SPaolo Bonzini (*nr_present)++; 4115c50d8ae3SPaolo Bonzini mark_mmio_spte(vcpu, sptep, gfn, access); 4116c50d8ae3SPaolo Bonzini return true; 4117c50d8ae3SPaolo Bonzini } 4118c50d8ae3SPaolo Bonzini 4119c50d8ae3SPaolo Bonzini return false; 4120c50d8ae3SPaolo Bonzini } 4121c50d8ae3SPaolo Bonzini 4122c50d8ae3SPaolo Bonzini #define PTTYPE_EPT 18 /* arbitrary */ 4123c50d8ae3SPaolo Bonzini #define PTTYPE PTTYPE_EPT 4124c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4125c50d8ae3SPaolo Bonzini #undef PTTYPE 4126c50d8ae3SPaolo Bonzini 4127c50d8ae3SPaolo Bonzini #define PTTYPE 64 4128c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4129c50d8ae3SPaolo Bonzini #undef PTTYPE 4130c50d8ae3SPaolo Bonzini 4131c50d8ae3SPaolo Bonzini #define PTTYPE 32 4132c50d8ae3SPaolo Bonzini #include "paging_tmpl.h" 4133c50d8ae3SPaolo Bonzini #undef PTTYPE 4134c50d8ae3SPaolo Bonzini 4135c50d8ae3SPaolo Bonzini static void 4136b705a277SSean Christopherson __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check, 41375b7f575cSSean Christopherson u64 pa_bits_rsvd, int level, bool nx, bool gbpages, 4138c50d8ae3SPaolo Bonzini bool pse, bool amd) 4139c50d8ae3SPaolo Bonzini { 4140c50d8ae3SPaolo Bonzini u64 gbpages_bit_rsvd = 0; 4141c50d8ae3SPaolo Bonzini u64 nonleaf_bit8_rsvd = 0; 41425b7f575cSSean Christopherson u64 high_bits_rsvd; 4143c50d8ae3SPaolo Bonzini 4144c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = 0; 4145c50d8ae3SPaolo Bonzini 4146c50d8ae3SPaolo Bonzini if (!gbpages) 4147c50d8ae3SPaolo Bonzini gbpages_bit_rsvd = rsvd_bits(7, 7); 4148c50d8ae3SPaolo Bonzini 41495b7f575cSSean Christopherson if (level == PT32E_ROOT_LEVEL) 41505b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62); 41515b7f575cSSean Christopherson else 41525b7f575cSSean Christopherson high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 41535b7f575cSSean Christopherson 41545b7f575cSSean Christopherson /* Note, NX doesn't exist in PDPTEs, this is handled below. */ 41555b7f575cSSean Christopherson if (!nx) 41565b7f575cSSean Christopherson high_bits_rsvd |= rsvd_bits(63, 63); 41575b7f575cSSean Christopherson 4158c50d8ae3SPaolo Bonzini /* 4159c50d8ae3SPaolo Bonzini * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 4160c50d8ae3SPaolo Bonzini * leaf entries) on AMD CPUs only. 4161c50d8ae3SPaolo Bonzini */ 4162c50d8ae3SPaolo Bonzini if (amd) 4163c50d8ae3SPaolo Bonzini nonleaf_bit8_rsvd = rsvd_bits(8, 8); 4164c50d8ae3SPaolo Bonzini 4165c50d8ae3SPaolo Bonzini switch (level) { 4166c50d8ae3SPaolo Bonzini case PT32_ROOT_LEVEL: 4167c50d8ae3SPaolo Bonzini /* no rsvd bits for 2 level 4K page table entries */ 4168c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][1] = 0; 4169c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0] = 0; 4170c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4171c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4172c50d8ae3SPaolo Bonzini 4173c50d8ae3SPaolo Bonzini if (!pse) { 4174c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = 0; 4175c50d8ae3SPaolo Bonzini break; 4176c50d8ae3SPaolo Bonzini } 4177c50d8ae3SPaolo Bonzini 4178c50d8ae3SPaolo Bonzini if (is_cpuid_PSE36()) 4179c50d8ae3SPaolo Bonzini /* 36bits PSE 4MB page */ 4180c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); 4181c50d8ae3SPaolo Bonzini else 4182c50d8ae3SPaolo Bonzini /* 32 bits PSE 4MB page */ 4183c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); 4184c50d8ae3SPaolo Bonzini break; 4185c50d8ae3SPaolo Bonzini case PT32E_ROOT_LEVEL: 41865b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | 41875b7f575cSSean Christopherson high_bits_rsvd | 41885b7f575cSSean Christopherson rsvd_bits(5, 8) | 41895b7f575cSSean Christopherson rsvd_bits(1, 2); /* PDPTE */ 41905b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ 41915b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ 41925b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4193c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4194c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4195c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4196c50d8ae3SPaolo Bonzini break; 4197c50d8ae3SPaolo Bonzini case PT64_ROOT_5LEVEL: 41985b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | 41995b7f575cSSean Christopherson nonleaf_bit8_rsvd | 42005b7f575cSSean Christopherson rsvd_bits(7, 7); 4201c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = 4202c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][4]; 4203df561f66SGustavo A. R. Silva fallthrough; 4204c50d8ae3SPaolo Bonzini case PT64_ROOT_4LEVEL: 42055b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | 42065b7f575cSSean Christopherson nonleaf_bit8_rsvd | 42075b7f575cSSean Christopherson rsvd_bits(7, 7); 42085b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | 42095b7f575cSSean Christopherson gbpages_bit_rsvd; 42105b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; 42115b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4212c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = 4213c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][3]; 42145b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | 42155b7f575cSSean Christopherson gbpages_bit_rsvd | 4216c50d8ae3SPaolo Bonzini rsvd_bits(13, 29); 42175b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | 4218c50d8ae3SPaolo Bonzini rsvd_bits(13, 20); /* large page */ 4219c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = 4220c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[0][0]; 4221c50d8ae3SPaolo Bonzini break; 4222c50d8ae3SPaolo Bonzini } 4223c50d8ae3SPaolo Bonzini } 4224c50d8ae3SPaolo Bonzini 422527de9250SSean Christopherson static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu) 422627de9250SSean Christopherson { 422727de9250SSean Christopherson /* 422827de9250SSean Christopherson * If TDP is enabled, let the guest use GBPAGES if they're supported in 422927de9250SSean Christopherson * hardware. The hardware page walker doesn't let KVM disable GBPAGES, 423027de9250SSean Christopherson * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA 423127de9250SSean Christopherson * walk for performance and complexity reasons. Not to mention KVM 423227de9250SSean Christopherson * _can't_ solve the problem because GVA->GPA walks aren't visible to 423327de9250SSean Christopherson * KVM once a TDP translation is installed. Mimic hardware behavior so 423427de9250SSean Christopherson * that KVM's is at least consistent, i.e. doesn't randomly inject #PF. 423527de9250SSean Christopherson */ 423627de9250SSean Christopherson return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) : 423727de9250SSean Christopherson guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES); 423827de9250SSean Christopherson } 423927de9250SSean Christopherson 4240c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 4241c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4242c50d8ae3SPaolo Bonzini { 4243b705a277SSean Christopherson __reset_rsvds_bits_mask(&context->guest_rsvd_check, 42445b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, 424590599c28SSean Christopherson context->root_level, is_efer_nx(context), 424627de9250SSean Christopherson guest_can_use_gbpages(vcpu), 42474e9c0d80SSean Christopherson is_cr4_pse(context), 424823493d0aSSean Christopherson guest_cpuid_is_amd_or_hygon(vcpu)); 4249c50d8ae3SPaolo Bonzini } 4250c50d8ae3SPaolo Bonzini 4251c50d8ae3SPaolo Bonzini static void 4252c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, 42535b7f575cSSean Christopherson u64 pa_bits_rsvd, bool execonly) 4254c50d8ae3SPaolo Bonzini { 42555b7f575cSSean Christopherson u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51); 4256c50d8ae3SPaolo Bonzini u64 bad_mt_xwr; 4257c50d8ae3SPaolo Bonzini 42585b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); 42595b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); 42605b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6); 42615b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6); 42625b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; 4263c50d8ae3SPaolo Bonzini 4264c50d8ae3SPaolo Bonzini /* large page */ 4265c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; 4266c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; 42675b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29); 42685b7f575cSSean Christopherson rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20); 4269c50d8ae3SPaolo Bonzini rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; 4270c50d8ae3SPaolo Bonzini 4271c50d8ae3SPaolo Bonzini bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ 4272c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ 4273c50d8ae3SPaolo Bonzini bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ 4274c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ 4275c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ 4276c50d8ae3SPaolo Bonzini if (!execonly) { 4277c50d8ae3SPaolo Bonzini /* bits 0..2 must not be 100 unless VMX capabilities allow it */ 4278c50d8ae3SPaolo Bonzini bad_mt_xwr |= REPEAT_BYTE(1ull << 4); 4279c50d8ae3SPaolo Bonzini } 4280c50d8ae3SPaolo Bonzini rsvd_check->bad_mt_xwr = bad_mt_xwr; 4281c50d8ae3SPaolo Bonzini } 4282c50d8ae3SPaolo Bonzini 4283c50d8ae3SPaolo Bonzini static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, 4284c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4285c50d8ae3SPaolo Bonzini { 4286c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, 42875b7f575cSSean Christopherson vcpu->arch.reserved_gpa_bits, execonly); 4288c50d8ae3SPaolo Bonzini } 4289c50d8ae3SPaolo Bonzini 42906f8e65a6SSean Christopherson static inline u64 reserved_hpa_bits(void) 42916f8e65a6SSean Christopherson { 42926f8e65a6SSean Christopherson return rsvd_bits(shadow_phys_bits, 63); 42936f8e65a6SSean Christopherson } 42946f8e65a6SSean Christopherson 4295c50d8ae3SPaolo Bonzini /* 4296c50d8ae3SPaolo Bonzini * the page table on host is the shadow page table for the page 4297c50d8ae3SPaolo Bonzini * table in guest or amd nested guest, its mmu features completely 4298c50d8ae3SPaolo Bonzini * follow the features in guest. 4299c50d8ae3SPaolo Bonzini */ 430016be1d12SSean Christopherson static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 430116be1d12SSean Christopherson struct kvm_mmu *context) 4302c50d8ae3SPaolo Bonzini { 4303112022bdSSean Christopherson /* 4304112022bdSSean Christopherson * KVM uses NX when TDP is disabled to handle a variety of scenarios, 4305112022bdSSean Christopherson * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and 4306112022bdSSean Christopherson * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0. 4307112022bdSSean Christopherson * The iTLB multi-hit workaround can be toggled at any time, so assume 4308112022bdSSean Christopherson * NX can be used by any non-nested shadow MMU to avoid having to reset 4309112022bdSSean Christopherson * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled. 4310112022bdSSean Christopherson */ 431190599c28SSean Christopherson bool uses_nx = is_efer_nx(context) || !tdp_enabled; 43128c985b2dSSean Christopherson 43138c985b2dSSean Christopherson /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */ 43148c985b2dSSean Christopherson bool is_amd = true; 43158c985b2dSSean Christopherson /* KVM doesn't use 2-level page tables for the shadow MMU. */ 43168c985b2dSSean Christopherson bool is_pse = false; 4317c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4318c50d8ae3SPaolo Bonzini int i; 4319c50d8ae3SPaolo Bonzini 43208c985b2dSSean Christopherson WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL); 43218c985b2dSSean Christopherson 4322c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4323b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4324c50d8ae3SPaolo Bonzini context->shadow_root_level, uses_nx, 432527de9250SSean Christopherson guest_can_use_gbpages(vcpu), is_pse, is_amd); 4326c50d8ae3SPaolo Bonzini 4327c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4328c50d8ae3SPaolo Bonzini return; 4329c50d8ae3SPaolo Bonzini 4330c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4331c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4332c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4333c50d8ae3SPaolo Bonzini } 4334c50d8ae3SPaolo Bonzini 4335c50d8ae3SPaolo Bonzini } 4336c50d8ae3SPaolo Bonzini 4337c50d8ae3SPaolo Bonzini static inline bool boot_cpu_is_amd(void) 4338c50d8ae3SPaolo Bonzini { 4339c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!tdp_enabled); 4340c50d8ae3SPaolo Bonzini return shadow_x_mask == 0; 4341c50d8ae3SPaolo Bonzini } 4342c50d8ae3SPaolo Bonzini 4343c50d8ae3SPaolo Bonzini /* 4344c50d8ae3SPaolo Bonzini * the direct page table on host, use as much mmu features as 4345c50d8ae3SPaolo Bonzini * possible, however, kvm currently does not do execution-protection. 4346c50d8ae3SPaolo Bonzini */ 4347c50d8ae3SPaolo Bonzini static void 4348c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4349c50d8ae3SPaolo Bonzini struct kvm_mmu *context) 4350c50d8ae3SPaolo Bonzini { 4351c50d8ae3SPaolo Bonzini struct rsvd_bits_validate *shadow_zero_check; 4352c50d8ae3SPaolo Bonzini int i; 4353c50d8ae3SPaolo Bonzini 4354c50d8ae3SPaolo Bonzini shadow_zero_check = &context->shadow_zero_check; 4355c50d8ae3SPaolo Bonzini 4356c50d8ae3SPaolo Bonzini if (boot_cpu_is_amd()) 4357b705a277SSean Christopherson __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(), 4358c50d8ae3SPaolo Bonzini context->shadow_root_level, false, 4359c50d8ae3SPaolo Bonzini boot_cpu_has(X86_FEATURE_GBPAGES), 43608c985b2dSSean Christopherson false, true); 4361c50d8ae3SPaolo Bonzini else 4362c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(shadow_zero_check, 43636f8e65a6SSean Christopherson reserved_hpa_bits(), false); 4364c50d8ae3SPaolo Bonzini 4365c50d8ae3SPaolo Bonzini if (!shadow_me_mask) 4366c50d8ae3SPaolo Bonzini return; 4367c50d8ae3SPaolo Bonzini 4368c50d8ae3SPaolo Bonzini for (i = context->shadow_root_level; --i >= 0;) { 4369c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; 4370c50d8ae3SPaolo Bonzini shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; 4371c50d8ae3SPaolo Bonzini } 4372c50d8ae3SPaolo Bonzini } 4373c50d8ae3SPaolo Bonzini 4374c50d8ae3SPaolo Bonzini /* 4375c50d8ae3SPaolo Bonzini * as the comments in reset_shadow_zero_bits_mask() except it 4376c50d8ae3SPaolo Bonzini * is the shadow page table for intel nested guest. 4377c50d8ae3SPaolo Bonzini */ 4378c50d8ae3SPaolo Bonzini static void 4379c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 4380c50d8ae3SPaolo Bonzini struct kvm_mmu *context, bool execonly) 4381c50d8ae3SPaolo Bonzini { 4382c50d8ae3SPaolo Bonzini __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 43836f8e65a6SSean Christopherson reserved_hpa_bits(), execonly); 4384c50d8ae3SPaolo Bonzini } 4385c50d8ae3SPaolo Bonzini 4386c50d8ae3SPaolo Bonzini #define BYTE_MASK(access) \ 4387c50d8ae3SPaolo Bonzini ((1 & (access) ? 2 : 0) | \ 4388c50d8ae3SPaolo Bonzini (2 & (access) ? 4 : 0) | \ 4389c50d8ae3SPaolo Bonzini (3 & (access) ? 8 : 0) | \ 4390c50d8ae3SPaolo Bonzini (4 & (access) ? 16 : 0) | \ 4391c50d8ae3SPaolo Bonzini (5 & (access) ? 32 : 0) | \ 4392c50d8ae3SPaolo Bonzini (6 & (access) ? 64 : 0) | \ 4393c50d8ae3SPaolo Bonzini (7 & (access) ? 128 : 0)) 4394c50d8ae3SPaolo Bonzini 4395c50d8ae3SPaolo Bonzini 4396c596f147SSean Christopherson static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept) 4397c50d8ae3SPaolo Bonzini { 4398c50d8ae3SPaolo Bonzini unsigned byte; 4399c50d8ae3SPaolo Bonzini 4400c50d8ae3SPaolo Bonzini const u8 x = BYTE_MASK(ACC_EXEC_MASK); 4401c50d8ae3SPaolo Bonzini const u8 w = BYTE_MASK(ACC_WRITE_MASK); 4402c50d8ae3SPaolo Bonzini const u8 u = BYTE_MASK(ACC_USER_MASK); 4403c50d8ae3SPaolo Bonzini 4404c596f147SSean Christopherson bool cr4_smep = is_cr4_smep(mmu); 4405c596f147SSean Christopherson bool cr4_smap = is_cr4_smap(mmu); 4406c596f147SSean Christopherson bool cr0_wp = is_cr0_wp(mmu); 440790599c28SSean Christopherson bool efer_nx = is_efer_nx(mmu); 4408c50d8ae3SPaolo Bonzini 4409c50d8ae3SPaolo Bonzini for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 4410c50d8ae3SPaolo Bonzini unsigned pfec = byte << 1; 4411c50d8ae3SPaolo Bonzini 4412c50d8ae3SPaolo Bonzini /* 4413c50d8ae3SPaolo Bonzini * Each "*f" variable has a 1 bit for each UWX value 4414c50d8ae3SPaolo Bonzini * that causes a fault with the given PFEC. 4415c50d8ae3SPaolo Bonzini */ 4416c50d8ae3SPaolo Bonzini 4417c50d8ae3SPaolo Bonzini /* Faults from writes to non-writable pages */ 4418c50d8ae3SPaolo Bonzini u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0; 4419c50d8ae3SPaolo Bonzini /* Faults from user mode accesses to supervisor pages */ 4420c50d8ae3SPaolo Bonzini u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0; 4421c50d8ae3SPaolo Bonzini /* Faults from fetches of non-executable pages*/ 4422c50d8ae3SPaolo Bonzini u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; 4423c50d8ae3SPaolo Bonzini /* Faults from kernel mode fetches of user pages */ 4424c50d8ae3SPaolo Bonzini u8 smepf = 0; 4425c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses of user pages */ 4426c50d8ae3SPaolo Bonzini u8 smapf = 0; 4427c50d8ae3SPaolo Bonzini 4428c50d8ae3SPaolo Bonzini if (!ept) { 4429c50d8ae3SPaolo Bonzini /* Faults from kernel mode accesses to user pages */ 4430c50d8ae3SPaolo Bonzini u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u; 4431c50d8ae3SPaolo Bonzini 4432c50d8ae3SPaolo Bonzini /* Not really needed: !nx will cause pte.nx to fault */ 443390599c28SSean Christopherson if (!efer_nx) 4434c50d8ae3SPaolo Bonzini ff = 0; 4435c50d8ae3SPaolo Bonzini 4436c50d8ae3SPaolo Bonzini /* Allow supervisor writes if !cr0.wp */ 4437c50d8ae3SPaolo Bonzini if (!cr0_wp) 4438c50d8ae3SPaolo Bonzini wf = (pfec & PFERR_USER_MASK) ? wf : 0; 4439c50d8ae3SPaolo Bonzini 4440c50d8ae3SPaolo Bonzini /* Disallow supervisor fetches of user code if cr4.smep */ 4441c50d8ae3SPaolo Bonzini if (cr4_smep) 4442c50d8ae3SPaolo Bonzini smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0; 4443c50d8ae3SPaolo Bonzini 4444c50d8ae3SPaolo Bonzini /* 4445c50d8ae3SPaolo Bonzini * SMAP:kernel-mode data accesses from user-mode 4446c50d8ae3SPaolo Bonzini * mappings should fault. A fault is considered 4447c50d8ae3SPaolo Bonzini * as a SMAP violation if all of the following 4448c50d8ae3SPaolo Bonzini * conditions are true: 4449c50d8ae3SPaolo Bonzini * - X86_CR4_SMAP is set in CR4 4450c50d8ae3SPaolo Bonzini * - A user page is accessed 4451c50d8ae3SPaolo Bonzini * - The access is not a fetch 4452c50d8ae3SPaolo Bonzini * - Page fault in kernel mode 4453c50d8ae3SPaolo Bonzini * - if CPL = 3 or X86_EFLAGS_AC is clear 4454c50d8ae3SPaolo Bonzini * 4455c50d8ae3SPaolo Bonzini * Here, we cover the first three conditions. 4456c50d8ae3SPaolo Bonzini * The fourth is computed dynamically in permission_fault(); 4457c50d8ae3SPaolo Bonzini * PFERR_RSVD_MASK bit will be set in PFEC if the access is 4458c50d8ae3SPaolo Bonzini * *not* subject to SMAP restrictions. 4459c50d8ae3SPaolo Bonzini */ 4460c50d8ae3SPaolo Bonzini if (cr4_smap) 4461c50d8ae3SPaolo Bonzini smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf; 4462c50d8ae3SPaolo Bonzini } 4463c50d8ae3SPaolo Bonzini 4464c50d8ae3SPaolo Bonzini mmu->permissions[byte] = ff | uf | wf | smepf | smapf; 4465c50d8ae3SPaolo Bonzini } 4466c50d8ae3SPaolo Bonzini } 4467c50d8ae3SPaolo Bonzini 4468c50d8ae3SPaolo Bonzini /* 4469c50d8ae3SPaolo Bonzini * PKU is an additional mechanism by which the paging controls access to 4470c50d8ae3SPaolo Bonzini * user-mode addresses based on the value in the PKRU register. Protection 4471c50d8ae3SPaolo Bonzini * key violations are reported through a bit in the page fault error code. 4472c50d8ae3SPaolo Bonzini * Unlike other bits of the error code, the PK bit is not known at the 4473c50d8ae3SPaolo Bonzini * call site of e.g. gva_to_gpa; it must be computed directly in 4474c50d8ae3SPaolo Bonzini * permission_fault based on two bits of PKRU, on some machine state (CR4, 4475c50d8ae3SPaolo Bonzini * CR0, EFER, CPL), and on other bits of the error code and the page tables. 4476c50d8ae3SPaolo Bonzini * 4477c50d8ae3SPaolo Bonzini * In particular the following conditions come from the error code, the 4478c50d8ae3SPaolo Bonzini * page tables and the machine state: 4479c50d8ae3SPaolo Bonzini * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 4480c50d8ae3SPaolo Bonzini * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) 4481c50d8ae3SPaolo Bonzini * - PK is always zero if U=0 in the page tables 4482c50d8ae3SPaolo Bonzini * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. 4483c50d8ae3SPaolo Bonzini * 4484c50d8ae3SPaolo Bonzini * The PKRU bitmask caches the result of these four conditions. The error 4485c50d8ae3SPaolo Bonzini * code (minus the P bit) and the page table's U bit form an index into the 4486c50d8ae3SPaolo Bonzini * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed 4487c50d8ae3SPaolo Bonzini * with the two bits of the PKRU register corresponding to the protection key. 4488c50d8ae3SPaolo Bonzini * For the first three conditions above the bits will be 00, thus masking 4489c50d8ae3SPaolo Bonzini * away both AD and WD. For all reads or if the last condition holds, WD 4490c50d8ae3SPaolo Bonzini * only will be masked away. 4491c50d8ae3SPaolo Bonzini */ 44922e4c0661SSean Christopherson static void update_pkru_bitmask(struct kvm_mmu *mmu) 4493c50d8ae3SPaolo Bonzini { 4494c50d8ae3SPaolo Bonzini unsigned bit; 4495c50d8ae3SPaolo Bonzini bool wp; 4496c50d8ae3SPaolo Bonzini 44972e4c0661SSean Christopherson if (!is_cr4_pke(mmu)) { 4498c50d8ae3SPaolo Bonzini mmu->pkru_mask = 0; 4499c50d8ae3SPaolo Bonzini return; 4500c50d8ae3SPaolo Bonzini } 4501c50d8ae3SPaolo Bonzini 45022e4c0661SSean Christopherson wp = is_cr0_wp(mmu); 4503c50d8ae3SPaolo Bonzini 4504c50d8ae3SPaolo Bonzini for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { 4505c50d8ae3SPaolo Bonzini unsigned pfec, pkey_bits; 4506c50d8ae3SPaolo Bonzini bool check_pkey, check_write, ff, uf, wf, pte_user; 4507c50d8ae3SPaolo Bonzini 4508c50d8ae3SPaolo Bonzini pfec = bit << 1; 4509c50d8ae3SPaolo Bonzini ff = pfec & PFERR_FETCH_MASK; 4510c50d8ae3SPaolo Bonzini uf = pfec & PFERR_USER_MASK; 4511c50d8ae3SPaolo Bonzini wf = pfec & PFERR_WRITE_MASK; 4512c50d8ae3SPaolo Bonzini 4513c50d8ae3SPaolo Bonzini /* PFEC.RSVD is replaced by ACC_USER_MASK. */ 4514c50d8ae3SPaolo Bonzini pte_user = pfec & PFERR_RSVD_MASK; 4515c50d8ae3SPaolo Bonzini 4516c50d8ae3SPaolo Bonzini /* 4517c50d8ae3SPaolo Bonzini * Only need to check the access which is not an 4518c50d8ae3SPaolo Bonzini * instruction fetch and is to a user page. 4519c50d8ae3SPaolo Bonzini */ 4520c50d8ae3SPaolo Bonzini check_pkey = (!ff && pte_user); 4521c50d8ae3SPaolo Bonzini /* 4522c50d8ae3SPaolo Bonzini * write access is controlled by PKRU if it is a 4523c50d8ae3SPaolo Bonzini * user access or CR0.WP = 1. 4524c50d8ae3SPaolo Bonzini */ 4525c50d8ae3SPaolo Bonzini check_write = check_pkey && wf && (uf || wp); 4526c50d8ae3SPaolo Bonzini 4527c50d8ae3SPaolo Bonzini /* PKRU.AD stops both read and write access. */ 4528c50d8ae3SPaolo Bonzini pkey_bits = !!check_pkey; 4529c50d8ae3SPaolo Bonzini /* PKRU.WD stops write access. */ 4530c50d8ae3SPaolo Bonzini pkey_bits |= (!!check_write) << 1; 4531c50d8ae3SPaolo Bonzini 4532c50d8ae3SPaolo Bonzini mmu->pkru_mask |= (pkey_bits & 3) << pfec; 4533c50d8ae3SPaolo Bonzini } 4534c50d8ae3SPaolo Bonzini } 4535c50d8ae3SPaolo Bonzini 4536533f9a4bSSean Christopherson static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu, 4537533f9a4bSSean Christopherson struct kvm_mmu *mmu) 4538c50d8ae3SPaolo Bonzini { 4539533f9a4bSSean Christopherson if (!is_cr0_pg(mmu)) 4540533f9a4bSSean Christopherson return; 4541c50d8ae3SPaolo Bonzini 4542533f9a4bSSean Christopherson reset_rsvds_bits_mask(vcpu, mmu); 4543533f9a4bSSean Christopherson update_permission_bitmask(mmu, false); 4544533f9a4bSSean Christopherson update_pkru_bitmask(mmu); 4545c50d8ae3SPaolo Bonzini } 4546c50d8ae3SPaolo Bonzini 4547fe660f72SSean Christopherson static void paging64_init_context(struct kvm_mmu *context) 4548c50d8ae3SPaolo Bonzini { 4549c50d8ae3SPaolo Bonzini context->page_fault = paging64_page_fault; 4550c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4551c50d8ae3SPaolo Bonzini context->sync_page = paging64_sync_page; 4552c50d8ae3SPaolo Bonzini context->invlpg = paging64_invlpg; 4553c50d8ae3SPaolo Bonzini context->direct_map = false; 4554c50d8ae3SPaolo Bonzini } 4555c50d8ae3SPaolo Bonzini 455684a16226SSean Christopherson static void paging32_init_context(struct kvm_mmu *context) 4557c50d8ae3SPaolo Bonzini { 4558c50d8ae3SPaolo Bonzini context->page_fault = paging32_page_fault; 4559c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4560c50d8ae3SPaolo Bonzini context->sync_page = paging32_sync_page; 4561c50d8ae3SPaolo Bonzini context->invlpg = paging32_invlpg; 4562c50d8ae3SPaolo Bonzini context->direct_map = false; 4563c50d8ae3SPaolo Bonzini } 4564c50d8ae3SPaolo Bonzini 45658626c120SSean Christopherson static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu, 45668626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 4567c50d8ae3SPaolo Bonzini { 4568c50d8ae3SPaolo Bonzini union kvm_mmu_extended_role ext = {0}; 4569c50d8ae3SPaolo Bonzini 4570ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4571ca8d664fSSean Christopherson ext.cr0_pg = 1; 45728626c120SSean Christopherson ext.cr4_pae = ____is_cr4_pae(regs); 45738626c120SSean Christopherson ext.cr4_smep = ____is_cr4_smep(regs); 45748626c120SSean Christopherson ext.cr4_smap = ____is_cr4_smap(regs); 45758626c120SSean Christopherson ext.cr4_pse = ____is_cr4_pse(regs); 457684c679f5SSean Christopherson 457784c679f5SSean Christopherson /* PKEY and LA57 are active iff long mode is active. */ 457884c679f5SSean Christopherson ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs); 457984c679f5SSean Christopherson ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs); 4580ca8d664fSSean Christopherson } 4581c50d8ae3SPaolo Bonzini 4582c50d8ae3SPaolo Bonzini ext.valid = 1; 4583c50d8ae3SPaolo Bonzini 4584c50d8ae3SPaolo Bonzini return ext; 4585c50d8ae3SPaolo Bonzini } 4586c50d8ae3SPaolo Bonzini 4587c50d8ae3SPaolo Bonzini static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu, 45888626c120SSean Christopherson struct kvm_mmu_role_regs *regs, 4589c50d8ae3SPaolo Bonzini bool base_only) 4590c50d8ae3SPaolo Bonzini { 4591c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4592c50d8ae3SPaolo Bonzini 4593c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4594ca8d664fSSean Christopherson if (____is_cr0_pg(regs)) { 4595167f8a5cSSean Christopherson role.base.efer_nx = ____is_efer_nx(regs); 45968626c120SSean Christopherson role.base.cr0_wp = ____is_cr0_wp(regs); 4597ca8d664fSSean Christopherson } 4598c50d8ae3SPaolo Bonzini role.base.smm = is_smm(vcpu); 4599c50d8ae3SPaolo Bonzini role.base.guest_mode = is_guest_mode(vcpu); 4600c50d8ae3SPaolo Bonzini 4601c50d8ae3SPaolo Bonzini if (base_only) 4602c50d8ae3SPaolo Bonzini return role; 4603c50d8ae3SPaolo Bonzini 46048626c120SSean Christopherson role.ext = kvm_calc_mmu_role_ext(vcpu, regs); 4605c50d8ae3SPaolo Bonzini 4606c50d8ae3SPaolo Bonzini return role; 4607c50d8ae3SPaolo Bonzini } 4608c50d8ae3SPaolo Bonzini 4609d468d94bSSean Christopherson static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu) 4610d468d94bSSean Christopherson { 4611d468d94bSSean Christopherson /* Use 5-level TDP if and only if it's useful/necessary. */ 461283013059SSean Christopherson if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48) 4613d468d94bSSean Christopherson return 4; 4614d468d94bSSean Christopherson 461583013059SSean Christopherson return max_tdp_level; 4616d468d94bSSean Christopherson } 4617d468d94bSSean Christopherson 4618c50d8ae3SPaolo Bonzini static union kvm_mmu_role 46198626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, 46208626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4621c50d8ae3SPaolo Bonzini { 46228626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4623c50d8ae3SPaolo Bonzini 4624c50d8ae3SPaolo Bonzini role.base.ad_disabled = (shadow_accessed_mask == 0); 4625d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 4626c50d8ae3SPaolo Bonzini role.base.direct = true; 4627c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4628c50d8ae3SPaolo Bonzini 4629c50d8ae3SPaolo Bonzini return role; 4630c50d8ae3SPaolo Bonzini } 4631c50d8ae3SPaolo Bonzini 4632c50d8ae3SPaolo Bonzini static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) 4633c50d8ae3SPaolo Bonzini { 46348c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 46358626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4636c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 46378626c120SSean Christopherson kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, false); 4638c50d8ae3SPaolo Bonzini 4639c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4640c50d8ae3SPaolo Bonzini return; 4641c50d8ae3SPaolo Bonzini 4642c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 46437a02674dSSean Christopherson context->page_fault = kvm_tdp_page_fault; 4644c50d8ae3SPaolo Bonzini context->sync_page = nonpaging_sync_page; 46455efac074SPaolo Bonzini context->invlpg = NULL; 4646d468d94bSSean Christopherson context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu); 4647c50d8ae3SPaolo Bonzini context->direct_map = true; 4648d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4649c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4650c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4651f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(®s); 4652c50d8ae3SPaolo Bonzini 465336f26787SSean Christopherson if (!is_cr0_pg(context)) 4654c50d8ae3SPaolo Bonzini context->gva_to_gpa = nonpaging_gva_to_gpa; 465536f26787SSean Christopherson else if (is_cr4_pae(context)) 4656c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging64_gva_to_gpa; 4657f4bd6f73SSean Christopherson else 4658c50d8ae3SPaolo Bonzini context->gva_to_gpa = paging32_gva_to_gpa; 4659c50d8ae3SPaolo Bonzini 4660533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4661c50d8ae3SPaolo Bonzini reset_tdp_shadow_zero_bits_mask(vcpu, context); 4662c50d8ae3SPaolo Bonzini } 4663c50d8ae3SPaolo Bonzini 4664c50d8ae3SPaolo Bonzini static union kvm_mmu_role 46658626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu, 46668626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 4667c50d8ae3SPaolo Bonzini { 46688626c120SSean Christopherson union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only); 4669c50d8ae3SPaolo Bonzini 46708626c120SSean Christopherson role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs); 46718626c120SSean Christopherson role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs); 4672ca8d664fSSean Christopherson role.base.gpte_is_8_bytes = ____is_cr0_pg(regs) && ____is_cr4_pae(regs); 4673c50d8ae3SPaolo Bonzini 467459505b55SSean Christopherson return role; 467559505b55SSean Christopherson } 467659505b55SSean Christopherson 467759505b55SSean Christopherson static union kvm_mmu_role 46788626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, 46798626c120SSean Christopherson struct kvm_mmu_role_regs *regs, bool base_only) 468059505b55SSean Christopherson { 468159505b55SSean Christopherson union kvm_mmu_role role = 46828626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, base_only); 468359505b55SSean Christopherson 46848626c120SSean Christopherson role.base.direct = !____is_cr0_pg(regs); 468559505b55SSean Christopherson 46868626c120SSean Christopherson if (!____is_efer_lma(regs)) 4687c50d8ae3SPaolo Bonzini role.base.level = PT32E_ROOT_LEVEL; 46888626c120SSean Christopherson else if (____is_cr4_la57(regs)) 4689c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_5LEVEL; 4690c50d8ae3SPaolo Bonzini else 4691c50d8ae3SPaolo Bonzini role.base.level = PT64_ROOT_4LEVEL; 4692c50d8ae3SPaolo Bonzini 4693c50d8ae3SPaolo Bonzini return role; 4694c50d8ae3SPaolo Bonzini } 4695c50d8ae3SPaolo Bonzini 46968c008659SPaolo Bonzini static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 4697594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs, 46988c008659SPaolo Bonzini union kvm_mmu_role new_role) 4699c50d8ae3SPaolo Bonzini { 470018db1b17SSean Christopherson if (new_role.as_u64 == context->mmu_role.as_u64) 470118db1b17SSean Christopherson return; 4702c50d8ae3SPaolo Bonzini 4703c50d8ae3SPaolo Bonzini context->mmu_role.as_u64 = new_role.as_u64; 470418db1b17SSean Christopherson 470536f26787SSean Christopherson if (!is_cr0_pg(context)) 470684a16226SSean Christopherson nonpaging_init_context(context); 470736f26787SSean Christopherson else if (is_cr4_pae(context)) 4708fe660f72SSean Christopherson paging64_init_context(context); 4709c50d8ae3SPaolo Bonzini else 471084a16226SSean Christopherson paging32_init_context(context); 4711f4bd6f73SSean Christopherson context->root_level = role_regs_to_root_level(regs); 4712c50d8ae3SPaolo Bonzini 4713533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, context); 4714d555f705SSean Christopherson context->shadow_root_level = new_role.base.level; 4715d555f705SSean Christopherson 4716c50d8ae3SPaolo Bonzini reset_shadow_zero_bits_mask(vcpu, context); 4717c50d8ae3SPaolo Bonzini } 47180f04a2acSVitaly Kuznetsov 4719594e91a1SSean Christopherson static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, 4720594e91a1SSean Christopherson struct kvm_mmu_role_regs *regs) 47210f04a2acSVitaly Kuznetsov { 47228c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 47230f04a2acSVitaly Kuznetsov union kvm_mmu_role new_role = 47248626c120SSean Christopherson kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false); 47250f04a2acSVitaly Kuznetsov 4726594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, regs, new_role); 47270f04a2acSVitaly Kuznetsov } 47280f04a2acSVitaly Kuznetsov 472959505b55SSean Christopherson static union kvm_mmu_role 47308626c120SSean Christopherson kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu, 47318626c120SSean Christopherson struct kvm_mmu_role_regs *regs) 473259505b55SSean Christopherson { 473359505b55SSean Christopherson union kvm_mmu_role role = 47348626c120SSean Christopherson kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 473559505b55SSean Christopherson 473659505b55SSean Christopherson role.base.direct = false; 4737d468d94bSSean Christopherson role.base.level = kvm_mmu_get_tdp_level(vcpu); 473859505b55SSean Christopherson 473959505b55SSean Christopherson return role; 474059505b55SSean Christopherson } 474159505b55SSean Christopherson 4742dbc4739bSSean Christopherson void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, 4743dbc4739bSSean Christopherson unsigned long cr4, u64 efer, gpa_t nested_cr3) 47440f04a2acSVitaly Kuznetsov { 47458c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4746594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = { 4747594e91a1SSean Christopherson .cr0 = cr0, 4748594e91a1SSean Christopherson .cr4 = cr4, 4749594e91a1SSean Christopherson .efer = efer, 4750594e91a1SSean Christopherson }; 47518626c120SSean Christopherson union kvm_mmu_role new_role; 47520f04a2acSVitaly Kuznetsov 47538626c120SSean Christopherson new_role = kvm_calc_shadow_npt_root_page_role(vcpu, ®s); 4754a506fdd2SVitaly Kuznetsov 4755b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base); 4756a3322d5cSSean Christopherson 4757594e91a1SSean Christopherson shadow_mmu_init_context(vcpu, context, ®s, new_role); 47580f04a2acSVitaly Kuznetsov } 47590f04a2acSVitaly Kuznetsov EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); 4760c50d8ae3SPaolo Bonzini 4761c50d8ae3SPaolo Bonzini static union kvm_mmu_role 4762c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty, 4763bb1fcc70SSean Christopherson bool execonly, u8 level) 4764c50d8ae3SPaolo Bonzini { 4765c50d8ae3SPaolo Bonzini union kvm_mmu_role role = {0}; 4766c50d8ae3SPaolo Bonzini 4767c50d8ae3SPaolo Bonzini /* SMM flag is inherited from root_mmu */ 4768c50d8ae3SPaolo Bonzini role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm; 4769c50d8ae3SPaolo Bonzini 4770bb1fcc70SSean Christopherson role.base.level = level; 4771c50d8ae3SPaolo Bonzini role.base.gpte_is_8_bytes = true; 4772c50d8ae3SPaolo Bonzini role.base.direct = false; 4773c50d8ae3SPaolo Bonzini role.base.ad_disabled = !accessed_dirty; 4774c50d8ae3SPaolo Bonzini role.base.guest_mode = true; 4775c50d8ae3SPaolo Bonzini role.base.access = ACC_ALL; 4776c50d8ae3SPaolo Bonzini 4777cd6767c3SSean Christopherson /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */ 4778cd6767c3SSean Christopherson role.ext.word = 0; 4779c50d8ae3SPaolo Bonzini role.ext.execonly = execonly; 4780cd6767c3SSean Christopherson role.ext.valid = 1; 4781c50d8ae3SPaolo Bonzini 4782c50d8ae3SPaolo Bonzini return role; 4783c50d8ae3SPaolo Bonzini } 4784c50d8ae3SPaolo Bonzini 4785c50d8ae3SPaolo Bonzini void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, 4786c50d8ae3SPaolo Bonzini bool accessed_dirty, gpa_t new_eptp) 4787c50d8ae3SPaolo Bonzini { 47888c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.guest_mmu; 4789bb1fcc70SSean Christopherson u8 level = vmx_eptp_page_walk_level(new_eptp); 4790c50d8ae3SPaolo Bonzini union kvm_mmu_role new_role = 4791c50d8ae3SPaolo Bonzini kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty, 4792bb1fcc70SSean Christopherson execonly, level); 4793c50d8ae3SPaolo Bonzini 4794b5129100SSean Christopherson __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base); 4795c50d8ae3SPaolo Bonzini 4796c50d8ae3SPaolo Bonzini if (new_role.as_u64 == context->mmu_role.as_u64) 4797c50d8ae3SPaolo Bonzini return; 4798c50d8ae3SPaolo Bonzini 479918db1b17SSean Christopherson context->mmu_role.as_u64 = new_role.as_u64; 480018db1b17SSean Christopherson 4801bb1fcc70SSean Christopherson context->shadow_root_level = level; 4802c50d8ae3SPaolo Bonzini 4803c50d8ae3SPaolo Bonzini context->ept_ad = accessed_dirty; 4804c50d8ae3SPaolo Bonzini context->page_fault = ept_page_fault; 4805c50d8ae3SPaolo Bonzini context->gva_to_gpa = ept_gva_to_gpa; 4806c50d8ae3SPaolo Bonzini context->sync_page = ept_sync_page; 4807c50d8ae3SPaolo Bonzini context->invlpg = ept_invlpg; 4808bb1fcc70SSean Christopherson context->root_level = level; 4809c50d8ae3SPaolo Bonzini context->direct_map = false; 4810c50d8ae3SPaolo Bonzini 4811c596f147SSean Christopherson update_permission_bitmask(context, true); 48122e4c0661SSean Christopherson update_pkru_bitmask(context); 4813c50d8ae3SPaolo Bonzini reset_rsvds_bits_mask_ept(vcpu, context, execonly); 4814c50d8ae3SPaolo Bonzini reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); 4815c50d8ae3SPaolo Bonzini } 4816c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); 4817c50d8ae3SPaolo Bonzini 4818c50d8ae3SPaolo Bonzini static void init_kvm_softmmu(struct kvm_vcpu *vcpu) 4819c50d8ae3SPaolo Bonzini { 48208c008659SPaolo Bonzini struct kvm_mmu *context = &vcpu->arch.root_mmu; 4821594e91a1SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4822c50d8ae3SPaolo Bonzini 4823594e91a1SSean Christopherson kvm_init_shadow_mmu(vcpu, ®s); 4824929d1cfaSPaolo Bonzini 4825d8dd54e0SSean Christopherson context->get_guest_pgd = get_cr3; 4826c50d8ae3SPaolo Bonzini context->get_pdptr = kvm_pdptr_read; 4827c50d8ae3SPaolo Bonzini context->inject_page_fault = kvm_inject_page_fault; 4828c50d8ae3SPaolo Bonzini } 4829c50d8ae3SPaolo Bonzini 48308626c120SSean Christopherson static union kvm_mmu_role 48318626c120SSean Christopherson kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu, struct kvm_mmu_role_regs *regs) 4832654430efSSean Christopherson { 48338626c120SSean Christopherson union kvm_mmu_role role; 48348626c120SSean Christopherson 48358626c120SSean Christopherson role = kvm_calc_shadow_root_page_role_common(vcpu, regs, false); 4836654430efSSean Christopherson 4837654430efSSean Christopherson /* 4838654430efSSean Christopherson * Nested MMUs are used only for walking L2's gva->gpa, they never have 4839654430efSSean Christopherson * shadow pages of their own and so "direct" has no meaning. Set it 4840654430efSSean Christopherson * to "true" to try to detect bogus usage of the nested MMU. 4841654430efSSean Christopherson */ 4842654430efSSean Christopherson role.base.direct = true; 4843f4bd6f73SSean Christopherson role.base.level = role_regs_to_root_level(regs); 4844654430efSSean Christopherson return role; 4845654430efSSean Christopherson } 4846654430efSSean Christopherson 4847c50d8ae3SPaolo Bonzini static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) 4848c50d8ae3SPaolo Bonzini { 48498626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 48508626c120SSean Christopherson union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu, ®s); 4851c50d8ae3SPaolo Bonzini struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; 4852c50d8ae3SPaolo Bonzini 4853c50d8ae3SPaolo Bonzini if (new_role.as_u64 == g_context->mmu_role.as_u64) 4854c50d8ae3SPaolo Bonzini return; 4855c50d8ae3SPaolo Bonzini 4856c50d8ae3SPaolo Bonzini g_context->mmu_role.as_u64 = new_role.as_u64; 4857d8dd54e0SSean Christopherson g_context->get_guest_pgd = get_cr3; 4858c50d8ae3SPaolo Bonzini g_context->get_pdptr = kvm_pdptr_read; 4859c50d8ae3SPaolo Bonzini g_context->inject_page_fault = kvm_inject_page_fault; 48605472fcd4SSean Christopherson g_context->root_level = new_role.base.level; 4861c50d8ae3SPaolo Bonzini 4862c50d8ae3SPaolo Bonzini /* 48635efac074SPaolo Bonzini * L2 page tables are never shadowed, so there is no need to sync 48645efac074SPaolo Bonzini * SPTEs. 48655efac074SPaolo Bonzini */ 48665efac074SPaolo Bonzini g_context->invlpg = NULL; 48675efac074SPaolo Bonzini 48685efac074SPaolo Bonzini /* 4869c50d8ae3SPaolo Bonzini * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using 4870c50d8ae3SPaolo Bonzini * L1's nested page tables (e.g. EPT12). The nested translation 4871c50d8ae3SPaolo Bonzini * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using 4872c50d8ae3SPaolo Bonzini * L2's page tables as the first level of translation and L1's 4873c50d8ae3SPaolo Bonzini * nested page tables as the second level of translation. Basically 4874c50d8ae3SPaolo Bonzini * the gva_to_gpa functions between mmu and nested_mmu are swapped. 4875c50d8ae3SPaolo Bonzini */ 4876fa4b5588SSean Christopherson if (!is_paging(vcpu)) 4877c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; 4878fa4b5588SSean Christopherson else if (is_long_mode(vcpu)) 4879c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4880fa4b5588SSean Christopherson else if (is_pae(vcpu)) 4881c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging64_gva_to_gpa_nested; 4882fa4b5588SSean Christopherson else 4883c50d8ae3SPaolo Bonzini g_context->gva_to_gpa = paging32_gva_to_gpa_nested; 4884fa4b5588SSean Christopherson 4885533f9a4bSSean Christopherson reset_guest_paging_metadata(vcpu, g_context); 4886c50d8ae3SPaolo Bonzini } 4887c50d8ae3SPaolo Bonzini 4888c9060662SSean Christopherson void kvm_init_mmu(struct kvm_vcpu *vcpu) 4889c50d8ae3SPaolo Bonzini { 4890c50d8ae3SPaolo Bonzini if (mmu_is_nested(vcpu)) 4891c50d8ae3SPaolo Bonzini init_kvm_nested_mmu(vcpu); 4892c50d8ae3SPaolo Bonzini else if (tdp_enabled) 4893c50d8ae3SPaolo Bonzini init_kvm_tdp_mmu(vcpu); 4894c50d8ae3SPaolo Bonzini else 4895c50d8ae3SPaolo Bonzini init_kvm_softmmu(vcpu); 4896c50d8ae3SPaolo Bonzini } 4897c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_init_mmu); 4898c50d8ae3SPaolo Bonzini 4899c50d8ae3SPaolo Bonzini static union kvm_mmu_page_role 4900c50d8ae3SPaolo Bonzini kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu) 4901c50d8ae3SPaolo Bonzini { 49028626c120SSean Christopherson struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu); 4903c50d8ae3SPaolo Bonzini union kvm_mmu_role role; 4904c50d8ae3SPaolo Bonzini 4905c50d8ae3SPaolo Bonzini if (tdp_enabled) 49068626c120SSean Christopherson role = kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, true); 4907c50d8ae3SPaolo Bonzini else 49088626c120SSean Christopherson role = kvm_calc_shadow_mmu_root_page_role(vcpu, ®s, true); 4909c50d8ae3SPaolo Bonzini 4910c50d8ae3SPaolo Bonzini return role.base; 4911c50d8ae3SPaolo Bonzini } 4912c50d8ae3SPaolo Bonzini 491349c6f875SSean Christopherson void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) 491449c6f875SSean Christopherson { 491549c6f875SSean Christopherson /* 491649c6f875SSean Christopherson * Invalidate all MMU roles to force them to reinitialize as CPUID 491749c6f875SSean Christopherson * information is factored into reserved bit calculations. 491849c6f875SSean Christopherson */ 491949c6f875SSean Christopherson vcpu->arch.root_mmu.mmu_role.ext.valid = 0; 492049c6f875SSean Christopherson vcpu->arch.guest_mmu.mmu_role.ext.valid = 0; 492149c6f875SSean Christopherson vcpu->arch.nested_mmu.mmu_role.ext.valid = 0; 492249c6f875SSean Christopherson kvm_mmu_reset_context(vcpu); 492363f5a190SSean Christopherson 492463f5a190SSean Christopherson /* 492563f5a190SSean Christopherson * KVM does not correctly handle changing guest CPUID after KVM_RUN, as 492663f5a190SSean Christopherson * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't 492763f5a190SSean Christopherson * tracked in kvm_mmu_page_role. As a result, KVM may miss guest page 492863f5a190SSean Christopherson * faults due to reusing SPs/SPTEs. Alert userspace, but otherwise 492963f5a190SSean Christopherson * sweep the problem under the rug. 493063f5a190SSean Christopherson * 493163f5a190SSean Christopherson * KVM's horrific CPUID ABI makes the problem all but impossible to 493263f5a190SSean Christopherson * solve, as correctly handling multiple vCPU models (with respect to 493363f5a190SSean Christopherson * paging and physical address properties) in a single VM would require 493463f5a190SSean Christopherson * tracking all relevant CPUID information in kvm_mmu_page_role. That 493563f5a190SSean Christopherson * is very undesirable as it would double the memory requirements for 493663f5a190SSean Christopherson * gfn_track (see struct kvm_mmu_page_role comments), and in practice 493763f5a190SSean Christopherson * no sane VMM mucks with the core vCPU model on the fly. 493863f5a190SSean Christopherson */ 493963f5a190SSean Christopherson if (vcpu->arch.last_vmentry_cpu != -1) { 494063f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} after KVM_RUN may cause guest instability\n"); 494163f5a190SSean Christopherson pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} will fail after KVM_RUN starting with Linux 5.16\n"); 494263f5a190SSean Christopherson } 494349c6f875SSean Christopherson } 494449c6f875SSean Christopherson 4945c50d8ae3SPaolo Bonzini void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) 4946c50d8ae3SPaolo Bonzini { 4947c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 4948c9060662SSean Christopherson kvm_init_mmu(vcpu); 4949c50d8ae3SPaolo Bonzini } 4950c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); 4951c50d8ae3SPaolo Bonzini 4952c50d8ae3SPaolo Bonzini int kvm_mmu_load(struct kvm_vcpu *vcpu) 4953c50d8ae3SPaolo Bonzini { 4954c50d8ae3SPaolo Bonzini int r; 4955c50d8ae3SPaolo Bonzini 4956378f5cd6SSean Christopherson r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map); 4957c50d8ae3SPaolo Bonzini if (r) 4958c50d8ae3SPaolo Bonzini goto out; 4959748e52b9SSean Christopherson r = mmu_alloc_special_roots(vcpu); 4960c50d8ae3SPaolo Bonzini if (r) 4961c50d8ae3SPaolo Bonzini goto out; 49624a38162eSPaolo Bonzini if (vcpu->arch.mmu->direct_map) 49636e6ec584SSean Christopherson r = mmu_alloc_direct_roots(vcpu); 49646e6ec584SSean Christopherson else 49656e6ec584SSean Christopherson r = mmu_alloc_shadow_roots(vcpu); 4966c50d8ae3SPaolo Bonzini if (r) 4967c50d8ae3SPaolo Bonzini goto out; 4968a91f387bSSean Christopherson 4969a91f387bSSean Christopherson kvm_mmu_sync_roots(vcpu); 4970a91f387bSSean Christopherson 4971727a7e27SPaolo Bonzini kvm_mmu_load_pgd(vcpu); 4972b3646477SJason Baron static_call(kvm_x86_tlb_flush_current)(vcpu); 4973c50d8ae3SPaolo Bonzini out: 4974c50d8ae3SPaolo Bonzini return r; 4975c50d8ae3SPaolo Bonzini } 4976c50d8ae3SPaolo Bonzini 4977c50d8ae3SPaolo Bonzini void kvm_mmu_unload(struct kvm_vcpu *vcpu) 4978c50d8ae3SPaolo Bonzini { 4979c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); 4980c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root_hpa)); 4981c50d8ae3SPaolo Bonzini kvm_mmu_free_roots(vcpu, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); 4982c50d8ae3SPaolo Bonzini WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root_hpa)); 4983c50d8ae3SPaolo Bonzini } 4984c50d8ae3SPaolo Bonzini 4985c50d8ae3SPaolo Bonzini static bool need_remote_flush(u64 old, u64 new) 4986c50d8ae3SPaolo Bonzini { 4987c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(old)) 4988c50d8ae3SPaolo Bonzini return false; 4989c50d8ae3SPaolo Bonzini if (!is_shadow_present_pte(new)) 4990c50d8ae3SPaolo Bonzini return true; 4991c50d8ae3SPaolo Bonzini if ((old ^ new) & PT64_BASE_ADDR_MASK) 4992c50d8ae3SPaolo Bonzini return true; 4993c50d8ae3SPaolo Bonzini old ^= shadow_nx_mask; 4994c50d8ae3SPaolo Bonzini new ^= shadow_nx_mask; 4995c50d8ae3SPaolo Bonzini return (old & ~new & PT64_PERM_MASK) != 0; 4996c50d8ae3SPaolo Bonzini } 4997c50d8ae3SPaolo Bonzini 4998c50d8ae3SPaolo Bonzini static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, 4999c50d8ae3SPaolo Bonzini int *bytes) 5000c50d8ae3SPaolo Bonzini { 5001c50d8ae3SPaolo Bonzini u64 gentry = 0; 5002c50d8ae3SPaolo Bonzini int r; 5003c50d8ae3SPaolo Bonzini 5004c50d8ae3SPaolo Bonzini /* 5005c50d8ae3SPaolo Bonzini * Assume that the pte write on a page table of the same type 5006c50d8ae3SPaolo Bonzini * as the current vcpu paging mode since we update the sptes only 5007c50d8ae3SPaolo Bonzini * when they have the same mode. 5008c50d8ae3SPaolo Bonzini */ 5009c50d8ae3SPaolo Bonzini if (is_pae(vcpu) && *bytes == 4) { 5010c50d8ae3SPaolo Bonzini /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 5011c50d8ae3SPaolo Bonzini *gpa &= ~(gpa_t)7; 5012c50d8ae3SPaolo Bonzini *bytes = 8; 5013c50d8ae3SPaolo Bonzini } 5014c50d8ae3SPaolo Bonzini 5015c50d8ae3SPaolo Bonzini if (*bytes == 4 || *bytes == 8) { 5016c50d8ae3SPaolo Bonzini r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes); 5017c50d8ae3SPaolo Bonzini if (r) 5018c50d8ae3SPaolo Bonzini gentry = 0; 5019c50d8ae3SPaolo Bonzini } 5020c50d8ae3SPaolo Bonzini 5021c50d8ae3SPaolo Bonzini return gentry; 5022c50d8ae3SPaolo Bonzini } 5023c50d8ae3SPaolo Bonzini 5024c50d8ae3SPaolo Bonzini /* 5025c50d8ae3SPaolo Bonzini * If we're seeing too many writes to a page, it may no longer be a page table, 5026c50d8ae3SPaolo Bonzini * or we may be forking, in which case it is better to unmap the page. 5027c50d8ae3SPaolo Bonzini */ 5028c50d8ae3SPaolo Bonzini static bool detect_write_flooding(struct kvm_mmu_page *sp) 5029c50d8ae3SPaolo Bonzini { 5030c50d8ae3SPaolo Bonzini /* 5031c50d8ae3SPaolo Bonzini * Skip write-flooding detected for the sp whose level is 1, because 5032c50d8ae3SPaolo Bonzini * it can become unsync, then the guest page is not write-protected. 5033c50d8ae3SPaolo Bonzini */ 50343bae0459SSean Christopherson if (sp->role.level == PG_LEVEL_4K) 5035c50d8ae3SPaolo Bonzini return false; 5036c50d8ae3SPaolo Bonzini 5037c50d8ae3SPaolo Bonzini atomic_inc(&sp->write_flooding_count); 5038c50d8ae3SPaolo Bonzini return atomic_read(&sp->write_flooding_count) >= 3; 5039c50d8ae3SPaolo Bonzini } 5040c50d8ae3SPaolo Bonzini 5041c50d8ae3SPaolo Bonzini /* 5042c50d8ae3SPaolo Bonzini * Misaligned accesses are too much trouble to fix up; also, they usually 5043c50d8ae3SPaolo Bonzini * indicate a page is not used as a page table. 5044c50d8ae3SPaolo Bonzini */ 5045c50d8ae3SPaolo Bonzini static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, 5046c50d8ae3SPaolo Bonzini int bytes) 5047c50d8ae3SPaolo Bonzini { 5048c50d8ae3SPaolo Bonzini unsigned offset, pte_size, misaligned; 5049c50d8ae3SPaolo Bonzini 5050c50d8ae3SPaolo Bonzini pgprintk("misaligned: gpa %llx bytes %d role %x\n", 5051c50d8ae3SPaolo Bonzini gpa, bytes, sp->role.word); 5052c50d8ae3SPaolo Bonzini 5053c50d8ae3SPaolo Bonzini offset = offset_in_page(gpa); 5054c50d8ae3SPaolo Bonzini pte_size = sp->role.gpte_is_8_bytes ? 8 : 4; 5055c50d8ae3SPaolo Bonzini 5056c50d8ae3SPaolo Bonzini /* 5057c50d8ae3SPaolo Bonzini * Sometimes, the OS only writes the last one bytes to update status 5058c50d8ae3SPaolo Bonzini * bits, for example, in linux, andb instruction is used in clear_bit(). 5059c50d8ae3SPaolo Bonzini */ 5060c50d8ae3SPaolo Bonzini if (!(offset & (pte_size - 1)) && bytes == 1) 5061c50d8ae3SPaolo Bonzini return false; 5062c50d8ae3SPaolo Bonzini 5063c50d8ae3SPaolo Bonzini misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 5064c50d8ae3SPaolo Bonzini misaligned |= bytes < 4; 5065c50d8ae3SPaolo Bonzini 5066c50d8ae3SPaolo Bonzini return misaligned; 5067c50d8ae3SPaolo Bonzini } 5068c50d8ae3SPaolo Bonzini 5069c50d8ae3SPaolo Bonzini static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) 5070c50d8ae3SPaolo Bonzini { 5071c50d8ae3SPaolo Bonzini unsigned page_offset, quadrant; 5072c50d8ae3SPaolo Bonzini u64 *spte; 5073c50d8ae3SPaolo Bonzini int level; 5074c50d8ae3SPaolo Bonzini 5075c50d8ae3SPaolo Bonzini page_offset = offset_in_page(gpa); 5076c50d8ae3SPaolo Bonzini level = sp->role.level; 5077c50d8ae3SPaolo Bonzini *nspte = 1; 5078c50d8ae3SPaolo Bonzini if (!sp->role.gpte_is_8_bytes) { 5079c50d8ae3SPaolo Bonzini page_offset <<= 1; /* 32->64 */ 5080c50d8ae3SPaolo Bonzini /* 5081c50d8ae3SPaolo Bonzini * A 32-bit pde maps 4MB while the shadow pdes map 5082c50d8ae3SPaolo Bonzini * only 2MB. So we need to double the offset again 5083c50d8ae3SPaolo Bonzini * and zap two pdes instead of one. 5084c50d8ae3SPaolo Bonzini */ 5085c50d8ae3SPaolo Bonzini if (level == PT32_ROOT_LEVEL) { 5086c50d8ae3SPaolo Bonzini page_offset &= ~7; /* kill rounding error */ 5087c50d8ae3SPaolo Bonzini page_offset <<= 1; 5088c50d8ae3SPaolo Bonzini *nspte = 2; 5089c50d8ae3SPaolo Bonzini } 5090c50d8ae3SPaolo Bonzini quadrant = page_offset >> PAGE_SHIFT; 5091c50d8ae3SPaolo Bonzini page_offset &= ~PAGE_MASK; 5092c50d8ae3SPaolo Bonzini if (quadrant != sp->role.quadrant) 5093c50d8ae3SPaolo Bonzini return NULL; 5094c50d8ae3SPaolo Bonzini } 5095c50d8ae3SPaolo Bonzini 5096c50d8ae3SPaolo Bonzini spte = &sp->spt[page_offset / sizeof(*spte)]; 5097c50d8ae3SPaolo Bonzini return spte; 5098c50d8ae3SPaolo Bonzini } 5099c50d8ae3SPaolo Bonzini 5100c50d8ae3SPaolo Bonzini static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 5101c50d8ae3SPaolo Bonzini const u8 *new, int bytes, 5102c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5103c50d8ae3SPaolo Bonzini { 5104c50d8ae3SPaolo Bonzini gfn_t gfn = gpa >> PAGE_SHIFT; 5105c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5106c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5107c50d8ae3SPaolo Bonzini u64 entry, gentry, *spte; 5108c50d8ae3SPaolo Bonzini int npte; 5109c50d8ae3SPaolo Bonzini bool remote_flush, local_flush; 5110c50d8ae3SPaolo Bonzini 5111c50d8ae3SPaolo Bonzini /* 5112c50d8ae3SPaolo Bonzini * If we don't have indirect shadow pages, it means no page is 5113c50d8ae3SPaolo Bonzini * write-protected, so we can exit simply. 5114c50d8ae3SPaolo Bonzini */ 5115c50d8ae3SPaolo Bonzini if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) 5116c50d8ae3SPaolo Bonzini return; 5117c50d8ae3SPaolo Bonzini 5118c50d8ae3SPaolo Bonzini remote_flush = local_flush = false; 5119c50d8ae3SPaolo Bonzini 5120c50d8ae3SPaolo Bonzini pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); 5121c50d8ae3SPaolo Bonzini 5122c50d8ae3SPaolo Bonzini /* 5123c50d8ae3SPaolo Bonzini * No need to care whether allocation memory is successful 5124d9f6e12fSIngo Molnar * or not since pte prefetch is skipped if it does not have 5125c50d8ae3SPaolo Bonzini * enough objects in the cache. 5126c50d8ae3SPaolo Bonzini */ 5127378f5cd6SSean Christopherson mmu_topup_memory_caches(vcpu, true); 5128c50d8ae3SPaolo Bonzini 5129531810caSBen Gardon write_lock(&vcpu->kvm->mmu_lock); 5130c50d8ae3SPaolo Bonzini 5131c50d8ae3SPaolo Bonzini gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes); 5132c50d8ae3SPaolo Bonzini 5133c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_pte_write; 5134c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); 5135c50d8ae3SPaolo Bonzini 5136c50d8ae3SPaolo Bonzini for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { 5137c50d8ae3SPaolo Bonzini if (detect_write_misaligned(sp, gpa, bytes) || 5138c50d8ae3SPaolo Bonzini detect_write_flooding(sp)) { 5139c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); 5140c50d8ae3SPaolo Bonzini ++vcpu->kvm->stat.mmu_flooded; 5141c50d8ae3SPaolo Bonzini continue; 5142c50d8ae3SPaolo Bonzini } 5143c50d8ae3SPaolo Bonzini 5144c50d8ae3SPaolo Bonzini spte = get_written_sptes(sp, gpa, &npte); 5145c50d8ae3SPaolo Bonzini if (!spte) 5146c50d8ae3SPaolo Bonzini continue; 5147c50d8ae3SPaolo Bonzini 5148c50d8ae3SPaolo Bonzini local_flush = true; 5149c50d8ae3SPaolo Bonzini while (npte--) { 5150c50d8ae3SPaolo Bonzini entry = *spte; 51512de4085cSBen Gardon mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); 5152c5e2184dSSean Christopherson if (gentry && sp->role.level != PG_LEVEL_4K) 5153c5e2184dSSean Christopherson ++vcpu->kvm->stat.mmu_pde_zapped; 5154c50d8ae3SPaolo Bonzini if (need_remote_flush(entry, *spte)) 5155c50d8ae3SPaolo Bonzini remote_flush = true; 5156c50d8ae3SPaolo Bonzini ++spte; 5157c50d8ae3SPaolo Bonzini } 5158c50d8ae3SPaolo Bonzini } 5159c50d8ae3SPaolo Bonzini kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); 5160c50d8ae3SPaolo Bonzini kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); 5161531810caSBen Gardon write_unlock(&vcpu->kvm->mmu_lock); 5162c50d8ae3SPaolo Bonzini } 5163c50d8ae3SPaolo Bonzini 5164736c291cSSean Christopherson int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 5165c50d8ae3SPaolo Bonzini void *insn, int insn_len) 5166c50d8ae3SPaolo Bonzini { 516792daa48bSSean Christopherson int r, emulation_type = EMULTYPE_PF; 5168c50d8ae3SPaolo Bonzini bool direct = vcpu->arch.mmu->direct_map; 5169c50d8ae3SPaolo Bonzini 51706948199aSSean Christopherson if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root_hpa))) 5171ddce6208SSean Christopherson return RET_PF_RETRY; 5172ddce6208SSean Christopherson 5173c50d8ae3SPaolo Bonzini r = RET_PF_INVALID; 5174c50d8ae3SPaolo Bonzini if (unlikely(error_code & PFERR_RSVD_MASK)) { 5175736c291cSSean Christopherson r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); 5176c50d8ae3SPaolo Bonzini if (r == RET_PF_EMULATE) 5177c50d8ae3SPaolo Bonzini goto emulate; 5178c50d8ae3SPaolo Bonzini } 5179c50d8ae3SPaolo Bonzini 5180c50d8ae3SPaolo Bonzini if (r == RET_PF_INVALID) { 51817a02674dSSean Christopherson r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, 51827a02674dSSean Christopherson lower_32_bits(error_code), false); 518319025e7bSSean Christopherson if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) 51847b367bc9SSean Christopherson return -EIO; 5185c50d8ae3SPaolo Bonzini } 5186c50d8ae3SPaolo Bonzini 5187c50d8ae3SPaolo Bonzini if (r < 0) 5188c50d8ae3SPaolo Bonzini return r; 518983a2ba4cSSean Christopherson if (r != RET_PF_EMULATE) 519083a2ba4cSSean Christopherson return 1; 5191c50d8ae3SPaolo Bonzini 5192c50d8ae3SPaolo Bonzini /* 5193c50d8ae3SPaolo Bonzini * Before emulating the instruction, check if the error code 5194c50d8ae3SPaolo Bonzini * was due to a RO violation while translating the guest page. 5195c50d8ae3SPaolo Bonzini * This can occur when using nested virtualization with nested 5196c50d8ae3SPaolo Bonzini * paging in both guests. If true, we simply unprotect the page 5197c50d8ae3SPaolo Bonzini * and resume the guest. 5198c50d8ae3SPaolo Bonzini */ 5199c50d8ae3SPaolo Bonzini if (vcpu->arch.mmu->direct_map && 5200c50d8ae3SPaolo Bonzini (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) { 5201736c291cSSean Christopherson kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); 5202c50d8ae3SPaolo Bonzini return 1; 5203c50d8ae3SPaolo Bonzini } 5204c50d8ae3SPaolo Bonzini 5205c50d8ae3SPaolo Bonzini /* 5206c50d8ae3SPaolo Bonzini * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still 5207c50d8ae3SPaolo Bonzini * optimistically try to just unprotect the page and let the processor 5208c50d8ae3SPaolo Bonzini * re-execute the instruction that caused the page fault. Do not allow 5209c50d8ae3SPaolo Bonzini * retrying MMIO emulation, as it's not only pointless but could also 5210c50d8ae3SPaolo Bonzini * cause us to enter an infinite loop because the processor will keep 5211c50d8ae3SPaolo Bonzini * faulting on the non-existent MMIO address. Retrying an instruction 5212c50d8ae3SPaolo Bonzini * from a nested guest is also pointless and dangerous as we are only 5213c50d8ae3SPaolo Bonzini * explicitly shadowing L1's page tables, i.e. unprotecting something 5214c50d8ae3SPaolo Bonzini * for L1 isn't going to magically fix whatever issue cause L2 to fail. 5215c50d8ae3SPaolo Bonzini */ 5216736c291cSSean Christopherson if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu)) 521792daa48bSSean Christopherson emulation_type |= EMULTYPE_ALLOW_RETRY_PF; 5218c50d8ae3SPaolo Bonzini emulate: 5219736c291cSSean Christopherson return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn, 5220c50d8ae3SPaolo Bonzini insn_len); 5221c50d8ae3SPaolo Bonzini } 5222c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 5223c50d8ae3SPaolo Bonzini 52245efac074SPaolo Bonzini void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 52255efac074SPaolo Bonzini gva_t gva, hpa_t root_hpa) 5226c50d8ae3SPaolo Bonzini { 5227c50d8ae3SPaolo Bonzini int i; 5228c50d8ae3SPaolo Bonzini 52295efac074SPaolo Bonzini /* It's actually a GPA for vcpu->arch.guest_mmu. */ 52305efac074SPaolo Bonzini if (mmu != &vcpu->arch.guest_mmu) { 52315efac074SPaolo Bonzini /* INVLPG on a non-canonical address is a NOP according to the SDM. */ 5232c50d8ae3SPaolo Bonzini if (is_noncanonical_address(gva, vcpu)) 5233c50d8ae3SPaolo Bonzini return; 5234c50d8ae3SPaolo Bonzini 5235b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 52365efac074SPaolo Bonzini } 52375efac074SPaolo Bonzini 52385efac074SPaolo Bonzini if (!mmu->invlpg) 52395efac074SPaolo Bonzini return; 52405efac074SPaolo Bonzini 52415efac074SPaolo Bonzini if (root_hpa == INVALID_PAGE) { 5242c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5243c50d8ae3SPaolo Bonzini 5244c50d8ae3SPaolo Bonzini /* 5245c50d8ae3SPaolo Bonzini * INVLPG is required to invalidate any global mappings for the VA, 5246c50d8ae3SPaolo Bonzini * irrespective of PCID. Since it would take us roughly similar amount 5247c50d8ae3SPaolo Bonzini * of work to determine whether any of the prev_root mappings of the VA 5248c50d8ae3SPaolo Bonzini * is marked global, or to just sync it blindly, so we might as well 5249c50d8ae3SPaolo Bonzini * just always sync it. 5250c50d8ae3SPaolo Bonzini * 5251c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5252c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5253c50d8ae3SPaolo Bonzini * for them. 5254c50d8ae3SPaolo Bonzini */ 5255c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 5256c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa)) 5257c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 52585efac074SPaolo Bonzini } else { 52595efac074SPaolo Bonzini mmu->invlpg(vcpu, gva, root_hpa); 52605efac074SPaolo Bonzini } 52615efac074SPaolo Bonzini } 5262c50d8ae3SPaolo Bonzini 52635efac074SPaolo Bonzini void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) 52645efac074SPaolo Bonzini { 52655efac074SPaolo Bonzini kvm_mmu_invalidate_gva(vcpu, vcpu->arch.mmu, gva, INVALID_PAGE); 5266c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5267c50d8ae3SPaolo Bonzini } 5268c50d8ae3SPaolo Bonzini EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); 5269c50d8ae3SPaolo Bonzini 52705efac074SPaolo Bonzini 5271c50d8ae3SPaolo Bonzini void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid) 5272c50d8ae3SPaolo Bonzini { 5273c50d8ae3SPaolo Bonzini struct kvm_mmu *mmu = vcpu->arch.mmu; 5274c50d8ae3SPaolo Bonzini bool tlb_flush = false; 5275c50d8ae3SPaolo Bonzini uint i; 5276c50d8ae3SPaolo Bonzini 5277c50d8ae3SPaolo Bonzini if (pcid == kvm_get_active_pcid(vcpu)) { 5278c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->root_hpa); 5279c50d8ae3SPaolo Bonzini tlb_flush = true; 5280c50d8ae3SPaolo Bonzini } 5281c50d8ae3SPaolo Bonzini 5282c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) { 5283c50d8ae3SPaolo Bonzini if (VALID_PAGE(mmu->prev_roots[i].hpa) && 5284be01e8e2SSean Christopherson pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) { 5285c50d8ae3SPaolo Bonzini mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa); 5286c50d8ae3SPaolo Bonzini tlb_flush = true; 5287c50d8ae3SPaolo Bonzini } 5288c50d8ae3SPaolo Bonzini } 5289c50d8ae3SPaolo Bonzini 5290c50d8ae3SPaolo Bonzini if (tlb_flush) 5291b3646477SJason Baron static_call(kvm_x86_tlb_flush_gva)(vcpu, gva); 5292c50d8ae3SPaolo Bonzini 5293c50d8ae3SPaolo Bonzini ++vcpu->stat.invlpg; 5294c50d8ae3SPaolo Bonzini 5295c50d8ae3SPaolo Bonzini /* 5296c50d8ae3SPaolo Bonzini * Mappings not reachable via the current cr3 or the prev_roots will be 5297c50d8ae3SPaolo Bonzini * synced when switching to that cr3, so nothing needs to be done here 5298c50d8ae3SPaolo Bonzini * for them. 5299c50d8ae3SPaolo Bonzini */ 5300c50d8ae3SPaolo Bonzini } 5301c50d8ae3SPaolo Bonzini 530283013059SSean Christopherson void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 530383013059SSean Christopherson int tdp_huge_page_level) 5304c50d8ae3SPaolo Bonzini { 5305bde77235SSean Christopherson tdp_enabled = enable_tdp; 530683013059SSean Christopherson max_tdp_level = tdp_max_root_level; 5307703c335dSSean Christopherson 5308703c335dSSean Christopherson /* 53091d92d2e8SSean Christopherson * max_huge_page_level reflects KVM's MMU capabilities irrespective 5310703c335dSSean Christopherson * of kernel support, e.g. KVM may be capable of using 1GB pages when 5311703c335dSSean Christopherson * the kernel is not. But, KVM never creates a page size greater than 5312703c335dSSean Christopherson * what is used by the kernel for any given HVA, i.e. the kernel's 5313703c335dSSean Christopherson * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). 5314703c335dSSean Christopherson */ 5315703c335dSSean Christopherson if (tdp_enabled) 53161d92d2e8SSean Christopherson max_huge_page_level = tdp_huge_page_level; 5317703c335dSSean Christopherson else if (boot_cpu_has(X86_FEATURE_GBPAGES)) 53181d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_1G; 5319703c335dSSean Christopherson else 53201d92d2e8SSean Christopherson max_huge_page_level = PG_LEVEL_2M; 5321c50d8ae3SPaolo Bonzini } 5322bde77235SSean Christopherson EXPORT_SYMBOL_GPL(kvm_configure_mmu); 5323c50d8ae3SPaolo Bonzini 5324c50d8ae3SPaolo Bonzini /* The return value indicates if tlb flush on all vcpus is needed. */ 5325269e9552SHamza Mahfooz typedef bool (*slot_level_handler) (struct kvm *kvm, 5326269e9552SHamza Mahfooz struct kvm_rmap_head *rmap_head, 5327269e9552SHamza Mahfooz const struct kvm_memory_slot *slot); 5328c50d8ae3SPaolo Bonzini 5329c50d8ae3SPaolo Bonzini /* The caller should hold mmu-lock before calling this function. */ 5330c50d8ae3SPaolo Bonzini static __always_inline bool 5331269e9552SHamza Mahfooz slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5332c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 53331a61b7dbSSean Christopherson gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield, 53341a61b7dbSSean Christopherson bool flush) 5335c50d8ae3SPaolo Bonzini { 5336c50d8ae3SPaolo Bonzini struct slot_rmap_walk_iterator iterator; 5337c50d8ae3SPaolo Bonzini 5338c50d8ae3SPaolo Bonzini for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, 5339c50d8ae3SPaolo Bonzini end_gfn, &iterator) { 5340c50d8ae3SPaolo Bonzini if (iterator.rmap) 53410a234f5dSSean Christopherson flush |= fn(kvm, iterator.rmap, memslot); 5342c50d8ae3SPaolo Bonzini 5343531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 5344302695a5SSean Christopherson if (flush && flush_on_yield) { 5345c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, 5346c50d8ae3SPaolo Bonzini start_gfn, 5347c50d8ae3SPaolo Bonzini iterator.gfn - start_gfn + 1); 5348c50d8ae3SPaolo Bonzini flush = false; 5349c50d8ae3SPaolo Bonzini } 5350531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 5351c50d8ae3SPaolo Bonzini } 5352c50d8ae3SPaolo Bonzini } 5353c50d8ae3SPaolo Bonzini 5354c50d8ae3SPaolo Bonzini return flush; 5355c50d8ae3SPaolo Bonzini } 5356c50d8ae3SPaolo Bonzini 5357c50d8ae3SPaolo Bonzini static __always_inline bool 5358269e9552SHamza Mahfooz slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5359c50d8ae3SPaolo Bonzini slot_level_handler fn, int start_level, int end_level, 5360302695a5SSean Christopherson bool flush_on_yield) 5361c50d8ae3SPaolo Bonzini { 5362c50d8ae3SPaolo Bonzini return slot_handle_level_range(kvm, memslot, fn, start_level, 5363c50d8ae3SPaolo Bonzini end_level, memslot->base_gfn, 5364c50d8ae3SPaolo Bonzini memslot->base_gfn + memslot->npages - 1, 53651a61b7dbSSean Christopherson flush_on_yield, false); 5366c50d8ae3SPaolo Bonzini } 5367c50d8ae3SPaolo Bonzini 5368c50d8ae3SPaolo Bonzini static __always_inline bool 5369269e9552SHamza Mahfooz slot_handle_leaf(struct kvm *kvm, const struct kvm_memory_slot *memslot, 5370302695a5SSean Christopherson slot_level_handler fn, bool flush_on_yield) 5371c50d8ae3SPaolo Bonzini { 53723bae0459SSean Christopherson return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K, 5373302695a5SSean Christopherson PG_LEVEL_4K, flush_on_yield); 5374c50d8ae3SPaolo Bonzini } 5375c50d8ae3SPaolo Bonzini 5376c50d8ae3SPaolo Bonzini static void free_mmu_pages(struct kvm_mmu *mmu) 5377c50d8ae3SPaolo Bonzini { 53784a98623dSSean Christopherson if (!tdp_enabled && mmu->pae_root) 53794a98623dSSean Christopherson set_memory_encrypted((unsigned long)mmu->pae_root, 1); 5380c50d8ae3SPaolo Bonzini free_page((unsigned long)mmu->pae_root); 538103ca4589SSean Christopherson free_page((unsigned long)mmu->pml4_root); 5382c50d8ae3SPaolo Bonzini } 5383c50d8ae3SPaolo Bonzini 538404d28e37SSean Christopherson static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) 5385c50d8ae3SPaolo Bonzini { 5386c50d8ae3SPaolo Bonzini struct page *page; 5387c50d8ae3SPaolo Bonzini int i; 5388c50d8ae3SPaolo Bonzini 538904d28e37SSean Christopherson mmu->root_hpa = INVALID_PAGE; 539004d28e37SSean Christopherson mmu->root_pgd = 0; 539104d28e37SSean Christopherson mmu->translate_gpa = translate_gpa; 539204d28e37SSean Christopherson for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) 539304d28e37SSean Christopherson mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; 539404d28e37SSean Christopherson 5395c50d8ae3SPaolo Bonzini /* 5396c50d8ae3SPaolo Bonzini * When using PAE paging, the four PDPTEs are treated as 'root' pages, 5397c50d8ae3SPaolo Bonzini * while the PDP table is a per-vCPU construct that's allocated at MMU 5398c50d8ae3SPaolo Bonzini * creation. When emulating 32-bit mode, cr3 is only 32 bits even on 5399c50d8ae3SPaolo Bonzini * x86_64. Therefore we need to allocate the PDP table in the first 540004d45551SSean Christopherson * 4GB of memory, which happens to fit the DMA32 zone. TDP paging 540104d45551SSean Christopherson * generally doesn't use PAE paging and can skip allocating the PDP 540204d45551SSean Christopherson * table. The main exception, handled here, is SVM's 32-bit NPT. The 540304d45551SSean Christopherson * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit 540404d45551SSean Christopherson * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots(). 5405c50d8ae3SPaolo Bonzini */ 5406d468d94bSSean Christopherson if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) 5407c50d8ae3SPaolo Bonzini return 0; 5408c50d8ae3SPaolo Bonzini 5409c50d8ae3SPaolo Bonzini page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32); 5410c50d8ae3SPaolo Bonzini if (!page) 5411c50d8ae3SPaolo Bonzini return -ENOMEM; 5412c50d8ae3SPaolo Bonzini 5413c50d8ae3SPaolo Bonzini mmu->pae_root = page_address(page); 54144a98623dSSean Christopherson 54154a98623dSSean Christopherson /* 54164a98623dSSean Christopherson * CR3 is only 32 bits when PAE paging is used, thus it's impossible to 54174a98623dSSean Christopherson * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so 54184a98623dSSean Christopherson * that KVM's writes and the CPU's reads get along. Note, this is 54194a98623dSSean Christopherson * only necessary when using shadow paging, as 64-bit NPT can get at 54204a98623dSSean Christopherson * the C-bit even when shadowing 32-bit NPT, and SME isn't supported 54214a98623dSSean Christopherson * by 32-bit kernels (when KVM itself uses 32-bit NPT). 54224a98623dSSean Christopherson */ 54234a98623dSSean Christopherson if (!tdp_enabled) 54244a98623dSSean Christopherson set_memory_decrypted((unsigned long)mmu->pae_root, 1); 54254a98623dSSean Christopherson else 54264a98623dSSean Christopherson WARN_ON_ONCE(shadow_me_mask); 54274a98623dSSean Christopherson 5428c50d8ae3SPaolo Bonzini for (i = 0; i < 4; ++i) 5429c834e5e4SSean Christopherson mmu->pae_root[i] = INVALID_PAE_ROOT; 5430c50d8ae3SPaolo Bonzini 5431c50d8ae3SPaolo Bonzini return 0; 5432c50d8ae3SPaolo Bonzini } 5433c50d8ae3SPaolo Bonzini 5434c50d8ae3SPaolo Bonzini int kvm_mmu_create(struct kvm_vcpu *vcpu) 5435c50d8ae3SPaolo Bonzini { 5436c50d8ae3SPaolo Bonzini int ret; 5437c50d8ae3SPaolo Bonzini 54385962bfb7SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; 54395f6078f9SSean Christopherson vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; 54405f6078f9SSean Christopherson 54415962bfb7SSean Christopherson vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; 54425f6078f9SSean Christopherson vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; 54435962bfb7SSean Christopherson 544496880883SSean Christopherson vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; 544596880883SSean Christopherson 5446c50d8ae3SPaolo Bonzini vcpu->arch.mmu = &vcpu->arch.root_mmu; 5447c50d8ae3SPaolo Bonzini vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 5448c50d8ae3SPaolo Bonzini 5449c50d8ae3SPaolo Bonzini vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; 5450c50d8ae3SPaolo Bonzini 545104d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); 5452c50d8ae3SPaolo Bonzini if (ret) 5453c50d8ae3SPaolo Bonzini return ret; 5454c50d8ae3SPaolo Bonzini 545504d28e37SSean Christopherson ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); 5456c50d8ae3SPaolo Bonzini if (ret) 5457c50d8ae3SPaolo Bonzini goto fail_allocate_root; 5458c50d8ae3SPaolo Bonzini 5459c50d8ae3SPaolo Bonzini return ret; 5460c50d8ae3SPaolo Bonzini fail_allocate_root: 5461c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 5462c50d8ae3SPaolo Bonzini return ret; 5463c50d8ae3SPaolo Bonzini } 5464c50d8ae3SPaolo Bonzini 5465c50d8ae3SPaolo Bonzini #define BATCH_ZAP_PAGES 10 5466c50d8ae3SPaolo Bonzini static void kvm_zap_obsolete_pages(struct kvm *kvm) 5467c50d8ae3SPaolo Bonzini { 5468c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5469c50d8ae3SPaolo Bonzini int nr_zapped, batch = 0; 5470c50d8ae3SPaolo Bonzini 5471c50d8ae3SPaolo Bonzini restart: 5472c50d8ae3SPaolo Bonzini list_for_each_entry_safe_reverse(sp, node, 5473c50d8ae3SPaolo Bonzini &kvm->arch.active_mmu_pages, link) { 5474c50d8ae3SPaolo Bonzini /* 5475c50d8ae3SPaolo Bonzini * No obsolete valid page exists before a newly created page 5476c50d8ae3SPaolo Bonzini * since active_mmu_pages is a FIFO list. 5477c50d8ae3SPaolo Bonzini */ 5478c50d8ae3SPaolo Bonzini if (!is_obsolete_sp(kvm, sp)) 5479c50d8ae3SPaolo Bonzini break; 5480c50d8ae3SPaolo Bonzini 5481c50d8ae3SPaolo Bonzini /* 5482f95eec9bSSean Christopherson * Invalid pages should never land back on the list of active 5483f95eec9bSSean Christopherson * pages. Skip the bogus page, otherwise we'll get stuck in an 5484f95eec9bSSean Christopherson * infinite loop if the page gets put back on the list (again). 5485c50d8ae3SPaolo Bonzini */ 5486f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5487c50d8ae3SPaolo Bonzini continue; 5488c50d8ae3SPaolo Bonzini 5489c50d8ae3SPaolo Bonzini /* 5490c50d8ae3SPaolo Bonzini * No need to flush the TLB since we're only zapping shadow 5491c50d8ae3SPaolo Bonzini * pages with an obsolete generation number and all vCPUS have 5492c50d8ae3SPaolo Bonzini * loaded a new root, i.e. the shadow pages being zapped cannot 5493c50d8ae3SPaolo Bonzini * be in active use by the guest. 5494c50d8ae3SPaolo Bonzini */ 5495c50d8ae3SPaolo Bonzini if (batch >= BATCH_ZAP_PAGES && 5496531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock)) { 5497c50d8ae3SPaolo Bonzini batch = 0; 5498c50d8ae3SPaolo Bonzini goto restart; 5499c50d8ae3SPaolo Bonzini } 5500c50d8ae3SPaolo Bonzini 5501c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, 5502c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages, &nr_zapped)) { 5503c50d8ae3SPaolo Bonzini batch += nr_zapped; 5504c50d8ae3SPaolo Bonzini goto restart; 5505c50d8ae3SPaolo Bonzini } 5506c50d8ae3SPaolo Bonzini } 5507c50d8ae3SPaolo Bonzini 5508c50d8ae3SPaolo Bonzini /* 5509c50d8ae3SPaolo Bonzini * Trigger a remote TLB flush before freeing the page tables to ensure 5510c50d8ae3SPaolo Bonzini * KVM is not in the middle of a lockless shadow page table walk, which 5511c50d8ae3SPaolo Bonzini * may reference the pages. 5512c50d8ae3SPaolo Bonzini */ 5513c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); 5514c50d8ae3SPaolo Bonzini } 5515c50d8ae3SPaolo Bonzini 5516c50d8ae3SPaolo Bonzini /* 5517c50d8ae3SPaolo Bonzini * Fast invalidate all shadow pages and use lock-break technique 5518c50d8ae3SPaolo Bonzini * to zap obsolete pages. 5519c50d8ae3SPaolo Bonzini * 5520c50d8ae3SPaolo Bonzini * It's required when memslot is being deleted or VM is being 5521c50d8ae3SPaolo Bonzini * destroyed, in these cases, we should ensure that KVM MMU does 5522c50d8ae3SPaolo Bonzini * not use any resource of the being-deleted slot or all slots 5523c50d8ae3SPaolo Bonzini * after calling the function. 5524c50d8ae3SPaolo Bonzini */ 5525c50d8ae3SPaolo Bonzini static void kvm_mmu_zap_all_fast(struct kvm *kvm) 5526c50d8ae3SPaolo Bonzini { 5527c50d8ae3SPaolo Bonzini lockdep_assert_held(&kvm->slots_lock); 5528c50d8ae3SPaolo Bonzini 5529531810caSBen Gardon write_lock(&kvm->mmu_lock); 5530c50d8ae3SPaolo Bonzini trace_kvm_mmu_zap_all_fast(kvm); 5531c50d8ae3SPaolo Bonzini 5532c50d8ae3SPaolo Bonzini /* 5533c50d8ae3SPaolo Bonzini * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is 5534c50d8ae3SPaolo Bonzini * held for the entire duration of zapping obsolete pages, it's 5535c50d8ae3SPaolo Bonzini * impossible for there to be multiple invalid generations associated 5536c50d8ae3SPaolo Bonzini * with *valid* shadow pages at any given time, i.e. there is exactly 5537c50d8ae3SPaolo Bonzini * one valid generation and (at most) one invalid generation. 5538c50d8ae3SPaolo Bonzini */ 5539c50d8ae3SPaolo Bonzini kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; 5540c50d8ae3SPaolo Bonzini 5541b7cccd39SBen Gardon /* In order to ensure all threads see this change when 5542b7cccd39SBen Gardon * handling the MMU reload signal, this must happen in the 5543b7cccd39SBen Gardon * same critical section as kvm_reload_remote_mmus, and 5544b7cccd39SBen Gardon * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages 5545b7cccd39SBen Gardon * could drop the MMU lock and yield. 5546b7cccd39SBen Gardon */ 5547b7cccd39SBen Gardon if (is_tdp_mmu_enabled(kvm)) 5548b7cccd39SBen Gardon kvm_tdp_mmu_invalidate_all_roots(kvm); 5549b7cccd39SBen Gardon 5550c50d8ae3SPaolo Bonzini /* 5551c50d8ae3SPaolo Bonzini * Notify all vcpus to reload its shadow page table and flush TLB. 5552c50d8ae3SPaolo Bonzini * Then all vcpus will switch to new shadow page table with the new 5553c50d8ae3SPaolo Bonzini * mmu_valid_gen. 5554c50d8ae3SPaolo Bonzini * 5555c50d8ae3SPaolo Bonzini * Note: we need to do this under the protection of mmu_lock, 5556c50d8ae3SPaolo Bonzini * otherwise, vcpu would purge shadow page but miss tlb flush. 5557c50d8ae3SPaolo Bonzini */ 5558c50d8ae3SPaolo Bonzini kvm_reload_remote_mmus(kvm); 5559c50d8ae3SPaolo Bonzini 5560c50d8ae3SPaolo Bonzini kvm_zap_obsolete_pages(kvm); 5561faaf05b0SBen Gardon 5562531810caSBen Gardon write_unlock(&kvm->mmu_lock); 55634c6654bdSBen Gardon 55644c6654bdSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 55654c6654bdSBen Gardon read_lock(&kvm->mmu_lock); 55664c6654bdSBen Gardon kvm_tdp_mmu_zap_invalidated_roots(kvm); 55674c6654bdSBen Gardon read_unlock(&kvm->mmu_lock); 55684c6654bdSBen Gardon } 5569c50d8ae3SPaolo Bonzini } 5570c50d8ae3SPaolo Bonzini 5571c50d8ae3SPaolo Bonzini static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) 5572c50d8ae3SPaolo Bonzini { 5573c50d8ae3SPaolo Bonzini return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); 5574c50d8ae3SPaolo Bonzini } 5575c50d8ae3SPaolo Bonzini 5576c50d8ae3SPaolo Bonzini static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, 5577c50d8ae3SPaolo Bonzini struct kvm_memory_slot *slot, 5578c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node) 5579c50d8ae3SPaolo Bonzini { 5580c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5581c50d8ae3SPaolo Bonzini } 5582c50d8ae3SPaolo Bonzini 5583c50d8ae3SPaolo Bonzini void kvm_mmu_init_vm(struct kvm *kvm) 5584c50d8ae3SPaolo Bonzini { 5585c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5586c50d8ae3SPaolo Bonzini 5587d501f747SBen Gardon if (!kvm_mmu_init_tdp_mmu(kvm)) 5588d501f747SBen Gardon /* 5589d501f747SBen Gardon * No smp_load/store wrappers needed here as we are in 5590d501f747SBen Gardon * VM init and there cannot be any memslots / other threads 5591d501f747SBen Gardon * accessing this struct kvm yet. 5592d501f747SBen Gardon */ 5593a2557408SBen Gardon kvm->arch.memslots_have_rmaps = true; 5594fe5db27dSBen Gardon 5595c50d8ae3SPaolo Bonzini node->track_write = kvm_mmu_pte_write; 5596c50d8ae3SPaolo Bonzini node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot; 5597c50d8ae3SPaolo Bonzini kvm_page_track_register_notifier(kvm, node); 5598c50d8ae3SPaolo Bonzini } 5599c50d8ae3SPaolo Bonzini 5600c50d8ae3SPaolo Bonzini void kvm_mmu_uninit_vm(struct kvm *kvm) 5601c50d8ae3SPaolo Bonzini { 5602c50d8ae3SPaolo Bonzini struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; 5603c50d8ae3SPaolo Bonzini 5604c50d8ae3SPaolo Bonzini kvm_page_track_unregister_notifier(kvm, node); 5605fe5db27dSBen Gardon 5606fe5db27dSBen Gardon kvm_mmu_uninit_tdp_mmu(kvm); 5607c50d8ae3SPaolo Bonzini } 5608c50d8ae3SPaolo Bonzini 5609c50d8ae3SPaolo Bonzini void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) 5610c50d8ae3SPaolo Bonzini { 5611c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 5612c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 5613c50d8ae3SPaolo Bonzini int i; 56141a61b7dbSSean Christopherson bool flush = false; 5615c50d8ae3SPaolo Bonzini 5616e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5617531810caSBen Gardon write_lock(&kvm->mmu_lock); 5618c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5619c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 5620c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) { 5621c50d8ae3SPaolo Bonzini gfn_t start, end; 5622c50d8ae3SPaolo Bonzini 5623c50d8ae3SPaolo Bonzini start = max(gfn_start, memslot->base_gfn); 5624c50d8ae3SPaolo Bonzini end = min(gfn_end, memslot->base_gfn + memslot->npages); 5625c50d8ae3SPaolo Bonzini if (start >= end) 5626c50d8ae3SPaolo Bonzini continue; 5627c50d8ae3SPaolo Bonzini 5628269e9552SHamza Mahfooz flush = slot_handle_level_range(kvm, 5629269e9552SHamza Mahfooz (const struct kvm_memory_slot *) memslot, 5630e2209710SBen Gardon kvm_zap_rmapp, PG_LEVEL_4K, 5631e2209710SBen Gardon KVM_MAX_HUGEPAGE_LEVEL, start, 5632e2209710SBen Gardon end - 1, true, flush); 5633c50d8ae3SPaolo Bonzini } 5634c50d8ae3SPaolo Bonzini } 5635faaf05b0SBen Gardon if (flush) 56361a61b7dbSSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, gfn_start, gfn_end); 5637531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5638e2209710SBen Gardon } 56396103bc07SBen Gardon 56406103bc07SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 56416103bc07SBen Gardon flush = false; 56426103bc07SBen Gardon 56436103bc07SBen Gardon read_lock(&kvm->mmu_lock); 56446103bc07SBen Gardon for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) 56456103bc07SBen Gardon flush = kvm_tdp_mmu_zap_gfn_range(kvm, i, gfn_start, 56466103bc07SBen Gardon gfn_end, flush, true); 56476103bc07SBen Gardon if (flush) 56486103bc07SBen Gardon kvm_flush_remote_tlbs_with_address(kvm, gfn_start, 56496103bc07SBen Gardon gfn_end); 56506103bc07SBen Gardon 56516103bc07SBen Gardon read_unlock(&kvm->mmu_lock); 56526103bc07SBen Gardon } 5653c50d8ae3SPaolo Bonzini } 5654c50d8ae3SPaolo Bonzini 5655c50d8ae3SPaolo Bonzini static bool slot_rmap_write_protect(struct kvm *kvm, 56560a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5657269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5658c50d8ae3SPaolo Bonzini { 5659c50d8ae3SPaolo Bonzini return __rmap_write_protect(kvm, rmap_head, false); 5660c50d8ae3SPaolo Bonzini } 5661c50d8ae3SPaolo Bonzini 5662c50d8ae3SPaolo Bonzini void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 5663269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot, 56643c9bd400SJay Zhou int start_level) 5665c50d8ae3SPaolo Bonzini { 5666e2209710SBen Gardon bool flush = false; 5667c50d8ae3SPaolo Bonzini 5668e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5669531810caSBen Gardon write_lock(&kvm->mmu_lock); 56703c9bd400SJay Zhou flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect, 5671e2209710SBen Gardon start_level, KVM_MAX_HUGEPAGE_LEVEL, 5672e2209710SBen Gardon false); 5673531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5674e2209710SBen Gardon } 5675c50d8ae3SPaolo Bonzini 567624ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 567724ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 567824ae4cfaSBen Gardon flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level); 567924ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 568024ae4cfaSBen Gardon } 568124ae4cfaSBen Gardon 5682c50d8ae3SPaolo Bonzini /* 5683c50d8ae3SPaolo Bonzini * We can flush all the TLBs out of the mmu lock without TLB 5684c50d8ae3SPaolo Bonzini * corruption since we just change the spte from writable to 5685c50d8ae3SPaolo Bonzini * readonly so that we only need to care the case of changing 5686c50d8ae3SPaolo Bonzini * spte from present to present (changing the spte from present 5687c50d8ae3SPaolo Bonzini * to nonpresent will flush all the TLBs immediately), in other 5688c50d8ae3SPaolo Bonzini * words, the only case we care is mmu_spte_update() where we 56895fc3424fSSean Christopherson * have checked Host-writable | MMU-writable instead of 56905fc3424fSSean Christopherson * PT_WRITABLE_MASK, that means it does not depend on PT_WRITABLE_MASK 56915fc3424fSSean Christopherson * anymore. 5692c50d8ae3SPaolo Bonzini */ 5693c50d8ae3SPaolo Bonzini if (flush) 56947f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5695c50d8ae3SPaolo Bonzini } 5696c50d8ae3SPaolo Bonzini 5697c50d8ae3SPaolo Bonzini static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, 56980a234f5dSSean Christopherson struct kvm_rmap_head *rmap_head, 5699269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5700c50d8ae3SPaolo Bonzini { 5701c50d8ae3SPaolo Bonzini u64 *sptep; 5702c50d8ae3SPaolo Bonzini struct rmap_iterator iter; 5703c50d8ae3SPaolo Bonzini int need_tlb_flush = 0; 5704c50d8ae3SPaolo Bonzini kvm_pfn_t pfn; 5705c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 5706c50d8ae3SPaolo Bonzini 5707c50d8ae3SPaolo Bonzini restart: 5708c50d8ae3SPaolo Bonzini for_each_rmap_spte(rmap_head, &iter, sptep) { 570957354682SSean Christopherson sp = sptep_to_sp(sptep); 5710c50d8ae3SPaolo Bonzini pfn = spte_to_pfn(*sptep); 5711c50d8ae3SPaolo Bonzini 5712c50d8ae3SPaolo Bonzini /* 5713c50d8ae3SPaolo Bonzini * We cannot do huge page mapping for indirect shadow pages, 5714c50d8ae3SPaolo Bonzini * which are found on the last rmap (level = 1) when not using 5715c50d8ae3SPaolo Bonzini * tdp; such shadow pages are synced with the page table in 5716c50d8ae3SPaolo Bonzini * the guest, and the guest page table is using 4K page size 5717c50d8ae3SPaolo Bonzini * mapping if the indirect sp has level = 1. 5718c50d8ae3SPaolo Bonzini */ 5719c50d8ae3SPaolo Bonzini if (sp->role.direct && !kvm_is_reserved_pfn(pfn) && 57209eba50f8SSean Christopherson sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, 57219eba50f8SSean Christopherson pfn, PG_LEVEL_NUM)) { 5722c50d8ae3SPaolo Bonzini pte_list_remove(rmap_head, sptep); 5723c50d8ae3SPaolo Bonzini 5724c50d8ae3SPaolo Bonzini if (kvm_available_flush_tlb_with_range()) 5725c50d8ae3SPaolo Bonzini kvm_flush_remote_tlbs_with_address(kvm, sp->gfn, 5726c50d8ae3SPaolo Bonzini KVM_PAGES_PER_HPAGE(sp->role.level)); 5727c50d8ae3SPaolo Bonzini else 5728c50d8ae3SPaolo Bonzini need_tlb_flush = 1; 5729c50d8ae3SPaolo Bonzini 5730c50d8ae3SPaolo Bonzini goto restart; 5731c50d8ae3SPaolo Bonzini } 5732c50d8ae3SPaolo Bonzini } 5733c50d8ae3SPaolo Bonzini 5734c50d8ae3SPaolo Bonzini return need_tlb_flush; 5735c50d8ae3SPaolo Bonzini } 5736c50d8ae3SPaolo Bonzini 5737c50d8ae3SPaolo Bonzini void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 5738269e9552SHamza Mahfooz const struct kvm_memory_slot *slot) 5739c50d8ae3SPaolo Bonzini { 574031c65657SColin Ian King bool flush = false; 57419eba50f8SSean Christopherson 5742e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5743531810caSBen Gardon write_lock(&kvm->mmu_lock); 5744302695a5SSean Christopherson flush = slot_handle_leaf(kvm, slot, kvm_mmu_zap_collapsible_spte, true); 5745302695a5SSean Christopherson if (flush) 5746302695a5SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 5747531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5748e2209710SBen Gardon } 57492db6f772SBen Gardon 57502db6f772SBen Gardon if (is_tdp_mmu_enabled(kvm)) { 57512db6f772SBen Gardon read_lock(&kvm->mmu_lock); 57522db6f772SBen Gardon flush = kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot, flush); 57532db6f772SBen Gardon if (flush) 57542db6f772SBen Gardon kvm_arch_flush_remote_tlbs_memslot(kvm, slot); 57552db6f772SBen Gardon read_unlock(&kvm->mmu_lock); 57562db6f772SBen Gardon } 5757c50d8ae3SPaolo Bonzini } 5758c50d8ae3SPaolo Bonzini 5759b3594ffbSSean Christopherson void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 57606c9dd6d2SPaolo Bonzini const struct kvm_memory_slot *memslot) 5761b3594ffbSSean Christopherson { 5762b3594ffbSSean Christopherson /* 57637f42aa76SSean Christopherson * All current use cases for flushing the TLBs for a specific memslot 5764302695a5SSean Christopherson * related to dirty logging, and many do the TLB flush out of mmu_lock. 57657f42aa76SSean Christopherson * The interaction between the various operations on memslot must be 57667f42aa76SSean Christopherson * serialized by slots_locks to ensure the TLB flush from one operation 57677f42aa76SSean Christopherson * is observed by any other operation on the same memslot. 5768b3594ffbSSean Christopherson */ 5769b3594ffbSSean Christopherson lockdep_assert_held(&kvm->slots_lock); 5770cec37648SSean Christopherson kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn, 5771cec37648SSean Christopherson memslot->npages); 5772b3594ffbSSean Christopherson } 5773b3594ffbSSean Christopherson 5774c50d8ae3SPaolo Bonzini void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 5775269e9552SHamza Mahfooz const struct kvm_memory_slot *memslot) 5776c50d8ae3SPaolo Bonzini { 5777e2209710SBen Gardon bool flush = false; 5778c50d8ae3SPaolo Bonzini 5779e2209710SBen Gardon if (kvm_memslots_have_rmaps(kvm)) { 5780531810caSBen Gardon write_lock(&kvm->mmu_lock); 5781e2209710SBen Gardon flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, 5782e2209710SBen Gardon false); 5783531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5784e2209710SBen Gardon } 5785c50d8ae3SPaolo Bonzini 578624ae4cfaSBen Gardon if (is_tdp_mmu_enabled(kvm)) { 578724ae4cfaSBen Gardon read_lock(&kvm->mmu_lock); 578824ae4cfaSBen Gardon flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot); 578924ae4cfaSBen Gardon read_unlock(&kvm->mmu_lock); 579024ae4cfaSBen Gardon } 579124ae4cfaSBen Gardon 5792c50d8ae3SPaolo Bonzini /* 5793c50d8ae3SPaolo Bonzini * It's also safe to flush TLBs out of mmu lock here as currently this 5794c50d8ae3SPaolo Bonzini * function is only used for dirty logging, in which case flushing TLB 5795c50d8ae3SPaolo Bonzini * out of mmu lock also guarantees no dirty pages will be lost in 5796c50d8ae3SPaolo Bonzini * dirty_bitmap. 5797c50d8ae3SPaolo Bonzini */ 5798c50d8ae3SPaolo Bonzini if (flush) 57997f42aa76SSean Christopherson kvm_arch_flush_remote_tlbs_memslot(kvm, memslot); 5800c50d8ae3SPaolo Bonzini } 5801c50d8ae3SPaolo Bonzini 5802c50d8ae3SPaolo Bonzini void kvm_mmu_zap_all(struct kvm *kvm) 5803c50d8ae3SPaolo Bonzini { 5804c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp, *node; 5805c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5806c50d8ae3SPaolo Bonzini int ign; 5807c50d8ae3SPaolo Bonzini 5808531810caSBen Gardon write_lock(&kvm->mmu_lock); 5809c50d8ae3SPaolo Bonzini restart: 5810c50d8ae3SPaolo Bonzini list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { 5811f95eec9bSSean Christopherson if (WARN_ON(sp->role.invalid)) 5812c50d8ae3SPaolo Bonzini continue; 5813c50d8ae3SPaolo Bonzini if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign)) 5814c50d8ae3SPaolo Bonzini goto restart; 5815531810caSBen Gardon if (cond_resched_rwlock_write(&kvm->mmu_lock)) 5816c50d8ae3SPaolo Bonzini goto restart; 5817c50d8ae3SPaolo Bonzini } 5818c50d8ae3SPaolo Bonzini 5819c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, &invalid_list); 5820faaf05b0SBen Gardon 5821897218ffSPaolo Bonzini if (is_tdp_mmu_enabled(kvm)) 5822faaf05b0SBen Gardon kvm_tdp_mmu_zap_all(kvm); 5823faaf05b0SBen Gardon 5824531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5825c50d8ae3SPaolo Bonzini } 5826c50d8ae3SPaolo Bonzini 5827c50d8ae3SPaolo Bonzini void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen) 5828c50d8ae3SPaolo Bonzini { 5829c50d8ae3SPaolo Bonzini WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS); 5830c50d8ae3SPaolo Bonzini 5831c50d8ae3SPaolo Bonzini gen &= MMIO_SPTE_GEN_MASK; 5832c50d8ae3SPaolo Bonzini 5833c50d8ae3SPaolo Bonzini /* 5834c50d8ae3SPaolo Bonzini * Generation numbers are incremented in multiples of the number of 5835c50d8ae3SPaolo Bonzini * address spaces in order to provide unique generations across all 5836c50d8ae3SPaolo Bonzini * address spaces. Strip what is effectively the address space 5837c50d8ae3SPaolo Bonzini * modifier prior to checking for a wrap of the MMIO generation so 5838c50d8ae3SPaolo Bonzini * that a wrap in any address space is detected. 5839c50d8ae3SPaolo Bonzini */ 5840c50d8ae3SPaolo Bonzini gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); 5841c50d8ae3SPaolo Bonzini 5842c50d8ae3SPaolo Bonzini /* 5843c50d8ae3SPaolo Bonzini * The very rare case: if the MMIO generation number has wrapped, 5844c50d8ae3SPaolo Bonzini * zap all shadow pages. 5845c50d8ae3SPaolo Bonzini */ 5846c50d8ae3SPaolo Bonzini if (unlikely(gen == 0)) { 5847c50d8ae3SPaolo Bonzini kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n"); 5848c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5849c50d8ae3SPaolo Bonzini } 5850c50d8ae3SPaolo Bonzini } 5851c50d8ae3SPaolo Bonzini 5852c50d8ae3SPaolo Bonzini static unsigned long 5853c50d8ae3SPaolo Bonzini mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) 5854c50d8ae3SPaolo Bonzini { 5855c50d8ae3SPaolo Bonzini struct kvm *kvm; 5856c50d8ae3SPaolo Bonzini int nr_to_scan = sc->nr_to_scan; 5857c50d8ae3SPaolo Bonzini unsigned long freed = 0; 5858c50d8ae3SPaolo Bonzini 5859c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5860c50d8ae3SPaolo Bonzini 5861c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5862c50d8ae3SPaolo Bonzini int idx; 5863c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 5864c50d8ae3SPaolo Bonzini 5865c50d8ae3SPaolo Bonzini /* 5866c50d8ae3SPaolo Bonzini * Never scan more than sc->nr_to_scan VM instances. 5867c50d8ae3SPaolo Bonzini * Will not hit this condition practically since we do not try 5868c50d8ae3SPaolo Bonzini * to shrink more than one VM and it is very unlikely to see 5869c50d8ae3SPaolo Bonzini * !n_used_mmu_pages so many times. 5870c50d8ae3SPaolo Bonzini */ 5871c50d8ae3SPaolo Bonzini if (!nr_to_scan--) 5872c50d8ae3SPaolo Bonzini break; 5873c50d8ae3SPaolo Bonzini /* 5874c50d8ae3SPaolo Bonzini * n_used_mmu_pages is accessed without holding kvm->mmu_lock 5875c50d8ae3SPaolo Bonzini * here. We may skip a VM instance errorneosly, but we do not 5876c50d8ae3SPaolo Bonzini * want to shrink a VM that only started to populate its MMU 5877c50d8ae3SPaolo Bonzini * anyway. 5878c50d8ae3SPaolo Bonzini */ 5879c50d8ae3SPaolo Bonzini if (!kvm->arch.n_used_mmu_pages && 5880c50d8ae3SPaolo Bonzini !kvm_has_zapped_obsolete_pages(kvm)) 5881c50d8ae3SPaolo Bonzini continue; 5882c50d8ae3SPaolo Bonzini 5883c50d8ae3SPaolo Bonzini idx = srcu_read_lock(&kvm->srcu); 5884531810caSBen Gardon write_lock(&kvm->mmu_lock); 5885c50d8ae3SPaolo Bonzini 5886c50d8ae3SPaolo Bonzini if (kvm_has_zapped_obsolete_pages(kvm)) { 5887c50d8ae3SPaolo Bonzini kvm_mmu_commit_zap_page(kvm, 5888c50d8ae3SPaolo Bonzini &kvm->arch.zapped_obsolete_pages); 5889c50d8ae3SPaolo Bonzini goto unlock; 5890c50d8ae3SPaolo Bonzini } 5891c50d8ae3SPaolo Bonzini 5892ebdb292dSSean Christopherson freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); 5893c50d8ae3SPaolo Bonzini 5894c50d8ae3SPaolo Bonzini unlock: 5895531810caSBen Gardon write_unlock(&kvm->mmu_lock); 5896c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, idx); 5897c50d8ae3SPaolo Bonzini 5898c50d8ae3SPaolo Bonzini /* 5899c50d8ae3SPaolo Bonzini * unfair on small ones 5900c50d8ae3SPaolo Bonzini * per-vm shrinkers cry out 5901c50d8ae3SPaolo Bonzini * sadness comes quickly 5902c50d8ae3SPaolo Bonzini */ 5903c50d8ae3SPaolo Bonzini list_move_tail(&kvm->vm_list, &vm_list); 5904c50d8ae3SPaolo Bonzini break; 5905c50d8ae3SPaolo Bonzini } 5906c50d8ae3SPaolo Bonzini 5907c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5908c50d8ae3SPaolo Bonzini return freed; 5909c50d8ae3SPaolo Bonzini } 5910c50d8ae3SPaolo Bonzini 5911c50d8ae3SPaolo Bonzini static unsigned long 5912c50d8ae3SPaolo Bonzini mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) 5913c50d8ae3SPaolo Bonzini { 5914c50d8ae3SPaolo Bonzini return percpu_counter_read_positive(&kvm_total_used_mmu_pages); 5915c50d8ae3SPaolo Bonzini } 5916c50d8ae3SPaolo Bonzini 5917c50d8ae3SPaolo Bonzini static struct shrinker mmu_shrinker = { 5918c50d8ae3SPaolo Bonzini .count_objects = mmu_shrink_count, 5919c50d8ae3SPaolo Bonzini .scan_objects = mmu_shrink_scan, 5920c50d8ae3SPaolo Bonzini .seeks = DEFAULT_SEEKS * 10, 5921c50d8ae3SPaolo Bonzini }; 5922c50d8ae3SPaolo Bonzini 5923c50d8ae3SPaolo Bonzini static void mmu_destroy_caches(void) 5924c50d8ae3SPaolo Bonzini { 5925c50d8ae3SPaolo Bonzini kmem_cache_destroy(pte_list_desc_cache); 5926c50d8ae3SPaolo Bonzini kmem_cache_destroy(mmu_page_header_cache); 5927c50d8ae3SPaolo Bonzini } 5928c50d8ae3SPaolo Bonzini 5929c50d8ae3SPaolo Bonzini static bool get_nx_auto_mode(void) 5930c50d8ae3SPaolo Bonzini { 5931c50d8ae3SPaolo Bonzini /* Return true when CPU has the bug, and mitigations are ON */ 5932c50d8ae3SPaolo Bonzini return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off(); 5933c50d8ae3SPaolo Bonzini } 5934c50d8ae3SPaolo Bonzini 5935c50d8ae3SPaolo Bonzini static void __set_nx_huge_pages(bool val) 5936c50d8ae3SPaolo Bonzini { 5937c50d8ae3SPaolo Bonzini nx_huge_pages = itlb_multihit_kvm_mitigation = val; 5938c50d8ae3SPaolo Bonzini } 5939c50d8ae3SPaolo Bonzini 5940c50d8ae3SPaolo Bonzini static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) 5941c50d8ae3SPaolo Bonzini { 5942c50d8ae3SPaolo Bonzini bool old_val = nx_huge_pages; 5943c50d8ae3SPaolo Bonzini bool new_val; 5944c50d8ae3SPaolo Bonzini 5945c50d8ae3SPaolo Bonzini /* In "auto" mode deploy workaround only if CPU has the bug. */ 5946c50d8ae3SPaolo Bonzini if (sysfs_streq(val, "off")) 5947c50d8ae3SPaolo Bonzini new_val = 0; 5948c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "force")) 5949c50d8ae3SPaolo Bonzini new_val = 1; 5950c50d8ae3SPaolo Bonzini else if (sysfs_streq(val, "auto")) 5951c50d8ae3SPaolo Bonzini new_val = get_nx_auto_mode(); 5952c50d8ae3SPaolo Bonzini else if (strtobool(val, &new_val) < 0) 5953c50d8ae3SPaolo Bonzini return -EINVAL; 5954c50d8ae3SPaolo Bonzini 5955c50d8ae3SPaolo Bonzini __set_nx_huge_pages(new_val); 5956c50d8ae3SPaolo Bonzini 5957c50d8ae3SPaolo Bonzini if (new_val != old_val) { 5958c50d8ae3SPaolo Bonzini struct kvm *kvm; 5959c50d8ae3SPaolo Bonzini 5960c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 5961c50d8ae3SPaolo Bonzini 5962c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) { 5963c50d8ae3SPaolo Bonzini mutex_lock(&kvm->slots_lock); 5964c50d8ae3SPaolo Bonzini kvm_mmu_zap_all_fast(kvm); 5965c50d8ae3SPaolo Bonzini mutex_unlock(&kvm->slots_lock); 5966c50d8ae3SPaolo Bonzini 5967c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 5968c50d8ae3SPaolo Bonzini } 5969c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 5970c50d8ae3SPaolo Bonzini } 5971c50d8ae3SPaolo Bonzini 5972c50d8ae3SPaolo Bonzini return 0; 5973c50d8ae3SPaolo Bonzini } 5974c50d8ae3SPaolo Bonzini 5975c50d8ae3SPaolo Bonzini int kvm_mmu_module_init(void) 5976c50d8ae3SPaolo Bonzini { 5977c50d8ae3SPaolo Bonzini int ret = -ENOMEM; 5978c50d8ae3SPaolo Bonzini 5979c50d8ae3SPaolo Bonzini if (nx_huge_pages == -1) 5980c50d8ae3SPaolo Bonzini __set_nx_huge_pages(get_nx_auto_mode()); 5981c50d8ae3SPaolo Bonzini 5982c50d8ae3SPaolo Bonzini /* 5983c50d8ae3SPaolo Bonzini * MMU roles use union aliasing which is, generally speaking, an 5984c50d8ae3SPaolo Bonzini * undefined behavior. However, we supposedly know how compilers behave 5985c50d8ae3SPaolo Bonzini * and the current status quo is unlikely to change. Guardians below are 5986c50d8ae3SPaolo Bonzini * supposed to let us know if the assumption becomes false. 5987c50d8ae3SPaolo Bonzini */ 5988c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32)); 5989c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32)); 5990c50d8ae3SPaolo Bonzini BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64)); 5991c50d8ae3SPaolo Bonzini 5992c50d8ae3SPaolo Bonzini kvm_mmu_reset_all_pte_masks(); 5993c50d8ae3SPaolo Bonzini 5994c50d8ae3SPaolo Bonzini pte_list_desc_cache = kmem_cache_create("pte_list_desc", 5995c50d8ae3SPaolo Bonzini sizeof(struct pte_list_desc), 5996c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 5997c50d8ae3SPaolo Bonzini if (!pte_list_desc_cache) 5998c50d8ae3SPaolo Bonzini goto out; 5999c50d8ae3SPaolo Bonzini 6000c50d8ae3SPaolo Bonzini mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", 6001c50d8ae3SPaolo Bonzini sizeof(struct kvm_mmu_page), 6002c50d8ae3SPaolo Bonzini 0, SLAB_ACCOUNT, NULL); 6003c50d8ae3SPaolo Bonzini if (!mmu_page_header_cache) 6004c50d8ae3SPaolo Bonzini goto out; 6005c50d8ae3SPaolo Bonzini 6006c50d8ae3SPaolo Bonzini if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) 6007c50d8ae3SPaolo Bonzini goto out; 6008c50d8ae3SPaolo Bonzini 6009c50d8ae3SPaolo Bonzini ret = register_shrinker(&mmu_shrinker); 6010c50d8ae3SPaolo Bonzini if (ret) 6011c50d8ae3SPaolo Bonzini goto out; 6012c50d8ae3SPaolo Bonzini 6013c50d8ae3SPaolo Bonzini return 0; 6014c50d8ae3SPaolo Bonzini 6015c50d8ae3SPaolo Bonzini out: 6016c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6017c50d8ae3SPaolo Bonzini return ret; 6018c50d8ae3SPaolo Bonzini } 6019c50d8ae3SPaolo Bonzini 6020c50d8ae3SPaolo Bonzini /* 6021c50d8ae3SPaolo Bonzini * Calculate mmu pages needed for kvm. 6022c50d8ae3SPaolo Bonzini */ 6023c50d8ae3SPaolo Bonzini unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm) 6024c50d8ae3SPaolo Bonzini { 6025c50d8ae3SPaolo Bonzini unsigned long nr_mmu_pages; 6026c50d8ae3SPaolo Bonzini unsigned long nr_pages = 0; 6027c50d8ae3SPaolo Bonzini struct kvm_memslots *slots; 6028c50d8ae3SPaolo Bonzini struct kvm_memory_slot *memslot; 6029c50d8ae3SPaolo Bonzini int i; 6030c50d8ae3SPaolo Bonzini 6031c50d8ae3SPaolo Bonzini for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 6032c50d8ae3SPaolo Bonzini slots = __kvm_memslots(kvm, i); 6033c50d8ae3SPaolo Bonzini 6034c50d8ae3SPaolo Bonzini kvm_for_each_memslot(memslot, slots) 6035c50d8ae3SPaolo Bonzini nr_pages += memslot->npages; 6036c50d8ae3SPaolo Bonzini } 6037c50d8ae3SPaolo Bonzini 6038c50d8ae3SPaolo Bonzini nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; 6039c50d8ae3SPaolo Bonzini nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES); 6040c50d8ae3SPaolo Bonzini 6041c50d8ae3SPaolo Bonzini return nr_mmu_pages; 6042c50d8ae3SPaolo Bonzini } 6043c50d8ae3SPaolo Bonzini 6044c50d8ae3SPaolo Bonzini void kvm_mmu_destroy(struct kvm_vcpu *vcpu) 6045c50d8ae3SPaolo Bonzini { 6046c50d8ae3SPaolo Bonzini kvm_mmu_unload(vcpu); 6047c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.root_mmu); 6048c50d8ae3SPaolo Bonzini free_mmu_pages(&vcpu->arch.guest_mmu); 6049c50d8ae3SPaolo Bonzini mmu_free_memory_caches(vcpu); 6050c50d8ae3SPaolo Bonzini } 6051c50d8ae3SPaolo Bonzini 6052c50d8ae3SPaolo Bonzini void kvm_mmu_module_exit(void) 6053c50d8ae3SPaolo Bonzini { 6054c50d8ae3SPaolo Bonzini mmu_destroy_caches(); 6055c50d8ae3SPaolo Bonzini percpu_counter_destroy(&kvm_total_used_mmu_pages); 6056c50d8ae3SPaolo Bonzini unregister_shrinker(&mmu_shrinker); 6057c50d8ae3SPaolo Bonzini mmu_audit_disable(); 6058c50d8ae3SPaolo Bonzini } 6059c50d8ae3SPaolo Bonzini 6060c50d8ae3SPaolo Bonzini static int set_nx_huge_pages_recovery_ratio(const char *val, const struct kernel_param *kp) 6061c50d8ae3SPaolo Bonzini { 6062c50d8ae3SPaolo Bonzini unsigned int old_val; 6063c50d8ae3SPaolo Bonzini int err; 6064c50d8ae3SPaolo Bonzini 6065c50d8ae3SPaolo Bonzini old_val = nx_huge_pages_recovery_ratio; 6066c50d8ae3SPaolo Bonzini err = param_set_uint(val, kp); 6067c50d8ae3SPaolo Bonzini if (err) 6068c50d8ae3SPaolo Bonzini return err; 6069c50d8ae3SPaolo Bonzini 6070c50d8ae3SPaolo Bonzini if (READ_ONCE(nx_huge_pages) && 6071c50d8ae3SPaolo Bonzini !old_val && nx_huge_pages_recovery_ratio) { 6072c50d8ae3SPaolo Bonzini struct kvm *kvm; 6073c50d8ae3SPaolo Bonzini 6074c50d8ae3SPaolo Bonzini mutex_lock(&kvm_lock); 6075c50d8ae3SPaolo Bonzini 6076c50d8ae3SPaolo Bonzini list_for_each_entry(kvm, &vm_list, vm_list) 6077c50d8ae3SPaolo Bonzini wake_up_process(kvm->arch.nx_lpage_recovery_thread); 6078c50d8ae3SPaolo Bonzini 6079c50d8ae3SPaolo Bonzini mutex_unlock(&kvm_lock); 6080c50d8ae3SPaolo Bonzini } 6081c50d8ae3SPaolo Bonzini 6082c50d8ae3SPaolo Bonzini return err; 6083c50d8ae3SPaolo Bonzini } 6084c50d8ae3SPaolo Bonzini 6085c50d8ae3SPaolo Bonzini static void kvm_recover_nx_lpages(struct kvm *kvm) 6086c50d8ae3SPaolo Bonzini { 6087ade74e14SSean Christopherson unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; 6088c50d8ae3SPaolo Bonzini int rcu_idx; 6089c50d8ae3SPaolo Bonzini struct kvm_mmu_page *sp; 6090c50d8ae3SPaolo Bonzini unsigned int ratio; 6091c50d8ae3SPaolo Bonzini LIST_HEAD(invalid_list); 6092048f4980SSean Christopherson bool flush = false; 6093c50d8ae3SPaolo Bonzini ulong to_zap; 6094c50d8ae3SPaolo Bonzini 6095c50d8ae3SPaolo Bonzini rcu_idx = srcu_read_lock(&kvm->srcu); 6096531810caSBen Gardon write_lock(&kvm->mmu_lock); 6097c50d8ae3SPaolo Bonzini 6098c50d8ae3SPaolo Bonzini ratio = READ_ONCE(nx_huge_pages_recovery_ratio); 6099ade74e14SSean Christopherson to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0; 61007d919c7aSSean Christopherson for ( ; to_zap; --to_zap) { 61017d919c7aSSean Christopherson if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages)) 61027d919c7aSSean Christopherson break; 61037d919c7aSSean Christopherson 6104c50d8ae3SPaolo Bonzini /* 6105c50d8ae3SPaolo Bonzini * We use a separate list instead of just using active_mmu_pages 6106c50d8ae3SPaolo Bonzini * because the number of lpage_disallowed pages is expected to 6107c50d8ae3SPaolo Bonzini * be relatively small compared to the total. 6108c50d8ae3SPaolo Bonzini */ 6109c50d8ae3SPaolo Bonzini sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages, 6110c50d8ae3SPaolo Bonzini struct kvm_mmu_page, 6111c50d8ae3SPaolo Bonzini lpage_disallowed_link); 6112c50d8ae3SPaolo Bonzini WARN_ON_ONCE(!sp->lpage_disallowed); 6113897218ffSPaolo Bonzini if (is_tdp_mmu_page(sp)) { 6114315f02c6SPaolo Bonzini flush |= kvm_tdp_mmu_zap_sp(kvm, sp); 61158d1a182eSBen Gardon } else { 6116c50d8ae3SPaolo Bonzini kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); 6117c50d8ae3SPaolo Bonzini WARN_ON_ONCE(sp->lpage_disallowed); 611829cf0f50SBen Gardon } 6119c50d8ae3SPaolo Bonzini 6120531810caSBen Gardon if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { 6121048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6122531810caSBen Gardon cond_resched_rwlock_write(&kvm->mmu_lock); 6123048f4980SSean Christopherson flush = false; 6124c50d8ae3SPaolo Bonzini } 6125c50d8ae3SPaolo Bonzini } 6126048f4980SSean Christopherson kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); 6127c50d8ae3SPaolo Bonzini 6128531810caSBen Gardon write_unlock(&kvm->mmu_lock); 6129c50d8ae3SPaolo Bonzini srcu_read_unlock(&kvm->srcu, rcu_idx); 6130c50d8ae3SPaolo Bonzini } 6131c50d8ae3SPaolo Bonzini 6132c50d8ae3SPaolo Bonzini static long get_nx_lpage_recovery_timeout(u64 start_time) 6133c50d8ae3SPaolo Bonzini { 6134c50d8ae3SPaolo Bonzini return READ_ONCE(nx_huge_pages) && READ_ONCE(nx_huge_pages_recovery_ratio) 6135c50d8ae3SPaolo Bonzini ? start_time + 60 * HZ - get_jiffies_64() 6136c50d8ae3SPaolo Bonzini : MAX_SCHEDULE_TIMEOUT; 6137c50d8ae3SPaolo Bonzini } 6138c50d8ae3SPaolo Bonzini 6139c50d8ae3SPaolo Bonzini static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data) 6140c50d8ae3SPaolo Bonzini { 6141c50d8ae3SPaolo Bonzini u64 start_time; 6142c50d8ae3SPaolo Bonzini long remaining_time; 6143c50d8ae3SPaolo Bonzini 6144c50d8ae3SPaolo Bonzini while (true) { 6145c50d8ae3SPaolo Bonzini start_time = get_jiffies_64(); 6146c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6147c50d8ae3SPaolo Bonzini 6148c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6149c50d8ae3SPaolo Bonzini while (!kthread_should_stop() && remaining_time > 0) { 6150c50d8ae3SPaolo Bonzini schedule_timeout(remaining_time); 6151c50d8ae3SPaolo Bonzini remaining_time = get_nx_lpage_recovery_timeout(start_time); 6152c50d8ae3SPaolo Bonzini set_current_state(TASK_INTERRUPTIBLE); 6153c50d8ae3SPaolo Bonzini } 6154c50d8ae3SPaolo Bonzini 6155c50d8ae3SPaolo Bonzini set_current_state(TASK_RUNNING); 6156c50d8ae3SPaolo Bonzini 6157c50d8ae3SPaolo Bonzini if (kthread_should_stop()) 6158c50d8ae3SPaolo Bonzini return 0; 6159c50d8ae3SPaolo Bonzini 6160c50d8ae3SPaolo Bonzini kvm_recover_nx_lpages(kvm); 6161c50d8ae3SPaolo Bonzini } 6162c50d8ae3SPaolo Bonzini } 6163c50d8ae3SPaolo Bonzini 6164c50d8ae3SPaolo Bonzini int kvm_mmu_post_init_vm(struct kvm *kvm) 6165c50d8ae3SPaolo Bonzini { 6166c50d8ae3SPaolo Bonzini int err; 6167c50d8ae3SPaolo Bonzini 6168c50d8ae3SPaolo Bonzini err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0, 6169c50d8ae3SPaolo Bonzini "kvm-nx-lpage-recovery", 6170c50d8ae3SPaolo Bonzini &kvm->arch.nx_lpage_recovery_thread); 6171c50d8ae3SPaolo Bonzini if (!err) 6172c50d8ae3SPaolo Bonzini kthread_unpark(kvm->arch.nx_lpage_recovery_thread); 6173c50d8ae3SPaolo Bonzini 6174c50d8ae3SPaolo Bonzini return err; 6175c50d8ae3SPaolo Bonzini } 6176c50d8ae3SPaolo Bonzini 6177c50d8ae3SPaolo Bonzini void kvm_mmu_pre_destroy_vm(struct kvm *kvm) 6178c50d8ae3SPaolo Bonzini { 6179c50d8ae3SPaolo Bonzini if (kvm->arch.nx_lpage_recovery_thread) 6180c50d8ae3SPaolo Bonzini kthread_stop(kvm->arch.nx_lpage_recovery_thread); 6181c50d8ae3SPaolo Bonzini } 6182