1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * x86_emulate.h 4 * 5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. 6 * 7 * Copyright (c) 2005 Keir Fraser 8 * 9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 10 */ 11 12 #ifndef _ASM_X86_KVM_X86_EMULATE_H 13 #define _ASM_X86_KVM_X86_EMULATE_H 14 15 #include <asm/desc_defs.h> 16 #include "fpu.h" 17 18 struct x86_emulate_ctxt; 19 enum x86_intercept; 20 enum x86_intercept_stage; 21 22 struct x86_exception { 23 u8 vector; 24 bool error_code_valid; 25 u16 error_code; 26 bool nested_page_fault; 27 u64 address; /* cr2 or nested page fault gpa */ 28 u8 async_page_fault; 29 unsigned long exit_qualification; 30 }; 31 32 /* 33 * This struct is used to carry enough information from the instruction 34 * decoder to main KVM so that a decision can be made whether the 35 * instruction needs to be intercepted or not. 36 */ 37 struct x86_instruction_info { 38 u8 intercept; /* which intercept */ 39 u8 rep_prefix; /* rep prefix? */ 40 u8 modrm_mod; /* mod part of modrm */ 41 u8 modrm_reg; /* index of register used */ 42 u8 modrm_rm; /* rm part of modrm */ 43 u64 src_val; /* value of source operand */ 44 u64 dst_val; /* value of destination operand */ 45 u8 src_bytes; /* size of source operand */ 46 u8 dst_bytes; /* size of destination operand */ 47 u8 ad_bytes; /* size of src/dst address */ 48 u64 next_rip; /* rip following the instruction */ 49 }; 50 51 /* 52 * x86_emulate_ops: 53 * 54 * These operations represent the instruction emulator's interface to memory. 55 * There are two categories of operation: those that act on ordinary memory 56 * regions (*_std), and those that act on memory regions known to require 57 * special treatment or emulation (*_emulated). 58 * 59 * The emulator assumes that an instruction accesses only one 'emulated memory' 60 * location, that this location is the given linear faulting address (cr2), and 61 * that this is one of the instruction's data operands. Instruction fetches and 62 * stack operations are assumed never to access emulated memory. The emulator 63 * automatically deduces which operand of a string-move operation is accessing 64 * emulated memory, and assumes that the other operand accesses normal memory. 65 * 66 * NOTES: 67 * 1. The emulator isn't very smart about emulated vs. standard memory. 68 * 'Emulated memory' access addresses should be checked for sanity. 69 * 'Normal memory' accesses may fault, and the caller must arrange to 70 * detect and handle reentrancy into the emulator via recursive faults. 71 * Accesses may be unaligned and may cross page boundaries. 72 * 2. If the access fails (cannot emulate, or a standard access faults) then 73 * it is up to the memop to propagate the fault to the guest VM via 74 * some out-of-band mechanism, unknown to the emulator. The memop signals 75 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will 76 * then immediately bail. 77 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only 78 * cmpxchg8b_emulated need support 8-byte accesses. 79 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. 80 */ 81 /* Access completed successfully: continue emulation as normal. */ 82 #define X86EMUL_CONTINUE 0 83 /* Access is unhandleable: bail from emulation and return error to caller. */ 84 #define X86EMUL_UNHANDLEABLE 1 85 /* Terminate emulation but return success to the caller. */ 86 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ 87 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ 88 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ 89 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ 90 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ 91 /* Emulation during event vectoring is unhandleable. */ 92 #define X86EMUL_UNHANDLEABLE_VECTORING 7 93 94 /* x86-specific emulation flags */ 95 #define X86EMUL_F_WRITE BIT(0) 96 #define X86EMUL_F_FETCH BIT(1) 97 #define X86EMUL_F_IMPLICIT BIT(2) 98 #define X86EMUL_F_INVLPG BIT(3) 99 #define X86EMUL_F_MSR BIT(4) 100 #define X86EMUL_F_DT_LOAD BIT(5) 101 102 struct x86_emulate_ops { 103 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt); 104 /* 105 * read_gpr: read a general purpose register (rax - r15) 106 * 107 * @reg: gpr number. 108 */ 109 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); 110 /* 111 * write_gpr: write a general purpose register (rax - r15) 112 * 113 * @reg: gpr number. 114 * @val: value to write. 115 */ 116 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); 117 /* 118 * read_std: Read bytes of standard (non-emulated/special) memory. 119 * Used for descriptor reading. 120 * @addr: [IN ] Linear address from which to read. 121 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 122 * @bytes: [IN ] Number of bytes to read from memory. 123 * @system:[IN ] Whether the access is forced to be at CPL0. 124 */ 125 int (*read_std)(struct x86_emulate_ctxt *ctxt, 126 unsigned long addr, void *val, 127 unsigned int bytes, 128 struct x86_exception *fault, bool system); 129 130 /* 131 * write_std: Write bytes of standard (non-emulated/special) memory. 132 * Used for descriptor writing. 133 * @addr: [IN ] Linear address to which to write. 134 * @val: [OUT] Value write to memory, zero-extended to 'u_long'. 135 * @bytes: [IN ] Number of bytes to write to memory. 136 * @system:[IN ] Whether the access is forced to be at CPL0. 137 */ 138 int (*write_std)(struct x86_emulate_ctxt *ctxt, 139 unsigned long addr, void *val, unsigned int bytes, 140 struct x86_exception *fault, bool system); 141 /* 142 * fetch: Read bytes of standard (non-emulated/special) memory. 143 * Used for instruction fetch. 144 * @addr: [IN ] Linear address from which to read. 145 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 146 * @bytes: [IN ] Number of bytes to read from memory. 147 */ 148 int (*fetch)(struct x86_emulate_ctxt *ctxt, 149 unsigned long addr, void *val, unsigned int bytes, 150 struct x86_exception *fault); 151 152 /* 153 * read_emulated: Read bytes from emulated/special memory area. 154 * @addr: [IN ] Linear address from which to read. 155 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 156 * @bytes: [IN ] Number of bytes to read from memory. 157 */ 158 int (*read_emulated)(struct x86_emulate_ctxt *ctxt, 159 unsigned long addr, void *val, unsigned int bytes, 160 struct x86_exception *fault); 161 162 /* 163 * write_emulated: Write bytes to emulated/special memory area. 164 * @addr: [IN ] Linear address to which to write. 165 * @val: [IN ] Value to write to memory (low-order bytes used as 166 * required). 167 * @bytes: [IN ] Number of bytes to write to memory. 168 */ 169 int (*write_emulated)(struct x86_emulate_ctxt *ctxt, 170 unsigned long addr, const void *val, 171 unsigned int bytes, 172 struct x86_exception *fault); 173 174 /* 175 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an 176 * emulated/special memory area. 177 * @addr: [IN ] Linear address to access. 178 * @old: [IN ] Value expected to be current at @addr. 179 * @new: [IN ] Value to write to @addr. 180 * @bytes: [IN ] Number of bytes to access using CMPXCHG. 181 */ 182 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, 183 unsigned long addr, 184 const void *old, 185 const void *new, 186 unsigned int bytes, 187 struct x86_exception *fault); 188 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); 189 190 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, 191 int size, unsigned short port, void *val, 192 unsigned int count); 193 194 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, 195 int size, unsigned short port, const void *val, 196 unsigned int count); 197 198 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, 199 struct desc_struct *desc, u32 *base3, int seg); 200 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, 201 struct desc_struct *desc, u32 base3, int seg); 202 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, 203 int seg); 204 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 205 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 206 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 207 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 208 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); 209 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); 210 int (*cpl)(struct x86_emulate_ctxt *ctxt); 211 ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); 212 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); 213 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); 214 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 215 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 216 int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc); 217 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); 218 void (*halt)(struct x86_emulate_ctxt *ctxt); 219 void (*wbinvd)(struct x86_emulate_ctxt *ctxt); 220 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); 221 int (*intercept)(struct x86_emulate_ctxt *ctxt, 222 struct x86_instruction_info *info, 223 enum x86_intercept_stage stage); 224 225 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, 226 u32 *ecx, u32 *edx, bool exact_only); 227 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt); 228 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt); 229 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt); 230 bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt); 231 232 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); 233 234 bool (*is_smm)(struct x86_emulate_ctxt *ctxt); 235 bool (*is_guest_mode)(struct x86_emulate_ctxt *ctxt); 236 int (*leave_smm)(struct x86_emulate_ctxt *ctxt); 237 void (*triple_fault)(struct x86_emulate_ctxt *ctxt); 238 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr); 239 240 gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 241 unsigned int flags); 242 243 bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 244 unsigned int flags); 245 }; 246 247 /* Type, address-of, and value of an instruction's operand. */ 248 struct operand { 249 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; 250 unsigned int bytes; 251 unsigned int count; 252 union { 253 unsigned long orig_val; 254 u64 orig_val64; 255 }; 256 union { 257 unsigned long *reg; 258 struct segmented_address { 259 ulong ea; 260 unsigned seg; 261 } mem; 262 unsigned xmm; 263 unsigned mm; 264 } addr; 265 union { 266 unsigned long val; 267 u64 val64; 268 char valptr[sizeof(sse128_t)]; 269 sse128_t vec_val; 270 u64 mm_val; 271 void *data; 272 }; 273 }; 274 275 struct fetch_cache { 276 u8 data[15]; 277 u8 *ptr; 278 u8 *end; 279 }; 280 281 struct read_cache { 282 u8 data[1024]; 283 unsigned long pos; 284 unsigned long end; 285 }; 286 287 /* Execution mode, passed to the emulator. */ 288 enum x86emul_mode { 289 X86EMUL_MODE_REAL, /* Real mode. */ 290 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ 291 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ 292 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ 293 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ 294 }; 295 296 /* 297 * fastop functions are declared as taking a never-defined fastop parameter, 298 * so they can't be called from C directly. 299 */ 300 struct fastop; 301 302 typedef void (*fastop_t)(struct fastop *); 303 304 /* 305 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is 306 * tracked/accessed via _eip, and except for RIP relative addressing, which 307 * also uses _eip, RIP cannot be a register operand nor can it be an operand in 308 * a ModRM or SIB byte. 309 */ 310 #ifdef CONFIG_X86_64 311 #define NR_EMULATOR_GPRS 16 312 #else 313 #define NR_EMULATOR_GPRS 8 314 #endif 315 316 struct x86_emulate_ctxt { 317 void *vcpu; 318 const struct x86_emulate_ops *ops; 319 320 /* Register state before/after emulation. */ 321 unsigned long eflags; 322 unsigned long eip; /* eip before instruction emulation */ 323 /* Emulated execution mode, represented by an X86EMUL_MODE value. */ 324 enum x86emul_mode mode; 325 326 /* interruptibility state, as a result of execution of STI or MOV SS */ 327 int interruptibility; 328 329 bool perm_ok; /* do not check permissions if true */ 330 bool tf; /* TF value before instruction (after for syscall/sysret) */ 331 332 bool have_exception; 333 struct x86_exception exception; 334 335 /* GPA available */ 336 bool gpa_available; 337 gpa_t gpa_val; 338 339 /* 340 * decode cache 341 */ 342 343 /* current opcode length in bytes */ 344 u8 opcode_len; 345 u8 b; 346 u8 intercept; 347 u8 op_bytes; 348 u8 ad_bytes; 349 union { 350 int (*execute)(struct x86_emulate_ctxt *ctxt); 351 fastop_t fop; 352 }; 353 int (*check_perm)(struct x86_emulate_ctxt *ctxt); 354 355 bool rip_relative; 356 u8 rex_prefix; 357 u8 lock_prefix; 358 u8 rep_prefix; 359 /* bitmaps of registers in _regs[] that can be read */ 360 u16 regs_valid; 361 /* bitmaps of registers in _regs[] that have been written */ 362 u16 regs_dirty; 363 /* modrm */ 364 u8 modrm; 365 u8 modrm_mod; 366 u8 modrm_reg; 367 u8 modrm_rm; 368 u8 modrm_seg; 369 u8 seg_override; 370 u64 d; 371 unsigned long _eip; 372 373 /* Here begins the usercopy section. */ 374 struct operand src; 375 struct operand src2; 376 struct operand dst; 377 struct operand memop; 378 unsigned long _regs[NR_EMULATOR_GPRS]; 379 struct operand *memopp; 380 struct fetch_cache fetch; 381 struct read_cache io_read; 382 struct read_cache mem_read; 383 bool is_branch; 384 }; 385 386 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \ 387 ({ \ 388 int __ret = (cond); \ 389 \ 390 if (WARN_ON_ONCE(__ret)) \ 391 ctxt->ops->vm_bugged(ctxt); \ 392 unlikely(__ret); \ 393 }) 394 395 /* Repeat String Operation Prefix */ 396 #define REPE_PREFIX 0xf3 397 #define REPNE_PREFIX 0xf2 398 399 /* CPUID vendors */ 400 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 401 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 402 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 403 404 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 405 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 406 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 407 408 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 409 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 410 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e 411 412 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 413 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e 414 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 415 416 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543 417 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561 418 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561 419 420 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx) 421 { 422 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && 423 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && 424 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx; 425 } 426 427 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx) 428 { 429 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && 430 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && 431 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) || 432 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && 433 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && 434 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx); 435 } 436 437 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx) 438 { 439 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx && 440 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx && 441 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx; 442 } 443 444 enum x86_intercept_stage { 445 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ 446 X86_ICPT_PRE_EXCEPT, 447 X86_ICPT_POST_EXCEPT, 448 X86_ICPT_POST_MEMACCESS, 449 }; 450 451 enum x86_intercept { 452 x86_intercept_none, 453 x86_intercept_cr_read, 454 x86_intercept_cr_write, 455 x86_intercept_clts, 456 x86_intercept_lmsw, 457 x86_intercept_smsw, 458 x86_intercept_dr_read, 459 x86_intercept_dr_write, 460 x86_intercept_lidt, 461 x86_intercept_sidt, 462 x86_intercept_lgdt, 463 x86_intercept_sgdt, 464 x86_intercept_lldt, 465 x86_intercept_sldt, 466 x86_intercept_ltr, 467 x86_intercept_str, 468 x86_intercept_rdtsc, 469 x86_intercept_rdpmc, 470 x86_intercept_pushf, 471 x86_intercept_popf, 472 x86_intercept_cpuid, 473 x86_intercept_rsm, 474 x86_intercept_iret, 475 x86_intercept_intn, 476 x86_intercept_invd, 477 x86_intercept_pause, 478 x86_intercept_hlt, 479 x86_intercept_invlpg, 480 x86_intercept_invlpga, 481 x86_intercept_vmrun, 482 x86_intercept_vmload, 483 x86_intercept_vmsave, 484 x86_intercept_vmmcall, 485 x86_intercept_stgi, 486 x86_intercept_clgi, 487 x86_intercept_skinit, 488 x86_intercept_rdtscp, 489 x86_intercept_rdpid, 490 x86_intercept_icebp, 491 x86_intercept_wbinvd, 492 x86_intercept_monitor, 493 x86_intercept_mwait, 494 x86_intercept_rdmsr, 495 x86_intercept_wrmsr, 496 x86_intercept_in, 497 x86_intercept_ins, 498 x86_intercept_out, 499 x86_intercept_outs, 500 x86_intercept_xsetbv, 501 502 nr_x86_intercepts 503 }; 504 505 /* Host execution mode. */ 506 #if defined(CONFIG_X86_32) 507 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 508 #elif defined(CONFIG_X86_64) 509 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 510 #endif 511 512 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type); 513 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); 514 #define EMULATION_FAILED -1 515 #define EMULATION_OK 0 516 #define EMULATION_RESTART 1 517 #define EMULATION_INTERCEPTED 2 518 void init_decode_cache(struct x86_emulate_ctxt *ctxt); 519 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); 520 int emulator_task_switch(struct x86_emulate_ctxt *ctxt, 521 u16 tss_selector, int idt_index, int reason, 522 bool has_error_code, u32 error_code); 523 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); 524 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); 525 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); 526 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); 527 528 static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr) 529 { 530 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 531 nr &= NR_EMULATOR_GPRS - 1; 532 533 if (!(ctxt->regs_valid & (1 << nr))) { 534 ctxt->regs_valid |= 1 << nr; 535 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr); 536 } 537 return ctxt->_regs[nr]; 538 } 539 540 static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr) 541 { 542 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 543 nr &= NR_EMULATOR_GPRS - 1; 544 545 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 546 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 547 548 ctxt->regs_valid |= 1 << nr; 549 ctxt->regs_dirty |= 1 << nr; 550 return &ctxt->_regs[nr]; 551 } 552 553 static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr) 554 { 555 reg_read(ctxt, nr); 556 return reg_write(ctxt, nr); 557 } 558 559 #endif /* _ASM_X86_KVM_X86_EMULATE_H */ 560