1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * x86_emulate.h 4 * 5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. 6 * 7 * Copyright (c) 2005 Keir Fraser 8 * 9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 10 */ 11 12 #ifndef _ASM_X86_KVM_X86_EMULATE_H 13 #define _ASM_X86_KVM_X86_EMULATE_H 14 15 #include <asm/desc_defs.h> 16 #include "fpu.h" 17 18 struct x86_emulate_ctxt; 19 enum x86_intercept; 20 enum x86_intercept_stage; 21 22 struct x86_exception { 23 u8 vector; 24 bool error_code_valid; 25 u64 error_code; 26 bool nested_page_fault; 27 union { 28 u64 address; /* cr2 or nested page fault gpa */ 29 unsigned long dr6; 30 u64 payload; 31 }; 32 u8 async_page_fault; 33 unsigned long exit_qualification; 34 }; 35 36 /* 37 * This struct is used to carry enough information from the instruction 38 * decoder to main KVM so that a decision can be made whether the 39 * instruction needs to be intercepted or not. 40 */ 41 struct x86_instruction_info { 42 u8 intercept; /* which intercept */ 43 u8 rep_prefix; /* rep prefix? */ 44 u8 modrm_mod; /* mod part of modrm */ 45 u8 modrm_reg; /* index of register used */ 46 u8 modrm_rm; /* rm part of modrm */ 47 u64 src_val; /* value of source operand */ 48 u64 dst_val; /* value of destination operand */ 49 u8 src_bytes; /* size of source operand */ 50 u8 dst_bytes; /* size of destination operand */ 51 u8 src_type; /* type of source operand */ 52 u8 dst_type; /* type of destination operand */ 53 u8 ad_bytes; /* size of src/dst address */ 54 u64 rip; /* rip of the instruction */ 55 u64 next_rip; /* rip following the instruction */ 56 }; 57 58 /* 59 * x86_emulate_ops: 60 * 61 * These operations represent the instruction emulator's interface to memory. 62 * There are two categories of operation: those that act on ordinary memory 63 * regions (*_std), and those that act on memory regions known to require 64 * special treatment or emulation (*_emulated). 65 * 66 * The emulator assumes that an instruction accesses only one 'emulated memory' 67 * location, that this location is the given linear faulting address (cr2), and 68 * that this is one of the instruction's data operands. Instruction fetches and 69 * stack operations are assumed never to access emulated memory. The emulator 70 * automatically deduces which operand of a string-move operation is accessing 71 * emulated memory, and assumes that the other operand accesses normal memory. 72 * 73 * NOTES: 74 * 1. The emulator isn't very smart about emulated vs. standard memory. 75 * 'Emulated memory' access addresses should be checked for sanity. 76 * 'Normal memory' accesses may fault, and the caller must arrange to 77 * detect and handle reentrancy into the emulator via recursive faults. 78 * Accesses may be unaligned and may cross page boundaries. 79 * 2. If the access fails (cannot emulate, or a standard access faults) then 80 * it is up to the memop to propagate the fault to the guest VM via 81 * some out-of-band mechanism, unknown to the emulator. The memop signals 82 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will 83 * then immediately bail. 84 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only 85 * cmpxchg8b_emulated need support 8-byte accesses. 86 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. 87 */ 88 /* Access completed successfully: continue emulation as normal. */ 89 #define X86EMUL_CONTINUE 0 90 /* Access is unhandleable: bail from emulation and return error to caller. */ 91 #define X86EMUL_UNHANDLEABLE 1 92 /* Terminate emulation but return success to the caller. */ 93 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ 94 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ 95 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ 96 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ 97 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ 98 /* Emulation during event vectoring is unhandleable. */ 99 #define X86EMUL_UNHANDLEABLE_VECTORING 7 100 101 /* x86-specific emulation flags */ 102 #define X86EMUL_F_WRITE BIT(0) 103 #define X86EMUL_F_FETCH BIT(1) 104 #define X86EMUL_F_IMPLICIT BIT(2) 105 #define X86EMUL_F_INVLPG BIT(3) 106 #define X86EMUL_F_MSR BIT(4) 107 #define X86EMUL_F_DT_LOAD BIT(5) 108 109 struct x86_emulate_ops { 110 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt); 111 /* 112 * read_gpr: read a general purpose register (rax - r15) 113 * 114 * @reg: gpr number. 115 */ 116 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); 117 /* 118 * write_gpr: write a general purpose register (rax - r15) 119 * 120 * @reg: gpr number. 121 * @val: value to write. 122 */ 123 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); 124 /* 125 * read_std: Read bytes of standard (non-emulated/special) memory. 126 * Used for descriptor reading. 127 * @addr: [IN ] Linear address from which to read. 128 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 129 * @bytes: [IN ] Number of bytes to read from memory. 130 * @system:[IN ] Whether the access is forced to be at CPL0. 131 */ 132 int (*read_std)(struct x86_emulate_ctxt *ctxt, 133 unsigned long addr, void *val, 134 unsigned int bytes, 135 struct x86_exception *fault, bool system); 136 137 /* 138 * write_std: Write bytes of standard (non-emulated/special) memory. 139 * Used for descriptor writing. 140 * @addr: [IN ] Linear address to which to write. 141 * @val: [OUT] Value write to memory, zero-extended to 'u_long'. 142 * @bytes: [IN ] Number of bytes to write to memory. 143 * @system:[IN ] Whether the access is forced to be at CPL0. 144 */ 145 int (*write_std)(struct x86_emulate_ctxt *ctxt, 146 unsigned long addr, void *val, unsigned int bytes, 147 struct x86_exception *fault, bool system); 148 /* 149 * fetch: Read bytes of standard (non-emulated/special) memory. 150 * Used for instruction fetch. 151 * @addr: [IN ] Linear address from which to read. 152 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 153 * @bytes: [IN ] Number of bytes to read from memory. 154 */ 155 int (*fetch)(struct x86_emulate_ctxt *ctxt, 156 unsigned long addr, void *val, unsigned int bytes, 157 struct x86_exception *fault); 158 159 /* 160 * read_emulated: Read bytes from emulated/special memory area. 161 * @addr: [IN ] Linear address from which to read. 162 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 163 * @bytes: [IN ] Number of bytes to read from memory. 164 */ 165 int (*read_emulated)(struct x86_emulate_ctxt *ctxt, 166 unsigned long addr, void *val, unsigned int bytes, 167 struct x86_exception *fault); 168 169 /* 170 * write_emulated: Write bytes to emulated/special memory area. 171 * @addr: [IN ] Linear address to which to write. 172 * @val: [IN ] Value to write to memory (low-order bytes used as 173 * required). 174 * @bytes: [IN ] Number of bytes to write to memory. 175 */ 176 int (*write_emulated)(struct x86_emulate_ctxt *ctxt, 177 unsigned long addr, const void *val, 178 unsigned int bytes, 179 struct x86_exception *fault); 180 181 /* 182 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an 183 * emulated/special memory area. 184 * @addr: [IN ] Linear address to access. 185 * @old: [IN ] Value expected to be current at @addr. 186 * @new: [IN ] Value to write to @addr. 187 * @bytes: [IN ] Number of bytes to access using CMPXCHG. 188 */ 189 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, 190 unsigned long addr, 191 const void *old, 192 const void *new, 193 unsigned int bytes, 194 struct x86_exception *fault); 195 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); 196 197 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, 198 int size, unsigned short port, void *val, 199 unsigned int count); 200 201 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, 202 int size, unsigned short port, const void *val, 203 unsigned int count); 204 205 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, 206 struct desc_struct *desc, u32 *base3, int seg); 207 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, 208 struct desc_struct *desc, u32 base3, int seg); 209 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, 210 int seg); 211 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 212 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 213 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 214 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 215 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); 216 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); 217 int (*cpl)(struct x86_emulate_ctxt *ctxt); 218 ulong (*get_effective_dr7)(struct x86_emulate_ctxt *ctxt); 219 ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); 220 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); 221 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); 222 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 223 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 224 int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc); 225 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); 226 void (*halt)(struct x86_emulate_ctxt *ctxt); 227 void (*wbinvd)(struct x86_emulate_ctxt *ctxt); 228 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); 229 int (*intercept)(struct x86_emulate_ctxt *ctxt, 230 struct x86_instruction_info *info, 231 enum x86_intercept_stage stage); 232 233 bool (*is_cpuid_allowed)(struct x86_emulate_ctxt *ctxt); 234 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, 235 u32 *ecx, u32 *edx, bool exact_only); 236 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt); 237 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt); 238 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt); 239 bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt); 240 241 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); 242 243 bool (*is_smm)(struct x86_emulate_ctxt *ctxt); 244 int (*leave_smm)(struct x86_emulate_ctxt *ctxt); 245 void (*triple_fault)(struct x86_emulate_ctxt *ctxt); 246 int (*get_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 *xcr); 247 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr); 248 249 gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 250 unsigned int flags); 251 252 bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 253 unsigned int flags); 254 255 bool (*page_address_valid)(struct x86_emulate_ctxt *ctxt, gpa_t gpa); 256 }; 257 258 /* Type, address-of, and value of an instruction's operand. */ 259 struct operand { 260 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_YMM, OP_MM, OP_NONE } type; 261 unsigned int bytes; 262 unsigned int count; 263 union { 264 unsigned long orig_val; 265 u64 orig_val64; 266 }; 267 union { 268 unsigned long *reg; 269 struct segmented_address { 270 ulong ea; 271 unsigned seg; 272 } mem; 273 unsigned xmm; 274 unsigned mm; 275 } addr; 276 union { 277 unsigned long val; 278 u64 val64; 279 char valptr[sizeof(avx256_t)]; 280 sse128_t vec_val; 281 avx256_t vec_val2; 282 u64 mm_val; 283 void *data; 284 } __aligned(32); 285 }; 286 287 #define X86_MAX_INSTRUCTION_LENGTH 15 288 289 struct fetch_cache { 290 u8 data[X86_MAX_INSTRUCTION_LENGTH]; 291 u8 *ptr; 292 u8 *end; 293 }; 294 295 struct read_cache { 296 u8 data[1024]; 297 unsigned long pos; 298 unsigned long end; 299 }; 300 301 /* Execution mode, passed to the emulator. */ 302 enum x86emul_mode { 303 X86EMUL_MODE_REAL, /* Real mode. */ 304 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ 305 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ 306 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ 307 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ 308 }; 309 310 /* 311 * fastop functions are declared as taking a never-defined fastop parameter, 312 * so they can't be called from C directly. 313 */ 314 struct fastop; 315 316 typedef void (*fastop_t)(struct fastop *); 317 318 /* 319 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is 320 * tracked/accessed via _eip, and except for RIP relative addressing, which 321 * also uses _eip, RIP cannot be a register operand nor can it be an operand in 322 * a ModRM or SIB byte. 323 */ 324 #ifdef CONFIG_X86_64 325 #define NR_EMULATOR_GPRS 16 326 #else 327 #define NR_EMULATOR_GPRS 8 328 #endif 329 330 /* 331 * Distinguish between no prefix, REX, or in the future REX2. 332 */ 333 enum rex_type { 334 REX_NONE, 335 REX_PREFIX, 336 }; 337 338 struct x86_emulate_ctxt { 339 void *vcpu; 340 const struct x86_emulate_ops *ops; 341 342 /* Register state before/after emulation. */ 343 unsigned long eflags; 344 unsigned long eip; /* eip before instruction emulation */ 345 /* Emulated execution mode, represented by an X86EMUL_MODE value. */ 346 enum x86emul_mode mode; 347 348 /* interruptibility state, as a result of execution of STI or MOV SS */ 349 int interruptibility; 350 351 bool perm_ok; /* do not check permissions if true */ 352 bool tf; /* TF value before instruction (after for syscall/sysret) */ 353 354 bool have_exception; 355 struct x86_exception exception; 356 357 /* GPA available */ 358 bool gpa_available; 359 gpa_t gpa_val; 360 361 /* 362 * decode cache 363 */ 364 365 /* current opcode length in bytes */ 366 u8 opcode_len; 367 u8 b; 368 u8 intercept; 369 bool op_prefix; 370 u8 op_bytes; 371 u8 ad_bytes; 372 union { 373 int (*execute)(struct x86_emulate_ctxt *ctxt); 374 fastop_t fop; 375 }; 376 int (*check_perm)(struct x86_emulate_ctxt *ctxt); 377 378 bool rip_relative; 379 enum rex_type rex_prefix; 380 u8 rex_bits; 381 u8 lock_prefix; 382 u8 rep_prefix; 383 /* bitmaps of registers in _regs[] that can be read */ 384 u16 regs_valid; 385 /* bitmaps of registers in _regs[] that have been written */ 386 u16 regs_dirty; 387 /* modrm */ 388 u8 modrm; 389 u8 modrm_mod; 390 u8 modrm_reg; 391 u8 modrm_rm; 392 u8 modrm_seg; 393 u8 seg_override; 394 u64 d; 395 unsigned long _eip; 396 397 /* Here begins the usercopy section. */ 398 struct operand src; 399 struct operand src2; 400 struct operand dst; 401 struct operand memop; 402 unsigned long _regs[NR_EMULATOR_GPRS]; 403 struct operand *memopp; 404 struct fetch_cache fetch; 405 struct read_cache io_read; 406 struct read_cache mem_read; 407 bool is_branch; 408 }; 409 410 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \ 411 ({ \ 412 int __ret = (cond); \ 413 \ 414 if (WARN_ON_ONCE(__ret)) \ 415 ctxt->ops->vm_bugged(ctxt); \ 416 unlikely(__ret); \ 417 }) 418 419 /* Repeat String Operation Prefix */ 420 #define REPE_PREFIX 0xf3 421 #define REPNE_PREFIX 0xf2 422 423 /* CPUID vendors */ 424 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 425 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 426 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 427 428 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 429 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 430 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 431 432 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 433 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 434 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e 435 436 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 437 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e 438 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 439 440 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543 441 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561 442 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561 443 444 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx) 445 { 446 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && 447 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && 448 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx; 449 } 450 451 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx) 452 { 453 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && 454 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && 455 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) || 456 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && 457 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && 458 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx); 459 } 460 461 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx) 462 { 463 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx && 464 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx && 465 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx; 466 } 467 468 enum x86_intercept_stage { 469 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ 470 X86_ICPT_PRE_EXCEPT, 471 X86_ICPT_POST_EXCEPT, 472 X86_ICPT_POST_MEMACCESS, 473 }; 474 475 enum x86_intercept { 476 x86_intercept_none, 477 x86_intercept_cr_read, 478 x86_intercept_cr_write, 479 x86_intercept_clts, 480 x86_intercept_lmsw, 481 x86_intercept_smsw, 482 x86_intercept_dr_read, 483 x86_intercept_dr_write, 484 x86_intercept_lidt, 485 x86_intercept_sidt, 486 x86_intercept_lgdt, 487 x86_intercept_sgdt, 488 x86_intercept_lldt, 489 x86_intercept_sldt, 490 x86_intercept_ltr, 491 x86_intercept_str, 492 x86_intercept_rdtsc, 493 x86_intercept_rdpmc, 494 x86_intercept_pushf, 495 x86_intercept_popf, 496 x86_intercept_cpuid, 497 x86_intercept_rsm, 498 x86_intercept_iret, 499 x86_intercept_intn, 500 x86_intercept_invd, 501 x86_intercept_pause, 502 x86_intercept_hlt, 503 x86_intercept_invlpg, 504 x86_intercept_invlpga, 505 x86_intercept_vmrun, 506 x86_intercept_vmload, 507 x86_intercept_vmsave, 508 x86_intercept_vmmcall, 509 x86_intercept_stgi, 510 x86_intercept_clgi, 511 x86_intercept_skinit, 512 x86_intercept_rdtscp, 513 x86_intercept_rdpid, 514 x86_intercept_icebp, 515 x86_intercept_wbinvd, 516 x86_intercept_monitor, 517 x86_intercept_mwait, 518 x86_intercept_rdmsr, 519 x86_intercept_wrmsr, 520 x86_intercept_in, 521 x86_intercept_ins, 522 x86_intercept_out, 523 x86_intercept_outs, 524 x86_intercept_xsetbv, 525 526 nr_x86_intercepts 527 }; 528 529 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type); 530 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); 531 #define EMULATION_FAILED -1 532 #define EMULATION_OK 0 533 #define EMULATION_RESTART 1 534 #define EMULATION_INTERCEPTED 2 535 void init_decode_cache(struct x86_emulate_ctxt *ctxt); 536 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, bool check_intercepts); 537 int emulator_task_switch(struct x86_emulate_ctxt *ctxt, 538 u16 tss_selector, int idt_index, int reason, 539 bool has_error_code, u32 error_code); 540 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); 541 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); 542 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); 543 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); 544 545 static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr) 546 { 547 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 548 nr &= NR_EMULATOR_GPRS - 1; 549 550 if (!(ctxt->regs_valid & (1 << nr))) { 551 ctxt->regs_valid |= 1 << nr; 552 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr); 553 } 554 return ctxt->_regs[nr]; 555 } 556 557 static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr) 558 { 559 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 560 nr &= NR_EMULATOR_GPRS - 1; 561 562 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 563 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 564 565 ctxt->regs_valid |= 1 << nr; 566 ctxt->regs_dirty |= 1 << nr; 567 return &ctxt->_regs[nr]; 568 } 569 570 static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr) 571 { 572 reg_read(ctxt, nr); 573 return reg_write(ctxt, nr); 574 } 575 576 #endif /* _ASM_X86_KVM_X86_EMULATE_H */ 577