1 /* 2 * 8253/8254 interval timer emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2006 Intel Corporation 6 * Copyright (c) 2007 Keir Fraser, XenSource Inc 7 * Copyright (c) 2008 Intel Corporation 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 * 27 * Authors: 28 * Sheng Yang <sheng.yang@intel.com> 29 * Based on QEMU and Xen. 30 */ 31 32 #define pr_fmt(fmt) "pit: " fmt 33 34 #include <linux/kvm_host.h> 35 #include <linux/slab.h> 36 37 #include "irq.h" 38 #include "i8254.h" 39 40 #ifndef CONFIG_X86_64 41 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) 42 #else 43 #define mod_64(x, y) ((x) % (y)) 44 #endif 45 46 #define RW_STATE_LSB 1 47 #define RW_STATE_MSB 2 48 #define RW_STATE_WORD0 3 49 #define RW_STATE_WORD1 4 50 51 /* Compute with 96 bit intermediate result: (a*b)/c */ 52 static u64 muldiv64(u64 a, u32 b, u32 c) 53 { 54 union { 55 u64 ll; 56 struct { 57 u32 low, high; 58 } l; 59 } u, res; 60 u64 rl, rh; 61 62 u.ll = a; 63 rl = (u64)u.l.low * (u64)b; 64 rh = (u64)u.l.high * (u64)b; 65 rh += (rl >> 32); 66 res.l.high = div64_u64(rh, c); 67 res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); 68 return res.ll; 69 } 70 71 static void pit_set_gate(struct kvm *kvm, int channel, u32 val) 72 { 73 struct kvm_kpit_channel_state *c = 74 &kvm->arch.vpit->pit_state.channels[channel]; 75 76 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); 77 78 switch (c->mode) { 79 default: 80 case 0: 81 case 4: 82 /* XXX: just disable/enable counting */ 83 break; 84 case 1: 85 case 2: 86 case 3: 87 case 5: 88 /* Restart counting on rising edge. */ 89 if (c->gate < val) 90 c->count_load_time = ktime_get(); 91 break; 92 } 93 94 c->gate = val; 95 } 96 97 static int pit_get_gate(struct kvm *kvm, int channel) 98 { 99 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); 100 101 return kvm->arch.vpit->pit_state.channels[channel].gate; 102 } 103 104 static s64 __kpit_elapsed(struct kvm *kvm) 105 { 106 s64 elapsed; 107 ktime_t remaining; 108 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; 109 110 if (!ps->pit_timer.period) 111 return 0; 112 113 /* 114 * The Counter does not stop when it reaches zero. In 115 * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to 116 * the highest count, either FFFF hex for binary counting 117 * or 9999 for BCD counting, and continues counting. 118 * Modes 2 and 3 are periodic; the Counter reloads 119 * itself with the initial count and continues counting 120 * from there. 121 */ 122 remaining = hrtimer_get_remaining(&ps->pit_timer.timer); 123 elapsed = ps->pit_timer.period - ktime_to_ns(remaining); 124 elapsed = mod_64(elapsed, ps->pit_timer.period); 125 126 return elapsed; 127 } 128 129 static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c, 130 int channel) 131 { 132 if (channel == 0) 133 return __kpit_elapsed(kvm); 134 135 return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); 136 } 137 138 static int pit_get_count(struct kvm *kvm, int channel) 139 { 140 struct kvm_kpit_channel_state *c = 141 &kvm->arch.vpit->pit_state.channels[channel]; 142 s64 d, t; 143 int counter; 144 145 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); 146 147 t = kpit_elapsed(kvm, c, channel); 148 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); 149 150 switch (c->mode) { 151 case 0: 152 case 1: 153 case 4: 154 case 5: 155 counter = (c->count - d) & 0xffff; 156 break; 157 case 3: 158 /* XXX: may be incorrect for odd counts */ 159 counter = c->count - (mod_64((2 * d), c->count)); 160 break; 161 default: 162 counter = c->count - mod_64(d, c->count); 163 break; 164 } 165 return counter; 166 } 167 168 static int pit_get_out(struct kvm *kvm, int channel) 169 { 170 struct kvm_kpit_channel_state *c = 171 &kvm->arch.vpit->pit_state.channels[channel]; 172 s64 d, t; 173 int out; 174 175 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); 176 177 t = kpit_elapsed(kvm, c, channel); 178 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); 179 180 switch (c->mode) { 181 default: 182 case 0: 183 out = (d >= c->count); 184 break; 185 case 1: 186 out = (d < c->count); 187 break; 188 case 2: 189 out = ((mod_64(d, c->count) == 0) && (d != 0)); 190 break; 191 case 3: 192 out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); 193 break; 194 case 4: 195 case 5: 196 out = (d == c->count); 197 break; 198 } 199 200 return out; 201 } 202 203 static void pit_latch_count(struct kvm *kvm, int channel) 204 { 205 struct kvm_kpit_channel_state *c = 206 &kvm->arch.vpit->pit_state.channels[channel]; 207 208 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); 209 210 if (!c->count_latched) { 211 c->latched_count = pit_get_count(kvm, channel); 212 c->count_latched = c->rw_mode; 213 } 214 } 215 216 static void pit_latch_status(struct kvm *kvm, int channel) 217 { 218 struct kvm_kpit_channel_state *c = 219 &kvm->arch.vpit->pit_state.channels[channel]; 220 221 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); 222 223 if (!c->status_latched) { 224 /* TODO: Return NULL COUNT (bit 6). */ 225 c->status = ((pit_get_out(kvm, channel) << 7) | 226 (c->rw_mode << 4) | 227 (c->mode << 1) | 228 c->bcd); 229 c->status_latched = 1; 230 } 231 } 232 233 int pit_has_pending_timer(struct kvm_vcpu *vcpu) 234 { 235 struct kvm_pit *pit = vcpu->kvm->arch.vpit; 236 237 if (pit && kvm_vcpu_is_bsp(vcpu) && pit->pit_state.irq_ack) 238 return atomic_read(&pit->pit_state.pit_timer.pending); 239 return 0; 240 } 241 242 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) 243 { 244 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, 245 irq_ack_notifier); 246 raw_spin_lock(&ps->inject_lock); 247 if (atomic_dec_return(&ps->pit_timer.pending) < 0) 248 atomic_inc(&ps->pit_timer.pending); 249 ps->irq_ack = 1; 250 raw_spin_unlock(&ps->inject_lock); 251 } 252 253 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) 254 { 255 struct kvm_pit *pit = vcpu->kvm->arch.vpit; 256 struct hrtimer *timer; 257 258 if (!kvm_vcpu_is_bsp(vcpu) || !pit) 259 return; 260 261 timer = &pit->pit_state.pit_timer.timer; 262 if (hrtimer_cancel(timer)) 263 hrtimer_start_expires(timer, HRTIMER_MODE_ABS); 264 } 265 266 static void destroy_pit_timer(struct kvm_timer *pt) 267 { 268 pr_debug("execute del timer!\n"); 269 hrtimer_cancel(&pt->timer); 270 } 271 272 static bool kpit_is_periodic(struct kvm_timer *ktimer) 273 { 274 struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state, 275 pit_timer); 276 return ps->is_periodic; 277 } 278 279 static struct kvm_timer_ops kpit_ops = { 280 .is_periodic = kpit_is_periodic, 281 }; 282 283 static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) 284 { 285 struct kvm_timer *pt = &ps->pit_timer; 286 s64 interval; 287 288 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); 289 290 pr_debug("create pit timer, interval is %llu nsec\n", interval); 291 292 /* TODO The new value only affected after the retriggered */ 293 hrtimer_cancel(&pt->timer); 294 pt->period = interval; 295 ps->is_periodic = is_period; 296 297 pt->timer.function = kvm_timer_fn; 298 pt->t_ops = &kpit_ops; 299 pt->kvm = ps->pit->kvm; 300 pt->vcpu = pt->kvm->bsp_vcpu; 301 302 atomic_set(&pt->pending, 0); 303 ps->irq_ack = 1; 304 305 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval), 306 HRTIMER_MODE_ABS); 307 } 308 309 static void pit_load_count(struct kvm *kvm, int channel, u32 val) 310 { 311 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; 312 313 WARN_ON(!mutex_is_locked(&ps->lock)); 314 315 pr_debug("load_count val is %d, channel is %d\n", val, channel); 316 317 /* 318 * The largest possible initial count is 0; this is equivalent 319 * to 216 for binary counting and 104 for BCD counting. 320 */ 321 if (val == 0) 322 val = 0x10000; 323 324 ps->channels[channel].count = val; 325 326 if (channel != 0) { 327 ps->channels[channel].count_load_time = ktime_get(); 328 return; 329 } 330 331 /* Two types of timer 332 * mode 1 is one shot, mode 2 is period, otherwise del timer */ 333 switch (ps->channels[0].mode) { 334 case 0: 335 case 1: 336 /* FIXME: enhance mode 4 precision */ 337 case 4: 338 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { 339 create_pit_timer(ps, val, 0); 340 } 341 break; 342 case 2: 343 case 3: 344 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ 345 create_pit_timer(ps, val, 1); 346 } 347 break; 348 default: 349 destroy_pit_timer(&ps->pit_timer); 350 } 351 } 352 353 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start) 354 { 355 u8 saved_mode; 356 if (hpet_legacy_start) { 357 /* save existing mode for later reenablement */ 358 saved_mode = kvm->arch.vpit->pit_state.channels[0].mode; 359 kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */ 360 pit_load_count(kvm, channel, val); 361 kvm->arch.vpit->pit_state.channels[0].mode = saved_mode; 362 } else { 363 pit_load_count(kvm, channel, val); 364 } 365 } 366 367 static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev) 368 { 369 return container_of(dev, struct kvm_pit, dev); 370 } 371 372 static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev) 373 { 374 return container_of(dev, struct kvm_pit, speaker_dev); 375 } 376 377 static inline int pit_in_range(gpa_t addr) 378 { 379 return ((addr >= KVM_PIT_BASE_ADDRESS) && 380 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); 381 } 382 383 static int pit_ioport_write(struct kvm_io_device *this, 384 gpa_t addr, int len, const void *data) 385 { 386 struct kvm_pit *pit = dev_to_pit(this); 387 struct kvm_kpit_state *pit_state = &pit->pit_state; 388 struct kvm *kvm = pit->kvm; 389 int channel, access; 390 struct kvm_kpit_channel_state *s; 391 u32 val = *(u32 *) data; 392 if (!pit_in_range(addr)) 393 return -EOPNOTSUPP; 394 395 val &= 0xff; 396 addr &= KVM_PIT_CHANNEL_MASK; 397 398 mutex_lock(&pit_state->lock); 399 400 if (val != 0) 401 pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n", 402 (unsigned int)addr, len, val); 403 404 if (addr == 3) { 405 channel = val >> 6; 406 if (channel == 3) { 407 /* Read-Back Command. */ 408 for (channel = 0; channel < 3; channel++) { 409 s = &pit_state->channels[channel]; 410 if (val & (2 << channel)) { 411 if (!(val & 0x20)) 412 pit_latch_count(kvm, channel); 413 if (!(val & 0x10)) 414 pit_latch_status(kvm, channel); 415 } 416 } 417 } else { 418 /* Select Counter <channel>. */ 419 s = &pit_state->channels[channel]; 420 access = (val >> 4) & KVM_PIT_CHANNEL_MASK; 421 if (access == 0) { 422 pit_latch_count(kvm, channel); 423 } else { 424 s->rw_mode = access; 425 s->read_state = access; 426 s->write_state = access; 427 s->mode = (val >> 1) & 7; 428 if (s->mode > 5) 429 s->mode -= 4; 430 s->bcd = val & 1; 431 } 432 } 433 } else { 434 /* Write Count. */ 435 s = &pit_state->channels[addr]; 436 switch (s->write_state) { 437 default: 438 case RW_STATE_LSB: 439 pit_load_count(kvm, addr, val); 440 break; 441 case RW_STATE_MSB: 442 pit_load_count(kvm, addr, val << 8); 443 break; 444 case RW_STATE_WORD0: 445 s->write_latch = val; 446 s->write_state = RW_STATE_WORD1; 447 break; 448 case RW_STATE_WORD1: 449 pit_load_count(kvm, addr, s->write_latch | (val << 8)); 450 s->write_state = RW_STATE_WORD0; 451 break; 452 } 453 } 454 455 mutex_unlock(&pit_state->lock); 456 return 0; 457 } 458 459 static int pit_ioport_read(struct kvm_io_device *this, 460 gpa_t addr, int len, void *data) 461 { 462 struct kvm_pit *pit = dev_to_pit(this); 463 struct kvm_kpit_state *pit_state = &pit->pit_state; 464 struct kvm *kvm = pit->kvm; 465 int ret, count; 466 struct kvm_kpit_channel_state *s; 467 if (!pit_in_range(addr)) 468 return -EOPNOTSUPP; 469 470 addr &= KVM_PIT_CHANNEL_MASK; 471 if (addr == 3) 472 return 0; 473 474 s = &pit_state->channels[addr]; 475 476 mutex_lock(&pit_state->lock); 477 478 if (s->status_latched) { 479 s->status_latched = 0; 480 ret = s->status; 481 } else if (s->count_latched) { 482 switch (s->count_latched) { 483 default: 484 case RW_STATE_LSB: 485 ret = s->latched_count & 0xff; 486 s->count_latched = 0; 487 break; 488 case RW_STATE_MSB: 489 ret = s->latched_count >> 8; 490 s->count_latched = 0; 491 break; 492 case RW_STATE_WORD0: 493 ret = s->latched_count & 0xff; 494 s->count_latched = RW_STATE_MSB; 495 break; 496 } 497 } else { 498 switch (s->read_state) { 499 default: 500 case RW_STATE_LSB: 501 count = pit_get_count(kvm, addr); 502 ret = count & 0xff; 503 break; 504 case RW_STATE_MSB: 505 count = pit_get_count(kvm, addr); 506 ret = (count >> 8) & 0xff; 507 break; 508 case RW_STATE_WORD0: 509 count = pit_get_count(kvm, addr); 510 ret = count & 0xff; 511 s->read_state = RW_STATE_WORD1; 512 break; 513 case RW_STATE_WORD1: 514 count = pit_get_count(kvm, addr); 515 ret = (count >> 8) & 0xff; 516 s->read_state = RW_STATE_WORD0; 517 break; 518 } 519 } 520 521 if (len > sizeof(ret)) 522 len = sizeof(ret); 523 memcpy(data, (char *)&ret, len); 524 525 mutex_unlock(&pit_state->lock); 526 return 0; 527 } 528 529 static int speaker_ioport_write(struct kvm_io_device *this, 530 gpa_t addr, int len, const void *data) 531 { 532 struct kvm_pit *pit = speaker_to_pit(this); 533 struct kvm_kpit_state *pit_state = &pit->pit_state; 534 struct kvm *kvm = pit->kvm; 535 u32 val = *(u32 *) data; 536 if (addr != KVM_SPEAKER_BASE_ADDRESS) 537 return -EOPNOTSUPP; 538 539 mutex_lock(&pit_state->lock); 540 pit_state->speaker_data_on = (val >> 1) & 1; 541 pit_set_gate(kvm, 2, val & 1); 542 mutex_unlock(&pit_state->lock); 543 return 0; 544 } 545 546 static int speaker_ioport_read(struct kvm_io_device *this, 547 gpa_t addr, int len, void *data) 548 { 549 struct kvm_pit *pit = speaker_to_pit(this); 550 struct kvm_kpit_state *pit_state = &pit->pit_state; 551 struct kvm *kvm = pit->kvm; 552 unsigned int refresh_clock; 553 int ret; 554 if (addr != KVM_SPEAKER_BASE_ADDRESS) 555 return -EOPNOTSUPP; 556 557 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ 558 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; 559 560 mutex_lock(&pit_state->lock); 561 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | 562 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); 563 if (len > sizeof(ret)) 564 len = sizeof(ret); 565 memcpy(data, (char *)&ret, len); 566 mutex_unlock(&pit_state->lock); 567 return 0; 568 } 569 570 void kvm_pit_reset(struct kvm_pit *pit) 571 { 572 int i; 573 struct kvm_kpit_channel_state *c; 574 575 mutex_lock(&pit->pit_state.lock); 576 pit->pit_state.flags = 0; 577 for (i = 0; i < 3; i++) { 578 c = &pit->pit_state.channels[i]; 579 c->mode = 0xff; 580 c->gate = (i != 2); 581 pit_load_count(pit->kvm, i, 0); 582 } 583 mutex_unlock(&pit->pit_state.lock); 584 585 atomic_set(&pit->pit_state.pit_timer.pending, 0); 586 pit->pit_state.irq_ack = 1; 587 } 588 589 static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) 590 { 591 struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); 592 593 if (!mask) { 594 atomic_set(&pit->pit_state.pit_timer.pending, 0); 595 pit->pit_state.irq_ack = 1; 596 } 597 } 598 599 static const struct kvm_io_device_ops pit_dev_ops = { 600 .read = pit_ioport_read, 601 .write = pit_ioport_write, 602 }; 603 604 static const struct kvm_io_device_ops speaker_dev_ops = { 605 .read = speaker_ioport_read, 606 .write = speaker_ioport_write, 607 }; 608 609 /* Caller must hold slots_lock */ 610 struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) 611 { 612 struct kvm_pit *pit; 613 struct kvm_kpit_state *pit_state; 614 int ret; 615 616 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); 617 if (!pit) 618 return NULL; 619 620 pit->irq_source_id = kvm_request_irq_source_id(kvm); 621 if (pit->irq_source_id < 0) { 622 kfree(pit); 623 return NULL; 624 } 625 626 mutex_init(&pit->pit_state.lock); 627 mutex_lock(&pit->pit_state.lock); 628 raw_spin_lock_init(&pit->pit_state.inject_lock); 629 630 kvm->arch.vpit = pit; 631 pit->kvm = kvm; 632 633 pit_state = &pit->pit_state; 634 pit_state->pit = pit; 635 hrtimer_init(&pit_state->pit_timer.timer, 636 CLOCK_MONOTONIC, HRTIMER_MODE_ABS); 637 pit_state->irq_ack_notifier.gsi = 0; 638 pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; 639 kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); 640 pit_state->pit_timer.reinject = true; 641 mutex_unlock(&pit->pit_state.lock); 642 643 kvm_pit_reset(pit); 644 645 pit->mask_notifier.func = pit_mask_notifer; 646 kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); 647 648 kvm_iodevice_init(&pit->dev, &pit_dev_ops); 649 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &pit->dev); 650 if (ret < 0) 651 goto fail; 652 653 if (flags & KVM_PIT_SPEAKER_DUMMY) { 654 kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops); 655 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 656 &pit->speaker_dev); 657 if (ret < 0) 658 goto fail_unregister; 659 } 660 661 return pit; 662 663 fail_unregister: 664 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); 665 666 fail: 667 kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier); 668 kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); 669 kvm_free_irq_source_id(kvm, pit->irq_source_id); 670 671 kfree(pit); 672 return NULL; 673 } 674 675 void kvm_free_pit(struct kvm *kvm) 676 { 677 struct hrtimer *timer; 678 679 if (kvm->arch.vpit) { 680 kvm_unregister_irq_mask_notifier(kvm, 0, 681 &kvm->arch.vpit->mask_notifier); 682 kvm_unregister_irq_ack_notifier(kvm, 683 &kvm->arch.vpit->pit_state.irq_ack_notifier); 684 mutex_lock(&kvm->arch.vpit->pit_state.lock); 685 timer = &kvm->arch.vpit->pit_state.pit_timer.timer; 686 hrtimer_cancel(timer); 687 kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id); 688 mutex_unlock(&kvm->arch.vpit->pit_state.lock); 689 kfree(kvm->arch.vpit); 690 } 691 } 692 693 static void __inject_pit_timer_intr(struct kvm *kvm) 694 { 695 struct kvm_vcpu *vcpu; 696 int i; 697 698 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1); 699 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0); 700 701 /* 702 * Provides NMI watchdog support via Virtual Wire mode. 703 * The route is: PIT -> PIC -> LVT0 in NMI mode. 704 * 705 * Note: Our Virtual Wire implementation is simplified, only 706 * propagating PIT interrupts to all VCPUs when they have set 707 * LVT0 to NMI delivery. Other PIC interrupts are just sent to 708 * VCPU0, and only if its LVT0 is in EXTINT mode. 709 */ 710 if (kvm->arch.vapics_in_nmi_mode > 0) 711 kvm_for_each_vcpu(i, vcpu, kvm) 712 kvm_apic_nmi_wd_deliver(vcpu); 713 } 714 715 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu) 716 { 717 struct kvm_pit *pit = vcpu->kvm->arch.vpit; 718 struct kvm *kvm = vcpu->kvm; 719 struct kvm_kpit_state *ps; 720 721 if (pit) { 722 int inject = 0; 723 ps = &pit->pit_state; 724 725 /* Try to inject pending interrupts when 726 * last one has been acked. 727 */ 728 raw_spin_lock(&ps->inject_lock); 729 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) { 730 ps->irq_ack = 0; 731 inject = 1; 732 } 733 raw_spin_unlock(&ps->inject_lock); 734 if (inject) 735 __inject_pit_timer_intr(kvm); 736 } 737 } 738