xref: /linux/arch/x86/kvm/cpuid.c (revision 4745dc8abb0a0a9851c07265eea01d844886d5c8)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Kernel-based Virtual Machine driver for Linux
4  * cpuid support routines
5  *
6  * derived from arch/x86/kvm/x86.c
7  *
8  * Copyright 2011 Red Hat, Inc. and/or its affiliates.
9  * Copyright IBM Corporation, 2008
10  */
11 
12 #include <linux/kvm_host.h>
13 #include <linux/export.h>
14 #include <linux/vmalloc.h>
15 #include <linux/uaccess.h>
16 #include <linux/sched/stat.h>
17 
18 #include <asm/processor.h>
19 #include <asm/user.h>
20 #include <asm/fpu/xstate.h>
21 #include "cpuid.h"
22 #include "lapic.h"
23 #include "mmu.h"
24 #include "trace.h"
25 #include "pmu.h"
26 
27 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
28 {
29 	int feature_bit = 0;
30 	u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
31 
32 	xstate_bv &= XFEATURE_MASK_EXTEND;
33 	while (xstate_bv) {
34 		if (xstate_bv & 0x1) {
35 		        u32 eax, ebx, ecx, edx, offset;
36 		        cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
37 			offset = compacted ? ret : ebx;
38 			ret = max(ret, offset + eax);
39 		}
40 
41 		xstate_bv >>= 1;
42 		feature_bit++;
43 	}
44 
45 	return ret;
46 }
47 
48 bool kvm_mpx_supported(void)
49 {
50 	return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
51 		 && kvm_x86_ops->mpx_supported());
52 }
53 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
54 
55 u64 kvm_supported_xcr0(void)
56 {
57 	u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
58 
59 	if (!kvm_mpx_supported())
60 		xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
61 
62 	return xcr0;
63 }
64 
65 #define F(x) bit(X86_FEATURE_##x)
66 
67 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
68 {
69 	struct kvm_cpuid_entry2 *best;
70 	struct kvm_lapic *apic = vcpu->arch.apic;
71 
72 	best = kvm_find_cpuid_entry(vcpu, 1, 0);
73 	if (!best)
74 		return 0;
75 
76 	/* Update OSXSAVE bit */
77 	if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
78 		best->ecx &= ~F(OSXSAVE);
79 		if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
80 			best->ecx |= F(OSXSAVE);
81 	}
82 
83 	best->edx &= ~F(APIC);
84 	if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
85 		best->edx |= F(APIC);
86 
87 	if (apic) {
88 		if (best->ecx & F(TSC_DEADLINE_TIMER))
89 			apic->lapic_timer.timer_mode_mask = 3 << 17;
90 		else
91 			apic->lapic_timer.timer_mode_mask = 1 << 17;
92 	}
93 
94 	best = kvm_find_cpuid_entry(vcpu, 7, 0);
95 	if (best) {
96 		/* Update OSPKE bit */
97 		if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
98 			best->ecx &= ~F(OSPKE);
99 			if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
100 				best->ecx |= F(OSPKE);
101 		}
102 	}
103 
104 	best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
105 	if (!best) {
106 		vcpu->arch.guest_supported_xcr0 = 0;
107 		vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
108 	} else {
109 		vcpu->arch.guest_supported_xcr0 =
110 			(best->eax | ((u64)best->edx << 32)) &
111 			kvm_supported_xcr0();
112 		vcpu->arch.guest_xstate_size = best->ebx =
113 			xstate_required_size(vcpu->arch.xcr0, false);
114 	}
115 
116 	best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
117 	if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
118 		best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
119 
120 	/*
121 	 * The existing code assumes virtual address is 48-bit or 57-bit in the
122 	 * canonical address checks; exit if it is ever changed.
123 	 */
124 	best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
125 	if (best) {
126 		int vaddr_bits = (best->eax & 0xff00) >> 8;
127 
128 		if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
129 			return -EINVAL;
130 	}
131 
132 	best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
133 	if (kvm_hlt_in_guest(vcpu->kvm) && best &&
134 		(best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
135 		best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
136 
137 	if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
138 		best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
139 		if (best) {
140 			if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT)
141 				best->ecx |= F(MWAIT);
142 			else
143 				best->ecx &= ~F(MWAIT);
144 		}
145 	}
146 
147 	/* Update physical-address width */
148 	vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
149 	kvm_mmu_reset_context(vcpu);
150 
151 	kvm_pmu_refresh(vcpu);
152 	return 0;
153 }
154 
155 static int is_efer_nx(void)
156 {
157 	unsigned long long efer = 0;
158 
159 	rdmsrl_safe(MSR_EFER, &efer);
160 	return efer & EFER_NX;
161 }
162 
163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
164 {
165 	int i;
166 	struct kvm_cpuid_entry2 *e, *entry;
167 
168 	entry = NULL;
169 	for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
170 		e = &vcpu->arch.cpuid_entries[i];
171 		if (e->function == 0x80000001) {
172 			entry = e;
173 			break;
174 		}
175 	}
176 	if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
177 		entry->edx &= ~F(NX);
178 		printk(KERN_INFO "kvm: guest NX capability removed\n");
179 	}
180 }
181 
182 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
183 {
184 	struct kvm_cpuid_entry2 *best;
185 
186 	best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
187 	if (!best || best->eax < 0x80000008)
188 		goto not_found;
189 	best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
190 	if (best)
191 		return best->eax & 0xff;
192 not_found:
193 	return 36;
194 }
195 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
196 
197 /* when an old userspace process fills a new kernel module */
198 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
199 			     struct kvm_cpuid *cpuid,
200 			     struct kvm_cpuid_entry __user *entries)
201 {
202 	int r, i;
203 	struct kvm_cpuid_entry *cpuid_entries = NULL;
204 
205 	r = -E2BIG;
206 	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
207 		goto out;
208 	r = -ENOMEM;
209 	if (cpuid->nent) {
210 		cpuid_entries =
211 			vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
212 					   cpuid->nent));
213 		if (!cpuid_entries)
214 			goto out;
215 		r = -EFAULT;
216 		if (copy_from_user(cpuid_entries, entries,
217 				   cpuid->nent * sizeof(struct kvm_cpuid_entry)))
218 			goto out;
219 	}
220 	for (i = 0; i < cpuid->nent; i++) {
221 		vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
222 		vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
223 		vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
224 		vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
225 		vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
226 		vcpu->arch.cpuid_entries[i].index = 0;
227 		vcpu->arch.cpuid_entries[i].flags = 0;
228 		vcpu->arch.cpuid_entries[i].padding[0] = 0;
229 		vcpu->arch.cpuid_entries[i].padding[1] = 0;
230 		vcpu->arch.cpuid_entries[i].padding[2] = 0;
231 	}
232 	vcpu->arch.cpuid_nent = cpuid->nent;
233 	cpuid_fix_nx_cap(vcpu);
234 	kvm_apic_set_version(vcpu);
235 	kvm_x86_ops->cpuid_update(vcpu);
236 	r = kvm_update_cpuid(vcpu);
237 
238 out:
239 	vfree(cpuid_entries);
240 	return r;
241 }
242 
243 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
244 			      struct kvm_cpuid2 *cpuid,
245 			      struct kvm_cpuid_entry2 __user *entries)
246 {
247 	int r;
248 
249 	r = -E2BIG;
250 	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
251 		goto out;
252 	r = -EFAULT;
253 	if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
254 			   cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
255 		goto out;
256 	vcpu->arch.cpuid_nent = cpuid->nent;
257 	kvm_apic_set_version(vcpu);
258 	kvm_x86_ops->cpuid_update(vcpu);
259 	r = kvm_update_cpuid(vcpu);
260 out:
261 	return r;
262 }
263 
264 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
265 			      struct kvm_cpuid2 *cpuid,
266 			      struct kvm_cpuid_entry2 __user *entries)
267 {
268 	int r;
269 
270 	r = -E2BIG;
271 	if (cpuid->nent < vcpu->arch.cpuid_nent)
272 		goto out;
273 	r = -EFAULT;
274 	if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
275 			 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
276 		goto out;
277 	return 0;
278 
279 out:
280 	cpuid->nent = vcpu->arch.cpuid_nent;
281 	return r;
282 }
283 
284 static void cpuid_mask(u32 *word, int wordnum)
285 {
286 	*word &= boot_cpu_data.x86_capability[wordnum];
287 }
288 
289 static void do_host_cpuid(struct kvm_cpuid_entry2 *entry, u32 function,
290 			   u32 index)
291 {
292 	entry->function = function;
293 	entry->index = index;
294 	entry->flags = 0;
295 
296 	cpuid_count(entry->function, entry->index,
297 		    &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
298 
299 	switch (function) {
300 	case 2:
301 		entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
302 		break;
303 	case 4:
304 	case 7:
305 	case 0xb:
306 	case 0xd:
307 	case 0x14:
308 	case 0x8000001d:
309 		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
310 		break;
311 	}
312 }
313 
314 static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry,
315 				    u32 func, int *nent, int maxnent)
316 {
317 	entry->function = func;
318 	entry->index = 0;
319 	entry->flags = 0;
320 
321 	switch (func) {
322 	case 0:
323 		entry->eax = 7;
324 		++*nent;
325 		break;
326 	case 1:
327 		entry->ecx = F(MOVBE);
328 		++*nent;
329 		break;
330 	case 7:
331 		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
332 		entry->eax = 0;
333 		entry->ecx = F(RDPID);
334 		++*nent;
335 	default:
336 		break;
337 	}
338 
339 	return 0;
340 }
341 
342 static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
343 {
344 	unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
345 	unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
346 	unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
347 	unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
348 	unsigned f_la57;
349 
350 	/* cpuid 7.0.ebx */
351 	const u32 kvm_cpuid_7_0_ebx_x86_features =
352 		F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
353 		F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
354 		F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
355 		F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
356 		F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
357 
358 	/* cpuid 7.0.ecx*/
359 	const u32 kvm_cpuid_7_0_ecx_x86_features =
360 		F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ |
361 		F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
362 		F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
363 		F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B);
364 
365 	/* cpuid 7.0.edx*/
366 	const u32 kvm_cpuid_7_0_edx_x86_features =
367 		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
368 		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
369 		F(MD_CLEAR);
370 
371 	switch (index) {
372 	case 0:
373 		entry->eax = 0;
374 		entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
375 		cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
376 		/* TSC_ADJUST is emulated */
377 		entry->ebx |= F(TSC_ADJUST);
378 
379 		entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
380 		f_la57 = entry->ecx & F(LA57);
381 		cpuid_mask(&entry->ecx, CPUID_7_ECX);
382 		/* Set LA57 based on hardware capability. */
383 		entry->ecx |= f_la57;
384 		entry->ecx |= f_umip;
385 		/* PKU is not yet implemented for shadow paging. */
386 		if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
387 			entry->ecx &= ~F(PKU);
388 
389 		entry->edx &= kvm_cpuid_7_0_edx_x86_features;
390 		cpuid_mask(&entry->edx, CPUID_7_EDX);
391 		/*
392 		 * We emulate ARCH_CAPABILITIES in software even
393 		 * if the host doesn't support it.
394 		 */
395 		entry->edx |= F(ARCH_CAPABILITIES);
396 		break;
397 	default:
398 		WARN_ON_ONCE(1);
399 		entry->eax = 0;
400 		entry->ebx = 0;
401 		entry->ecx = 0;
402 		entry->edx = 0;
403 		break;
404 	}
405 }
406 
407 static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
408 				  int *nent, int maxnent)
409 {
410 	int r;
411 	unsigned f_nx = is_efer_nx() ? F(NX) : 0;
412 #ifdef CONFIG_X86_64
413 	unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
414 				? F(GBPAGES) : 0;
415 	unsigned f_lm = F(LM);
416 #else
417 	unsigned f_gbpages = 0;
418 	unsigned f_lm = 0;
419 #endif
420 	unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
421 	unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
422 	unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
423 
424 	/* cpuid 1.edx */
425 	const u32 kvm_cpuid_1_edx_x86_features =
426 		F(FPU) | F(VME) | F(DE) | F(PSE) |
427 		F(TSC) | F(MSR) | F(PAE) | F(MCE) |
428 		F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
429 		F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
430 		F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
431 		0 /* Reserved, DS, ACPI */ | F(MMX) |
432 		F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
433 		0 /* HTT, TM, Reserved, PBE */;
434 	/* cpuid 0x80000001.edx */
435 	const u32 kvm_cpuid_8000_0001_edx_x86_features =
436 		F(FPU) | F(VME) | F(DE) | F(PSE) |
437 		F(TSC) | F(MSR) | F(PAE) | F(MCE) |
438 		F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
439 		F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
440 		F(PAT) | F(PSE36) | 0 /* Reserved */ |
441 		f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
442 		F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
443 		0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
444 	/* cpuid 1.ecx */
445 	const u32 kvm_cpuid_1_ecx_x86_features =
446 		/* NOTE: MONITOR (and MWAIT) are emulated as NOP,
447 		 * but *not* advertised to guests via CPUID ! */
448 		F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
449 		0 /* DS-CPL, VMX, SMX, EST */ |
450 		0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
451 		F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
452 		F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
453 		F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
454 		0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
455 		F(F16C) | F(RDRAND);
456 	/* cpuid 0x80000001.ecx */
457 	const u32 kvm_cpuid_8000_0001_ecx_x86_features =
458 		F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
459 		F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
460 		F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
461 		0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
462 		F(TOPOEXT) | F(PERFCTR_CORE);
463 
464 	/* cpuid 0x80000008.ebx */
465 	const u32 kvm_cpuid_8000_0008_ebx_x86_features =
466 		F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
467 		F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON);
468 
469 	/* cpuid 0xC0000001.edx */
470 	const u32 kvm_cpuid_C000_0001_edx_x86_features =
471 		F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
472 		F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
473 		F(PMM) | F(PMM_EN);
474 
475 	/* cpuid 0xD.1.eax */
476 	const u32 kvm_cpuid_D_1_eax_x86_features =
477 		F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
478 
479 	/* all calls to cpuid_count() should be made on the same cpu */
480 	get_cpu();
481 
482 	r = -E2BIG;
483 
484 	if (*nent >= maxnent)
485 		goto out;
486 
487 	do_host_cpuid(entry, function, 0);
488 	++*nent;
489 
490 	switch (function) {
491 	case 0:
492 		/* Limited to the highest leaf implemented in KVM. */
493 		entry->eax = min(entry->eax, 0x1fU);
494 		break;
495 	case 1:
496 		entry->edx &= kvm_cpuid_1_edx_x86_features;
497 		cpuid_mask(&entry->edx, CPUID_1_EDX);
498 		entry->ecx &= kvm_cpuid_1_ecx_x86_features;
499 		cpuid_mask(&entry->ecx, CPUID_1_ECX);
500 		/* we support x2apic emulation even if host does not support
501 		 * it since we emulate x2apic in software */
502 		entry->ecx |= F(X2APIC);
503 		break;
504 	/* function 2 entries are STATEFUL. That is, repeated cpuid commands
505 	 * may return different values. This forces us to get_cpu() before
506 	 * issuing the first command, and also to emulate this annoying behavior
507 	 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
508 	case 2: {
509 		int t, times = entry->eax & 0xff;
510 
511 		entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
512 		for (t = 1; t < times; ++t) {
513 			if (*nent >= maxnent)
514 				goto out;
515 
516 			do_host_cpuid(&entry[t], function, 0);
517 			++*nent;
518 		}
519 		break;
520 	}
521 	/* functions 4 and 0x8000001d have additional index. */
522 	case 4:
523 	case 0x8000001d: {
524 		int i, cache_type;
525 
526 		/* read more entries until cache_type is zero */
527 		for (i = 1; ; ++i) {
528 			if (*nent >= maxnent)
529 				goto out;
530 
531 			cache_type = entry[i - 1].eax & 0x1f;
532 			if (!cache_type)
533 				break;
534 			do_host_cpuid(&entry[i], function, i);
535 			++*nent;
536 		}
537 		break;
538 	}
539 	case 6: /* Thermal management */
540 		entry->eax = 0x4; /* allow ARAT */
541 		entry->ebx = 0;
542 		entry->ecx = 0;
543 		entry->edx = 0;
544 		break;
545 	/* function 7 has additional index. */
546 	case 7: {
547 		int i;
548 
549 		for (i = 0; ; ) {
550 			do_cpuid_7_mask(&entry[i], i);
551 			if (i == entry->eax)
552 				break;
553 			if (*nent >= maxnent)
554 				goto out;
555 
556 			++i;
557 			do_host_cpuid(&entry[i], function, i);
558 			++*nent;
559 		}
560 		break;
561 	}
562 	case 9:
563 		break;
564 	case 0xa: { /* Architectural Performance Monitoring */
565 		struct x86_pmu_capability cap;
566 		union cpuid10_eax eax;
567 		union cpuid10_edx edx;
568 
569 		perf_get_x86_pmu_capability(&cap);
570 
571 		/*
572 		 * Only support guest architectural pmu on a host
573 		 * with architectural pmu.
574 		 */
575 		if (!cap.version)
576 			memset(&cap, 0, sizeof(cap));
577 
578 		eax.split.version_id = min(cap.version, 2);
579 		eax.split.num_counters = cap.num_counters_gp;
580 		eax.split.bit_width = cap.bit_width_gp;
581 		eax.split.mask_length = cap.events_mask_len;
582 
583 		edx.split.num_counters_fixed = cap.num_counters_fixed;
584 		edx.split.bit_width_fixed = cap.bit_width_fixed;
585 		edx.split.reserved = 0;
586 
587 		entry->eax = eax.full;
588 		entry->ebx = cap.events_mask;
589 		entry->ecx = 0;
590 		entry->edx = edx.full;
591 		break;
592 	}
593 	/*
594 	 * Per Intel's SDM, the 0x1f is a superset of 0xb,
595 	 * thus they can be handled by common code.
596 	 */
597 	case 0x1f:
598 	case 0xb: {
599 		int i, level_type;
600 
601 		/* read more entries until level_type is zero */
602 		for (i = 1; ; ++i) {
603 			if (*nent >= maxnent)
604 				goto out;
605 
606 			level_type = entry[i - 1].ecx & 0xff00;
607 			if (!level_type)
608 				break;
609 			do_host_cpuid(&entry[i], function, i);
610 			++*nent;
611 		}
612 		break;
613 	}
614 	case 0xd: {
615 		int idx, i;
616 		u64 supported = kvm_supported_xcr0();
617 
618 		entry->eax &= supported;
619 		entry->ebx = xstate_required_size(supported, false);
620 		entry->ecx = entry->ebx;
621 		entry->edx &= supported >> 32;
622 		if (!supported)
623 			break;
624 
625 		for (idx = 1, i = 1; idx < 64; ++idx) {
626 			u64 mask = ((u64)1 << idx);
627 			if (*nent >= maxnent)
628 				goto out;
629 
630 			do_host_cpuid(&entry[i], function, idx);
631 			if (idx == 1) {
632 				entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
633 				cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
634 				entry[i].ebx = 0;
635 				if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
636 					entry[i].ebx =
637 						xstate_required_size(supported,
638 								     true);
639 			} else {
640 				if (entry[i].eax == 0 || !(supported & mask))
641 					continue;
642 				if (WARN_ON_ONCE(entry[i].ecx & 1))
643 					continue;
644 			}
645 			entry[i].ecx = 0;
646 			entry[i].edx = 0;
647 			++*nent;
648 			++i;
649 		}
650 		break;
651 	}
652 	/* Intel PT */
653 	case 0x14: {
654 		int t, times = entry->eax;
655 
656 		if (!f_intel_pt)
657 			break;
658 
659 		for (t = 1; t <= times; ++t) {
660 			if (*nent >= maxnent)
661 				goto out;
662 			do_host_cpuid(&entry[t], function, t);
663 			++*nent;
664 		}
665 		break;
666 	}
667 	case KVM_CPUID_SIGNATURE: {
668 		static const char signature[12] = "KVMKVMKVM\0\0";
669 		const u32 *sigptr = (const u32 *)signature;
670 		entry->eax = KVM_CPUID_FEATURES;
671 		entry->ebx = sigptr[0];
672 		entry->ecx = sigptr[1];
673 		entry->edx = sigptr[2];
674 		break;
675 	}
676 	case KVM_CPUID_FEATURES:
677 		entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
678 			     (1 << KVM_FEATURE_NOP_IO_DELAY) |
679 			     (1 << KVM_FEATURE_CLOCKSOURCE2) |
680 			     (1 << KVM_FEATURE_ASYNC_PF) |
681 			     (1 << KVM_FEATURE_PV_EOI) |
682 			     (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
683 			     (1 << KVM_FEATURE_PV_UNHALT) |
684 			     (1 << KVM_FEATURE_PV_TLB_FLUSH) |
685 			     (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
686 			     (1 << KVM_FEATURE_PV_SEND_IPI) |
687 			     (1 << KVM_FEATURE_POLL_CONTROL) |
688 			     (1 << KVM_FEATURE_PV_SCHED_YIELD);
689 
690 		if (sched_info_on())
691 			entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
692 
693 		entry->ebx = 0;
694 		entry->ecx = 0;
695 		entry->edx = 0;
696 		break;
697 	case 0x80000000:
698 		entry->eax = min(entry->eax, 0x8000001f);
699 		break;
700 	case 0x80000001:
701 		entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
702 		cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
703 		entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
704 		cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
705 		break;
706 	case 0x80000007: /* Advanced power management */
707 		/* invariant TSC is CPUID.80000007H:EDX[8] */
708 		entry->edx &= (1 << 8);
709 		/* mask against host */
710 		entry->edx &= boot_cpu_data.x86_power;
711 		entry->eax = entry->ebx = entry->ecx = 0;
712 		break;
713 	case 0x80000008: {
714 		unsigned g_phys_as = (entry->eax >> 16) & 0xff;
715 		unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
716 		unsigned phys_as = entry->eax & 0xff;
717 
718 		if (!g_phys_as)
719 			g_phys_as = phys_as;
720 		entry->eax = g_phys_as | (virt_as << 8);
721 		entry->edx = 0;
722 		/*
723 		 * IBRS, IBPB and VIRT_SSBD aren't necessarily present in
724 		 * hardware cpuid
725 		 */
726 		if (boot_cpu_has(X86_FEATURE_AMD_IBPB))
727 			entry->ebx |= F(AMD_IBPB);
728 		if (boot_cpu_has(X86_FEATURE_AMD_IBRS))
729 			entry->ebx |= F(AMD_IBRS);
730 		if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
731 			entry->ebx |= F(VIRT_SSBD);
732 		entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
733 		cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
734 		/*
735 		 * The preference is to use SPEC CTRL MSR instead of the
736 		 * VIRT_SPEC MSR.
737 		 */
738 		if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
739 		    !boot_cpu_has(X86_FEATURE_AMD_SSBD))
740 			entry->ebx |= F(VIRT_SSBD);
741 		break;
742 	}
743 	case 0x80000019:
744 		entry->ecx = entry->edx = 0;
745 		break;
746 	case 0x8000001a:
747 	case 0x8000001e:
748 		break;
749 	/*Add support for Centaur's CPUID instruction*/
750 	case 0xC0000000:
751 		/*Just support up to 0xC0000004 now*/
752 		entry->eax = min(entry->eax, 0xC0000004);
753 		break;
754 	case 0xC0000001:
755 		entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
756 		cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
757 		break;
758 	case 3: /* Processor serial number */
759 	case 5: /* MONITOR/MWAIT */
760 	case 0xC0000002:
761 	case 0xC0000003:
762 	case 0xC0000004:
763 	default:
764 		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
765 		break;
766 	}
767 
768 	kvm_x86_ops->set_supported_cpuid(function, entry);
769 
770 	r = 0;
771 
772 out:
773 	put_cpu();
774 
775 	return r;
776 }
777 
778 static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func,
779 			 int *nent, int maxnent, unsigned int type)
780 {
781 	if (type == KVM_GET_EMULATED_CPUID)
782 		return __do_cpuid_func_emulated(entry, func, nent, maxnent);
783 
784 	return __do_cpuid_func(entry, func, nent, maxnent);
785 }
786 
787 #undef F
788 
789 struct kvm_cpuid_param {
790 	u32 func;
791 	bool (*qualifier)(const struct kvm_cpuid_param *param);
792 };
793 
794 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
795 {
796 	return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
797 }
798 
799 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
800 				 __u32 num_entries, unsigned int ioctl_type)
801 {
802 	int i;
803 	__u32 pad[3];
804 
805 	if (ioctl_type != KVM_GET_EMULATED_CPUID)
806 		return false;
807 
808 	/*
809 	 * We want to make sure that ->padding is being passed clean from
810 	 * userspace in case we want to use it for something in the future.
811 	 *
812 	 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
813 	 * have to give ourselves satisfied only with the emulated side. /me
814 	 * sheds a tear.
815 	 */
816 	for (i = 0; i < num_entries; i++) {
817 		if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
818 			return true;
819 
820 		if (pad[0] || pad[1] || pad[2])
821 			return true;
822 	}
823 	return false;
824 }
825 
826 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
827 			    struct kvm_cpuid_entry2 __user *entries,
828 			    unsigned int type)
829 {
830 	struct kvm_cpuid_entry2 *cpuid_entries;
831 	int limit, nent = 0, r = -E2BIG, i;
832 	u32 func;
833 	static const struct kvm_cpuid_param param[] = {
834 		{ .func = 0 },
835 		{ .func = 0x80000000 },
836 		{ .func = 0xC0000000, .qualifier = is_centaur_cpu },
837 		{ .func = KVM_CPUID_SIGNATURE },
838 	};
839 
840 	if (cpuid->nent < 1)
841 		goto out;
842 	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
843 		cpuid->nent = KVM_MAX_CPUID_ENTRIES;
844 
845 	if (sanity_check_entries(entries, cpuid->nent, type))
846 		return -EINVAL;
847 
848 	r = -ENOMEM;
849 	cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
850 					   cpuid->nent));
851 	if (!cpuid_entries)
852 		goto out;
853 
854 	r = 0;
855 	for (i = 0; i < ARRAY_SIZE(param); i++) {
856 		const struct kvm_cpuid_param *ent = &param[i];
857 
858 		if (ent->qualifier && !ent->qualifier(ent))
859 			continue;
860 
861 		r = do_cpuid_func(&cpuid_entries[nent], ent->func,
862 				  &nent, cpuid->nent, type);
863 
864 		if (r)
865 			goto out_free;
866 
867 		limit = cpuid_entries[nent - 1].eax;
868 		for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
869 			r = do_cpuid_func(&cpuid_entries[nent], func,
870 				          &nent, cpuid->nent, type);
871 
872 		if (r)
873 			goto out_free;
874 	}
875 
876 	r = -EFAULT;
877 	if (copy_to_user(entries, cpuid_entries,
878 			 nent * sizeof(struct kvm_cpuid_entry2)))
879 		goto out_free;
880 	cpuid->nent = nent;
881 	r = 0;
882 
883 out_free:
884 	vfree(cpuid_entries);
885 out:
886 	return r;
887 }
888 
889 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
890 {
891 	struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
892 	struct kvm_cpuid_entry2 *ej;
893 	int j = i;
894 	int nent = vcpu->arch.cpuid_nent;
895 
896 	e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
897 	/* when no next entry is found, the current entry[i] is reselected */
898 	do {
899 		j = (j + 1) % nent;
900 		ej = &vcpu->arch.cpuid_entries[j];
901 	} while (ej->function != e->function);
902 
903 	ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
904 
905 	return j;
906 }
907 
908 /* find an entry with matching function, matching index (if needed), and that
909  * should be read next (if it's stateful) */
910 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
911 	u32 function, u32 index)
912 {
913 	if (e->function != function)
914 		return 0;
915 	if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
916 		return 0;
917 	if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
918 	    !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
919 		return 0;
920 	return 1;
921 }
922 
923 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
924 					      u32 function, u32 index)
925 {
926 	int i;
927 	struct kvm_cpuid_entry2 *best = NULL;
928 
929 	for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
930 		struct kvm_cpuid_entry2 *e;
931 
932 		e = &vcpu->arch.cpuid_entries[i];
933 		if (is_matching_cpuid_entry(e, function, index)) {
934 			if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
935 				move_to_next_stateful_cpuid_entry(vcpu, i);
936 			best = e;
937 			break;
938 		}
939 	}
940 	return best;
941 }
942 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
943 
944 /*
945  * If no match is found, check whether we exceed the vCPU's limit
946  * and return the content of the highest valid _standard_ leaf instead.
947  * This is to satisfy the CPUID specification.
948  */
949 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
950                                                   u32 function, u32 index)
951 {
952 	struct kvm_cpuid_entry2 *maxlevel;
953 
954 	maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
955 	if (!maxlevel || maxlevel->eax >= function)
956 		return NULL;
957 	if (function & 0x80000000) {
958 		maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
959 		if (!maxlevel)
960 			return NULL;
961 	}
962 	return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
963 }
964 
965 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
966 	       u32 *ecx, u32 *edx, bool check_limit)
967 {
968 	u32 function = *eax, index = *ecx;
969 	struct kvm_cpuid_entry2 *best;
970 	bool entry_found = true;
971 
972 	best = kvm_find_cpuid_entry(vcpu, function, index);
973 
974 	if (!best) {
975 		entry_found = false;
976 		if (!check_limit)
977 			goto out;
978 
979 		best = check_cpuid_limit(vcpu, function, index);
980 	}
981 
982 out:
983 	if (best) {
984 		*eax = best->eax;
985 		*ebx = best->ebx;
986 		*ecx = best->ecx;
987 		*edx = best->edx;
988 	} else
989 		*eax = *ebx = *ecx = *edx = 0;
990 	trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found);
991 	return entry_found;
992 }
993 EXPORT_SYMBOL_GPL(kvm_cpuid);
994 
995 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
996 {
997 	u32 eax, ebx, ecx, edx;
998 
999 	if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
1000 		return 1;
1001 
1002 	eax = kvm_rax_read(vcpu);
1003 	ecx = kvm_rcx_read(vcpu);
1004 	kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
1005 	kvm_rax_write(vcpu, eax);
1006 	kvm_rbx_write(vcpu, ebx);
1007 	kvm_rcx_write(vcpu, ecx);
1008 	kvm_rdx_write(vcpu, edx);
1009 	return kvm_skip_emulated_instruction(vcpu);
1010 }
1011 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
1012